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Diffstat (limited to 'drivers/scsi/qla2xxx/qla_def.h')
-rw-r--r--drivers/scsi/qla2xxx/qla_def.h157
1 files changed, 151 insertions, 6 deletions
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 1c6d366f4fad..b455c31405e4 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -214,6 +214,7 @@
214 * valid range of an N-PORT id is 0 through 0x7ef. 214 * valid range of an N-PORT id is 0 through 0x7ef.
215 */ 215 */
216#define NPH_LAST_HANDLE 0x7ef 216#define NPH_LAST_HANDLE 0x7ef
217#define NPH_MGMT_SERVER 0x7fa /* FFFFFA */
217#define NPH_SNS 0x7fc /* FFFFFC */ 218#define NPH_SNS 0x7fc /* FFFFFC */
218#define NPH_FABRIC_CONTROLLER 0x7fd /* FFFFFD */ 219#define NPH_FABRIC_CONTROLLER 0x7fd /* FFFFFD */
219#define NPH_F_PORT 0x7fe /* FFFFFE */ 220#define NPH_F_PORT 0x7fe /* FFFFFE */
@@ -630,6 +631,7 @@ typedef struct {
630#define MBC_WRITE_RAM_WORD_EXTENDED 0xd /* Write RAM word extended */ 631#define MBC_WRITE_RAM_WORD_EXTENDED 0xd /* Write RAM word extended */
631#define MBC_READ_RAM_EXTENDED 0xf /* Read RAM extended. */ 632#define MBC_READ_RAM_EXTENDED 0xf /* Read RAM extended. */
632#define MBC_IOCB_COMMAND 0x12 /* Execute IOCB command. */ 633#define MBC_IOCB_COMMAND 0x12 /* Execute IOCB command. */
634#define MBC_STOP_FIRMWARE 0x14 /* Stop firmware. */
633#define MBC_ABORT_COMMAND 0x15 /* Abort IOCB command. */ 635#define MBC_ABORT_COMMAND 0x15 /* Abort IOCB command. */
634#define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */ 636#define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */
635#define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */ 637#define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */
@@ -913,7 +915,7 @@ typedef struct {
913 * MSB BIT 1 = 915 * MSB BIT 1 =
914 * MSB BIT 2 = 916 * MSB BIT 2 =
915 * MSB BIT 3 = 917 * MSB BIT 3 =
916 * MSB BIT 4 = 918 * MSB BIT 4 = LED mode
917 * MSB BIT 5 = enable 50 ohm termination 919 * MSB BIT 5 = enable 50 ohm termination
918 * MSB BIT 6 = Data Rate (2300 only) 920 * MSB BIT 6 = Data Rate (2300 only)
919 * MSB BIT 7 = Data Rate (2300 only) 921 * MSB BIT 7 = Data Rate (2300 only)
@@ -1035,7 +1037,7 @@ typedef struct {
1035 * MSB BIT 1 = 1037 * MSB BIT 1 =
1036 * MSB BIT 2 = 1038 * MSB BIT 2 =
1037 * MSB BIT 3 = 1039 * MSB BIT 3 =
1038 * MSB BIT 4 = 1040 * MSB BIT 4 = LED mode
1039 * MSB BIT 5 = enable 50 ohm termination 1041 * MSB BIT 5 = enable 50 ohm termination
1040 * MSB BIT 6 = Data Rate (2300 only) 1042 * MSB BIT 6 = Data Rate (2300 only)
1041 * MSB BIT 7 = Data Rate (2300 only) 1043 * MSB BIT 7 = Data Rate (2300 only)
@@ -1131,10 +1133,7 @@ typedef struct {
1131 1133
1132 uint8_t link_down_timeout; 1134 uint8_t link_down_timeout;
1133 1135
1134 uint8_t adapter_id_0[4]; 1136 uint8_t adapter_id[16];
1135 uint8_t adapter_id_1[4];
1136 uint8_t adapter_id_2[4];
1137 uint8_t adapter_id_3[4];
1138 1137
1139 uint8_t alt1_boot_node_name[WWN_SIZE]; 1138 uint8_t alt1_boot_node_name[WWN_SIZE];
1140 uint16_t alt1_boot_lun_number; 1139 uint16_t alt1_boot_lun_number;
@@ -1673,6 +1672,7 @@ typedef struct fc_port {
1673 uint8_t cur_path; /* current path id */ 1672 uint8_t cur_path; /* current path id */
1674 1673
1675 struct fc_rport *rport; 1674 struct fc_rport *rport;
1675 u32 supported_classes;
1676} fc_port_t; 1676} fc_port_t;
1677 1677
1678/* 1678/*
@@ -1727,6 +1727,8 @@ typedef struct fc_port {
1727 1727
1728#define CT_REJECT_RESPONSE 0x8001 1728#define CT_REJECT_RESPONSE 0x8001
1729#define CT_ACCEPT_RESPONSE 0x8002 1729#define CT_ACCEPT_RESPONSE 0x8002
1730#define CT_REASON_CANNOT_PERFORM 0x09
1731#define CT_EXPL_ALREADY_REGISTERED 0x10
1730 1732
1731#define NS_N_PORT_TYPE 0x01 1733#define NS_N_PORT_TYPE 0x01
1732#define NS_NL_PORT_TYPE 0x02 1734#define NS_NL_PORT_TYPE 0x02
@@ -1768,6 +1770,100 @@ typedef struct fc_port {
1768#define RSNN_NN_REQ_SIZE (16 + 8 + 1 + 255) 1770#define RSNN_NN_REQ_SIZE (16 + 8 + 1 + 255)
1769#define RSNN_NN_RSP_SIZE 16 1771#define RSNN_NN_RSP_SIZE 16
1770 1772
1773/*
1774 * HBA attribute types.
1775 */
1776#define FDMI_HBA_ATTR_COUNT 9
1777#define FDMI_HBA_NODE_NAME 1
1778#define FDMI_HBA_MANUFACTURER 2
1779#define FDMI_HBA_SERIAL_NUMBER 3
1780#define FDMI_HBA_MODEL 4
1781#define FDMI_HBA_MODEL_DESCRIPTION 5
1782#define FDMI_HBA_HARDWARE_VERSION 6
1783#define FDMI_HBA_DRIVER_VERSION 7
1784#define FDMI_HBA_OPTION_ROM_VERSION 8
1785#define FDMI_HBA_FIRMWARE_VERSION 9
1786#define FDMI_HBA_OS_NAME_AND_VERSION 0xa
1787#define FDMI_HBA_MAXIMUM_CT_PAYLOAD_LENGTH 0xb
1788
1789struct ct_fdmi_hba_attr {
1790 uint16_t type;
1791 uint16_t len;
1792 union {
1793 uint8_t node_name[WWN_SIZE];
1794 uint8_t manufacturer[32];
1795 uint8_t serial_num[8];
1796 uint8_t model[16];
1797 uint8_t model_desc[80];
1798 uint8_t hw_version[16];
1799 uint8_t driver_version[32];
1800 uint8_t orom_version[16];
1801 uint8_t fw_version[16];
1802 uint8_t os_version[128];
1803 uint8_t max_ct_len[4];
1804 } a;
1805};
1806
1807struct ct_fdmi_hba_attributes {
1808 uint32_t count;
1809 struct ct_fdmi_hba_attr entry[FDMI_HBA_ATTR_COUNT];
1810};
1811
1812/*
1813 * Port attribute types.
1814 */
1815#define FDMI_PORT_ATTR_COUNT 5
1816#define FDMI_PORT_FC4_TYPES 1
1817#define FDMI_PORT_SUPPORT_SPEED 2
1818#define FDMI_PORT_CURRENT_SPEED 3
1819#define FDMI_PORT_MAX_FRAME_SIZE 4
1820#define FDMI_PORT_OS_DEVICE_NAME 5
1821#define FDMI_PORT_HOST_NAME 6
1822
1823struct ct_fdmi_port_attr {
1824 uint16_t type;
1825 uint16_t len;
1826 union {
1827 uint8_t fc4_types[32];
1828 uint32_t sup_speed;
1829 uint32_t cur_speed;
1830 uint32_t max_frame_size;
1831 uint8_t os_dev_name[32];
1832 uint8_t host_name[32];
1833 } a;
1834};
1835
1836/*
1837 * Port Attribute Block.
1838 */
1839struct ct_fdmi_port_attributes {
1840 uint32_t count;
1841 struct ct_fdmi_port_attr entry[FDMI_PORT_ATTR_COUNT];
1842};
1843
1844/* FDMI definitions. */
1845#define GRHL_CMD 0x100
1846#define GHAT_CMD 0x101
1847#define GRPL_CMD 0x102
1848#define GPAT_CMD 0x110
1849
1850#define RHBA_CMD 0x200
1851#define RHBA_RSP_SIZE 16
1852
1853#define RHAT_CMD 0x201
1854#define RPRT_CMD 0x210
1855
1856#define RPA_CMD 0x211
1857#define RPA_RSP_SIZE 16
1858
1859#define DHBA_CMD 0x300
1860#define DHBA_REQ_SIZE (16 + 8)
1861#define DHBA_RSP_SIZE 16
1862
1863#define DHAT_CMD 0x301
1864#define DPRT_CMD 0x310
1865#define DPA_CMD 0x311
1866
1771/* CT command header -- request/response common fields */ 1867/* CT command header -- request/response common fields */
1772struct ct_cmd_hdr { 1868struct ct_cmd_hdr {
1773 uint8_t revision; 1869 uint8_t revision;
@@ -1825,6 +1921,43 @@ struct ct_sns_req {
1825 uint8_t name_len; 1921 uint8_t name_len;
1826 uint8_t sym_node_name[255]; 1922 uint8_t sym_node_name[255];
1827 } rsnn_nn; 1923 } rsnn_nn;
1924
1925 struct {
1926 uint8_t hba_indentifier[8];
1927 } ghat;
1928
1929 struct {
1930 uint8_t hba_identifier[8];
1931 uint32_t entry_count;
1932 uint8_t port_name[8];
1933 struct ct_fdmi_hba_attributes attrs;
1934 } rhba;
1935
1936 struct {
1937 uint8_t hba_identifier[8];
1938 struct ct_fdmi_hba_attributes attrs;
1939 } rhat;
1940
1941 struct {
1942 uint8_t port_name[8];
1943 struct ct_fdmi_port_attributes attrs;
1944 } rpa;
1945
1946 struct {
1947 uint8_t port_name[8];
1948 } dhba;
1949
1950 struct {
1951 uint8_t port_name[8];
1952 } dhat;
1953
1954 struct {
1955 uint8_t port_name[8];
1956 } dprt;
1957
1958 struct {
1959 uint8_t port_name[8];
1960 } dpa;
1828 } req; 1961 } req;
1829}; 1962};
1830 1963
@@ -1882,6 +2015,12 @@ struct ct_sns_rsp {
1882 struct { 2015 struct {
1883 uint8_t fc4_types[32]; 2016 uint8_t fc4_types[32];
1884 } gft_id; 2017 } gft_id;
2018
2019 struct {
2020 uint32_t entry_count;
2021 uint8_t port_name[8];
2022 struct ct_fdmi_hba_attributes attrs;
2023 } ghat;
1885 } rsp; 2024 } rsp;
1886}; 2025};
1887 2026
@@ -2032,6 +2171,8 @@ struct isp_operations {
2032 uint16_t (*calc_req_entries) (uint16_t); 2171 uint16_t (*calc_req_entries) (uint16_t);
2033 void (*build_iocbs) (srb_t *, cmd_entry_t *, uint16_t); 2172 void (*build_iocbs) (srb_t *, cmd_entry_t *, uint16_t);
2034 void * (*prep_ms_iocb) (struct scsi_qla_host *, uint32_t, uint32_t); 2173 void * (*prep_ms_iocb) (struct scsi_qla_host *, uint32_t, uint32_t);
2174 void * (*prep_ms_fdmi_iocb) (struct scsi_qla_host *, uint32_t,
2175 uint32_t);
2035 2176
2036 uint8_t * (*read_nvram) (struct scsi_qla_host *, uint8_t *, 2177 uint8_t * (*read_nvram) (struct scsi_qla_host *, uint8_t *,
2037 uint32_t, uint32_t); 2178 uint32_t, uint32_t);
@@ -2111,6 +2252,7 @@ typedef struct scsi_qla_host {
2111#define IOCTL_ERROR_RECOVERY 23 2252#define IOCTL_ERROR_RECOVERY 23
2112#define LOOP_RESET_NEEDED 24 2253#define LOOP_RESET_NEEDED 24
2113#define BEACON_BLINK_NEEDED 25 2254#define BEACON_BLINK_NEEDED 25
2255#define REGISTER_FDMI_NEEDED 26
2114 2256
2115 uint32_t device_flags; 2257 uint32_t device_flags;
2116#define DFLG_LOCAL_DEVICES BIT_0 2258#define DFLG_LOCAL_DEVICES BIT_0
@@ -2204,6 +2346,7 @@ typedef struct scsi_qla_host {
2204 int port_down_retry_count; 2346 int port_down_retry_count;
2205 uint8_t mbx_count; 2347 uint8_t mbx_count;
2206 uint16_t last_loop_id; 2348 uint16_t last_loop_id;
2349 uint16_t mgmt_svr_loop_id;
2207 2350
2208 uint32_t login_retry_count; 2351 uint32_t login_retry_count;
2209 2352
@@ -2318,6 +2461,7 @@ typedef struct scsi_qla_host {
2318 uint8_t model_number[16+1]; 2461 uint8_t model_number[16+1];
2319#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" 2462#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
2320 char *model_desc; 2463 char *model_desc;
2464 uint8_t adapter_id[16+1];
2321 2465
2322 uint8_t *node_name; 2466 uint8_t *node_name;
2323 uint8_t *port_name; 2467 uint8_t *port_name;
@@ -2377,6 +2521,7 @@ typedef struct scsi_qla_host {
2377#define QLA_SUSPENDED 0x106 2521#define QLA_SUSPENDED 0x106
2378#define QLA_BUSY 0x107 2522#define QLA_BUSY 0x107
2379#define QLA_RSCNS_HANDLED 0x108 2523#define QLA_RSCNS_HANDLED 0x108
2524#define QLA_ALREADY_REGISTERED 0x109
2380 2525
2381/* 2526/*
2382* Stat info for all adpaters 2527* Stat info for all adpaters