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-rw-r--r--drivers/scsi/qla2xxx/qla_def.h389
1 files changed, 247 insertions, 142 deletions
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 83a32e403e29..acf40dcbfb30 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -2,7 +2,7 @@
2* QLOGIC LINUX SOFTWARE 2* QLOGIC LINUX SOFTWARE
3* 3*
4* QLogic ISP2x00 device driver for Linux 2.6.x 4* QLogic ISP2x00 device driver for Linux 2.6.x
5* Copyright (C) 2003-2004 QLogic Corporation 5* Copyright (C) 2003-2005 QLogic Corporation
6* (www.qlogic.com) 6* (www.qlogic.com)
7* 7*
8* This program is free software; you can redistribute it and/or modify it 8* This program is free software; you can redistribute it and/or modify it
@@ -33,6 +33,7 @@
33#include <linux/mempool.h> 33#include <linux/mempool.h>
34#include <linux/spinlock.h> 34#include <linux/spinlock.h>
35#include <linux/completion.h> 35#include <linux/completion.h>
36#include <linux/interrupt.h>
36#include <asm/semaphore.h> 37#include <asm/semaphore.h>
37 38
38#include <scsi/scsi.h> 39#include <scsi/scsi.h>
@@ -40,27 +41,6 @@
40#include <scsi/scsi_device.h> 41#include <scsi/scsi_device.h>
41#include <scsi/scsi_cmnd.h> 42#include <scsi/scsi_cmnd.h>
42 43
43/* XXX(hch): move to pci_ids.h */
44#ifndef PCI_DEVICE_ID_QLOGIC_ISP2300
45#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300
46#endif
47
48#ifndef PCI_DEVICE_ID_QLOGIC_ISP2312
49#define PCI_DEVICE_ID_QLOGIC_ISP2312 0x2312
50#endif
51
52#ifndef PCI_DEVICE_ID_QLOGIC_ISP2322
53#define PCI_DEVICE_ID_QLOGIC_ISP2322 0x2322
54#endif
55
56#ifndef PCI_DEVICE_ID_QLOGIC_ISP6312
57#define PCI_DEVICE_ID_QLOGIC_ISP6312 0x6312
58#endif
59
60#ifndef PCI_DEVICE_ID_QLOGIC_ISP6322
61#define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322
62#endif
63
64#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE) 44#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE)
65#define IS_QLA2100(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2100) 45#define IS_QLA2100(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2100)
66#else 46#else
@@ -95,9 +75,28 @@
95#define IS_QLA6322(ha) 0 75#define IS_QLA6322(ha) 0
96#endif 76#endif
97 77
78#if defined(CONFIG_SCSI_QLA24XX) || defined(CONFIG_SCSI_QLA24XX_MODULE)
79#define IS_QLA2422(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422)
80#define IS_QLA2432(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432)
81#else
82#define IS_QLA2422(ha) 0
83#define IS_QLA2432(ha) 0
84#endif
85
86#if defined(CONFIG_SCSI_QLA25XX) || defined(CONFIG_SCSI_QLA25XX_MODULE)
87#define IS_QLA2512(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2512)
88#define IS_QLA2522(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2522)
89#else
90#define IS_QLA2512(ha) 0
91#define IS_QLA2522(ha) 0
92#endif
93
98#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \ 94#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
99 IS_QLA6312(ha) || IS_QLA6322(ha)) 95 IS_QLA6312(ha) || IS_QLA6322(ha))
100 96
97#define IS_QLA24XX(ha) (IS_QLA2422(ha) || IS_QLA2432(ha))
98#define IS_QLA25XX(ha) (IS_QLA2512(ha) || IS_QLA2522(ha))
99
101/* 100/*
102 * Only non-ISP2[12]00 have extended addressing support in the firmware. 101 * Only non-ISP2[12]00 have extended addressing support in the firmware.
103 */ 102 */
@@ -117,7 +116,7 @@
117 116
118#include "qla_settings.h" 117#include "qla_settings.h"
119 118
120/* 119/*
121 * Data bit definitions 120 * Data bit definitions
122 */ 121 */
123#define BIT_0 0x1 122#define BIT_0 0x1
@@ -182,7 +181,7 @@
182 */ 181 */
183#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */ 182#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */
184#define MAX_FIBRE_DEVICES 512 183#define MAX_FIBRE_DEVICES 512
185#define MAX_FIBRE_LUNS 256 184#define MAX_FIBRE_LUNS 0xFFFF
186#define MAX_RSCN_COUNT 32 185#define MAX_RSCN_COUNT 32
187#define MAX_HOST_COUNT 16 186#define MAX_HOST_COUNT 16
188 187
@@ -192,11 +191,10 @@
192#define MAX_BUSES 1 /* We only have one bus today */ 191#define MAX_BUSES 1 /* We only have one bus today */
193#define MAX_TARGETS_2100 MAX_FIBRE_DEVICES 192#define MAX_TARGETS_2100 MAX_FIBRE_DEVICES
194#define MAX_TARGETS_2200 MAX_FIBRE_DEVICES 193#define MAX_TARGETS_2200 MAX_FIBRE_DEVICES
195#define MAX_TARGETS MAX_FIBRE_DEVICES
196#define MIN_LUNS 8 194#define MIN_LUNS 8
197#define MAX_LUNS MAX_FIBRE_LUNS 195#define MAX_LUNS MAX_FIBRE_LUNS
198#define MAX_CMDS_PER_LUN 255 196#define MAX_CMDS_PER_LUN 255
199 197
200/* 198/*
201 * Fibre Channel device definitions. 199 * Fibre Channel device definitions.
202 */ 200 */
@@ -211,10 +209,18 @@
211#define MANAGEMENT_SERVER 0xfe 209#define MANAGEMENT_SERVER 0xfe
212#define BROADCAST 0xff 210#define BROADCAST 0xff
213 211
214#define RESERVED_LOOP_ID(x) ((x > LAST_LOCAL_LOOP_ID && \ 212/*
215 x < SNS_FIRST_LOOP_ID) || \ 213 * There is no correspondence between an N-PORT id and an AL_PA. Therefore the
216 x == MANAGEMENT_SERVER || \ 214 * valid range of an N-PORT id is 0 through 0x7ef.
217 x == BROADCAST) 215 */
216#define NPH_LAST_HANDLE 0x7ef
217#define NPH_SNS 0x7fc /* FFFFFC */
218#define NPH_FABRIC_CONTROLLER 0x7fd /* FFFFFD */
219#define NPH_F_PORT 0x7fe /* FFFFFE */
220#define NPH_IP_BROADCAST 0x7ff /* FFFFFF */
221
222#define MAX_CMDSZ 16 /* SCSI maximum CDB size. */
223#include "qla_fw.h"
218 224
219/* 225/*
220 * Timeout timer counts in seconds 226 * Timeout timer counts in seconds
@@ -231,11 +237,12 @@
231#define REQUEST_ENTRY_CNT_2100 128 /* Number of request entries. */ 237#define REQUEST_ENTRY_CNT_2100 128 /* Number of request entries. */
232#define REQUEST_ENTRY_CNT_2200 2048 /* Number of request entries. */ 238#define REQUEST_ENTRY_CNT_2200 2048 /* Number of request entries. */
233#define REQUEST_ENTRY_CNT_2XXX_EXT_MEM 4096 /* Number of request entries. */ 239#define REQUEST_ENTRY_CNT_2XXX_EXT_MEM 4096 /* Number of request entries. */
240#define REQUEST_ENTRY_CNT_24XX 4096 /* Number of request entries. */
234#define RESPONSE_ENTRY_CNT_2100 64 /* Number of response entries.*/ 241#define RESPONSE_ENTRY_CNT_2100 64 /* Number of response entries.*/
235#define RESPONSE_ENTRY_CNT_2300 512 /* Number of response entries.*/ 242#define RESPONSE_ENTRY_CNT_2300 512 /* Number of response entries.*/
236 243
237/* 244/*
238 * SCSI Request Block 245 * SCSI Request Block
239 */ 246 */
240typedef struct srb { 247typedef struct srb {
241 struct list_head list; 248 struct list_head list;
@@ -246,7 +253,7 @@ typedef struct srb {
246 struct scsi_cmnd *cmd; /* Linux SCSI command pkt */ 253 struct scsi_cmnd *cmd; /* Linux SCSI command pkt */
247 254
248 struct timer_list timer; /* Command timer */ 255 struct timer_list timer; /* Command timer */
249 atomic_t ref_count; /* Reference count for this structure */ 256 atomic_t ref_count; /* Reference count for this structure */
250 uint16_t flags; 257 uint16_t flags;
251 258
252 /* Request state */ 259 /* Request state */
@@ -299,24 +306,24 @@ typedef struct srb {
299/* 306/*
300 * ISP I/O Register Set structure definitions. 307 * ISP I/O Register Set structure definitions.
301 */ 308 */
302typedef volatile struct { 309struct device_reg_2xxx {
303 volatile uint16_t flash_address; /* Flash BIOS address */ 310 uint16_t flash_address; /* Flash BIOS address */
304 volatile uint16_t flash_data; /* Flash BIOS data */ 311 uint16_t flash_data; /* Flash BIOS data */
305 uint16_t unused_1[1]; /* Gap */ 312 uint16_t unused_1[1]; /* Gap */
306 volatile uint16_t ctrl_status; /* Control/Status */ 313 uint16_t ctrl_status; /* Control/Status */
307#define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */ 314#define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */
308#define CSR_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */ 315#define CSR_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */
309#define CSR_ISP_SOFT_RESET BIT_0 /* ISP soft reset */ 316#define CSR_ISP_SOFT_RESET BIT_0 /* ISP soft reset */
310 317
311 volatile uint16_t ictrl; /* Interrupt control */ 318 uint16_t ictrl; /* Interrupt control */
312#define ICR_EN_INT BIT_15 /* ISP enable interrupts. */ 319#define ICR_EN_INT BIT_15 /* ISP enable interrupts. */
313#define ICR_EN_RISC BIT_3 /* ISP enable RISC interrupts. */ 320#define ICR_EN_RISC BIT_3 /* ISP enable RISC interrupts. */
314 321
315 volatile uint16_t istatus; /* Interrupt status */ 322 uint16_t istatus; /* Interrupt status */
316#define ISR_RISC_INT BIT_3 /* RISC interrupt */ 323#define ISR_RISC_INT BIT_3 /* RISC interrupt */
317 324
318 volatile uint16_t semaphore; /* Semaphore */ 325 uint16_t semaphore; /* Semaphore */
319 volatile uint16_t nvram; /* NVRAM register. */ 326 uint16_t nvram; /* NVRAM register. */
320#define NVR_DESELECT 0 327#define NVR_DESELECT 0
321#define NVR_BUSY BIT_15 328#define NVR_BUSY BIT_15
322#define NVR_WRT_ENABLE BIT_14 /* Write enable */ 329#define NVR_WRT_ENABLE BIT_14 /* Write enable */
@@ -328,78 +335,78 @@ typedef volatile struct {
328 335
329 union { 336 union {
330 struct { 337 struct {
331 volatile uint16_t mailbox0; 338 uint16_t mailbox0;
332 volatile uint16_t mailbox1; 339 uint16_t mailbox1;
333 volatile uint16_t mailbox2; 340 uint16_t mailbox2;
334 volatile uint16_t mailbox3; 341 uint16_t mailbox3;
335 volatile uint16_t mailbox4; 342 uint16_t mailbox4;
336 volatile uint16_t mailbox5; 343 uint16_t mailbox5;
337 volatile uint16_t mailbox6; 344 uint16_t mailbox6;
338 volatile uint16_t mailbox7; 345 uint16_t mailbox7;
339 uint16_t unused_2[59]; /* Gap */ 346 uint16_t unused_2[59]; /* Gap */
340 } __attribute__((packed)) isp2100; 347 } __attribute__((packed)) isp2100;
341 struct { 348 struct {
342 /* Request Queue */ 349 /* Request Queue */
343 volatile uint16_t req_q_in; /* In-Pointer */ 350 uint16_t req_q_in; /* In-Pointer */
344 volatile uint16_t req_q_out; /* Out-Pointer */ 351 uint16_t req_q_out; /* Out-Pointer */
345 /* Response Queue */ 352 /* Response Queue */
346 volatile uint16_t rsp_q_in; /* In-Pointer */ 353 uint16_t rsp_q_in; /* In-Pointer */
347 volatile uint16_t rsp_q_out; /* Out-Pointer */ 354 uint16_t rsp_q_out; /* Out-Pointer */
348 355
349 /* RISC to Host Status */ 356 /* RISC to Host Status */
350 volatile uint32_t host_status; 357 uint32_t host_status;
351#define HSR_RISC_INT BIT_15 /* RISC interrupt */ 358#define HSR_RISC_INT BIT_15 /* RISC interrupt */
352#define HSR_RISC_PAUSED BIT_8 /* RISC Paused */ 359#define HSR_RISC_PAUSED BIT_8 /* RISC Paused */
353 360
354 /* Host to Host Semaphore */ 361 /* Host to Host Semaphore */
355 volatile uint16_t host_semaphore; 362 uint16_t host_semaphore;
356 uint16_t unused_3[17]; /* Gap */ 363 uint16_t unused_3[17]; /* Gap */
357 volatile uint16_t mailbox0; 364 uint16_t mailbox0;
358 volatile uint16_t mailbox1; 365 uint16_t mailbox1;
359 volatile uint16_t mailbox2; 366 uint16_t mailbox2;
360 volatile uint16_t mailbox3; 367 uint16_t mailbox3;
361 volatile uint16_t mailbox4; 368 uint16_t mailbox4;
362 volatile uint16_t mailbox5; 369 uint16_t mailbox5;
363 volatile uint16_t mailbox6; 370 uint16_t mailbox6;
364 volatile uint16_t mailbox7; 371 uint16_t mailbox7;
365 volatile uint16_t mailbox8; 372 uint16_t mailbox8;
366 volatile uint16_t mailbox9; 373 uint16_t mailbox9;
367 volatile uint16_t mailbox10; 374 uint16_t mailbox10;
368 volatile uint16_t mailbox11; 375 uint16_t mailbox11;
369 volatile uint16_t mailbox12; 376 uint16_t mailbox12;
370 volatile uint16_t mailbox13; 377 uint16_t mailbox13;
371 volatile uint16_t mailbox14; 378 uint16_t mailbox14;
372 volatile uint16_t mailbox15; 379 uint16_t mailbox15;
373 volatile uint16_t mailbox16; 380 uint16_t mailbox16;
374 volatile uint16_t mailbox17; 381 uint16_t mailbox17;
375 volatile uint16_t mailbox18; 382 uint16_t mailbox18;
376 volatile uint16_t mailbox19; 383 uint16_t mailbox19;
377 volatile uint16_t mailbox20; 384 uint16_t mailbox20;
378 volatile uint16_t mailbox21; 385 uint16_t mailbox21;
379 volatile uint16_t mailbox22; 386 uint16_t mailbox22;
380 volatile uint16_t mailbox23; 387 uint16_t mailbox23;
381 volatile uint16_t mailbox24; 388 uint16_t mailbox24;
382 volatile uint16_t mailbox25; 389 uint16_t mailbox25;
383 volatile uint16_t mailbox26; 390 uint16_t mailbox26;
384 volatile uint16_t mailbox27; 391 uint16_t mailbox27;
385 volatile uint16_t mailbox28; 392 uint16_t mailbox28;
386 volatile uint16_t mailbox29; 393 uint16_t mailbox29;
387 volatile uint16_t mailbox30; 394 uint16_t mailbox30;
388 volatile uint16_t mailbox31; 395 uint16_t mailbox31;
389 volatile uint16_t fb_cmd; 396 uint16_t fb_cmd;
390 uint16_t unused_4[10]; /* Gap */ 397 uint16_t unused_4[10]; /* Gap */
391 } __attribute__((packed)) isp2300; 398 } __attribute__((packed)) isp2300;
392 } u; 399 } u;
393 400
394 volatile uint16_t fpm_diag_config; 401 uint16_t fpm_diag_config;
395 uint16_t unused_5[0x6]; /* Gap */ 402 uint16_t unused_5[0x6]; /* Gap */
396 volatile uint16_t pcr; /* Processor Control Register. */ 403 uint16_t pcr; /* Processor Control Register. */
397 uint16_t unused_6[0x5]; /* Gap */ 404 uint16_t unused_6[0x5]; /* Gap */
398 volatile uint16_t mctr; /* Memory Configuration and Timing. */ 405 uint16_t mctr; /* Memory Configuration and Timing. */
399 uint16_t unused_7[0x3]; /* Gap */ 406 uint16_t unused_7[0x3]; /* Gap */
400 volatile uint16_t fb_cmd_2100; /* Unused on 23XX */ 407 uint16_t fb_cmd_2100; /* Unused on 23XX */
401 uint16_t unused_8[0x3]; /* Gap */ 408 uint16_t unused_8[0x3]; /* Gap */
402 volatile uint16_t hccr; /* Host command & control register. */ 409 uint16_t hccr; /* Host command & control register. */
403#define HCCR_HOST_INT BIT_7 /* Host interrupt bit */ 410#define HCCR_HOST_INT BIT_7 /* Host interrupt bit */
404#define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */ 411#define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */
405 /* HCCR commands */ 412 /* HCCR commands */
@@ -413,8 +420,8 @@ typedef volatile struct {
413#define HCCR_ENABLE_PARITY 0xA000 /* Enable PARITY interrupt */ 420#define HCCR_ENABLE_PARITY 0xA000 /* Enable PARITY interrupt */
414 421
415 uint16_t unused_9[5]; /* Gap */ 422 uint16_t unused_9[5]; /* Gap */
416 volatile uint16_t gpiod; /* GPIO Data register. */ 423 uint16_t gpiod; /* GPIO Data register. */
417 volatile uint16_t gpioe; /* GPIO Enable register. */ 424 uint16_t gpioe; /* GPIO Enable register. */
418#define GPIO_LED_MASK 0x00C0 425#define GPIO_LED_MASK 0x00C0
419#define GPIO_LED_GREEN_OFF_AMBER_OFF 0x0000 426#define GPIO_LED_GREEN_OFF_AMBER_OFF 0x0000
420#define GPIO_LED_GREEN_ON_AMBER_OFF 0x0040 427#define GPIO_LED_GREEN_ON_AMBER_OFF 0x0040
@@ -423,25 +430,32 @@ typedef volatile struct {
423 430
424 union { 431 union {
425 struct { 432 struct {
426 uint16_t unused_10[8]; /* Gap */ 433 uint16_t unused_10[8]; /* Gap */
427 volatile uint16_t mailbox8; 434 uint16_t mailbox8;
428 volatile uint16_t mailbox9; 435 uint16_t mailbox9;
429 volatile uint16_t mailbox10; 436 uint16_t mailbox10;
430 volatile uint16_t mailbox11; 437 uint16_t mailbox11;
431 volatile uint16_t mailbox12; 438 uint16_t mailbox12;
432 volatile uint16_t mailbox13; 439 uint16_t mailbox13;
433 volatile uint16_t mailbox14; 440 uint16_t mailbox14;
434 volatile uint16_t mailbox15; 441 uint16_t mailbox15;
435 volatile uint16_t mailbox16; 442 uint16_t mailbox16;
436 volatile uint16_t mailbox17; 443 uint16_t mailbox17;
437 volatile uint16_t mailbox18; 444 uint16_t mailbox18;
438 volatile uint16_t mailbox19; 445 uint16_t mailbox19;
439 volatile uint16_t mailbox20; 446 uint16_t mailbox20;
440 volatile uint16_t mailbox21; 447 uint16_t mailbox21;
441 volatile uint16_t mailbox22; 448 uint16_t mailbox22;
442 volatile uint16_t mailbox23; /* Also probe reg. */ 449 uint16_t mailbox23; /* Also probe reg. */
443 } __attribute__((packed)) isp2200; 450 } __attribute__((packed)) isp2200;
444 } u_end; 451 } u_end;
452};
453
454typedef struct {
455 union {
456 struct device_reg_2xxx isp;
457 struct device_reg_24xx isp24;
458 };
445} device_reg_t; 459} device_reg_t;
446 460
447#define ISP_REQ_Q_IN(ha, reg) \ 461#define ISP_REQ_Q_IN(ha, reg) \
@@ -524,6 +538,8 @@ typedef struct {
524#define MBS_LOOP_ID_USED 0x4008 538#define MBS_LOOP_ID_USED 0x4008
525#define MBS_ALL_IDS_IN_USE 0x4009 539#define MBS_ALL_IDS_IN_USE 0x4009
526#define MBS_NOT_LOGGED_IN 0x400A 540#define MBS_NOT_LOGGED_IN 0x400A
541#define MBS_LINK_DOWN_ERROR 0x400B
542#define MBS_DIAG_ECHO_TEST_ERROR 0x400C
527 543
528/* 544/*
529 * ISP mailbox asynchronous event status codes 545 * ISP mailbox asynchronous event status codes
@@ -575,7 +591,7 @@ typedef struct {
575#define FO1_CTIO_RETRY BIT_3 591#define FO1_CTIO_RETRY BIT_3
576#define FO1_DISABLE_LIP_F7_SW BIT_4 592#define FO1_DISABLE_LIP_F7_SW BIT_4
577#define FO1_DISABLE_100MS_LOS_WAIT BIT_5 593#define FO1_DISABLE_100MS_LOS_WAIT BIT_5
578#define FO1_DISABLE_GPIO6_7 BIT_6 594#define FO1_DISABLE_GPIO6_7 BIT_6 /* LED bits */
579#define FO1_AE_ON_LOOP_INIT_ERR BIT_7 595#define FO1_AE_ON_LOOP_INIT_ERR BIT_7
580#define FO1_SET_EMPHASIS_SWING BIT_8 596#define FO1_SET_EMPHASIS_SWING BIT_8
581#define FO1_AE_AUTO_BYPASS BIT_9 597#define FO1_AE_AUTO_BYPASS BIT_9
@@ -590,6 +606,15 @@ typedef struct {
590#define FO3_ENABLE_EMERG_IOCB BIT_0 606#define FO3_ENABLE_EMERG_IOCB BIT_0
591#define FO3_AE_RND_ERROR BIT_1 607#define FO3_AE_RND_ERROR BIT_1
592 608
609/* 24XX additional firmware options */
610#define ADD_FO_COUNT 3
611#define ADD_FO1_DISABLE_GPIO_LED_CTRL BIT_6 /* LED bits */
612#define ADD_FO1_ENABLE_PUREX_IOCB BIT_10
613
614#define ADD_FO2_ENABLE_SEL_CLS2 BIT_5
615
616#define ADD_FO3_NO_ABT_ON_LINK_DOWN BIT_14
617
593/* 618/*
594 * ISP mailbox commands 619 * ISP mailbox commands
595 */ 620 */
@@ -658,6 +683,22 @@ typedef struct {
658#define MBC_SEND_LFA_COMMAND 0x7D /* Send Loop Fabric Address */ 683#define MBC_SEND_LFA_COMMAND 0x7D /* Send Loop Fabric Address */
659#define MBC_LUN_RESET 0x7E /* Send LUN reset */ 684#define MBC_LUN_RESET 0x7E /* Send LUN reset */
660 685
686/*
687 * ISP24xx mailbox commands
688 */
689#define MBC_SERDES_PARAMS 0x10 /* Serdes Tx Parameters. */
690#define MBC_GET_IOCB_STATUS 0x12 /* Get IOCB status command. */
691#define MBC_GET_TIMEOUT_PARAMS 0x22 /* Get FW timeouts. */
692#define MBC_GEN_SYSTEM_ERROR 0x2a /* Generate System Error. */
693#define MBC_SET_TIMEOUT_PARAMS 0x32 /* Set FW timeouts. */
694#define MBC_MID_INITIALIZE_FIRMWARE 0x48 /* MID Initialize firmware. */
695#define MBC_MID_GET_VP_DATABASE 0x49 /* MID Get VP Database. */
696#define MBC_MID_GET_VP_ENTRY 0x4a /* MID Get VP Entry. */
697#define MBC_HOST_MEMORY_COPY 0x53 /* Host Memory Copy. */
698#define MBC_SEND_RNFT_ELS 0x5e /* Send RNFT ELS request */
699#define MBC_GET_LINK_PRIV_STATS 0x6d /* Get link & private data. */
700#define MBC_SET_VENDOR_ID 0x76 /* Set Vendor ID. */
701
661/* Firmware return data sizes */ 702/* Firmware return data sizes */
662#define FCAL_MAP_SIZE 128 703#define FCAL_MAP_SIZE 128
663 704
@@ -887,6 +928,9 @@ typedef struct {
887/* 928/*
888 * Get Link Status mailbox command return buffer. 929 * Get Link Status mailbox command return buffer.
889 */ 930 */
931#define GLSO_SEND_RPS BIT_0
932#define GLSO_USE_DID BIT_3
933
890typedef struct { 934typedef struct {
891 uint32_t link_fail_cnt; 935 uint32_t link_fail_cnt;
892 uint32_t loss_sync_cnt; 936 uint32_t loss_sync_cnt;
@@ -1012,7 +1056,7 @@ typedef struct {
1012 * LSB BIT 5 = Rx Sensitivity 1G bit 1 1056 * LSB BIT 5 = Rx Sensitivity 1G bit 1
1013 * LSB BIT 6 = Rx Sensitivity 1G bit 2 1057 * LSB BIT 6 = Rx Sensitivity 1G bit 2
1014 * LSB BIT 7 = Rx Sensitivity 1G bit 3 1058 * LSB BIT 7 = Rx Sensitivity 1G bit 3
1015 * 1059 *
1016 * MSB BIT 0 = Tx Sensitivity 2G bit 0 1060 * MSB BIT 0 = Tx Sensitivity 2G bit 0
1017 * MSB BIT 1 = Tx Sensitivity 2G bit 1 1061 * MSB BIT 1 = Tx Sensitivity 2G bit 1
1018 * MSB BIT 2 = Tx Sensitivity 2G bit 2 1062 * MSB BIT 2 = Tx Sensitivity 2G bit 2
@@ -1030,7 +1074,7 @@ typedef struct {
1030 * LSB BIT 5 = Output Swing 2G bit 0 1074 * LSB BIT 5 = Output Swing 2G bit 0
1031 * LSB BIT 6 = Output Swing 2G bit 1 1075 * LSB BIT 6 = Output Swing 2G bit 1
1032 * LSB BIT 7 = Output Swing 2G bit 2 1076 * LSB BIT 7 = Output Swing 2G bit 2
1033 * 1077 *
1034 * MSB BIT 0 = Output Emphasis 2G bit 0 1078 * MSB BIT 0 = Output Emphasis 2G bit 0
1035 * MSB BIT 1 = Output Emphasis 2G bit 1 1079 * MSB BIT 1 = Output Emphasis 2G bit 1
1036 * MSB BIT 2 = Output Enable 1080 * MSB BIT 2 = Output Enable
@@ -1181,7 +1225,6 @@ do { \
1181 * ISP queue - command entry structure definition. 1225 * ISP queue - command entry structure definition.
1182 */ 1226 */
1183#define COMMAND_TYPE 0x11 /* Command entry */ 1227#define COMMAND_TYPE 0x11 /* Command entry */
1184#define MAX_CMDSZ 16 /* SCSI maximum CDB size. */
1185typedef struct { 1228typedef struct {
1186 uint8_t entry_type; /* Entry type. */ 1229 uint8_t entry_type; /* Entry type. */
1187 uint8_t entry_count; /* Entry count. */ 1230 uint8_t entry_count; /* Entry count. */
@@ -1304,11 +1347,16 @@ typedef struct {
1304/* 1347/*
1305 * Status entry entry status 1348 * Status entry entry status
1306 */ 1349 */
1350#define RF_RQ_DMA_ERROR BIT_6 /* Request Queue DMA error. */
1307#define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */ 1351#define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */
1308#define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */ 1352#define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */
1309#define RF_INV_E_PARAM BIT_3 /* Invalid entry parameter. */ 1353#define RF_INV_E_PARAM BIT_3 /* Invalid entry parameter. */
1310#define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */ 1354#define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */
1311#define RF_BUSY BIT_1 /* Busy */ 1355#define RF_BUSY BIT_1 /* Busy */
1356#define RF_MASK (RF_RQ_DMA_ERROR | RF_INV_E_ORDER | RF_INV_E_COUNT | \
1357 RF_INV_E_PARAM | RF_INV_E_TYPE | RF_BUSY)
1358#define RF_MASK_24XX (RF_INV_E_ORDER | RF_INV_E_COUNT | RF_INV_E_PARAM | \
1359 RF_INV_E_TYPE)
1312 1360
1313/* 1361/*
1314 * Status entry SCSI status bit definitions. 1362 * Status entry SCSI status bit definitions.
@@ -1523,9 +1571,6 @@ typedef struct {
1523 port_id_t d_id; 1571 port_id_t d_id;
1524 uint8_t node_name[WWN_SIZE]; 1572 uint8_t node_name[WWN_SIZE];
1525 uint8_t port_name[WWN_SIZE]; 1573 uint8_t port_name[WWN_SIZE];
1526 uint32_t type;
1527#define SW_TYPE_IP BIT_1
1528#define SW_TYPE_SCSI BIT_0
1529} sw_info_t; 1574} sw_info_t;
1530 1575
1531/* 1576/*
@@ -1540,6 +1585,8 @@ typedef struct {
1540 union { 1585 union {
1541 cmd_a64_entry_t cmd; 1586 cmd_a64_entry_t cmd;
1542 sts_entry_t rsp; 1587 sts_entry_t rsp;
1588 struct cmd_type_7 cmd24;
1589 struct sts_entry_24xx rsp24;
1543 } p; 1590 } p;
1544 uint8_t inq[INQ_DATA_SIZE]; 1591 uint8_t inq[INQ_DATA_SIZE];
1545} inq_cmd_rsp_t; 1592} inq_cmd_rsp_t;
@@ -1575,10 +1622,13 @@ typedef struct {
1575 union { 1622 union {
1576 cmd_a64_entry_t cmd; 1623 cmd_a64_entry_t cmd;
1577 sts_entry_t rsp; 1624 sts_entry_t rsp;
1625 struct cmd_type_7 cmd24;
1626 struct sts_entry_24xx rsp24;
1578 } p; 1627 } p;
1579 rpt_lun_lst_t list; 1628 rpt_lun_lst_t list;
1580} rpt_lun_cmd_rsp_t; 1629} rpt_lun_cmd_rsp_t;
1581 1630
1631
1582/* 1632/*
1583 * Fibre channel port type. 1633 * Fibre channel port type.
1584 */ 1634 */
@@ -1666,6 +1716,7 @@ typedef struct fc_port {
1666#define FCF_FAILOVER_DISABLE BIT_22 1716#define FCF_FAILOVER_DISABLE BIT_22
1667#define FCF_DSXXX_DEVICE BIT_23 1717#define FCF_DSXXX_DEVICE BIT_23
1668#define FCF_AA_EVA_DEVICE BIT_24 1718#define FCF_AA_EVA_DEVICE BIT_24
1719#define FCF_AA_MSA_DEVICE BIT_25
1669 1720
1670/* No loop ID flag. */ 1721/* No loop ID flag. */
1671#define FC_NO_LOOP_ID 0x1000 1722#define FC_NO_LOOP_ID 0x1000
@@ -1937,19 +1988,63 @@ struct qla_board_info {
1937 1988
1938 char isp_name[8]; 1989 char isp_name[8];
1939 struct qla_fw_info *fw_info; 1990 struct qla_fw_info *fw_info;
1991 char *fw_fname;
1992 struct scsi_host_template *sht;
1940}; 1993};
1941 1994
1942/* Return data from MBC_GET_ID_LIST call. */ 1995/* Return data from MBC_GET_ID_LIST call. */
1943struct gid_list_info { 1996struct gid_list_info {
1944 uint8_t al_pa; 1997 uint8_t al_pa;
1945 uint8_t area; 1998 uint8_t area;
1946 uint8_t domain; 1999 uint8_t domain;
1947 uint8_t loop_id_2100; /* ISP2100/ISP2200 -- 4 bytes. */ 2000 uint8_t loop_id_2100; /* ISP2100/ISP2200 -- 4 bytes. */
1948 uint16_t loop_id; /* ISP23XX -- 6 bytes. */ 2001 uint16_t loop_id; /* ISP23XX -- 6 bytes. */
2002 uint16_t reserved_1; /* ISP24XX -- 8 bytes. */
1949}; 2003};
1950#define GID_LIST_SIZE (sizeof(struct gid_list_info) * MAX_FIBRE_DEVICES) 2004#define GID_LIST_SIZE (sizeof(struct gid_list_info) * MAX_FIBRE_DEVICES)
1951 2005
1952/* 2006/*
2007 * ISP operations
2008 */
2009struct isp_operations {
2010
2011 int (*pci_config) (struct scsi_qla_host *);
2012 void (*reset_chip) (struct scsi_qla_host *);
2013 int (*chip_diag) (struct scsi_qla_host *);
2014 void (*config_rings) (struct scsi_qla_host *);
2015 void (*reset_adapter) (struct scsi_qla_host *);
2016 int (*nvram_config) (struct scsi_qla_host *);
2017 void (*update_fw_options) (struct scsi_qla_host *);
2018 int (*load_risc) (struct scsi_qla_host *, uint32_t *);
2019
2020 char * (*pci_info_str) (struct scsi_qla_host *, char *);
2021 char * (*fw_version_str) (struct scsi_qla_host *, char *);
2022
2023 irqreturn_t (*intr_handler) (int, void *, struct pt_regs *);
2024 void (*enable_intrs) (struct scsi_qla_host *);
2025 void (*disable_intrs) (struct scsi_qla_host *);
2026
2027 int (*abort_command) (struct scsi_qla_host *, srb_t *);
2028 int (*abort_target) (struct fc_port *);
2029 int (*fabric_login) (struct scsi_qla_host *, uint16_t, uint8_t,
2030 uint8_t, uint8_t, uint16_t *, uint8_t);
2031 int (*fabric_logout) (struct scsi_qla_host *, uint16_t, uint8_t,
2032 uint8_t, uint8_t);
2033
2034 uint16_t (*calc_req_entries) (uint16_t);
2035 void (*build_iocbs) (srb_t *, cmd_entry_t *, uint16_t);
2036 void * (*prep_ms_iocb) (struct scsi_qla_host *, uint32_t, uint32_t);
2037
2038 uint8_t * (*read_nvram) (struct scsi_qla_host *, uint8_t *,
2039 uint32_t, uint32_t);
2040 int (*write_nvram) (struct scsi_qla_host *, uint8_t *, uint32_t,
2041 uint32_t);
2042
2043 void (*fw_dump) (struct scsi_qla_host *, int);
2044 void (*ascii_fw_dump) (struct scsi_qla_host *);
2045};
2046
2047/*
1953 * Linux Host Adapter structure 2048 * Linux Host Adapter structure
1954 */ 2049 */
1955typedef struct scsi_qla_host { 2050typedef struct scsi_qla_host {
@@ -1979,6 +2074,8 @@ typedef struct scsi_qla_host {
1979 uint32_t enable_lip_full_login :1; 2074 uint32_t enable_lip_full_login :1;
1980 uint32_t enable_target_reset :1; 2075 uint32_t enable_target_reset :1;
1981 uint32_t enable_led_scheme :1; 2076 uint32_t enable_led_scheme :1;
2077 uint32_t msi_enabled :1;
2078 uint32_t msix_enabled :1;
1982 } flags; 2079 } flags;
1983 2080
1984 atomic_t loop_state; 2081 atomic_t loop_state;
@@ -2013,8 +2110,9 @@ typedef struct scsi_qla_host {
2013#define ISP_ABORT_RETRY 20 /* ISP aborted. */ 2110#define ISP_ABORT_RETRY 20 /* ISP aborted. */
2014#define FCPORT_RESCAN_NEEDED 21 /* IO descriptor processing needed */ 2111#define FCPORT_RESCAN_NEEDED 21 /* IO descriptor processing needed */
2015#define IODESC_PROCESS_NEEDED 22 /* IO descriptor processing needed */ 2112#define IODESC_PROCESS_NEEDED 22 /* IO descriptor processing needed */
2016#define IOCTL_ERROR_RECOVERY 23 2113#define IOCTL_ERROR_RECOVERY 23
2017#define LOOP_RESET_NEEDED 24 2114#define LOOP_RESET_NEEDED 24
2115#define BEACON_BLINK_NEEDED 25
2018 2116
2019 uint32_t device_flags; 2117 uint32_t device_flags;
2020#define DFLG_LOCAL_DEVICES BIT_0 2118#define DFLG_LOCAL_DEVICES BIT_0
@@ -2027,7 +2125,7 @@ typedef struct scsi_qla_host {
2027#define SRB_MIN_REQ 128 2125#define SRB_MIN_REQ 128
2028 mempool_t *srb_mempool; 2126 mempool_t *srb_mempool;
2029 2127
2030 /* This spinlock is used to protect "io transactions", you must 2128 /* This spinlock is used to protect "io transactions", you must
2031 * aquire it before doing any IO to the card, eg with RD_REG*() and 2129 * aquire it before doing any IO to the card, eg with RD_REG*() and
2032 * WRT_REG*() for the duration of your entire commandtransaction. 2130 * WRT_REG*() for the duration of your entire commandtransaction.
2033 * 2131 *
@@ -2054,13 +2152,12 @@ typedef struct scsi_qla_host {
2054 response_t *response_ring_ptr; /* Current address. */ 2152 response_t *response_ring_ptr; /* Current address. */
2055 uint16_t rsp_ring_index; /* Current index. */ 2153 uint16_t rsp_ring_index; /* Current index. */
2056 uint16_t response_q_length; 2154 uint16_t response_q_length;
2057 2155
2058 uint16_t (*calc_request_entries)(uint16_t); 2156 struct isp_operations isp_ops;
2059 void (*build_scsi_iocbs)(srb_t *, cmd_entry_t *, uint16_t);
2060 2157
2061 /* Outstandings ISP commands. */ 2158 /* Outstandings ISP commands. */
2062 srb_t *outstanding_cmds[MAX_OUTSTANDING_COMMANDS]; 2159 srb_t *outstanding_cmds[MAX_OUTSTANDING_COMMANDS];
2063 uint32_t current_outstanding_cmd; 2160 uint32_t current_outstanding_cmd;
2064 srb_t *status_srb; /* Status continuation entry. */ 2161 srb_t *status_srb; /* Status continuation entry. */
2065 2162
2066 uint16_t revision; 2163 uint16_t revision;
@@ -2089,7 +2186,7 @@ typedef struct scsi_qla_host {
2089#define LOOP_P2P 2 2186#define LOOP_P2P 2
2090#define P2P_LOOP 3 2187#define P2P_LOOP 3
2091 2188
2092 uint8_t marker_needed; 2189 uint8_t marker_needed;
2093 2190
2094 uint8_t interrupts_on; 2191 uint8_t interrupts_on;
2095 2192
@@ -2099,6 +2196,7 @@ typedef struct scsi_qla_host {
2099 uint8_t serial2; 2196 uint8_t serial2;
2100 2197
2101 /* NVRAM configuration data */ 2198 /* NVRAM configuration data */
2199 uint16_t nvram_size;
2102 uint16_t nvram_base; 2200 uint16_t nvram_base;
2103 2201
2104 uint16_t loop_reset_delay; 2202 uint16_t loop_reset_delay;
@@ -2109,7 +2207,7 @@ typedef struct scsi_qla_host {
2109 uint8_t mbx_count; 2207 uint8_t mbx_count;
2110 uint16_t last_loop_id; 2208 uint16_t last_loop_id;
2111 2209
2112 uint32_t login_retry_count; 2210 uint32_t login_retry_count;
2113 2211
2114 /* Fibre Channel Device List. */ 2212 /* Fibre Channel Device List. */
2115 struct list_head fcports; 2213 struct list_head fcports;
@@ -2149,16 +2247,18 @@ typedef struct scsi_qla_host {
2149 2247
2150 dma_addr_t gid_list_dma; 2248 dma_addr_t gid_list_dma;
2151 struct gid_list_info *gid_list; 2249 struct gid_list_info *gid_list;
2250 int gid_list_info_size;
2152 2251
2153 dma_addr_t rlc_rsp_dma; 2252 dma_addr_t rlc_rsp_dma;
2154 rpt_lun_cmd_rsp_t *rlc_rsp; 2253 rpt_lun_cmd_rsp_t *rlc_rsp;
2155 2254
2156 /* Small DMA pool allocations -- maximum 256 bytes in length. */ 2255 /* Small DMA pool allocations -- maximum 256 bytes in length. */
2157#define DMA_POOL_SIZE 256 2256#define DMA_POOL_SIZE 256
2158 struct dma_pool *s_dma_pool; 2257 struct dma_pool *s_dma_pool;
2159 2258
2160 dma_addr_t init_cb_dma; 2259 dma_addr_t init_cb_dma;
2161 init_cb_t *init_cb; 2260 init_cb_t *init_cb;
2261 int init_cb_size;
2162 2262
2163 dma_addr_t iodesc_pd_dma; 2263 dma_addr_t iodesc_pd_dma;
2164 port_database_t *iodesc_pd; 2264 port_database_t *iodesc_pd;
@@ -2180,10 +2280,10 @@ typedef struct scsi_qla_host {
2180 uint32_t mbx_flags; 2280 uint32_t mbx_flags;
2181#define MBX_IN_PROGRESS BIT_0 2281#define MBX_IN_PROGRESS BIT_0
2182#define MBX_BUSY BIT_1 /* Got the Access */ 2282#define MBX_BUSY BIT_1 /* Got the Access */
2183#define MBX_SLEEPING_ON_SEM BIT_2 2283#define MBX_SLEEPING_ON_SEM BIT_2
2184#define MBX_POLLING_FOR_COMP BIT_3 2284#define MBX_POLLING_FOR_COMP BIT_3
2185#define MBX_COMPLETED BIT_4 2285#define MBX_COMPLETED BIT_4
2186#define MBX_TIMEDOUT BIT_5 2286#define MBX_TIMEDOUT BIT_5
2187#define MBX_ACCESS_TIMEDOUT BIT_6 2287#define MBX_ACCESS_TIMEDOUT BIT_6
2188 2288
2189 mbx_cmd_t mc; 2289 mbx_cmd_t mc;
@@ -2199,6 +2299,7 @@ typedef struct scsi_qla_host {
2199 2299
2200 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */ 2300 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
2201 uint8_t fw_seriallink_options[4]; 2301 uint8_t fw_seriallink_options[4];
2302 uint16_t fw_seriallink_options24[4];
2202 2303
2203 /* Firmware dump information. */ 2304 /* Firmware dump information. */
2204 void *fw_dump; 2305 void *fw_dump;
@@ -2207,8 +2308,12 @@ typedef struct scsi_qla_host {
2207 char *fw_dump_buffer; 2308 char *fw_dump_buffer;
2208 int fw_dump_buffer_len; 2309 int fw_dump_buffer_len;
2209 2310
2311 int fw_dumped;
2312 void *fw_dump24;
2313 int fw_dump24_len;
2314
2210 uint8_t host_str[16]; 2315 uint8_t host_str[16];
2211 uint16_t pci_attr; 2316 uint32_t pci_attr;
2212 2317
2213 uint16_t product_id[4]; 2318 uint16_t product_id[4];
2214 2319
@@ -2216,8 +2321,8 @@ typedef struct scsi_qla_host {
2216#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" 2321#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
2217 char *model_desc; 2322 char *model_desc;
2218 2323
2219 uint8_t node_name[WWN_SIZE]; 2324 uint8_t *node_name;
2220 uint8_t nvram_version; 2325 uint8_t *port_name;
2221 uint32_t isp_abort_cnt; 2326 uint32_t isp_abort_cnt;
2222 2327
2223 /* Needed for BEACON */ 2328 /* Needed for BEACON */
@@ -2239,7 +2344,7 @@ typedef struct scsi_qla_host {
2239 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \ 2344 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
2240 test_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) || \ 2345 test_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) || \
2241 atomic_read(&ha->loop_state) == LOOP_DOWN) 2346 atomic_read(&ha->loop_state) == LOOP_DOWN)
2242 2347
2243#define LOOP_RDY(ha) (!LOOP_NOT_READY(ha)) 2348#define LOOP_RDY(ha) (!LOOP_NOT_READY(ha))
2244 2349
2245#define TGT_Q(ha, t) (ha->otgt[t]) 2350#define TGT_Q(ha, t) (ha->otgt[t])
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 21:42:56 -0500