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-rw-r--r--drivers/scsi/qla2xxx/qla_def.h117
1 files changed, 71 insertions, 46 deletions
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index af1003f9de1e..a2443031dbe7 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -125,17 +125,17 @@
125 * Fibre Channel device definitions. 125 * Fibre Channel device definitions.
126 */ 126 */
127#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */ 127#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */
128#define MAX_FIBRE_DEVICES 512 128#define MAX_FIBRE_DEVICES_2100 512
129#define MAX_FIBRE_DEVICES_2400 2048
130#define MAX_FIBRE_DEVICES_LOOP 128
131#define MAX_FIBRE_DEVICES_MAX MAX_FIBRE_DEVICES_2400
129#define MAX_FIBRE_LUNS 0xFFFF 132#define MAX_FIBRE_LUNS 0xFFFF
130#define MAX_RSCN_COUNT 32
131#define MAX_HOST_COUNT 16 133#define MAX_HOST_COUNT 16
132 134
133/* 135/*
134 * Host adapter default definitions. 136 * Host adapter default definitions.
135 */ 137 */
136#define MAX_BUSES 1 /* We only have one bus today */ 138#define MAX_BUSES 1 /* We only have one bus today */
137#define MAX_TARGETS_2100 MAX_FIBRE_DEVICES
138#define MAX_TARGETS_2200 MAX_FIBRE_DEVICES
139#define MIN_LUNS 8 139#define MIN_LUNS 8
140#define MAX_LUNS MAX_FIBRE_LUNS 140#define MAX_LUNS MAX_FIBRE_LUNS
141#define MAX_CMDS_PER_LUN 255 141#define MAX_CMDS_PER_LUN 255
@@ -202,20 +202,12 @@ struct sd_dif_tuple {
202/* 202/*
203 * SCSI Request Block 203 * SCSI Request Block
204 */ 204 */
205typedef struct srb { 205struct srb_cmd {
206 atomic_t ref_count;
207 struct fc_port *fcport;
208 uint32_t handle;
209
210 struct scsi_cmnd *cmd; /* Linux SCSI command pkt */ 206 struct scsi_cmnd *cmd; /* Linux SCSI command pkt */
211
212 uint16_t flags;
213
214 uint32_t request_sense_length; 207 uint32_t request_sense_length;
215 uint8_t *request_sense_ptr; 208 uint8_t *request_sense_ptr;
216
217 void *ctx; 209 void *ctx;
218} srb_t; 210};
219 211
220/* 212/*
221 * SRB flag definitions 213 * SRB flag definitions
@@ -254,10 +246,7 @@ struct srb_iocb {
254 } u; 246 } u;
255 247
256 struct timer_list timer; 248 struct timer_list timer;
257 249 void (*timeout)(void *);
258 void (*done)(srb_t *);
259 void (*free)(srb_t *);
260 void (*timeout)(srb_t *);
261}; 250};
262 251
263/* Values for srb_ctx type */ 252/* Values for srb_ctx type */
@@ -268,16 +257,37 @@ struct srb_iocb {
268#define SRB_CT_CMD 5 257#define SRB_CT_CMD 5
269#define SRB_ADISC_CMD 6 258#define SRB_ADISC_CMD 6
270#define SRB_TM_CMD 7 259#define SRB_TM_CMD 7
260#define SRB_SCSI_CMD 8
271 261
272struct srb_ctx { 262typedef struct srb {
263 atomic_t ref_count;
264 struct fc_port *fcport;
265 uint32_t handle;
266 uint16_t flags;
273 uint16_t type; 267 uint16_t type;
274 char *name; 268 char *name;
275 int iocbs; 269 int iocbs;
276 union { 270 union {
277 struct srb_iocb *iocb_cmd; 271 struct srb_iocb iocb_cmd;
278 struct fc_bsg_job *bsg_job; 272 struct fc_bsg_job *bsg_job;
273 struct srb_cmd scmd;
279 } u; 274 } u;
280}; 275 void (*done)(void *, void *, int);
276 void (*free)(void *, void *);
277} srb_t;
278
279#define GET_CMD_SP(sp) (sp->u.scmd.cmd)
280#define SET_CMD_SP(sp, cmd) (sp->u.scmd.cmd = cmd)
281#define GET_CMD_CTX_SP(sp) (sp->u.scmd.ctx)
282
283#define GET_CMD_SENSE_LEN(sp) \
284 (sp->u.scmd.request_sense_length)
285#define SET_CMD_SENSE_LEN(sp, len) \
286 (sp->u.scmd.request_sense_length = len)
287#define GET_CMD_SENSE_PTR(sp) \
288 (sp->u.scmd.request_sense_ptr)
289#define SET_CMD_SENSE_PTR(sp, ptr) \
290 (sp->u.scmd.request_sense_ptr = ptr)
281 291
282struct msg_echo_lb { 292struct msg_echo_lb {
283 dma_addr_t send_dma; 293 dma_addr_t send_dma;
@@ -653,8 +663,10 @@ typedef struct {
653#define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Diagnostic loop back. */ 663#define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Diagnostic loop back. */
654#define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */ 664#define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */
655#define MBC_ENHANCED_GET_PORT_DATABASE 0x47 /* Get port database + login */ 665#define MBC_ENHANCED_GET_PORT_DATABASE 0x47 /* Get port database + login */
666#define MBC_CONFIGURE_VF 0x4b /* Configure VFs */
656#define MBC_RESET_LINK_STATUS 0x52 /* Reset Link Error Status */ 667#define MBC_RESET_LINK_STATUS 0x52 /* Reset Link Error Status */
657#define MBC_IOCB_COMMAND_A64 0x54 /* Execute IOCB command (64) */ 668#define MBC_IOCB_COMMAND_A64 0x54 /* Execute IOCB command (64) */
669#define MBC_PORT_LOGOUT 0x56 /* Port Logout request */
658#define MBC_SEND_RNID_ELS 0x57 /* Send RNID ELS request */ 670#define MBC_SEND_RNID_ELS 0x57 /* Send RNID ELS request */
659#define MBC_SET_RNID_PARAMS 0x59 /* Set RNID parameters */ 671#define MBC_SET_RNID_PARAMS 0x59 /* Set RNID parameters */
660#define MBC_GET_RNID_PARAMS 0x5a /* Data Rate */ 672#define MBC_GET_RNID_PARAMS 0x5a /* Data Rate */
@@ -1709,6 +1721,7 @@ typedef struct fc_port {
1709 1721
1710 uint16_t vp_idx; 1722 uint16_t vp_idx;
1711 uint8_t fc4_type; 1723 uint8_t fc4_type;
1724 uint8_t scan_state;
1712} fc_port_t; 1725} fc_port_t;
1713 1726
1714/* 1727/*
@@ -1761,7 +1774,6 @@ static const char * const port_state_str[] = {
1761 1774
1762#define GID_PT_CMD 0x1A1 1775#define GID_PT_CMD 0x1A1
1763#define GID_PT_REQ_SIZE (16 + 4) 1776#define GID_PT_REQ_SIZE (16 + 4)
1764#define GID_PT_RSP_SIZE (16 + (MAX_FIBRE_DEVICES * 4))
1765 1777
1766#define GPN_ID_CMD 0x112 1778#define GPN_ID_CMD 0x112
1767#define GPN_ID_REQ_SIZE (16 + 4) 1779#define GPN_ID_REQ_SIZE (16 + 4)
@@ -2051,7 +2063,9 @@ struct ct_sns_rsp {
2051 } ga_nxt; 2063 } ga_nxt;
2052 2064
2053 struct { 2065 struct {
2054 struct ct_sns_gid_pt_data entries[MAX_FIBRE_DEVICES]; 2066 /* Assume the largest number of targets for the union */
2067 struct ct_sns_gid_pt_data
2068 entries[MAX_FIBRE_DEVICES_MAX];
2055 } gid_pt; 2069 } gid_pt;
2056 2070
2057 struct { 2071 struct {
@@ -2112,7 +2126,11 @@ struct ct_sns_pkt {
2112 2126
2113#define GID_PT_SNS_SCMD_LEN 6 2127#define GID_PT_SNS_SCMD_LEN 6
2114#define GID_PT_SNS_CMD_SIZE 28 2128#define GID_PT_SNS_CMD_SIZE 28
2115#define GID_PT_SNS_DATA_SIZE (MAX_FIBRE_DEVICES * 4 + 16) 2129/*
2130 * Assume MAX_FIBRE_DEVICES_2100 as these defines are only used with older
2131 * adapters.
2132 */
2133#define GID_PT_SNS_DATA_SIZE (MAX_FIBRE_DEVICES_2100 * 4 + 16)
2116 2134
2117#define GPN_ID_SNS_SCMD_LEN 6 2135#define GPN_ID_SNS_SCMD_LEN 6
2118#define GPN_ID_SNS_CMD_SIZE 28 2136#define GPN_ID_SNS_CMD_SIZE 28
@@ -2160,7 +2178,6 @@ struct gid_list_info {
2160 uint16_t loop_id; /* ISP23XX -- 6 bytes. */ 2178 uint16_t loop_id; /* ISP23XX -- 6 bytes. */
2161 uint16_t reserved_1; /* ISP24XX -- 8 bytes. */ 2179 uint16_t reserved_1; /* ISP24XX -- 8 bytes. */
2162}; 2180};
2163#define GID_LIST_SIZE (sizeof(struct gid_list_info) * MAX_FIBRE_DEVICES)
2164 2181
2165/* NPIV */ 2182/* NPIV */
2166typedef struct vport_info { 2183typedef struct vport_info {
@@ -2261,6 +2278,7 @@ struct isp_operations {
2261#define QLA_MIDX_DEFAULT 0 2278#define QLA_MIDX_DEFAULT 0
2262#define QLA_MIDX_RSP_Q 1 2279#define QLA_MIDX_RSP_Q 1
2263#define QLA_PCI_MSIX_CONTROL 0xa2 2280#define QLA_PCI_MSIX_CONTROL 0xa2
2281#define QLA_83XX_PCI_MSIX_CONTROL 0x92
2264 2282
2265struct scsi_qla_host; 2283struct scsi_qla_host;
2266 2284
@@ -2341,7 +2359,7 @@ struct qla_statistics {
2341#define QLA_MQ_SIZE 32 2359#define QLA_MQ_SIZE 32
2342#define QLA_MAX_QUEUES 256 2360#define QLA_MAX_QUEUES 256
2343#define ISP_QUE_REG(ha, id) \ 2361#define ISP_QUE_REG(ha, id) \
2344 ((ha->mqenable) ? \ 2362 ((ha->mqenable || IS_QLA83XX(ha)) ? \
2345 ((void *)(ha->mqiobase) +\ 2363 ((void *)(ha->mqiobase) +\
2346 (QLA_QUE_PAGE * id)) :\ 2364 (QLA_QUE_PAGE * id)) :\
2347 ((void *)(ha->iobase))) 2365 ((void *)(ha->iobase)))
@@ -2461,6 +2479,7 @@ struct qla_hw_data {
2461#define MIN_IOBASE_LEN 0x100 2479#define MIN_IOBASE_LEN 0x100
2462/* Multi queue data structs */ 2480/* Multi queue data structs */
2463 device_reg_t __iomem *mqiobase; 2481 device_reg_t __iomem *mqiobase;
2482 device_reg_t __iomem *msixbase;
2464 uint16_t msix_count; 2483 uint16_t msix_count;
2465 uint8_t mqenable; 2484 uint8_t mqenable;
2466 struct req_que **req_q_map; 2485 struct req_que **req_q_map;
@@ -2485,6 +2504,7 @@ struct qla_hw_data {
2485 atomic_t loop_down_timer; /* loop down timer */ 2504 atomic_t loop_down_timer; /* loop down timer */
2486 uint8_t link_down_timeout; /* link down timeout */ 2505 uint8_t link_down_timeout; /* link down timeout */
2487 uint16_t max_loop_id; 2506 uint16_t max_loop_id;
2507 uint16_t max_fibre_devices; /* Maximum number of targets */
2488 2508
2489 uint16_t fb_rev; 2509 uint16_t fb_rev;
2490 uint16_t min_external_loopid; /* First external loop Id */ 2510 uint16_t min_external_loopid; /* First external loop Id */
@@ -2494,6 +2514,7 @@ struct qla_hw_data {
2494#define PORT_SPEED_2GB 0x01 2514#define PORT_SPEED_2GB 0x01
2495#define PORT_SPEED_4GB 0x03 2515#define PORT_SPEED_4GB 0x03
2496#define PORT_SPEED_8GB 0x04 2516#define PORT_SPEED_8GB 0x04
2517#define PORT_SPEED_16GB 0x05
2497#define PORT_SPEED_10GB 0x13 2518#define PORT_SPEED_10GB 0x13
2498 uint16_t link_data_rate; /* F/W operating speed */ 2519 uint16_t link_data_rate; /* F/W operating speed */
2499 2520
@@ -2515,6 +2536,8 @@ struct qla_hw_data {
2515#define PCI_DEVICE_ID_QLOGIC_ISP2532 0x2532 2536#define PCI_DEVICE_ID_QLOGIC_ISP2532 0x2532
2516#define PCI_DEVICE_ID_QLOGIC_ISP8432 0x8432 2537#define PCI_DEVICE_ID_QLOGIC_ISP8432 0x8432
2517#define PCI_DEVICE_ID_QLOGIC_ISP8001 0x8001 2538#define PCI_DEVICE_ID_QLOGIC_ISP8001 0x8001
2539#define PCI_DEVICE_ID_QLOGIC_ISP8031 0x8031
2540#define PCI_DEVICE_ID_QLOGIC_ISP2031 0x2031
2518 uint32_t device_type; 2541 uint32_t device_type;
2519#define DT_ISP2100 BIT_0 2542#define DT_ISP2100 BIT_0
2520#define DT_ISP2200 BIT_1 2543#define DT_ISP2200 BIT_1
@@ -2531,7 +2554,9 @@ struct qla_hw_data {
2531#define DT_ISP8432 BIT_12 2554#define DT_ISP8432 BIT_12
2532#define DT_ISP8001 BIT_13 2555#define DT_ISP8001 BIT_13
2533#define DT_ISP8021 BIT_14 2556#define DT_ISP8021 BIT_14
2534#define DT_ISP_LAST (DT_ISP8021 << 1) 2557#define DT_ISP2031 BIT_15
2558#define DT_ISP8031 BIT_16
2559#define DT_ISP_LAST (DT_ISP8031 << 1)
2535 2560
2536#define DT_T10_PI BIT_25 2561#define DT_T10_PI BIT_25
2537#define DT_IIDMA BIT_26 2562#define DT_IIDMA BIT_26
@@ -2555,26 +2580,30 @@ struct qla_hw_data {
2555#define IS_QLA2532(ha) (DT_MASK(ha) & DT_ISP2532) 2580#define IS_QLA2532(ha) (DT_MASK(ha) & DT_ISP2532)
2556#define IS_QLA8432(ha) (DT_MASK(ha) & DT_ISP8432) 2581#define IS_QLA8432(ha) (DT_MASK(ha) & DT_ISP8432)
2557#define IS_QLA8001(ha) (DT_MASK(ha) & DT_ISP8001) 2582#define IS_QLA8001(ha) (DT_MASK(ha) & DT_ISP8001)
2583#define IS_QLA81XX(ha) (IS_QLA8001(ha))
2558#define IS_QLA82XX(ha) (DT_MASK(ha) & DT_ISP8021) 2584#define IS_QLA82XX(ha) (DT_MASK(ha) & DT_ISP8021)
2585#define IS_QLA2031(ha) (DT_MASK(ha) & DT_ISP2031)
2586#define IS_QLA8031(ha) (DT_MASK(ha) & DT_ISP8031)
2559 2587
2560#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \ 2588#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
2561 IS_QLA6312(ha) || IS_QLA6322(ha)) 2589 IS_QLA6312(ha) || IS_QLA6322(ha))
2562#define IS_QLA24XX(ha) (IS_QLA2422(ha) || IS_QLA2432(ha)) 2590#define IS_QLA24XX(ha) (IS_QLA2422(ha) || IS_QLA2432(ha))
2563#define IS_QLA54XX(ha) (IS_QLA5422(ha) || IS_QLA5432(ha)) 2591#define IS_QLA54XX(ha) (IS_QLA5422(ha) || IS_QLA5432(ha))
2564#define IS_QLA25XX(ha) (IS_QLA2532(ha)) 2592#define IS_QLA25XX(ha) (IS_QLA2532(ha))
2593#define IS_QLA83XX(ha) (IS_QLA2031(ha) || IS_QLA8031(ha))
2565#define IS_QLA84XX(ha) (IS_QLA8432(ha)) 2594#define IS_QLA84XX(ha) (IS_QLA8432(ha))
2566#define IS_QLA24XX_TYPE(ha) (IS_QLA24XX(ha) || IS_QLA54XX(ha) || \ 2595#define IS_QLA24XX_TYPE(ha) (IS_QLA24XX(ha) || IS_QLA54XX(ha) || \
2567 IS_QLA84XX(ha)) 2596 IS_QLA84XX(ha))
2568#define IS_QLA81XX(ha) (IS_QLA8001(ha)) 2597#define IS_CNA_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA82XX(ha) || \
2569#define IS_QLA8XXX_TYPE(ha) (IS_QLA81XX(ha) || IS_QLA82XX(ha)) 2598 IS_QLA8031(ha))
2570#define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \ 2599#define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \
2571 IS_QLA25XX(ha) || IS_QLA81XX(ha) || \ 2600 IS_QLA25XX(ha) || IS_QLA81XX(ha) || \
2572 IS_QLA82XX(ha)) 2601 IS_QLA82XX(ha) || IS_QLA83XX(ha))
2573#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha)) 2602#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha))
2574#define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \ 2603#define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha) || \
2575 (ha)->flags.msix_enabled) 2604 IS_QLA83XX(ha)) && (ha)->flags.msix_enabled)
2576#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha)) 2605#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha))
2577#define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha)) 2606#define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha))
2578#define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) 2607#define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha))
2579 2608
2580#define IS_T10_PI_CAPABLE(ha) ((ha)->device_type & DT_T10_PI) 2609#define IS_T10_PI_CAPABLE(ha) ((ha)->device_type & DT_T10_PI)
@@ -2583,6 +2612,8 @@ struct qla_hw_data {
2583#define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED) 2612#define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED)
2584#define IS_OEM_001(ha) ((ha)->device_type & DT_OEM_001) 2613#define IS_OEM_001(ha) ((ha)->device_type & DT_OEM_001)
2585#define HAS_EXTENDED_IDS(ha) ((ha)->device_type & DT_EXTENDED_IDS) 2614#define HAS_EXTENDED_IDS(ha) ((ha)->device_type & DT_EXTENDED_IDS)
2615#define IS_CT6_SUPPORTED(ha) ((ha)->device_type & DT_CT6_SUPPORTED)
2616#define IS_MQUE_CAPABLE(ha) ((ha)->mqenable || IS_QLA83XX(ha))
2586 2617
2587 /* HBA serial number */ 2618 /* HBA serial number */
2588 uint8_t serial0; 2619 uint8_t serial0;
@@ -2621,10 +2652,6 @@ struct qla_hw_data {
2621 void *sfp_data; 2652 void *sfp_data;
2622 dma_addr_t sfp_data_dma; 2653 dma_addr_t sfp_data_dma;
2623 2654
2624 uint8_t *edc_data;
2625 dma_addr_t edc_data_dma;
2626 uint16_t edc_data_len;
2627
2628#define XGMAC_DATA_SIZE 4096 2655#define XGMAC_DATA_SIZE 4096
2629 void *xgmac_data; 2656 void *xgmac_data;
2630 dma_addr_t xgmac_data_dma; 2657 dma_addr_t xgmac_data_dma;
@@ -2653,6 +2680,8 @@ struct qla_hw_data {
2653 void *async_pd; 2680 void *async_pd;
2654 dma_addr_t async_pd_dma; 2681 dma_addr_t async_pd_dma;
2655 2682
2683 void *swl;
2684
2656 /* These are used by mailbox operations. */ 2685 /* These are used by mailbox operations. */
2657 volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT]; 2686 volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
2658 2687
@@ -2674,6 +2703,8 @@ struct qla_hw_data {
2674 uint16_t fw_minor_version; 2703 uint16_t fw_minor_version;
2675 uint16_t fw_subminor_version; 2704 uint16_t fw_subminor_version;
2676 uint16_t fw_attributes; 2705 uint16_t fw_attributes;
2706 uint16_t fw_attributes_h;
2707 uint16_t fw_attributes_ext[2];
2677 uint32_t fw_memory_size; 2708 uint32_t fw_memory_size;
2678 uint32_t fw_transfer_size; 2709 uint32_t fw_transfer_size;
2679 uint32_t fw_srisc_address; 2710 uint32_t fw_srisc_address;
@@ -2851,7 +2882,6 @@ typedef struct scsi_qla_host {
2851 volatile struct { 2882 volatile struct {
2852 uint32_t init_done :1; 2883 uint32_t init_done :1;
2853 uint32_t online :1; 2884 uint32_t online :1;
2854 uint32_t rscn_queue_overflow :1;
2855 uint32_t reset_active :1; 2885 uint32_t reset_active :1;
2856 2886
2857 uint32_t management_server_logged_in :1; 2887 uint32_t management_server_logged_in :1;
@@ -2905,11 +2935,6 @@ typedef struct scsi_qla_host {
2905 2935
2906 2936
2907 2937
2908 /* RSCN queue. */
2909 uint32_t rscn_queue[MAX_RSCN_COUNT];
2910 uint8_t rscn_in_ptr;
2911 uint8_t rscn_out_ptr;
2912
2913 /* Timeout timers. */ 2938 /* Timeout timers. */
2914 uint8_t loop_down_abort_time; /* port down timer */ 2939 uint8_t loop_down_abort_time; /* port down timer */
2915 atomic_t loop_down_timer; /* loop down timer */ 2940 atomic_t loop_down_timer; /* loop down timer */
@@ -3005,7 +3030,6 @@ typedef struct scsi_qla_host {
3005#define QLA_ABORTED 0x105 3030#define QLA_ABORTED 0x105
3006#define QLA_SUSPENDED 0x106 3031#define QLA_SUSPENDED 0x106
3007#define QLA_BUSY 0x107 3032#define QLA_BUSY 0x107
3008#define QLA_RSCNS_HANDLED 0x108
3009#define QLA_ALREADY_REGISTERED 0x109 3033#define QLA_ALREADY_REGISTERED 0x109
3010 3034
3011#define NVRAM_DELAY() udelay(10) 3035#define NVRAM_DELAY() udelay(10)
@@ -3021,6 +3045,7 @@ typedef struct scsi_qla_host {
3021#define OPTROM_SIZE_25XX 0x200000 3045#define OPTROM_SIZE_25XX 0x200000
3022#define OPTROM_SIZE_81XX 0x400000 3046#define OPTROM_SIZE_81XX 0x400000
3023#define OPTROM_SIZE_82XX 0x800000 3047#define OPTROM_SIZE_82XX 0x800000
3048#define OPTROM_SIZE_83XX 0x1000000
3024 3049
3025#define OPTROM_BURST_SIZE 0x1000 3050#define OPTROM_BURST_SIZE 0x1000
3026#define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4) 3051#define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4)