diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_dbg.h')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_dbg.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h index 5f1b6d9c3dcb..2157bdf1569a 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.h +++ b/drivers/scsi/qla2xxx/qla_dbg.h | |||
@@ -165,6 +165,54 @@ struct qla81xx_fw_dump { | |||
165 | uint32_t ext_mem[1]; | 165 | uint32_t ext_mem[1]; |
166 | }; | 166 | }; |
167 | 167 | ||
168 | struct qla83xx_fw_dump { | ||
169 | uint32_t host_status; | ||
170 | uint32_t host_risc_reg[48]; | ||
171 | uint32_t pcie_regs[4]; | ||
172 | uint32_t host_reg[32]; | ||
173 | uint32_t shadow_reg[11]; | ||
174 | uint32_t risc_io_reg; | ||
175 | uint16_t mailbox_reg[32]; | ||
176 | uint32_t xseq_gp_reg[256]; | ||
177 | uint32_t xseq_0_reg[48]; | ||
178 | uint32_t xseq_1_reg[16]; | ||
179 | uint32_t xseq_2_reg[16]; | ||
180 | uint32_t rseq_gp_reg[256]; | ||
181 | uint32_t rseq_0_reg[32]; | ||
182 | uint32_t rseq_1_reg[16]; | ||
183 | uint32_t rseq_2_reg[16]; | ||
184 | uint32_t rseq_3_reg[16]; | ||
185 | uint32_t aseq_gp_reg[256]; | ||
186 | uint32_t aseq_0_reg[32]; | ||
187 | uint32_t aseq_1_reg[16]; | ||
188 | uint32_t aseq_2_reg[16]; | ||
189 | uint32_t aseq_3_reg[16]; | ||
190 | uint32_t cmd_dma_reg[64]; | ||
191 | uint32_t req0_dma_reg[15]; | ||
192 | uint32_t resp0_dma_reg[15]; | ||
193 | uint32_t req1_dma_reg[15]; | ||
194 | uint32_t xmt0_dma_reg[32]; | ||
195 | uint32_t xmt1_dma_reg[32]; | ||
196 | uint32_t xmt2_dma_reg[32]; | ||
197 | uint32_t xmt3_dma_reg[32]; | ||
198 | uint32_t xmt4_dma_reg[32]; | ||
199 | uint32_t xmt_data_dma_reg[16]; | ||
200 | uint32_t rcvt0_data_dma_reg[32]; | ||
201 | uint32_t rcvt1_data_dma_reg[32]; | ||
202 | uint32_t risc_gp_reg[128]; | ||
203 | uint32_t lmc_reg[128]; | ||
204 | uint32_t fpm_hdw_reg[256]; | ||
205 | uint32_t rq0_array_reg[256]; | ||
206 | uint32_t rq1_array_reg[256]; | ||
207 | uint32_t rp0_array_reg[256]; | ||
208 | uint32_t rp1_array_reg[256]; | ||
209 | uint32_t queue_control_reg[16]; | ||
210 | uint32_t fb_hdw_reg[432]; | ||
211 | uint32_t at0_array_reg[128]; | ||
212 | uint32_t code_ram[0x2400]; | ||
213 | uint32_t ext_mem[1]; | ||
214 | }; | ||
215 | |||
168 | #define EFT_NUM_BUFFERS 4 | 216 | #define EFT_NUM_BUFFERS 4 |
169 | #define EFT_BYTES_PER_BUFFER 0x4000 | 217 | #define EFT_BYTES_PER_BUFFER 0x4000 |
170 | #define EFT_SIZE ((EFT_BYTES_PER_BUFFER) * (EFT_NUM_BUFFERS)) | 218 | #define EFT_SIZE ((EFT_BYTES_PER_BUFFER) * (EFT_NUM_BUFFERS)) |
@@ -192,9 +240,23 @@ struct qla2xxx_mq_chain { | |||
192 | uint32_t qregs[4 * QLA_MQ_SIZE]; | 240 | uint32_t qregs[4 * QLA_MQ_SIZE]; |
193 | }; | 241 | }; |
194 | 242 | ||
243 | struct qla2xxx_mqueue_header { | ||
244 | uint32_t queue; | ||
245 | #define TYPE_REQUEST_QUEUE 0x1 | ||
246 | #define TYPE_RESPONSE_QUEUE 0x2 | ||
247 | uint32_t number; | ||
248 | uint32_t size; | ||
249 | }; | ||
250 | |||
251 | struct qla2xxx_mqueue_chain { | ||
252 | uint32_t type; | ||
253 | uint32_t chain_size; | ||
254 | }; | ||
255 | |||
195 | #define DUMP_CHAIN_VARIANT 0x80000000 | 256 | #define DUMP_CHAIN_VARIANT 0x80000000 |
196 | #define DUMP_CHAIN_FCE 0x7FFFFAF0 | 257 | #define DUMP_CHAIN_FCE 0x7FFFFAF0 |
197 | #define DUMP_CHAIN_MQ 0x7FFFFAF1 | 258 | #define DUMP_CHAIN_MQ 0x7FFFFAF1 |
259 | #define DUMP_CHAIN_QUEUE 0x7FFFFAF2 | ||
198 | #define DUMP_CHAIN_LAST 0x80000000 | 260 | #define DUMP_CHAIN_LAST 0x80000000 |
199 | 261 | ||
200 | struct qla2xxx_fw_dump { | 262 | struct qla2xxx_fw_dump { |
@@ -228,6 +290,7 @@ struct qla2xxx_fw_dump { | |||
228 | struct qla24xx_fw_dump isp24; | 290 | struct qla24xx_fw_dump isp24; |
229 | struct qla25xx_fw_dump isp25; | 291 | struct qla25xx_fw_dump isp25; |
230 | struct qla81xx_fw_dump isp81; | 292 | struct qla81xx_fw_dump isp81; |
293 | struct qla83xx_fw_dump isp83; | ||
231 | } isp; | 294 | } isp; |
232 | }; | 295 | }; |
233 | 296 | ||