diff options
Diffstat (limited to 'drivers/scsi/qla1280.c')
-rw-r--r-- | drivers/scsi/qla1280.c | 359 |
1 files changed, 141 insertions, 218 deletions
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index b993652bfa25..637fb6565d28 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c | |||
@@ -996,7 +996,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action) | |||
996 | break; | 996 | break; |
997 | 997 | ||
998 | case ABORT_DEVICE: | 998 | case ABORT_DEVICE: |
999 | ha->flags.in_reset = 1; | ||
1000 | if (qla1280_verbose) | 999 | if (qla1280_verbose) |
1001 | printk(KERN_INFO | 1000 | printk(KERN_INFO |
1002 | "scsi(%ld:%d:%d:%d): Queueing abort device " | 1001 | "scsi(%ld:%d:%d:%d): Queueing abort device " |
@@ -1010,7 +1009,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action) | |||
1010 | printk(KERN_INFO | 1009 | printk(KERN_INFO |
1011 | "scsi(%ld:%d:%d:%d): Queueing device reset " | 1010 | "scsi(%ld:%d:%d:%d): Queueing device reset " |
1012 | "command.\n", ha->host_no, bus, target, lun); | 1011 | "command.\n", ha->host_no, bus, target, lun); |
1013 | ha->flags.in_reset = 1; | ||
1014 | if (qla1280_device_reset(ha, bus, target) == 0) | 1012 | if (qla1280_device_reset(ha, bus, target) == 0) |
1015 | result = SUCCESS; | 1013 | result = SUCCESS; |
1016 | break; | 1014 | break; |
@@ -1019,7 +1017,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action) | |||
1019 | if (qla1280_verbose) | 1017 | if (qla1280_verbose) |
1020 | printk(KERN_INFO "qla1280(%ld:%d): Issuing BUS " | 1018 | printk(KERN_INFO "qla1280(%ld:%d): Issuing BUS " |
1021 | "DEVICE RESET\n", ha->host_no, bus); | 1019 | "DEVICE RESET\n", ha->host_no, bus); |
1022 | ha->flags.in_reset = 1; | ||
1023 | if (qla1280_bus_reset(ha, bus == 0)) | 1020 | if (qla1280_bus_reset(ha, bus == 0)) |
1024 | result = SUCCESS; | 1021 | result = SUCCESS; |
1025 | 1022 | ||
@@ -1047,7 +1044,6 @@ qla1280_error_action(struct scsi_cmnd *cmd, enum action action) | |||
1047 | 1044 | ||
1048 | if (!list_empty(&ha->done_q)) | 1045 | if (!list_empty(&ha->done_q)) |
1049 | qla1280_done(ha); | 1046 | qla1280_done(ha); |
1050 | ha->flags.in_reset = 0; | ||
1051 | 1047 | ||
1052 | /* If we didn't manage to issue the action, or we have no | 1048 | /* If we didn't manage to issue the action, or we have no |
1053 | * command to wait for, exit here */ | 1049 | * command to wait for, exit here */ |
@@ -1269,6 +1265,22 @@ qla1280_biosparam_old(Disk * disk, kdev_t dev, int geom[]) | |||
1269 | return qla1280_biosparam(disk->device, NULL, disk->capacity, geom); | 1265 | return qla1280_biosparam(disk->device, NULL, disk->capacity, geom); |
1270 | } | 1266 | } |
1271 | #endif | 1267 | #endif |
1268 | |||
1269 | /* disable risc and host interrupts */ | ||
1270 | static inline void | ||
1271 | qla1280_disable_intrs(struct scsi_qla_host *ha) | ||
1272 | { | ||
1273 | WRT_REG_WORD(&ha->iobase->ictrl, 0); | ||
1274 | RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ | ||
1275 | } | ||
1276 | |||
1277 | /* enable risc and host interrupts */ | ||
1278 | static inline void | ||
1279 | qla1280_enable_intrs(struct scsi_qla_host *ha) | ||
1280 | { | ||
1281 | WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC)); | ||
1282 | RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ | ||
1283 | } | ||
1272 | 1284 | ||
1273 | /************************************************************************** | 1285 | /************************************************************************** |
1274 | * qla1280_intr_handler | 1286 | * qla1280_intr_handler |
@@ -1290,7 +1302,7 @@ qla1280_intr_handler(int irq, void *dev_id, struct pt_regs *regs) | |||
1290 | ha->isr_count++; | 1302 | ha->isr_count++; |
1291 | reg = ha->iobase; | 1303 | reg = ha->iobase; |
1292 | 1304 | ||
1293 | WRT_REG_WORD(®->ictrl, 0); /* disable our interrupt. */ | 1305 | qla1280_disable_intrs(ha); |
1294 | 1306 | ||
1295 | data = qla1280_debounce_register(®->istatus); | 1307 | data = qla1280_debounce_register(®->istatus); |
1296 | /* Check for pending interrupts. */ | 1308 | /* Check for pending interrupts. */ |
@@ -1303,8 +1315,7 @@ qla1280_intr_handler(int irq, void *dev_id, struct pt_regs *regs) | |||
1303 | 1315 | ||
1304 | spin_unlock(HOST_LOCK); | 1316 | spin_unlock(HOST_LOCK); |
1305 | 1317 | ||
1306 | /* enable our interrupt. */ | 1318 | qla1280_enable_intrs(ha); |
1307 | WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC)); | ||
1308 | 1319 | ||
1309 | LEAVE_INTR("qla1280_intr_handler"); | 1320 | LEAVE_INTR("qla1280_intr_handler"); |
1310 | return IRQ_RETVAL(handled); | 1321 | return IRQ_RETVAL(handled); |
@@ -1317,7 +1328,7 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target) | |||
1317 | uint8_t mr; | 1328 | uint8_t mr; |
1318 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 1329 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
1319 | struct nvram *nv; | 1330 | struct nvram *nv; |
1320 | int status; | 1331 | int status, lun; |
1321 | 1332 | ||
1322 | nv = &ha->nvram; | 1333 | nv = &ha->nvram; |
1323 | 1334 | ||
@@ -1325,24 +1336,38 @@ qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target) | |||
1325 | 1336 | ||
1326 | /* Set Target Parameters. */ | 1337 | /* Set Target Parameters. */ |
1327 | mb[0] = MBC_SET_TARGET_PARAMETERS; | 1338 | mb[0] = MBC_SET_TARGET_PARAMETERS; |
1328 | mb[1] = (uint16_t) (bus ? target | BIT_7 : target); | 1339 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
1329 | mb[1] <<= 8; | 1340 | mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8; |
1330 | 1341 | mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9; | |
1331 | mb[2] = (nv->bus[bus].target[target].parameter.c << 8); | 1342 | mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10; |
1343 | mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11; | ||
1344 | mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12; | ||
1345 | mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13; | ||
1346 | mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14; | ||
1347 | mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15; | ||
1332 | 1348 | ||
1333 | if (IS_ISP1x160(ha)) { | 1349 | if (IS_ISP1x160(ha)) { |
1334 | mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5; | 1350 | mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5; |
1335 | mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8) | | 1351 | mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8); |
1336 | nv->bus[bus].target[target].sync_period; | ||
1337 | mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) | | 1352 | mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) | |
1338 | nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width; | 1353 | nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width; |
1339 | mr |= BIT_6; | 1354 | mr |= BIT_6; |
1340 | } else { | 1355 | } else { |
1341 | mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8) | | 1356 | mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8); |
1342 | nv->bus[bus].target[target].sync_period; | ||
1343 | } | 1357 | } |
1358 | mb[3] |= nv->bus[bus].target[target].sync_period; | ||
1344 | 1359 | ||
1345 | status = qla1280_mailbox_command(ha, mr, &mb[0]); | 1360 | status = qla1280_mailbox_command(ha, mr, mb); |
1361 | |||
1362 | /* Set Device Queue Parameters. */ | ||
1363 | for (lun = 0; lun < MAX_LUNS; lun++) { | ||
1364 | mb[0] = MBC_SET_DEVICE_QUEUE; | ||
1365 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); | ||
1366 | mb[1] |= lun; | ||
1367 | mb[2] = nv->bus[bus].max_queue_depth; | ||
1368 | mb[3] = nv->bus[bus].target[target].execution_throttle; | ||
1369 | status |= qla1280_mailbox_command(ha, 0x0f, mb); | ||
1370 | } | ||
1346 | 1371 | ||
1347 | if (status) | 1372 | if (status) |
1348 | printk(KERN_WARNING "scsi(%ld:%i:%i): " | 1373 | printk(KERN_WARNING "scsi(%ld:%i:%i): " |
@@ -1389,19 +1414,19 @@ qla1280_slave_configure(struct scsi_device *device) | |||
1389 | } | 1414 | } |
1390 | 1415 | ||
1391 | #if LINUX_VERSION_CODE > 0x020500 | 1416 | #if LINUX_VERSION_CODE > 0x020500 |
1392 | nv->bus[bus].target[target].parameter.f.enable_sync = device->sdtr; | 1417 | nv->bus[bus].target[target].parameter.enable_sync = device->sdtr; |
1393 | nv->bus[bus].target[target].parameter.f.enable_wide = device->wdtr; | 1418 | nv->bus[bus].target[target].parameter.enable_wide = device->wdtr; |
1394 | nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr; | 1419 | nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr; |
1395 | #endif | 1420 | #endif |
1396 | 1421 | ||
1397 | if (driver_setup.no_sync || | 1422 | if (driver_setup.no_sync || |
1398 | (driver_setup.sync_mask && | 1423 | (driver_setup.sync_mask && |
1399 | (~driver_setup.sync_mask & (1 << target)))) | 1424 | (~driver_setup.sync_mask & (1 << target)))) |
1400 | nv->bus[bus].target[target].parameter.f.enable_sync = 0; | 1425 | nv->bus[bus].target[target].parameter.enable_sync = 0; |
1401 | if (driver_setup.no_wide || | 1426 | if (driver_setup.no_wide || |
1402 | (driver_setup.wide_mask && | 1427 | (driver_setup.wide_mask && |
1403 | (~driver_setup.wide_mask & (1 << target)))) | 1428 | (~driver_setup.wide_mask & (1 << target)))) |
1404 | nv->bus[bus].target[target].parameter.f.enable_wide = 0; | 1429 | nv->bus[bus].target[target].parameter.enable_wide = 0; |
1405 | if (IS_ISP1x160(ha)) { | 1430 | if (IS_ISP1x160(ha)) { |
1406 | if (driver_setup.no_ppr || | 1431 | if (driver_setup.no_ppr || |
1407 | (driver_setup.ppr_mask && | 1432 | (driver_setup.ppr_mask && |
@@ -1410,7 +1435,7 @@ qla1280_slave_configure(struct scsi_device *device) | |||
1410 | } | 1435 | } |
1411 | 1436 | ||
1412 | spin_lock_irqsave(HOST_LOCK, flags); | 1437 | spin_lock_irqsave(HOST_LOCK, flags); |
1413 | if (nv->bus[bus].target[target].parameter.f.enable_sync) | 1438 | if (nv->bus[bus].target[target].parameter.enable_sync) |
1414 | status = qla1280_set_target_parameters(ha, bus, target); | 1439 | status = qla1280_set_target_parameters(ha, bus, target); |
1415 | qla1280_get_target_parameters(ha, device); | 1440 | qla1280_get_target_parameters(ha, device); |
1416 | spin_unlock_irqrestore(HOST_LOCK, flags); | 1441 | spin_unlock_irqrestore(HOST_LOCK, flags); |
@@ -1448,7 +1473,6 @@ qla1280_select_queue_depth(struct Scsi_Host *host, struct scsi_device *sdev_q) | |||
1448 | * | 1473 | * |
1449 | * Input: | 1474 | * Input: |
1450 | * ha = adapter block pointer. | 1475 | * ha = adapter block pointer. |
1451 | * done_q = done queue. | ||
1452 | */ | 1476 | */ |
1453 | static void | 1477 | static void |
1454 | qla1280_done(struct scsi_qla_host *ha) | 1478 | qla1280_done(struct scsi_qla_host *ha) |
@@ -1522,7 +1546,7 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp) | |||
1522 | int host_status = DID_ERROR; | 1546 | int host_status = DID_ERROR; |
1523 | uint16_t comp_status = le16_to_cpu(sts->comp_status); | 1547 | uint16_t comp_status = le16_to_cpu(sts->comp_status); |
1524 | uint16_t state_flags = le16_to_cpu(sts->state_flags); | 1548 | uint16_t state_flags = le16_to_cpu(sts->state_flags); |
1525 | uint16_t residual_length = le16_to_cpu(sts->residual_length); | 1549 | uint16_t residual_length = le32_to_cpu(sts->residual_length); |
1526 | uint16_t scsi_status = le16_to_cpu(sts->scsi_status); | 1550 | uint16_t scsi_status = le16_to_cpu(sts->scsi_status); |
1527 | #if DEBUG_QLA1280_INTR | 1551 | #if DEBUG_QLA1280_INTR |
1528 | static char *reason[] = { | 1552 | static char *reason[] = { |
@@ -1582,7 +1606,7 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp) | |||
1582 | 1606 | ||
1583 | case CS_DATA_OVERRUN: | 1607 | case CS_DATA_OVERRUN: |
1584 | dprintk(2, "Data overrun 0x%x\n", residual_length); | 1608 | dprintk(2, "Data overrun 0x%x\n", residual_length); |
1585 | dprintk(2, "qla1280_isr: response packet data\n"); | 1609 | dprintk(2, "qla1280_return_status: response packet data\n"); |
1586 | qla1280_dump_buffer(2, (char *)sts, RESPONSE_ENTRY_SIZE); | 1610 | qla1280_dump_buffer(2, (char *)sts, RESPONSE_ENTRY_SIZE); |
1587 | host_status = DID_ERROR; | 1611 | host_status = DID_ERROR; |
1588 | break; | 1612 | break; |
@@ -1617,40 +1641,6 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp) | |||
1617 | /* QLogic ISP1280 Hardware Support Functions. */ | 1641 | /* QLogic ISP1280 Hardware Support Functions. */ |
1618 | /****************************************************************************/ | 1642 | /****************************************************************************/ |
1619 | 1643 | ||
1620 | /* | ||
1621 | * qla2100_enable_intrs | ||
1622 | * qla2100_disable_intrs | ||
1623 | * | ||
1624 | * Input: | ||
1625 | * ha = adapter block pointer. | ||
1626 | * | ||
1627 | * Returns: | ||
1628 | * None | ||
1629 | */ | ||
1630 | static inline void | ||
1631 | qla1280_enable_intrs(struct scsi_qla_host *ha) | ||
1632 | { | ||
1633 | struct device_reg __iomem *reg; | ||
1634 | |||
1635 | reg = ha->iobase; | ||
1636 | /* enable risc and host interrupts */ | ||
1637 | WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC)); | ||
1638 | RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ | ||
1639 | ha->flags.ints_enabled = 1; | ||
1640 | } | ||
1641 | |||
1642 | static inline void | ||
1643 | qla1280_disable_intrs(struct scsi_qla_host *ha) | ||
1644 | { | ||
1645 | struct device_reg __iomem *reg; | ||
1646 | |||
1647 | reg = ha->iobase; | ||
1648 | /* disable risc and host interrupts */ | ||
1649 | WRT_REG_WORD(®->ictrl, 0); | ||
1650 | RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ | ||
1651 | ha->flags.ints_enabled = 0; | ||
1652 | } | ||
1653 | |||
1654 | /* | 1644 | /* |
1655 | * qla1280_initialize_adapter | 1645 | * qla1280_initialize_adapter |
1656 | * Initialize board. | 1646 | * Initialize board. |
@@ -1679,7 +1669,6 @@ qla1280_initialize_adapter(struct scsi_qla_host *ha) | |||
1679 | ha->flags.reset_active = 0; | 1669 | ha->flags.reset_active = 0; |
1680 | ha->flags.abort_isp_active = 0; | 1670 | ha->flags.abort_isp_active = 0; |
1681 | 1671 | ||
1682 | ha->flags.ints_enabled = 0; | ||
1683 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | 1672 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) |
1684 | if (ia64_platform_is("sn2")) { | 1673 | if (ia64_platform_is("sn2")) { |
1685 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " | 1674 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " |
@@ -1758,69 +1747,6 @@ qla1280_initialize_adapter(struct scsi_qla_host *ha) | |||
1758 | return status; | 1747 | return status; |
1759 | } | 1748 | } |
1760 | 1749 | ||
1761 | |||
1762 | /* | ||
1763 | * ISP Firmware Test | ||
1764 | * Checks if present version of RISC firmware is older than | ||
1765 | * driver firmware. | ||
1766 | * | ||
1767 | * Input: | ||
1768 | * ha = adapter block pointer. | ||
1769 | * | ||
1770 | * Returns: | ||
1771 | * 0 = firmware does not need to be loaded. | ||
1772 | */ | ||
1773 | static int | ||
1774 | qla1280_isp_firmware(struct scsi_qla_host *ha) | ||
1775 | { | ||
1776 | struct nvram *nv = (struct nvram *) ha->response_ring; | ||
1777 | int status = 0; /* dg 2/27 always loads RISC */ | ||
1778 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | ||
1779 | |||
1780 | ENTER("qla1280_isp_firmware"); | ||
1781 | |||
1782 | dprintk(1, "scsi(%li): Determining if RISC is loaded\n", ha->host_no); | ||
1783 | |||
1784 | /* Bad NVRAM data, load RISC code. */ | ||
1785 | if (!ha->nvram_valid) { | ||
1786 | ha->flags.disable_risc_code_load = 0; | ||
1787 | } else | ||
1788 | ha->flags.disable_risc_code_load = | ||
1789 | nv->cntr_flags_1.disable_loading_risc_code; | ||
1790 | |||
1791 | if (ha->flags.disable_risc_code_load) { | ||
1792 | dprintk(3, "qla1280_isp_firmware: Telling RISC to verify " | ||
1793 | "checksum of loaded BIOS code.\n"); | ||
1794 | |||
1795 | /* Verify checksum of loaded RISC code. */ | ||
1796 | mb[0] = MBC_VERIFY_CHECKSUM; | ||
1797 | /* mb[1] = ql12_risc_code_addr01; */ | ||
1798 | mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; | ||
1799 | |||
1800 | if (!(status = | ||
1801 | qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) { | ||
1802 | /* Start firmware execution. */ | ||
1803 | dprintk(3, "qla1280_isp_firmware: Startng F/W " | ||
1804 | "execution.\n"); | ||
1805 | |||
1806 | mb[0] = MBC_EXECUTE_FIRMWARE; | ||
1807 | /* mb[1] = ql12_risc_code_addr01; */ | ||
1808 | mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; | ||
1809 | qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); | ||
1810 | } else | ||
1811 | printk(KERN_INFO "qla1280: RISC checksum failed.\n"); | ||
1812 | } else { | ||
1813 | dprintk(1, "qla1280: NVRAM configured to load RISC load.\n"); | ||
1814 | status = 1; | ||
1815 | } | ||
1816 | |||
1817 | if (status) | ||
1818 | dprintk(2, "qla1280_isp_firmware: **** Load RISC code ****\n"); | ||
1819 | |||
1820 | LEAVE("qla1280_isp_firmware"); | ||
1821 | return status; | ||
1822 | } | ||
1823 | |||
1824 | /* | 1750 | /* |
1825 | * Chip diagnostics | 1751 | * Chip diagnostics |
1826 | * Test chip for proper operation. | 1752 | * Test chip for proper operation. |
@@ -2006,7 +1932,7 @@ qla1280_load_firmware_dma(struct scsi_qla_host *ha) | |||
2006 | "%d,%d(0x%x)\n", | 1932 | "%d,%d(0x%x)\n", |
2007 | risc_code_address, cnt, num, risc_address); | 1933 | risc_code_address, cnt, num, risc_address); |
2008 | for(i = 0; i < cnt; i++) | 1934 | for(i = 0; i < cnt; i++) |
2009 | ((uint16_t *)ha->request_ring)[i] = | 1935 | ((__le16 *)ha->request_ring)[i] = |
2010 | cpu_to_le16(risc_code_address[i]); | 1936 | cpu_to_le16(risc_code_address[i]); |
2011 | 1937 | ||
2012 | mb[0] = MBC_LOAD_RAM; | 1938 | mb[0] = MBC_LOAD_RAM; |
@@ -2085,7 +2011,7 @@ qla1280_start_firmware(struct scsi_qla_host *ha) | |||
2085 | mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; | 2011 | mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; |
2086 | err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); | 2012 | err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2087 | if (err) { | 2013 | if (err) { |
2088 | printk(KERN_ERR "scsi(%li): Failed checksum\n", ha->host_no); | 2014 | printk(KERN_ERR "scsi(%li): RISC checksum failed.\n", ha->host_no); |
2089 | return err; | 2015 | return err; |
2090 | } | 2016 | } |
2091 | 2017 | ||
@@ -2105,14 +2031,7 @@ qla1280_start_firmware(struct scsi_qla_host *ha) | |||
2105 | static int | 2031 | static int |
2106 | qla1280_load_firmware(struct scsi_qla_host *ha) | 2032 | qla1280_load_firmware(struct scsi_qla_host *ha) |
2107 | { | 2033 | { |
2108 | int err = -ENODEV; | 2034 | int err; |
2109 | |||
2110 | /* If firmware needs to be loaded */ | ||
2111 | if (!qla1280_isp_firmware(ha)) { | ||
2112 | printk(KERN_ERR "scsi(%li): isp_firmware() failed!\n", | ||
2113 | ha->host_no); | ||
2114 | goto out; | ||
2115 | } | ||
2116 | 2035 | ||
2117 | err = qla1280_chip_diag(ha); | 2036 | err = qla1280_chip_diag(ha); |
2118 | if (err) | 2037 | if (err) |
@@ -2246,17 +2165,17 @@ qla1280_set_target_defaults(struct scsi_qla_host *ha, int bus, int target) | |||
2246 | { | 2165 | { |
2247 | struct nvram *nv = &ha->nvram; | 2166 | struct nvram *nv = &ha->nvram; |
2248 | 2167 | ||
2249 | nv->bus[bus].target[target].parameter.f.renegotiate_on_error = 1; | 2168 | nv->bus[bus].target[target].parameter.renegotiate_on_error = 1; |
2250 | nv->bus[bus].target[target].parameter.f.auto_request_sense = 1; | 2169 | nv->bus[bus].target[target].parameter.auto_request_sense = 1; |
2251 | nv->bus[bus].target[target].parameter.f.tag_queuing = 1; | 2170 | nv->bus[bus].target[target].parameter.tag_queuing = 1; |
2252 | nv->bus[bus].target[target].parameter.f.enable_sync = 1; | 2171 | nv->bus[bus].target[target].parameter.enable_sync = 1; |
2253 | #if 1 /* Some SCSI Processors do not seem to like this */ | 2172 | #if 1 /* Some SCSI Processors do not seem to like this */ |
2254 | nv->bus[bus].target[target].parameter.f.enable_wide = 1; | 2173 | nv->bus[bus].target[target].parameter.enable_wide = 1; |
2255 | #endif | 2174 | #endif |
2256 | nv->bus[bus].target[target].parameter.f.parity_checking = 1; | ||
2257 | nv->bus[bus].target[target].parameter.f.disconnect_allowed = 1; | ||
2258 | nv->bus[bus].target[target].execution_throttle = | 2175 | nv->bus[bus].target[target].execution_throttle = |
2259 | nv->bus[bus].max_queue_depth - 1; | 2176 | nv->bus[bus].max_queue_depth - 1; |
2177 | nv->bus[bus].target[target].parameter.parity_checking = 1; | ||
2178 | nv->bus[bus].target[target].parameter.disconnect_allowed = 1; | ||
2260 | 2179 | ||
2261 | if (IS_ISP1x160(ha)) { | 2180 | if (IS_ISP1x160(ha)) { |
2262 | nv->bus[bus].target[target].flags.flags1x160.device_enable = 1; | 2181 | nv->bus[bus].target[target].flags.flags1x160.device_enable = 1; |
@@ -2284,9 +2203,9 @@ qla1280_set_defaults(struct scsi_qla_host *ha) | |||
2284 | /* nv->cntr_flags_1.disable_loading_risc_code = 1; */ | 2203 | /* nv->cntr_flags_1.disable_loading_risc_code = 1; */ |
2285 | nv->firmware_feature.f.enable_fast_posting = 1; | 2204 | nv->firmware_feature.f.enable_fast_posting = 1; |
2286 | nv->firmware_feature.f.disable_synchronous_backoff = 1; | 2205 | nv->firmware_feature.f.disable_synchronous_backoff = 1; |
2287 | nv->termination.f.scsi_bus_0_control = 3; | 2206 | nv->termination.scsi_bus_0_control = 3; |
2288 | nv->termination.f.scsi_bus_1_control = 3; | 2207 | nv->termination.scsi_bus_1_control = 3; |
2289 | nv->termination.f.auto_term_support = 1; | 2208 | nv->termination.auto_term_support = 1; |
2290 | 2209 | ||
2291 | /* | 2210 | /* |
2292 | * Set default FIFO magic - What appropriate values would be here | 2211 | * Set default FIFO magic - What appropriate values would be here |
@@ -2296,7 +2215,12 @@ qla1280_set_defaults(struct scsi_qla_host *ha) | |||
2296 | * header file provided by QLogic seems to be bogus or incomplete | 2215 | * header file provided by QLogic seems to be bogus or incomplete |
2297 | * at best. | 2216 | * at best. |
2298 | */ | 2217 | */ |
2299 | nv->isp_config.c = ISP_CFG1_BENAB|ISP_CFG1_F128; | 2218 | nv->isp_config.burst_enable = 1; |
2219 | if (IS_ISP1040(ha)) | ||
2220 | nv->isp_config.fifo_threshold |= 3; | ||
2221 | else | ||
2222 | nv->isp_config.fifo_threshold |= 4; | ||
2223 | |||
2300 | if (IS_ISP1x160(ha)) | 2224 | if (IS_ISP1x160(ha)) |
2301 | nv->isp_parameter = 0x01; /* fast memory enable */ | 2225 | nv->isp_parameter = 0x01; /* fast memory enable */ |
2302 | 2226 | ||
@@ -2327,66 +2251,53 @@ qla1280_config_target(struct scsi_qla_host *ha, int bus, int target) | |||
2327 | struct nvram *nv = &ha->nvram; | 2251 | struct nvram *nv = &ha->nvram; |
2328 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 2252 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
2329 | int status, lun; | 2253 | int status, lun; |
2254 | uint16_t flag; | ||
2330 | 2255 | ||
2331 | /* Set Target Parameters. */ | 2256 | /* Set Target Parameters. */ |
2332 | mb[0] = MBC_SET_TARGET_PARAMETERS; | 2257 | mb[0] = MBC_SET_TARGET_PARAMETERS; |
2333 | mb[1] = (uint16_t) (bus ? target | BIT_7 : target); | 2258 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
2334 | mb[1] <<= 8; | ||
2335 | |||
2336 | /* | ||
2337 | * Do not enable wide, sync, and ppr for the initial | ||
2338 | * INQUIRY run. We enable this later if we determine | ||
2339 | * the target actually supports it. | ||
2340 | */ | ||
2341 | nv->bus[bus].target[target].parameter.f. | ||
2342 | auto_request_sense = 1; | ||
2343 | nv->bus[bus].target[target].parameter.f. | ||
2344 | stop_queue_on_check = 0; | ||
2345 | |||
2346 | if (IS_ISP1x160(ha)) | ||
2347 | nv->bus[bus].target[target].ppr_1x160. | ||
2348 | flags.enable_ppr = 0; | ||
2349 | 2259 | ||
2350 | /* | 2260 | /* |
2351 | * No sync, wide, etc. while probing | 2261 | * Do not enable sync and ppr for the initial INQUIRY run. We |
2262 | * enable this later if we determine the target actually | ||
2263 | * supports it. | ||
2352 | */ | 2264 | */ |
2353 | mb[2] = (nv->bus[bus].target[target].parameter.c << 8) & | 2265 | mb[2] = (TP_RENEGOTIATE | TP_AUTO_REQUEST_SENSE | TP_TAGGED_QUEUE |
2354 | ~(TP_SYNC /*| TP_WIDE | TP_PPR*/); | 2266 | | TP_WIDE | TP_PARITY | TP_DISCONNECT); |
2355 | 2267 | ||
2356 | if (IS_ISP1x160(ha)) | 2268 | if (IS_ISP1x160(ha)) |
2357 | mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8; | 2269 | mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8; |
2358 | else | 2270 | else |
2359 | mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8; | 2271 | mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8; |
2360 | mb[3] |= nv->bus[bus].target[target].sync_period; | 2272 | mb[3] |= nv->bus[bus].target[target].sync_period; |
2361 | 2273 | status = qla1280_mailbox_command(ha, 0x0f, mb); | |
2362 | status = qla1280_mailbox_command(ha, BIT_3 | BIT_2 | BIT_1 | BIT_0, &mb[0]); | ||
2363 | 2274 | ||
2364 | /* Save Tag queuing enable flag. */ | 2275 | /* Save Tag queuing enable flag. */ |
2365 | mb[0] = BIT_0 << target; | 2276 | flag = (BIT_0 << target) & mb[0]; |
2366 | if (nv->bus[bus].target[target].parameter.f.tag_queuing) | 2277 | if (nv->bus[bus].target[target].parameter.tag_queuing) |
2367 | ha->bus_settings[bus].qtag_enables |= mb[0]; | 2278 | ha->bus_settings[bus].qtag_enables |= flag; |
2368 | 2279 | ||
2369 | /* Save Device enable flag. */ | 2280 | /* Save Device enable flag. */ |
2370 | if (IS_ISP1x160(ha)) { | 2281 | if (IS_ISP1x160(ha)) { |
2371 | if (nv->bus[bus].target[target].flags.flags1x160.device_enable) | 2282 | if (nv->bus[bus].target[target].flags.flags1x160.device_enable) |
2372 | ha->bus_settings[bus].device_enables |= mb[0]; | 2283 | ha->bus_settings[bus].device_enables |= flag; |
2373 | ha->bus_settings[bus].lun_disables |= 0; | 2284 | ha->bus_settings[bus].lun_disables |= 0; |
2374 | } else { | 2285 | } else { |
2375 | if (nv->bus[bus].target[target].flags.flags1x80.device_enable) | 2286 | if (nv->bus[bus].target[target].flags.flags1x80.device_enable) |
2376 | ha->bus_settings[bus].device_enables |= mb[0]; | 2287 | ha->bus_settings[bus].device_enables |= flag; |
2377 | /* Save LUN disable flag. */ | 2288 | /* Save LUN disable flag. */ |
2378 | if (nv->bus[bus].target[target].flags.flags1x80.lun_disable) | 2289 | if (nv->bus[bus].target[target].flags.flags1x80.lun_disable) |
2379 | ha->bus_settings[bus].lun_disables |= mb[0]; | 2290 | ha->bus_settings[bus].lun_disables |= flag; |
2380 | } | 2291 | } |
2381 | 2292 | ||
2382 | /* Set Device Queue Parameters. */ | 2293 | /* Set Device Queue Parameters. */ |
2383 | for (lun = 0; lun < MAX_LUNS; lun++) { | 2294 | for (lun = 0; lun < MAX_LUNS; lun++) { |
2384 | mb[0] = MBC_SET_DEVICE_QUEUE; | 2295 | mb[0] = MBC_SET_DEVICE_QUEUE; |
2385 | mb[1] = (uint16_t)(bus ? target | BIT_7 : target); | 2296 | mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); |
2386 | mb[1] = mb[1] << 8 | lun; | 2297 | mb[1] |= lun; |
2387 | mb[2] = nv->bus[bus].max_queue_depth; | 2298 | mb[2] = nv->bus[bus].max_queue_depth; |
2388 | mb[3] = nv->bus[bus].target[target].execution_throttle; | 2299 | mb[3] = nv->bus[bus].target[target].execution_throttle; |
2389 | status |= qla1280_mailbox_command(ha, 0x0f, &mb[0]); | 2300 | status |= qla1280_mailbox_command(ha, 0x0f, mb); |
2390 | } | 2301 | } |
2391 | 2302 | ||
2392 | return status; | 2303 | return status; |
@@ -2431,7 +2342,6 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2431 | struct nvram *nv = &ha->nvram; | 2342 | struct nvram *nv = &ha->nvram; |
2432 | int bus, target, status = 0; | 2343 | int bus, target, status = 0; |
2433 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | 2344 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
2434 | uint16_t mask; | ||
2435 | 2345 | ||
2436 | ENTER("qla1280_nvram_config"); | 2346 | ENTER("qla1280_nvram_config"); |
2437 | 2347 | ||
@@ -2439,7 +2349,7 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2439 | /* Always force AUTO sense for LINUX SCSI */ | 2349 | /* Always force AUTO sense for LINUX SCSI */ |
2440 | for (bus = 0; bus < MAX_BUSES; bus++) | 2350 | for (bus = 0; bus < MAX_BUSES; bus++) |
2441 | for (target = 0; target < MAX_TARGETS; target++) { | 2351 | for (target = 0; target < MAX_TARGETS; target++) { |
2442 | nv->bus[bus].target[target].parameter.f. | 2352 | nv->bus[bus].target[target].parameter. |
2443 | auto_request_sense = 1; | 2353 | auto_request_sense = 1; |
2444 | } | 2354 | } |
2445 | } else { | 2355 | } else { |
@@ -2457,31 +2367,40 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2457 | 2367 | ||
2458 | hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK; | 2368 | hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK; |
2459 | 2369 | ||
2460 | cfg1 = RD_REG_WORD(®->cfg_1); | 2370 | cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); |
2461 | cdma_conf = RD_REG_WORD(®->cdma_cfg); | 2371 | cdma_conf = RD_REG_WORD(®->cdma_cfg); |
2462 | ddma_conf = RD_REG_WORD(®->ddma_cfg); | 2372 | ddma_conf = RD_REG_WORD(®->ddma_cfg); |
2463 | 2373 | ||
2464 | /* Busted fifo, says mjacob. */ | 2374 | /* Busted fifo, says mjacob. */ |
2465 | if (hwrev == ISP_CFG0_1040A) | 2375 | if (hwrev != ISP_CFG0_1040A) |
2466 | WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64); | 2376 | cfg1 |= nv->isp_config.fifo_threshold << 4; |
2467 | else | 2377 | |
2468 | WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64 | ISP_CFG1_BENAB); | 2378 | cfg1 |= nv->isp_config.burst_enable << 2; |
2379 | WRT_REG_WORD(®->cfg_1, cfg1); | ||
2469 | 2380 | ||
2470 | WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB); | 2381 | WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB); |
2471 | WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB); | 2382 | WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB); |
2472 | } else { | 2383 | } else { |
2384 | uint16_t cfg1, term; | ||
2385 | |||
2473 | /* Set ISP hardware DMA burst */ | 2386 | /* Set ISP hardware DMA burst */ |
2474 | mb[0] = nv->isp_config.c; | 2387 | cfg1 = nv->isp_config.fifo_threshold << 4; |
2388 | cfg1 |= nv->isp_config.burst_enable << 2; | ||
2475 | /* Enable DMA arbitration on dual channel controllers */ | 2389 | /* Enable DMA arbitration on dual channel controllers */ |
2476 | if (ha->ports > 1) | 2390 | if (ha->ports > 1) |
2477 | mb[0] |= BIT_13; | 2391 | cfg1 |= BIT_13; |
2478 | WRT_REG_WORD(®->cfg_1, mb[0]); | 2392 | WRT_REG_WORD(®->cfg_1, cfg1); |
2479 | 2393 | ||
2480 | /* Set SCSI termination. */ | 2394 | /* Set SCSI termination. */ |
2481 | WRT_REG_WORD(®->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0)); | 2395 | WRT_REG_WORD(®->gpio_enable, |
2482 | mb[0] = nv->termination.c & (BIT_3 + BIT_2 + BIT_1 + BIT_0); | 2396 | BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); |
2483 | WRT_REG_WORD(®->gpio_data, mb[0]); | 2397 | term = nv->termination.scsi_bus_1_control; |
2398 | term |= nv->termination.scsi_bus_0_control << 2; | ||
2399 | term |= nv->termination.auto_term_support << 7; | ||
2400 | RD_REG_WORD(®->id_l); /* Flush PCI write */ | ||
2401 | WRT_REG_WORD(®->gpio_data, term); | ||
2484 | } | 2402 | } |
2403 | RD_REG_WORD(®->id_l); /* Flush PCI write */ | ||
2485 | 2404 | ||
2486 | /* ISP parameter word. */ | 2405 | /* ISP parameter word. */ |
2487 | mb[0] = MBC_SET_SYSTEM_PARAMETER; | 2406 | mb[0] = MBC_SET_SYSTEM_PARAMETER; |
@@ -2497,16 +2416,17 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2497 | 2416 | ||
2498 | /* Firmware feature word. */ | 2417 | /* Firmware feature word. */ |
2499 | mb[0] = MBC_SET_FIRMWARE_FEATURES; | 2418 | mb[0] = MBC_SET_FIRMWARE_FEATURES; |
2500 | mask = BIT_5 | BIT_1 | BIT_0; | 2419 | mb[1] = nv->firmware_feature.f.enable_fast_posting; |
2501 | mb[1] = le16_to_cpu(nv->firmware_feature.w) & (mask); | 2420 | mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1; |
2421 | mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5; | ||
2502 | #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2) | 2422 | #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2) |
2503 | if (ia64_platform_is("sn2")) { | 2423 | if (ia64_platform_is("sn2")) { |
2504 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " | 2424 | printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " |
2505 | "workaround\n", ha->host_no); | 2425 | "workaround\n", ha->host_no); |
2506 | mb[1] |= BIT_9; | 2426 | mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */ |
2507 | } | 2427 | } |
2508 | #endif | 2428 | #endif |
2509 | status |= qla1280_mailbox_command(ha, mask, &mb[0]); | 2429 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2510 | 2430 | ||
2511 | /* Retry count and delay. */ | 2431 | /* Retry count and delay. */ |
2512 | mb[0] = MBC_SET_RETRY_COUNT; | 2432 | mb[0] = MBC_SET_RETRY_COUNT; |
@@ -2535,27 +2455,27 @@ qla1280_nvram_config(struct scsi_qla_host *ha) | |||
2535 | mb[2] |= BIT_5; | 2455 | mb[2] |= BIT_5; |
2536 | if (nv->bus[1].config_2.data_line_active_negation) | 2456 | if (nv->bus[1].config_2.data_line_active_negation) |
2537 | mb[2] |= BIT_4; | 2457 | mb[2] |= BIT_4; |
2538 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2458 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2539 | 2459 | ||
2540 | mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY; | 2460 | mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY; |
2541 | mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */ | 2461 | mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */ |
2542 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); | 2462 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2543 | 2463 | ||
2544 | /* thingy */ | 2464 | /* thingy */ |
2545 | mb[0] = MBC_SET_PCI_CONTROL; | 2465 | mb[0] = MBC_SET_PCI_CONTROL; |
2546 | mb[1] = 2; /* Data DMA Channel Burst Enable */ | 2466 | mb[1] = BIT_1; /* Data DMA Channel Burst Enable */ |
2547 | mb[2] = 2; /* Command DMA Channel Burst Enable */ | 2467 | mb[2] = BIT_1; /* Command DMA Channel Burst Enable */ |
2548 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2468 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2549 | 2469 | ||
2550 | mb[0] = MBC_SET_TAG_AGE_LIMIT; | 2470 | mb[0] = MBC_SET_TAG_AGE_LIMIT; |
2551 | mb[1] = 8; | 2471 | mb[1] = 8; |
2552 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); | 2472 | status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); |
2553 | 2473 | ||
2554 | /* Selection timeout. */ | 2474 | /* Selection timeout. */ |
2555 | mb[0] = MBC_SET_SELECTION_TIMEOUT; | 2475 | mb[0] = MBC_SET_SELECTION_TIMEOUT; |
2556 | mb[1] = nv->bus[0].selection_timeout; | 2476 | mb[1] = nv->bus[0].selection_timeout; |
2557 | mb[2] = nv->bus[1].selection_timeout; | 2477 | mb[2] = nv->bus[1].selection_timeout; |
2558 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); | 2478 | status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); |
2559 | 2479 | ||
2560 | for (bus = 0; bus < ha->ports; bus++) | 2480 | for (bus = 0; bus < ha->ports; bus++) |
2561 | status |= qla1280_config_bus(ha, bus); | 2481 | status |= qla1280_config_bus(ha, bus); |
@@ -3066,7 +2986,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3066 | struct scsi_cmnd *cmd = sp->cmd; | 2986 | struct scsi_cmnd *cmd = sp->cmd; |
3067 | cmd_a64_entry_t *pkt; | 2987 | cmd_a64_entry_t *pkt; |
3068 | struct scatterlist *sg = NULL; | 2988 | struct scatterlist *sg = NULL; |
3069 | u32 *dword_ptr; | 2989 | __le32 *dword_ptr; |
3070 | dma_addr_t dma_handle; | 2990 | dma_addr_t dma_handle; |
3071 | int status = 0; | 2991 | int status = 0; |
3072 | int cnt; | 2992 | int cnt; |
@@ -3104,10 +3024,13 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3104 | REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); | 3024 | REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); |
3105 | } | 3025 | } |
3106 | 3026 | ||
3027 | dprintk(3, "Number of free entries=(%d) seg_cnt=0x%x\n", | ||
3028 | ha->req_q_cnt, seg_cnt); | ||
3029 | |||
3107 | /* If room for request in request ring. */ | 3030 | /* If room for request in request ring. */ |
3108 | if ((req_cnt + 2) >= ha->req_q_cnt) { | 3031 | if ((req_cnt + 2) >= ha->req_q_cnt) { |
3109 | status = 1; | 3032 | status = 1; |
3110 | dprintk(2, "qla1280_64bit_start_scsi: in-ptr=0x%x req_q_cnt=" | 3033 | dprintk(2, "qla1280_start_scsi: in-ptr=0x%x req_q_cnt=" |
3111 | "0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt, | 3034 | "0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt, |
3112 | req_cnt); | 3035 | req_cnt); |
3113 | goto out; | 3036 | goto out; |
@@ -3119,7 +3042,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3119 | 3042 | ||
3120 | if (cnt >= MAX_OUTSTANDING_COMMANDS) { | 3043 | if (cnt >= MAX_OUTSTANDING_COMMANDS) { |
3121 | status = 1; | 3044 | status = 1; |
3122 | dprintk(2, "qla1280_64bit_start_scsi: NO ROOM IN " | 3045 | dprintk(2, "qla1280_start_scsi: NO ROOM IN " |
3123 | "OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt); | 3046 | "OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt); |
3124 | goto out; | 3047 | goto out; |
3125 | } | 3048 | } |
@@ -3128,7 +3051,7 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3128 | ha->req_q_cnt -= req_cnt; | 3051 | ha->req_q_cnt -= req_cnt; |
3129 | CMD_HANDLE(sp->cmd) = (unsigned char *)(unsigned long)(cnt + 1); | 3052 | CMD_HANDLE(sp->cmd) = (unsigned char *)(unsigned long)(cnt + 1); |
3130 | 3053 | ||
3131 | dprintk(2, "64bit_start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp, | 3054 | dprintk(2, "start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp, |
3132 | cmd->cmnd[0], (long)CMD_HANDLE(sp->cmd)); | 3055 | cmd->cmnd[0], (long)CMD_HANDLE(sp->cmd)); |
3133 | dprintk(2, " bus %i, target %i, lun %i\n", | 3056 | dprintk(2, " bus %i, target %i, lun %i\n", |
3134 | SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); | 3057 | SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); |
@@ -3350,7 +3273,7 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3350 | struct scsi_cmnd *cmd = sp->cmd; | 3273 | struct scsi_cmnd *cmd = sp->cmd; |
3351 | struct cmd_entry *pkt; | 3274 | struct cmd_entry *pkt; |
3352 | struct scatterlist *sg = NULL; | 3275 | struct scatterlist *sg = NULL; |
3353 | uint32_t *dword_ptr; | 3276 | __le32 *dword_ptr; |
3354 | int status = 0; | 3277 | int status = 0; |
3355 | int cnt; | 3278 | int cnt; |
3356 | int req_cnt; | 3279 | int req_cnt; |
@@ -3993,21 +3916,21 @@ qla1280_get_target_options(struct scsi_cmnd *cmd, struct scsi_qla_host *ha) | |||
3993 | result = cmd->request_buffer; | 3916 | result = cmd->request_buffer; |
3994 | n = &ha->nvram; | 3917 | n = &ha->nvram; |
3995 | 3918 | ||
3996 | n->bus[bus].target[target].parameter.f.enable_wide = 0; | 3919 | n->bus[bus].target[target].parameter.enable_wide = 0; |
3997 | n->bus[bus].target[target].parameter.f.enable_sync = 0; | 3920 | n->bus[bus].target[target].parameter.enable_sync = 0; |
3998 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0; | 3921 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0; |
3999 | 3922 | ||
4000 | if (result[7] & 0x60) | 3923 | if (result[7] & 0x60) |
4001 | n->bus[bus].target[target].parameter.f.enable_wide = 1; | 3924 | n->bus[bus].target[target].parameter.enable_wide = 1; |
4002 | if (result[7] & 0x10) | 3925 | if (result[7] & 0x10) |
4003 | n->bus[bus].target[target].parameter.f.enable_sync = 1; | 3926 | n->bus[bus].target[target].parameter.enable_sync = 1; |
4004 | if ((result[2] >= 3) && (result[4] + 5 > 56) && | 3927 | if ((result[2] >= 3) && (result[4] + 5 > 56) && |
4005 | (result[56] & 0x4)) | 3928 | (result[56] & 0x4)) |
4006 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1; | 3929 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1; |
4007 | 3930 | ||
4008 | dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n", | 3931 | dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n", |
4009 | n->bus[bus].target[target].parameter.f.enable_wide, | 3932 | n->bus[bus].target[target].parameter.enable_wide, |
4010 | n->bus[bus].target[target].parameter.f.enable_sync, | 3933 | n->bus[bus].target[target].parameter.enable_sync, |
4011 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr); | 3934 | n->bus[bus].target[target].ppr_1x160.flags.enable_ppr); |
4012 | } | 3935 | } |
4013 | #endif | 3936 | #endif |
@@ -4071,7 +3994,7 @@ qla1280_status_entry(struct scsi_qla_host *ha, struct response *pkt, | |||
4071 | /* Save ISP completion status */ | 3994 | /* Save ISP completion status */ |
4072 | CMD_RESULT(cmd) = qla1280_return_status(pkt, cmd); | 3995 | CMD_RESULT(cmd) = qla1280_return_status(pkt, cmd); |
4073 | 3996 | ||
4074 | if (scsi_status & SS_CHECK_CONDITION) { | 3997 | if (scsi_status & SAM_STAT_CHECK_CONDITION) { |
4075 | if (comp_status != CS_ARS_FAILED) { | 3998 | if (comp_status != CS_ARS_FAILED) { |
4076 | uint16_t req_sense_length = | 3999 | uint16_t req_sense_length = |
4077 | le16_to_cpu(pkt->req_sense_length); | 4000 | le16_to_cpu(pkt->req_sense_length); |
@@ -4650,7 +4573,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
4650 | if (pci_set_dma_mask(ha->pdev, (dma_addr_t) ~ 0ULL)) { | 4573 | if (pci_set_dma_mask(ha->pdev, (dma_addr_t) ~ 0ULL)) { |
4651 | if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { | 4574 | if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { |
4652 | printk(KERN_WARNING "scsi(%li): Unable to set a " | 4575 | printk(KERN_WARNING "scsi(%li): Unable to set a " |
4653 | " suitable DMA mask - aboring\n", ha->host_no); | 4576 | "suitable DMA mask - aborting\n", ha->host_no); |
4654 | error = -ENODEV; | 4577 | error = -ENODEV; |
4655 | goto error_free_irq; | 4578 | goto error_free_irq; |
4656 | } | 4579 | } |
@@ -4660,14 +4583,14 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
4660 | #else | 4583 | #else |
4661 | if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { | 4584 | if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { |
4662 | printk(KERN_WARNING "scsi(%li): Unable to set a " | 4585 | printk(KERN_WARNING "scsi(%li): Unable to set a " |
4663 | " suitable DMA mask - aboring\n", ha->host_no); | 4586 | "suitable DMA mask - aborting\n", ha->host_no); |
4664 | error = -ENODEV; | 4587 | error = -ENODEV; |
4665 | goto error_free_irq; | 4588 | goto error_free_irq; |
4666 | } | 4589 | } |
4667 | #endif | 4590 | #endif |
4668 | 4591 | ||
4669 | ha->request_ring = pci_alloc_consistent(ha->pdev, | 4592 | ha->request_ring = pci_alloc_consistent(ha->pdev, |
4670 | ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))), | 4593 | ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)), |
4671 | &ha->request_dma); | 4594 | &ha->request_dma); |
4672 | if (!ha->request_ring) { | 4595 | if (!ha->request_ring) { |
4673 | printk(KERN_INFO "qla1280: Failed to get request memory\n"); | 4596 | printk(KERN_INFO "qla1280: Failed to get request memory\n"); |
@@ -4675,7 +4598,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
4675 | } | 4598 | } |
4676 | 4599 | ||
4677 | ha->response_ring = pci_alloc_consistent(ha->pdev, | 4600 | ha->response_ring = pci_alloc_consistent(ha->pdev, |
4678 | ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))), | 4601 | ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)), |
4679 | &ha->response_dma); | 4602 | &ha->response_dma); |
4680 | if (!ha->response_ring) { | 4603 | if (!ha->response_ring) { |
4681 | printk(KERN_INFO "qla1280: Failed to get response memory\n"); | 4604 | printk(KERN_INFO "qla1280: Failed to get response memory\n"); |
@@ -4758,7 +4681,7 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
4758 | 4681 | ||
4759 | #if LINUX_VERSION_CODE >= 0x020600 | 4682 | #if LINUX_VERSION_CODE >= 0x020600 |
4760 | error_disable_adapter: | 4683 | error_disable_adapter: |
4761 | WRT_REG_WORD(&ha->iobase->ictrl, 0); | 4684 | qla1280_disable_intrs(ha); |
4762 | #endif | 4685 | #endif |
4763 | error_free_irq: | 4686 | error_free_irq: |
4764 | free_irq(pdev->irq, ha); | 4687 | free_irq(pdev->irq, ha); |
@@ -4770,11 +4693,11 @@ qla1280_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
4770 | #endif | 4693 | #endif |
4771 | error_free_response_ring: | 4694 | error_free_response_ring: |
4772 | pci_free_consistent(ha->pdev, | 4695 | pci_free_consistent(ha->pdev, |
4773 | ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))), | 4696 | ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)), |
4774 | ha->response_ring, ha->response_dma); | 4697 | ha->response_ring, ha->response_dma); |
4775 | error_free_request_ring: | 4698 | error_free_request_ring: |
4776 | pci_free_consistent(ha->pdev, | 4699 | pci_free_consistent(ha->pdev, |
4777 | ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))), | 4700 | ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)), |
4778 | ha->request_ring, ha->request_dma); | 4701 | ha->request_ring, ha->request_dma); |
4779 | error_put_host: | 4702 | error_put_host: |
4780 | scsi_host_put(host); | 4703 | scsi_host_put(host); |
@@ -4795,7 +4718,7 @@ qla1280_remove_one(struct pci_dev *pdev) | |||
4795 | scsi_remove_host(host); | 4718 | scsi_remove_host(host); |
4796 | #endif | 4719 | #endif |
4797 | 4720 | ||
4798 | WRT_REG_WORD(&ha->iobase->ictrl, 0); | 4721 | qla1280_disable_intrs(ha); |
4799 | 4722 | ||
4800 | free_irq(pdev->irq, ha); | 4723 | free_irq(pdev->irq, ha); |
4801 | 4724 | ||