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-rw-r--r--drivers/scsi/ncr53c8xx.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/scsi/ncr53c8xx.h b/drivers/scsi/ncr53c8xx.h
index cb8b7701431e..b39357d9af8d 100644
--- a/drivers/scsi/ncr53c8xx.h
+++ b/drivers/scsi/ncr53c8xx.h
@@ -218,7 +218,7 @@
218** Same as option 1, but also deal with 218** Same as option 1, but also deal with
219** misconfigured interrupts. 219** misconfigured interrupts.
220** 220**
221** - Edge triggerred instead of level sensitive. 221** - Edge triggered instead of level sensitive.
222** - No interrupt line connected. 222** - No interrupt line connected.
223** - IRQ number misconfigured. 223** - IRQ number misconfigured.
224** 224**
@@ -549,7 +549,7 @@ struct ncr_driver_setup {
549 549
550/* 550/*
551** Initial setup. 551** Initial setup.
552** Can be overriden at startup by a command line. 552** Can be overridden at startup by a command line.
553*/ 553*/
554#define SCSI_NCR_DRIVER_SETUP \ 554#define SCSI_NCR_DRIVER_SETUP \
555{ \ 555{ \
@@ -1093,7 +1093,7 @@ struct scr_tblsel {
1093**----------------------------------------------------------- 1093**-----------------------------------------------------------
1094** On 810A, 860, 825A, 875, 895 and 896 chips the content 1094** On 810A, 860, 825A, 875, 895 and 896 chips the content
1095** of SFBR register can be used as data (SCR_SFBR_DATA). 1095** of SFBR register can be used as data (SCR_SFBR_DATA).
1096** The 896 has additionnal IO registers starting at 1096** The 896 has additional IO registers starting at
1097** offset 0x80. Bit 7 of register offset is stored in 1097** offset 0x80. Bit 7 of register offset is stored in
1098** bit 7 of the SCRIPTS instruction first DWORD. 1098** bit 7 of the SCRIPTS instruction first DWORD.
1099**----------------------------------------------------------- 1099**-----------------------------------------------------------