aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/ncr53c8xx.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/ncr53c8xx.c')
-rw-r--r--drivers/scsi/ncr53c8xx.c7986
1 files changed, 7986 insertions, 0 deletions
diff --git a/drivers/scsi/ncr53c8xx.c b/drivers/scsi/ncr53c8xx.c
new file mode 100644
index 000000000000..7ae13236788e
--- /dev/null
+++ b/drivers/scsi/ncr53c8xx.c
@@ -0,0 +1,7986 @@
1/******************************************************************************
2** Device driver for the PCI-SCSI NCR538XX controller family.
3**
4** Copyright (C) 1994 Wolfgang Stanglmeier
5**
6** This program is free software; you can redistribute it and/or modify
7** it under the terms of the GNU General Public License as published by
8** the Free Software Foundation; either version 2 of the License, or
9** (at your option) any later version.
10**
11** This program is distributed in the hope that it will be useful,
12** but WITHOUT ANY WARRANTY; without even the implied warranty of
13** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14** GNU General Public License for more details.
15**
16** You should have received a copy of the GNU General Public License
17** along with this program; if not, write to the Free Software
18** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19**
20**-----------------------------------------------------------------------------
21**
22** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver
23** and is currently maintained by
24**
25** Gerard Roudier <groudier@free.fr>
26**
27** Being given that this driver originates from the FreeBSD version, and
28** in order to keep synergy on both, any suggested enhancements and corrections
29** received on Linux are automatically a potential candidate for the FreeBSD
30** version.
31**
32** The original driver has been written for 386bsd and FreeBSD by
33** Wolfgang Stanglmeier <wolf@cologne.de>
34** Stefan Esser <se@mi.Uni-Koeln.de>
35**
36** And has been ported to NetBSD by
37** Charles M. Hannum <mycroft@gnu.ai.mit.edu>
38**
39**-----------------------------------------------------------------------------
40**
41** Brief history
42**
43** December 10 1995 by Gerard Roudier:
44** Initial port to Linux.
45**
46** June 23 1996 by Gerard Roudier:
47** Support for 64 bits architectures (Alpha).
48**
49** November 30 1996 by Gerard Roudier:
50** Support for Fast-20 scsi.
51** Support for large DMA fifo and 128 dwords bursting.
52**
53** February 27 1997 by Gerard Roudier:
54** Support for Fast-40 scsi.
55** Support for on-Board RAM.
56**
57** May 3 1997 by Gerard Roudier:
58** Full support for scsi scripts instructions pre-fetching.
59**
60** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:
61** Support for NvRAM detection and reading.
62**
63** August 18 1997 by Cort <cort@cs.nmt.edu>:
64** Support for Power/PC (Big Endian).
65**
66** June 20 1998 by Gerard Roudier
67** Support for up to 64 tags per lun.
68** O(1) everywhere (C and SCRIPTS) for normal cases.
69** Low PCI traffic for command handling when on-chip RAM is present.
70** Aggressive SCSI SCRIPTS optimizations.
71**
72*******************************************************************************
73*/
74
75/*
76** Supported SCSI-II features:
77** Synchronous negotiation
78** Wide negotiation (depends on the NCR Chip)
79** Enable disconnection
80** Tagged command queuing
81** Parity checking
82** Etc...
83**
84** Supported NCR/SYMBIOS chips:
85** 53C720 (Wide, Fast SCSI-2, intfly problems)
86*/
87
88/* Name and version of the driver */
89#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g"
90
91#define SCSI_NCR_DEBUG_FLAGS (0)
92
93/*==========================================================
94**
95** Include files
96**
97**==========================================================
98*/
99
100#include <linux/blkdev.h>
101#include <linux/delay.h>
102#include <linux/dma-mapping.h>
103#include <linux/errno.h>
104#include <linux/init.h>
105#include <linux/interrupt.h>
106#include <linux/ioport.h>
107#include <linux/mm.h>
108#include <linux/module.h>
109#include <linux/sched.h>
110#include <linux/signal.h>
111#include <linux/spinlock.h>
112#include <linux/stat.h>
113#include <linux/string.h>
114#include <linux/time.h>
115#include <linux/timer.h>
116#include <linux/types.h>
117
118#include <asm/dma.h>
119#include <asm/io.h>
120#include <asm/system.h>
121
122#include <scsi/scsi.h>
123#include <scsi/scsi_cmnd.h>
124#include <scsi/scsi_device.h>
125#include <scsi/scsi_tcq.h>
126#include <scsi/scsi_transport.h>
127#include <scsi/scsi_transport_spi.h>
128
129#include "ncr53c8xx.h"
130
131#define NAME53C "ncr53c"
132#define NAME53C8XX "ncr53c8xx"
133
134#include "sym53c8xx_comm.h"
135
136
137/*==========================================================
138**
139** The CCB done queue uses an array of CCB virtual
140** addresses. Empty entries are flagged using the bogus
141** virtual address 0xffffffff.
142**
143** Since PCI ensures that only aligned DWORDs are accessed
144** atomically, 64 bit little-endian architecture requires
145** to test the high order DWORD of the entry to determine
146** if it is empty or valid.
147**
148** BTW, I will make things differently as soon as I will
149** have a better idea, but this is simple and should work.
150**
151**==========================================================
152*/
153
154#define SCSI_NCR_CCB_DONE_SUPPORT
155#ifdef SCSI_NCR_CCB_DONE_SUPPORT
156
157#define MAX_DONE 24
158#define CCB_DONE_EMPTY 0xffffffffUL
159
160/* All 32 bit architectures */
161#if BITS_PER_LONG == 32
162#define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY)
163
164/* All > 32 bit (64 bit) architectures regardless endian-ness */
165#else
166#define CCB_DONE_VALID(cp) \
167 ((((u_long) cp) & 0xffffffff00000000ul) && \
168 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)
169#endif
170
171#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
172
173/*==========================================================
174**
175** Configuration and Debugging
176**
177**==========================================================
178*/
179
180/*
181** SCSI address of this device.
182** The boot routines should have set it.
183** If not, use this.
184*/
185
186#ifndef SCSI_NCR_MYADDR
187#define SCSI_NCR_MYADDR (7)
188#endif
189
190/*
191** The maximum number of tags per logic unit.
192** Used only for disk devices that support tags.
193*/
194
195#ifndef SCSI_NCR_MAX_TAGS
196#define SCSI_NCR_MAX_TAGS (8)
197#endif
198
199/*
200** TAGS are actually limited to 64 tags/lun.
201** We need to deal with power of 2, for alignment constraints.
202*/
203#if SCSI_NCR_MAX_TAGS > 64
204#define MAX_TAGS (64)
205#else
206#define MAX_TAGS SCSI_NCR_MAX_TAGS
207#endif
208
209#define NO_TAG (255)
210
211/*
212** Choose appropriate type for tag bitmap.
213*/
214#if MAX_TAGS > 32
215typedef u64 tagmap_t;
216#else
217typedef u32 tagmap_t;
218#endif
219
220/*
221** Number of targets supported by the driver.
222** n permits target numbers 0..n-1.
223** Default is 16, meaning targets #0..#15.
224** #7 .. is myself.
225*/
226
227#ifdef SCSI_NCR_MAX_TARGET
228#define MAX_TARGET (SCSI_NCR_MAX_TARGET)
229#else
230#define MAX_TARGET (16)
231#endif
232
233/*
234** Number of logic units supported by the driver.
235** n enables logic unit numbers 0..n-1.
236** The common SCSI devices require only
237** one lun, so take 1 as the default.
238*/
239
240#ifdef SCSI_NCR_MAX_LUN
241#define MAX_LUN SCSI_NCR_MAX_LUN
242#else
243#define MAX_LUN (1)
244#endif
245
246/*
247** Asynchronous pre-scaler (ns). Shall be 40
248*/
249
250#ifndef SCSI_NCR_MIN_ASYNC
251#define SCSI_NCR_MIN_ASYNC (40)
252#endif
253
254/*
255** The maximum number of jobs scheduled for starting.
256** There should be one slot per target, and one slot
257** for each tag of each target in use.
258** The calculation below is actually quite silly ...
259*/
260
261#ifdef SCSI_NCR_CAN_QUEUE
262#define MAX_START (SCSI_NCR_CAN_QUEUE + 4)
263#else
264#define MAX_START (MAX_TARGET + 7 * MAX_TAGS)
265#endif
266
267/*
268** We limit the max number of pending IO to 250.
269** since we donnot want to allocate more than 1
270** PAGE for 'scripth'.
271*/
272#if MAX_START > 250
273#undef MAX_START
274#define MAX_START 250
275#endif
276
277/*
278** The maximum number of segments a transfer is split into.
279** We support up to 127 segments for both read and write.
280** The data scripts are broken into 2 sub-scripts.
281** 80 (MAX_SCATTERL) segments are moved from a sub-script
282** in on-chip RAM. This makes data transfers shorter than
283** 80k (assuming 1k fs) as fast as possible.
284*/
285
286#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)
287
288#if (MAX_SCATTER > 80)
289#define MAX_SCATTERL 80
290#define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL)
291#else
292#define MAX_SCATTERL (MAX_SCATTER-1)
293#define MAX_SCATTERH 1
294#endif
295
296/*
297** other
298*/
299
300#define NCR_SNOOP_TIMEOUT (1000000)
301
302/*
303** Other definitions
304*/
305
306#define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f))
307
308#define initverbose (driver_setup.verbose)
309#define bootverbose (np->verbose)
310
311/*==========================================================
312**
313** Command control block states.
314**
315**==========================================================
316*/
317
318#define HS_IDLE (0)
319#define HS_BUSY (1)
320#define HS_NEGOTIATE (2) /* sync/wide data transfer*/
321#define HS_DISCONNECT (3) /* Disconnected by target */
322
323#define HS_DONEMASK (0x80)
324#define HS_COMPLETE (4|HS_DONEMASK)
325#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
326#define HS_RESET (6|HS_DONEMASK) /* SCSI reset */
327#define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */
328#define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */
329#define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */
330#define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */
331
332/*
333** Invalid host status values used by the SCRIPTS processor
334** when the nexus is not fully identified.
335** Shall never appear in a CCB.
336*/
337
338#define HS_INVALMASK (0x40)
339#define HS_SELECTING (0|HS_INVALMASK)
340#define HS_IN_RESELECT (1|HS_INVALMASK)
341#define HS_STARTING (2|HS_INVALMASK)
342
343/*
344** Flags set by the SCRIPT processor for commands
345** that have been skipped.
346*/
347#define HS_SKIPMASK (0x20)
348
349/*==========================================================
350**
351** Software Interrupt Codes
352**
353**==========================================================
354*/
355
356#define SIR_BAD_STATUS (1)
357#define SIR_XXXXXXXXXX (2)
358#define SIR_NEGO_SYNC (3)
359#define SIR_NEGO_WIDE (4)
360#define SIR_NEGO_FAILED (5)
361#define SIR_NEGO_PROTO (6)
362#define SIR_REJECT_RECEIVED (7)
363#define SIR_REJECT_SENT (8)
364#define SIR_IGN_RESIDUE (9)
365#define SIR_MISSING_SAVE (10)
366#define SIR_RESEL_NO_MSG_IN (11)
367#define SIR_RESEL_NO_IDENTIFY (12)
368#define SIR_RESEL_BAD_LUN (13)
369#define SIR_RESEL_BAD_TARGET (14)
370#define SIR_RESEL_BAD_I_T_L (15)
371#define SIR_RESEL_BAD_I_T_L_Q (16)
372#define SIR_DONE_OVERFLOW (17)
373#define SIR_INTFLY (18)
374#define SIR_MAX (18)
375
376/*==========================================================
377**
378** Extended error codes.
379** xerr_status field of struct ccb.
380**
381**==========================================================
382*/
383
384#define XE_OK (0)
385#define XE_EXTRA_DATA (1) /* unexpected data phase */
386#define XE_BAD_PHASE (2) /* illegal phase (4/5) */
387
388/*==========================================================
389**
390** Negotiation status.
391** nego_status field of struct ccb.
392**
393**==========================================================
394*/
395
396#define NS_NOCHANGE (0)
397#define NS_SYNC (1)
398#define NS_WIDE (2)
399#define NS_PPR (4)
400
401/*==========================================================
402**
403** Misc.
404**
405**==========================================================
406*/
407
408#define CCB_MAGIC (0xf2691ad2)
409
410/*==========================================================
411**
412** Declaration of structs.
413**
414**==========================================================
415*/
416
417static struct scsi_transport_template *ncr53c8xx_transport_template = NULL;
418
419struct tcb;
420struct lcb;
421struct ccb;
422struct ncb;
423struct script;
424
425struct link {
426 ncrcmd l_cmd;
427 ncrcmd l_paddr;
428};
429
430struct usrcmd {
431 u_long target;
432 u_long lun;
433 u_long data;
434 u_long cmd;
435};
436
437#define UC_SETSYNC 10
438#define UC_SETTAGS 11
439#define UC_SETDEBUG 12
440#define UC_SETORDER 13
441#define UC_SETWIDE 14
442#define UC_SETFLAG 15
443#define UC_SETVERBOSE 17
444
445#define UF_TRACE (0x01)
446#define UF_NODISC (0x02)
447#define UF_NOSCAN (0x04)
448
449/*========================================================================
450**
451** Declaration of structs: target control block
452**
453**========================================================================
454*/
455struct tcb {
456 /*----------------------------------------------------------------
457 ** During reselection the ncr jumps to this point with SFBR
458 ** set to the encoded target number with bit 7 set.
459 ** if it's not this target, jump to the next.
460 **
461 ** JUMP IF (SFBR != #target#), @(next tcb)
462 **----------------------------------------------------------------
463 */
464 struct link jump_tcb;
465
466 /*----------------------------------------------------------------
467 ** Load the actual values for the sxfer and the scntl3
468 ** register (sync/wide mode).
469 **
470 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register)
471 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register)
472 **----------------------------------------------------------------
473 */
474 ncrcmd getscr[6];
475
476 /*----------------------------------------------------------------
477 ** Get the IDENTIFY message and load the LUN to SFBR.
478 **
479 ** CALL, <RESEL_LUN>
480 **----------------------------------------------------------------
481 */
482 struct link call_lun;
483
484 /*----------------------------------------------------------------
485 ** Now look for the right lun.
486 **
487 ** For i = 0 to 3
488 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i)
489 **
490 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
491 ** It is kind of hashcoding.
492 **----------------------------------------------------------------
493 */
494 struct link jump_lcb[4]; /* JUMPs for reselection */
495 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */
496
497 /*----------------------------------------------------------------
498 ** Pointer to the ccb used for negotiation.
499 ** Prevent from starting a negotiation for all queued commands
500 ** when tagged command queuing is enabled.
501 **----------------------------------------------------------------
502 */
503 struct ccb * nego_cp;
504
505 /*----------------------------------------------------------------
506 ** statistical data
507 **----------------------------------------------------------------
508 */
509 u_long transfers;
510 u_long bytes;
511
512 /*----------------------------------------------------------------
513 ** negotiation of wide and synch transfer and device quirks.
514 **----------------------------------------------------------------
515 */
516#ifdef SCSI_NCR_BIG_ENDIAN
517/*0*/ u16 period;
518/*2*/ u_char sval;
519/*3*/ u_char minsync;
520/*0*/ u_char wval;
521/*1*/ u_char widedone;
522/*2*/ u_char quirks;
523/*3*/ u_char maxoffs;
524#else
525/*0*/ u_char minsync;
526/*1*/ u_char sval;
527/*2*/ u16 period;
528/*0*/ u_char maxoffs;
529/*1*/ u_char quirks;
530/*2*/ u_char widedone;
531/*3*/ u_char wval;
532#endif
533
534 /* User settable limits and options. */
535 u_char usrsync;
536 u_char usrwide;
537 u_char usrtags;
538 u_char usrflag;
539 struct scsi_target *starget;
540};
541
542/*========================================================================
543**
544** Declaration of structs: lun control block
545**
546**========================================================================
547*/
548struct lcb {
549 /*----------------------------------------------------------------
550 ** During reselection the ncr jumps to this point
551 ** with SFBR set to the "Identify" message.
552 ** if it's not this lun, jump to the next.
553 **
554 ** JUMP IF (SFBR != #lun#), @(next lcb of this target)
555 **
556 ** It is this lun. Load TEMP with the nexus jumps table
557 ** address and jump to RESEL_TAG (or RESEL_NOTAG).
558 **
559 ** SCR_COPY (4), p_jump_ccb, TEMP,
560 ** SCR_JUMP, <RESEL_TAG>
561 **----------------------------------------------------------------
562 */
563 struct link jump_lcb;
564 ncrcmd load_jump_ccb[3];
565 struct link jump_tag;
566 ncrcmd p_jump_ccb; /* Jump table bus address */
567
568 /*----------------------------------------------------------------
569 ** Jump table used by the script processor to directly jump
570 ** to the CCB corresponding to the reselected nexus.
571 ** Address is allocated on 256 bytes boundary in order to
572 ** allow 8 bit calculation of the tag jump entry for up to
573 ** 64 possible tags.
574 **----------------------------------------------------------------
575 */
576 u32 jump_ccb_0; /* Default table if no tags */
577 u32 *jump_ccb; /* Virtual address */
578
579 /*----------------------------------------------------------------
580 ** CCB queue management.
581 **----------------------------------------------------------------
582 */
583 struct list_head free_ccbq; /* Queue of available CCBs */
584 struct list_head busy_ccbq; /* Queue of busy CCBs */
585 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */
586 struct list_head skip_ccbq; /* Queue of skipped CCBs */
587 u_char actccbs; /* Number of allocated CCBs */
588 u_char busyccbs; /* CCBs busy for this lun */
589 u_char queuedccbs; /* CCBs queued to the controller*/
590 u_char queuedepth; /* Queue depth for this lun */
591 u_char scdev_depth; /* SCSI device queue depth */
592 u_char maxnxs; /* Max possible nexuses */
593
594 /*----------------------------------------------------------------
595 ** Control of tagged command queuing.
596 ** Tags allocation is performed using a circular buffer.
597 ** This avoids using a loop for tag allocation.
598 **----------------------------------------------------------------
599 */
600 u_char ia_tag; /* Allocation index */
601 u_char if_tag; /* Freeing index */
602 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */
603 u_char usetags; /* Command queuing is active */
604 u_char maxtags; /* Max nr of tags asked by user */
605 u_char numtags; /* Current number of tags */
606
607 /*----------------------------------------------------------------
608 ** QUEUE FULL control and ORDERED tag control.
609 **----------------------------------------------------------------
610 */
611 /*----------------------------------------------------------------
612 ** QUEUE FULL and ORDERED tag control.
613 **----------------------------------------------------------------
614 */
615 u16 num_good; /* Nr of GOOD since QUEUE FULL */
616 tagmap_t tags_umap; /* Used tags bitmap */
617 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */
618 u_long tags_stime; /* Last time we set smap=umap */
619 struct ccb * held_ccb; /* CCB held for QUEUE FULL */
620};
621
622/*========================================================================
623**
624** Declaration of structs: the launch script.
625**
626**========================================================================
627**
628** It is part of the CCB and is called by the scripts processor to
629** start or restart the data structure (nexus).
630** This 6 DWORDs mini script makes use of prefetching.
631**
632**------------------------------------------------------------------------
633*/
634struct launch {
635 /*----------------------------------------------------------------
636 ** SCR_COPY(4), @(p_phys), @(dsa register)
637 ** SCR_JUMP, @(scheduler_point)
638 **----------------------------------------------------------------
639 */
640 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */
641 struct link schedule; /* Jump to scheduler point */
642 ncrcmd p_phys; /* 'phys' header bus address */
643};
644
645/*========================================================================
646**
647** Declaration of structs: global HEADER.
648**
649**========================================================================
650**
651** This substructure is copied from the ccb to a global address after
652** selection (or reselection) and copied back before disconnect.
653**
654** These fields are accessible to the script processor.
655**
656**------------------------------------------------------------------------
657*/
658
659struct head {
660 /*----------------------------------------------------------------
661 ** Saved data pointer.
662 ** Points to the position in the script responsible for the
663 ** actual transfer transfer of data.
664 ** It's written after reception of a SAVE_DATA_POINTER message.
665 ** The goalpointer points after the last transfer command.
666 **----------------------------------------------------------------
667 */
668 u32 savep;
669 u32 lastp;
670 u32 goalp;
671
672 /*----------------------------------------------------------------
673 ** Alternate data pointer.
674 ** They are copied back to savep/lastp/goalp by the SCRIPTS
675 ** when the direction is unknown and the device claims data out.
676 **----------------------------------------------------------------
677 */
678 u32 wlastp;
679 u32 wgoalp;
680
681 /*----------------------------------------------------------------
682 ** The virtual address of the ccb containing this header.
683 **----------------------------------------------------------------
684 */
685 struct ccb * cp;
686
687 /*----------------------------------------------------------------
688 ** Status fields.
689 **----------------------------------------------------------------
690 */
691 u_char scr_st[4]; /* script status */
692 u_char status[4]; /* host status. must be the */
693 /* last DWORD of the header. */
694};
695
696/*
697** The status bytes are used by the host and the script processor.
698**
699** The byte corresponding to the host_status must be stored in the
700** last DWORD of the CCB header since it is used for command
701** completion (ncr_wakeup()). Doing so, we are sure that the header
702** has been entirely copied back to the CCB when the host_status is
703** seen complete by the CPU.
704**
705** The last four bytes (status[4]) are copied to the scratchb register
706** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
707** and copied back just after disconnecting.
708** Inside the script the XX_REG are used.
709**
710** The first four bytes (scr_st[4]) are used inside the script by
711** "COPY" commands.
712** Because source and destination must have the same alignment
713** in a DWORD, the fields HAVE to be at the choosen offsets.
714** xerr_st 0 (0x34) scratcha
715** sync_st 1 (0x05) sxfer
716** wide_st 3 (0x03) scntl3
717*/
718
719/*
720** Last four bytes (script)
721*/
722#define QU_REG scr0
723#define HS_REG scr1
724#define HS_PRT nc_scr1
725#define SS_REG scr2
726#define SS_PRT nc_scr2
727#define PS_REG scr3
728
729/*
730** Last four bytes (host)
731*/
732#ifdef SCSI_NCR_BIG_ENDIAN
733#define actualquirks phys.header.status[3]
734#define host_status phys.header.status[2]
735#define scsi_status phys.header.status[1]
736#define parity_status phys.header.status[0]
737#else
738#define actualquirks phys.header.status[0]
739#define host_status phys.header.status[1]
740#define scsi_status phys.header.status[2]
741#define parity_status phys.header.status[3]
742#endif
743
744/*
745** First four bytes (script)
746*/
747#define xerr_st header.scr_st[0]
748#define sync_st header.scr_st[1]
749#define nego_st header.scr_st[2]
750#define wide_st header.scr_st[3]
751
752/*
753** First four bytes (host)
754*/
755#define xerr_status phys.xerr_st
756#define nego_status phys.nego_st
757
758#if 0
759#define sync_status phys.sync_st
760#define wide_status phys.wide_st
761#endif
762
763/*==========================================================
764**
765** Declaration of structs: Data structure block
766**
767**==========================================================
768**
769** During execution of a ccb by the script processor,
770** the DSA (data structure address) register points
771** to this substructure of the ccb.
772** This substructure contains the header with
773** the script-processor-changable data and
774** data blocks for the indirect move commands.
775**
776**----------------------------------------------------------
777*/
778
779struct dsb {
780
781 /*
782 ** Header.
783 */
784
785 struct head header;
786
787 /*
788 ** Table data for Script
789 */
790
791 struct scr_tblsel select;
792 struct scr_tblmove smsg ;
793 struct scr_tblmove cmd ;
794 struct scr_tblmove sense ;
795 struct scr_tblmove data[MAX_SCATTER];
796};
797
798
799/*========================================================================
800**
801** Declaration of structs: Command control block.
802**
803**========================================================================
804*/
805struct ccb {
806 /*----------------------------------------------------------------
807 ** This is the data structure which is pointed by the DSA
808 ** register when it is executed by the script processor.
809 ** It must be the first entry because it contains the header
810 ** as first entry that must be cache line aligned.
811 **----------------------------------------------------------------
812 */
813 struct dsb phys;
814
815 /*----------------------------------------------------------------
816 ** Mini-script used at CCB execution start-up.
817 ** Load the DSA with the data structure address (phys) and
818 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled.
819 **----------------------------------------------------------------
820 */
821 struct launch start;
822
823 /*----------------------------------------------------------------
824 ** Mini-script used at CCB relection to restart the nexus.
825 ** Load the DSA with the data structure address (phys) and
826 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted.
827 **----------------------------------------------------------------
828 */
829 struct launch restart;
830
831 /*----------------------------------------------------------------
832 ** If a data transfer phase is terminated too early
833 ** (after reception of a message (i.e. DISCONNECT)),
834 ** we have to prepare a mini script to transfer
835 ** the rest of the data.
836 **----------------------------------------------------------------
837 */
838 ncrcmd patch[8];
839
840 /*----------------------------------------------------------------
841 ** The general SCSI driver provides a
842 ** pointer to a control block.
843 **----------------------------------------------------------------
844 */
845 struct scsi_cmnd *cmd; /* SCSI command */
846 u_char cdb_buf[16]; /* Copy of CDB */
847 u_char sense_buf[64];
848 int data_len; /* Total data length */
849
850 /*----------------------------------------------------------------
851 ** Message areas.
852 ** We prepare a message to be sent after selection.
853 ** We may use a second one if the command is rescheduled
854 ** due to GETCC or QFULL.
855 ** Contents are IDENTIFY and SIMPLE_TAG.
856 ** While negotiating sync or wide transfer,
857 ** a SDTR or WDTR message is appended.
858 **----------------------------------------------------------------
859 */
860 u_char scsi_smsg [8];
861 u_char scsi_smsg2[8];
862
863 /*----------------------------------------------------------------
864 ** Other fields.
865 **----------------------------------------------------------------
866 */
867 u_long p_ccb; /* BUS address of this CCB */
868 u_char sensecmd[6]; /* Sense command */
869 u_char tag; /* Tag for this transfer */
870 /* 255 means no tag */
871 u_char target;
872 u_char lun;
873 u_char queued;
874 u_char auto_sense;
875 struct ccb * link_ccb; /* Host adapter CCB chain */
876 struct list_head link_ccbq; /* Link to unit CCB queue */
877 u32 startp; /* Initial data pointer */
878 u_long magic; /* Free / busy CCB flag */
879};
880
881#define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl))
882
883
884/*========================================================================
885**
886** Declaration of structs: NCR device descriptor
887**
888**========================================================================
889*/
890struct ncb {
891 /*----------------------------------------------------------------
892 ** The global header.
893 ** It is accessible to both the host and the script processor.
894 ** Must be cache line size aligned (32 for x86) in order to
895 ** allow cache line bursting when it is copied to/from CCB.
896 **----------------------------------------------------------------
897 */
898 struct head header;
899
900 /*----------------------------------------------------------------
901 ** CCBs management queues.
902 **----------------------------------------------------------------
903 */
904 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */
905 /* when lcb is not allocated. */
906 struct scsi_cmnd *done_list; /* Commands waiting for done() */
907 /* callback to be invoked. */
908 spinlock_t smp_lock; /* Lock for SMP threading */
909
910 /*----------------------------------------------------------------
911 ** Chip and controller indentification.
912 **----------------------------------------------------------------
913 */
914 int unit; /* Unit number */
915 char inst_name[16]; /* ncb instance name */
916
917 /*----------------------------------------------------------------
918 ** Initial value of some IO register bits.
919 ** These values are assumed to have been set by BIOS, and may
920 ** be used for probing adapter implementation differences.
921 **----------------------------------------------------------------
922 */
923 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3,
924 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4;
925
926 /*----------------------------------------------------------------
927 ** Actual initial value of IO register bits used by the
928 ** driver. They are loaded at initialisation according to
929 ** features that are to be enabled.
930 **----------------------------------------------------------------
931 */
932 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3,
933 rv_ctest4, rv_ctest5, rv_stest2;
934
935 /*----------------------------------------------------------------
936 ** Targets management.
937 ** During reselection the ncr jumps to jump_tcb.
938 ** The SFBR register is loaded with the encoded target id.
939 ** For i = 0 to 3
940 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i)
941 **
942 ** Recent chips will prefetch the 4 JUMPS using only 1 burst.
943 ** It is kind of hashcoding.
944 **----------------------------------------------------------------
945 */
946 struct link jump_tcb[4]; /* JUMPs for reselection */
947 struct tcb target[MAX_TARGET]; /* Target data */
948
949 /*----------------------------------------------------------------
950 ** Virtual and physical bus addresses of the chip.
951 **----------------------------------------------------------------
952 */
953 void __iomem *vaddr; /* Virtual and bus address of */
954 unsigned long paddr; /* chip's IO registers. */
955 unsigned long paddr2; /* On-chip RAM bus address. */
956 volatile /* Pointer to volatile for */
957 struct ncr_reg __iomem *reg; /* memory mapped IO. */
958
959 /*----------------------------------------------------------------
960 ** SCRIPTS virtual and physical bus addresses.
961 ** 'script' is loaded in the on-chip RAM if present.
962 ** 'scripth' stays in main memory.
963 **----------------------------------------------------------------
964 */
965 struct script *script0; /* Copies of script and scripth */
966 struct scripth *scripth0; /* relocated for this ncb. */
967 struct scripth *scripth; /* Actual scripth virt. address */
968 u_long p_script; /* Actual script and scripth */
969 u_long p_scripth; /* bus addresses. */
970
971 /*----------------------------------------------------------------
972 ** General controller parameters and configuration.
973 **----------------------------------------------------------------
974 */
975 struct device *dev;
976 u_char revision_id; /* PCI device revision id */
977 u32 irq; /* IRQ level */
978 u32 features; /* Chip features map */
979 u_char myaddr; /* SCSI id of the adapter */
980 u_char maxburst; /* log base 2 of dwords burst */
981 u_char maxwide; /* Maximum transfer width */
982 u_char minsync; /* Minimum sync period factor */
983 u_char maxsync; /* Maximum sync period factor */
984 u_char maxoffs; /* Max scsi offset */
985 u_char multiplier; /* Clock multiplier (1,2,4) */
986 u_char clock_divn; /* Number of clock divisors */
987 u_long clock_khz; /* SCSI clock frequency in KHz */
988
989 /*----------------------------------------------------------------
990 ** Start queue management.
991 ** It is filled up by the host processor and accessed by the
992 ** SCRIPTS processor in order to start SCSI commands.
993 **----------------------------------------------------------------
994 */
995 u16 squeueput; /* Next free slot of the queue */
996 u16 actccbs; /* Number of allocated CCBs */
997 u16 queuedccbs; /* Number of CCBs in start queue*/
998 u16 queuedepth; /* Start queue depth */
999
1000 /*----------------------------------------------------------------
1001 ** Timeout handler.
1002 **----------------------------------------------------------------
1003 */
1004 struct timer_list timer; /* Timer handler link header */
1005 u_long lasttime;
1006 u_long settle_time; /* Resetting the SCSI BUS */
1007
1008 /*----------------------------------------------------------------
1009 ** Debugging and profiling.
1010 **----------------------------------------------------------------
1011 */
1012 struct ncr_reg regdump; /* Register dump */
1013 u_long regtime; /* Time it has been done */
1014
1015 /*----------------------------------------------------------------
1016 ** Miscellaneous buffers accessed by the scripts-processor.
1017 ** They shall be DWORD aligned, because they may be read or
1018 ** written with a SCR_COPY script command.
1019 **----------------------------------------------------------------
1020 */
1021 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1022 u_char msgin [8]; /* Buffer for MESSAGE IN */
1023 u32 lastmsg; /* Last SCSI message sent */
1024 u_char scratch; /* Scratch for SCSI receive */
1025
1026 /*----------------------------------------------------------------
1027 ** Miscellaneous configuration and status parameters.
1028 **----------------------------------------------------------------
1029 */
1030 u_char disc; /* Diconnection allowed */
1031 u_char scsi_mode; /* Current SCSI BUS mode */
1032 u_char order; /* Tag order to use */
1033 u_char verbose; /* Verbosity for this controller*/
1034 int ncr_cache; /* Used for cache test at init. */
1035 u_long p_ncb; /* BUS address of this NCB */
1036
1037 /*----------------------------------------------------------------
1038 ** Command completion handling.
1039 **----------------------------------------------------------------
1040 */
1041#ifdef SCSI_NCR_CCB_DONE_SUPPORT
1042 struct ccb *(ccb_done[MAX_DONE]);
1043 int ccb_done_ic;
1044#endif
1045 /*----------------------------------------------------------------
1046 ** Fields that should be removed or changed.
1047 **----------------------------------------------------------------
1048 */
1049 struct ccb *ccb; /* Global CCB */
1050 struct usrcmd user; /* Command from user */
1051 volatile u_char release_stage; /* Synchronisation stage on release */
1052};
1053
1054#define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1055#define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1056
1057/*==========================================================
1058**
1059**
1060** Script for NCR-Processor.
1061**
1062** Use ncr_script_fill() to create the variable parts.
1063** Use ncr_script_copy_and_bind() to make a copy and
1064** bind to physical addresses.
1065**
1066**
1067**==========================================================
1068**
1069** We have to know the offsets of all labels before
1070** we reach them (for forward jumps).
1071** Therefore we declare a struct here.
1072** If you make changes inside the script,
1073** DONT FORGET TO CHANGE THE LENGTHS HERE!
1074**
1075**----------------------------------------------------------
1076*/
1077
1078/*
1079** For HP Zalon/53c720 systems, the Zalon interface
1080** between CPU and 53c720 does prefetches, which causes
1081** problems with self modifying scripts. The problem
1082** is overcome by calling a dummy subroutine after each
1083** modification, to force a refetch of the script on
1084** return from the subroutine.
1085*/
1086
1087#ifdef CONFIG_NCR53C8XX_PREFETCH
1088#define PREFETCH_FLUSH_CNT 2
1089#define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma),
1090#else
1091#define PREFETCH_FLUSH_CNT 0
1092#define PREFETCH_FLUSH
1093#endif
1094
1095/*
1096** Script fragments which are loaded into the on-chip RAM
1097** of 825A, 875 and 895 chips.
1098*/
1099struct script {
1100 ncrcmd start [ 5];
1101 ncrcmd startpos [ 1];
1102 ncrcmd select [ 6];
1103 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT];
1104 ncrcmd loadpos [ 4];
1105 ncrcmd send_ident [ 9];
1106 ncrcmd prepare [ 6];
1107 ncrcmd prepare2 [ 7];
1108 ncrcmd command [ 6];
1109 ncrcmd dispatch [ 32];
1110 ncrcmd clrack [ 4];
1111 ncrcmd no_data [ 17];
1112 ncrcmd status [ 8];
1113 ncrcmd msg_in [ 2];
1114 ncrcmd msg_in2 [ 16];
1115 ncrcmd msg_bad [ 4];
1116 ncrcmd setmsg [ 7];
1117 ncrcmd cleanup [ 6];
1118 ncrcmd complete [ 9];
1119 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT];
1120 ncrcmd cleanup0 [ 1];
1121#ifndef SCSI_NCR_CCB_DONE_SUPPORT
1122 ncrcmd signal [ 12];
1123#else
1124 ncrcmd signal [ 9];
1125 ncrcmd done_pos [ 1];
1126 ncrcmd done_plug [ 2];
1127 ncrcmd done_end [ 7];
1128#endif
1129 ncrcmd save_dp [ 7];
1130 ncrcmd restore_dp [ 5];
1131 ncrcmd disconnect [ 10];
1132 ncrcmd msg_out [ 9];
1133 ncrcmd msg_out_done [ 7];
1134 ncrcmd idle [ 2];
1135 ncrcmd reselect [ 8];
1136 ncrcmd reselected [ 8];
1137 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT];
1138 ncrcmd loadpos1 [ 4];
1139 ncrcmd resel_lun [ 6];
1140 ncrcmd resel_tag [ 6];
1141 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT];
1142 ncrcmd nexus_indirect [ 4];
1143 ncrcmd resel_notag [ 4];
1144 ncrcmd data_in [MAX_SCATTERL * 4];
1145 ncrcmd data_in2 [ 4];
1146 ncrcmd data_out [MAX_SCATTERL * 4];
1147 ncrcmd data_out2 [ 4];
1148};
1149
1150/*
1151** Script fragments which stay in main memory for all chips.
1152*/
1153struct scripth {
1154 ncrcmd tryloop [MAX_START*2];
1155 ncrcmd tryloop2 [ 2];
1156#ifdef SCSI_NCR_CCB_DONE_SUPPORT
1157 ncrcmd done_queue [MAX_DONE*5];
1158 ncrcmd done_queue2 [ 2];
1159#endif
1160 ncrcmd select_no_atn [ 8];
1161 ncrcmd cancel [ 4];
1162 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT];
1163 ncrcmd skip2 [ 19];
1164 ncrcmd par_err_data_in [ 6];
1165 ncrcmd par_err_other [ 4];
1166 ncrcmd msg_reject [ 8];
1167 ncrcmd msg_ign_residue [ 24];
1168 ncrcmd msg_extended [ 10];
1169 ncrcmd msg_ext_2 [ 10];
1170 ncrcmd msg_wdtr [ 14];
1171 ncrcmd send_wdtr [ 7];
1172 ncrcmd msg_ext_3 [ 10];
1173 ncrcmd msg_sdtr [ 14];
1174 ncrcmd send_sdtr [ 7];
1175 ncrcmd nego_bad_phase [ 4];
1176 ncrcmd msg_out_abort [ 10];
1177 ncrcmd hdata_in [MAX_SCATTERH * 4];
1178 ncrcmd hdata_in2 [ 2];
1179 ncrcmd hdata_out [MAX_SCATTERH * 4];
1180 ncrcmd hdata_out2 [ 2];
1181 ncrcmd reset [ 4];
1182 ncrcmd aborttag [ 4];
1183 ncrcmd abort [ 2];
1184 ncrcmd abort_resel [ 20];
1185 ncrcmd resend_ident [ 4];
1186 ncrcmd clratn_go_on [ 3];
1187 ncrcmd nxtdsp_go_on [ 1];
1188 ncrcmd sdata_in [ 8];
1189 ncrcmd data_io [ 18];
1190 ncrcmd bad_identify [ 12];
1191 ncrcmd bad_i_t_l [ 4];
1192 ncrcmd bad_i_t_l_q [ 4];
1193 ncrcmd bad_target [ 8];
1194 ncrcmd bad_status [ 8];
1195 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT];
1196 ncrcmd start_ram0 [ 4];
1197 ncrcmd sto_restart [ 5];
1198 ncrcmd wait_dma [ 2];
1199 ncrcmd snooptest [ 9];
1200 ncrcmd snoopend [ 2];
1201};
1202
1203/*==========================================================
1204**
1205**
1206** Function headers.
1207**
1208**
1209**==========================================================
1210*/
1211
1212static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln);
1213static void ncr_complete (struct ncb *np, struct ccb *cp);
1214static void ncr_exception (struct ncb *np);
1215static void ncr_free_ccb (struct ncb *np, struct ccb *cp);
1216static void ncr_init_ccb (struct ncb *np, struct ccb *cp);
1217static void ncr_init_tcb (struct ncb *np, u_char tn);
1218static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln);
1219static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev);
1220static void ncr_getclock (struct ncb *np, int mult);
1221static void ncr_selectclock (struct ncb *np, u_char scntl3);
1222static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd);
1223static void ncr_chip_reset (struct ncb *np, int delay);
1224static void ncr_init (struct ncb *np, int reset, char * msg, u_long code);
1225static int ncr_int_sbmc (struct ncb *np);
1226static int ncr_int_par (struct ncb *np);
1227static void ncr_int_ma (struct ncb *np);
1228static void ncr_int_sir (struct ncb *np);
1229static void ncr_int_sto (struct ncb *np);
1230static void ncr_negotiate (struct ncb* np, struct tcb* tp);
1231static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
1232
1233static void ncr_script_copy_and_bind
1234 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
1235static void ncr_script_fill (struct script * scr, struct scripth * scripth);
1236static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
1237static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
1238static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
1239static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev);
1240static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
1241static int ncr_snooptest (struct ncb *np);
1242static void ncr_timeout (struct ncb *np);
1243static void ncr_wakeup (struct ncb *np, u_long code);
1244static void ncr_wakeup_done (struct ncb *np);
1245static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
1246static void ncr_put_start_queue(struct ncb *np, struct ccb *cp);
1247
1248static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
1249static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
1250static void process_waiting_list(struct ncb *np, int sts);
1251
1252#define remove_from_waiting_list(np, cmd) \
1253 retrieve_from_waiting_list(1, (np), (cmd))
1254#define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
1255#define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
1256
1257static inline char *ncr_name (struct ncb *np)
1258{
1259 return np->inst_name;
1260}
1261
1262
1263/*==========================================================
1264**
1265**
1266** Scripts for NCR-Processor.
1267**
1268** Use ncr_script_bind for binding to physical addresses.
1269**
1270**
1271**==========================================================
1272**
1273** NADDR generates a reference to a field of the controller data.
1274** PADDR generates a reference to another part of the script.
1275** RADDR generates a reference to a script processor register.
1276** FADDR generates a reference to a script processor register
1277** with offset.
1278**
1279**----------------------------------------------------------
1280*/
1281
1282#define RELOC_SOFTC 0x40000000
1283#define RELOC_LABEL 0x50000000
1284#define RELOC_REGISTER 0x60000000
1285#if 0
1286#define RELOC_KVAR 0x70000000
1287#endif
1288#define RELOC_LABELH 0x80000000
1289#define RELOC_MASK 0xf0000000
1290
1291#define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1292#define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1293#define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1294#define RADDR(label) (RELOC_REGISTER | REG(label))
1295#define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1296#if 0
1297#define KVAR(which) (RELOC_KVAR | (which))
1298#endif
1299
1300#if 0
1301#define SCRIPT_KVAR_JIFFIES (0)
1302#define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES
1303#define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES
1304/*
1305 * Kernel variables referenced in the scripts.
1306 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1307 */
1308static void *script_kvars[] __initdata =
1309 { (void *)&jiffies };
1310#endif
1311
1312static struct script script0 __initdata = {
1313/*--------------------------< START >-----------------------*/ {
1314 /*
1315 ** This NOP will be patched with LED ON
1316 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
1317 */
1318 SCR_NO_OP,
1319 0,
1320 /*
1321 ** Clear SIGP.
1322 */
1323 SCR_FROM_REG (ctest2),
1324 0,
1325 /*
1326 ** Then jump to a certain point in tryloop.
1327 ** Due to the lack of indirect addressing the code
1328 ** is self modifying here.
1329 */
1330 SCR_JUMP,
1331}/*-------------------------< STARTPOS >--------------------*/,{
1332 PADDRH(tryloop),
1333
1334}/*-------------------------< SELECT >----------------------*/,{
1335 /*
1336 ** DSA contains the address of a scheduled
1337 ** data structure.
1338 **
1339 ** SCRATCHA contains the address of the script,
1340 ** which starts the next entry.
1341 **
1342 ** Set Initiator mode.
1343 **
1344 ** (Target mode is left as an exercise for the reader)
1345 */
1346
1347 SCR_CLR (SCR_TRG),
1348 0,
1349 SCR_LOAD_REG (HS_REG, HS_SELECTING),
1350 0,
1351
1352 /*
1353 ** And try to select this target.
1354 */
1355 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1356 PADDR (reselect),
1357
1358}/*-------------------------< SELECT2 >----------------------*/,{
1359 /*
1360 ** Now there are 4 possibilities:
1361 **
1362 ** (1) The ncr loses arbitration.
1363 ** This is ok, because it will try again,
1364 ** when the bus becomes idle.
1365 ** (But beware of the timeout function!)
1366 **
1367 ** (2) The ncr is reselected.
1368 ** Then the script processor takes the jump
1369 ** to the RESELECT label.
1370 **
1371 ** (3) The ncr wins arbitration.
1372 ** Then it will execute SCRIPTS instruction until
1373 ** the next instruction that checks SCSI phase.
1374 ** Then will stop and wait for selection to be
1375 ** complete or selection time-out to occur.
1376 ** As a result the SCRIPTS instructions until
1377 ** LOADPOS + 2 should be executed in parallel with
1378 ** the SCSI core performing selection.
1379 */
1380
1381 /*
1382 ** The M_REJECT problem seems to be due to a selection
1383 ** timing problem.
1384 ** Wait immediately for the selection to complete.
1385 ** (2.5x behaves so)
1386 */
1387 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1388 0,
1389
1390 /*
1391 ** Next time use the next slot.
1392 */
1393 SCR_COPY (4),
1394 RADDR (temp),
1395 PADDR (startpos),
1396 /*
1397 ** The ncr doesn't have an indirect load
1398 ** or store command. So we have to
1399 ** copy part of the control block to a
1400 ** fixed place, where we can access it.
1401 **
1402 ** We patch the address part of a
1403 ** COPY command with the DSA-register.
1404 */
1405 SCR_COPY_F (4),
1406 RADDR (dsa),
1407 PADDR (loadpos),
1408 /*
1409 ** Flush script prefetch if required
1410 */
1411 PREFETCH_FLUSH
1412 /*
1413 ** then we do the actual copy.
1414 */
1415 SCR_COPY (sizeof (struct head)),
1416 /*
1417 ** continued after the next label ...
1418 */
1419}/*-------------------------< LOADPOS >---------------------*/,{
1420 0,
1421 NADDR (header),
1422 /*
1423 ** Wait for the next phase or the selection
1424 ** to complete or time-out.
1425 */
1426 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1427 PADDR (prepare),
1428
1429}/*-------------------------< SEND_IDENT >----------------------*/,{
1430 /*
1431 ** Selection complete.
1432 ** Send the IDENTIFY and SIMPLE_TAG messages
1433 ** (and the M_X_SYNC_REQ message)
1434 */
1435 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1436 offsetof (struct dsb, smsg),
1437 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1438 PADDRH (resend_ident),
1439 SCR_LOAD_REG (scratcha, 0x80),
1440 0,
1441 SCR_COPY (1),
1442 RADDR (scratcha),
1443 NADDR (lastmsg),
1444}/*-------------------------< PREPARE >----------------------*/,{
1445 /*
1446 ** load the savep (saved pointer) into
1447 ** the TEMP register (actual pointer)
1448 */
1449 SCR_COPY (4),
1450 NADDR (header.savep),
1451 RADDR (temp),
1452 /*
1453 ** Initialize the status registers
1454 */
1455 SCR_COPY (4),
1456 NADDR (header.status),
1457 RADDR (scr0),
1458}/*-------------------------< PREPARE2 >---------------------*/,{
1459 /*
1460 ** Initialize the msgout buffer with a NOOP message.
1461 */
1462 SCR_LOAD_REG (scratcha, M_NOOP),
1463 0,
1464 SCR_COPY (1),
1465 RADDR (scratcha),
1466 NADDR (msgout),
1467#if 0
1468 SCR_COPY (1),
1469 RADDR (scratcha),
1470 NADDR (msgin),
1471#endif
1472 /*
1473 ** Anticipate the COMMAND phase.
1474 ** This is the normal case for initial selection.
1475 */
1476 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
1477 PADDR (dispatch),
1478
1479}/*-------------------------< COMMAND >--------------------*/,{
1480 /*
1481 ** ... and send the command
1482 */
1483 SCR_MOVE_TBL ^ SCR_COMMAND,
1484 offsetof (struct dsb, cmd),
1485 /*
1486 ** If status is still HS_NEGOTIATE, negotiation failed.
1487 ** We check this here, since we want to do that
1488 ** only once.
1489 */
1490 SCR_FROM_REG (HS_REG),
1491 0,
1492 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1493 SIR_NEGO_FAILED,
1494
1495}/*-----------------------< DISPATCH >----------------------*/,{
1496 /*
1497 ** MSG_IN is the only phase that shall be
1498 ** entered at least once for each (re)selection.
1499 ** So we test it first.
1500 */
1501 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
1502 PADDR (msg_in),
1503
1504 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)),
1505 0,
1506 /*
1507 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4.
1508 ** Possible data corruption during Memory Write and Invalidate.
1509 ** This work-around resets the addressing logic prior to the
1510 ** start of the first MOVE of a DATA IN phase.
1511 ** (See Documentation/scsi/ncr53c8xx.txt for more information)
1512 */
1513 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1514 20,
1515 SCR_COPY (4),
1516 RADDR (scratcha),
1517 RADDR (scratcha),
1518 SCR_RETURN,
1519 0,
1520 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1521 PADDR (status),
1522 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1523 PADDR (command),
1524 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1525 PADDR (msg_out),
1526 /*
1527 ** Discard one illegal phase byte, if required.
1528 */
1529 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1530 0,
1531 SCR_COPY (1),
1532 RADDR (scratcha),
1533 NADDR (xerr_st),
1534 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1535 8,
1536 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1537 NADDR (scratch),
1538 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1539 8,
1540 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1541 NADDR (scratch),
1542 SCR_JUMP,
1543 PADDR (dispatch),
1544
1545}/*-------------------------< CLRACK >----------------------*/,{
1546 /*
1547 ** Terminate possible pending message phase.
1548 */
1549 SCR_CLR (SCR_ACK),
1550 0,
1551 SCR_JUMP,
1552 PADDR (dispatch),
1553
1554}/*-------------------------< NO_DATA >--------------------*/,{
1555 /*
1556 ** The target wants to tranfer too much data
1557 ** or in the wrong direction.
1558 ** Remember that in extended error.
1559 */
1560 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1561 0,
1562 SCR_COPY (1),
1563 RADDR (scratcha),
1564 NADDR (xerr_st),
1565 /*
1566 ** Discard one data byte, if required.
1567 */
1568 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1569 8,
1570 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1571 NADDR (scratch),
1572 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1573 8,
1574 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1575 NADDR (scratch),
1576 /*
1577 ** .. and repeat as required.
1578 */
1579 SCR_CALL,
1580 PADDR (dispatch),
1581 SCR_JUMP,
1582 PADDR (no_data),
1583
1584}/*-------------------------< STATUS >--------------------*/,{
1585 /*
1586 ** get the status
1587 */
1588 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1589 NADDR (scratch),
1590 /*
1591 ** save status to scsi_status.
1592 ** mark as complete.
1593 */
1594 SCR_TO_REG (SS_REG),
1595 0,
1596 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1597 0,
1598 SCR_JUMP,
1599 PADDR (dispatch),
1600}/*-------------------------< MSG_IN >--------------------*/,{
1601 /*
1602 ** Get the first byte of the message
1603 ** and save it to SCRATCHA.
1604 **
1605 ** The script processor doesn't negate the
1606 ** ACK signal after this transfer.
1607 */
1608 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1609 NADDR (msgin[0]),
1610}/*-------------------------< MSG_IN2 >--------------------*/,{
1611 /*
1612 ** Handle this message.
1613 */
1614 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
1615 PADDR (complete),
1616 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
1617 PADDR (disconnect),
1618 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
1619 PADDR (save_dp),
1620 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
1621 PADDR (restore_dp),
1622 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1623 PADDRH (msg_extended),
1624 SCR_JUMP ^ IFTRUE (DATA (M_NOOP)),
1625 PADDR (clrack),
1626 SCR_JUMP ^ IFTRUE (DATA (M_REJECT)),
1627 PADDRH (msg_reject),
1628 SCR_JUMP ^ IFTRUE (DATA (M_IGN_RESIDUE)),
1629 PADDRH (msg_ign_residue),
1630 /*
1631 ** Rest of the messages left as
1632 ** an exercise ...
1633 **
1634 ** Unimplemented messages:
1635 ** fall through to MSG_BAD.
1636 */
1637}/*-------------------------< MSG_BAD >------------------*/,{
1638 /*
1639 ** unimplemented message - reject it.
1640 */
1641 SCR_INT,
1642 SIR_REJECT_SENT,
1643 SCR_LOAD_REG (scratcha, M_REJECT),
1644 0,
1645}/*-------------------------< SETMSG >----------------------*/,{
1646 SCR_COPY (1),
1647 RADDR (scratcha),
1648 NADDR (msgout),
1649 SCR_SET (SCR_ATN),
1650 0,
1651 SCR_JUMP,
1652 PADDR (clrack),
1653}/*-------------------------< CLEANUP >-------------------*/,{
1654 /*
1655 ** dsa: Pointer to ccb
1656 ** or xxxxxxFF (no ccb)
1657 **
1658 ** HS_REG: Host-Status (<>0!)
1659 */
1660 SCR_FROM_REG (dsa),
1661 0,
1662 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1663 PADDR (start),
1664 /*
1665 ** dsa is valid.
1666 ** complete the cleanup.
1667 */
1668 SCR_JUMP,
1669 PADDR (cleanup_ok),
1670
1671}/*-------------------------< COMPLETE >-----------------*/,{
1672 /*
1673 ** Complete message.
1674 **
1675 ** Copy TEMP register to LASTP in header.
1676 */
1677 SCR_COPY (4),
1678 RADDR (temp),
1679 NADDR (header.lastp),
1680 /*
1681 ** When we terminate the cycle by clearing ACK,
1682 ** the target may disconnect immediately.
1683 **
1684 ** We don't want to be told of an
1685 ** "unexpected disconnect",
1686 ** so we disable this feature.
1687 */
1688 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1689 0,
1690 /*
1691 ** Terminate cycle ...
1692 */
1693 SCR_CLR (SCR_ACK|SCR_ATN),
1694 0,
1695 /*
1696 ** ... and wait for the disconnect.
1697 */
1698 SCR_WAIT_DISC,
1699 0,
1700}/*-------------------------< CLEANUP_OK >----------------*/,{
1701 /*
1702 ** Save host status to header.
1703 */
1704 SCR_COPY (4),
1705 RADDR (scr0),
1706 NADDR (header.status),
1707 /*
1708 ** and copy back the header to the ccb.
1709 */
1710 SCR_COPY_F (4),
1711 RADDR (dsa),
1712 PADDR (cleanup0),
1713 /*
1714 ** Flush script prefetch if required
1715 */
1716 PREFETCH_FLUSH
1717 SCR_COPY (sizeof (struct head)),
1718 NADDR (header),
1719}/*-------------------------< CLEANUP0 >--------------------*/,{
1720 0,
1721}/*-------------------------< SIGNAL >----------------------*/,{
1722 /*
1723 ** if job not completed ...
1724 */
1725 SCR_FROM_REG (HS_REG),
1726 0,
1727 /*
1728 ** ... start the next command.
1729 */
1730 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))),
1731 PADDR(start),
1732 /*
1733 ** If command resulted in not GOOD status,
1734 ** call the C code if needed.
1735 */
1736 SCR_FROM_REG (SS_REG),
1737 0,
1738 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
1739 PADDRH (bad_status),
1740
1741#ifndef SCSI_NCR_CCB_DONE_SUPPORT
1742
1743 /*
1744 ** ... signal completion to the host
1745 */
1746 SCR_INT,
1747 SIR_INTFLY,
1748 /*
1749 ** Auf zu neuen Schandtaten!
1750 */
1751 SCR_JUMP,
1752 PADDR(start),
1753
1754#else /* defined SCSI_NCR_CCB_DONE_SUPPORT */
1755
1756 /*
1757 ** ... signal completion to the host
1758 */
1759 SCR_JUMP,
1760}/*------------------------< DONE_POS >---------------------*/,{
1761 PADDRH (done_queue),
1762}/*------------------------< DONE_PLUG >--------------------*/,{
1763 SCR_INT,
1764 SIR_DONE_OVERFLOW,
1765}/*------------------------< DONE_END >---------------------*/,{
1766 SCR_INT,
1767 SIR_INTFLY,
1768 SCR_COPY (4),
1769 RADDR (temp),
1770 PADDR (done_pos),
1771 SCR_JUMP,
1772 PADDR (start),
1773
1774#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
1775
1776}/*-------------------------< SAVE_DP >------------------*/,{
1777 /*
1778 ** SAVE_DP message:
1779 ** Copy TEMP register to SAVEP in header.
1780 */
1781 SCR_COPY (4),
1782 RADDR (temp),
1783 NADDR (header.savep),
1784 SCR_CLR (SCR_ACK),
1785 0,
1786 SCR_JUMP,
1787 PADDR (dispatch),
1788}/*-------------------------< RESTORE_DP >---------------*/,{
1789 /*
1790 ** RESTORE_DP message:
1791 ** Copy SAVEP in header to TEMP register.
1792 */
1793 SCR_COPY (4),
1794 NADDR (header.savep),
1795 RADDR (temp),
1796 SCR_JUMP,
1797 PADDR (clrack),
1798
1799}/*-------------------------< DISCONNECT >---------------*/,{
1800 /*
1801 ** DISCONNECTing ...
1802 **
1803 ** disable the "unexpected disconnect" feature,
1804 ** and remove the ACK signal.
1805 */
1806 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1807 0,
1808 SCR_CLR (SCR_ACK|SCR_ATN),
1809 0,
1810 /*
1811 ** Wait for the disconnect.
1812 */
1813 SCR_WAIT_DISC,
1814 0,
1815 /*
1816 ** Status is: DISCONNECTED.
1817 */
1818 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
1819 0,
1820 SCR_JUMP,
1821 PADDR (cleanup_ok),
1822
1823}/*-------------------------< MSG_OUT >-------------------*/,{
1824 /*
1825 ** The target requests a message.
1826 */
1827 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1828 NADDR (msgout),
1829 SCR_COPY (1),
1830 NADDR (msgout),
1831 NADDR (lastmsg),
1832 /*
1833 ** If it was no ABORT message ...
1834 */
1835 SCR_JUMP ^ IFTRUE (DATA (M_ABORT)),
1836 PADDRH (msg_out_abort),
1837 /*
1838 ** ... wait for the next phase
1839 ** if it's a message out, send it again, ...
1840 */
1841 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1842 PADDR (msg_out),
1843}/*-------------------------< MSG_OUT_DONE >--------------*/,{
1844 /*
1845 ** ... else clear the message ...
1846 */
1847 SCR_LOAD_REG (scratcha, M_NOOP),
1848 0,
1849 SCR_COPY (4),
1850 RADDR (scratcha),
1851 NADDR (msgout),
1852 /*
1853 ** ... and process the next phase
1854 */
1855 SCR_JUMP,
1856 PADDR (dispatch),
1857}/*-------------------------< IDLE >------------------------*/,{
1858 /*
1859 ** Nothing to do?
1860 ** Wait for reselect.
1861 ** This NOP will be patched with LED OFF
1862 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
1863 */
1864 SCR_NO_OP,
1865 0,
1866}/*-------------------------< RESELECT >--------------------*/,{
1867 /*
1868 ** make the DSA invalid.
1869 */
1870 SCR_LOAD_REG (dsa, 0xff),
1871 0,
1872 SCR_CLR (SCR_TRG),
1873 0,
1874 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT),
1875 0,
1876 /*
1877 ** Sleep waiting for a reselection.
1878 ** If SIGP is set, special treatment.
1879 **
1880 ** Zu allem bereit ..
1881 */
1882 SCR_WAIT_RESEL,
1883 PADDR(start),
1884}/*-------------------------< RESELECTED >------------------*/,{
1885 /*
1886 ** This NOP will be patched with LED ON
1887 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
1888 */
1889 SCR_NO_OP,
1890 0,
1891 /*
1892 ** ... zu nichts zu gebrauchen ?
1893 **
1894 ** load the target id into the SFBR
1895 ** and jump to the control block.
1896 **
1897 ** Look at the declarations of
1898 ** - struct ncb
1899 ** - struct tcb
1900 ** - struct lcb
1901 ** - struct ccb
1902 ** to understand what's going on.
1903 */
1904 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
1905 0,
1906 SCR_TO_REG (sdid),
1907 0,
1908 SCR_JUMP,
1909 NADDR (jump_tcb),
1910
1911}/*-------------------------< RESEL_DSA >-------------------*/,{
1912 /*
1913 ** Ack the IDENTIFY or TAG previously received.
1914 */
1915 SCR_CLR (SCR_ACK),
1916 0,
1917 /*
1918 ** The ncr doesn't have an indirect load
1919 ** or store command. So we have to
1920 ** copy part of the control block to a
1921 ** fixed place, where we can access it.
1922 **
1923 ** We patch the address part of a
1924 ** COPY command with the DSA-register.
1925 */
1926 SCR_COPY_F (4),
1927 RADDR (dsa),
1928 PADDR (loadpos1),
1929 /*
1930 ** Flush script prefetch if required
1931 */
1932 PREFETCH_FLUSH
1933 /*
1934 ** then we do the actual copy.
1935 */
1936 SCR_COPY (sizeof (struct head)),
1937 /*
1938 ** continued after the next label ...
1939 */
1940
1941}/*-------------------------< LOADPOS1 >-------------------*/,{
1942 0,
1943 NADDR (header),
1944 /*
1945 ** The DSA contains the data structure address.
1946 */
1947 SCR_JUMP,
1948 PADDR (prepare),
1949
1950}/*-------------------------< RESEL_LUN >-------------------*/,{
1951 /*
1952 ** come back to this point
1953 ** to get an IDENTIFY message
1954 ** Wait for a msg_in phase.
1955 */
1956 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
1957 SIR_RESEL_NO_MSG_IN,
1958 /*
1959 ** message phase.
1960 ** Read the data directly from the BUS DATA lines.
1961 ** This helps to support very old SCSI devices that
1962 ** may reselect without sending an IDENTIFY.
1963 */
1964 SCR_FROM_REG (sbdl),
1965 0,
1966 /*
1967 ** It should be an Identify message.
1968 */
1969 SCR_RETURN,
1970 0,
1971}/*-------------------------< RESEL_TAG >-------------------*/,{
1972 /*
1973 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE.
1974 ** Agressive optimization, is'nt it?
1975 ** No need to test the SIMPLE TAG message, since the
1976 ** driver only supports conformant devices for tags. ;-)
1977 */
1978 SCR_MOVE_ABS (3) ^ SCR_MSG_IN,
1979 NADDR (msgin),
1980 /*
1981 ** Read the TAG from the SIDL.
1982 ** Still an aggressive optimization. ;-)
1983 ** Compute the CCB indirect jump address which
1984 ** is (#TAG*2 & 0xfc) due to tag numbering using
1985 ** 1,3,5..MAXTAGS*2+1 actual values.
1986 */
1987 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1988 0,
1989 SCR_SFBR_REG (temp, SCR_AND, 0xfc),
1990 0,
1991}/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{
1992 SCR_COPY_F (4),
1993 RADDR (temp),
1994 PADDR (nexus_indirect),
1995 /*
1996 ** Flush script prefetch if required
1997 */
1998 PREFETCH_FLUSH
1999 SCR_COPY (4),
2000}/*-------------------------< NEXUS_INDIRECT >-------------------*/,{
2001 0,
2002 RADDR (temp),
2003 SCR_RETURN,
2004 0,
2005}/*-------------------------< RESEL_NOTAG >-------------------*/,{
2006 /*
2007 ** No tag expected.
2008 ** Read an throw away the IDENTIFY.
2009 */
2010 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2011 NADDR (msgin),
2012 SCR_JUMP,
2013 PADDR (jump_to_nexus),
2014}/*-------------------------< DATA_IN >--------------------*/,{
2015/*
2016** Because the size depends on the
2017** #define MAX_SCATTERL parameter,
2018** it is filled in at runtime.
2019**
2020** ##===========< i=0; i<MAX_SCATTERL >=========
2021** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2022** || PADDR (dispatch),
2023** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2024** || offsetof (struct dsb, data[ i]),
2025** ##==========================================
2026**
2027**---------------------------------------------------------
2028*/
20290
2030}/*-------------------------< DATA_IN2 >-------------------*/,{
2031 SCR_CALL,
2032 PADDR (dispatch),
2033 SCR_JUMP,
2034 PADDR (no_data),
2035}/*-------------------------< DATA_OUT >--------------------*/,{
2036/*
2037** Because the size depends on the
2038** #define MAX_SCATTERL parameter,
2039** it is filled in at runtime.
2040**
2041** ##===========< i=0; i<MAX_SCATTERL >=========
2042** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2043** || PADDR (dispatch),
2044** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2045** || offsetof (struct dsb, data[ i]),
2046** ##==========================================
2047**
2048**---------------------------------------------------------
2049*/
20500
2051}/*-------------------------< DATA_OUT2 >-------------------*/,{
2052 SCR_CALL,
2053 PADDR (dispatch),
2054 SCR_JUMP,
2055 PADDR (no_data),
2056}/*--------------------------------------------------------*/
2057};
2058
2059static struct scripth scripth0 __initdata = {
2060/*-------------------------< TRYLOOP >---------------------*/{
2061/*
2062** Start the next entry.
2063** Called addresses point to the launch script in the CCB.
2064** They are patched by the main processor.
2065**
2066** Because the size depends on the
2067** #define MAX_START parameter, it is filled
2068** in at runtime.
2069**
2070**-----------------------------------------------------------
2071**
2072** ##===========< I=0; i<MAX_START >===========
2073** || SCR_CALL,
2074** || PADDR (idle),
2075** ##==========================================
2076**
2077**-----------------------------------------------------------
2078*/
20790
2080}/*------------------------< TRYLOOP2 >---------------------*/,{
2081 SCR_JUMP,
2082 PADDRH(tryloop),
2083
2084#ifdef SCSI_NCR_CCB_DONE_SUPPORT
2085
2086}/*------------------------< DONE_QUEUE >-------------------*/,{
2087/*
2088** Copy the CCB address to the next done entry.
2089** Because the size depends on the
2090** #define MAX_DONE parameter, it is filled
2091** in at runtime.
2092**
2093**-----------------------------------------------------------
2094**
2095** ##===========< I=0; i<MAX_DONE >===========
2096** || SCR_COPY (sizeof(struct ccb *),
2097** || NADDR (header.cp),
2098** || NADDR (ccb_done[i]),
2099** || SCR_CALL,
2100** || PADDR (done_end),
2101** ##==========================================
2102**
2103**-----------------------------------------------------------
2104*/
21050
2106}/*------------------------< DONE_QUEUE2 >------------------*/,{
2107 SCR_JUMP,
2108 PADDRH (done_queue),
2109
2110#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2111}/*------------------------< SELECT_NO_ATN >-----------------*/,{
2112 /*
2113 ** Set Initiator mode.
2114 ** And try to select this target without ATN.
2115 */
2116
2117 SCR_CLR (SCR_TRG),
2118 0,
2119 SCR_LOAD_REG (HS_REG, HS_SELECTING),
2120 0,
2121 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2122 PADDR (reselect),
2123 SCR_JUMP,
2124 PADDR (select2),
2125
2126}/*-------------------------< CANCEL >------------------------*/,{
2127
2128 SCR_LOAD_REG (scratcha, HS_ABORTED),
2129 0,
2130 SCR_JUMPR,
2131 8,
2132}/*-------------------------< SKIP >------------------------*/,{
2133 SCR_LOAD_REG (scratcha, 0),
2134 0,
2135 /*
2136 ** This entry has been canceled.
2137 ** Next time use the next slot.
2138 */
2139 SCR_COPY (4),
2140 RADDR (temp),
2141 PADDR (startpos),
2142 /*
2143 ** The ncr doesn't have an indirect load
2144 ** or store command. So we have to
2145 ** copy part of the control block to a
2146 ** fixed place, where we can access it.
2147 **
2148 ** We patch the address part of a
2149 ** COPY command with the DSA-register.
2150 */
2151 SCR_COPY_F (4),
2152 RADDR (dsa),
2153 PADDRH (skip2),
2154 /*
2155 ** Flush script prefetch if required
2156 */
2157 PREFETCH_FLUSH
2158 /*
2159 ** then we do the actual copy.
2160 */
2161 SCR_COPY (sizeof (struct head)),
2162 /*
2163 ** continued after the next label ...
2164 */
2165}/*-------------------------< SKIP2 >---------------------*/,{
2166 0,
2167 NADDR (header),
2168 /*
2169 ** Initialize the status registers
2170 */
2171 SCR_COPY (4),
2172 NADDR (header.status),
2173 RADDR (scr0),
2174 /*
2175 ** Force host status.
2176 */
2177 SCR_FROM_REG (scratcha),
2178 0,
2179 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2180 16,
2181 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK),
2182 0,
2183 SCR_JUMPR,
2184 8,
2185 SCR_TO_REG (HS_REG),
2186 0,
2187 SCR_LOAD_REG (SS_REG, S_GOOD),
2188 0,
2189 SCR_JUMP,
2190 PADDR (cleanup_ok),
2191
2192},/*-------------------------< PAR_ERR_DATA_IN >---------------*/{
2193 /*
2194 ** Ignore all data in byte, until next phase
2195 */
2196 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2197 PADDRH (par_err_other),
2198 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
2199 NADDR (scratch),
2200 SCR_JUMPR,
2201 -24,
2202},/*-------------------------< PAR_ERR_OTHER >------------------*/{
2203 /*
2204 ** count it.
2205 */
2206 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2207 0,
2208 /*
2209 ** jump to dispatcher.
2210 */
2211 SCR_JUMP,
2212 PADDR (dispatch),
2213}/*-------------------------< MSG_REJECT >---------------*/,{
2214 /*
2215 ** If a negotiation was in progress,
2216 ** negotiation failed.
2217 ** Otherwise, let the C code print
2218 ** some message.
2219 */
2220 SCR_FROM_REG (HS_REG),
2221 0,
2222 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2223 SIR_REJECT_RECEIVED,
2224 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2225 SIR_NEGO_FAILED,
2226 SCR_JUMP,
2227 PADDR (clrack),
2228
2229}/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2230 /*
2231 ** Terminate cycle
2232 */
2233 SCR_CLR (SCR_ACK),
2234 0,
2235 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2236 PADDR (dispatch),
2237 /*
2238 ** get residue size.
2239 */
2240 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2241 NADDR (msgin[1]),
2242 /*
2243 ** Size is 0 .. ignore message.
2244 */
2245 SCR_JUMP ^ IFTRUE (DATA (0)),
2246 PADDR (clrack),
2247 /*
2248 ** Size is not 1 .. have to interrupt.
2249 */
2250 SCR_JUMPR ^ IFFALSE (DATA (1)),
2251 40,
2252 /*
2253 ** Check for residue byte in swide register
2254 */
2255 SCR_FROM_REG (scntl2),
2256 0,
2257 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2258 16,
2259 /*
2260 ** There IS data in the swide register.
2261 ** Discard it.
2262 */
2263 SCR_REG_REG (scntl2, SCR_OR, WSR),
2264 0,
2265 SCR_JUMP,
2266 PADDR (clrack),
2267 /*
2268 ** Load again the size to the sfbr register.
2269 */
2270 SCR_FROM_REG (scratcha),
2271 0,
2272 SCR_INT,
2273 SIR_IGN_RESIDUE,
2274 SCR_JUMP,
2275 PADDR (clrack),
2276
2277}/*-------------------------< MSG_EXTENDED >-------------*/,{
2278 /*
2279 ** Terminate cycle
2280 */
2281 SCR_CLR (SCR_ACK),
2282 0,
2283 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2284 PADDR (dispatch),
2285 /*
2286 ** get length.
2287 */
2288 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2289 NADDR (msgin[1]),
2290 /*
2291 */
2292 SCR_JUMP ^ IFTRUE (DATA (3)),
2293 PADDRH (msg_ext_3),
2294 SCR_JUMP ^ IFFALSE (DATA (2)),
2295 PADDR (msg_bad),
2296}/*-------------------------< MSG_EXT_2 >----------------*/,{
2297 SCR_CLR (SCR_ACK),
2298 0,
2299 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2300 PADDR (dispatch),
2301 /*
2302 ** get extended message code.
2303 */
2304 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2305 NADDR (msgin[2]),
2306 SCR_JUMP ^ IFTRUE (DATA (M_X_WIDE_REQ)),
2307 PADDRH (msg_wdtr),
2308 /*
2309 ** unknown extended message
2310 */
2311 SCR_JUMP,
2312 PADDR (msg_bad)
2313}/*-------------------------< MSG_WDTR >-----------------*/,{
2314 SCR_CLR (SCR_ACK),
2315 0,
2316 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2317 PADDR (dispatch),
2318 /*
2319 ** get data bus width
2320 */
2321 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2322 NADDR (msgin[3]),
2323 /*
2324 ** let the host do the real work.
2325 */
2326 SCR_INT,
2327 SIR_NEGO_WIDE,
2328 /*
2329 ** let the target fetch our answer.
2330 */
2331 SCR_SET (SCR_ATN),
2332 0,
2333 SCR_CLR (SCR_ACK),
2334 0,
2335 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2336 PADDRH (nego_bad_phase),
2337
2338}/*-------------------------< SEND_WDTR >----------------*/,{
2339 /*
2340 ** Send the M_X_WIDE_REQ
2341 */
2342 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2343 NADDR (msgout),
2344 SCR_COPY (1),
2345 NADDR (msgout),
2346 NADDR (lastmsg),
2347 SCR_JUMP,
2348 PADDR (msg_out_done),
2349
2350}/*-------------------------< MSG_EXT_3 >----------------*/,{
2351 SCR_CLR (SCR_ACK),
2352 0,
2353 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2354 PADDR (dispatch),
2355 /*
2356 ** get extended message code.
2357 */
2358 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2359 NADDR (msgin[2]),
2360 SCR_JUMP ^ IFTRUE (DATA (M_X_SYNC_REQ)),
2361 PADDRH (msg_sdtr),
2362 /*
2363 ** unknown extended message
2364 */
2365 SCR_JUMP,
2366 PADDR (msg_bad)
2367
2368}/*-------------------------< MSG_SDTR >-----------------*/,{
2369 SCR_CLR (SCR_ACK),
2370 0,
2371 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2372 PADDR (dispatch),
2373 /*
2374 ** get period and offset
2375 */
2376 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2377 NADDR (msgin[3]),
2378 /*
2379 ** let the host do the real work.
2380 */
2381 SCR_INT,
2382 SIR_NEGO_SYNC,
2383 /*
2384 ** let the target fetch our answer.
2385 */
2386 SCR_SET (SCR_ATN),
2387 0,
2388 SCR_CLR (SCR_ACK),
2389 0,
2390 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2391 PADDRH (nego_bad_phase),
2392
2393}/*-------------------------< SEND_SDTR >-------------*/,{
2394 /*
2395 ** Send the M_X_SYNC_REQ
2396 */
2397 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2398 NADDR (msgout),
2399 SCR_COPY (1),
2400 NADDR (msgout),
2401 NADDR (lastmsg),
2402 SCR_JUMP,
2403 PADDR (msg_out_done),
2404
2405}/*-------------------------< NEGO_BAD_PHASE >------------*/,{
2406 SCR_INT,
2407 SIR_NEGO_PROTO,
2408 SCR_JUMP,
2409 PADDR (dispatch),
2410
2411}/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2412 /*
2413 ** After ABORT message,
2414 **
2415 ** expect an immediate disconnect, ...
2416 */
2417 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2418 0,
2419 SCR_CLR (SCR_ACK|SCR_ATN),
2420 0,
2421 SCR_WAIT_DISC,
2422 0,
2423 /*
2424 ** ... and set the status to "ABORTED"
2425 */
2426 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2427 0,
2428 SCR_JUMP,
2429 PADDR (cleanup),
2430
2431}/*-------------------------< HDATA_IN >-------------------*/,{
2432/*
2433** Because the size depends on the
2434** #define MAX_SCATTERH parameter,
2435** it is filled in at runtime.
2436**
2437** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
2438** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2439** || PADDR (dispatch),
2440** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2441** || offsetof (struct dsb, data[ i]),
2442** ##===================================================
2443**
2444**---------------------------------------------------------
2445*/
24460
2447}/*-------------------------< HDATA_IN2 >------------------*/,{
2448 SCR_JUMP,
2449 PADDR (data_in),
2450
2451}/*-------------------------< HDATA_OUT >-------------------*/,{
2452/*
2453** Because the size depends on the
2454** #define MAX_SCATTERH parameter,
2455** it is filled in at runtime.
2456**
2457** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >==
2458** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2459** || PADDR (dispatch),
2460** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2461** || offsetof (struct dsb, data[ i]),
2462** ##===================================================
2463**
2464**---------------------------------------------------------
2465*/
24660
2467}/*-------------------------< HDATA_OUT2 >------------------*/,{
2468 SCR_JUMP,
2469 PADDR (data_out),
2470
2471}/*-------------------------< RESET >----------------------*/,{
2472 /*
2473 ** Send a M_RESET message if bad IDENTIFY
2474 ** received on reselection.
2475 */
2476 SCR_LOAD_REG (scratcha, M_ABORT_TAG),
2477 0,
2478 SCR_JUMP,
2479 PADDRH (abort_resel),
2480}/*-------------------------< ABORTTAG >-------------------*/,{
2481 /*
2482 ** Abort a wrong tag received on reselection.
2483 */
2484 SCR_LOAD_REG (scratcha, M_ABORT_TAG),
2485 0,
2486 SCR_JUMP,
2487 PADDRH (abort_resel),
2488}/*-------------------------< ABORT >----------------------*/,{
2489 /*
2490 ** Abort a reselection when no active CCB.
2491 */
2492 SCR_LOAD_REG (scratcha, M_ABORT),
2493 0,
2494}/*-------------------------< ABORT_RESEL >----------------*/,{
2495 SCR_COPY (1),
2496 RADDR (scratcha),
2497 NADDR (msgout),
2498 SCR_SET (SCR_ATN),
2499 0,
2500 SCR_CLR (SCR_ACK),
2501 0,
2502 /*
2503 ** and send it.
2504 ** we expect an immediate disconnect
2505 */
2506 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2507 0,
2508 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2509 NADDR (msgout),
2510 SCR_COPY (1),
2511 NADDR (msgout),
2512 NADDR (lastmsg),
2513 SCR_CLR (SCR_ACK|SCR_ATN),
2514 0,
2515 SCR_WAIT_DISC,
2516 0,
2517 SCR_JUMP,
2518 PADDR (start),
2519}/*-------------------------< RESEND_IDENT >-------------------*/,{
2520 /*
2521 ** The target stays in MSG OUT phase after having acked
2522 ** Identify [+ Tag [+ Extended message ]]. Targets shall
2523 ** behave this way on parity error.
2524 ** We must send it again all the messages.
2525 */
2526 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
2527 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */
2528 SCR_JUMP,
2529 PADDR (send_ident),
2530}/*-------------------------< CLRATN_GO_ON >-------------------*/,{
2531 SCR_CLR (SCR_ATN),
2532 0,
2533 SCR_JUMP,
2534}/*-------------------------< NXTDSP_GO_ON >-------------------*/,{
2535 0,
2536}/*-------------------------< SDATA_IN >-------------------*/,{
2537 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2538 PADDR (dispatch),
2539 SCR_MOVE_TBL ^ SCR_DATA_IN,
2540 offsetof (struct dsb, sense),
2541 SCR_CALL,
2542 PADDR (dispatch),
2543 SCR_JUMP,
2544 PADDR (no_data),
2545}/*-------------------------< DATA_IO >--------------------*/,{
2546 /*
2547 ** We jump here if the data direction was unknown at the
2548 ** time we had to queue the command to the scripts processor.
2549 ** Pointers had been set as follow in this situation:
2550 ** savep --> DATA_IO
2551 ** lastp --> start pointer when DATA_IN
2552 ** goalp --> goal pointer when DATA_IN
2553 ** wlastp --> start pointer when DATA_OUT
2554 ** wgoalp --> goal pointer when DATA_OUT
2555 ** This script sets savep/lastp/goalp according to the
2556 ** direction chosen by the target.
2557 */
2558 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)),
2559 32,
2560 /*
2561 ** Direction is DATA IN.
2562 ** Warning: we jump here, even when phase is DATA OUT.
2563 */
2564 SCR_COPY (4),
2565 NADDR (header.lastp),
2566 NADDR (header.savep),
2567
2568 /*
2569 ** Jump to the SCRIPTS according to actual direction.
2570 */
2571 SCR_COPY (4),
2572 NADDR (header.savep),
2573 RADDR (temp),
2574 SCR_RETURN,
2575 0,
2576 /*
2577 ** Direction is DATA OUT.
2578 */
2579 SCR_COPY (4),
2580 NADDR (header.wlastp),
2581 NADDR (header.lastp),
2582 SCR_COPY (4),
2583 NADDR (header.wgoalp),
2584 NADDR (header.goalp),
2585 SCR_JUMPR,
2586 -64,
2587}/*-------------------------< BAD_IDENTIFY >---------------*/,{
2588 /*
2589 ** If message phase but not an IDENTIFY,
2590 ** get some help from the C code.
2591 ** Old SCSI device may behave so.
2592 */
2593 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)),
2594 16,
2595 SCR_INT,
2596 SIR_RESEL_NO_IDENTIFY,
2597 SCR_JUMP,
2598 PADDRH (reset),
2599 /*
2600 ** Message is an IDENTIFY, but lun is unknown.
2601 ** Read the message, since we got it directly
2602 ** from the SCSI BUS data lines.
2603 ** Signal problem to C code for logging the event.
2604 ** Send a M_ABORT to clear all pending tasks.
2605 */
2606 SCR_INT,
2607 SIR_RESEL_BAD_LUN,
2608 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2609 NADDR (msgin),
2610 SCR_JUMP,
2611 PADDRH (abort),
2612}/*-------------------------< BAD_I_T_L >------------------*/,{
2613 /*
2614 ** We donnot have a task for that I_T_L.
2615 ** Signal problem to C code for logging the event.
2616 ** Send a M_ABORT message.
2617 */
2618 SCR_INT,
2619 SIR_RESEL_BAD_I_T_L,
2620 SCR_JUMP,
2621 PADDRH (abort),
2622}/*-------------------------< BAD_I_T_L_Q >----------------*/,{
2623 /*
2624 ** We donnot have a task that matches the tag.
2625 ** Signal problem to C code for logging the event.
2626 ** Send a M_ABORTTAG message.
2627 */
2628 SCR_INT,
2629 SIR_RESEL_BAD_I_T_L_Q,
2630 SCR_JUMP,
2631 PADDRH (aborttag),
2632}/*-------------------------< BAD_TARGET >-----------------*/,{
2633 /*
2634 ** We donnot know the target that reselected us.
2635 ** Grab the first message if any (IDENTIFY).
2636 ** Signal problem to C code for logging the event.
2637 ** M_RESET message.
2638 */
2639 SCR_INT,
2640 SIR_RESEL_BAD_TARGET,
2641 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2642 8,
2643 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2644 NADDR (msgin),
2645 SCR_JUMP,
2646 PADDRH (reset),
2647}/*-------------------------< BAD_STATUS >-----------------*/,{
2648 /*
2649 ** If command resulted in either QUEUE FULL,
2650 ** CHECK CONDITION or COMMAND TERMINATED,
2651 ** call the C code.
2652 */
2653 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)),
2654 SIR_BAD_STATUS,
2655 SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)),
2656 SIR_BAD_STATUS,
2657 SCR_INT ^ IFTRUE (DATA (S_TERMINATED)),
2658 SIR_BAD_STATUS,
2659 SCR_RETURN,
2660 0,
2661}/*-------------------------< START_RAM >-------------------*/,{
2662 /*
2663 ** Load the script into on-chip RAM,
2664 ** and jump to start point.
2665 */
2666 SCR_COPY_F (4),
2667 RADDR (scratcha),
2668 PADDRH (start_ram0),
2669 /*
2670 ** Flush script prefetch if required
2671 */
2672 PREFETCH_FLUSH
2673 SCR_COPY (sizeof (struct script)),
2674}/*-------------------------< START_RAM0 >--------------------*/,{
2675 0,
2676 PADDR (start),
2677 SCR_JUMP,
2678 PADDR (start),
2679}/*-------------------------< STO_RESTART >-------------------*/,{
2680 /*
2681 **
2682 ** Repair start queue (e.g. next time use the next slot)
2683 ** and jump to start point.
2684 */
2685 SCR_COPY (4),
2686 RADDR (temp),
2687 PADDR (startpos),
2688 SCR_JUMP,
2689 PADDR (start),
2690}/*-------------------------< WAIT_DMA >-------------------*/,{
2691 /*
2692 ** For HP Zalon/53c720 systems, the Zalon interface
2693 ** between CPU and 53c720 does prefetches, which causes
2694 ** problems with self modifying scripts. The problem
2695 ** is overcome by calling a dummy subroutine after each
2696 ** modification, to force a refetch of the script on
2697 ** return from the subroutine.
2698 */
2699 SCR_RETURN,
2700 0,
2701}/*-------------------------< SNOOPTEST >-------------------*/,{
2702 /*
2703 ** Read the variable.
2704 */
2705 SCR_COPY (4),
2706 NADDR(ncr_cache),
2707 RADDR (scratcha),
2708 /*
2709 ** Write the variable.
2710 */
2711 SCR_COPY (4),
2712 RADDR (temp),
2713 NADDR(ncr_cache),
2714 /*
2715 ** Read back the variable.
2716 */
2717 SCR_COPY (4),
2718 NADDR(ncr_cache),
2719 RADDR (temp),
2720}/*-------------------------< SNOOPEND >-------------------*/,{
2721 /*
2722 ** And stop.
2723 */
2724 SCR_INT,
2725 99,
2726}/*--------------------------------------------------------*/
2727};
2728
2729/*==========================================================
2730**
2731**
2732** Fill in #define dependent parts of the script
2733**
2734**
2735**==========================================================
2736*/
2737
2738void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
2739{
2740 int i;
2741 ncrcmd *p;
2742
2743 p = scrh->tryloop;
2744 for (i=0; i<MAX_START; i++) {
2745 *p++ =SCR_CALL;
2746 *p++ =PADDR (idle);
2747 }
2748
2749 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop));
2750
2751#ifdef SCSI_NCR_CCB_DONE_SUPPORT
2752
2753 p = scrh->done_queue;
2754 for (i = 0; i<MAX_DONE; i++) {
2755 *p++ =SCR_COPY (sizeof(struct ccb *));
2756 *p++ =NADDR (header.cp);
2757 *p++ =NADDR (ccb_done[i]);
2758 *p++ =SCR_CALL;
2759 *p++ =PADDR (done_end);
2760 }
2761
2762 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue));
2763
2764#endif /* SCSI_NCR_CCB_DONE_SUPPORT */
2765
2766 p = scrh->hdata_in;
2767 for (i=0; i<MAX_SCATTERH; i++) {
2768 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2769 *p++ =PADDR (dispatch);
2770 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2771 *p++ =offsetof (struct dsb, data[i]);
2772 }
2773
2774 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in));
2775
2776 p = scr->data_in;
2777 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
2778 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2779 *p++ =PADDR (dispatch);
2780 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2781 *p++ =offsetof (struct dsb, data[i]);
2782 }
2783
2784 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in));
2785
2786 p = scrh->hdata_out;
2787 for (i=0; i<MAX_SCATTERH; i++) {
2788 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2789 *p++ =PADDR (dispatch);
2790 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2791 *p++ =offsetof (struct dsb, data[i]);
2792 }
2793
2794 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out));
2795
2796 p = scr->data_out;
2797 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) {
2798 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2799 *p++ =PADDR (dispatch);
2800 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2801 *p++ =offsetof (struct dsb, data[i]);
2802 }
2803
2804 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out));
2805}
2806
2807/*==========================================================
2808**
2809**
2810** Copy and rebind a script.
2811**
2812**
2813**==========================================================
2814*/
2815
2816static void __init
2817ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
2818{
2819 ncrcmd opcode, new, old, tmp1, tmp2;
2820 ncrcmd *start, *end;
2821 int relocs;
2822 int opchanged = 0;
2823
2824 start = src;
2825 end = src + len/4;
2826
2827 while (src < end) {
2828
2829 opcode = *src++;
2830 *dst++ = cpu_to_scr(opcode);
2831
2832 /*
2833 ** If we forget to change the length
2834 ** in struct script, a field will be
2835 ** padded with 0. This is an illegal
2836 ** command.
2837 */
2838
2839 if (opcode == 0) {
2840 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n",
2841 ncr_name(np), (int) (src-start-1));
2842 mdelay(1000);
2843 }
2844
2845 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2846 printk (KERN_DEBUG "%p: <%x>\n",
2847 (src-1), (unsigned)opcode);
2848
2849 /*
2850 ** We don't have to decode ALL commands
2851 */
2852 switch (opcode >> 28) {
2853
2854 case 0xc:
2855 /*
2856 ** COPY has TWO arguments.
2857 */
2858 relocs = 2;
2859 tmp1 = src[0];
2860#ifdef RELOC_KVAR
2861 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
2862 tmp1 = 0;
2863#endif
2864 tmp2 = src[1];
2865#ifdef RELOC_KVAR
2866 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
2867 tmp2 = 0;
2868#endif
2869 if ((tmp1 ^ tmp2) & 3) {
2870 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n",
2871 ncr_name(np), (int) (src-start-1));
2872 mdelay(1000);
2873 }
2874 /*
2875 ** If PREFETCH feature not enabled, remove
2876 ** the NO FLUSH bit if present.
2877 */
2878 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) {
2879 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH);
2880 ++opchanged;
2881 }
2882 break;
2883
2884 case 0x0:
2885 /*
2886 ** MOVE (absolute address)
2887 */
2888 relocs = 1;
2889 break;
2890
2891 case 0x8:
2892 /*
2893 ** JUMP / CALL
2894 ** don't relocate if relative :-)
2895 */
2896 if (opcode & 0x00800000)
2897 relocs = 0;
2898 else
2899 relocs = 1;
2900 break;
2901
2902 case 0x4:
2903 case 0x5:
2904 case 0x6:
2905 case 0x7:
2906 relocs = 1;
2907 break;
2908
2909 default:
2910 relocs = 0;
2911 break;
2912 }
2913
2914 if (relocs) {
2915 while (relocs--) {
2916 old = *src++;
2917
2918 switch (old & RELOC_MASK) {
2919 case RELOC_REGISTER:
2920 new = (old & ~RELOC_MASK) + np->paddr;
2921 break;
2922 case RELOC_LABEL:
2923 new = (old & ~RELOC_MASK) + np->p_script;
2924 break;
2925 case RELOC_LABELH:
2926 new = (old & ~RELOC_MASK) + np->p_scripth;
2927 break;
2928 case RELOC_SOFTC:
2929 new = (old & ~RELOC_MASK) + np->p_ncb;
2930 break;
2931#ifdef RELOC_KVAR
2932 case RELOC_KVAR:
2933 if (((old & ~RELOC_MASK) <
2934 SCRIPT_KVAR_FIRST) ||
2935 ((old & ~RELOC_MASK) >
2936 SCRIPT_KVAR_LAST))
2937 panic("ncr KVAR out of range");
2938 new = vtophys(script_kvars[old &
2939 ~RELOC_MASK]);
2940 break;
2941#endif
2942 case 0:
2943 /* Don't relocate a 0 address. */
2944 if (old == 0) {
2945 new = old;
2946 break;
2947 }
2948 /* fall through */
2949 default:
2950 panic("ncr_script_copy_and_bind: weird relocation %x\n", old);
2951 break;
2952 }
2953
2954 *dst++ = cpu_to_scr(new);
2955 }
2956 } else
2957 *dst++ = cpu_to_scr(*src++);
2958
2959 }
2960}
2961
2962/*
2963** Linux host data structure
2964*/
2965
2966struct host_data {
2967 struct ncb *ncb;
2968};
2969
2970#define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg)
2971
2972static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg)
2973{
2974 int i;
2975 PRINT_ADDR(cp->cmd, "%s: ", label);
2976
2977 printk ("%x",*msg);
2978 if (*msg == M_EXTENDED) {
2979 for (i = 1; i < 8; i++) {
2980 if (i - 1 > msg[1])
2981 break;
2982 printk ("-%x",msg[i]);
2983 }
2984 } else if ((*msg & 0xf0) == 0x20) {
2985 printk ("-%x",msg[1]);
2986 }
2987
2988 printk(".\n");
2989}
2990
2991/*==========================================================
2992**
2993** NCR chip clock divisor table.
2994** Divisors are multiplied by 10,000,000 in order to make
2995** calculations more simple.
2996**
2997**==========================================================
2998*/
2999
3000#define _5M 5000000
3001static u_long div_10M[] =
3002 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3003
3004
3005/*===============================================================
3006**
3007** Prepare io register values used by ncr_init() according
3008** to selected and supported features.
3009**
3010** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3011** transfers. 32,64,128 are only supported by 875 and 895 chips.
3012** We use log base 2 (burst length) as internal code, with
3013** value 0 meaning "burst disabled".
3014**
3015**===============================================================
3016*/
3017
3018/*
3019 * Burst length from burst code.
3020 */
3021#define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3022
3023/*
3024 * Burst code from io register bits. Burst enable is ctest0 for c720
3025 */
3026#define burst_code(dmode, ctest0) \
3027 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
3028
3029/*
3030 * Set initial io register bits from burst code.
3031 */
3032static inline void ncr_init_burst(struct ncb *np, u_char bc)
3033{
3034 u_char *be = &np->rv_ctest0;
3035 *be &= ~0x80;
3036 np->rv_dmode &= ~(0x3 << 6);
3037 np->rv_ctest5 &= ~0x4;
3038
3039 if (!bc) {
3040 *be |= 0x80;
3041 } else {
3042 --bc;
3043 np->rv_dmode |= ((bc & 0x3) << 6);
3044 np->rv_ctest5 |= (bc & 0x4);
3045 }
3046}
3047
3048static void __init ncr_prepare_setting(struct ncb *np)
3049{
3050 u_char burst_max;
3051 u_long period;
3052 int i;
3053
3054 /*
3055 ** Save assumed BIOS setting
3056 */
3057
3058 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
3059 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
3060 np->sv_dmode = INB(nc_dmode) & 0xce;
3061 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
3062 np->sv_ctest0 = INB(nc_ctest0) & 0x84;
3063 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
3064 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
3065 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
3066 np->sv_gpcntl = INB(nc_gpcntl);
3067 np->sv_stest2 = INB(nc_stest2) & 0x20;
3068 np->sv_stest4 = INB(nc_stest4);
3069
3070 /*
3071 ** Wide ?
3072 */
3073
3074 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
3075
3076 /*
3077 * Guess the frequency of the chip's clock.
3078 */
3079 if (np->features & FE_ULTRA)
3080 np->clock_khz = 80000;
3081 else
3082 np->clock_khz = 40000;
3083
3084 /*
3085 * Get the clock multiplier factor.
3086 */
3087 if (np->features & FE_QUAD)
3088 np->multiplier = 4;
3089 else if (np->features & FE_DBLR)
3090 np->multiplier = 2;
3091 else
3092 np->multiplier = 1;
3093
3094 /*
3095 * Measure SCSI clock frequency for chips
3096 * it may vary from assumed one.
3097 */
3098 if (np->features & FE_VARCLK)
3099 ncr_getclock(np, np->multiplier);
3100
3101 /*
3102 * Divisor to be used for async (timer pre-scaler).
3103 */
3104 i = np->clock_divn - 1;
3105 while (--i >= 0) {
3106 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3107 ++i;
3108 break;
3109 }
3110 }
3111 np->rv_scntl3 = i+1;
3112
3113 /*
3114 * Minimum synchronous period factor supported by the chip.
3115 * Btw, 'period' is in tenths of nanoseconds.
3116 */
3117
3118 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3119 if (period <= 250) np->minsync = 10;
3120 else if (period <= 303) np->minsync = 11;
3121 else if (period <= 500) np->minsync = 12;
3122 else np->minsync = (period + 40 - 1) / 40;
3123
3124 /*
3125 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3126 */
3127
3128 if (np->minsync < 25 && !(np->features & FE_ULTRA))
3129 np->minsync = 25;
3130
3131 /*
3132 * Maximum synchronous period factor supported by the chip.
3133 */
3134
3135 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3136 np->maxsync = period > 2540 ? 254 : period / 10;
3137
3138 /*
3139 ** Prepare initial value of other IO registers
3140 */
3141#if defined SCSI_NCR_TRUST_BIOS_SETTING
3142 np->rv_scntl0 = np->sv_scntl0;
3143 np->rv_dmode = np->sv_dmode;
3144 np->rv_dcntl = np->sv_dcntl;
3145 np->rv_ctest0 = np->sv_ctest0;
3146 np->rv_ctest3 = np->sv_ctest3;
3147 np->rv_ctest4 = np->sv_ctest4;
3148 np->rv_ctest5 = np->sv_ctest5;
3149 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3150#else
3151
3152 /*
3153 ** Select burst length (dwords)
3154 */
3155 burst_max = driver_setup.burst_max;
3156 if (burst_max == 255)
3157 burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
3158 if (burst_max > 7)
3159 burst_max = 7;
3160 if (burst_max > np->maxburst)
3161 burst_max = np->maxburst;
3162
3163 /*
3164 ** Select all supported special features
3165 */
3166 if (np->features & FE_ERL)
3167 np->rv_dmode |= ERL; /* Enable Read Line */
3168 if (np->features & FE_BOF)
3169 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3170 if (np->features & FE_ERMP)
3171 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3172 if (np->features & FE_PFEN)
3173 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3174 if (np->features & FE_CLSE)
3175 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3176 if (np->features & FE_WRIE)
3177 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3178 if (np->features & FE_DFS)
3179 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3180 if (np->features & FE_MUX)
3181 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
3182 if (np->features & FE_EA)
3183 np->rv_dcntl |= EA; /* Enable ACK */
3184 if (np->features & FE_EHP)
3185 np->rv_ctest0 |= EHP; /* Even host parity */
3186
3187 /*
3188 ** Select some other
3189 */
3190 if (driver_setup.master_parity)
3191 np->rv_ctest4 |= MPEE; /* Master parity checking */
3192 if (driver_setup.scsi_parity)
3193 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
3194
3195 /*
3196 ** Get SCSI addr of host adapter (set by bios?).
3197 */
3198 if (np->myaddr == 255) {
3199 np->myaddr = INB(nc_scid) & 0x07;
3200 if (!np->myaddr)
3201 np->myaddr = SCSI_NCR_MYADDR;
3202 }
3203
3204#endif /* SCSI_NCR_TRUST_BIOS_SETTING */
3205
3206 /*
3207 * Prepare initial io register bits for burst length
3208 */
3209 ncr_init_burst(np, burst_max);
3210
3211 /*
3212 ** Set SCSI BUS mode.
3213 **
3214 ** - ULTRA2 chips (895/895A/896) report the current
3215 ** BUS mode through the STEST4 IO register.
3216 ** - For previous generation chips (825/825A/875),
3217 ** user has to tell us how to check against HVD,
3218 ** since a 100% safe algorithm is not possible.
3219 */
3220 np->scsi_mode = SMODE_SE;
3221 if (np->features & FE_DIFF) {
3222 switch(driver_setup.diff_support) {
3223 case 4: /* Trust previous settings if present, then GPIO3 */
3224 if (np->sv_scntl3) {
3225 if (np->sv_stest2 & 0x20)
3226 np->scsi_mode = SMODE_HVD;
3227 break;
3228 }
3229 case 3: /* SYMBIOS controllers report HVD through GPIO3 */
3230 if (INB(nc_gpreg) & 0x08)
3231 break;
3232 case 2: /* Set HVD unconditionally */
3233 np->scsi_mode = SMODE_HVD;
3234 case 1: /* Trust previous settings for HVD */
3235 if (np->sv_stest2 & 0x20)
3236 np->scsi_mode = SMODE_HVD;
3237 break;
3238 default:/* Don't care about HVD */
3239 break;
3240 }
3241 }
3242 if (np->scsi_mode == SMODE_HVD)
3243 np->rv_stest2 |= 0x20;
3244
3245 /*
3246 ** Set LED support from SCRIPTS.
3247 ** Ignore this feature for boards known to use a
3248 ** specific GPIO wiring and for the 895A or 896
3249 ** that drive the LED directly.
3250 ** Also probe initial setting of GPIO0 as output.
3251 */
3252 if ((driver_setup.led_pin) &&
3253 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
3254 np->features |= FE_LED0;
3255
3256 /*
3257 ** Set irq mode.
3258 */
3259 switch(driver_setup.irqm & 3) {
3260 case 2:
3261 np->rv_dcntl |= IRQM;
3262 break;
3263 case 1:
3264 np->rv_dcntl |= (np->sv_dcntl & IRQM);
3265 break;
3266 default:
3267 break;
3268 }
3269
3270 /*
3271 ** Configure targets according to driver setup.
3272 ** Allow to override sync, wide and NOSCAN from
3273 ** boot command line.
3274 */
3275 for (i = 0 ; i < MAX_TARGET ; i++) {
3276 struct tcb *tp = &np->target[i];
3277
3278 tp->usrsync = driver_setup.default_sync;
3279 tp->usrwide = driver_setup.max_wide;
3280 tp->usrtags = MAX_TAGS;
3281 tp->period = 0xffff;
3282 if (!driver_setup.disconnection)
3283 np->target[i].usrflag = UF_NODISC;
3284 }
3285
3286 /*
3287 ** Announce all that stuff to user.
3288 */
3289
3290 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
3291 np->myaddr,
3292 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
3293 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
3294 (np->rv_stest2 & 0x20) ? ", Differential" : "");
3295
3296 if (bootverbose > 1) {
3297 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3298 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3299 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
3300 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
3301
3302 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
3303 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
3304 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
3305 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3306 }
3307
3308 if (bootverbose && np->paddr2)
3309 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
3310 ncr_name(np), np->paddr2);
3311}
3312
3313/*==========================================================
3314**
3315**
3316** Done SCSI commands list management.
3317**
3318** We donnot enter the scsi_done() callback immediately
3319** after a command has been seen as completed but we
3320** insert it into a list which is flushed outside any kind
3321** of driver critical section.
3322** This allows to do minimal stuff under interrupt and
3323** inside critical sections and to also avoid locking up
3324** on recursive calls to driver entry points under SMP.
3325** In fact, the only kernel point which is entered by the
3326** driver with a driver lock set is kmalloc(GFP_ATOMIC)
3327** that shall not reenter the driver under any circumstances,
3328** AFAIK.
3329**
3330**==========================================================
3331*/
3332static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
3333{
3334 unmap_scsi_data(np, cmd);
3335 cmd->host_scribble = (char *) np->done_list;
3336 np->done_list = cmd;
3337}
3338
3339static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
3340{
3341 struct scsi_cmnd *cmd;
3342
3343 while (lcmd) {
3344 cmd = lcmd;
3345 lcmd = (struct scsi_cmnd *) cmd->host_scribble;
3346 cmd->scsi_done(cmd);
3347 }
3348}
3349
3350/*==========================================================
3351**
3352**
3353** Prepare the next negotiation message if needed.
3354**
3355** Fill in the part of message buffer that contains the
3356** negotiation and the nego_status field of the CCB.
3357** Returns the size of the message in bytes.
3358**
3359**
3360**==========================================================
3361*/
3362
3363
3364static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
3365{
3366 struct tcb *tp = &np->target[cp->target];
3367 int msglen = 0;
3368 int nego = 0;
3369 struct scsi_target *starget = tp->starget;
3370
3371 /* negotiate wide transfers ? */
3372 if (!tp->widedone) {
3373 if (spi_support_wide(starget)) {
3374 nego = NS_WIDE;
3375 } else
3376 tp->widedone=1;
3377 }
3378
3379 /* negotiate synchronous transfers? */
3380 if (!nego && !tp->period) {
3381 if (spi_support_sync(starget)) {
3382 nego = NS_SYNC;
3383 } else {
3384 tp->period =0xffff;
3385 dev_info(&starget->dev, "target did not report SYNC.\n");
3386 }
3387 }
3388
3389 switch (nego) {
3390 case NS_SYNC:
3391 msgptr[msglen++] = M_EXTENDED;
3392 msgptr[msglen++] = 3;
3393 msgptr[msglen++] = M_X_SYNC_REQ;
3394 msgptr[msglen++] = tp->maxoffs ? tp->minsync : 0;
3395 msgptr[msglen++] = tp->maxoffs;
3396 break;
3397 case NS_WIDE:
3398 msgptr[msglen++] = M_EXTENDED;
3399 msgptr[msglen++] = 2;
3400 msgptr[msglen++] = M_X_WIDE_REQ;
3401 msgptr[msglen++] = tp->usrwide;
3402 break;
3403 }
3404
3405 cp->nego_status = nego;
3406
3407 if (nego) {
3408 tp->nego_cp = cp;
3409 if (DEBUG_FLAGS & DEBUG_NEGO) {
3410 ncr_print_msg(cp, nego == NS_WIDE ?
3411 "wide msgout":"sync_msgout", msgptr);
3412 }
3413 }
3414
3415 return msglen;
3416}
3417
3418
3419
3420/*==========================================================
3421**
3422**
3423** Start execution of a SCSI command.
3424** This is called from the generic SCSI driver.
3425**
3426**
3427**==========================================================
3428*/
3429static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
3430{
3431 struct scsi_device *sdev = cmd->device;
3432 struct tcb *tp = &np->target[sdev->id];
3433 struct lcb *lp = tp->lp[sdev->lun];
3434 struct ccb *cp;
3435
3436 int segments;
3437 u_char idmsg, *msgptr;
3438 u32 msglen;
3439 int direction;
3440 u32 lastp, goalp;
3441
3442 /*---------------------------------------------
3443 **
3444 ** Some shortcuts ...
3445 **
3446 **---------------------------------------------
3447 */
3448 if ((sdev->id == np->myaddr ) ||
3449 (sdev->id >= MAX_TARGET) ||
3450 (sdev->lun >= MAX_LUN )) {
3451 return(DID_BAD_TARGET);
3452 }
3453
3454 /*---------------------------------------------
3455 **
3456 ** Complete the 1st TEST UNIT READY command
3457 ** with error condition if the device is
3458 ** flagged NOSCAN, in order to speed up
3459 ** the boot.
3460 **
3461 **---------------------------------------------
3462 */
3463 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
3464 (tp->usrflag & UF_NOSCAN)) {
3465 tp->usrflag &= ~UF_NOSCAN;
3466 return DID_BAD_TARGET;
3467 }
3468
3469 if (DEBUG_FLAGS & DEBUG_TINY) {
3470 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]);
3471 }
3472
3473 /*---------------------------------------------------
3474 **
3475 ** Assign a ccb / bind cmd.
3476 ** If resetting, shorten settle_time if necessary
3477 ** in order to avoid spurious timeouts.
3478 ** If resetting or no free ccb,
3479 ** insert cmd into the waiting list.
3480 **
3481 **----------------------------------------------------
3482 */
3483 if (np->settle_time && cmd->timeout_per_command >= HZ) {
3484 u_long tlimit = ktime_get(cmd->timeout_per_command - HZ);
3485 if (ktime_dif(np->settle_time, tlimit) > 0)
3486 np->settle_time = tlimit;
3487 }
3488
3489 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) {
3490 insert_into_waiting_list(np, cmd);
3491 return(DID_OK);
3492 }
3493 cp->cmd = cmd;
3494
3495 /*----------------------------------------------------
3496 **
3497 ** Build the identify / tag / sdtr message
3498 **
3499 **----------------------------------------------------
3500 */
3501
3502 idmsg = M_IDENTIFY | sdev->lun;
3503
3504 if (cp ->tag != NO_TAG ||
3505 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC)))
3506 idmsg |= 0x40;
3507
3508 msgptr = cp->scsi_smsg;
3509 msglen = 0;
3510 msgptr[msglen++] = idmsg;
3511
3512 if (cp->tag != NO_TAG) {
3513 char order = np->order;
3514
3515 /*
3516 ** Force ordered tag if necessary to avoid timeouts
3517 ** and to preserve interactivity.
3518 */
3519 if (lp && ktime_exp(lp->tags_stime)) {
3520 if (lp->tags_smap) {
3521 order = M_ORDERED_TAG;
3522 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){
3523 PRINT_ADDR(cmd,
3524 "ordered tag forced.\n");
3525 }
3526 }
3527 lp->tags_stime = ktime_get(3*HZ);
3528 lp->tags_smap = lp->tags_umap;
3529 }
3530
3531 if (order == 0) {
3532 /*
3533 ** Ordered write ops, unordered read ops.
3534 */
3535 switch (cmd->cmnd[0]) {
3536 case 0x08: /* READ_SMALL (6) */
3537 case 0x28: /* READ_BIG (10) */
3538 case 0xa8: /* READ_HUGE (12) */
3539 order = M_SIMPLE_TAG;
3540 break;
3541 default:
3542 order = M_ORDERED_TAG;
3543 }
3544 }
3545 msgptr[msglen++] = order;
3546 /*
3547 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1,
3548 ** since we may have to deal with devices that have
3549 ** problems with #TAG 0 or too great #TAG numbers.
3550 */
3551 msgptr[msglen++] = (cp->tag << 1) + 1;
3552 }
3553
3554 /*----------------------------------------------------
3555 **
3556 ** Build the data descriptors
3557 **
3558 **----------------------------------------------------
3559 */
3560
3561 direction = cmd->sc_data_direction;
3562 if (direction != DMA_NONE) {
3563 segments = ncr_scatter(np, cp, cp->cmd);
3564 if (segments < 0) {
3565 ncr_free_ccb(np, cp);
3566 return(DID_ERROR);
3567 }
3568 }
3569 else {
3570 cp->data_len = 0;
3571 segments = 0;
3572 }
3573
3574 /*---------------------------------------------------
3575 **
3576 ** negotiation required?
3577 **
3578 ** (nego_status is filled by ncr_prepare_nego())
3579 **
3580 **---------------------------------------------------
3581 */
3582
3583 cp->nego_status = 0;
3584
3585 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
3586 msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
3587 }
3588
3589 /*----------------------------------------------------
3590 **
3591 ** Determine xfer direction.
3592 **
3593 **----------------------------------------------------
3594 */
3595 if (!cp->data_len)
3596 direction = DMA_NONE;
3597
3598 /*
3599 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE
3600 ** but prepare alternate pointers for TO_DEVICE in case
3601 ** of our speculation will be just wrong.
3602 ** SCRIPTS will swap values if needed.
3603 */
3604 switch(direction) {
3605 case DMA_BIDIRECTIONAL:
3606 case DMA_TO_DEVICE:
3607 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
3608 if (segments <= MAX_SCATTERL)
3609 lastp = goalp - 8 - (segments * 16);
3610 else {
3611 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2);
3612 lastp -= (segments - MAX_SCATTERL) * 16;
3613 }
3614 if (direction != DMA_BIDIRECTIONAL)
3615 break;
3616 cp->phys.header.wgoalp = cpu_to_scr(goalp);
3617 cp->phys.header.wlastp = cpu_to_scr(lastp);
3618 /* fall through */
3619 case DMA_FROM_DEVICE:
3620 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
3621 if (segments <= MAX_SCATTERL)
3622 lastp = goalp - 8 - (segments * 16);
3623 else {
3624 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2);
3625 lastp -= (segments - MAX_SCATTERL) * 16;
3626 }
3627 break;
3628 default:
3629 case DMA_NONE:
3630 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data);
3631 break;
3632 }
3633
3634 /*
3635 ** Set all pointers values needed by SCRIPTS.
3636 ** If direction is unknown, start at data_io.
3637 */
3638 cp->phys.header.lastp = cpu_to_scr(lastp);
3639 cp->phys.header.goalp = cpu_to_scr(goalp);
3640
3641 if (direction == DMA_BIDIRECTIONAL)
3642 cp->phys.header.savep =
3643 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
3644 else
3645 cp->phys.header.savep= cpu_to_scr(lastp);
3646
3647 /*
3648 ** Save the initial data pointer in order to be able
3649 ** to redo the command.
3650 */
3651 cp->startp = cp->phys.header.savep;
3652
3653 /*----------------------------------------------------
3654 **
3655 ** fill in ccb
3656 **
3657 **----------------------------------------------------
3658 **
3659 **
3660 ** physical -> virtual backlink
3661 ** Generic SCSI command
3662 */
3663
3664 /*
3665 ** Startqueue
3666 */
3667 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
3668 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa));
3669 /*
3670 ** select
3671 */
3672 cp->phys.select.sel_id = sdev->id;
3673 cp->phys.select.sel_scntl3 = tp->wval;
3674 cp->phys.select.sel_sxfer = tp->sval;
3675 /*
3676 ** message
3677 */
3678 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
3679 cp->phys.smsg.size = cpu_to_scr(msglen);
3680
3681 /*
3682 ** command
3683 */
3684 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf)));
3685 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
3686 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
3687
3688 /*
3689 ** status
3690 */
3691 cp->actualquirks = 0;
3692 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3693 cp->scsi_status = S_ILLEGAL;
3694 cp->parity_status = 0;
3695
3696 cp->xerr_status = XE_OK;
3697#if 0
3698 cp->sync_status = tp->sval;
3699 cp->wide_status = tp->wval;
3700#endif
3701
3702 /*----------------------------------------------------
3703 **
3704 ** Critical region: start this job.
3705 **
3706 **----------------------------------------------------
3707 */
3708
3709 /* activate this job. */
3710 cp->magic = CCB_MAGIC;
3711
3712 /*
3713 ** insert next CCBs into start queue.
3714 ** 2 max at a time is enough to flush the CCB wait queue.
3715 */
3716 cp->auto_sense = 0;
3717 if (lp)
3718 ncr_start_next_ccb(np, lp, 2);
3719 else
3720 ncr_put_start_queue(np, cp);
3721
3722 /* Command is successfully queued. */
3723
3724 return DID_OK;
3725}
3726
3727
3728/*==========================================================
3729**
3730**
3731** Insert a CCB into the start queue and wake up the
3732** SCRIPTS processor.
3733**
3734**
3735**==========================================================
3736*/
3737
3738static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
3739{
3740 struct list_head *qp;
3741 struct ccb *cp;
3742
3743 if (lp->held_ccb)
3744 return;
3745
3746 while (maxn-- && lp->queuedccbs < lp->queuedepth) {
3747 qp = ncr_list_pop(&lp->wait_ccbq);
3748 if (!qp)
3749 break;
3750 ++lp->queuedccbs;
3751 cp = list_entry(qp, struct ccb, link_ccbq);
3752 list_add_tail(qp, &lp->busy_ccbq);
3753 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] =
3754 cpu_to_scr(CCB_PHYS (cp, restart));
3755 ncr_put_start_queue(np, cp);
3756 }
3757}
3758
3759static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
3760{
3761 u16 qidx;
3762
3763 /*
3764 ** insert into start queue.
3765 */
3766 if (!np->squeueput) np->squeueput = 1;
3767 qidx = np->squeueput + 2;
3768 if (qidx >= MAX_START + MAX_START) qidx = 1;
3769
3770 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
3771 MEMORY_BARRIER();
3772 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start));
3773
3774 np->squeueput = qidx;
3775 ++np->queuedccbs;
3776 cp->queued = 1;
3777
3778 if (DEBUG_FLAGS & DEBUG_QUEUE)
3779 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput);
3780
3781 /*
3782 ** Script processor may be waiting for reselect.
3783 ** Wake it up.
3784 */
3785 MEMORY_BARRIER();
3786 OUTB (nc_istat, SIGP);
3787}
3788
3789
3790static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
3791{
3792 u32 term;
3793 int retv = 0;
3794
3795 np->settle_time = ktime_get(settle_delay * HZ);
3796
3797 if (bootverbose > 1)
3798 printk("%s: resetting, "
3799 "command processing suspended for %d seconds\n",
3800 ncr_name(np), settle_delay);
3801
3802 ncr_chip_reset(np, 100);
3803 udelay(2000); /* The 895 needs time for the bus mode to settle */
3804 if (enab_int)
3805 OUTW (nc_sien, RST);
3806 /*
3807 ** Enable Tolerant, reset IRQD if present and
3808 ** properly set IRQ mode, prior to resetting the bus.
3809 */
3810 OUTB (nc_stest3, TE);
3811 OUTB (nc_scntl1, CRST);
3812 udelay(200);
3813
3814 if (!driver_setup.bus_check)
3815 goto out;
3816 /*
3817 ** Check for no terminators or SCSI bus shorts to ground.
3818 ** Read SCSI data bus, data parity bits and control signals.
3819 ** We are expecting RESET to be TRUE and other signals to be
3820 ** FALSE.
3821 */
3822
3823 term = INB(nc_sstat0);
3824 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3825 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3826 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3827 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3828 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3829
3830 if (!(np->features & FE_WIDE))
3831 term &= 0x3ffff;
3832
3833 if (term != (2<<7)) {
3834 printk("%s: suspicious SCSI data while resetting the BUS.\n",
3835 ncr_name(np));
3836 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3837 "0x%lx, expecting 0x%lx\n",
3838 ncr_name(np),
3839 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3840 (u_long)term, (u_long)(2<<7));
3841 if (driver_setup.bus_check == 1)
3842 retv = 1;
3843 }
3844out:
3845 OUTB (nc_scntl1, 0);
3846 return retv;
3847}
3848
3849/*
3850 * Start reset process.
3851 * If reset in progress do nothing.
3852 * The interrupt handler will reinitialize the chip.
3853 * The timeout handler will wait for settle_time before
3854 * clearing it and so resuming command processing.
3855 */
3856static void ncr_start_reset(struct ncb *np)
3857{
3858 if (!np->settle_time) {
3859 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
3860 }
3861}
3862
3863/*==========================================================
3864**
3865**
3866** Reset the SCSI BUS.
3867** This is called from the generic SCSI driver.
3868**
3869**
3870**==========================================================
3871*/
3872static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
3873{
3874/* struct scsi_device *device = cmd->device; */
3875 struct ccb *cp;
3876 int found;
3877
3878/*
3879 * Return immediately if reset is in progress.
3880 */
3881 if (np->settle_time) {
3882 return FAILED;
3883 }
3884/*
3885 * Start the reset process.
3886 * The script processor is then assumed to be stopped.
3887 * Commands will now be queued in the waiting list until a settle
3888 * delay of 2 seconds will be completed.
3889 */
3890 ncr_start_reset(np);
3891/*
3892 * First, look in the wakeup list
3893 */
3894 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
3895 /*
3896 ** look for the ccb of this command.
3897 */
3898 if (cp->host_status == HS_IDLE) continue;
3899 if (cp->cmd == cmd) {
3900 found = 1;
3901 break;
3902 }
3903 }
3904/*
3905 * Then, look in the waiting list
3906 */
3907 if (!found && retrieve_from_waiting_list(0, np, cmd))
3908 found = 1;
3909/*
3910 * Wake-up all awaiting commands with DID_RESET.
3911 */
3912 reset_waiting_list(np);
3913/*
3914 * Wake-up all pending commands with HS_RESET -> DID_RESET.
3915 */
3916 ncr_wakeup(np, HS_RESET);
3917/*
3918 * If the involved command was not in a driver queue, and the
3919 * scsi driver told us reset is synchronous, and the command is not
3920 * currently in the waiting list, complete it with DID_RESET status,
3921 * in order to keep it alive.
3922 */
3923 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
3924 cmd->result = ScsiResult(DID_RESET, 0);
3925 ncr_queue_done_cmd(np, cmd);
3926 }
3927
3928 return SUCCESS;
3929}
3930
3931#if 0 /* unused and broken.. */
3932/*==========================================================
3933**
3934**
3935** Abort an SCSI command.
3936** This is called from the generic SCSI driver.
3937**
3938**
3939**==========================================================
3940*/
3941static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
3942{
3943/* struct scsi_device *device = cmd->device; */
3944 struct ccb *cp;
3945 int found;
3946 int retv;
3947
3948/*
3949 * First, look for the scsi command in the waiting list
3950 */
3951 if (remove_from_waiting_list(np, cmd)) {
3952 cmd->result = ScsiResult(DID_ABORT, 0);
3953 ncr_queue_done_cmd(np, cmd);
3954 return SCSI_ABORT_SUCCESS;
3955 }
3956
3957/*
3958 * Then, look in the wakeup list
3959 */
3960 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) {
3961 /*
3962 ** look for the ccb of this command.
3963 */
3964 if (cp->host_status == HS_IDLE) continue;
3965 if (cp->cmd == cmd) {
3966 found = 1;
3967 break;
3968 }
3969 }
3970
3971 if (!found) {
3972 return SCSI_ABORT_NOT_RUNNING;
3973 }
3974
3975 if (np->settle_time) {
3976 return SCSI_ABORT_SNOOZE;
3977 }
3978
3979 /*
3980 ** If the CCB is active, patch schedule jumps for the
3981 ** script to abort the command.
3982 */
3983
3984 switch(cp->host_status) {
3985 case HS_BUSY:
3986 case HS_NEGOTIATE:
3987 printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp);
3988 cp->start.schedule.l_paddr =
3989 cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel));
3990 retv = SCSI_ABORT_PENDING;
3991 break;
3992 case HS_DISCONNECT:
3993 cp->restart.schedule.l_paddr =
3994 cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
3995 retv = SCSI_ABORT_PENDING;
3996 break;
3997 default:
3998 retv = SCSI_ABORT_NOT_RUNNING;
3999 break;
4000
4001 }
4002
4003 /*
4004 ** If there are no requests, the script
4005 ** processor will sleep on SEL_WAIT_RESEL.
4006 ** Let's wake it up, since it may have to work.
4007 */
4008 OUTB (nc_istat, SIGP);
4009
4010 return retv;
4011}
4012#endif
4013
4014static void ncr_detach(struct ncb *np)
4015{
4016 struct ccb *cp;
4017 struct tcb *tp;
4018 struct lcb *lp;
4019 int target, lun;
4020 int i;
4021 char inst_name[16];
4022
4023 /* Local copy so we don't access np after freeing it! */
4024 strlcpy(inst_name, ncr_name(np), sizeof(inst_name));
4025
4026 printk("%s: releasing host resources\n", ncr_name(np));
4027
4028/*
4029** Stop the ncr_timeout process
4030** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
4031*/
4032
4033#ifdef DEBUG_NCR53C8XX
4034 printk("%s: stopping the timer\n", ncr_name(np));
4035#endif
4036 np->release_stage = 1;
4037 for (i = 50 ; i && np->release_stage != 2 ; i--)
4038 mdelay(100);
4039 if (np->release_stage != 2)
4040 printk("%s: the timer seems to be already stopped\n", ncr_name(np));
4041 else np->release_stage = 2;
4042
4043/*
4044** Disable chip interrupts
4045*/
4046
4047#ifdef DEBUG_NCR53C8XX
4048 printk("%s: disabling chip interrupts\n", ncr_name(np));
4049#endif
4050 OUTW (nc_sien , 0);
4051 OUTB (nc_dien , 0);
4052
4053 /*
4054 ** Reset NCR chip
4055 ** Restore bios setting for automatic clock detection.
4056 */
4057
4058 printk("%s: resetting chip\n", ncr_name(np));
4059 ncr_chip_reset(np, 100);
4060
4061 OUTB(nc_dmode, np->sv_dmode);
4062 OUTB(nc_dcntl, np->sv_dcntl);
4063 OUTB(nc_ctest0, np->sv_ctest0);
4064 OUTB(nc_ctest3, np->sv_ctest3);
4065 OUTB(nc_ctest4, np->sv_ctest4);
4066 OUTB(nc_ctest5, np->sv_ctest5);
4067 OUTB(nc_gpcntl, np->sv_gpcntl);
4068 OUTB(nc_stest2, np->sv_stest2);
4069
4070 ncr_selectclock(np, np->sv_scntl3);
4071
4072 /*
4073 ** Free allocated ccb(s)
4074 */
4075
4076 while ((cp=np->ccb->link_ccb) != NULL) {
4077 np->ccb->link_ccb = cp->link_ccb;
4078 if (cp->host_status) {
4079 printk("%s: shall free an active ccb (host_status=%d)\n",
4080 ncr_name(np), cp->host_status);
4081 }
4082#ifdef DEBUG_NCR53C8XX
4083 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp);
4084#endif
4085 m_free_dma(cp, sizeof(*cp), "CCB");
4086 }
4087
4088 /* Free allocated tp(s) */
4089
4090 for (target = 0; target < MAX_TARGET ; target++) {
4091 tp=&np->target[target];
4092 for (lun = 0 ; lun < MAX_LUN ; lun++) {
4093 lp = tp->lp[lun];
4094 if (lp) {
4095#ifdef DEBUG_NCR53C8XX
4096 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp);
4097#endif
4098 if (lp->jump_ccb != &lp->jump_ccb_0)
4099 m_free_dma(lp->jump_ccb,256,"JUMP_CCB");
4100 m_free_dma(lp, sizeof(*lp), "LCB");
4101 }
4102 }
4103 }
4104
4105 if (np->scripth0)
4106 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
4107 if (np->script0)
4108 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
4109 if (np->ccb)
4110 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
4111 m_free_dma(np, sizeof(struct ncb), "NCB");
4112
4113 printk("%s: host resources successfully released\n", inst_name);
4114}
4115
4116/*==========================================================
4117**
4118**
4119** Complete execution of a SCSI command.
4120** Signal completion to the generic SCSI driver.
4121**
4122**
4123**==========================================================
4124*/
4125
4126void ncr_complete (struct ncb *np, struct ccb *cp)
4127{
4128 struct scsi_cmnd *cmd;
4129 struct tcb *tp;
4130 struct lcb *lp;
4131
4132 /*
4133 ** Sanity check
4134 */
4135
4136 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd)
4137 return;
4138
4139 /*
4140 ** Print minimal debug information.
4141 */
4142
4143 if (DEBUG_FLAGS & DEBUG_TINY)
4144 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp,
4145 cp->host_status,cp->scsi_status);
4146
4147 /*
4148 ** Get command, target and lun pointers.
4149 */
4150
4151 cmd = cp->cmd;
4152 cp->cmd = NULL;
4153 tp = &np->target[cmd->device->id];
4154 lp = tp->lp[cmd->device->lun];
4155
4156 /*
4157 ** We donnot queue more than 1 ccb per target
4158 ** with negotiation at any time. If this ccb was
4159 ** used for negotiation, clear this info in the tcb.
4160 */
4161
4162 if (cp == tp->nego_cp)
4163 tp->nego_cp = NULL;
4164
4165 /*
4166 ** If auto-sense performed, change scsi status.
4167 */
4168 if (cp->auto_sense) {
4169 cp->scsi_status = cp->auto_sense;
4170 }
4171
4172 /*
4173 ** If we were recovering from queue full or performing
4174 ** auto-sense, requeue skipped CCBs to the wait queue.
4175 */
4176
4177 if (lp && lp->held_ccb) {
4178 if (cp == lp->held_ccb) {
4179 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq);
4180 lp->held_ccb = NULL;
4181 }
4182 }
4183
4184 /*
4185 ** Check for parity errors.
4186 */
4187
4188 if (cp->parity_status > 1) {
4189 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status);
4190 }
4191
4192 /*
4193 ** Check for extended errors.
4194 */
4195
4196 if (cp->xerr_status != XE_OK) {
4197 switch (cp->xerr_status) {
4198 case XE_EXTRA_DATA:
4199 PRINT_ADDR(cmd, "extraneous data discarded.\n");
4200 break;
4201 case XE_BAD_PHASE:
4202 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n");
4203 break;
4204 default:
4205 PRINT_ADDR(cmd, "extended error %d.\n",
4206 cp->xerr_status);
4207 break;
4208 }
4209 if (cp->host_status==HS_COMPLETE)
4210 cp->host_status = HS_FAIL;
4211 }
4212
4213 /*
4214 ** Print out any error for debugging purpose.
4215 */
4216 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4217 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) {
4218 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x "
4219 "scsi_status=%x\n", cmd->cmnd[0],
4220 cp->host_status, cp->scsi_status);
4221 }
4222 }
4223
4224 /*
4225 ** Check the status.
4226 */
4227 if ( (cp->host_status == HS_COMPLETE)
4228 && (cp->scsi_status == S_GOOD ||
4229 cp->scsi_status == S_COND_MET)) {
4230 /*
4231 * All went well (GOOD status).
4232 * CONDITION MET status is returned on
4233 * `Pre-Fetch' or `Search data' success.
4234 */
4235 cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4236
4237 /*
4238 ** @RESID@
4239 ** Could dig out the correct value for resid,
4240 ** but it would be quite complicated.
4241 */
4242 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */
4243
4244 /*
4245 ** Allocate the lcb if not yet.
4246 */
4247 if (!lp)
4248 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun);
4249
4250 tp->bytes += cp->data_len;
4251 tp->transfers ++;
4252
4253 /*
4254 ** If tags was reduced due to queue full,
4255 ** increase tags if 1000 good status received.
4256 */
4257 if (lp && lp->usetags && lp->numtags < lp->maxtags) {
4258 ++lp->num_good;
4259 if (lp->num_good >= 1000) {
4260 lp->num_good = 0;
4261 ++lp->numtags;
4262 ncr_setup_tags (np, cmd->device);
4263 }
4264 }
4265 } else if ((cp->host_status == HS_COMPLETE)
4266 && (cp->scsi_status == S_CHECK_COND)) {
4267 /*
4268 ** Check condition code
4269 */
4270 cmd->result = ScsiResult(DID_OK, S_CHECK_COND);
4271
4272 /*
4273 ** Copy back sense data to caller's buffer.
4274 */
4275 memcpy(cmd->sense_buffer, cp->sense_buf,
4276 min(sizeof(cmd->sense_buffer), sizeof(cp->sense_buf)));
4277
4278 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
4279 u_char * p = (u_char*) & cmd->sense_buffer;
4280 int i;
4281 PRINT_ADDR(cmd, "sense data:");
4282 for (i=0; i<14; i++) printk (" %x", *p++);
4283 printk (".\n");
4284 }
4285 } else if ((cp->host_status == HS_COMPLETE)
4286 && (cp->scsi_status == S_CONFLICT)) {
4287 /*
4288 ** Reservation Conflict condition code
4289 */
4290 cmd->result = ScsiResult(DID_OK, S_CONFLICT);
4291
4292 } else if ((cp->host_status == HS_COMPLETE)
4293 && (cp->scsi_status == S_BUSY ||
4294 cp->scsi_status == S_QUEUE_FULL)) {
4295
4296 /*
4297 ** Target is busy.
4298 */
4299 cmd->result = ScsiResult(DID_OK, cp->scsi_status);
4300
4301 } else if ((cp->host_status == HS_SEL_TIMEOUT)
4302 || (cp->host_status == HS_TIMEOUT)) {
4303
4304 /*
4305 ** No response
4306 */
4307 cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status);
4308
4309 } else if (cp->host_status == HS_RESET) {
4310
4311 /*
4312 ** SCSI bus reset
4313 */
4314 cmd->result = ScsiResult(DID_RESET, cp->scsi_status);
4315
4316 } else if (cp->host_status == HS_ABORTED) {
4317
4318 /*
4319 ** Transfer aborted
4320 */
4321 cmd->result = ScsiResult(DID_ABORT, cp->scsi_status);
4322
4323 } else {
4324
4325 /*
4326 ** Other protocol messes
4327 */
4328 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n",
4329 cp->host_status, cp->scsi_status, cp);
4330
4331 cmd->result = ScsiResult(DID_ERROR, cp->scsi_status);
4332 }
4333
4334 /*
4335 ** trace output
4336 */
4337
4338 if (tp->usrflag & UF_TRACE) {
4339 u_char * p;
4340 int i;
4341 PRINT_ADDR(cmd, " CMD:");
4342 p = (u_char*) &cmd->cmnd[0];
4343 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++);
4344
4345 if (cp->host_status==HS_COMPLETE) {
4346 switch (cp->scsi_status) {
4347 case S_GOOD:
4348 printk (" GOOD");
4349 break;
4350 case S_CHECK_COND:
4351 printk (" SENSE:");
4352 p = (u_char*) &cmd->sense_buffer;
4353 for (i=0; i<14; i++)
4354 printk (" %x", *p++);
4355 break;
4356 default:
4357 printk (" STAT: %x\n", cp->scsi_status);
4358 break;
4359 }
4360 } else printk (" HOSTERROR: %x", cp->host_status);
4361 printk ("\n");
4362 }
4363
4364 /*
4365 ** Free this ccb
4366 */
4367 ncr_free_ccb (np, cp);
4368
4369 /*
4370 ** requeue awaiting scsi commands for this lun.
4371 */
4372 if (lp && lp->queuedccbs < lp->queuedepth &&
4373 !list_empty(&lp->wait_ccbq))
4374 ncr_start_next_ccb(np, lp, 2);
4375
4376 /*
4377 ** requeue awaiting scsi commands for this controller.
4378 */
4379 if (np->waiting_list)
4380 requeue_waiting_list(np);
4381
4382 /*
4383 ** signal completion to generic driver.
4384 */
4385 ncr_queue_done_cmd(np, cmd);
4386}
4387
4388/*==========================================================
4389**
4390**
4391** Signal all (or one) control block done.
4392**
4393**
4394**==========================================================
4395*/
4396
4397/*
4398** This CCB has been skipped by the NCR.
4399** Queue it in the correponding unit queue.
4400*/
4401static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
4402{
4403 struct tcb *tp = &np->target[cp->target];
4404 struct lcb *lp = tp->lp[cp->lun];
4405
4406 if (lp && cp != np->ccb) {
4407 cp->host_status &= ~HS_SKIPMASK;
4408 cp->start.schedule.l_paddr =
4409 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
4410 list_del(&cp->link_ccbq);
4411 list_add_tail(&cp->link_ccbq, &lp->skip_ccbq);
4412 if (cp->queued) {
4413 --lp->queuedccbs;
4414 }
4415 }
4416 if (cp->queued) {
4417 --np->queuedccbs;
4418 cp->queued = 0;
4419 }
4420}
4421
4422/*
4423** The NCR has completed CCBs.
4424** Look at the DONE QUEUE if enabled, otherwise scan all CCBs
4425*/
4426void ncr_wakeup_done (struct ncb *np)
4427{
4428 struct ccb *cp;
4429#ifdef SCSI_NCR_CCB_DONE_SUPPORT
4430 int i, j;
4431
4432 i = np->ccb_done_ic;
4433 while (1) {
4434 j = i+1;
4435 if (j >= MAX_DONE)
4436 j = 0;
4437
4438 cp = np->ccb_done[j];
4439 if (!CCB_DONE_VALID(cp))
4440 break;
4441
4442 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
4443 np->scripth->done_queue[5*j + 4] =
4444 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
4445 MEMORY_BARRIER();
4446 np->scripth->done_queue[5*i + 4] =
4447 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
4448
4449 if (cp->host_status & HS_DONEMASK)
4450 ncr_complete (np, cp);
4451 else if (cp->host_status & HS_SKIPMASK)
4452 ncr_ccb_skipped (np, cp);
4453
4454 i = j;
4455 }
4456 np->ccb_done_ic = i;
4457#else
4458 cp = np->ccb;
4459 while (cp) {
4460 if (cp->host_status & HS_DONEMASK)
4461 ncr_complete (np, cp);
4462 else if (cp->host_status & HS_SKIPMASK)
4463 ncr_ccb_skipped (np, cp);
4464 cp = cp->link_ccb;
4465 }
4466#endif
4467}
4468
4469/*
4470** Complete all active CCBs.
4471*/
4472void ncr_wakeup (struct ncb *np, u_long code)
4473{
4474 struct ccb *cp = np->ccb;
4475
4476 while (cp) {
4477 if (cp->host_status != HS_IDLE) {
4478 cp->host_status = code;
4479 ncr_complete (np, cp);
4480 }
4481 cp = cp->link_ccb;
4482 }
4483}
4484
4485/*
4486** Reset ncr chip.
4487*/
4488
4489/* Some initialisation must be done immediately following reset, for 53c720,
4490 * at least. EA (dcntl bit 5) isn't set here as it is set once only in
4491 * the _detect function.
4492 */
4493static void ncr_chip_reset(struct ncb *np, int delay)
4494{
4495 OUTB (nc_istat, SRST);
4496 udelay(delay);
4497 OUTB (nc_istat, 0 );
4498
4499 if (np->features & FE_EHP)
4500 OUTB (nc_ctest0, EHP);
4501 if (np->features & FE_MUX)
4502 OUTB (nc_ctest4, MUX);
4503}
4504
4505
4506/*==========================================================
4507**
4508**
4509** Start NCR chip.
4510**
4511**
4512**==========================================================
4513*/
4514
4515void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
4516{
4517 int i;
4518
4519 /*
4520 ** Reset chip if asked, otherwise just clear fifos.
4521 */
4522
4523 if (reset) {
4524 OUTB (nc_istat, SRST);
4525 udelay(100);
4526 }
4527 else {
4528 OUTB (nc_stest3, TE|CSF);
4529 OUTONB (nc_ctest3, CLF);
4530 }
4531
4532 /*
4533 ** Message.
4534 */
4535
4536 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg);
4537
4538 /*
4539 ** Clear Start Queue
4540 */
4541 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
4542 for (i = 1; i < MAX_START + MAX_START; i += 2)
4543 np->scripth0->tryloop[i] =
4544 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
4545
4546 /*
4547 ** Start at first entry.
4548 */
4549 np->squeueput = 0;
4550 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop));
4551
4552#ifdef SCSI_NCR_CCB_DONE_SUPPORT
4553 /*
4554 ** Clear Done Queue
4555 */
4556 for (i = 0; i < MAX_DONE; i++) {
4557 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
4558 np->scripth0->done_queue[5*i + 4] =
4559 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
4560 }
4561#endif
4562
4563 /*
4564 ** Start at first entry.
4565 */
4566 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue));
4567 np->ccb_done_ic = MAX_DONE-1;
4568 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] =
4569 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
4570
4571 /*
4572 ** Wakeup all pending jobs.
4573 */
4574 ncr_wakeup (np, code);
4575
4576 /*
4577 ** Init chip.
4578 */
4579
4580 /*
4581 ** Remove reset; big delay because the 895 needs time for the
4582 ** bus mode to settle
4583 */
4584 ncr_chip_reset(np, 2000);
4585
4586 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
4587 /* full arb., ena parity, par->ATN */
4588 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
4589
4590 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4591
4592 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
4593 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
4594 OUTB (nc_istat , SIGP ); /* Signal Process */
4595 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
4596 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
4597
4598 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
4599 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */
4600 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
4601 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
4602
4603 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */
4604 OUTB (nc_stest3, TE); /* TolerANT enable */
4605 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */
4606
4607 /*
4608 ** Disable disconnects.
4609 */
4610
4611 np->disc = 0;
4612
4613 /*
4614 ** Enable GPIO0 pin for writing if LED support.
4615 */
4616
4617 if (np->features & FE_LED0) {
4618 OUTOFFB (nc_gpcntl, 0x01);
4619 }
4620
4621 /*
4622 ** enable ints
4623 */
4624
4625 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
4626 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4627
4628 /*
4629 ** Fill in target structure.
4630 ** Reinitialize usrsync.
4631 ** Reinitialize usrwide.
4632 ** Prepare sync negotiation according to actual SCSI bus mode.
4633 */
4634
4635 for (i=0;i<MAX_TARGET;i++) {
4636 struct tcb *tp = &np->target[i];
4637
4638 tp->sval = 0;
4639 tp->wval = np->rv_scntl3;
4640
4641 if (tp->usrsync != 255) {
4642 if (tp->usrsync <= np->maxsync) {
4643 if (tp->usrsync < np->minsync) {
4644 tp->usrsync = np->minsync;
4645 }
4646 }
4647 else
4648 tp->usrsync = 255;
4649 }
4650
4651 if (tp->usrwide > np->maxwide)
4652 tp->usrwide = np->maxwide;
4653
4654 }
4655
4656 /*
4657 ** Start script processor.
4658 */
4659 if (np->paddr2) {
4660 if (bootverbose)
4661 printk ("%s: Downloading SCSI SCRIPTS.\n",
4662 ncr_name(np));
4663 OUTL (nc_scratcha, vtobus(np->script0));
4664 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram));
4665 }
4666 else
4667 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
4668}
4669
4670/*==========================================================
4671**
4672** Prepare the negotiation values for wide and
4673** synchronous transfers.
4674**
4675**==========================================================
4676*/
4677
4678static void ncr_negotiate (struct ncb* np, struct tcb* tp)
4679{
4680 /*
4681 ** minsync unit is 4ns !
4682 */
4683
4684 u_long minsync = tp->usrsync;
4685
4686 /*
4687 ** SCSI bus mode limit
4688 */
4689
4690 if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
4691 if (minsync < 12) minsync = 12;
4692 }
4693
4694 /*
4695 ** our limit ..
4696 */
4697
4698 if (minsync < np->minsync)
4699 minsync = np->minsync;
4700
4701 /*
4702 ** divider limit
4703 */
4704
4705 if (minsync > np->maxsync)
4706 minsync = 255;
4707
4708 if (tp->maxoffs > np->maxoffs)
4709 tp->maxoffs = np->maxoffs;
4710
4711 tp->minsync = minsync;
4712 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0);
4713
4714 /*
4715 ** period=0: has to negotiate sync transfer
4716 */
4717
4718 tp->period=0;
4719
4720 /*
4721 ** widedone=0: has to negotiate wide transfer
4722 */
4723 tp->widedone=0;
4724}
4725
4726/*==========================================================
4727**
4728** Get clock factor and sync divisor for a given
4729** synchronous factor period.
4730** Returns the clock factor (in sxfer) and scntl3
4731** synchronous divisor field.
4732**
4733**==========================================================
4734*/
4735
4736static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
4737{
4738 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4739 int div = np->clock_divn; /* Number of divisors supported */
4740 u_long fak; /* Sync factor in sxfer */
4741 u_long per; /* Period in tenths of ns */
4742 u_long kpc; /* (per * clk) */
4743
4744 /*
4745 ** Compute the synchronous period in tenths of nano-seconds
4746 */
4747 if (sfac <= 10) per = 250;
4748 else if (sfac == 11) per = 303;
4749 else if (sfac == 12) per = 500;
4750 else per = 40 * sfac;
4751
4752 /*
4753 ** Look for the greatest clock divisor that allows an
4754 ** input speed faster than the period.
4755 */
4756 kpc = per * clk;
4757 while (--div >= 0)
4758 if (kpc >= (div_10M[div] << 2)) break;
4759
4760 /*
4761 ** Calculate the lowest clock factor that allows an output
4762 ** speed not faster than the period.
4763 */
4764 fak = (kpc - 1) / div_10M[div] + 1;
4765
4766#if 0 /* This optimization does not seem very useful */
4767
4768 per = (fak * div_10M[div]) / clk;
4769
4770 /*
4771 ** Why not to try the immediate lower divisor and to choose
4772 ** the one that allows the fastest output speed ?
4773 ** We don't want input speed too much greater than output speed.
4774 */
4775 if (div >= 1 && fak < 8) {
4776 u_long fak2, per2;
4777 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4778 per2 = (fak2 * div_10M[div-1]) / clk;
4779 if (per2 < per && fak2 <= 8) {
4780 fak = fak2;
4781 per = per2;
4782 --div;
4783 }
4784 }
4785#endif
4786
4787 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4788
4789 /*
4790 ** Compute and return sync parameters for the ncr
4791 */
4792 *fakp = fak - 4;
4793 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4794}
4795
4796
4797/*==========================================================
4798**
4799** Set actual values, sync status and patch all ccbs of
4800** a target according to new sync/wide agreement.
4801**
4802**==========================================================
4803*/
4804
4805static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
4806{
4807 struct ccb *cp;
4808 struct tcb *tp = &np->target[target];
4809
4810 /*
4811 ** set actual value and sync_status
4812 */
4813 OUTB (nc_sxfer, tp->sval);
4814 np->sync_st = tp->sval;
4815 OUTB (nc_scntl3, tp->wval);
4816 np->wide_st = tp->wval;
4817
4818 /*
4819 ** patch ALL ccbs of this target.
4820 */
4821 for (cp = np->ccb; cp; cp = cp->link_ccb) {
4822 if (!cp->cmd) continue;
4823 if (cp->cmd->device->id != target) continue;
4824#if 0
4825 cp->sync_status = tp->sval;
4826 cp->wide_status = tp->wval;
4827#endif
4828 cp->phys.select.sel_scntl3 = tp->wval;
4829 cp->phys.select.sel_sxfer = tp->sval;
4830 }
4831}
4832
4833/*==========================================================
4834**
4835** Switch sync mode for current job and it's target
4836**
4837**==========================================================
4838*/
4839
4840static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
4841{
4842 struct scsi_cmnd *cmd = cp->cmd;
4843 struct tcb *tp;
4844 u_char target = INB (nc_sdid) & 0x0f;
4845 u_char idiv;
4846
4847 BUG_ON(target != (cmd->device->id & 0xf));
4848
4849 tp = &np->target[target];
4850
4851 if (!scntl3 || !(sxfer & 0x1f))
4852 scntl3 = np->rv_scntl3;
4853 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07);
4854
4855 /*
4856 ** Deduce the value of controller sync period from scntl3.
4857 ** period is in tenths of nano-seconds.
4858 */
4859
4860 idiv = ((scntl3 >> 4) & 0x7);
4861 if ((sxfer & 0x1f) && idiv)
4862 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
4863 else
4864 tp->period = 0xffff;
4865
4866 /* Stop there if sync parameters are unchanged */
4867 if (tp->sval == sxfer && tp->wval == scntl3)
4868 return;
4869 tp->sval = sxfer;
4870 tp->wval = scntl3;
4871
4872 if (sxfer & 0x01f) {
4873 /* Disable extended Sreq/Sack filtering */
4874 if (tp->period <= 2000)
4875 OUTOFFB(nc_stest2, EXT);
4876 }
4877
4878 spi_display_xfer_agreement(tp->starget);
4879
4880 /*
4881 ** set actual value and sync_status
4882 ** patch ALL ccbs of this target.
4883 */
4884 ncr_set_sync_wide_status(np, target);
4885}
4886
4887/*==========================================================
4888**
4889** Switch wide mode for current job and it's target
4890** SCSI specs say: a SCSI device that accepts a WDTR
4891** message shall reset the synchronous agreement to
4892** asynchronous mode.
4893**
4894**==========================================================
4895*/
4896
4897static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
4898{
4899 struct scsi_cmnd *cmd = cp->cmd;
4900 u16 target = INB (nc_sdid) & 0x0f;
4901 struct tcb *tp;
4902 u_char scntl3;
4903 u_char sxfer;
4904
4905 BUG_ON(target != (cmd->device->id & 0xf));
4906
4907 tp = &np->target[target];
4908 tp->widedone = wide+1;
4909 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
4910
4911 sxfer = ack ? 0 : tp->sval;
4912
4913 /*
4914 ** Stop there if sync/wide parameters are unchanged
4915 */
4916 if (tp->sval == sxfer && tp->wval == scntl3) return;
4917 tp->sval = sxfer;
4918 tp->wval = scntl3;
4919
4920 /*
4921 ** Bells and whistles ;-)
4922 */
4923 if (bootverbose >= 2) {
4924 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n",
4925 (scntl3 & EWS) ? "en" : "dis");
4926 }
4927
4928 /*
4929 ** set actual value and sync_status
4930 ** patch ALL ccbs of this target.
4931 */
4932 ncr_set_sync_wide_status(np, target);
4933}
4934
4935/*==========================================================
4936**
4937** Switch tagged mode for a target.
4938**
4939**==========================================================
4940*/
4941
4942static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev)
4943{
4944 unsigned char tn = sdev->id, ln = sdev->lun;
4945 struct tcb *tp = &np->target[tn];
4946 struct lcb *lp = tp->lp[ln];
4947 u_char reqtags, maxdepth;
4948
4949 /*
4950 ** Just in case ...
4951 */
4952 if ((!tp) || (!lp) || !sdev)
4953 return;
4954
4955 /*
4956 ** If SCSI device queue depth is not yet set, leave here.
4957 */
4958 if (!lp->scdev_depth)
4959 return;
4960
4961 /*
4962 ** Donnot allow more tags than the SCSI driver can queue
4963 ** for this device.
4964 ** Donnot allow more tags than we can handle.
4965 */
4966 maxdepth = lp->scdev_depth;
4967 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
4968 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
4969 if (lp->numtags > maxdepth) lp->numtags = maxdepth;
4970
4971 /*
4972 ** only devices conformant to ANSI Version >= 2
4973 ** only devices capable of tagged commands
4974 ** only if enabled by user ..
4975 */
4976 if (sdev->tagged_supported && lp->numtags > 1) {
4977 reqtags = lp->numtags;
4978 } else {
4979 reqtags = 1;
4980 }
4981
4982 /*
4983 ** Update max number of tags
4984 */
4985 lp->numtags = reqtags;
4986 if (lp->numtags > lp->maxtags)
4987 lp->maxtags = lp->numtags;
4988
4989 /*
4990 ** If we want to switch tag mode, we must wait
4991 ** for no CCB to be active.
4992 */
4993 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
4994 if (lp->queuedepth == reqtags) /* Already announced */
4995 return;
4996 lp->queuedepth = reqtags;
4997 }
4998 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
4999 lp->queuedepth = reqtags;
5000 return;
5001 }
5002 else { /* Want to switch tag mode */
5003 if (lp->busyccbs) /* If not yet safe, return */
5004 return;
5005 lp->queuedepth = reqtags;
5006 lp->usetags = reqtags > 1 ? 1 : 0;
5007 }
5008
5009 /*
5010 ** Patch the lun mini-script, according to tag mode.
5011 */
5012 lp->jump_tag.l_paddr = lp->usetags?
5013 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
5014 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
5015
5016 /*
5017 ** Announce change to user.
5018 */
5019 if (bootverbose) {
5020 if (lp->usetags) {
5021 dev_info(&sdev->sdev_gendev,
5022 "tagged command queue depth set to %d\n",
5023 reqtags);
5024 } else {
5025 dev_info(&sdev->sdev_gendev,
5026 "tagged command queueing disabled\n");
5027 }
5028 }
5029}
5030
5031/*==========================================================
5032**
5033**
5034** ncr timeout handler.
5035**
5036**
5037**==========================================================
5038**
5039** Misused to keep the driver running when
5040** interrupts are not configured correctly.
5041**
5042**----------------------------------------------------------
5043*/
5044
5045static void ncr_timeout (struct ncb *np)
5046{
5047 u_long thistime = ktime_get(0);
5048
5049 /*
5050 ** If release process in progress, let's go
5051 ** Set the release stage from 1 to 2 to synchronize
5052 ** with the release process.
5053 */
5054
5055 if (np->release_stage) {
5056 if (np->release_stage == 1) np->release_stage = 2;
5057 return;
5058 }
5059
5060 np->timer.expires = ktime_get(SCSI_NCR_TIMER_INTERVAL);
5061 add_timer(&np->timer);
5062
5063 /*
5064 ** If we are resetting the ncr, wait for settle_time before
5065 ** clearing it. Then command processing will be resumed.
5066 */
5067 if (np->settle_time) {
5068 if (np->settle_time <= thistime) {
5069 if (bootverbose > 1)
5070 printk("%s: command processing resumed\n", ncr_name(np));
5071 np->settle_time = 0;
5072 np->disc = 1;
5073 requeue_waiting_list(np);
5074 }
5075 return;
5076 }
5077
5078 /*
5079 ** Since the generic scsi driver only allows us 0.5 second
5080 ** to perform abort of a command, we must look at ccbs about
5081 ** every 0.25 second.
5082 */
5083 if (np->lasttime + 4*HZ < thistime) {
5084 /*
5085 ** block ncr interrupts
5086 */
5087 np->lasttime = thistime;
5088 }
5089
5090#ifdef SCSI_NCR_BROKEN_INTR
5091 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5092
5093 /*
5094 ** Process pending interrupts.
5095 */
5096 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
5097 ncr_exception (np);
5098 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
5099 }
5100#endif /* SCSI_NCR_BROKEN_INTR */
5101}
5102
5103/*==========================================================
5104**
5105** log message for real hard errors
5106**
5107** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5108** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5109**
5110** exception register:
5111** ds: dstat
5112** si: sist
5113**
5114** SCSI bus lines:
5115** so: control lines as driver by NCR.
5116** si: control lines as seen by NCR.
5117** sd: scsi data lines as seen by NCR.
5118**
5119** wide/fastmode:
5120** sxfer: (see the manual)
5121** scntl3: (see the manual)
5122**
5123** current script command:
5124** dsp: script address (relative to start of script).
5125** dbc: first word of script command.
5126**
5127** First 16 register of the chip:
5128** r0..rf
5129**
5130**==========================================================
5131*/
5132
5133static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
5134{
5135 u32 dsp;
5136 int script_ofs;
5137 int script_size;
5138 char *script_name;
5139 u_char *script_base;
5140 int i;
5141
5142 dsp = INL (nc_dsp);
5143
5144 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
5145 script_ofs = dsp - np->p_script;
5146 script_size = sizeof(struct script);
5147 script_base = (u_char *) np->script0;
5148 script_name = "script";
5149 }
5150 else if (np->p_scripth < dsp &&
5151 dsp <= np->p_scripth + sizeof(struct scripth)) {
5152 script_ofs = dsp - np->p_scripth;
5153 script_size = sizeof(struct scripth);
5154 script_base = (u_char *) np->scripth0;
5155 script_name = "scripth";
5156 } else {
5157 script_ofs = dsp;
5158 script_size = 0;
5159 script_base = NULL;
5160 script_name = "mem";
5161 }
5162
5163 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5164 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5165 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5166 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5167 (unsigned)INL (nc_dbc));
5168
5169 if (((script_ofs & 3) == 0) &&
5170 (unsigned)script_ofs < script_size) {
5171 printk ("%s: script cmd = %08x\n", ncr_name(np),
5172 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
5173 }
5174
5175 printk ("%s: regdump:", ncr_name(np));
5176 for (i=0; i<16;i++)
5177 printk (" %02x", (unsigned)INB_OFF(i));
5178 printk (".\n");
5179}
5180
5181/*============================================================
5182**
5183** ncr chip exception handler.
5184**
5185**============================================================
5186**
5187** In normal cases, interrupt conditions occur one at a
5188** time. The ncr is able to stack in some extra registers
5189** other interrupts that will occurs after the first one.
5190** But severall interrupts may occur at the same time.
5191**
5192** We probably should only try to deal with the normal
5193** case, but it seems that multiple interrupts occur in
5194** some cases that are not abnormal at all.
5195**
5196** The most frequent interrupt condition is Phase Mismatch.
5197** We should want to service this interrupt quickly.
5198** A SCSI parity error may be delivered at the same time.
5199** The SIR interrupt is not very frequent in this driver,
5200** since the INTFLY is likely used for command completion
5201** signaling.
5202** The Selection Timeout interrupt may be triggered with
5203** IID and/or UDC.
5204** The SBMC interrupt (SCSI Bus Mode Change) may probably
5205** occur at any time.
5206**
5207** This handler try to deal as cleverly as possible with all
5208** the above.
5209**
5210**============================================================
5211*/
5212
5213void ncr_exception (struct ncb *np)
5214{
5215 u_char istat, dstat;
5216 u16 sist;
5217 int i;
5218
5219 /*
5220 ** interrupt on the fly ?
5221 ** Since the global header may be copied back to a CCB
5222 ** using a posted PCI memory write, the last operation on
5223 ** the istat register is a READ in order to flush posted
5224 ** PCI write commands.
5225 */
5226 istat = INB (nc_istat);
5227 if (istat & INTF) {
5228 OUTB (nc_istat, (istat & SIGP) | INTF);
5229 istat = INB (nc_istat);
5230 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
5231 ncr_wakeup_done (np);
5232 }
5233
5234 if (!(istat & (SIP|DIP)))
5235 return;
5236
5237 if (istat & CABRT)
5238 OUTB (nc_istat, CABRT);
5239
5240 /*
5241 ** Steinbach's Guideline for Systems Programming:
5242 ** Never test for an error condition you don't know how to handle.
5243 */
5244
5245 sist = (istat & SIP) ? INW (nc_sist) : 0;
5246 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5247
5248 if (DEBUG_FLAGS & DEBUG_TINY)
5249 printk ("<%d|%x:%x|%x:%x>",
5250 (int)INB(nc_scr0),
5251 dstat,sist,
5252 (unsigned)INL(nc_dsp),
5253 (unsigned)INL(nc_dbc));
5254
5255 /*========================================================
5256 ** First, interrupts we want to service cleanly.
5257 **
5258 ** Phase mismatch is the most frequent interrupt, and
5259 ** so we have to service it as quickly and as cleanly
5260 ** as possible.
5261 ** Programmed interrupts are rarely used in this driver,
5262 ** but we must handle them cleanly anyway.
5263 ** We try to deal with PAR and SBMC combined with
5264 ** some other interrupt(s).
5265 **=========================================================
5266 */
5267
5268 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) &&
5269 !(dstat & (MDPE|BF|ABRT|IID))) {
5270 if ((sist & SBMC) && ncr_int_sbmc (np))
5271 return;
5272 if ((sist & PAR) && ncr_int_par (np))
5273 return;
5274 if (sist & MA) {
5275 ncr_int_ma (np);
5276 return;
5277 }
5278 if (dstat & SIR) {
5279 ncr_int_sir (np);
5280 return;
5281 }
5282 /*
5283 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2.
5284 */
5285 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) {
5286 printk( "%s: unknown interrupt(s) ignored, "
5287 "ISTAT=%x DSTAT=%x SIST=%x\n",
5288 ncr_name(np), istat, dstat, sist);
5289 return;
5290 }
5291 OUTONB_STD ();
5292 return;
5293 }
5294
5295 /*========================================================
5296 ** Now, interrupts that need some fixing up.
5297 ** Order and multiple interrupts is so less important.
5298 **
5299 ** If SRST has been asserted, we just reset the chip.
5300 **
5301 ** Selection is intirely handled by the chip. If the
5302 ** chip says STO, we trust it. Seems some other
5303 ** interrupts may occur at the same time (UDC, IID), so
5304 ** we ignore them. In any case we do enough fix-up
5305 ** in the service routine.
5306 ** We just exclude some fatal dma errors.
5307 **=========================================================
5308 */
5309
5310 if (sist & RST) {
5311 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
5312 return;
5313 }
5314
5315 if ((sist & STO) &&
5316 !(dstat & (MDPE|BF|ABRT))) {
5317 /*
5318 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1.
5319 */
5320 OUTONB (nc_ctest3, CLF);
5321
5322 ncr_int_sto (np);
5323 return;
5324 }
5325
5326 /*=========================================================
5327 ** Now, interrupts we are not able to recover cleanly.
5328 ** (At least for the moment).
5329 **
5330 ** Do the register dump.
5331 ** Log message for real hard errors.
5332 ** Clear all fifos.
5333 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the
5334 ** BUS and the chip.
5335 ** We are more soft for UDC.
5336 **=========================================================
5337 */
5338
5339 if (ktime_exp(np->regtime)) {
5340 np->regtime = ktime_get(10*HZ);
5341 for (i = 0; i<sizeof(np->regdump); i++)
5342 ((char*)&np->regdump)[i] = INB_OFF(i);
5343 np->regdump.nc_dstat = dstat;
5344 np->regdump.nc_sist = sist;
5345 }
5346
5347 ncr_log_hard_error(np, sist, dstat);
5348
5349 printk ("%s: have to clear fifos.\n", ncr_name (np));
5350 OUTB (nc_stest3, TE|CSF);
5351 OUTONB (nc_ctest3, CLF);
5352
5353 if ((sist & (SGE)) ||
5354 (dstat & (MDPE|BF|ABRT|IID))) {
5355 ncr_start_reset(np);
5356 return;
5357 }
5358
5359 if (sist & HTH) {
5360 printk ("%s: handshake timeout\n", ncr_name(np));
5361 ncr_start_reset(np);
5362 return;
5363 }
5364
5365 if (sist & UDC) {
5366 printk ("%s: unexpected disconnect\n", ncr_name(np));
5367 OUTB (HS_PRT, HS_UNEXPECTED);
5368 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup));
5369 return;
5370 }
5371
5372 /*=========================================================
5373 ** We just miss the cause of the interrupt. :(
5374 ** Print a message. The timeout will do the real work.
5375 **=========================================================
5376 */
5377 printk ("%s: unknown interrupt\n", ncr_name(np));
5378}
5379
5380/*==========================================================
5381**
5382** ncr chip exception handler for selection timeout
5383**
5384**==========================================================
5385**
5386** There seems to be a bug in the 53c810.
5387** Although a STO-Interrupt is pending,
5388** it continues executing script commands.
5389** But it will fail and interrupt (IID) on
5390** the next instruction where it's looking
5391** for a valid phase.
5392**
5393**----------------------------------------------------------
5394*/
5395
5396void ncr_int_sto (struct ncb *np)
5397{
5398 u_long dsa;
5399 struct ccb *cp;
5400 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
5401
5402 /*
5403 ** look for ccb and set the status.
5404 */
5405
5406 dsa = INL (nc_dsa);
5407 cp = np->ccb;
5408 while (cp && (CCB_PHYS (cp, phys) != dsa))
5409 cp = cp->link_ccb;
5410
5411 if (cp) {
5412 cp-> host_status = HS_SEL_TIMEOUT;
5413 ncr_complete (np, cp);
5414 }
5415
5416 /*
5417 ** repair start queue and jump to start point.
5418 */
5419
5420 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart));
5421 return;
5422}
5423
5424/*==========================================================
5425**
5426** ncr chip exception handler for SCSI bus mode change
5427**
5428**==========================================================
5429**
5430** spi2-r12 11.2.3 says a transceiver mode change must
5431** generate a reset event and a device that detects a reset
5432** event shall initiate a hard reset. It says also that a
5433** device that detects a mode change shall set data transfer
5434** mode to eight bit asynchronous, etc...
5435** So, just resetting should be enough.
5436**
5437**
5438**----------------------------------------------------------
5439*/
5440
5441static int ncr_int_sbmc (struct ncb *np)
5442{
5443 u_char scsi_mode = INB (nc_stest4) & SMODE;
5444
5445 if (scsi_mode != np->scsi_mode) {
5446 printk("%s: SCSI bus mode change from %x to %x.\n",
5447 ncr_name(np), np->scsi_mode, scsi_mode);
5448
5449 np->scsi_mode = scsi_mode;
5450
5451
5452 /*
5453 ** Suspend command processing for 1 second and
5454 ** reinitialize all except the chip.
5455 */
5456 np->settle_time = ktime_get(1*HZ);
5457 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
5458 return 1;
5459 }
5460 return 0;
5461}
5462
5463/*==========================================================
5464**
5465** ncr chip exception handler for SCSI parity error.
5466**
5467**==========================================================
5468**
5469**
5470**----------------------------------------------------------
5471*/
5472
5473static int ncr_int_par (struct ncb *np)
5474{
5475 u_char hsts = INB (HS_PRT);
5476 u32 dbc = INL (nc_dbc);
5477 u_char sstat1 = INB (nc_sstat1);
5478 int phase = -1;
5479 int msg = -1;
5480 u32 jmp;
5481
5482 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
5483 ncr_name(np), hsts, dbc, sstat1);
5484
5485 /*
5486 * Ignore the interrupt if the NCR is not connected
5487 * to the SCSI bus, since the right work should have
5488 * been done on unexpected disconnection handling.
5489 */
5490 if (!(INB (nc_scntl1) & ISCON))
5491 return 0;
5492
5493 /*
5494 * If the nexus is not clearly identified, reset the bus.
5495 * We will try to do better later.
5496 */
5497 if (hsts & HS_INVALMASK)
5498 goto reset_all;
5499
5500 /*
5501 * If the SCSI parity error occurs in MSG IN phase, prepare a
5502 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED
5503 * ERROR message and let the device decide to retry the command
5504 * or to terminate with check condition. If we were in MSG IN
5505 * phase waiting for the response of a negotiation, we will
5506 * get SIR_NEGO_FAILED at dispatch.
5507 */
5508 if (!(dbc & 0xc0000000))
5509 phase = (dbc >> 24) & 7;
5510 if (phase == 7)
5511 msg = M_PARITY;
5512 else
5513 msg = M_ID_ERROR;
5514
5515
5516 /*
5517 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a
5518 * script that will ignore all data in bytes until phase
5519 * change, since we are not sure the chip will wait the phase
5520 * change prior to delivering the interrupt.
5521 */
5522 if (phase == 1)
5523 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in);
5524 else
5525 jmp = NCB_SCRIPTH_PHYS (np, par_err_other);
5526
5527 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
5528 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5529
5530 np->msgout[0] = msg;
5531 OUTL_DSP (jmp);
5532 return 1;
5533
5534reset_all:
5535 ncr_start_reset(np);
5536 return 1;
5537}
5538
5539/*==========================================================
5540**
5541**
5542** ncr chip exception handler for phase errors.
5543**
5544**
5545**==========================================================
5546**
5547** We have to construct a new transfer descriptor,
5548** to transfer the rest of the current block.
5549**
5550**----------------------------------------------------------
5551*/
5552
5553static void ncr_int_ma (struct ncb *np)
5554{
5555 u32 dbc;
5556 u32 rest;
5557 u32 dsp;
5558 u32 dsa;
5559 u32 nxtdsp;
5560 u32 newtmp;
5561 u32 *vdsp;
5562 u32 oadr, olen;
5563 u32 *tblp;
5564 ncrcmd *newcmd;
5565 u_char cmd, sbcl;
5566 struct ccb *cp;
5567
5568 dsp = INL (nc_dsp);
5569 dbc = INL (nc_dbc);
5570 sbcl = INB (nc_sbcl);
5571
5572 cmd = dbc >> 24;
5573 rest = dbc & 0xffffff;
5574
5575 /*
5576 ** Take into account dma fifo and various buffers and latches,
5577 ** only if the interrupted phase is an OUTPUT phase.
5578 */
5579
5580 if ((cmd & 1) == 0) {
5581 u_char ctest5, ss0, ss2;
5582 u16 delta;
5583
5584 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5585 if (ctest5 & DFS)
5586 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5587 else
5588 delta=(INB (nc_dfifo) - rest) & 0x7f;
5589
5590 /*
5591 ** The data in the dma fifo has not been transferred to
5592 ** the target -> add the amount to the rest
5593 ** and clear the data.
5594 ** Check the sstat2 register in case of wide transfer.
5595 */
5596
5597 rest += delta;
5598 ss0 = INB (nc_sstat0);
5599 if (ss0 & OLF) rest++;
5600 if (ss0 & ORF) rest++;
5601 if (INB(nc_scntl3) & EWS) {
5602 ss2 = INB (nc_sstat2);
5603 if (ss2 & OLF1) rest++;
5604 if (ss2 & ORF1) rest++;
5605 }
5606
5607 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
5608 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7,
5609 (unsigned) rest, (unsigned) delta, ss0);
5610
5611 } else {
5612 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
5613 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest);
5614 }
5615
5616 /*
5617 ** Clear fifos.
5618 */
5619 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */
5620 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5621
5622 /*
5623 ** locate matching cp.
5624 ** if the interrupted phase is DATA IN or DATA OUT,
5625 ** trust the global header.
5626 */
5627 dsa = INL (nc_dsa);
5628 if (!(cmd & 6)) {
5629 cp = np->header.cp;
5630 if (CCB_PHYS(cp, phys) != dsa)
5631 cp = NULL;
5632 } else {
5633 cp = np->ccb;
5634 while (cp && (CCB_PHYS (cp, phys) != dsa))
5635 cp = cp->link_ccb;
5636 }
5637
5638 /*
5639 ** try to find the interrupted script command,
5640 ** and the address at which to continue.
5641 */
5642 vdsp = NULL;
5643 nxtdsp = 0;
5644 if (dsp > np->p_script &&
5645 dsp <= np->p_script + sizeof(struct script)) {
5646 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
5647 nxtdsp = dsp;
5648 }
5649 else if (dsp > np->p_scripth &&
5650 dsp <= np->p_scripth + sizeof(struct scripth)) {
5651 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
5652 nxtdsp = dsp;
5653 }
5654 else if (cp) {
5655 if (dsp == CCB_PHYS (cp, patch[2])) {
5656 vdsp = &cp->patch[0];
5657 nxtdsp = scr_to_cpu(vdsp[3]);
5658 }
5659 else if (dsp == CCB_PHYS (cp, patch[6])) {
5660 vdsp = &cp->patch[4];
5661 nxtdsp = scr_to_cpu(vdsp[3]);
5662 }
5663 }
5664
5665 /*
5666 ** log the information
5667 */
5668
5669 if (DEBUG_FLAGS & DEBUG_PHASE) {
5670 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5671 cp, np->header.cp,
5672 (unsigned)dsp,
5673 (unsigned)nxtdsp, vdsp, cmd);
5674 }
5675
5676 /*
5677 ** cp=0 means that the DSA does not point to a valid control
5678 ** block. This should not happen since we donnot use multi-byte
5679 ** move while we are being reselected ot after command complete.
5680 ** We are not able to recover from such a phase error.
5681 */
5682 if (!cp) {
5683 printk ("%s: SCSI phase error fixup: "
5684 "CCB already dequeued (0x%08lx)\n",
5685 ncr_name (np), (u_long) np->header.cp);
5686 goto reset_all;
5687 }
5688
5689 /*
5690 ** get old startaddress and old length.
5691 */
5692
5693 oadr = scr_to_cpu(vdsp[1]);
5694
5695 if (cmd & 0x10) { /* Table indirect */
5696 tblp = (u32 *) ((char*) &cp->phys + oadr);
5697 olen = scr_to_cpu(tblp[0]);
5698 oadr = scr_to_cpu(tblp[1]);
5699 } else {
5700 tblp = (u32 *) 0;
5701 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
5702 }
5703
5704 if (DEBUG_FLAGS & DEBUG_PHASE) {
5705 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
5706 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
5707 tblp,
5708 (unsigned) olen,
5709 (unsigned) oadr);
5710 }
5711
5712 /*
5713 ** check cmd against assumed interrupted script command.
5714 */
5715
5716 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) {
5717 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] "
5718 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24);
5719
5720 goto reset_all;
5721 }
5722
5723 /*
5724 ** cp != np->header.cp means that the header of the CCB
5725 ** currently being processed has not yet been copied to
5726 ** the global header area. That may happen if the device did
5727 ** not accept all our messages after having been selected.
5728 */
5729 if (cp != np->header.cp) {
5730 printk ("%s: SCSI phase error fixup: "
5731 "CCB address mismatch (0x%08lx != 0x%08lx)\n",
5732 ncr_name (np), (u_long) cp, (u_long) np->header.cp);
5733 }
5734
5735 /*
5736 ** if old phase not dataphase, leave here.
5737 */
5738
5739 if (cmd & 0x06) {
5740 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n",
5741 cmd&7, sbcl&7, (unsigned)olen,
5742 (unsigned)oadr, (unsigned)rest);
5743 goto unexpected_phase;
5744 }
5745
5746 /*
5747 ** choose the correct patch area.
5748 ** if savep points to one, choose the other.
5749 */
5750
5751 newcmd = cp->patch;
5752 newtmp = CCB_PHYS (cp, patch);
5753 if (newtmp == scr_to_cpu(cp->phys.header.savep)) {
5754 newcmd = &cp->patch[4];
5755 newtmp = CCB_PHYS (cp, patch[4]);
5756 }
5757
5758 /*
5759 ** fillin the commands
5760 */
5761
5762 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest);
5763 newcmd[1] = cpu_to_scr(oadr + olen - rest);
5764 newcmd[2] = cpu_to_scr(SCR_JUMP);
5765 newcmd[3] = cpu_to_scr(nxtdsp);
5766
5767 if (DEBUG_FLAGS & DEBUG_PHASE) {
5768 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n",
5769 (int) (newcmd - cp->patch),
5770 (unsigned)scr_to_cpu(newcmd[0]),
5771 (unsigned)scr_to_cpu(newcmd[1]),
5772 (unsigned)scr_to_cpu(newcmd[2]),
5773 (unsigned)scr_to_cpu(newcmd[3]));
5774 }
5775 /*
5776 ** fake the return address (to the patch).
5777 ** and restart script processor at dispatcher.
5778 */
5779 OUTL (nc_temp, newtmp);
5780 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
5781 return;
5782
5783 /*
5784 ** Unexpected phase changes that occurs when the current phase
5785 ** is not a DATA IN or DATA OUT phase are due to error conditions.
5786 ** Such event may only happen when the SCRIPTS is using a
5787 ** multibyte SCSI MOVE.
5788 **
5789 ** Phase change Some possible cause
5790 **
5791 ** COMMAND --> MSG IN SCSI parity error detected by target.
5792 ** COMMAND --> STATUS Bad command or refused by target.
5793 ** MSG OUT --> MSG IN Message rejected by target.
5794 ** MSG OUT --> COMMAND Bogus target that discards extended
5795 ** negotiation messages.
5796 **
5797 ** The code below does not care of the new phase and so
5798 ** trusts the target. Why to annoy it ?
5799 ** If the interrupted phase is COMMAND phase, we restart at
5800 ** dispatcher.
5801 ** If a target does not get all the messages after selection,
5802 ** the code assumes blindly that the target discards extended
5803 ** messages and clears the negotiation status.
5804 ** If the target does not want all our response to negotiation,
5805 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
5806 ** bloat for such a should_not_happen situation).
5807 ** In all other situation, we reset the BUS.
5808 ** Are these assumptions reasonnable ? (Wait and see ...)
5809 */
5810unexpected_phase:
5811 dsp -= 8;
5812 nxtdsp = 0;
5813
5814 switch (cmd & 7) {
5815 case 2: /* COMMAND phase */
5816 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
5817 break;
5818#if 0
5819 case 3: /* STATUS phase */
5820 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
5821 break;
5822#endif
5823 case 6: /* MSG OUT phase */
5824 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8);
5825 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
5826 cp->host_status = HS_BUSY;
5827 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on);
5828 }
5829 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
5830 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) {
5831 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
5832 }
5833 break;
5834#if 0
5835 case 7: /* MSG IN phase */
5836 nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
5837 break;
5838#endif
5839 }
5840
5841 if (nxtdsp) {
5842 OUTL_DSP (nxtdsp);
5843 return;
5844 }
5845
5846reset_all:
5847 ncr_start_reset(np);
5848}
5849
5850
5851static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
5852{
5853 struct scsi_cmnd *cmd = cp->cmd;
5854 struct tcb *tp = &np->target[cmd->device->id];
5855 struct lcb *lp = tp->lp[cmd->device->lun];
5856 struct list_head *qp;
5857 struct ccb * cp2;
5858 int disc_cnt = 0;
5859 int busy_cnt = 0;
5860 u32 startp;
5861 u_char s_status = INB (SS_PRT);
5862
5863 /*
5864 ** Let the SCRIPTS processor skip all not yet started CCBs,
5865 ** and count disconnected CCBs. Since the busy queue is in
5866 ** the same order as the chip start queue, disconnected CCBs
5867 ** are before cp and busy ones after.
5868 */
5869 if (lp) {
5870 qp = lp->busy_ccbq.prev;
5871 while (qp != &lp->busy_ccbq) {
5872 cp2 = list_entry(qp, struct ccb, link_ccbq);
5873 qp = qp->prev;
5874 ++busy_cnt;
5875 if (cp2 == cp)
5876 break;
5877 cp2->start.schedule.l_paddr =
5878 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip));
5879 }
5880 lp->held_ccb = cp; /* Requeue when this one completes */
5881 disc_cnt = lp->queuedccbs - busy_cnt;
5882 }
5883
5884 switch(s_status) {
5885 default: /* Just for safety, should never happen */
5886 case S_QUEUE_FULL:
5887 /*
5888 ** Decrease number of tags to the number of
5889 ** disconnected commands.
5890 */
5891 if (!lp)
5892 goto out;
5893 if (bootverbose >= 1) {
5894 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected "
5895 "CCBs\n", busy_cnt, disc_cnt);
5896 }
5897 if (disc_cnt < lp->numtags) {
5898 lp->numtags = disc_cnt > 2 ? disc_cnt : 2;
5899 lp->num_good = 0;
5900 ncr_setup_tags (np, cmd->device);
5901 }
5902 /*
5903 ** Requeue the command to the start queue.
5904 ** If any disconnected commands,
5905 ** Clear SIGP.
5906 ** Jump to reselect.
5907 */
5908 cp->phys.header.savep = cp->startp;
5909 cp->host_status = HS_BUSY;
5910 cp->scsi_status = S_ILLEGAL;
5911
5912 ncr_put_start_queue(np, cp);
5913 if (disc_cnt)
5914 INB (nc_ctest2); /* Clear SIGP */
5915 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect));
5916 return;
5917 case S_TERMINATED:
5918 case S_CHECK_COND:
5919 /*
5920 ** If we were requesting sense, give up.
5921 */
5922 if (cp->auto_sense)
5923 goto out;
5924
5925 /*
5926 ** Device returned CHECK CONDITION status.
5927 ** Prepare all needed data strutures for getting
5928 ** sense data.
5929 **
5930 ** identify message
5931 */
5932 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun);
5933 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
5934 cp->phys.smsg.size = cpu_to_scr(1);
5935
5936 /*
5937 ** sense command
5938 */
5939 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
5940 cp->phys.cmd.size = cpu_to_scr(6);
5941
5942 /*
5943 ** patch requested size into sense command
5944 */
5945 cp->sensecmd[0] = 0x03;
5946 cp->sensecmd[1] = cmd->device->lun << 5;
5947 cp->sensecmd[4] = sizeof(cp->sense_buf);
5948
5949 /*
5950 ** sense data
5951 */
5952 memset(cp->sense_buf, 0, sizeof(cp->sense_buf));
5953 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
5954 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
5955
5956 /*
5957 ** requeue the command.
5958 */
5959 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in));
5960
5961 cp->phys.header.savep = startp;
5962 cp->phys.header.goalp = startp + 24;
5963 cp->phys.header.lastp = startp;
5964 cp->phys.header.wgoalp = startp + 24;
5965 cp->phys.header.wlastp = startp;
5966
5967 cp->host_status = HS_BUSY;
5968 cp->scsi_status = S_ILLEGAL;
5969 cp->auto_sense = s_status;
5970
5971 cp->start.schedule.l_paddr =
5972 cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
5973
5974 /*
5975 ** Select without ATN for quirky devices.
5976 */
5977 if (cmd->device->select_no_atn)
5978 cp->start.schedule.l_paddr =
5979 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn));
5980
5981 ncr_put_start_queue(np, cp);
5982
5983 OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
5984 return;
5985 }
5986
5987out:
5988 OUTONB_STD ();
5989 return;
5990}
5991
5992
5993/*==========================================================
5994**
5995**
5996** ncr chip exception handler for programmed interrupts.
5997**
5998**
5999**==========================================================
6000*/
6001
6002void ncr_int_sir (struct ncb *np)
6003{
6004 u_char scntl3;
6005 u_char chg, ofs, per, fak, wide;
6006 u_char num = INB (nc_dsps);
6007 struct ccb *cp=NULL;
6008 u_long dsa = INL (nc_dsa);
6009 u_char target = INB (nc_sdid) & 0x0f;
6010 struct tcb *tp = &np->target[target];
6011 struct scsi_target *starget = tp->starget;
6012
6013 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
6014
6015 switch (num) {
6016 case SIR_INTFLY:
6017 /*
6018 ** This is used for HP Zalon/53c720 where INTFLY
6019 ** operation is currently broken.
6020 */
6021 ncr_wakeup_done(np);
6022#ifdef SCSI_NCR_CCB_DONE_SUPPORT
6023 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8);
6024#else
6025 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start));
6026#endif
6027 return;
6028 case SIR_RESEL_NO_MSG_IN:
6029 case SIR_RESEL_NO_IDENTIFY:
6030 /*
6031 ** If devices reselecting without sending an IDENTIFY
6032 ** message still exist, this should help.
6033 ** We just assume lun=0, 1 CCB, no tag.
6034 */
6035 if (tp->lp[0]) {
6036 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0]));
6037 return;
6038 }
6039 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */
6040 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */
6041 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */
6042 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */
6043 printk ("%s:%d: SIR %d, "
6044 "incorrect nexus identification on reselection\n",
6045 ncr_name (np), target, num);
6046 goto out;
6047 case SIR_DONE_OVERFLOW:
6048 printk ("%s:%d: SIR %d, "
6049 "CCB done queue overflow\n",
6050 ncr_name (np), target, num);
6051 goto out;
6052 case SIR_BAD_STATUS:
6053 cp = np->header.cp;
6054 if (!cp || CCB_PHYS (cp, phys) != dsa)
6055 goto out;
6056 ncr_sir_to_redo(np, num, cp);
6057 return;
6058 default:
6059 /*
6060 ** lookup the ccb
6061 */
6062 cp = np->ccb;
6063 while (cp && (CCB_PHYS (cp, phys) != dsa))
6064 cp = cp->link_ccb;
6065
6066 BUG_ON(!cp);
6067 BUG_ON(cp != np->header.cp);
6068
6069 if (!cp || cp != np->header.cp)
6070 goto out;
6071 }
6072
6073 switch (num) {
6074/*-----------------------------------------------------------------------------
6075**
6076** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
6077**
6078** We try to negotiate sync and wide transfer only after
6079** a successful inquire command. We look at byte 7 of the
6080** inquire data to determine the capabilities of the target.
6081**
6082** When we try to negotiate, we append the negotiation message
6083** to the identify and (maybe) simple tag message.
6084** The host status field is set to HS_NEGOTIATE to mark this
6085** situation.
6086**
6087** If the target doesn't answer this message immidiately
6088** (as required by the standard), the SIR_NEGO_FAIL interrupt
6089** will be raised eventually.
6090** The handler removes the HS_NEGOTIATE status, and sets the
6091** negotiated value to the default (async / nowide).
6092**
6093** If we receive a matching answer immediately, we check it
6094** for validity, and set the values.
6095**
6096** If we receive a Reject message immediately, we assume the
6097** negotiation has failed, and fall back to standard values.
6098**
6099** If we receive a negotiation message while not in HS_NEGOTIATE
6100** state, it's a target initiated negotiation. We prepare a
6101** (hopefully) valid answer, set our parameters, and send back
6102** this answer to the target.
6103**
6104** If the target doesn't fetch the answer (no message out phase),
6105** we assume the negotiation has failed, and fall back to default
6106** settings.
6107**
6108** When we set the values, we adjust them in all ccbs belonging
6109** to this target, in the controller's register, and in the "phys"
6110** field of the controller's struct ncb.
6111**
6112** Possible cases: hs sir msg_in value send goto
6113** We try to negotiate:
6114** -> target doesn't msgin NEG FAIL noop defa. - dispatch
6115** -> target rejected our msg NEG FAIL reject defa. - dispatch
6116** -> target answered (ok) NEG SYNC sdtr set - clrack
6117** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6118** -> target answered (ok) NEG WIDE wdtr set - clrack
6119** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6120** -> any other msgin NEG FAIL noop defa. - dispatch
6121**
6122** Target tries to negotiate:
6123** -> incoming message --- SYNC sdtr set SDTR -
6124** -> incoming message --- WIDE wdtr set WDTR -
6125** We sent our answer:
6126** -> target doesn't msgout --- PROTO ? defa. - dispatch
6127**
6128**-----------------------------------------------------------------------------
6129*/
6130
6131 case SIR_NEGO_FAILED:
6132 /*-------------------------------------------------------
6133 **
6134 ** Negotiation failed.
6135 ** Target doesn't send an answer message,
6136 ** or target rejected our message.
6137 **
6138 ** Remove negotiation request.
6139 **
6140 **-------------------------------------------------------
6141 */
6142 OUTB (HS_PRT, HS_BUSY);
6143
6144 /* fall through */
6145
6146 case SIR_NEGO_PROTO:
6147 /*-------------------------------------------------------
6148 **
6149 ** Negotiation failed.
6150 ** Target doesn't fetch the answer message.
6151 **
6152 **-------------------------------------------------------
6153 */
6154
6155 if (DEBUG_FLAGS & DEBUG_NEGO) {
6156 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x "
6157 "status=%x.\n", num, cp->nego_status);
6158 }
6159
6160 /*
6161 ** any error in negotiation:
6162 ** fall back to default mode.
6163 */
6164 switch (cp->nego_status) {
6165
6166 case NS_SYNC:
6167 spi_period(starget) = 0;
6168 spi_offset(starget) = 0;
6169 ncr_setsync (np, cp, 0, 0xe0);
6170 break;
6171
6172 case NS_WIDE:
6173 spi_width(starget) = 0;
6174 ncr_setwide (np, cp, 0, 0);
6175 break;
6176
6177 }
6178 np->msgin [0] = M_NOOP;
6179 np->msgout[0] = M_NOOP;
6180 cp->nego_status = 0;
6181 break;
6182
6183 case SIR_NEGO_SYNC:
6184 if (DEBUG_FLAGS & DEBUG_NEGO) {
6185 ncr_print_msg(cp, "sync msgin", np->msgin);
6186 }
6187
6188 chg = 0;
6189 per = np->msgin[3];
6190 ofs = np->msgin[4];
6191 if (ofs==0) per=255;
6192
6193 /*
6194 ** if target sends SDTR message,
6195 ** it CAN transfer synch.
6196 */
6197
6198 if (ofs && starget)
6199 spi_support_sync(starget) = 1;
6200
6201 /*
6202 ** check values against driver limits.
6203 */
6204
6205 if (per < np->minsync)
6206 {chg = 1; per = np->minsync;}
6207 if (per < tp->minsync)
6208 {chg = 1; per = tp->minsync;}
6209 if (ofs > tp->maxoffs)
6210 {chg = 1; ofs = tp->maxoffs;}
6211
6212 /*
6213 ** Check against controller limits.
6214 */
6215 fak = 7;
6216 scntl3 = 0;
6217 if (ofs != 0) {
6218 ncr_getsync(np, per, &fak, &scntl3);
6219 if (fak > 7) {
6220 chg = 1;
6221 ofs = 0;
6222 }
6223 }
6224 if (ofs == 0) {
6225 fak = 7;
6226 per = 0;
6227 scntl3 = 0;
6228 tp->minsync = 0;
6229 }
6230
6231 if (DEBUG_FLAGS & DEBUG_NEGO) {
6232 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d "
6233 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg);
6234 }
6235
6236 if (INB (HS_PRT) == HS_NEGOTIATE) {
6237 OUTB (HS_PRT, HS_BUSY);
6238 switch (cp->nego_status) {
6239
6240 case NS_SYNC:
6241 /* This was an answer message */
6242 if (chg) {
6243 /* Answer wasn't acceptable. */
6244 spi_period(starget) = 0;
6245 spi_offset(starget) = 0;
6246 ncr_setsync(np, cp, 0, 0xe0);
6247 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad));
6248 } else {
6249 /* Answer is ok. */
6250 spi_period(starget) = per;
6251 spi_offset(starget) = ofs;
6252 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6253 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack));
6254 }
6255 return;
6256
6257 case NS_WIDE:
6258 spi_width(starget) = 0;
6259 ncr_setwide(np, cp, 0, 0);
6260 break;
6261 }
6262 }
6263
6264 /*
6265 ** It was a request. Set value and
6266 ** prepare an answer message
6267 */
6268
6269 spi_period(starget) = per;
6270 spi_offset(starget) = ofs;
6271 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs);
6272
6273 np->msgout[0] = M_EXTENDED;
6274 np->msgout[1] = 3;
6275 np->msgout[2] = M_X_SYNC_REQ;
6276 np->msgout[3] = per;
6277 np->msgout[4] = ofs;
6278
6279 cp->nego_status = NS_SYNC;
6280
6281 if (DEBUG_FLAGS & DEBUG_NEGO) {
6282 ncr_print_msg(cp, "sync msgout", np->msgout);
6283 }
6284
6285 if (!ofs) {
6286 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6287 return;
6288 }
6289 np->msgin [0] = M_NOOP;
6290
6291 break;
6292
6293 case SIR_NEGO_WIDE:
6294 /*
6295 ** Wide request message received.
6296 */
6297 if (DEBUG_FLAGS & DEBUG_NEGO) {
6298 ncr_print_msg(cp, "wide msgin", np->msgin);
6299 }
6300
6301 /*
6302 ** get requested values.
6303 */
6304
6305 chg = 0;
6306 wide = np->msgin[3];
6307
6308 /*
6309 ** if target sends WDTR message,
6310 ** it CAN transfer wide.
6311 */
6312
6313 if (wide && starget)
6314 spi_support_wide(starget) = 1;
6315
6316 /*
6317 ** check values against driver limits.
6318 */
6319
6320 if (wide > tp->usrwide)
6321 {chg = 1; wide = tp->usrwide;}
6322
6323 if (DEBUG_FLAGS & DEBUG_NEGO) {
6324 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide,
6325 chg);
6326 }
6327
6328 if (INB (HS_PRT) == HS_NEGOTIATE) {
6329 OUTB (HS_PRT, HS_BUSY);
6330 switch (cp->nego_status) {
6331
6332 case NS_WIDE:
6333 /*
6334 ** This was an answer message
6335 */
6336 if (chg) {
6337 /* Answer wasn't acceptable. */
6338 spi_width(starget) = 0;
6339 ncr_setwide(np, cp, 0, 1);
6340 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad));
6341 } else {
6342 /* Answer is ok. */
6343 spi_width(starget) = wide;
6344 ncr_setwide(np, cp, wide, 1);
6345 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
6346 }
6347 return;
6348
6349 case NS_SYNC:
6350 spi_period(starget) = 0;
6351 spi_offset(starget) = 0;
6352 ncr_setsync(np, cp, 0, 0xe0);
6353 break;
6354 }
6355 }
6356
6357 /*
6358 ** It was a request, set value and
6359 ** prepare an answer message
6360 */
6361
6362 spi_width(starget) = wide;
6363 ncr_setwide(np, cp, wide, 1);
6364
6365 np->msgout[0] = M_EXTENDED;
6366 np->msgout[1] = 2;
6367 np->msgout[2] = M_X_WIDE_REQ;
6368 np->msgout[3] = wide;
6369
6370 np->msgin [0] = M_NOOP;
6371
6372 cp->nego_status = NS_WIDE;
6373
6374 if (DEBUG_FLAGS & DEBUG_NEGO) {
6375 ncr_print_msg(cp, "wide msgout", np->msgin);
6376 }
6377 break;
6378
6379/*--------------------------------------------------------------------
6380**
6381** Processing of special messages
6382**
6383**--------------------------------------------------------------------
6384*/
6385
6386 case SIR_REJECT_RECEIVED:
6387 /*-----------------------------------------------
6388 **
6389 ** We received a M_REJECT message.
6390 **
6391 **-----------------------------------------------
6392 */
6393
6394 PRINT_ADDR(cp->cmd, "M_REJECT received (%x:%x).\n",
6395 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]);
6396 break;
6397
6398 case SIR_REJECT_SENT:
6399 /*-----------------------------------------------
6400 **
6401 ** We received an unknown message
6402 **
6403 **-----------------------------------------------
6404 */
6405
6406 ncr_print_msg(cp, "M_REJECT sent for", np->msgin);
6407 break;
6408
6409/*--------------------------------------------------------------------
6410**
6411** Processing of special messages
6412**
6413**--------------------------------------------------------------------
6414*/
6415
6416 case SIR_IGN_RESIDUE:
6417 /*-----------------------------------------------
6418 **
6419 ** We received an IGNORE RESIDUE message,
6420 ** which couldn't be handled by the script.
6421 **
6422 **-----------------------------------------------
6423 */
6424
6425 PRINT_ADDR(cp->cmd, "M_IGN_RESIDUE received, but not yet "
6426 "implemented.\n");
6427 break;
6428#if 0
6429 case SIR_MISSING_SAVE:
6430 /*-----------------------------------------------
6431 **
6432 ** We received an DISCONNECT message,
6433 ** but the datapointer wasn't saved before.
6434 **
6435 **-----------------------------------------------
6436 */
6437
6438 PRINT_ADDR(cp->cmd, "M_DISCONNECT received, but datapointer "
6439 "not saved: data=%x save=%x goal=%x.\n",
6440 (unsigned) INL (nc_temp),
6441 (unsigned) scr_to_cpu(np->header.savep),
6442 (unsigned) scr_to_cpu(np->header.goalp));
6443 break;
6444#endif
6445 }
6446
6447out:
6448 OUTONB_STD ();
6449}
6450
6451/*==========================================================
6452**
6453**
6454** Acquire a control block
6455**
6456**
6457**==========================================================
6458*/
6459
6460static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd)
6461{
6462 u_char tn = cmd->device->id;
6463 u_char ln = cmd->device->lun;
6464 struct tcb *tp = &np->target[tn];
6465 struct lcb *lp = tp->lp[ln];
6466 u_char tag = NO_TAG;
6467 struct ccb *cp = NULL;
6468
6469 /*
6470 ** Lun structure available ?
6471 */
6472 if (lp) {
6473 struct list_head *qp;
6474 /*
6475 ** Keep from using more tags than we can handle.
6476 */
6477 if (lp->usetags && lp->busyccbs >= lp->maxnxs)
6478 return NULL;
6479
6480 /*
6481 ** Allocate a new CCB if needed.
6482 */
6483 if (list_empty(&lp->free_ccbq))
6484 ncr_alloc_ccb(np, tn, ln);
6485
6486 /*
6487 ** Look for free CCB
6488 */
6489 qp = ncr_list_pop(&lp->free_ccbq);
6490 if (qp) {
6491 cp = list_entry(qp, struct ccb, link_ccbq);
6492 if (cp->magic) {
6493 PRINT_ADDR(cmd, "ccb free list corrupted "
6494 "(@%p)\n", cp);
6495 cp = NULL;
6496 } else {
6497 list_add_tail(qp, &lp->wait_ccbq);
6498 ++lp->busyccbs;
6499 }
6500 }
6501
6502 /*
6503 ** If a CCB is available,
6504 ** Get a tag for this nexus if required.
6505 */
6506 if (cp) {
6507 if (lp->usetags)
6508 tag = lp->cb_tags[lp->ia_tag];
6509 }
6510 else if (lp->actccbs > 0)
6511 return NULL;
6512 }
6513
6514 /*
6515 ** if nothing available, take the default.
6516 */
6517 if (!cp)
6518 cp = np->ccb;
6519
6520 /*
6521 ** Wait until available.
6522 */
6523#if 0
6524 while (cp->magic) {
6525 if (flags & SCSI_NOSLEEP) break;
6526 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0))
6527 break;
6528 }
6529#endif
6530
6531 if (cp->magic)
6532 return NULL;
6533
6534 cp->magic = 1;
6535
6536 /*
6537 ** Move to next available tag if tag used.
6538 */
6539 if (lp) {
6540 if (tag != NO_TAG) {
6541 ++lp->ia_tag;
6542 if (lp->ia_tag == MAX_TAGS)
6543 lp->ia_tag = 0;
6544 lp->tags_umap |= (((tagmap_t) 1) << tag);
6545 }
6546 }
6547
6548 /*
6549 ** Remember all informations needed to free this CCB.
6550 */
6551 cp->tag = tag;
6552 cp->target = tn;
6553 cp->lun = ln;
6554
6555 if (DEBUG_FLAGS & DEBUG_TAGS) {
6556 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag);
6557 }
6558
6559 return cp;
6560}
6561
6562/*==========================================================
6563**
6564**
6565** Release one control block
6566**
6567**
6568**==========================================================
6569*/
6570
6571static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
6572{
6573 struct tcb *tp = &np->target[cp->target];
6574 struct lcb *lp = tp->lp[cp->lun];
6575
6576 if (DEBUG_FLAGS & DEBUG_TAGS) {
6577 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag);
6578 }
6579
6580 /*
6581 ** If lun control block available,
6582 ** decrement active commands and increment credit,
6583 ** free the tag if any and remove the JUMP for reselect.
6584 */
6585 if (lp) {
6586 if (cp->tag != NO_TAG) {
6587 lp->cb_tags[lp->if_tag++] = cp->tag;
6588 if (lp->if_tag == MAX_TAGS)
6589 lp->if_tag = 0;
6590 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag);
6591 lp->tags_smap &= lp->tags_umap;
6592 lp->jump_ccb[cp->tag] =
6593 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q));
6594 } else {
6595 lp->jump_ccb[0] =
6596 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l));
6597 }
6598 }
6599
6600 /*
6601 ** Make this CCB available.
6602 */
6603
6604 if (lp) {
6605 if (cp != np->ccb)
6606 list_move(&cp->link_ccbq, &lp->free_ccbq);
6607 --lp->busyccbs;
6608 if (cp->queued) {
6609 --lp->queuedccbs;
6610 }
6611 }
6612 cp -> host_status = HS_IDLE;
6613 cp -> magic = 0;
6614 if (cp->queued) {
6615 --np->queuedccbs;
6616 cp->queued = 0;
6617 }
6618
6619#if 0
6620 if (cp == np->ccb)
6621 wakeup ((caddr_t) cp);
6622#endif
6623}
6624
6625
6626#define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r))
6627
6628/*------------------------------------------------------------------------
6629** Initialize the fixed part of a CCB structure.
6630**------------------------------------------------------------------------
6631**------------------------------------------------------------------------
6632*/
6633static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
6634{
6635 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
6636
6637 /*
6638 ** Remember virtual and bus address of this ccb.
6639 */
6640 cp->p_ccb = vtobus(cp);
6641 cp->phys.header.cp = cp;
6642
6643 /*
6644 ** This allows list_del to work for the default ccb.
6645 */
6646 INIT_LIST_HEAD(&cp->link_ccbq);
6647
6648 /*
6649 ** Initialyze the start and restart launch script.
6650 **
6651 ** COPY(4) @(...p_phys), @(dsa)
6652 ** JUMP @(sched_point)
6653 */
6654 cp->start.setup_dsa[0] = cpu_to_scr(copy_4);
6655 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys));
6656 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa));
6657 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP);
6658 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys));
6659
6660 memcpy(&cp->restart, &cp->start, sizeof(cp->restart));
6661
6662 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
6663 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort));
6664}
6665
6666
6667/*------------------------------------------------------------------------
6668** Allocate a CCB and initialize its fixed part.
6669**------------------------------------------------------------------------
6670**------------------------------------------------------------------------
6671*/
6672static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
6673{
6674 struct tcb *tp = &np->target[tn];
6675 struct lcb *lp = tp->lp[ln];
6676 struct ccb *cp = NULL;
6677
6678 /*
6679 ** Allocate memory for this CCB.
6680 */
6681 cp = m_calloc_dma(sizeof(struct ccb), "CCB");
6682 if (!cp)
6683 return;
6684
6685 /*
6686 ** Count it and initialyze it.
6687 */
6688 lp->actccbs++;
6689 np->actccbs++;
6690 memset(cp, 0, sizeof (*cp));
6691 ncr_init_ccb(np, cp);
6692
6693 /*
6694 ** Chain into wakeup list and free ccb queue and take it
6695 ** into account for tagged commands.
6696 */
6697 cp->link_ccb = np->ccb->link_ccb;
6698 np->ccb->link_ccb = cp;
6699
6700 list_add(&cp->link_ccbq, &lp->free_ccbq);
6701}
6702
6703/*==========================================================
6704**
6705**
6706** Allocation of resources for Targets/Luns/Tags.
6707**
6708**
6709**==========================================================
6710*/
6711
6712
6713/*------------------------------------------------------------------------
6714** Target control block initialisation.
6715**------------------------------------------------------------------------
6716** This data structure is fully initialized after a SCSI command
6717** has been successfully completed for this target.
6718** It contains a SCRIPT that is called on target reselection.
6719**------------------------------------------------------------------------
6720*/
6721static void ncr_init_tcb (struct ncb *np, u_char tn)
6722{
6723 struct tcb *tp = &np->target[tn];
6724 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
6725 int th = tn & 3;
6726 int i;
6727
6728 /*
6729 ** Jump to next tcb if SFBR does not match this target.
6730 ** JUMP IF (SFBR != #target#), @(next tcb)
6731 */
6732 tp->jump_tcb.l_cmd =
6733 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn))));
6734 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr;
6735
6736 /*
6737 ** Load the synchronous transfer register.
6738 ** COPY @(tp->sval), @(sxfer)
6739 */
6740 tp->getscr[0] = cpu_to_scr(copy_1);
6741 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval));
6742#ifdef SCSI_NCR_BIG_ENDIAN
6743 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3);
6744#else
6745 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer));
6746#endif
6747
6748 /*
6749 ** Load the timing register.
6750 ** COPY @(tp->wval), @(scntl3)
6751 */
6752 tp->getscr[3] = cpu_to_scr(copy_1);
6753 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval));
6754#ifdef SCSI_NCR_BIG_ENDIAN
6755 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3);
6756#else
6757 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3));
6758#endif
6759
6760 /*
6761 ** Get the IDENTIFY message and the lun.
6762 ** CALL @script(resel_lun)
6763 */
6764 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL);
6765 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun));
6766
6767 /*
6768 ** Look for the lun control block of this nexus.
6769 ** For i = 0 to 3
6770 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
6771 */
6772 for (i = 0 ; i < 4 ; i++) {
6773 tp->jump_lcb[i].l_cmd =
6774 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
6775 tp->jump_lcb[i].l_paddr =
6776 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify));
6777 }
6778
6779 /*
6780 ** Link this target control block to the JUMP chain.
6781 */
6782 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb));
6783
6784 /*
6785 ** These assert's should be moved at driver initialisations.
6786 */
6787#ifdef SCSI_NCR_BIG_ENDIAN
6788 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
6789 offsetof(struct tcb , sval )) &3) != 3);
6790 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
6791 offsetof(struct tcb , wval )) &3) != 3);
6792#else
6793 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^
6794 offsetof(struct tcb , sval )) &3) != 0);
6795 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^
6796 offsetof(struct tcb , wval )) &3) != 0);
6797#endif
6798}
6799
6800
6801/*------------------------------------------------------------------------
6802** Lun control block allocation and initialization.
6803**------------------------------------------------------------------------
6804** This data structure is allocated and initialized after a SCSI
6805** command has been successfully completed for this target/lun.
6806**------------------------------------------------------------------------
6807*/
6808static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
6809{
6810 struct tcb *tp = &np->target[tn];
6811 struct lcb *lp = tp->lp[ln];
6812 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
6813 int lh = ln & 3;
6814
6815 /*
6816 ** Already done, return.
6817 */
6818 if (lp)
6819 return lp;
6820
6821 /*
6822 ** Allocate the lcb.
6823 */
6824 lp = m_calloc_dma(sizeof(struct lcb), "LCB");
6825 if (!lp)
6826 goto fail;
6827 memset(lp, 0, sizeof(*lp));
6828 tp->lp[ln] = lp;
6829
6830 /*
6831 ** Initialize the target control block if not yet.
6832 */
6833 if (!tp->jump_tcb.l_cmd)
6834 ncr_init_tcb(np, tn);
6835
6836 /*
6837 ** Initialize the CCB queue headers.
6838 */
6839 INIT_LIST_HEAD(&lp->free_ccbq);
6840 INIT_LIST_HEAD(&lp->busy_ccbq);
6841 INIT_LIST_HEAD(&lp->wait_ccbq);
6842 INIT_LIST_HEAD(&lp->skip_ccbq);
6843
6844 /*
6845 ** Set max CCBs to 1 and use the default 1 entry
6846 ** jump table by default.
6847 */
6848 lp->maxnxs = 1;
6849 lp->jump_ccb = &lp->jump_ccb_0;
6850 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
6851
6852 /*
6853 ** Initilialyze the reselect script:
6854 **
6855 ** Jump to next lcb if SFBR does not match this lun.
6856 ** Load TEMP with the CCB direct jump table bus address.
6857 ** Get the SIMPLE TAG message and the tag.
6858 **
6859 ** JUMP IF (SFBR != #lun#), @(next lcb)
6860 ** COPY @(lp->p_jump_ccb), @(temp)
6861 ** JUMP @script(resel_notag)
6862 */
6863 lp->jump_lcb.l_cmd =
6864 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff))));
6865 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr;
6866
6867 lp->load_jump_ccb[0] = cpu_to_scr(copy_4);
6868 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb));
6869 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp));
6870
6871 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP);
6872 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag));
6873
6874 /*
6875 ** Link this lun control block to the JUMP chain.
6876 */
6877 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb));
6878
6879 /*
6880 ** Initialize command queuing control.
6881 */
6882 lp->busyccbs = 1;
6883 lp->queuedccbs = 1;
6884 lp->queuedepth = 1;
6885fail:
6886 return lp;
6887}
6888
6889
6890/*------------------------------------------------------------------------
6891** Lun control block setup on INQUIRY data received.
6892**------------------------------------------------------------------------
6893** We only support WIDE, SYNC for targets and CMDQ for logical units.
6894** This setup is done on each INQUIRY since we are expecting user
6895** will play with CHANGE DEFINITION commands. :-)
6896**------------------------------------------------------------------------
6897*/
6898static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev)
6899{
6900 unsigned char tn = sdev->id, ln = sdev->lun;
6901 struct tcb *tp = &np->target[tn];
6902 struct lcb *lp = tp->lp[ln];
6903
6904 /* If no lcb, try to allocate it. */
6905 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
6906 goto fail;
6907
6908 /*
6909 ** If unit supports tagged commands, allocate the
6910 ** CCB JUMP table if not yet.
6911 */
6912 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) {
6913 int i;
6914 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB");
6915 if (!lp->jump_ccb) {
6916 lp->jump_ccb = &lp->jump_ccb_0;
6917 goto fail;
6918 }
6919 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb));
6920 for (i = 0 ; i < 64 ; i++)
6921 lp->jump_ccb[i] =
6922 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q));
6923 for (i = 0 ; i < MAX_TAGS ; i++)
6924 lp->cb_tags[i] = i;
6925 lp->maxnxs = MAX_TAGS;
6926 lp->tags_stime = ktime_get(3*HZ);
6927 ncr_setup_tags (np, sdev);
6928 }
6929
6930
6931fail:
6932 return lp;
6933}
6934
6935/*==========================================================
6936**
6937**
6938** Build Scatter Gather Block
6939**
6940**
6941**==========================================================
6942**
6943** The transfer area may be scattered among
6944** several non adjacent physical pages.
6945**
6946** We may use MAX_SCATTER blocks.
6947**
6948**----------------------------------------------------------
6949*/
6950
6951/*
6952** We try to reduce the number of interrupts caused
6953** by unexpected phase changes due to disconnects.
6954** A typical harddisk may disconnect before ANY block.
6955** If we wanted to avoid unexpected phase changes at all
6956** we had to use a break point every 512 bytes.
6957** Of course the number of scatter/gather blocks is
6958** limited.
6959** Under Linux, the scatter/gatter blocks are provided by
6960** the generic driver. We just have to copy addresses and
6961** sizes to the data segment array.
6962*/
6963
6964static int ncr_scatter_no_sglist(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
6965{
6966 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER - 1];
6967 int segment;
6968
6969 cp->data_len = cmd->request_bufflen;
6970
6971 if (cmd->request_bufflen) {
6972 dma_addr_t baddr = map_scsi_single_data(np, cmd);
6973 if (baddr) {
6974 ncr_build_sge(np, data, baddr, cmd->request_bufflen);
6975 segment = 1;
6976 } else {
6977 segment = -2;
6978 }
6979 } else {
6980 segment = 0;
6981 }
6982
6983 return segment;
6984}
6985
6986static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
6987{
6988 int segment = 0;
6989 int use_sg = (int) cmd->use_sg;
6990
6991 cp->data_len = 0;
6992
6993 if (!use_sg)
6994 segment = ncr_scatter_no_sglist(np, cp, cmd);
6995 else if ((use_sg = map_scsi_sg_data(np, cmd)) > 0) {
6996 struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
6997 struct scr_tblmove *data;
6998
6999 if (use_sg > MAX_SCATTER) {
7000 unmap_scsi_data(np, cmd);
7001 return -1;
7002 }
7003
7004 data = &cp->phys.data[MAX_SCATTER - use_sg];
7005
7006 for (segment = 0; segment < use_sg; segment++) {
7007 dma_addr_t baddr = sg_dma_address(&scatter[segment]);
7008 unsigned int len = sg_dma_len(&scatter[segment]);
7009
7010 ncr_build_sge(np, &data[segment], baddr, len);
7011 cp->data_len += len;
7012 }
7013 } else {
7014 segment = -2;
7015 }
7016
7017 return segment;
7018}
7019
7020/*==========================================================
7021**
7022**
7023** Test the bus snoop logic :-(
7024**
7025** Has to be called with interrupts disabled.
7026**
7027**
7028**==========================================================
7029*/
7030
7031static int __init ncr_regtest (struct ncb* np)
7032{
7033 register volatile u32 data;
7034 /*
7035 ** ncr registers may NOT be cached.
7036 ** write 0xffffffff to a read only register area,
7037 ** and try to read it back.
7038 */
7039 data = 0xffffffff;
7040 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
7041 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
7042#if 1
7043 if (data == 0xffffffff) {
7044#else
7045 if ((data & 0xe2f0fffd) != 0x02000080) {
7046#endif
7047 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
7048 (unsigned) data);
7049 return (0x10);
7050 }
7051 return (0);
7052}
7053
7054static int __init ncr_snooptest (struct ncb* np)
7055{
7056 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
7057 int i, err=0;
7058 if (np->reg) {
7059 err |= ncr_regtest (np);
7060 if (err)
7061 return (err);
7062 }
7063
7064 /* init */
7065 pc = NCB_SCRIPTH_PHYS (np, snooptest);
7066 host_wr = 1;
7067 ncr_wr = 2;
7068 /*
7069 ** Set memory and register.
7070 */
7071 np->ncr_cache = cpu_to_scr(host_wr);
7072 OUTL (nc_temp, ncr_wr);
7073 /*
7074 ** Start script (exchange values)
7075 */
7076 OUTL_DSP (pc);
7077 /*
7078 ** Wait 'til done (with timeout)
7079 */
7080 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
7081 if (INB(nc_istat) & (INTF|SIP|DIP))
7082 break;
7083 /*
7084 ** Save termination position.
7085 */
7086 pc = INL (nc_dsp);
7087 /*
7088 ** Read memory and register.
7089 */
7090 host_rd = scr_to_cpu(np->ncr_cache);
7091 ncr_rd = INL (nc_scratcha);
7092 ncr_bk = INL (nc_temp);
7093 /*
7094 ** Reset ncr chip
7095 */
7096 ncr_chip_reset(np, 100);
7097 /*
7098 ** check for timeout
7099 */
7100 if (i>=NCR_SNOOP_TIMEOUT) {
7101 printk ("CACHE TEST FAILED: timeout.\n");
7102 return (0x20);
7103 }
7104 /*
7105 ** Check termination position.
7106 */
7107 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
7108 printk ("CACHE TEST FAILED: script execution failed.\n");
7109 printk ("start=%08lx, pc=%08lx, end=%08lx\n",
7110 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
7111 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
7112 return (0x40);
7113 }
7114 /*
7115 ** Show results.
7116 */
7117 if (host_wr != ncr_rd) {
7118 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
7119 (int) host_wr, (int) ncr_rd);
7120 err |= 1;
7121 }
7122 if (host_rd != ncr_wr) {
7123 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
7124 (int) ncr_wr, (int) host_rd);
7125 err |= 2;
7126 }
7127 if (ncr_bk != ncr_wr) {
7128 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
7129 (int) ncr_wr, (int) ncr_bk);
7130 err |= 4;
7131 }
7132 return (err);
7133}
7134
7135/*==========================================================
7136**
7137** Determine the ncr's clock frequency.
7138** This is essential for the negotiation
7139** of the synchronous transfer rate.
7140**
7141**==========================================================
7142**
7143** Note: we have to return the correct value.
7144** THERE IS NO SAVE DEFAULT VALUE.
7145**
7146** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7147** 53C860 and 53C875 rev. 1 support fast20 transfers but
7148** do not have a clock doubler and so are provided with a
7149** 80 MHz clock. All other fast20 boards incorporate a doubler
7150** and so should be delivered with a 40 MHz clock.
7151** The future fast40 chips (895/895) use a 40 Mhz base clock
7152** and provide a clock quadrupler (160 Mhz). The code below
7153** tries to deal as cleverly as possible with all this stuff.
7154**
7155**----------------------------------------------------------
7156*/
7157
7158/*
7159 * Select NCR SCSI clock frequency
7160 */
7161static void ncr_selectclock(struct ncb *np, u_char scntl3)
7162{
7163 if (np->multiplier < 2) {
7164 OUTB(nc_scntl3, scntl3);
7165 return;
7166 }
7167
7168 if (bootverbose >= 2)
7169 printk ("%s: enabling clock multiplier\n", ncr_name(np));
7170
7171 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
7172 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
7173 int i = 20;
7174 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7175 udelay(20);
7176 if (!i)
7177 printk("%s: the chip cannot lock the frequency\n", ncr_name(np));
7178 } else /* Wait 20 micro-seconds for doubler */
7179 udelay(20);
7180 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
7181 OUTB(nc_scntl3, scntl3);
7182 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
7183 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
7184}
7185
7186
7187/*
7188 * calculate NCR SCSI clock frequency (in KHz)
7189 */
7190static unsigned __init ncrgetfreq (struct ncb *np, int gen)
7191{
7192 unsigned ms = 0;
7193 char count = 0;
7194
7195 /*
7196 * Measure GEN timer delay in order
7197 * to calculate SCSI clock frequency
7198 *
7199 * This code will never execute too
7200 * many loop iterations (if DELAY is
7201 * reasonably correct). It could get
7202 * too low a delay (too high a freq.)
7203 * if the CPU is slow executing the
7204 * loop for some reason (an NMI, for
7205 * example). For this reason we will
7206 * if multiple measurements are to be
7207 * performed trust the higher delay
7208 * (lower frequency returned).
7209 */
7210 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
7211 OUTW (nc_sien , 0); /* mask all scsi interrupts */
7212 (void) INW (nc_sist); /* clear pending scsi interrupt */
7213 OUTB (nc_dien , 0); /* mask all dma interrupts */
7214 (void) INW (nc_sist); /* another one, just to be sure :) */
7215 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
7216 OUTB (nc_stime1, 0); /* disable general purpose timer */
7217 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
7218 while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
7219 for (count = 0; count < 10; count ++)
7220 udelay(100); /* count ms */
7221 }
7222 OUTB (nc_stime1, 0); /* disable general purpose timer */
7223 /*
7224 * set prescaler to divide by whatever 0 means
7225 * 0 ought to choose divide by 2, but appears
7226 * to set divide by 3.5 mode in my 53c810 ...
7227 */
7228 OUTB (nc_scntl3, 0);
7229
7230 if (bootverbose >= 2)
7231 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms);
7232 /*
7233 * adjust for prescaler, and convert into KHz
7234 */
7235 return ms ? ((1 << gen) * 4340) / ms : 0;
7236}
7237
7238/*
7239 * Get/probe NCR SCSI clock frequency
7240 */
7241static void __init ncr_getclock (struct ncb *np, int mult)
7242{
7243 unsigned char scntl3 = INB(nc_scntl3);
7244 unsigned char stest1 = INB(nc_stest1);
7245 unsigned f1;
7246
7247 np->multiplier = 1;
7248 f1 = 40000;
7249
7250 /*
7251 ** True with 875 or 895 with clock multiplier selected
7252 */
7253 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7254 if (bootverbose >= 2)
7255 printk ("%s: clock multiplier found\n", ncr_name(np));
7256 np->multiplier = mult;
7257 }
7258
7259 /*
7260 ** If multiplier not found or scntl3 not 7,5,3,
7261 ** reset chip and get frequency from general purpose timer.
7262 ** Otherwise trust scntl3 BIOS setting.
7263 */
7264 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7265 unsigned f2;
7266
7267 ncr_chip_reset(np, 5);
7268
7269 (void) ncrgetfreq (np, 11); /* throw away first result */
7270 f1 = ncrgetfreq (np, 11);
7271 f2 = ncrgetfreq (np, 11);
7272
7273 if(bootverbose)
7274 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2);
7275
7276 if (f1 > f2) f1 = f2; /* trust lower result */
7277
7278 if (f1 < 45000) f1 = 40000;
7279 else if (f1 < 55000) f1 = 50000;
7280 else f1 = 80000;
7281
7282 if (f1 < 80000 && mult > 1) {
7283 if (bootverbose >= 2)
7284 printk ("%s: clock multiplier assumed\n", ncr_name(np));
7285 np->multiplier = mult;
7286 }
7287 } else {
7288 if ((scntl3 & 7) == 3) f1 = 40000;
7289 else if ((scntl3 & 7) == 5) f1 = 80000;
7290 else f1 = 160000;
7291
7292 f1 /= np->multiplier;
7293 }
7294
7295 /*
7296 ** Compute controller synchronous parameters.
7297 */
7298 f1 *= np->multiplier;
7299 np->clock_khz = f1;
7300}
7301
7302/*===================== LINUX ENTRY POINTS SECTION ==========================*/
7303
7304static int ncr53c8xx_slave_alloc(struct scsi_device *device)
7305{
7306 struct Scsi_Host *host = device->host;
7307 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7308 struct tcb *tp = &np->target[device->id];
7309 tp->starget = device->sdev_target;
7310
7311 return 0;
7312}
7313
7314static int ncr53c8xx_slave_configure(struct scsi_device *device)
7315{
7316 struct Scsi_Host *host = device->host;
7317 struct ncb *np = ((struct host_data *) host->hostdata)->ncb;
7318 struct tcb *tp = &np->target[device->id];
7319 struct lcb *lp = tp->lp[device->lun];
7320 int numtags, depth_to_use;
7321
7322 ncr_setup_lcb(np, device);
7323
7324 /*
7325 ** Select queue depth from driver setup.
7326 ** Donnot use more than configured by user.
7327 ** Use at least 2.
7328 ** Donnot use more than our maximum.
7329 */
7330 numtags = device_queue_depth(np->unit, device->id, device->lun);
7331 if (numtags > tp->usrtags)
7332 numtags = tp->usrtags;
7333 if (!device->tagged_supported)
7334 numtags = 1;
7335 depth_to_use = numtags;
7336 if (depth_to_use < 2)
7337 depth_to_use = 2;
7338 if (depth_to_use > MAX_TAGS)
7339 depth_to_use = MAX_TAGS;
7340
7341 scsi_adjust_queue_depth(device,
7342 (device->tagged_supported ?
7343 MSG_SIMPLE_TAG : 0),
7344 depth_to_use);
7345
7346 /*
7347 ** Since the queue depth is not tunable under Linux,
7348 ** we need to know this value in order not to
7349 ** announce stupid things to user.
7350 **
7351 ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable..
7352 ** In fact we just tuned it, or did I miss
7353 ** something important? :)
7354 */
7355 if (lp) {
7356 lp->numtags = lp->maxtags = numtags;
7357 lp->scdev_depth = depth_to_use;
7358 }
7359 ncr_setup_tags (np, device);
7360
7361#ifdef DEBUG_NCR53C8XX
7362 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n",
7363 np->unit, device->id, device->lun, depth_to_use);
7364#endif
7365
7366 if (spi_support_sync(device->sdev_target) &&
7367 !spi_initial_dv(device->sdev_target))
7368 spi_dv_device(device);
7369 return 0;
7370}
7371
7372static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
7373{
7374 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
7375 unsigned long flags;
7376 int sts;
7377
7378#ifdef DEBUG_NCR53C8XX
7379printk("ncr53c8xx_queue_command\n");
7380#endif
7381
7382 cmd->scsi_done = done;
7383 cmd->host_scribble = NULL;
7384 cmd->__data_mapped = 0;
7385 cmd->__data_mapping = 0;
7386
7387 spin_lock_irqsave(&np->smp_lock, flags);
7388
7389 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
7390 cmd->result = ScsiResult(sts, 0);
7391#ifdef DEBUG_NCR53C8XX
7392printk("ncr53c8xx : command not queued - result=%d\n", sts);
7393#endif
7394 }
7395#ifdef DEBUG_NCR53C8XX
7396 else
7397printk("ncr53c8xx : command successfully queued\n");
7398#endif
7399
7400 spin_unlock_irqrestore(&np->smp_lock, flags);
7401
7402 if (sts != DID_OK) {
7403 unmap_scsi_data(np, cmd);
7404 done(cmd);
7405 sts = 0;
7406 }
7407
7408 return sts;
7409}
7410
7411irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
7412{
7413 unsigned long flags;
7414 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
7415 struct host_data *host_data = (struct host_data *)shost->hostdata;
7416 struct ncb *np = host_data->ncb;
7417 struct scsi_cmnd *done_list;
7418
7419#ifdef DEBUG_NCR53C8XX
7420 printk("ncr53c8xx : interrupt received\n");
7421#endif
7422
7423 if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
7424
7425 spin_lock_irqsave(&np->smp_lock, flags);
7426 ncr_exception(np);
7427 done_list = np->done_list;
7428 np->done_list = NULL;
7429 spin_unlock_irqrestore(&np->smp_lock, flags);
7430
7431 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n");
7432
7433 if (done_list)
7434 ncr_flush_done_cmds(done_list);
7435 return IRQ_HANDLED;
7436}
7437
7438static void ncr53c8xx_timeout(unsigned long npref)
7439{
7440 struct ncb *np = (struct ncb *) npref;
7441 unsigned long flags;
7442 struct scsi_cmnd *done_list;
7443
7444 spin_lock_irqsave(&np->smp_lock, flags);
7445 ncr_timeout(np);
7446 done_list = np->done_list;
7447 np->done_list = NULL;
7448 spin_unlock_irqrestore(&np->smp_lock, flags);
7449
7450 if (done_list)
7451 ncr_flush_done_cmds(done_list);
7452}
7453
7454static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
7455{
7456 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
7457 int sts;
7458 unsigned long flags;
7459 struct scsi_cmnd *done_list;
7460
7461 /*
7462 * If the mid-level driver told us reset is synchronous, it seems
7463 * that we must call the done() callback for the involved command,
7464 * even if this command was not queued to the low-level driver,
7465 * before returning SUCCESS.
7466 */
7467
7468 spin_lock_irqsave(&np->smp_lock, flags);
7469 sts = ncr_reset_bus(np, cmd, 1);
7470
7471 done_list = np->done_list;
7472 np->done_list = NULL;
7473 spin_unlock_irqrestore(&np->smp_lock, flags);
7474
7475 ncr_flush_done_cmds(done_list);
7476
7477 return sts;
7478}
7479
7480#if 0 /* unused and broken */
7481static int ncr53c8xx_abort(struct scsi_cmnd *cmd)
7482{
7483 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
7484 int sts;
7485 unsigned long flags;
7486 struct scsi_cmnd *done_list;
7487
7488#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
7489 printk("ncr53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ld\n",
7490 cmd->pid, cmd->serial_number, cmd->serial_number_at_timeout);
7491#else
7492 printk("ncr53c8xx_abort: command pid %lu\n", cmd->pid);
7493#endif
7494
7495 NCR_LOCK_NCB(np, flags);
7496
7497#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
7498 /*
7499 * We have to just ignore abort requests in some situations.
7500 */
7501 if (cmd->serial_number != cmd->serial_number_at_timeout) {
7502 sts = SCSI_ABORT_NOT_RUNNING;
7503 goto out;
7504 }
7505#endif
7506
7507 sts = ncr_abort_command(np, cmd);
7508out:
7509 done_list = np->done_list;
7510 np->done_list = NULL;
7511 NCR_UNLOCK_NCB(np, flags);
7512
7513 ncr_flush_done_cmds(done_list);
7514
7515 return sts;
7516}
7517#endif
7518
7519
7520/*
7521** Scsi command waiting list management.
7522**
7523** It may happen that we cannot insert a scsi command into the start queue,
7524** in the following circumstances.
7525** Too few preallocated ccb(s),
7526** maxtags < cmd_per_lun of the Linux host control block,
7527** etc...
7528** Such scsi commands are inserted into a waiting list.
7529** When a scsi command complete, we try to requeue the commands of the
7530** waiting list.
7531*/
7532
7533#define next_wcmd host_scribble
7534
7535static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
7536{
7537 struct scsi_cmnd *wcmd;
7538
7539#ifdef DEBUG_WAITING_LIST
7540 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
7541#endif
7542 cmd->next_wcmd = NULL;
7543 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
7544 else {
7545 while ((wcmd->next_wcmd) != 0)
7546 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
7547 wcmd->next_wcmd = (char *) cmd;
7548 }
7549}
7550
7551static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
7552{
7553 struct scsi_cmnd **pcmd = &np->waiting_list;
7554
7555 while (*pcmd) {
7556 if (cmd == *pcmd) {
7557 if (to_remove) {
7558 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
7559 cmd->next_wcmd = NULL;
7560 }
7561#ifdef DEBUG_WAITING_LIST
7562 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd);
7563#endif
7564 return cmd;
7565 }
7566 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
7567 }
7568 return NULL;
7569}
7570
7571static void process_waiting_list(struct ncb *np, int sts)
7572{
7573 struct scsi_cmnd *waiting_list, *wcmd;
7574
7575 waiting_list = np->waiting_list;
7576 np->waiting_list = NULL;
7577
7578#ifdef DEBUG_WAITING_LIST
7579 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
7580#endif
7581 while ((wcmd = waiting_list) != 0) {
7582 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
7583 wcmd->next_wcmd = NULL;
7584 if (sts == DID_OK) {
7585#ifdef DEBUG_WAITING_LIST
7586 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd);
7587#endif
7588 sts = ncr_queue_command(np, wcmd);
7589 }
7590 if (sts != DID_OK) {
7591#ifdef DEBUG_WAITING_LIST
7592 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts);
7593#endif
7594 wcmd->result = ScsiResult(sts, 0);
7595 ncr_queue_done_cmd(np, wcmd);
7596 }
7597 }
7598}
7599
7600#undef next_wcmd
7601
7602static ssize_t show_ncr53c8xx_revision(struct class_device *dev, char *buf)
7603{
7604 struct Scsi_Host *host = class_to_shost(dev);
7605 struct host_data *host_data = (struct host_data *)host->hostdata;
7606
7607 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id);
7608}
7609
7610static struct class_device_attribute ncr53c8xx_revision_attr = {
7611 .attr = { .name = "revision", .mode = S_IRUGO, },
7612 .show = show_ncr53c8xx_revision,
7613};
7614
7615static struct class_device_attribute *ncr53c8xx_host_attrs[] = {
7616 &ncr53c8xx_revision_attr,
7617 NULL
7618};
7619
7620/*==========================================================
7621**
7622** Boot command line.
7623**
7624**==========================================================
7625*/
7626#ifdef MODULE
7627char *ncr53c8xx; /* command line passed by insmod */
7628module_param(ncr53c8xx, charp, 0);
7629#endif
7630
7631static int __init ncr53c8xx_setup(char *str)
7632{
7633 return sym53c8xx__setup(str);
7634}
7635
7636#ifndef MODULE
7637__setup("ncr53c8xx=", ncr53c8xx_setup);
7638#endif
7639
7640
7641/*
7642 * Host attach and initialisations.
7643 *
7644 * Allocate host data and ncb structure.
7645 * Request IO region and remap MMIO region.
7646 * Do chip initialization.
7647 * If all is OK, install interrupt handling and
7648 * start the timer daemon.
7649 */
7650struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
7651 int unit, struct ncr_device *device)
7652{
7653 struct host_data *host_data;
7654 struct ncb *np = NULL;
7655 struct Scsi_Host *instance = NULL;
7656 u_long flags = 0;
7657 int i;
7658
7659 if (!tpnt->name)
7660 tpnt->name = SCSI_NCR_DRIVER_NAME;
7661 if (!tpnt->shost_attrs)
7662 tpnt->shost_attrs = ncr53c8xx_host_attrs;
7663
7664 tpnt->queuecommand = ncr53c8xx_queue_command;
7665 tpnt->slave_configure = ncr53c8xx_slave_configure;
7666 tpnt->slave_alloc = ncr53c8xx_slave_alloc;
7667 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
7668 tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
7669 tpnt->this_id = 7;
7670 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
7671 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
7672 tpnt->use_clustering = ENABLE_CLUSTERING;
7673
7674 if (device->differential)
7675 driver_setup.diff_support = device->differential;
7676
7677 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
7678 unit, device->chip.revision_id, device->slot.irq);
7679
7680 instance = scsi_host_alloc(tpnt, sizeof(*host_data));
7681 if (!instance)
7682 goto attach_error;
7683 host_data = (struct host_data *) instance->hostdata;
7684
7685 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
7686 if (!np)
7687 goto attach_error;
7688 spin_lock_init(&np->smp_lock);
7689 np->dev = device->dev;
7690 np->p_ncb = vtobus(np);
7691 host_data->ncb = np;
7692
7693 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
7694 if (!np->ccb)
7695 goto attach_error;
7696
7697 /* Store input information in the host data structure. */
7698 np->unit = unit;
7699 np->verbose = driver_setup.verbose;
7700 sprintf(np->inst_name, "ncr53c720-%d", np->unit);
7701 np->revision_id = device->chip.revision_id;
7702 np->features = device->chip.features;
7703 np->clock_divn = device->chip.nr_divisor;
7704 np->maxoffs = device->chip.offset_max;
7705 np->maxburst = device->chip.burst_max;
7706 np->myaddr = device->host_id;
7707
7708 /* Allocate SCRIPTS areas. */
7709 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
7710 if (!np->script0)
7711 goto attach_error;
7712 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
7713 if (!np->scripth0)
7714 goto attach_error;
7715
7716 init_timer(&np->timer);
7717 np->timer.data = (unsigned long) np;
7718 np->timer.function = ncr53c8xx_timeout;
7719
7720 /* Try to map the controller chip to virtual and physical memory. */
7721
7722 np->paddr = device->slot.base;
7723 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0;
7724
7725 if (device->slot.base_v)
7726 np->vaddr = device->slot.base_v;
7727 else
7728 np->vaddr = ioremap(device->slot.base_c, 128);
7729
7730 if (!np->vaddr) {
7731 printk(KERN_ERR
7732 "%s: can't map memory mapped IO region\n",ncr_name(np));
7733 goto attach_error;
7734 } else {
7735 if (bootverbose > 1)
7736 printk(KERN_INFO
7737 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
7738 }
7739
7740 /* Make the controller's registers available. Now the INB INW INL
7741 * OUTB OUTW OUTL macros can be used safely.
7742 */
7743
7744 np->reg = (struct ncr_reg __iomem *)np->vaddr;
7745
7746 /* Do chip dependent initialization. */
7747 ncr_prepare_setting(np);
7748
7749 if (np->paddr2 && sizeof(struct script) > 4096) {
7750 np->paddr2 = 0;
7751 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
7752 ncr_name(np));
7753 }
7754
7755 instance->max_channel = 0;
7756 instance->this_id = np->myaddr;
7757 instance->max_id = np->maxwide ? 16 : 8;
7758 instance->max_lun = SCSI_NCR_MAX_LUN;
7759 instance->base = (unsigned long) np->reg;
7760 instance->irq = device->slot.irq;
7761 instance->unique_id = device->slot.base;
7762 instance->dma_channel = 0;
7763 instance->cmd_per_lun = MAX_TAGS;
7764 instance->can_queue = (MAX_START-4);
7765 /* This can happen if you forget to call ncr53c8xx_init from
7766 * your module_init */
7767 BUG_ON(!ncr53c8xx_transport_template);
7768 instance->transportt = ncr53c8xx_transport_template;
7769 scsi_set_device(instance, device->dev);
7770
7771 /* Patch script to physical addresses */
7772 ncr_script_fill(&script0, &scripth0);
7773
7774 np->scripth = np->scripth0;
7775 np->p_scripth = vtobus(np->scripth);
7776 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
7777
7778 ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
7779 (ncrcmd *) np->script0, sizeof(struct script));
7780 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
7781 (ncrcmd *) np->scripth0, sizeof(struct scripth));
7782 np->ccb->p_ccb = vtobus (np->ccb);
7783
7784 /* Patch the script for LED support. */
7785
7786 if (np->features & FE_LED0) {
7787 np->script0->idle[0] =
7788 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
7789 np->script0->reselected[0] =
7790 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
7791 np->script0->start[0] =
7792 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
7793 }
7794
7795 /*
7796 * Look for the target control block of this nexus.
7797 * For i = 0 to 3
7798 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
7799 */
7800 for (i = 0 ; i < 4 ; i++) {
7801 np->jump_tcb[i].l_cmd =
7802 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
7803 np->jump_tcb[i].l_paddr =
7804 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
7805 }
7806
7807 ncr_chip_reset(np, 100);
7808
7809 /* Now check the cache handling of the chipset. */
7810
7811 if (ncr_snooptest(np)) {
7812 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
7813 goto attach_error;
7814 }
7815
7816 /* Install the interrupt handler. */
7817 np->irq = device->slot.irq;
7818
7819 /* Initialize the fixed part of the default ccb. */
7820 ncr_init_ccb(np, np->ccb);
7821
7822 /*
7823 * After SCSI devices have been opened, we cannot reset the bus
7824 * safely, so we do it here. Interrupt handler does the real work.
7825 * Process the reset exception if interrupts are not enabled yet.
7826 * Then enable disconnects.
7827 */
7828 spin_lock_irqsave(&np->smp_lock, flags);
7829 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
7830 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
7831
7832 spin_unlock_irqrestore(&np->smp_lock, flags);
7833 goto attach_error;
7834 }
7835 ncr_exception(np);
7836
7837 np->disc = 1;
7838
7839 /*
7840 * The middle-level SCSI driver does not wait for devices to settle.
7841 * Wait synchronously if more than 2 seconds.
7842 */
7843 if (driver_setup.settle_delay > 2) {
7844 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
7845 ncr_name(np), driver_setup.settle_delay);
7846 mdelay(1000 * driver_setup.settle_delay);
7847 }
7848
7849 /* start the timeout daemon */
7850 np->lasttime=0;
7851 ncr_timeout (np);
7852
7853 /* use SIMPLE TAG messages by default */
7854#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
7855 np->order = M_SIMPLE_TAG;
7856#endif
7857
7858 spin_unlock_irqrestore(&np->smp_lock, flags);
7859
7860 return instance;
7861
7862 attach_error:
7863 if (!instance)
7864 return NULL;
7865 printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
7866 if (!np)
7867 goto unregister;
7868 if (np->scripth0)
7869 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
7870 if (np->script0)
7871 m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
7872 if (np->ccb)
7873 m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
7874 m_free_dma(np, sizeof(struct ncb), "NCB");
7875 host_data->ncb = NULL;
7876
7877 unregister:
7878 scsi_host_put(instance);
7879
7880 return NULL;
7881}
7882
7883
7884int ncr53c8xx_release(struct Scsi_Host *host)
7885{
7886 struct host_data *host_data;
7887#ifdef DEBUG_NCR53C8XX
7888 printk("ncr53c8xx: release\n");
7889#endif
7890 if (!host)
7891 return 1;
7892 host_data = (struct host_data *)host->hostdata;
7893 if (host_data && host_data->ncb)
7894 ncr_detach(host_data->ncb);
7895 return 1;
7896}
7897
7898static void ncr53c8xx_set_period(struct scsi_target *starget, int period)
7899{
7900 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
7901 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
7902 struct tcb *tp = &np->target[starget->id];
7903
7904 if (period > np->maxsync)
7905 period = np->maxsync;
7906 else if (period < np->minsync)
7907 period = np->minsync;
7908
7909 tp->usrsync = period;
7910
7911 ncr_negotiate(np, tp);
7912}
7913
7914static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset)
7915{
7916 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
7917 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
7918 struct tcb *tp = &np->target[starget->id];
7919
7920 if (offset > np->maxoffs)
7921 offset = np->maxoffs;
7922 else if (offset < 0)
7923 offset = 0;
7924
7925 tp->maxoffs = offset;
7926
7927 ncr_negotiate(np, tp);
7928}
7929
7930static void ncr53c8xx_set_width(struct scsi_target *starget, int width)
7931{
7932 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
7933 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
7934 struct tcb *tp = &np->target[starget->id];
7935
7936 if (width > np->maxwide)
7937 width = np->maxwide;
7938 else if (width < 0)
7939 width = 0;
7940
7941 tp->usrwide = width;
7942
7943 ncr_negotiate(np, tp);
7944}
7945
7946static void ncr53c8xx_get_signalling(struct Scsi_Host *shost)
7947{
7948 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb;
7949 enum spi_signal_type type;
7950
7951 switch (np->scsi_mode) {
7952 case SMODE_SE:
7953 type = SPI_SIGNAL_SE;
7954 break;
7955 case SMODE_HVD:
7956 type = SPI_SIGNAL_HVD;
7957 break;
7958 default:
7959 type = SPI_SIGNAL_UNKNOWN;
7960 break;
7961 }
7962 spi_signalling(shost) = type;
7963}
7964
7965static struct spi_function_template ncr53c8xx_transport_functions = {
7966 .set_period = ncr53c8xx_set_period,
7967 .show_period = 1,
7968 .set_offset = ncr53c8xx_set_offset,
7969 .show_offset = 1,
7970 .set_width = ncr53c8xx_set_width,
7971 .show_width = 1,
7972 .get_signalling = ncr53c8xx_get_signalling,
7973};
7974
7975int __init ncr53c8xx_init(void)
7976{
7977 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions);
7978 if (!ncr53c8xx_transport_template)
7979 return -ENODEV;
7980 return 0;
7981}
7982
7983void ncr53c8xx_exit(void)
7984{
7985 spi_release_transport(ncr53c8xx_transport_template);
7986}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 05:16:52 -0500