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path: root/drivers/scsi/mpt2sas/mpt2sas_base.c
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Diffstat (limited to 'drivers/scsi/mpt2sas/mpt2sas_base.c')
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.c65
1 files changed, 25 insertions, 40 deletions
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
index efa0255491c2..1da606cb2461 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -94,7 +94,7 @@ module_param(diag_buffer_enable, int, 0);
94MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers " 94MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
95 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)"); 95 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
96 96
97int mpt2sas_fwfault_debug; 97static int mpt2sas_fwfault_debug;
98MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 98MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
99 "and halt firmware - (default=0)"); 99 "and halt firmware - (default=0)");
100 100
@@ -857,7 +857,7 @@ _base_interrupt(int irq, void *bus_id)
857 completed_cmds = 0; 857 completed_cmds = 0;
858 cb_idx = 0xFF; 858 cb_idx = 0xFF;
859 do { 859 do {
860 rd.word = rpf->Words; 860 rd.word = le64_to_cpu(rpf->Words);
861 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 861 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
862 goto out; 862 goto out;
863 reply = 0; 863 reply = 0;
@@ -906,7 +906,7 @@ _base_interrupt(int irq, void *bus_id)
906 906
907 next: 907 next:
908 908
909 rpf->Words = ULLONG_MAX; 909 rpf->Words = cpu_to_le64(ULLONG_MAX);
910 ioc->reply_post_host_index = (ioc->reply_post_host_index == 910 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
911 (ioc->reply_post_queue_depth - 1)) ? 0 : 911 (ioc->reply_post_queue_depth - 1)) ? 0 :
912 ioc->reply_post_host_index + 1; 912 ioc->reply_post_host_index + 1;
@@ -1817,7 +1817,9 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1817 char desc[16]; 1817 char desc[16];
1818 u8 revision; 1818 u8 revision;
1819 u32 iounit_pg1_flags; 1819 u32 iounit_pg1_flags;
1820 u32 bios_version;
1820 1821
1822 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
1821 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1823 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1822 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1824 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1823 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1825 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
@@ -1828,10 +1830,10 @@ _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1828 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1830 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1829 ioc->facts.FWVersion.Word & 0x000000FF, 1831 ioc->facts.FWVersion.Word & 0x000000FF,
1830 revision, 1832 revision,
1831 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1833 (bios_version & 0xFF000000) >> 24,
1832 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1834 (bios_version & 0x00FF0000) >> 16,
1833 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1835 (bios_version & 0x0000FF00) >> 8,
1834 ioc->bios_pg3.BiosVersion & 0x000000FF); 1836 bios_version & 0x000000FF);
1835 1837
1836 _base_display_dell_branding(ioc); 1838 _base_display_dell_branding(ioc);
1837 _base_display_intel_branding(ioc); 1839 _base_display_intel_branding(ioc);
@@ -2150,7 +2152,7 @@ _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2150static int 2152static int
2151_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2153_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2152{ 2154{
2153 Mpi2IOCFactsReply_t *facts; 2155 struct mpt2sas_facts *facts;
2154 u32 queue_size, queue_diff; 2156 u32 queue_size, queue_diff;
2155 u16 max_sge_elements; 2157 u16 max_sge_elements;
2156 u16 num_of_reply_frames; 2158 u16 num_of_reply_frames;
@@ -2783,7 +2785,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2783 int i; 2785 int i;
2784 u8 failed; 2786 u8 failed;
2785 u16 dummy; 2787 u16 dummy;
2786 u32 *mfp; 2788 __le32 *mfp;
2787 2789
2788 /* make sure doorbell is not in use */ 2790 /* make sure doorbell is not in use */
2789 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2791 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
@@ -2871,7 +2873,7 @@ _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2871 writel(0, &ioc->chip->HostInterruptStatus); 2873 writel(0, &ioc->chip->HostInterruptStatus);
2872 2874
2873 if (ioc->logging_level & MPT_DEBUG_INIT) { 2875 if (ioc->logging_level & MPT_DEBUG_INIT) {
2874 mfp = (u32 *)reply; 2876 mfp = (__le32 *)reply;
2875 printk(KERN_INFO "\toffset:data\n"); 2877 printk(KERN_INFO "\toffset:data\n");
2876 for (i = 0; i < reply_bytes/4; i++) 2878 for (i = 0; i < reply_bytes/4; i++)
2877 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 2879 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
@@ -3097,7 +3099,8 @@ static int
3097_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 3099_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3098{ 3100{
3099 Mpi2PortFactsRequest_t mpi_request; 3101 Mpi2PortFactsRequest_t mpi_request;
3100 Mpi2PortFactsReply_t mpi_reply, *pfacts; 3102 Mpi2PortFactsReply_t mpi_reply;
3103 struct mpt2sas_port_facts *pfacts;
3101 int mpi_reply_sz, mpi_request_sz, r; 3104 int mpi_reply_sz, mpi_request_sz, r;
3102 3105
3103 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3106 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
@@ -3139,7 +3142,8 @@ static int
3139_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3142_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3140{ 3143{
3141 Mpi2IOCFactsRequest_t mpi_request; 3144 Mpi2IOCFactsRequest_t mpi_request;
3142 Mpi2IOCFactsReply_t mpi_reply, *facts; 3145 Mpi2IOCFactsReply_t mpi_reply;
3146 struct mpt2sas_facts *facts;
3143 int mpi_reply_sz, mpi_request_sz, r; 3147 int mpi_reply_sz, mpi_request_sz, r;
3144 3148
3145 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3149 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
@@ -3225,17 +3229,6 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3225 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 3229 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3226 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 3230 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3227 3231
3228 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
3229 * removed and made reserved. For those with older firmware will need
3230 * this fix. It was decided that the Reply and Request frame sizes are
3231 * the same.
3232 */
3233 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
3234 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
3235/* mpi_request.SystemReplyFrameSize =
3236 * cpu_to_le16(ioc->reply_sz);
3237 */
3238 }
3239 3232
3240 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 3233 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3241 mpi_request.ReplyDescriptorPostQueueDepth = 3234 mpi_request.ReplyDescriptorPostQueueDepth =
@@ -3243,25 +3236,17 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3243 mpi_request.ReplyFreeQueueDepth = 3236 mpi_request.ReplyFreeQueueDepth =
3244 cpu_to_le16(ioc->reply_free_queue_depth); 3237 cpu_to_le16(ioc->reply_free_queue_depth);
3245 3238
3246#if BITS_PER_LONG > 32
3247 mpi_request.SenseBufferAddressHigh = 3239 mpi_request.SenseBufferAddressHigh =
3248 cpu_to_le32(ioc->sense_dma >> 32); 3240 cpu_to_le32((u64)ioc->sense_dma >> 32);
3249 mpi_request.SystemReplyAddressHigh = 3241 mpi_request.SystemReplyAddressHigh =
3250 cpu_to_le32(ioc->reply_dma >> 32); 3242 cpu_to_le32((u64)ioc->reply_dma >> 32);
3251 mpi_request.SystemRequestFrameBaseAddress = 3243 mpi_request.SystemRequestFrameBaseAddress =
3252 cpu_to_le64(ioc->request_dma); 3244 cpu_to_le64((u64)ioc->request_dma);
3253 mpi_request.ReplyFreeQueueAddress = 3245 mpi_request.ReplyFreeQueueAddress =
3254 cpu_to_le64(ioc->reply_free_dma); 3246 cpu_to_le64((u64)ioc->reply_free_dma);
3255 mpi_request.ReplyDescriptorPostQueueAddress = 3247 mpi_request.ReplyDescriptorPostQueueAddress =
3256 cpu_to_le64(ioc->reply_post_free_dma); 3248 cpu_to_le64((u64)ioc->reply_post_free_dma);
3257#else 3249
3258 mpi_request.SystemRequestFrameBaseAddress =
3259 cpu_to_le32(ioc->request_dma);
3260 mpi_request.ReplyFreeQueueAddress =
3261 cpu_to_le32(ioc->reply_free_dma);
3262 mpi_request.ReplyDescriptorPostQueueAddress =
3263 cpu_to_le32(ioc->reply_post_free_dma);
3264#endif
3265 3250
3266 /* This time stamp specifies number of milliseconds 3251 /* This time stamp specifies number of milliseconds
3267 * since epoch ~ midnight January 1, 1970. 3252 * since epoch ~ midnight January 1, 1970.
@@ -3271,10 +3256,10 @@ _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3271 (current_time.tv_usec / 1000)); 3256 (current_time.tv_usec / 1000));
3272 3257
3273 if (ioc->logging_level & MPT_DEBUG_INIT) { 3258 if (ioc->logging_level & MPT_DEBUG_INIT) {
3274 u32 *mfp; 3259 __le32 *mfp;
3275 int i; 3260 int i;
3276 3261
3277 mfp = (u32 *)&mpi_request; 3262 mfp = (__le32 *)&mpi_request;
3278 printk(KERN_INFO "\toffset:data\n"); 3263 printk(KERN_INFO "\toffset:data\n");
3279 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3264 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3280 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 3265 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
@@ -3759,7 +3744,7 @@ _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3759 3744
3760 /* initialize Reply Post Free Queue */ 3745 /* initialize Reply Post Free Queue */
3761 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3746 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3762 ioc->reply_post_free[i].Words = ULLONG_MAX; 3747 ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
3763 3748
3764 r = _base_send_ioc_init(ioc, sleep_flag); 3749 r = _base_send_ioc_init(ioc, sleep_flag);
3765 if (r) 3750 if (r)