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path: root/drivers/scsi/lpfc/lpfc_init.c
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Diffstat (limited to 'drivers/scsi/lpfc/lpfc_init.c')
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c1062
1 files changed, 741 insertions, 321 deletions
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index b3065791f303..462242dcdd0a 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -446,23 +446,25 @@ lpfc_config_port_post(struct lpfc_hba *phba)
446 /* Get the default values for Model Name and Description */ 446 /* Get the default values for Model Name and Description */
447 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 447 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
448 448
449 if ((phba->cfg_link_speed > LINK_SPEED_10G) 449 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_16G)
450 || ((phba->cfg_link_speed == LINK_SPEED_1G) 450 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G)
451 && !(phba->lmt & LMT_1Gb)) 451 && !(phba->lmt & LMT_1Gb))
452 || ((phba->cfg_link_speed == LINK_SPEED_2G) 452 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G)
453 && !(phba->lmt & LMT_2Gb)) 453 && !(phba->lmt & LMT_2Gb))
454 || ((phba->cfg_link_speed == LINK_SPEED_4G) 454 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G)
455 && !(phba->lmt & LMT_4Gb)) 455 && !(phba->lmt & LMT_4Gb))
456 || ((phba->cfg_link_speed == LINK_SPEED_8G) 456 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G)
457 && !(phba->lmt & LMT_8Gb)) 457 && !(phba->lmt & LMT_8Gb))
458 || ((phba->cfg_link_speed == LINK_SPEED_10G) 458 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G)
459 && !(phba->lmt & LMT_10Gb))) { 459 && !(phba->lmt & LMT_10Gb))
460 || ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G)
461 && !(phba->lmt & LMT_16Gb))) {
460 /* Reset link speed to auto */ 462 /* Reset link speed to auto */
461 lpfc_printf_log(phba, KERN_WARNING, LOG_LINK_EVENT, 463 lpfc_printf_log(phba, KERN_WARNING, LOG_LINK_EVENT,
462 "1302 Invalid speed for this board: " 464 "1302 Invalid speed for this board: "
463 "Reset link speed to auto: x%x\n", 465 "Reset link speed to auto: x%x\n",
464 phba->cfg_link_speed); 466 phba->cfg_link_speed);
465 phba->cfg_link_speed = LINK_SPEED_AUTO; 467 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
466 } 468 }
467 469
468 phba->link_state = LPFC_LINK_DOWN; 470 phba->link_state = LPFC_LINK_DOWN;
@@ -648,22 +650,23 @@ lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
648 mb = &pmb->u.mb; 650 mb = &pmb->u.mb;
649 pmb->vport = vport; 651 pmb->vport = vport;
650 652
651 lpfc_init_link(phba, pmb, phba->cfg_topology, 653 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
652 phba->cfg_link_speed);
653 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 654 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
654 lpfc_set_loopback_flag(phba); 655 lpfc_set_loopback_flag(phba);
655 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 656 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
656 if (rc != MBX_SUCCESS) { 657 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
657 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
658 "0498 Adapter failed to init, mbxCmd x%x " 659 "0498 Adapter failed to init, mbxCmd x%x "
659 "INIT_LINK, mbxStatus x%x\n", 660 "INIT_LINK, mbxStatus x%x\n",
660 mb->mbxCommand, mb->mbxStatus); 661 mb->mbxCommand, mb->mbxStatus);
661 /* Clear all interrupt enable conditions */ 662 if (phba->sli_rev <= LPFC_SLI_REV3) {
662 writel(0, phba->HCregaddr); 663 /* Clear all interrupt enable conditions */
663 readl(phba->HCregaddr); /* flush */ 664 writel(0, phba->HCregaddr);
664 /* Clear all pending interrupts */ 665 readl(phba->HCregaddr); /* flush */
665 writel(0xffffffff, phba->HAregaddr); 666 /* Clear all pending interrupts */
666 readl(phba->HAregaddr); /* flush */ 667 writel(0xffffffff, phba->HAregaddr);
668 readl(phba->HAregaddr); /* flush */
669 }
667 phba->link_state = LPFC_HBA_ERROR; 670 phba->link_state = LPFC_HBA_ERROR;
668 if (rc != MBX_BUSY || flag == MBX_POLL) 671 if (rc != MBX_BUSY || flag == MBX_POLL)
669 mempool_free(pmb, phba->mbox_mem_pool); 672 mempool_free(pmb, phba->mbox_mem_pool);
@@ -927,6 +930,35 @@ lpfc_hb_timeout(unsigned long ptr)
927} 930}
928 931
929/** 932/**
933 * lpfc_rrq_timeout - The RRQ-timer timeout handler
934 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
935 *
936 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
937 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
938 * work-port-events bitmap and the worker thread is notified. This timeout
939 * event will be used by the worker thread to invoke the actual timeout
940 * handler routine, lpfc_rrq_handler. Any periodical operations will
941 * be performed in the timeout handler and the RRQ timeout event bit shall
942 * be cleared by the worker thread after it has taken the event bitmap out.
943 **/
944static void
945lpfc_rrq_timeout(unsigned long ptr)
946{
947 struct lpfc_hba *phba;
948 uint32_t tmo_posted;
949 unsigned long iflag;
950
951 phba = (struct lpfc_hba *)ptr;
952 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
953 tmo_posted = phba->hba_flag & HBA_RRQ_ACTIVE;
954 if (!tmo_posted)
955 phba->hba_flag |= HBA_RRQ_ACTIVE;
956 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
957 if (!tmo_posted)
958 lpfc_worker_wake_up(phba);
959}
960
961/**
930 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 962 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
931 * @phba: pointer to lpfc hba data structure. 963 * @phba: pointer to lpfc hba data structure.
932 * @pmboxq: pointer to the driver internal queue element for mailbox command. 964 * @pmboxq: pointer to the driver internal queue element for mailbox command.
@@ -1374,6 +1406,8 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1374 struct lpfc_vport *vport = phba->pport; 1406 struct lpfc_vport *vport = phba->pport;
1375 uint32_t event_data; 1407 uint32_t event_data;
1376 struct Scsi_Host *shost; 1408 struct Scsi_Host *shost;
1409 uint32_t if_type;
1410 struct lpfc_register portstat_reg;
1377 1411
1378 /* If the pci channel is offline, ignore possible errors, since 1412 /* If the pci channel is offline, ignore possible errors, since
1379 * we cannot communicate with the pci card anyway. 1413 * we cannot communicate with the pci card anyway.
@@ -1390,17 +1424,49 @@ lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1390 /* For now, the actual action for SLI4 device handling is not 1424 /* For now, the actual action for SLI4 device handling is not
1391 * specified yet, just treated it as adaptor hardware failure 1425 * specified yet, just treated it as adaptor hardware failure
1392 */ 1426 */
1393 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1394 "0143 SLI4 Adapter Hardware Error Data: x%x x%x\n",
1395 phba->work_status[0], phba->work_status[1]);
1396
1397 event_data = FC_REG_DUMP_EVENT; 1427 event_data = FC_REG_DUMP_EVENT;
1398 shost = lpfc_shost_from_vport(vport); 1428 shost = lpfc_shost_from_vport(vport);
1399 fc_host_post_vendor_event(shost, fc_get_event_number(), 1429 fc_host_post_vendor_event(shost, fc_get_event_number(),
1400 sizeof(event_data), (char *) &event_data, 1430 sizeof(event_data), (char *) &event_data,
1401 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1431 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1402 1432
1403 lpfc_sli4_offline_eratt(phba); 1433 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1434 switch (if_type) {
1435 case LPFC_SLI_INTF_IF_TYPE_0:
1436 lpfc_sli4_offline_eratt(phba);
1437 break;
1438 case LPFC_SLI_INTF_IF_TYPE_2:
1439 portstat_reg.word0 =
1440 readl(phba->sli4_hba.u.if_type2.STATUSregaddr);
1441
1442 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
1443 /* TODO: Register for Overtemp async events. */
1444 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1445 "2889 Port Overtemperature event, "
1446 "taking port\n");
1447 spin_lock_irq(&phba->hbalock);
1448 phba->over_temp_state = HBA_OVER_TEMP;
1449 spin_unlock_irq(&phba->hbalock);
1450 lpfc_sli4_offline_eratt(phba);
1451 return;
1452 }
1453 if (bf_get(lpfc_sliport_status_rn, &portstat_reg)) {
1454 /*
1455 * TODO: Attempt port recovery via a port reset.
1456 * When fully implemented, the driver should
1457 * attempt to recover the port here and return.
1458 * For now, log an error and take the port offline.
1459 */
1460 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1461 "2887 Port Error: Attempting "
1462 "Port Recovery\n");
1463 }
1464 lpfc_sli4_offline_eratt(phba);
1465 break;
1466 case LPFC_SLI_INTF_IF_TYPE_1:
1467 default:
1468 break;
1469 }
1404} 1470}
1405 1471
1406/** 1472/**
@@ -1459,8 +1525,8 @@ lpfc_handle_latt(struct lpfc_hba *phba)
1459 lpfc_els_flush_all_cmd(phba); 1525 lpfc_els_flush_all_cmd(phba);
1460 1526
1461 psli->slistat.link_event++; 1527 psli->slistat.link_event++;
1462 lpfc_read_la(phba, pmb, mp); 1528 lpfc_read_topology(phba, pmb, mp);
1463 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la; 1529 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
1464 pmb->vport = vport; 1530 pmb->vport = vport;
1465 /* Block ELS IOCBs until we have processed this mbox command */ 1531 /* Block ELS IOCBs until we have processed this mbox command */
1466 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 1532 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
@@ -1853,6 +1919,14 @@ lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
1853 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 1919 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
1854 "Fibre Channel Adapter"}; 1920 "Fibre Channel Adapter"};
1855 break; 1921 break;
1922 case PCI_DEVICE_ID_LANCER_FC:
1923 oneConnect = 1;
1924 m = (typeof(m)){"Undefined", "PCIe", "Fibre Channel Adapter"};
1925 break;
1926 case PCI_DEVICE_ID_LANCER_FCOE:
1927 oneConnect = 1;
1928 m = (typeof(m)){"Undefined", "PCIe", "FCoE"};
1929 break;
1856 default: 1930 default:
1857 m = (typeof(m)){"Unknown", "", ""}; 1931 m = (typeof(m)){"Unknown", "", ""};
1858 break; 1932 break;
@@ -2943,63 +3017,6 @@ lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
2943} 3017}
2944 3018
2945/** 3019/**
2946 * lpfc_sli4_fw_cfg_check - Read the firmware config and verify FCoE support
2947 * @phba: pointer to lpfc hba data structure.
2948 *
2949 * This function uses the QUERY_FW_CFG mailbox command to determine if the
2950 * firmware loaded supports FCoE. A return of zero indicates that the mailbox
2951 * was successful and the firmware supports FCoE. Any other return indicates
2952 * a error. It is assumed that this function will be called before interrupts
2953 * are enabled.
2954 **/
2955static int
2956lpfc_sli4_fw_cfg_check(struct lpfc_hba *phba)
2957{
2958 int rc = 0;
2959 LPFC_MBOXQ_t *mboxq;
2960 struct lpfc_mbx_query_fw_cfg *query_fw_cfg;
2961 uint32_t length;
2962 uint32_t shdr_status, shdr_add_status;
2963
2964 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2965 if (!mboxq) {
2966 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2967 "2621 Failed to allocate mbox for "
2968 "query firmware config cmd\n");
2969 return -ENOMEM;
2970 }
2971 query_fw_cfg = &mboxq->u.mqe.un.query_fw_cfg;
2972 length = (sizeof(struct lpfc_mbx_query_fw_cfg) -
2973 sizeof(struct lpfc_sli4_cfg_mhdr));
2974 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
2975 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
2976 length, LPFC_SLI4_MBX_EMBED);
2977 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
2978 /* The IOCTL status is embedded in the mailbox subheader. */
2979 shdr_status = bf_get(lpfc_mbox_hdr_status,
2980 &query_fw_cfg->header.cfg_shdr.response);
2981 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
2982 &query_fw_cfg->header.cfg_shdr.response);
2983 if (shdr_status || shdr_add_status || rc != MBX_SUCCESS) {
2984 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2985 "2622 Query Firmware Config failed "
2986 "mbx status x%x, status x%x add_status x%x\n",
2987 rc, shdr_status, shdr_add_status);
2988 return -EINVAL;
2989 }
2990 if (!bf_get(lpfc_function_mode_fcoe_i, query_fw_cfg)) {
2991 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2992 "2623 FCoE Function not supported by firmware. "
2993 "Function mode = %08x\n",
2994 query_fw_cfg->function_mode);
2995 return -EINVAL;
2996 }
2997 if (rc != MBX_TIMEOUT)
2998 mempool_free(mboxq, phba->mbox_mem_pool);
2999 return 0;
3000}
3001
3002/**
3003 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 3020 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
3004 * @phba: pointer to lpfc hba data structure. 3021 * @phba: pointer to lpfc hba data structure.
3005 * @acqe_link: pointer to the async link completion queue entry. 3022 * @acqe_link: pointer to the async link completion queue entry.
@@ -3051,20 +3068,20 @@ lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
3051 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 3068 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
3052 case LPFC_ASYNC_LINK_STATUS_DOWN: 3069 case LPFC_ASYNC_LINK_STATUS_DOWN:
3053 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 3070 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
3054 att_type = AT_LINK_DOWN; 3071 att_type = LPFC_ATT_LINK_DOWN;
3055 break; 3072 break;
3056 case LPFC_ASYNC_LINK_STATUS_UP: 3073 case LPFC_ASYNC_LINK_STATUS_UP:
3057 /* Ignore physical link up events - wait for logical link up */ 3074 /* Ignore physical link up events - wait for logical link up */
3058 att_type = AT_RESERVED; 3075 att_type = LPFC_ATT_RESERVED;
3059 break; 3076 break;
3060 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 3077 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
3061 att_type = AT_LINK_UP; 3078 att_type = LPFC_ATT_LINK_UP;
3062 break; 3079 break;
3063 default: 3080 default:
3064 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 3081 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3065 "0399 Invalid link attention type: x%x\n", 3082 "0399 Invalid link attention type: x%x\n",
3066 bf_get(lpfc_acqe_link_status, acqe_link)); 3083 bf_get(lpfc_acqe_link_status, acqe_link));
3067 att_type = AT_RESERVED; 3084 att_type = LPFC_ATT_RESERVED;
3068 break; 3085 break;
3069 } 3086 }
3070 return att_type; 3087 return att_type;
@@ -3088,36 +3105,32 @@ lpfc_sli4_parse_latt_link_speed(struct lpfc_hba *phba,
3088 3105
3089 switch (bf_get(lpfc_acqe_link_speed, acqe_link)) { 3106 switch (bf_get(lpfc_acqe_link_speed, acqe_link)) {
3090 case LPFC_ASYNC_LINK_SPEED_ZERO: 3107 case LPFC_ASYNC_LINK_SPEED_ZERO:
3091 link_speed = LA_UNKNW_LINK;
3092 break;
3093 case LPFC_ASYNC_LINK_SPEED_10MBPS: 3108 case LPFC_ASYNC_LINK_SPEED_10MBPS:
3094 link_speed = LA_UNKNW_LINK;
3095 break;
3096 case LPFC_ASYNC_LINK_SPEED_100MBPS: 3109 case LPFC_ASYNC_LINK_SPEED_100MBPS:
3097 link_speed = LA_UNKNW_LINK; 3110 link_speed = LPFC_LINK_SPEED_UNKNOWN;
3098 break; 3111 break;
3099 case LPFC_ASYNC_LINK_SPEED_1GBPS: 3112 case LPFC_ASYNC_LINK_SPEED_1GBPS:
3100 link_speed = LA_1GHZ_LINK; 3113 link_speed = LPFC_LINK_SPEED_1GHZ;
3101 break; 3114 break;
3102 case LPFC_ASYNC_LINK_SPEED_10GBPS: 3115 case LPFC_ASYNC_LINK_SPEED_10GBPS:
3103 link_speed = LA_10GHZ_LINK; 3116 link_speed = LPFC_LINK_SPEED_10GHZ;
3104 break; 3117 break;
3105 default: 3118 default:
3106 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 3119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3107 "0483 Invalid link-attention link speed: x%x\n", 3120 "0483 Invalid link-attention link speed: x%x\n",
3108 bf_get(lpfc_acqe_link_speed, acqe_link)); 3121 bf_get(lpfc_acqe_link_speed, acqe_link));
3109 link_speed = LA_UNKNW_LINK; 3122 link_speed = LPFC_LINK_SPEED_UNKNOWN;
3110 break; 3123 break;
3111 } 3124 }
3112 return link_speed; 3125 return link_speed;
3113} 3126}
3114 3127
3115/** 3128/**
3116 * lpfc_sli4_async_link_evt - Process the asynchronous link event 3129 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
3117 * @phba: pointer to lpfc hba data structure. 3130 * @phba: pointer to lpfc hba data structure.
3118 * @acqe_link: pointer to the async link completion queue entry. 3131 * @acqe_link: pointer to the async link completion queue entry.
3119 * 3132 *
3120 * This routine is to handle the SLI4 asynchronous link event. 3133 * This routine is to handle the SLI4 asynchronous FCoE link event.
3121 **/ 3134 **/
3122static void 3135static void
3123lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 3136lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
@@ -3126,11 +3139,12 @@ lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
3126 struct lpfc_dmabuf *mp; 3139 struct lpfc_dmabuf *mp;
3127 LPFC_MBOXQ_t *pmb; 3140 LPFC_MBOXQ_t *pmb;
3128 MAILBOX_t *mb; 3141 MAILBOX_t *mb;
3129 READ_LA_VAR *la; 3142 struct lpfc_mbx_read_top *la;
3130 uint8_t att_type; 3143 uint8_t att_type;
3144 int rc;
3131 3145
3132 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 3146 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
3133 if (att_type != AT_LINK_DOWN && att_type != AT_LINK_UP) 3147 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
3134 return; 3148 return;
3135 phba->fcoe_eventtag = acqe_link->event_tag; 3149 phba->fcoe_eventtag = acqe_link->event_tag;
3136 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 3150 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
@@ -3161,45 +3175,168 @@ lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
3161 /* Update link event statistics */ 3175 /* Update link event statistics */
3162 phba->sli.slistat.link_event++; 3176 phba->sli.slistat.link_event++;
3163 3177
3164 /* Create pseudo lpfc_handle_latt mailbox command from link ACQE */ 3178 /* Create lpfc_handle_latt mailbox command from link ACQE */
3165 lpfc_read_la(phba, pmb, mp); 3179 lpfc_read_topology(phba, pmb, mp);
3180 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
3166 pmb->vport = phba->pport; 3181 pmb->vport = phba->pport;
3167 3182
3183 /* Keep the link status for extra SLI4 state machine reference */
3184 phba->sli4_hba.link_state.speed =
3185 bf_get(lpfc_acqe_link_speed, acqe_link);
3186 phba->sli4_hba.link_state.duplex =
3187 bf_get(lpfc_acqe_link_duplex, acqe_link);
3188 phba->sli4_hba.link_state.status =
3189 bf_get(lpfc_acqe_link_status, acqe_link);
3190 phba->sli4_hba.link_state.type =
3191 bf_get(lpfc_acqe_link_type, acqe_link);
3192 phba->sli4_hba.link_state.number =
3193 bf_get(lpfc_acqe_link_number, acqe_link);
3194 phba->sli4_hba.link_state.fault =
3195 bf_get(lpfc_acqe_link_fault, acqe_link);
3196 phba->sli4_hba.link_state.logical_speed =
3197 bf_get(lpfc_acqe_logical_link_speed, acqe_link);
3198 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3199 "2900 Async FCoE Link event - Speed:%dGBit duplex:x%x "
3200 "LA Type:x%x Port Type:%d Port Number:%d Logical "
3201 "speed:%dMbps Fault:%d\n",
3202 phba->sli4_hba.link_state.speed,
3203 phba->sli4_hba.link_state.topology,
3204 phba->sli4_hba.link_state.status,
3205 phba->sli4_hba.link_state.type,
3206 phba->sli4_hba.link_state.number,
3207 phba->sli4_hba.link_state.logical_speed * 10,
3208 phba->sli4_hba.link_state.fault);
3209 /*
3210 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
3211 * topology info. Note: Optional for non FC-AL ports.
3212 */
3213 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
3214 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
3215 if (rc == MBX_NOT_FINISHED)
3216 goto out_free_dmabuf;
3217 return;
3218 }
3219 /*
3220 * For FCoE Mode: fill in all the topology information we need and call
3221 * the READ_TOPOLOGY completion routine to continue without actually
3222 * sending the READ_TOPOLOGY mailbox command to the port.
3223 */
3168 /* Parse and translate status field */ 3224 /* Parse and translate status field */
3169 mb = &pmb->u.mb; 3225 mb = &pmb->u.mb;
3170 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link); 3226 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
3171 3227
3172 /* Parse and translate link attention fields */ 3228 /* Parse and translate link attention fields */
3173 la = (READ_LA_VAR *) &pmb->u.mb.un.varReadLA; 3229 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
3174 la->eventTag = acqe_link->event_tag; 3230 la->eventTag = acqe_link->event_tag;
3175 la->attType = att_type; 3231 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
3176 la->UlnkSpeed = lpfc_sli4_parse_latt_link_speed(phba, acqe_link); 3232 bf_set(lpfc_mbx_read_top_link_spd, la,
3233 lpfc_sli4_parse_latt_link_speed(phba, acqe_link));
3177 3234
3178 /* Fake the the following irrelvant fields */ 3235 /* Fake the the following irrelvant fields */
3179 la->topology = TOPOLOGY_PT_PT; 3236 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
3180 la->granted_AL_PA = 0; 3237 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
3181 la->il = 0; 3238 bf_set(lpfc_mbx_read_top_il, la, 0);
3182 la->pb = 0; 3239 bf_set(lpfc_mbx_read_top_pb, la, 0);
3183 la->fa = 0; 3240 bf_set(lpfc_mbx_read_top_fa, la, 0);
3184 la->mm = 0; 3241 bf_set(lpfc_mbx_read_top_mm, la, 0);
3242
3243 /* Invoke the lpfc_handle_latt mailbox command callback function */
3244 lpfc_mbx_cmpl_read_topology(phba, pmb);
3245
3246 return;
3185 3247
3248out_free_dmabuf:
3249 kfree(mp);
3250out_free_pmb:
3251 mempool_free(pmb, phba->mbox_mem_pool);
3252}
3253
3254/**
3255 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
3256 * @phba: pointer to lpfc hba data structure.
3257 * @acqe_fc: pointer to the async fc completion queue entry.
3258 *
3259 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
3260 * that the event was received and then issue a read_topology mailbox command so
3261 * that the rest of the driver will treat it the same as SLI3.
3262 **/
3263static void
3264lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
3265{
3266 struct lpfc_dmabuf *mp;
3267 LPFC_MBOXQ_t *pmb;
3268 int rc;
3269
3270 if (bf_get(lpfc_trailer_type, acqe_fc) !=
3271 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
3272 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3273 "2895 Non FC link Event detected.(%d)\n",
3274 bf_get(lpfc_trailer_type, acqe_fc));
3275 return;
3276 }
3186 /* Keep the link status for extra SLI4 state machine reference */ 3277 /* Keep the link status for extra SLI4 state machine reference */
3187 phba->sli4_hba.link_state.speed = 3278 phba->sli4_hba.link_state.speed =
3188 bf_get(lpfc_acqe_link_speed, acqe_link); 3279 bf_get(lpfc_acqe_fc_la_speed, acqe_fc);
3189 phba->sli4_hba.link_state.duplex = 3280 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
3190 bf_get(lpfc_acqe_link_duplex, acqe_link); 3281 phba->sli4_hba.link_state.topology =
3282 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
3191 phba->sli4_hba.link_state.status = 3283 phba->sli4_hba.link_state.status =
3192 bf_get(lpfc_acqe_link_status, acqe_link); 3284 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
3193 phba->sli4_hba.link_state.physical = 3285 phba->sli4_hba.link_state.type =
3194 bf_get(lpfc_acqe_link_physical, acqe_link); 3286 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
3287 phba->sli4_hba.link_state.number =
3288 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
3195 phba->sli4_hba.link_state.fault = 3289 phba->sli4_hba.link_state.fault =
3196 bf_get(lpfc_acqe_link_fault, acqe_link); 3290 bf_get(lpfc_acqe_link_fault, acqe_fc);
3197 phba->sli4_hba.link_state.logical_speed = 3291 phba->sli4_hba.link_state.logical_speed =
3198 bf_get(lpfc_acqe_qos_link_speed, acqe_link); 3292 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc);
3293 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3294 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
3295 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
3296 "%dMbps Fault:%d\n",
3297 phba->sli4_hba.link_state.speed,
3298 phba->sli4_hba.link_state.topology,
3299 phba->sli4_hba.link_state.status,
3300 phba->sli4_hba.link_state.type,
3301 phba->sli4_hba.link_state.number,
3302 phba->sli4_hba.link_state.logical_speed * 10,
3303 phba->sli4_hba.link_state.fault);
3304 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
3305 if (!pmb) {
3306 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3307 "2897 The mboxq allocation failed\n");
3308 return;
3309 }
3310 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
3311 if (!mp) {
3312 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3313 "2898 The lpfc_dmabuf allocation failed\n");
3314 goto out_free_pmb;
3315 }
3316 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
3317 if (!mp->virt) {
3318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3319 "2899 The mbuf allocation failed\n");
3320 goto out_free_dmabuf;
3321 }
3199 3322
3200 /* Invoke the lpfc_handle_latt mailbox command callback function */ 3323 /* Cleanup any outstanding ELS commands */
3201 lpfc_mbx_cmpl_read_la(phba, pmb); 3324 lpfc_els_flush_all_cmd(phba);
3325
3326 /* Block ELS IOCBs until we have done process link event */
3327 phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
3328
3329 /* Update link event statistics */
3330 phba->sli.slistat.link_event++;
3331
3332 /* Create lpfc_handle_latt mailbox command from link ACQE */
3333 lpfc_read_topology(phba, pmb, mp);
3334 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
3335 pmb->vport = phba->pport;
3202 3336
3337 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
3338 if (rc == MBX_NOT_FINISHED)
3339 goto out_free_dmabuf;
3203 return; 3340 return;
3204 3341
3205out_free_dmabuf: 3342out_free_dmabuf:
@@ -3209,6 +3346,24 @@ out_free_pmb:
3209} 3346}
3210 3347
3211/** 3348/**
3349 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
3350 * @phba: pointer to lpfc hba data structure.
3351 * @acqe_fc: pointer to the async SLI completion queue entry.
3352 *
3353 * This routine is to handle the SLI4 asynchronous SLI events.
3354 **/
3355static void
3356lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
3357{
3358 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3359 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
3360 "x%08x SLI Event Type:%d",
3361 acqe_sli->event_data1, acqe_sli->event_data2,
3362 bf_get(lpfc_trailer_type, acqe_sli));
3363 return;
3364}
3365
3366/**
3212 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 3367 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
3213 * @vport: pointer to vport data structure. 3368 * @vport: pointer to vport data structure.
3214 * 3369 *
@@ -3247,10 +3402,12 @@ lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
3247 if (!ndlp) 3402 if (!ndlp)
3248 return 0; 3403 return 0;
3249 } 3404 }
3250 if (phba->pport->port_state < LPFC_FLOGI) 3405 if ((phba->pport->port_state < LPFC_FLOGI) &&
3406 (phba->pport->port_state != LPFC_VPORT_FAILED))
3251 return NULL; 3407 return NULL;
3252 /* If virtual link is not yet instantiated ignore CVL */ 3408 /* If virtual link is not yet instantiated ignore CVL */
3253 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)) 3409 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
3410 && (vport->port_state != LPFC_VPORT_FAILED))
3254 return NULL; 3411 return NULL;
3255 shost = lpfc_shost_from_vport(vport); 3412 shost = lpfc_shost_from_vport(vport);
3256 if (!shost) 3413 if (!shost)
@@ -3285,17 +3442,17 @@ lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
3285} 3442}
3286 3443
3287/** 3444/**
3288 * lpfc_sli4_async_fcoe_evt - Process the asynchronous fcoe event 3445 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
3289 * @phba: pointer to lpfc hba data structure. 3446 * @phba: pointer to lpfc hba data structure.
3290 * @acqe_link: pointer to the async fcoe completion queue entry. 3447 * @acqe_link: pointer to the async fcoe completion queue entry.
3291 * 3448 *
3292 * This routine is to handle the SLI4 asynchronous fcoe event. 3449 * This routine is to handle the SLI4 asynchronous fcoe event.
3293 **/ 3450 **/
3294static void 3451static void
3295lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba, 3452lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
3296 struct lpfc_acqe_fcoe *acqe_fcoe) 3453 struct lpfc_acqe_fip *acqe_fip)
3297{ 3454{
3298 uint8_t event_type = bf_get(lpfc_acqe_fcoe_event_type, acqe_fcoe); 3455 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
3299 int rc; 3456 int rc;
3300 struct lpfc_vport *vport; 3457 struct lpfc_vport *vport;
3301 struct lpfc_nodelist *ndlp; 3458 struct lpfc_nodelist *ndlp;
@@ -3304,25 +3461,25 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3304 struct lpfc_vport **vports; 3461 struct lpfc_vport **vports;
3305 int i; 3462 int i;
3306 3463
3307 phba->fc_eventTag = acqe_fcoe->event_tag; 3464 phba->fc_eventTag = acqe_fip->event_tag;
3308 phba->fcoe_eventtag = acqe_fcoe->event_tag; 3465 phba->fcoe_eventtag = acqe_fip->event_tag;
3309 switch (event_type) { 3466 switch (event_type) {
3310 case LPFC_FCOE_EVENT_TYPE_NEW_FCF: 3467 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
3311 case LPFC_FCOE_EVENT_TYPE_FCF_PARAM_MOD: 3468 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
3312 if (event_type == LPFC_FCOE_EVENT_TYPE_NEW_FCF) 3469 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
3313 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 3470 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
3314 LOG_DISCOVERY, 3471 LOG_DISCOVERY,
3315 "2546 New FCF event, evt_tag:x%x, " 3472 "2546 New FCF event, evt_tag:x%x, "
3316 "index:x%x\n", 3473 "index:x%x\n",
3317 acqe_fcoe->event_tag, 3474 acqe_fip->event_tag,
3318 acqe_fcoe->index); 3475 acqe_fip->index);
3319 else 3476 else
3320 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 3477 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
3321 LOG_DISCOVERY, 3478 LOG_DISCOVERY,
3322 "2788 FCF param modified event, " 3479 "2788 FCF param modified event, "
3323 "evt_tag:x%x, index:x%x\n", 3480 "evt_tag:x%x, index:x%x\n",
3324 acqe_fcoe->event_tag, 3481 acqe_fip->event_tag,
3325 acqe_fcoe->index); 3482 acqe_fip->index);
3326 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 3483 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
3327 /* 3484 /*
3328 * During period of FCF discovery, read the FCF 3485 * During period of FCF discovery, read the FCF
@@ -3333,8 +3490,8 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3333 LOG_DISCOVERY, 3490 LOG_DISCOVERY,
3334 "2779 Read FCF (x%x) for updating " 3491 "2779 Read FCF (x%x) for updating "
3335 "roundrobin FCF failover bmask\n", 3492 "roundrobin FCF failover bmask\n",
3336 acqe_fcoe->index); 3493 acqe_fip->index);
3337 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fcoe->index); 3494 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
3338 } 3495 }
3339 3496
3340 /* If the FCF discovery is in progress, do nothing. */ 3497 /* If the FCF discovery is in progress, do nothing. */
@@ -3360,7 +3517,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3360 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 3517 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
3361 "2770 Start FCF table scan per async FCF " 3518 "2770 Start FCF table scan per async FCF "
3362 "event, evt_tag:x%x, index:x%x\n", 3519 "event, evt_tag:x%x, index:x%x\n",
3363 acqe_fcoe->event_tag, acqe_fcoe->index); 3520 acqe_fip->event_tag, acqe_fip->index);
3364 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 3521 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
3365 LPFC_FCOE_FCF_GET_FIRST); 3522 LPFC_FCOE_FCF_GET_FIRST);
3366 if (rc) 3523 if (rc)
@@ -3369,17 +3526,17 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3369 "command failed (x%x)\n", rc); 3526 "command failed (x%x)\n", rc);
3370 break; 3527 break;
3371 3528
3372 case LPFC_FCOE_EVENT_TYPE_FCF_TABLE_FULL: 3529 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
3373 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 3530 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3374 "2548 FCF Table full count 0x%x tag 0x%x\n", 3531 "2548 FCF Table full count 0x%x tag 0x%x\n",
3375 bf_get(lpfc_acqe_fcoe_fcf_count, acqe_fcoe), 3532 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
3376 acqe_fcoe->event_tag); 3533 acqe_fip->event_tag);
3377 break; 3534 break;
3378 3535
3379 case LPFC_FCOE_EVENT_TYPE_FCF_DEAD: 3536 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
3380 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, 3537 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
3381 "2549 FCF (x%x) disconnected from network, " 3538 "2549 FCF (x%x) disconnected from network, "
3382 "tag:x%x\n", acqe_fcoe->index, acqe_fcoe->event_tag); 3539 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
3383 /* 3540 /*
3384 * If we are in the middle of FCF failover process, clear 3541 * If we are in the middle of FCF failover process, clear
3385 * the corresponding FCF bit in the roundrobin bitmap. 3542 * the corresponding FCF bit in the roundrobin bitmap.
@@ -3388,13 +3545,13 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3388 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 3545 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
3389 spin_unlock_irq(&phba->hbalock); 3546 spin_unlock_irq(&phba->hbalock);
3390 /* Update FLOGI FCF failover eligible FCF bmask */ 3547 /* Update FLOGI FCF failover eligible FCF bmask */
3391 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fcoe->index); 3548 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
3392 break; 3549 break;
3393 } 3550 }
3394 spin_unlock_irq(&phba->hbalock); 3551 spin_unlock_irq(&phba->hbalock);
3395 3552
3396 /* If the event is not for currently used fcf do nothing */ 3553 /* If the event is not for currently used fcf do nothing */
3397 if (phba->fcf.current_rec.fcf_indx != acqe_fcoe->index) 3554 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
3398 break; 3555 break;
3399 3556
3400 /* 3557 /*
@@ -3411,7 +3568,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3411 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 3568 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
3412 "2771 Start FCF fast failover process due to " 3569 "2771 Start FCF fast failover process due to "
3413 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 3570 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
3414 "\n", acqe_fcoe->event_tag, acqe_fcoe->index); 3571 "\n", acqe_fip->event_tag, acqe_fip->index);
3415 rc = lpfc_sli4_redisc_fcf_table(phba); 3572 rc = lpfc_sli4_redisc_fcf_table(phba);
3416 if (rc) { 3573 if (rc) {
3417 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 3574 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
@@ -3438,12 +3595,12 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3438 lpfc_sli4_perform_all_vport_cvl(phba); 3595 lpfc_sli4_perform_all_vport_cvl(phba);
3439 } 3596 }
3440 break; 3597 break;
3441 case LPFC_FCOE_EVENT_TYPE_CVL: 3598 case LPFC_FIP_EVENT_TYPE_CVL:
3442 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, 3599 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
3443 "2718 Clear Virtual Link Received for VPI 0x%x" 3600 "2718 Clear Virtual Link Received for VPI 0x%x"
3444 " tag 0x%x\n", acqe_fcoe->index, acqe_fcoe->event_tag); 3601 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
3445 vport = lpfc_find_vport_by_vpid(phba, 3602 vport = lpfc_find_vport_by_vpid(phba,
3446 acqe_fcoe->index - phba->vpi_base); 3603 acqe_fip->index - phba->vpi_base);
3447 ndlp = lpfc_sli4_perform_vport_cvl(vport); 3604 ndlp = lpfc_sli4_perform_vport_cvl(vport);
3448 if (!ndlp) 3605 if (!ndlp)
3449 break; 3606 break;
@@ -3494,7 +3651,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3494 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 3651 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
3495 LOG_DISCOVERY, 3652 LOG_DISCOVERY,
3496 "2773 Start FCF failover per CVL, " 3653 "2773 Start FCF failover per CVL, "
3497 "evt_tag:x%x\n", acqe_fcoe->event_tag); 3654 "evt_tag:x%x\n", acqe_fip->event_tag);
3498 rc = lpfc_sli4_redisc_fcf_table(phba); 3655 rc = lpfc_sli4_redisc_fcf_table(phba);
3499 if (rc) { 3656 if (rc) {
3500 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 3657 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
@@ -3522,7 +3679,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3522 default: 3679 default:
3523 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 3680 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3524 "0288 Unknown FCoE event type 0x%x event tag " 3681 "0288 Unknown FCoE event type 0x%x event tag "
3525 "0x%x\n", event_type, acqe_fcoe->event_tag); 3682 "0x%x\n", event_type, acqe_fip->event_tag);
3526 break; 3683 break;
3527 } 3684 }
3528} 3685}
@@ -3599,8 +3756,7 @@ void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
3599 &cq_event->cqe.acqe_link); 3756 &cq_event->cqe.acqe_link);
3600 break; 3757 break;
3601 case LPFC_TRAILER_CODE_FCOE: 3758 case LPFC_TRAILER_CODE_FCOE:
3602 lpfc_sli4_async_fcoe_evt(phba, 3759 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
3603 &cq_event->cqe.acqe_fcoe);
3604 break; 3760 break;
3605 case LPFC_TRAILER_CODE_DCBX: 3761 case LPFC_TRAILER_CODE_DCBX:
3606 lpfc_sli4_async_dcbx_evt(phba, 3762 lpfc_sli4_async_dcbx_evt(phba,
@@ -3610,6 +3766,12 @@ void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
3610 lpfc_sli4_async_grp5_evt(phba, 3766 lpfc_sli4_async_grp5_evt(phba,
3611 &cq_event->cqe.acqe_grp5); 3767 &cq_event->cqe.acqe_grp5);
3612 break; 3768 break;
3769 case LPFC_TRAILER_CODE_FC:
3770 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
3771 break;
3772 case LPFC_TRAILER_CODE_SLI:
3773 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
3774 break;
3613 default: 3775 default:
3614 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 3776 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3615 "1804 Invalid asynchrous event code: " 3777 "1804 Invalid asynchrous event code: "
@@ -3948,7 +4110,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3948 int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size; 4110 int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size;
3949 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0}; 4111 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
3950 struct lpfc_mqe *mqe; 4112 struct lpfc_mqe *mqe;
3951 int longs; 4113 int longs, sli_family;
3952 4114
3953 /* Before proceed, wait for POST done and device ready */ 4115 /* Before proceed, wait for POST done and device ready */
3954 rc = lpfc_sli4_post_status_check(phba); 4116 rc = lpfc_sli4_post_status_check(phba);
@@ -3963,6 +4125,9 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3963 init_timer(&phba->hb_tmofunc); 4125 init_timer(&phba->hb_tmofunc);
3964 phba->hb_tmofunc.function = lpfc_hb_timeout; 4126 phba->hb_tmofunc.function = lpfc_hb_timeout;
3965 phba->hb_tmofunc.data = (unsigned long)phba; 4127 phba->hb_tmofunc.data = (unsigned long)phba;
4128 init_timer(&phba->rrq_tmr);
4129 phba->rrq_tmr.function = lpfc_rrq_timeout;
4130 phba->rrq_tmr.data = (unsigned long)phba;
3966 4131
3967 psli = &phba->sli; 4132 psli = &phba->sli;
3968 /* MBOX heartbeat timer */ 4133 /* MBOX heartbeat timer */
@@ -4010,12 +4175,22 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
4010 */ 4175 */
4011 buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + 4176 buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) +
4012 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge))); 4177 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)));
4013 /* Feature Level 1 hardware is limited to 2 pages */ 4178
4014 if ((bf_get(lpfc_sli_intf_featurelevel1, &phba->sli4_hba.sli_intf) == 4179 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
4015 LPFC_SLI_INTF_FEATURELEVEL1_1)) 4180 max_buf_size = LPFC_SLI4_MAX_BUF_SIZE;
4016 max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE; 4181 switch (sli_family) {
4017 else 4182 case LPFC_SLI_INTF_FAMILY_BE2:
4018 max_buf_size = LPFC_SLI4_MAX_BUF_SIZE; 4183 case LPFC_SLI_INTF_FAMILY_BE3:
4184 /* There is a single hint for BE - 2 pages per BPL. */
4185 if (bf_get(lpfc_sli_intf_sli_hint1, &phba->sli4_hba.sli_intf) ==
4186 LPFC_SLI_INTF_SLI_HINT1_1)
4187 max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE;
4188 break;
4189 case LPFC_SLI_INTF_FAMILY_LNCR_A0:
4190 case LPFC_SLI_INTF_FAMILY_LNCR_B0:
4191 default:
4192 break;
4193 }
4019 for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE; 4194 for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE;
4020 dma_buf_size < max_buf_size && buf_size > dma_buf_size; 4195 dma_buf_size < max_buf_size && buf_size > dma_buf_size;
4021 dma_buf_size = dma_buf_size << 1) 4196 dma_buf_size = dma_buf_size << 1)
@@ -4070,6 +4245,14 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
4070 if (rc) 4245 if (rc)
4071 return -ENOMEM; 4246 return -ENOMEM;
4072 4247
4248 /* IF Type 2 ports get initialized now. */
4249 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
4250 LPFC_SLI_INTF_IF_TYPE_2) {
4251 rc = lpfc_pci_function_reset(phba);
4252 if (unlikely(rc))
4253 return -ENODEV;
4254 }
4255
4073 /* Create the bootstrap mailbox command */ 4256 /* Create the bootstrap mailbox command */
4074 rc = lpfc_create_bootstrap_mbox(phba); 4257 rc = lpfc_create_bootstrap_mbox(phba);
4075 if (unlikely(rc)) 4258 if (unlikely(rc))
@@ -4080,19 +4263,18 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
4080 if (unlikely(rc)) 4263 if (unlikely(rc))
4081 goto out_free_bsmbx; 4264 goto out_free_bsmbx;
4082 4265
4083 rc = lpfc_sli4_fw_cfg_check(phba);
4084 if (unlikely(rc))
4085 goto out_free_bsmbx;
4086
4087 /* Set up the hba's configuration parameters. */ 4266 /* Set up the hba's configuration parameters. */
4088 rc = lpfc_sli4_read_config(phba); 4267 rc = lpfc_sli4_read_config(phba);
4089 if (unlikely(rc)) 4268 if (unlikely(rc))
4090 goto out_free_bsmbx; 4269 goto out_free_bsmbx;
4091 4270
4092 /* Perform a function reset */ 4271 /* IF Type 0 ports get initialized now. */
4093 rc = lpfc_pci_function_reset(phba); 4272 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
4094 if (unlikely(rc)) 4273 LPFC_SLI_INTF_IF_TYPE_0) {
4095 goto out_free_bsmbx; 4274 rc = lpfc_pci_function_reset(phba);
4275 if (unlikely(rc))
4276 goto out_free_bsmbx;
4277 }
4096 4278
4097 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4279 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4098 GFP_KERNEL); 4280 GFP_KERNEL);
@@ -5190,97 +5372,183 @@ lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
5190int 5372int
5191lpfc_sli4_post_status_check(struct lpfc_hba *phba) 5373lpfc_sli4_post_status_check(struct lpfc_hba *phba)
5192{ 5374{
5193 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg; 5375 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
5194 int i, port_error = -ENODEV; 5376 struct lpfc_register reg_data;
5377 int i, port_error = 0;
5378 uint32_t if_type;
5195 5379
5196 if (!phba->sli4_hba.STAregaddr) 5380 if (!phba->sli4_hba.PSMPHRregaddr)
5197 return -ENODEV; 5381 return -ENODEV;
5198 5382
5199 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 5383 /* Wait up to 30 seconds for the SLI Port POST done and ready */
5200 for (i = 0; i < 3000; i++) { 5384 for (i = 0; i < 3000; i++) {
5201 sta_reg.word0 = readl(phba->sli4_hba.STAregaddr); 5385 portsmphr_reg.word0 = readl(phba->sli4_hba.PSMPHRregaddr);
5202 /* Encounter fatal POST error, break out */ 5386 if (bf_get(lpfc_port_smphr_perr, &portsmphr_reg)) {
5203 if (bf_get(lpfc_hst_state_perr, &sta_reg)) { 5387 /* Port has a fatal POST error, break out */
5204 port_error = -ENODEV; 5388 port_error = -ENODEV;
5205 break; 5389 break;
5206 } 5390 }
5207 if (LPFC_POST_STAGE_ARMFW_READY == 5391 if (LPFC_POST_STAGE_PORT_READY ==
5208 bf_get(lpfc_hst_state_port_status, &sta_reg)) { 5392 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
5209 port_error = 0;
5210 break; 5393 break;
5211 }
5212 msleep(10); 5394 msleep(10);
5213 } 5395 }
5214 5396
5215 if (port_error) 5397 /*
5398 * If there was a port error during POST, then don't proceed with
5399 * other register reads as the data may not be valid. Just exit.
5400 */
5401 if (port_error) {
5216 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 5402 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5217 "1408 Failure HBA POST Status: sta_reg=0x%x, " 5403 "1408 Port Failed POST - portsmphr=0x%x, "
5218 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, xrom=x%x, " 5404 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
5219 "dl=x%x, pstatus=x%x\n", sta_reg.word0, 5405 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
5220 bf_get(lpfc_hst_state_perr, &sta_reg), 5406 portsmphr_reg.word0,
5221 bf_get(lpfc_hst_state_sfi, &sta_reg), 5407 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
5222 bf_get(lpfc_hst_state_nip, &sta_reg), 5408 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
5223 bf_get(lpfc_hst_state_ipc, &sta_reg), 5409 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
5224 bf_get(lpfc_hst_state_xrom, &sta_reg), 5410 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
5225 bf_get(lpfc_hst_state_dl, &sta_reg), 5411 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
5226 bf_get(lpfc_hst_state_port_status, &sta_reg)); 5412 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
5227 5413 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
5228 /* Log device information */ 5414 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
5229 phba->sli4_hba.sli_intf.word0 = readl(phba->sli4_hba.SLIINTFregaddr); 5415 } else {
5230 if (bf_get(lpfc_sli_intf_valid,
5231 &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_VALID) {
5232 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 5416 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5233 "2534 Device Info: ChipType=0x%x, SliRev=0x%x, " 5417 "2534 Device Info: SLIFamily=0x%x, "
5234 "FeatureL1=0x%x, FeatureL2=0x%x\n", 5418 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
5419 "SLIHint_2=0x%x, FT=0x%x\n",
5235 bf_get(lpfc_sli_intf_sli_family, 5420 bf_get(lpfc_sli_intf_sli_family,
5236 &phba->sli4_hba.sli_intf), 5421 &phba->sli4_hba.sli_intf),
5237 bf_get(lpfc_sli_intf_slirev, 5422 bf_get(lpfc_sli_intf_slirev,
5238 &phba->sli4_hba.sli_intf), 5423 &phba->sli4_hba.sli_intf),
5239 bf_get(lpfc_sli_intf_featurelevel1, 5424 bf_get(lpfc_sli_intf_if_type,
5425 &phba->sli4_hba.sli_intf),
5426 bf_get(lpfc_sli_intf_sli_hint1,
5240 &phba->sli4_hba.sli_intf), 5427 &phba->sli4_hba.sli_intf),
5241 bf_get(lpfc_sli_intf_featurelevel2, 5428 bf_get(lpfc_sli_intf_sli_hint2,
5429 &phba->sli4_hba.sli_intf),
5430 bf_get(lpfc_sli_intf_func_type,
5242 &phba->sli4_hba.sli_intf)); 5431 &phba->sli4_hba.sli_intf));
5432 /*
5433 * Check for other Port errors during the initialization
5434 * process. Fail the load if the port did not come up
5435 * correctly.
5436 */
5437 if_type = bf_get(lpfc_sli_intf_if_type,
5438 &phba->sli4_hba.sli_intf);
5439 switch (if_type) {
5440 case LPFC_SLI_INTF_IF_TYPE_0:
5441 phba->sli4_hba.ue_mask_lo =
5442 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
5443 phba->sli4_hba.ue_mask_hi =
5444 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
5445 uerrlo_reg.word0 =
5446 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
5447 uerrhi_reg.word0 =
5448 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
5449 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
5450 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
5451 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5452 "1422 Unrecoverable Error "
5453 "Detected during POST "
5454 "uerr_lo_reg=0x%x, "
5455 "uerr_hi_reg=0x%x, "
5456 "ue_mask_lo_reg=0x%x, "
5457 "ue_mask_hi_reg=0x%x\n",
5458 uerrlo_reg.word0,
5459 uerrhi_reg.word0,
5460 phba->sli4_hba.ue_mask_lo,
5461 phba->sli4_hba.ue_mask_hi);
5462 port_error = -ENODEV;
5463 }
5464 break;
5465 case LPFC_SLI_INTF_IF_TYPE_2:
5466 /* Final checks. The port status should be clean. */
5467 reg_data.word0 =
5468 readl(phba->sli4_hba.u.if_type2.STATUSregaddr);
5469 if (bf_get(lpfc_sliport_status_err, &reg_data)) {
5470 phba->work_status[0] =
5471 readl(phba->sli4_hba.u.if_type2.
5472 ERR1regaddr);
5473 phba->work_status[1] =
5474 readl(phba->sli4_hba.u.if_type2.
5475 ERR2regaddr);
5476 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5477 "2888 Port Error Detected "
5478 "during POST: "
5479 "port status reg 0x%x, "
5480 "port_smphr reg 0x%x, "
5481 "error 1=0x%x, error 2=0x%x\n",
5482 reg_data.word0,
5483 portsmphr_reg.word0,
5484 phba->work_status[0],
5485 phba->work_status[1]);
5486 port_error = -ENODEV;
5487 }
5488 break;
5489 case LPFC_SLI_INTF_IF_TYPE_1:
5490 default:
5491 break;
5492 }
5243 } 5493 }
5244 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr);
5245 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr);
5246 /* With uncoverable error, log the error message and return error */
5247 uerrlo_reg.word0 = readl(phba->sli4_hba.UERRLOregaddr);
5248 uerrhi_reg.word0 = readl(phba->sli4_hba.UERRHIregaddr);
5249 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
5250 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
5251 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5252 "1422 HBA Unrecoverable error: "
5253 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
5254 "ue_mask_lo_reg=0x%x, ue_mask_hi_reg=0x%x\n",
5255 uerrlo_reg.word0, uerrhi_reg.word0,
5256 phba->sli4_hba.ue_mask_lo,
5257 phba->sli4_hba.ue_mask_hi);
5258 return -ENODEV;
5259 }
5260
5261 return port_error; 5494 return port_error;
5262} 5495}
5263 5496
5264/** 5497/**
5265 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 5498 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
5266 * @phba: pointer to lpfc hba data structure. 5499 * @phba: pointer to lpfc hba data structure.
5500 * @if_type: The SLI4 interface type getting configured.
5267 * 5501 *
5268 * This routine is invoked to set up SLI4 BAR0 PCI config space register 5502 * This routine is invoked to set up SLI4 BAR0 PCI config space register
5269 * memory map. 5503 * memory map.
5270 **/ 5504 **/
5271static void 5505static void
5272lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba) 5506lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
5273{ 5507{
5274 phba->sli4_hba.UERRLOregaddr = phba->sli4_hba.conf_regs_memmap_p + 5508 switch (if_type) {
5275 LPFC_UERR_STATUS_LO; 5509 case LPFC_SLI_INTF_IF_TYPE_0:
5276 phba->sli4_hba.UERRHIregaddr = phba->sli4_hba.conf_regs_memmap_p + 5510 phba->sli4_hba.u.if_type0.UERRLOregaddr =
5277 LPFC_UERR_STATUS_HI; 5511 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
5278 phba->sli4_hba.UEMASKLOregaddr = phba->sli4_hba.conf_regs_memmap_p + 5512 phba->sli4_hba.u.if_type0.UERRHIregaddr =
5279 LPFC_UE_MASK_LO; 5513 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
5280 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p + 5514 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
5281 LPFC_UE_MASK_HI; 5515 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
5282 phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p + 5516 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
5283 LPFC_SLI_INTF; 5517 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
5518 phba->sli4_hba.SLIINTFregaddr =
5519 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
5520 break;
5521 case LPFC_SLI_INTF_IF_TYPE_2:
5522 phba->sli4_hba.u.if_type2.ERR1regaddr =
5523 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLIPORT_ERR_1;
5524 phba->sli4_hba.u.if_type2.ERR2regaddr =
5525 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLIPORT_ERR_2;
5526 phba->sli4_hba.u.if_type2.CTRLregaddr =
5527 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLIPORT_CNTRL;
5528 phba->sli4_hba.u.if_type2.STATUSregaddr =
5529 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLIPORT_STATUS;
5530 phba->sli4_hba.SLIINTFregaddr =
5531 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
5532 phba->sli4_hba.PSMPHRregaddr =
5533 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLIPORT_IF2_SMPHR;
5534 phba->sli4_hba.RQDBregaddr =
5535 phba->sli4_hba.conf_regs_memmap_p + LPFC_RQ_DOORBELL;
5536 phba->sli4_hba.WQDBregaddr =
5537 phba->sli4_hba.conf_regs_memmap_p + LPFC_WQ_DOORBELL;
5538 phba->sli4_hba.EQCQDBregaddr =
5539 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
5540 phba->sli4_hba.MQDBregaddr =
5541 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
5542 phba->sli4_hba.BMBXregaddr =
5543 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
5544 break;
5545 case LPFC_SLI_INTF_IF_TYPE_1:
5546 default:
5547 dev_printk(KERN_ERR, &phba->pcidev->dev,
5548 "FATAL - unsupported SLI4 interface type - %d\n",
5549 if_type);
5550 break;
5551 }
5284} 5552}
5285 5553
5286/** 5554/**
@@ -5293,16 +5561,14 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba)
5293static void 5561static void
5294lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba) 5562lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
5295{ 5563{
5296 5564 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
5297 phba->sli4_hba.STAregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 5565 LPFC_SLIPORT_IF0_SMPHR;
5298 LPFC_HST_STATE;
5299 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 5566 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
5300 LPFC_HST_ISR0; 5567 LPFC_HST_ISR0;
5301 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 5568 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
5302 LPFC_HST_IMR0; 5569 LPFC_HST_IMR0;
5303 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 5570 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
5304 LPFC_HST_ISCR0; 5571 LPFC_HST_ISCR0;
5305 return;
5306} 5572}
5307 5573
5308/** 5574/**
@@ -5542,11 +5808,12 @@ lpfc_sli4_read_config(struct lpfc_hba *phba)
5542} 5808}
5543 5809
5544/** 5810/**
5545 * lpfc_dev_endian_order_setup - Notify the port of the host's endian order. 5811 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
5546 * @phba: pointer to lpfc hba data structure. 5812 * @phba: pointer to lpfc hba data structure.
5547 * 5813 *
5548 * This routine is invoked to setup the host-side endian order to the 5814 * This routine is invoked to setup the port-side endian order when
5549 * HBA consistent with the SLI-4 interface spec. 5815 * the port if_type is 0. This routine has no function for other
5816 * if_types.
5550 * 5817 *
5551 * Return codes 5818 * Return codes
5552 * 0 - successful 5819 * 0 - successful
@@ -5557,34 +5824,44 @@ static int
5557lpfc_setup_endian_order(struct lpfc_hba *phba) 5824lpfc_setup_endian_order(struct lpfc_hba *phba)
5558{ 5825{
5559 LPFC_MBOXQ_t *mboxq; 5826 LPFC_MBOXQ_t *mboxq;
5560 uint32_t rc = 0; 5827 uint32_t if_type, rc = 0;
5561 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 5828 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
5562 HOST_ENDIAN_HIGH_WORD1}; 5829 HOST_ENDIAN_HIGH_WORD1};
5563 5830
5564 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5831 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
5565 if (!mboxq) { 5832 switch (if_type) {
5566 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 5833 case LPFC_SLI_INTF_IF_TYPE_0:
5567 "0492 Unable to allocate memory for issuing " 5834 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5568 "SLI_CONFIG_SPECIAL mailbox command\n"); 5835 GFP_KERNEL);
5569 return -ENOMEM; 5836 if (!mboxq) {
5570 } 5837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5838 "0492 Unable to allocate memory for "
5839 "issuing SLI_CONFIG_SPECIAL mailbox "
5840 "command\n");
5841 return -ENOMEM;
5842 }
5571 5843
5572 /* 5844 /*
5573 * The SLI4_CONFIG_SPECIAL mailbox command requires the first two 5845 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
5574 * words to contain special data values and no other data. 5846 * two words to contain special data values and no other data.
5575 */ 5847 */
5576 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 5848 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
5577 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 5849 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
5578 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 5850 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5579 if (rc != MBX_SUCCESS) { 5851 if (rc != MBX_SUCCESS) {
5580 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 5852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5581 "0493 SLI_CONFIG_SPECIAL mailbox failed with " 5853 "0493 SLI_CONFIG_SPECIAL mailbox "
5582 "status x%x\n", 5854 "failed with status x%x\n",
5583 rc); 5855 rc);
5584 rc = -EIO; 5856 rc = -EIO;
5857 }
5858 mempool_free(mboxq, phba->mbox_mem_pool);
5859 break;
5860 case LPFC_SLI_INTF_IF_TYPE_2:
5861 case LPFC_SLI_INTF_IF_TYPE_1:
5862 default:
5863 break;
5585 } 5864 }
5586
5587 mempool_free(mboxq, phba->mbox_mem_pool);
5588 return rc; 5865 return rc;
5589} 5866}
5590 5867
@@ -6416,36 +6693,124 @@ int
6416lpfc_pci_function_reset(struct lpfc_hba *phba) 6693lpfc_pci_function_reset(struct lpfc_hba *phba)
6417{ 6694{
6418 LPFC_MBOXQ_t *mboxq; 6695 LPFC_MBOXQ_t *mboxq;
6419 uint32_t rc = 0; 6696 uint32_t rc = 0, if_type;
6420 uint32_t shdr_status, shdr_add_status; 6697 uint32_t shdr_status, shdr_add_status;
6698 uint32_t rdy_chk, num_resets = 0, reset_again = 0;
6421 union lpfc_sli4_cfg_shdr *shdr; 6699 union lpfc_sli4_cfg_shdr *shdr;
6700 struct lpfc_register reg_data;
6422 6701
6423 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6702 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
6424 if (!mboxq) { 6703 switch (if_type) {
6425 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 6704 case LPFC_SLI_INTF_IF_TYPE_0:
6426 "0494 Unable to allocate memory for issuing " 6705 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6427 "SLI_FUNCTION_RESET mailbox command\n"); 6706 GFP_KERNEL);
6428 return -ENOMEM; 6707 if (!mboxq) {
6429 } 6708 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6709 "0494 Unable to allocate memory for "
6710 "issuing SLI_FUNCTION_RESET mailbox "
6711 "command\n");
6712 return -ENOMEM;
6713 }
6430 6714
6431 /* Set up PCI function reset SLI4_CONFIG mailbox-ioctl command */ 6715 /* Setup PCI function reset mailbox-ioctl command */
6432 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 6716 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
6433 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 6717 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
6434 LPFC_SLI4_MBX_EMBED); 6718 LPFC_SLI4_MBX_EMBED);
6435 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 6719 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6436 shdr = (union lpfc_sli4_cfg_shdr *) 6720 shdr = (union lpfc_sli4_cfg_shdr *)
6437 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 6721 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
6438 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 6722 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6439 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 6723 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
6440 if (rc != MBX_TIMEOUT) 6724 &shdr->response);
6441 mempool_free(mboxq, phba->mbox_mem_pool); 6725 if (rc != MBX_TIMEOUT)
6442 if (shdr_status || shdr_add_status || rc) { 6726 mempool_free(mboxq, phba->mbox_mem_pool);
6443 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 6727 if (shdr_status || shdr_add_status || rc) {
6444 "0495 SLI_FUNCTION_RESET mailbox failed with " 6728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6445 "status x%x add_status x%x, mbx status x%x\n", 6729 "0495 SLI_FUNCTION_RESET mailbox "
6446 shdr_status, shdr_add_status, rc); 6730 "failed with status x%x add_status x%x,"
6447 rc = -ENXIO; 6731 " mbx status x%x\n",
6732 shdr_status, shdr_add_status, rc);
6733 rc = -ENXIO;
6734 }
6735 break;
6736 case LPFC_SLI_INTF_IF_TYPE_2:
6737 for (num_resets = 0;
6738 num_resets < MAX_IF_TYPE_2_RESETS;
6739 num_resets++) {
6740 reg_data.word0 = 0;
6741 bf_set(lpfc_sliport_ctrl_end, &reg_data,
6742 LPFC_SLIPORT_LITTLE_ENDIAN);
6743 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
6744 LPFC_SLIPORT_INIT_PORT);
6745 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
6746 CTRLregaddr);
6747
6748 /*
6749 * Poll the Port Status Register and wait for RDY for
6750 * up to 10 seconds. If the port doesn't respond, treat
6751 * it as an error. If the port responds with RN, start
6752 * the loop again.
6753 */
6754 for (rdy_chk = 0; rdy_chk < 1000; rdy_chk++) {
6755 reg_data.word0 =
6756 readl(phba->sli4_hba.u.if_type2.
6757 STATUSregaddr);
6758 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
6759 break;
6760 if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
6761 reset_again++;
6762 break;
6763 }
6764 msleep(10);
6765 }
6766
6767 /*
6768 * If the port responds to the init request with
6769 * reset needed, delay for a bit and restart the loop.
6770 */
6771 if (reset_again) {
6772 msleep(10);
6773 reset_again = 0;
6774 continue;
6775 }
6776
6777 /* Detect any port errors. */
6778 reg_data.word0 = readl(phba->sli4_hba.u.if_type2.
6779 STATUSregaddr);
6780 if ((bf_get(lpfc_sliport_status_err, &reg_data)) ||
6781 (rdy_chk >= 1000)) {
6782 phba->work_status[0] = readl(
6783 phba->sli4_hba.u.if_type2.ERR1regaddr);
6784 phba->work_status[1] = readl(
6785 phba->sli4_hba.u.if_type2.ERR2regaddr);
6786 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6787 "2890 Port Error Detected "
6788 "during Port Reset: "
6789 "port status reg 0x%x, "
6790 "error 1=0x%x, error 2=0x%x\n",
6791 reg_data.word0,
6792 phba->work_status[0],
6793 phba->work_status[1]);
6794 rc = -ENODEV;
6795 }
6796
6797 /*
6798 * Terminate the outer loop provided the Port indicated
6799 * ready within 10 seconds.
6800 */
6801 if (rdy_chk < 1000)
6802 break;
6803 }
6804 break;
6805 case LPFC_SLI_INTF_IF_TYPE_1:
6806 default:
6807 break;
6448 } 6808 }
6809
6810 /* Catch the not-ready port failure after a port reset. */
6811 if (num_resets >= MAX_IF_TYPE_2_RESETS)
6812 rc = -ENODEV;
6813
6449 return rc; 6814 return rc;
6450} 6815}
6451 6816
@@ -6536,6 +6901,7 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
6536 struct pci_dev *pdev; 6901 struct pci_dev *pdev;
6537 unsigned long bar0map_len, bar1map_len, bar2map_len; 6902 unsigned long bar0map_len, bar1map_len, bar2map_len;
6538 int error = -ENODEV; 6903 int error = -ENODEV;
6904 uint32_t if_type;
6539 6905
6540 /* Obtain PCI device reference */ 6906 /* Obtain PCI device reference */
6541 if (!phba->pcidev) 6907 if (!phba->pcidev)
@@ -6552,61 +6918,105 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
6552 } 6918 }
6553 } 6919 }
6554 6920
6555 /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the 6921 /*
6556 * number of bytes required by each mapping. They are actually 6922 * The BARs and register set definitions and offset locations are
6557 * mapping to the PCI BAR regions 0 or 1, 2, and 4 by the SLI4 device. 6923 * dependent on the if_type.
6924 */
6925 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
6926 &phba->sli4_hba.sli_intf.word0)) {
6927 return error;
6928 }
6929
6930 /* There is no SLI3 failback for SLI4 devices. */
6931 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
6932 LPFC_SLI_INTF_VALID) {
6933 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6934 "2894 SLI_INTF reg contents invalid "
6935 "sli_intf reg 0x%x\n",
6936 phba->sli4_hba.sli_intf.word0);
6937 return error;
6938 }
6939
6940 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
6941 /*
6942 * Get the bus address of SLI4 device Bar regions and the
6943 * number of bytes required by each mapping. The mapping of the
6944 * particular PCI BARs regions is dependent on the type of
6945 * SLI4 device.
6558 */ 6946 */
6559 if (pci_resource_start(pdev, 0)) { 6947 if (pci_resource_start(pdev, 0)) {
6560 phba->pci_bar0_map = pci_resource_start(pdev, 0); 6948 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6561 bar0map_len = pci_resource_len(pdev, 0); 6949 bar0map_len = pci_resource_len(pdev, 0);
6950
6951 /*
6952 * Map SLI4 PCI Config Space Register base to a kernel virtual
6953 * addr
6954 */
6955 phba->sli4_hba.conf_regs_memmap_p =
6956 ioremap(phba->pci_bar0_map, bar0map_len);
6957 if (!phba->sli4_hba.conf_regs_memmap_p) {
6958 dev_printk(KERN_ERR, &pdev->dev,
6959 "ioremap failed for SLI4 PCI config "
6960 "registers.\n");
6961 goto out;
6962 }
6963 /* Set up BAR0 PCI config space register memory map */
6964 lpfc_sli4_bar0_register_memmap(phba, if_type);
6562 } else { 6965 } else {
6563 phba->pci_bar0_map = pci_resource_start(pdev, 1); 6966 phba->pci_bar0_map = pci_resource_start(pdev, 1);
6564 bar0map_len = pci_resource_len(pdev, 1); 6967 bar0map_len = pci_resource_len(pdev, 1);
6565 } 6968 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
6566 phba->pci_bar1_map = pci_resource_start(pdev, 2); 6969 dev_printk(KERN_ERR, &pdev->dev,
6567 bar1map_len = pci_resource_len(pdev, 2); 6970 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
6568 6971 goto out;
6569 phba->pci_bar2_map = pci_resource_start(pdev, 4); 6972 }
6570 bar2map_len = pci_resource_len(pdev, 4); 6973 phba->sli4_hba.conf_regs_memmap_p =
6571
6572 /* Map SLI4 PCI Config Space Register base to a kernel virtual addr */
6573 phba->sli4_hba.conf_regs_memmap_p =
6574 ioremap(phba->pci_bar0_map, bar0map_len); 6974 ioremap(phba->pci_bar0_map, bar0map_len);
6575 if (!phba->sli4_hba.conf_regs_memmap_p) { 6975 if (!phba->sli4_hba.conf_regs_memmap_p) {
6576 dev_printk(KERN_ERR, &pdev->dev, 6976 dev_printk(KERN_ERR, &pdev->dev,
6577 "ioremap failed for SLI4 PCI config registers.\n"); 6977 "ioremap failed for SLI4 PCI config "
6578 goto out; 6978 "registers.\n");
6979 goto out;
6980 }
6981 lpfc_sli4_bar0_register_memmap(phba, if_type);
6579 } 6982 }
6580 6983
6581 /* Map SLI4 HBA Control Register base to a kernel virtual address. */ 6984 if (pci_resource_start(pdev, 2)) {
6582 phba->sli4_hba.ctrl_regs_memmap_p = 6985 /*
6986 * Map SLI4 if type 0 HBA Control Register base to a kernel
6987 * virtual address and setup the registers.
6988 */
6989 phba->pci_bar1_map = pci_resource_start(pdev, 2);
6990 bar1map_len = pci_resource_len(pdev, 2);
6991 phba->sli4_hba.ctrl_regs_memmap_p =
6583 ioremap(phba->pci_bar1_map, bar1map_len); 6992 ioremap(phba->pci_bar1_map, bar1map_len);
6584 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 6993 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
6585 dev_printk(KERN_ERR, &pdev->dev, 6994 dev_printk(KERN_ERR, &pdev->dev,
6586 "ioremap failed for SLI4 HBA control registers.\n"); 6995 "ioremap failed for SLI4 HBA control registers.\n");
6587 goto out_iounmap_conf; 6996 goto out_iounmap_conf;
6997 }
6998 lpfc_sli4_bar1_register_memmap(phba);
6588 } 6999 }
6589 7000
6590 /* Map SLI4 HBA Doorbell Register base to a kernel virtual address. */ 7001 if (pci_resource_start(pdev, 4)) {
6591 phba->sli4_hba.drbl_regs_memmap_p = 7002 /*
7003 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
7004 * virtual address and setup the registers.
7005 */
7006 phba->pci_bar2_map = pci_resource_start(pdev, 4);
7007 bar2map_len = pci_resource_len(pdev, 4);
7008 phba->sli4_hba.drbl_regs_memmap_p =
6592 ioremap(phba->pci_bar2_map, bar2map_len); 7009 ioremap(phba->pci_bar2_map, bar2map_len);
6593 if (!phba->sli4_hba.drbl_regs_memmap_p) { 7010 if (!phba->sli4_hba.drbl_regs_memmap_p) {
6594 dev_printk(KERN_ERR, &pdev->dev, 7011 dev_printk(KERN_ERR, &pdev->dev,
6595 "ioremap failed for SLI4 HBA doorbell registers.\n"); 7012 "ioremap failed for SLI4 HBA doorbell registers.\n");
6596 goto out_iounmap_ctrl; 7013 goto out_iounmap_ctrl;
7014 }
7015 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
7016 if (error)
7017 goto out_iounmap_all;
6597 } 7018 }
6598 7019
6599 /* Set up BAR0 PCI config space register memory map */
6600 lpfc_sli4_bar0_register_memmap(phba);
6601
6602 /* Set up BAR1 register memory map */
6603 lpfc_sli4_bar1_register_memmap(phba);
6604
6605 /* Set up BAR2 register memory map */
6606 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
6607 if (error)
6608 goto out_iounmap_all;
6609
6610 return 0; 7020 return 0;
6611 7021
6612out_iounmap_all: 7022out_iounmap_all:
@@ -8149,6 +8559,8 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
8149 goto out_unset_driver_resource_s4; 8559 goto out_unset_driver_resource_s4;
8150 } 8560 }
8151 8561
8562 INIT_LIST_HEAD(&phba->active_rrq_list);
8563
8152 /* Set up common device driver resources */ 8564 /* Set up common device driver resources */
8153 error = lpfc_setup_driver_resource_phase2(phba); 8565 error = lpfc_setup_driver_resource_phase2(phba);
8154 if (error) { 8566 if (error) {
@@ -8218,7 +8630,11 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
8218 "0451 Configure interrupt mode (%d) " 8630 "0451 Configure interrupt mode (%d) "
8219 "failed active interrupt test.\n", 8631 "failed active interrupt test.\n",
8220 intr_mode); 8632 intr_mode);
8221 /* Unset the preivous SLI-4 HBA setup */ 8633 /* Unset the previous SLI-4 HBA setup. */
8634 /*
8635 * TODO: Is this operation compatible with IF TYPE 2
8636 * devices? All port state is deleted and cleared.
8637 */
8222 lpfc_sli4_unset_hba(phba); 8638 lpfc_sli4_unset_hba(phba);
8223 /* Try next level of interrupt mode */ 8639 /* Try next level of interrupt mode */
8224 cfg_mode = --intr_mode; 8640 cfg_mode = --intr_mode;
@@ -8990,6 +9406,10 @@ static struct pci_device_id lpfc_id_table[] = {
8990 PCI_ANY_ID, PCI_ANY_ID, }, 9406 PCI_ANY_ID, PCI_ANY_ID, },
8991 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BALIUS, 9407 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BALIUS,
8992 PCI_ANY_ID, PCI_ANY_ID, }, 9408 PCI_ANY_ID, PCI_ANY_ID, },
9409 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LANCER_FC,
9410 PCI_ANY_ID, PCI_ANY_ID, },
9411 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LANCER_FCOE,
9412 PCI_ANY_ID, PCI_ANY_ID, },
8993 { 0 } 9413 { 0 }
8994}; 9414};
8995 9415
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 01:41:05 -0500