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path: root/drivers/scsi/lpfc/lpfc_hw.h
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Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h37
1 files changed, 34 insertions, 3 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 81d1df418e47..4b5c12440b83 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -2362,6 +2362,30 @@ typedef struct {
2362#define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ 2362#define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */
2363#define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ 2363#define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */
2364 2364
2365#define WAKE_UP_PARMS_REGION_ID 4
2366#define WAKE_UP_PARMS_WORD_SIZE 15
2367
2368/* Option rom version structure */
2369struct prog_id {
2370#ifdef __BIG_ENDIAN_BITFIELD
2371 uint8_t type;
2372 uint8_t id;
2373 uint32_t ver:4; /* Major Version */
2374 uint32_t rev:4; /* Revision */
2375 uint32_t lev:2; /* Level */
2376 uint32_t dist:2; /* Dist Type */
2377 uint32_t num:4; /* number after dist type */
2378#else /* __LITTLE_ENDIAN_BITFIELD */
2379 uint32_t num:4; /* number after dist type */
2380 uint32_t dist:2; /* Dist Type */
2381 uint32_t lev:2; /* Level */
2382 uint32_t rev:4; /* Revision */
2383 uint32_t ver:4; /* Major Version */
2384 uint8_t id;
2385 uint8_t type;
2386#endif
2387};
2388
2365/* Structure for MB Command UPDATE_CFG (0x1B) */ 2389/* Structure for MB Command UPDATE_CFG (0x1B) */
2366 2390
2367struct update_cfg_var { 2391struct update_cfg_var {
@@ -2555,10 +2579,17 @@ typedef struct {
2555 2579
2556 uint32_t pcbLow; /* bit 31:0 of memory based port config block */ 2580 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
2557 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */ 2581 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
2558 uint32_t hbainit[6]; 2582 uint32_t hbainit[5];
2583#ifdef __BIG_ENDIAN_BITFIELD
2584 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
2585 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
2586#else /* __LITTLE_ENDIAN */
2587 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
2588 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
2589#endif
2559 2590
2560#ifdef __BIG_ENDIAN_BITFIELD 2591#ifdef __BIG_ENDIAN_BITFIELD
2561 uint32_t rsvd : 24; /* Reserved */ 2592 uint32_t rsvd1 : 24; /* Reserved */
2562 uint32_t cmv : 1; /* Configure Max VPIs */ 2593 uint32_t cmv : 1; /* Configure Max VPIs */
2563 uint32_t ccrp : 1; /* Config Command Ring Polling */ 2594 uint32_t ccrp : 1; /* Config Command Ring Polling */
2564 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 2595 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
@@ -2576,7 +2607,7 @@ typedef struct {
2576 uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 2607 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
2577 uint32_t ccrp : 1; /* Config Command Ring Polling */ 2608 uint32_t ccrp : 1; /* Config Command Ring Polling */
2578 uint32_t cmv : 1; /* Configure Max VPIs */ 2609 uint32_t cmv : 1; /* Configure Max VPIs */
2579 uint32_t rsvd : 24; /* Reserved */ 2610 uint32_t rsvd1 : 24; /* Reserved */
2580#endif 2611#endif
2581#ifdef __BIG_ENDIAN_BITFIELD 2612#ifdef __BIG_ENDIAN_BITFIELD
2582 uint32_t rsvd2 : 24; /* Reserved */ 2613 uint32_t rsvd2 : 24; /* Reserved */