1 files changed, 160 insertions, 23 deletions

diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 7773b949aa7c..5de5dabbbee6 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -1107,6 +1107,8 @@ typedef struct {
 /* Start FireFly Register definitions */
 #define PCI_VENDOR_ID_EMULEX        0x10df
 #define PCI_DEVICE_ID_FIREFLY       0x1ae5
+#define PCI_DEVICE_ID_PROTEUS_VF    0xe100
+#define PCI_DEVICE_ID_PROTEUS_PF    0xe180
 #define PCI_DEVICE_ID_SAT_SMB       0xf011
 #define PCI_DEVICE_ID_SAT_MID       0xf015
 #define PCI_DEVICE_ID_RFLY          0xf095
@@ -1133,10 +1135,12 @@ typedef struct {
 #define PCI_DEVICE_ID_LP11000S      0xfc10
 #define PCI_DEVICE_ID_LPE11000S     0xfc20
 #define PCI_DEVICE_ID_SAT_S         0xfc40
+#define PCI_DEVICE_ID_PROTEUS_S     0xfc50
 #define PCI_DEVICE_ID_HELIOS        0xfd00
 #define PCI_DEVICE_ID_HELIOS_SCSP   0xfd11
 #define PCI_DEVICE_ID_HELIOS_DCSP   0xfd12
 #define PCI_DEVICE_ID_ZEPHYR        0xfe00
+#define PCI_DEVICE_ID_HORNET        0xfe05
 #define PCI_DEVICE_ID_ZEPHYR_SCSP   0xfe11
 #define PCI_DEVICE_ID_ZEPHYR_DCSP   0xfe12
 
@@ -1154,6 +1158,7 @@ typedef struct {
 #define ZEPHYR_JEDEC_ID             0x0577
 #define VIPER_JEDEC_ID              0x4838
 #define SATURN_JEDEC_ID             0x1004
+#define HORNET_JDEC_ID              0x2057706D
 
 #define JEDEC_ID_MASK               0x0FFFF000
 #define JEDEC_ID_SHIFT              12
@@ -1198,6 +1203,18 @@ typedef struct {		/* FireFly BIU registers */
 #define HA_RXATT       0x00000008       /* Bit  3 */
 #define HA_RXMASK      0x0000000f
 
+#define HA_R0_CLR_MSK   (HA_R0RE_REQ | HA_R0CE_RSP | HA_R0ATT)
+#define HA_R1_CLR_MSK   (HA_R1RE_REQ | HA_R1CE_RSP | HA_R1ATT)
+#define HA_R2_CLR_MSK   (HA_R2RE_REQ | HA_R2CE_RSP | HA_R2ATT)
+#define HA_R3_CLR_MSK   (HA_R3RE_REQ | HA_R3CE_RSP | HA_R3ATT)
+
+#define HA_R0_POS       3
+#define HA_R1_POS       7
+#define HA_R2_POS       11
+#define HA_R3_POS       15
+#define HA_LE_POS       29
+#define HA_MB_POS       30
+#define HA_ER_POS       31
 /* Chip Attention Register */
 
 #define CA_REG_OFFSET  4        /* Byte offset from register base address */
@@ -1235,7 +1252,7 @@ typedef struct {		/* FireFly BIU registers */
 
 /* Host Control Register */
 
-#define HC_REG_OFFSET  12       /* Word offset from register base address */
+#define HC_REG_OFFSET  12       /* Byte offset from register base address */
 
 #define HC_MBINT_ENA   0x00000001       /* Bit  0 */
 #define HC_R0INT_ENA   0x00000002       /* Bit  1 */
@@ -1248,6 +1265,19 @@ typedef struct {		/* FireFly BIU registers */
 #define HC_LAINT_ENA   0x20000000       /* Bit 29 */
 #define HC_ERINT_ENA   0x80000000       /* Bit 31 */
 
+/* Message Signaled Interrupt eXtension (MSI-X) message identifiers */
+#define MSIX_DFLT_ID    0
+#define MSIX_RNG0_ID    0
+#define MSIX_RNG1_ID    1
+#define MSIX_RNG2_ID    2
+#define MSIX_RNG3_ID    3
+
+#define MSIX_LINK_ID    4
+#define MSIX_MBOX_ID    5
+
+#define MSIX_SPARE0_ID  6
+#define MSIX_SPARE1_ID  7
+
 /* Mailbox Commands */
 #define MBX_SHUTDOWN        0x00        /* terminate testing */
 #define MBX_LOAD_SM         0x01
@@ -1285,10 +1315,14 @@ typedef struct {		/* FireFly BIU registers */
 #define MBX_KILL_BOARD      0x24
 #define MBX_CONFIG_FARP     0x25
 #define MBX_BEACON          0x2A
+#define MBX_CONFIG_MSI      0x30
 #define MBX_HEARTBEAT       0x31
 #define MBX_WRITE_VPARMS    0x32
 #define MBX_ASYNCEVT_ENABLE 0x33
 
+#define MBX_PORT_CAPABILITIES 0x3B
+#define MBX_PORT_IOV_CONTROL 0x3C
+
 #define MBX_CONFIG_HBQ      0x7C
 #define MBX_LOAD_AREA       0x81
 #define MBX_RUN_BIU_DIAG64  0x84
@@ -1474,24 +1508,18 @@ struct ulp_bde64 {	/* SLI-2 */
                         uint32_t bdeFlags:8;    /* BDE Flags 0 IS A SUPPORTED
                                                    VALUE !! */
 #endif
-
-#define BUFF_USE_RSVD       0x01        /* bdeFlags */
-#define BUFF_USE_INTRPT     0x02        /* Not Implemented with LP6000 */
-#define BUFF_USE_CMND       0x04        /* Optional, 1=cmd/rsp 0=data buffer */
-#define BUFF_USE_RCV        0x08        /*  "" "", 1=rcv buffer, 0=xmit
-                                            buffer */
-#define BUFF_TYPE_32BIT     0x10        /*  "" "", 1=32 bit addr 0=64 bit
-                                            addr */
-#define BUFF_TYPE_SPECIAL   0x20        /* Not Implemented with LP6000  */
-#define BUFF_TYPE_BDL       0x40        /* Optional,  may be set in BDL */
-#define BUFF_TYPE_INVALID   0x80        /*  ""  "" */
+#define BUFF_TYPE_BDE_64    0x00        /* BDE (Host_resident) */
+#define BUFF_TYPE_BDE_IMMED 0x01        /* Immediate Data BDE */
+#define BUFF_TYPE_BDE_64P   0x02        /* BDE (Port-resident) */
+#define BUFF_TYPE_BDE_64I   0x08        /* Input BDE (Host-resident) */
+#define BUFF_TYPE_BDE_64IP  0x0A        /* Input BDE (Port-resident) */
+#define BUFF_TYPE_BLP_64    0x40        /* BLP (Host-resident) */
+#define BUFF_TYPE_BLP_64P   0x42        /* BLP (Port-resident) */
                 } f;
         } tus;
         uint32_t addrLow;
         uint32_t addrHigh;
 };
-#define BDE64_SIZE_WORD 0
-#define BPL64_SIZE_WORD 0x40
 
 typedef struct ULP_BDL {        /* SLI-2 */
 #ifdef __BIG_ENDIAN_BITFIELD
@@ -2201,7 +2229,10 @@ typedef struct {
 typedef struct {
         uint32_t eventTag;      /* Event tag */
 #ifdef __BIG_ENDIAN_BITFIELD
-        uint32_t rsvd1:22;
+        uint32_t rsvd1:19;
+        uint32_t fa:1;
+        uint32_t mm:1;          /* Menlo Maintenance mode enabled */
+        uint32_t rx:1;
         uint32_t pb:1;
         uint32_t il:1;
         uint32_t attType:8;
@@ -2209,7 +2240,10 @@ typedef struct {
         uint32_t attType:8;
         uint32_t il:1;
         uint32_t pb:1;
-        uint32_t rsvd1:22;
+        uint32_t rx:1;
+        uint32_t mm:1;
+        uint32_t fa:1;
+        uint32_t rsvd1:19;
 #endif
 
 #define AT_RESERVED    0x00     /* Reserved - attType */
@@ -2230,6 +2264,7 @@ typedef struct {
 
 #define TOPOLOGY_PT_PT 0x01     /* Topology is pt-pt / pt-fabric */
 #define TOPOLOGY_LOOP  0x02     /* Topology is FC-AL */
+#define TOPOLOGY_LNK_MENLO_MAINTENANCE 0x05 /* maint mode zephtr to menlo */
 
         union {
                 struct ulp_bde lilpBde; /* This BDE points to a 128 byte buffer
@@ -2324,6 +2359,36 @@ typedef struct {
 #define  DMP_RSP_OFFSET          0x14   /* word 5 contains first word of rsp */
 #define  DMP_RSP_SIZE            0x6C   /* maximum of 27 words of rsp data */
 
+/* Structure for MB Command UPDATE_CFG (0x1B) */
+
+struct update_cfg_var {
+#ifdef __BIG_ENDIAN_BITFIELD
+        uint32_t rsvd2:16;
+        uint32_t type:8;
+        uint32_t rsvd:1;
+        uint32_t ra:1;
+        uint32_t co:1;
+        uint32_t cv:1;
+        uint32_t req:4;
+        uint32_t entry_length:16;
+        uint32_t region_id:16;
+#else  /*  __LITTLE_ENDIAN_BITFIELD */
+        uint32_t req:4;
+        uint32_t cv:1;
+        uint32_t co:1;
+        uint32_t ra:1;
+        uint32_t rsvd:1;
+        uint32_t type:8;
+        uint32_t rsvd2:16;
+        uint32_t region_id:16;
+        uint32_t entry_length:16;
+#endif
+
+        uint32_t resp_info;
+        uint32_t byte_cnt;
+        uint32_t data_offset;
+};
+
 struct hbq_mask {
 #ifdef __BIG_ENDIAN_BITFIELD
         uint8_t tmatch;
@@ -2560,6 +2625,40 @@ typedef struct {
 
 } CONFIG_PORT_VAR;
 
+/* Structure for MB Command CONFIG_MSI (0x30) */
+struct config_msi_var {
+#ifdef __BIG_ENDIAN_BITFIELD
+        uint32_t dfltMsgNum:8;  /* Default message number            */
+        uint32_t rsvd1:11;      /* Reserved                          */
+        uint32_t NID:5;         /* Number of secondary attention IDs */
+        uint32_t rsvd2:5;       /* Reserved                          */
+        uint32_t dfltPresent:1; /* Default message number present    */
+        uint32_t addFlag:1;     /* Add association flag              */
+        uint32_t reportFlag:1;  /* Report association flag           */
+#else   /*  __LITTLE_ENDIAN_BITFIELD */
+        uint32_t reportFlag:1;  /* Report association flag           */
+        uint32_t addFlag:1;     /* Add association flag              */
+        uint32_t dfltPresent:1; /* Default message number present    */
+        uint32_t rsvd2:5;       /* Reserved                          */
+        uint32_t NID:5;         /* Number of secondary attention IDs */
+        uint32_t rsvd1:11;      /* Reserved                          */
+        uint32_t dfltMsgNum:8;  /* Default message number            */
+#endif
+        uint32_t attentionConditions[2];
+        uint8_t  attentionId[16];
+        uint8_t  messageNumberByHA[64];
+        uint8_t  messageNumberByID[16];
+        uint32_t autoClearHA[2];
+#ifdef __BIG_ENDIAN_BITFIELD
+        uint32_t rsvd3:16;
+        uint32_t autoClearID:16;
+#else   /*  __LITTLE_ENDIAN_BITFIELD */
+        uint32_t autoClearID:16;
+        uint32_t rsvd3:16;
+#endif
+        uint32_t rsvd4;
+};
+
 /* SLI-2 Port Control Block */
 
 /* SLIM POINTER */
@@ -2678,10 +2777,12 @@ typedef union {
                                          * NEW_FEATURE
                                          */
         struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ)  */
+        struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/
         CONFIG_PORT_VAR varCfgPort;     /* cmd = 0x88 (CONFIG_PORT)  */
         REG_VPI_VAR varRegVpi;          /* cmd = 0x96 (REG_VPI) */
         UNREG_VPI_VAR varUnregVpi;      /* cmd = 0x97 (UNREG_VPI) */
         ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */
+        struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI)     */
 } MAILVARIANTS;
 
 /*
@@ -2715,11 +2816,19 @@ struct sli3_pgp {
         uint32_t hbq_get[16];
 };
 
-typedef union {
-        struct sli2_desc s2;
-        struct sli3_desc s3;
-        struct sli3_pgp  s3_pgp;
-} SLI_VAR;
+struct sli3_inb_pgp {
+        uint32_t ha_copy;
+        uint32_t counter;
+        struct lpfc_pgp port[MAX_RINGS];
+        uint32_t hbq_get[16];
+};
+
+union sli_var {
+        struct sli2_desc        s2;
+        struct sli3_desc        s3;
+        struct sli3_pgp         s3_pgp;
+        struct sli3_inb_pgp     s3_inb_pgp;
+};
 
 typedef struct {
 #ifdef __BIG_ENDIAN_BITFIELD
@@ -2737,7 +2846,7 @@ typedef struct {
 #endif
 
         MAILVARIANTS un;
-        SLI_VAR us;
+        union sli_var us;
 } MAILBOX_t;
 
 /*
@@ -3105,6 +3214,27 @@ struct que_xri64cx_ext_fields {
         struct lpfc_hbq_entry   buff[5];
 };
 
+#define LPFC_EXT_DATA_BDE_COUNT 3
+struct fcp_irw_ext {
+        uint32_t        io_tag64_low;
+        uint32_t        io_tag64_high;
+#ifdef __BIG_ENDIAN_BITFIELD
+        uint8_t         reserved1;
+        uint8_t         reserved2;
+        uint8_t         reserved3;
+        uint8_t         ebde_count;
+#else  /* __LITTLE_ENDIAN */
+        uint8_t         ebde_count;
+        uint8_t         reserved3;
+        uint8_t         reserved2;
+        uint8_t         reserved1;
+#endif
+        uint32_t        reserved4;
+        struct ulp_bde64 rbde;          /* response bde */
+        struct ulp_bde64 dbde[LPFC_EXT_DATA_BDE_COUNT]; /* data BDE or BPL */
+        uint8_t icd[32];                /* immediate command data (32 bytes) */
+};
+
 typedef struct _IOCB {  /* IOCB structure */
         union {
                 GENERIC_RSP grsp;       /* Generic response */
@@ -3190,7 +3320,7 @@ typedef struct _IOCB {	/* IOCB structure */
 
                 /* words 8-31 used for que_xri_cx iocb */
                 struct que_xri64cx_ext_fields que_xri64cx_ext_words;
-
+                struct fcp_irw_ext fcp_ext;
                 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
         } unsli3;
 
@@ -3292,3 +3422,10 @@ lpfc_error_lost_link(IOCB_t *iocbp)
                  iocbp->un.ulpWord[4] == IOERR_LINK_DOWN ||
                  iocbp->un.ulpWord[4] == IOERR_SLI_DOWN));
 }
+
+#define MENLO_TRANSPORT_TYPE 0xfe
+#define MENLO_CONTEXT 0
+#define MENLO_PU 3
+#define MENLO_TIMEOUT 30
+#define SETVAR_MLOMNT 0x103107
+#define SETVAR_MLORST 0x103007