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path: root/drivers/scsi/lpfc/lpfc_hw.h
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Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h112
1 files changed, 99 insertions, 13 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 451accd5564b..041f83e7634a 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -139,6 +139,9 @@ struct lpfc_sli_ct_request {
139 uint8_t len; 139 uint8_t len;
140 uint8_t symbname[255]; 140 uint8_t symbname[255];
141 } rsnn; 141 } rsnn;
142 struct da_id { /* For DA_ID requests */
143 uint32_t port_id;
144 } da_id;
142 struct rspn { /* For RSPN_ID requests */ 145 struct rspn { /* For RSPN_ID requests */
143 uint32_t PortId; 146 uint32_t PortId;
144 uint8_t len; 147 uint8_t len;
@@ -150,11 +153,7 @@ struct lpfc_sli_ct_request {
150 struct gff_acc { 153 struct gff_acc {
151 uint8_t fbits[128]; 154 uint8_t fbits[128];
152 } gff_acc; 155 } gff_acc;
153#ifdef __BIG_ENDIAN_BITFIELD
154#define FCP_TYPE_FEATURE_OFFSET 7 156#define FCP_TYPE_FEATURE_OFFSET 7
155#else /* __LITTLE_ENDIAN_BITFIELD */
156#define FCP_TYPE_FEATURE_OFFSET 4
157#endif
158 struct rff { 157 struct rff {
159 uint32_t PortId; 158 uint32_t PortId;
160 uint8_t reserved[2]; 159 uint8_t reserved[2];
@@ -177,6 +176,8 @@ struct lpfc_sli_ct_request {
177 sizeof(struct rnn)) 176 sizeof(struct rnn))
178#define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 177#define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
179 sizeof(struct rsnn)) 178 sizeof(struct rsnn))
179#define DA_ID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
180 sizeof(struct da_id))
180#define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 181#define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \
181 sizeof(struct rspn)) 182 sizeof(struct rspn))
182 183
@@ -1228,7 +1229,8 @@ typedef struct { /* FireFly BIU registers */
1228#define HS_FFER3 0x20000000 /* Bit 29 */ 1229#define HS_FFER3 0x20000000 /* Bit 29 */
1229#define HS_FFER2 0x40000000 /* Bit 30 */ 1230#define HS_FFER2 0x40000000 /* Bit 30 */
1230#define HS_FFER1 0x80000000 /* Bit 31 */ 1231#define HS_FFER1 0x80000000 /* Bit 31 */
1231#define HS_FFERM 0xFF000000 /* Mask for error bits 31:24 */ 1232#define HS_CRIT_TEMP 0x00000100 /* Bit 8 */
1233#define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */
1232 1234
1233/* Host Control Register */ 1235/* Host Control Register */
1234 1236
@@ -1277,12 +1279,14 @@ typedef struct { /* FireFly BIU registers */
1277#define MBX_DEL_LD_ENTRY 0x1D 1279#define MBX_DEL_LD_ENTRY 0x1D
1278#define MBX_RUN_PROGRAM 0x1E 1280#define MBX_RUN_PROGRAM 0x1E
1279#define MBX_SET_MASK 0x20 1281#define MBX_SET_MASK 0x20
1280#define MBX_SET_SLIM 0x21 1282#define MBX_SET_VARIABLE 0x21
1281#define MBX_UNREG_D_ID 0x23 1283#define MBX_UNREG_D_ID 0x23
1282#define MBX_KILL_BOARD 0x24 1284#define MBX_KILL_BOARD 0x24
1283#define MBX_CONFIG_FARP 0x25 1285#define MBX_CONFIG_FARP 0x25
1284#define MBX_BEACON 0x2A 1286#define MBX_BEACON 0x2A
1285#define MBX_HEARTBEAT 0x31 1287#define MBX_HEARTBEAT 0x31
1288#define MBX_WRITE_VPARMS 0x32
1289#define MBX_ASYNCEVT_ENABLE 0x33
1286 1290
1287#define MBX_CONFIG_HBQ 0x7C 1291#define MBX_CONFIG_HBQ 0x7C
1288#define MBX_LOAD_AREA 0x81 1292#define MBX_LOAD_AREA 0x81
@@ -1297,7 +1301,7 @@ typedef struct { /* FireFly BIU registers */
1297#define MBX_REG_VNPID 0x96 1301#define MBX_REG_VNPID 0x96
1298#define MBX_UNREG_VNPID 0x97 1302#define MBX_UNREG_VNPID 0x97
1299 1303
1300#define MBX_FLASH_WR_ULA 0x98 1304#define MBX_WRITE_WWN 0x98
1301#define MBX_SET_DEBUG 0x99 1305#define MBX_SET_DEBUG 0x99
1302#define MBX_LOAD_EXP_ROM 0x9C 1306#define MBX_LOAD_EXP_ROM 0x9C
1303 1307
@@ -1344,6 +1348,7 @@ typedef struct { /* FireFly BIU registers */
1344 1348
1345/* SLI_2 IOCB Command Set */ 1349/* SLI_2 IOCB Command Set */
1346 1350
1351#define CMD_ASYNC_STATUS 0x7C
1347#define CMD_RCV_SEQUENCE64_CX 0x81 1352#define CMD_RCV_SEQUENCE64_CX 0x81
1348#define CMD_XMIT_SEQUENCE64_CR 0x82 1353#define CMD_XMIT_SEQUENCE64_CR 0x82
1349#define CMD_XMIT_SEQUENCE64_CX 0x83 1354#define CMD_XMIT_SEQUENCE64_CX 0x83
@@ -1368,6 +1373,7 @@ typedef struct { /* FireFly BIU registers */
1368#define CMD_FCP_TRECEIVE64_CX 0xA1 1373#define CMD_FCP_TRECEIVE64_CX 0xA1
1369#define CMD_FCP_TRSP64_CX 0xA3 1374#define CMD_FCP_TRSP64_CX 0xA3
1370 1375
1376#define CMD_QUE_XRI64_CX 0xB3
1371#define CMD_IOCB_RCV_SEQ64_CX 0xB5 1377#define CMD_IOCB_RCV_SEQ64_CX 0xB5
1372#define CMD_IOCB_RCV_ELS64_CX 0xB7 1378#define CMD_IOCB_RCV_ELS64_CX 0xB7
1373#define CMD_IOCB_RCV_CONT64_CX 0xBB 1379#define CMD_IOCB_RCV_CONT64_CX 0xBB
@@ -1406,6 +1412,8 @@ typedef struct { /* FireFly BIU registers */
1406#define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */ 1412#define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */
1407#define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */ 1413#define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */
1408 1414
1415#define TEMPERATURE_OFFSET 0xB0 /* Slim offset for critical temperature event */
1416
1409/* 1417/*
1410 * Begin Structure Definitions for Mailbox Commands 1418 * Begin Structure Definitions for Mailbox Commands
1411 */ 1419 */
@@ -2606,6 +2614,18 @@ typedef struct {
2606 uint32_t IPAddress; 2614 uint32_t IPAddress;
2607} CONFIG_FARP_VAR; 2615} CONFIG_FARP_VAR;
2608 2616
2617/* Structure for MB Command MBX_ASYNCEVT_ENABLE (0x33) */
2618
2619typedef struct {
2620#ifdef __BIG_ENDIAN_BITFIELD
2621 uint32_t rsvd:30;
2622 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
2623#else /* __LITTLE_ENDIAN */
2624 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
2625 uint32_t rsvd:30;
2626#endif
2627} ASYNCEVT_ENABLE_VAR;
2628
2609/* Union of all Mailbox Command types */ 2629/* Union of all Mailbox Command types */
2610#define MAILBOX_CMD_WSIZE 32 2630#define MAILBOX_CMD_WSIZE 32
2611#define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t)) 2631#define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
@@ -2645,6 +2665,7 @@ typedef union {
2645 CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */ 2665 CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */
2646 REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ 2666 REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */
2647 UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ 2667 UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */
2668 ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */
2648} MAILVARIANTS; 2669} MAILVARIANTS;
2649 2670
2650/* 2671/*
@@ -2973,6 +2994,34 @@ typedef struct {
2973#endif 2994#endif
2974} RCV_ELS_REQ64; 2995} RCV_ELS_REQ64;
2975 2996
2997/* IOCB Command template for RCV_SEQ64 */
2998struct rcv_seq64 {
2999 struct ulp_bde64 elsReq;
3000 uint32_t hbq_1;
3001 uint32_t parmRo;
3002#ifdef __BIG_ENDIAN_BITFIELD
3003 uint32_t rctl:8;
3004 uint32_t type:8;
3005 uint32_t dfctl:8;
3006 uint32_t ls:1;
3007 uint32_t fs:1;
3008 uint32_t rsvd2:3;
3009 uint32_t si:1;
3010 uint32_t bc:1;
3011 uint32_t rsvd3:1;
3012#else /* __LITTLE_ENDIAN_BITFIELD */
3013 uint32_t rsvd3:1;
3014 uint32_t bc:1;
3015 uint32_t si:1;
3016 uint32_t rsvd2:3;
3017 uint32_t fs:1;
3018 uint32_t ls:1;
3019 uint32_t dfctl:8;
3020 uint32_t type:8;
3021 uint32_t rctl:8;
3022#endif
3023};
3024
2976/* IOCB Command template for all 64 bit FCP Initiator commands */ 3025/* IOCB Command template for all 64 bit FCP Initiator commands */
2977typedef struct { 3026typedef struct {
2978 ULP_BDL bdl; 3027 ULP_BDL bdl;
@@ -2987,6 +3036,21 @@ typedef struct {
2987 uint32_t fcpt_Length; /* transfer ready for IWRITE */ 3036 uint32_t fcpt_Length; /* transfer ready for IWRITE */
2988} FCPT_FIELDS64; 3037} FCPT_FIELDS64;
2989 3038
3039/* IOCB Command template for Async Status iocb commands */
3040typedef struct {
3041 uint32_t rsvd[4];
3042 uint32_t param;
3043#ifdef __BIG_ENDIAN_BITFIELD
3044 uint16_t evt_code; /* High order bits word 5 */
3045 uint16_t sub_ctxt_tag; /* Low order bits word 5 */
3046#else /* __LITTLE_ENDIAN_BITFIELD */
3047 uint16_t sub_ctxt_tag; /* High order bits word 5 */
3048 uint16_t evt_code; /* Low order bits word 5 */
3049#endif
3050} ASYNCSTAT_FIELDS;
3051#define ASYNC_TEMP_WARN 0x100
3052#define ASYNC_TEMP_SAFE 0x101
3053
2990/* IOCB Command template for CMD_IOCB_RCV_ELS64_CX (0xB7) 3054/* IOCB Command template for CMD_IOCB_RCV_ELS64_CX (0xB7)
2991 or CMD_IOCB_RCV_SEQ64_CX (0xB5) */ 3055 or CMD_IOCB_RCV_SEQ64_CX (0xB5) */
2992 3056
@@ -3004,7 +3068,26 @@ struct rcv_sli3 {
3004 struct ulp_bde64 bde2; 3068 struct ulp_bde64 bde2;
3005}; 3069};
3006 3070
3071/* Structure used for a single HBQ entry */
3072struct lpfc_hbq_entry {
3073 struct ulp_bde64 bde;
3074 uint32_t buffer_tag;
3075};
3007 3076
3077/* IOCB Command template for QUE_XRI64_CX (0xB3) command */
3078typedef struct {
3079 struct lpfc_hbq_entry buff;
3080 uint32_t rsvd;
3081 uint32_t rsvd1;
3082} QUE_XRI64_CX_FIELDS;
3083
3084struct que_xri64cx_ext_fields {
3085 uint32_t iotag64_low;
3086 uint32_t iotag64_high;
3087 uint32_t ebde_count;
3088 uint32_t rsvd;
3089 struct lpfc_hbq_entry buff[5];
3090};
3008 3091
3009typedef struct _IOCB { /* IOCB structure */ 3092typedef struct _IOCB { /* IOCB structure */
3010 union { 3093 union {
@@ -3028,6 +3111,9 @@ typedef struct _IOCB { /* IOCB structure */
3028 XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */ 3111 XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */
3029 FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */ 3112 FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */
3030 FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */ 3113 FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */
3114 ASYNCSTAT_FIELDS asyncstat; /* async_status iocb */
3115 QUE_XRI64_CX_FIELDS quexri64cx; /* que_xri64_cx fields */
3116 struct rcv_seq64 rcvseq64; /* RCV_SEQ64 and RCV_CONT64 */
3031 3117
3032 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */ 3118 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
3033 } un; 3119 } un;
@@ -3085,6 +3171,10 @@ typedef struct _IOCB { /* IOCB structure */
3085 3171
3086 union { 3172 union {
3087 struct rcv_sli3 rcvsli3; /* words 8 - 15 */ 3173 struct rcv_sli3 rcvsli3; /* words 8 - 15 */
3174
3175 /* words 8-31 used for que_xri_cx iocb */
3176 struct que_xri64cx_ext_fields que_xri64cx_ext_words;
3177
3088 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */ 3178 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
3089 } unsli3; 3179 } unsli3;
3090 3180
@@ -3124,12 +3214,6 @@ typedef struct _IOCB { /* IOCB structure */
3124 3214
3125} IOCB_t; 3215} IOCB_t;
3126 3216
3127/* Structure used for a single HBQ entry */
3128struct lpfc_hbq_entry {
3129 struct ulp_bde64 bde;
3130 uint32_t buffer_tag;
3131};
3132
3133 3217
3134#define SLI1_SLIM_SIZE (4 * 1024) 3218#define SLI1_SLIM_SIZE (4 * 1024)
3135 3219
@@ -3172,6 +3256,8 @@ lpfc_is_LC_HBA(unsigned short device)
3172 (device == PCI_DEVICE_ID_BSMB) || 3256 (device == PCI_DEVICE_ID_BSMB) ||
3173 (device == PCI_DEVICE_ID_ZMID) || 3257 (device == PCI_DEVICE_ID_ZMID) ||
3174 (device == PCI_DEVICE_ID_ZSMB) || 3258 (device == PCI_DEVICE_ID_ZSMB) ||
3259 (device == PCI_DEVICE_ID_SAT_MID) ||
3260 (device == PCI_DEVICE_ID_SAT_SMB) ||
3175 (device == PCI_DEVICE_ID_RFLY)) 3261 (device == PCI_DEVICE_ID_RFLY))
3176 return 1; 3262 return 1;
3177 else 3263 else