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path: root/drivers/scsi/lpfc/lpfc_hw.h
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Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h198
1 files changed, 96 insertions, 102 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
index 1044c438bb95..a253216e1f18 100644
--- a/drivers/scsi/lpfc/lpfc_hw.h
+++ b/drivers/scsi/lpfc/lpfc_hw.h
@@ -1370,7 +1370,6 @@ typedef struct { /* FireFly BIU registers */
1370#define MBX_READ_LNK_STAT 0x12 1370#define MBX_READ_LNK_STAT 0x12
1371#define MBX_REG_LOGIN 0x13 1371#define MBX_REG_LOGIN 0x13
1372#define MBX_UNREG_LOGIN 0x14 1372#define MBX_UNREG_LOGIN 0x14
1373#define MBX_READ_LA 0x15
1374#define MBX_CLEAR_LA 0x16 1373#define MBX_CLEAR_LA 0x16
1375#define MBX_DUMP_MEMORY 0x17 1374#define MBX_DUMP_MEMORY 0x17
1376#define MBX_DUMP_CONTEXT 0x18 1375#define MBX_DUMP_CONTEXT 0x18
@@ -1404,7 +1403,7 @@ typedef struct { /* FireFly BIU registers */
1404#define MBX_READ_SPARM64 0x8D 1403#define MBX_READ_SPARM64 0x8D
1405#define MBX_READ_RPI64 0x8F 1404#define MBX_READ_RPI64 0x8F
1406#define MBX_REG_LOGIN64 0x93 1405#define MBX_REG_LOGIN64 0x93
1407#define MBX_READ_LA64 0x95 1406#define MBX_READ_TOPOLOGY 0x95
1408#define MBX_REG_VPI 0x96 1407#define MBX_REG_VPI 0x96
1409#define MBX_UNREG_VPI 0x97 1408#define MBX_UNREG_VPI 0x97
1410 1409
@@ -1825,12 +1824,13 @@ typedef struct {
1825#define FLAGS_IMED_ABORT 0x04000 /* Bit 14 */ 1824#define FLAGS_IMED_ABORT 0x04000 /* Bit 14 */
1826 1825
1827 uint32_t link_speed; 1826 uint32_t link_speed;
1828#define LINK_SPEED_AUTO 0 /* Auto selection */ 1827#define LINK_SPEED_AUTO 0x0 /* Auto selection */
1829#define LINK_SPEED_1G 1 /* 1 Gigabaud */ 1828#define LINK_SPEED_1G 0x1 /* 1 Gigabaud */
1830#define LINK_SPEED_2G 2 /* 2 Gigabaud */ 1829#define LINK_SPEED_2G 0x2 /* 2 Gigabaud */
1831#define LINK_SPEED_4G 4 /* 4 Gigabaud */ 1830#define LINK_SPEED_4G 0x4 /* 4 Gigabaud */
1832#define LINK_SPEED_8G 8 /* 8 Gigabaud */ 1831#define LINK_SPEED_8G 0x8 /* 8 Gigabaud */
1833#define LINK_SPEED_10G 16 /* 10 Gigabaud */ 1832#define LINK_SPEED_10G 0x10 /* 10 Gigabaud */
1833#define LINK_SPEED_16G 0x11 /* 16 Gigabaud */
1834 1834
1835} INIT_LINK_VAR; 1835} INIT_LINK_VAR;
1836 1836
@@ -2001,6 +2001,7 @@ typedef struct {
2001#define LMT_4Gb 0x040 2001#define LMT_4Gb 0x040
2002#define LMT_8Gb 0x080 2002#define LMT_8Gb 0x080
2003#define LMT_10Gb 0x100 2003#define LMT_10Gb 0x100
2004#define LMT_16Gb 0x200
2004 uint32_t rsvd2; 2005 uint32_t rsvd2;
2005 uint32_t rsvd3; 2006 uint32_t rsvd3;
2006 uint32_t max_xri; 2007 uint32_t max_xri;
@@ -2396,100 +2397,93 @@ typedef struct {
2396#endif 2397#endif
2397} UNREG_D_ID_VAR; 2398} UNREG_D_ID_VAR;
2398 2399
2399/* Structure for MB Command READ_LA (21) */ 2400/* Structure for MB Command READ_TOPOLOGY (0x95) */
2400/* Structure for MB Command READ_LA64 (0x95) */ 2401struct lpfc_mbx_read_top {
2401
2402typedef struct {
2403 uint32_t eventTag; /* Event tag */ 2402 uint32_t eventTag; /* Event tag */
2404#ifdef __BIG_ENDIAN_BITFIELD 2403 uint32_t word2;
2405 uint32_t rsvd1:19; 2404#define lpfc_mbx_read_top_fa_SHIFT 12
2406 uint32_t fa:1; 2405#define lpfc_mbx_read_top_fa_MASK 0x00000001
2407 uint32_t mm:1; /* Menlo Maintenance mode enabled */ 2406#define lpfc_mbx_read_top_fa_WORD word2
2408 uint32_t rx:1; 2407#define lpfc_mbx_read_top_mm_SHIFT 11
2409 uint32_t pb:1; 2408#define lpfc_mbx_read_top_mm_MASK 0x00000001
2410 uint32_t il:1; 2409#define lpfc_mbx_read_top_mm_WORD word2
2411 uint32_t attType:8; 2410#define lpfc_mbx_read_top_pb_SHIFT 9
2412#else /* __LITTLE_ENDIAN_BITFIELD */ 2411#define lpfc_mbx_read_top_pb_MASK 0X00000001
2413 uint32_t attType:8; 2412#define lpfc_mbx_read_top_pb_WORD word2
2414 uint32_t il:1; 2413#define lpfc_mbx_read_top_il_SHIFT 8
2415 uint32_t pb:1; 2414#define lpfc_mbx_read_top_il_MASK 0x00000001
2416 uint32_t rx:1; 2415#define lpfc_mbx_read_top_il_WORD word2
2417 uint32_t mm:1; 2416#define lpfc_mbx_read_top_att_type_SHIFT 0
2418 uint32_t fa:1; 2417#define lpfc_mbx_read_top_att_type_MASK 0x000000FF
2419 uint32_t rsvd1:19; 2418#define lpfc_mbx_read_top_att_type_WORD word2
2420#endif 2419#define LPFC_ATT_RESERVED 0x00 /* Reserved - attType */
2421 2420#define LPFC_ATT_LINK_UP 0x01 /* Link is up */
2422#define AT_RESERVED 0x00 /* Reserved - attType */ 2421#define LPFC_ATT_LINK_DOWN 0x02 /* Link is down */
2423#define AT_LINK_UP 0x01 /* Link is up */ 2422 uint32_t word3;
2424#define AT_LINK_DOWN 0x02 /* Link is down */ 2423#define lpfc_mbx_read_top_alpa_granted_SHIFT 24
2425 2424#define lpfc_mbx_read_top_alpa_granted_MASK 0x000000FF
2426#ifdef __BIG_ENDIAN_BITFIELD 2425#define lpfc_mbx_read_top_alpa_granted_WORD word3
2427 uint8_t granted_AL_PA; 2426#define lpfc_mbx_read_top_lip_alps_SHIFT 16
2428 uint8_t lipAlPs; 2427#define lpfc_mbx_read_top_lip_alps_MASK 0x000000FF
2429 uint8_t lipType; 2428#define lpfc_mbx_read_top_lip_alps_WORD word3
2430 uint8_t topology; 2429#define lpfc_mbx_read_top_lip_type_SHIFT 8
2431#else /* __LITTLE_ENDIAN_BITFIELD */ 2430#define lpfc_mbx_read_top_lip_type_MASK 0x000000FF
2432 uint8_t topology; 2431#define lpfc_mbx_read_top_lip_type_WORD word3
2433 uint8_t lipType; 2432#define lpfc_mbx_read_top_topology_SHIFT 0
2434 uint8_t lipAlPs; 2433#define lpfc_mbx_read_top_topology_MASK 0x000000FF
2435 uint8_t granted_AL_PA; 2434#define lpfc_mbx_read_top_topology_WORD word3
2436#endif 2435#define LPFC_TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */
2437 2436#define LPFC_TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */
2438#define TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */ 2437#define LPFC_TOPOLOGY_MM 0x05 /* maint mode zephtr to menlo */
2439#define TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */ 2438 /* store the LILP AL_PA position map into */
2440#define TOPOLOGY_LNK_MENLO_MAINTENANCE 0x05 /* maint mode zephtr to menlo */ 2439 struct ulp_bde64 lilpBde64;
2441 2440#define LPFC_ALPA_MAP_SIZE 128
2442 union { 2441 uint32_t word7;
2443 struct ulp_bde lilpBde; /* This BDE points to a 128 byte buffer 2442#define lpfc_mbx_read_top_ld_lu_SHIFT 31
2444 to */ 2443#define lpfc_mbx_read_top_ld_lu_MASK 0x00000001
2445 /* store the LILP AL_PA position map into */ 2444#define lpfc_mbx_read_top_ld_lu_WORD word7
2446 struct ulp_bde64 lilpBde64; 2445#define lpfc_mbx_read_top_ld_tf_SHIFT 30
2447 } un; 2446#define lpfc_mbx_read_top_ld_tf_MASK 0x00000001
2448 2447#define lpfc_mbx_read_top_ld_tf_WORD word7
2449#ifdef __BIG_ENDIAN_BITFIELD 2448#define lpfc_mbx_read_top_ld_link_spd_SHIFT 8
2450 uint32_t Dlu:1; 2449#define lpfc_mbx_read_top_ld_link_spd_MASK 0x000000FF
2451 uint32_t Dtf:1; 2450#define lpfc_mbx_read_top_ld_link_spd_WORD word7
2452 uint32_t Drsvd2:14; 2451#define lpfc_mbx_read_top_ld_nl_port_SHIFT 4
2453 uint32_t DlnkSpeed:8; 2452#define lpfc_mbx_read_top_ld_nl_port_MASK 0x0000000F
2454 uint32_t DnlPort:4; 2453#define lpfc_mbx_read_top_ld_nl_port_WORD word7
2455 uint32_t Dtx:2; 2454#define lpfc_mbx_read_top_ld_tx_SHIFT 2
2456 uint32_t Drx:2; 2455#define lpfc_mbx_read_top_ld_tx_MASK 0x00000003
2457#else /* __LITTLE_ENDIAN_BITFIELD */ 2456#define lpfc_mbx_read_top_ld_tx_WORD word7
2458 uint32_t Drx:2; 2457#define lpfc_mbx_read_top_ld_rx_SHIFT 0
2459 uint32_t Dtx:2; 2458#define lpfc_mbx_read_top_ld_rx_MASK 0x00000003
2460 uint32_t DnlPort:4; 2459#define lpfc_mbx_read_top_ld_rx_WORD word7
2461 uint32_t DlnkSpeed:8; 2460 uint32_t word8;
2462 uint32_t Drsvd2:14; 2461#define lpfc_mbx_read_top_lu_SHIFT 31
2463 uint32_t Dtf:1; 2462#define lpfc_mbx_read_top_lu_MASK 0x00000001
2464 uint32_t Dlu:1; 2463#define lpfc_mbx_read_top_lu_WORD word8
2465#endif 2464#define lpfc_mbx_read_top_tf_SHIFT 30
2466 2465#define lpfc_mbx_read_top_tf_MASK 0x00000001
2467#ifdef __BIG_ENDIAN_BITFIELD 2466#define lpfc_mbx_read_top_tf_WORD word8
2468 uint32_t Ulu:1; 2467#define lpfc_mbx_read_top_link_spd_SHIFT 8
2469 uint32_t Utf:1; 2468#define lpfc_mbx_read_top_link_spd_MASK 0x000000FF
2470 uint32_t Ursvd2:14; 2469#define lpfc_mbx_read_top_link_spd_WORD word8
2471 uint32_t UlnkSpeed:8; 2470#define lpfc_mbx_read_top_nl_port_SHIFT 4
2472 uint32_t UnlPort:4; 2471#define lpfc_mbx_read_top_nl_port_MASK 0x0000000F
2473 uint32_t Utx:2; 2472#define lpfc_mbx_read_top_nl_port_WORD word8
2474 uint32_t Urx:2; 2473#define lpfc_mbx_read_top_tx_SHIFT 2
2475#else /* __LITTLE_ENDIAN_BITFIELD */ 2474#define lpfc_mbx_read_top_tx_MASK 0x00000003
2476 uint32_t Urx:2; 2475#define lpfc_mbx_read_top_tx_WORD word8
2477 uint32_t Utx:2; 2476#define lpfc_mbx_read_top_rx_SHIFT 0
2478 uint32_t UnlPort:4; 2477#define lpfc_mbx_read_top_rx_MASK 0x00000003
2479 uint32_t UlnkSpeed:8; 2478#define lpfc_mbx_read_top_rx_WORD word8
2480 uint32_t Ursvd2:14; 2479#define LPFC_LINK_SPEED_UNKNOWN 0x0
2481 uint32_t Utf:1; 2480#define LPFC_LINK_SPEED_1GHZ 0x04
2482 uint32_t Ulu:1; 2481#define LPFC_LINK_SPEED_2GHZ 0x08
2483#endif 2482#define LPFC_LINK_SPEED_4GHZ 0x10
2484 2483#define LPFC_LINK_SPEED_8GHZ 0x20
2485#define LA_UNKNW_LINK 0x0 /* lnkSpeed */ 2484#define LPFC_LINK_SPEED_10GHZ 0x40
2486#define LA_1GHZ_LINK 0x04 /* lnkSpeed */ 2485#define LPFC_LINK_SPEED_16GHZ 0x80
2487#define LA_2GHZ_LINK 0x08 /* lnkSpeed */ 2486};
2488#define LA_4GHZ_LINK 0x10 /* lnkSpeed */
2489#define LA_8GHZ_LINK 0x20 /* lnkSpeed */
2490#define LA_10GHZ_LINK 0x40 /* lnkSpeed */
2491
2492} READ_LA_VAR;
2493 2487
2494/* Structure for MB Command CLEAR_LA (22) */ 2488/* Structure for MB Command CLEAR_LA (22) */
2495 2489
@@ -3018,7 +3012,6 @@ typedef union {
3018 READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */ 3012 READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */
3019 REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */ 3013 REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */
3020 UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */ 3014 UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */
3021 READ_LA_VAR varReadLA; /* cmd = 21 (READ_LA(64)) */
3022 CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */ 3015 CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */
3023 DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */ 3016 DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */
3024 UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */ 3017 UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */
@@ -3028,6 +3021,7 @@ typedef union {
3028 struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ) */ 3021 struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ) */
3029 struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/ 3022 struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/
3030 CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */ 3023 CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */
3024 struct lpfc_mbx_read_top varReadTop; /* cmd = 0x95 (READ_TOPOLOGY) */
3031 REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ 3025 REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */
3032 UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ 3026 UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */
3033 ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */ 3027 ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */