diff options
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_debugfs.h')
-rw-r--r-- | drivers/scsi/lpfc/lpfc_debugfs.h | 125 |
1 files changed, 123 insertions, 2 deletions
diff --git a/drivers/scsi/lpfc/lpfc_debugfs.h b/drivers/scsi/lpfc/lpfc_debugfs.h index 6525a5e62d27..f83bd944edd8 100644 --- a/drivers/scsi/lpfc/lpfc_debugfs.h +++ b/drivers/scsi/lpfc/lpfc_debugfs.h | |||
@@ -39,14 +39,51 @@ | |||
39 | /* hbqinfo output buffer size */ | 39 | /* hbqinfo output buffer size */ |
40 | #define LPFC_HBQINFO_SIZE 8192 | 40 | #define LPFC_HBQINFO_SIZE 8192 |
41 | 41 | ||
42 | /* | ||
43 | * For SLI4 iDiag debugfs diagnostics tool | ||
44 | */ | ||
45 | |||
42 | /* pciConf */ | 46 | /* pciConf */ |
43 | #define LPFC_PCI_CFG_BROWSE 0xffff | 47 | #define LPFC_PCI_CFG_BROWSE 0xffff |
44 | #define LPFC_PCI_CFG_RD_CMD_ARG 2 | 48 | #define LPFC_PCI_CFG_RD_CMD_ARG 2 |
45 | #define LPFC_PCI_CFG_WR_CMD_ARG 3 | 49 | #define LPFC_PCI_CFG_WR_CMD_ARG 3 |
46 | #define LPFC_PCI_CFG_SIZE 4096 | 50 | #define LPFC_PCI_CFG_SIZE 4096 |
47 | #define LPFC_PCI_CFG_RD_BUF_SIZE (LPFC_PCI_CFG_SIZE/2) | ||
48 | #define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4) | 51 | #define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4) |
49 | 52 | ||
53 | #define IDIAG_PCICFG_WHERE_INDX 0 | ||
54 | #define IDIAG_PCICFG_COUNT_INDX 1 | ||
55 | #define IDIAG_PCICFG_VALUE_INDX 2 | ||
56 | |||
57 | /* barAcc */ | ||
58 | #define LPFC_PCI_BAR_BROWSE 0xffff | ||
59 | #define LPFC_PCI_BAR_RD_CMD_ARG 3 | ||
60 | #define LPFC_PCI_BAR_WR_CMD_ARG 3 | ||
61 | |||
62 | #define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16) | ||
63 | #define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128) | ||
64 | #define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128) | ||
65 | #define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32) | ||
66 | |||
67 | #define LPFC_PCI_BAR_RD_BUF_SIZE 4096 | ||
68 | #define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4) | ||
69 | |||
70 | #define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4) | ||
71 | #define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4) | ||
72 | #define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4) | ||
73 | #define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4) | ||
74 | |||
75 | #define IDIAG_BARACC_BAR_NUM_INDX 0 | ||
76 | #define IDIAG_BARACC_OFF_SET_INDX 1 | ||
77 | #define IDIAG_BARACC_ACC_MOD_INDX 2 | ||
78 | #define IDIAG_BARACC_REG_VAL_INDX 2 | ||
79 | #define IDIAG_BARACC_BAR_SZE_INDX 3 | ||
80 | |||
81 | #define IDIAG_BARACC_BAR_0 0 | ||
82 | #define IDIAG_BARACC_BAR_1 1 | ||
83 | #define IDIAG_BARACC_BAR_2 2 | ||
84 | |||
85 | #define SINGLE_WORD 1 | ||
86 | |||
50 | /* queue info */ | 87 | /* queue info */ |
51 | #define LPFC_QUE_INFO_GET_BUF_SIZE 4096 | 88 | #define LPFC_QUE_INFO_GET_BUF_SIZE 4096 |
52 | 89 | ||
@@ -63,7 +100,14 @@ | |||
63 | #define LPFC_IDIAG_WQ 4 | 100 | #define LPFC_IDIAG_WQ 4 |
64 | #define LPFC_IDIAG_RQ 5 | 101 | #define LPFC_IDIAG_RQ 5 |
65 | 102 | ||
66 | /* doorbell acc */ | 103 | #define IDIAG_QUEACC_QUETP_INDX 0 |
104 | #define IDIAG_QUEACC_QUEID_INDX 1 | ||
105 | #define IDIAG_QUEACC_INDEX_INDX 2 | ||
106 | #define IDIAG_QUEACC_COUNT_INDX 3 | ||
107 | #define IDIAG_QUEACC_OFFST_INDX 4 | ||
108 | #define IDIAG_QUEACC_VALUE_INDX 5 | ||
109 | |||
110 | /* doorbell register acc */ | ||
67 | #define LPFC_DRB_ACC_ALL 0xffff | 111 | #define LPFC_DRB_ACC_ALL 0xffff |
68 | #define LPFC_DRB_ACC_RD_CMD_ARG 1 | 112 | #define LPFC_DRB_ACC_RD_CMD_ARG 1 |
69 | #define LPFC_DRB_ACC_WR_CMD_ARG 2 | 113 | #define LPFC_DRB_ACC_WR_CMD_ARG 2 |
@@ -76,6 +120,67 @@ | |||
76 | 120 | ||
77 | #define LPFC_DRB_MAX 4 | 121 | #define LPFC_DRB_MAX 4 |
78 | 122 | ||
123 | #define IDIAG_DRBACC_REGID_INDX 0 | ||
124 | #define IDIAG_DRBACC_VALUE_INDX 1 | ||
125 | |||
126 | /* control register acc */ | ||
127 | #define LPFC_CTL_ACC_ALL 0xffff | ||
128 | #define LPFC_CTL_ACC_RD_CMD_ARG 1 | ||
129 | #define LPFC_CTL_ACC_WR_CMD_ARG 2 | ||
130 | #define LPFC_CTL_ACC_BUF_SIZE 256 | ||
131 | |||
132 | #define LPFC_CTL_PORT_SEM 1 | ||
133 | #define LPFC_CTL_PORT_STA 2 | ||
134 | #define LPFC_CTL_PORT_CTL 3 | ||
135 | #define LPFC_CTL_PORT_ER1 4 | ||
136 | #define LPFC_CTL_PORT_ER2 5 | ||
137 | #define LPFC_CTL_PDEV_CTL 6 | ||
138 | |||
139 | #define LPFC_CTL_MAX 6 | ||
140 | |||
141 | #define IDIAG_CTLACC_REGID_INDX 0 | ||
142 | #define IDIAG_CTLACC_VALUE_INDX 1 | ||
143 | |||
144 | /* mailbox access */ | ||
145 | #define LPFC_MBX_DMP_ARG 4 | ||
146 | |||
147 | #define LPFC_MBX_ACC_BUF_SIZE 512 | ||
148 | #define LPFC_MBX_ACC_LBUF_SZ 128 | ||
149 | |||
150 | #define LPFC_MBX_DMP_MBX_WORD 0x00000001 | ||
151 | #define LPFC_MBX_DMP_MBX_BYTE 0x00000002 | ||
152 | #define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE) | ||
153 | |||
154 | #define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001 | ||
155 | #define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002 | ||
156 | #define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004 | ||
157 | #define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008 | ||
158 | #define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \ | ||
159 | LPFC_BSG_DMP_MBX_RD_BUF | \ | ||
160 | LPFC_BSG_DMP_MBX_WR_MBX | \ | ||
161 | LPFC_BSG_DMP_MBX_WR_BUF) | ||
162 | |||
163 | #define LPFC_MBX_DMP_ALL 0xffff | ||
164 | #define LPFC_MBX_ALL_CMD 0xff | ||
165 | |||
166 | #define IDIAG_MBXACC_MBCMD_INDX 0 | ||
167 | #define IDIAG_MBXACC_DPMAP_INDX 1 | ||
168 | #define IDIAG_MBXACC_DPCNT_INDX 2 | ||
169 | #define IDIAG_MBXACC_WDCNT_INDX 3 | ||
170 | |||
171 | /* extents access */ | ||
172 | #define LPFC_EXT_ACC_CMD_ARG 1 | ||
173 | #define LPFC_EXT_ACC_BUF_SIZE 4096 | ||
174 | |||
175 | #define LPFC_EXT_ACC_AVAIL 0x1 | ||
176 | #define LPFC_EXT_ACC_ALLOC 0x2 | ||
177 | #define LPFC_EXT_ACC_DRIVR 0x4 | ||
178 | #define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \ | ||
179 | LPFC_EXT_ACC_AVAIL | \ | ||
180 | LPFC_EXT_ACC_ALLOC) | ||
181 | |||
182 | #define IDIAG_EXTACC_EXMAP_INDX 0 | ||
183 | |||
79 | #define SIZE_U8 sizeof(uint8_t) | 184 | #define SIZE_U8 sizeof(uint8_t) |
80 | #define SIZE_U16 sizeof(uint16_t) | 185 | #define SIZE_U16 sizeof(uint16_t) |
81 | #define SIZE_U32 sizeof(uint32_t) | 186 | #define SIZE_U32 sizeof(uint32_t) |
@@ -110,6 +215,11 @@ struct lpfc_idiag_cmd { | |||
110 | #define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003 | 215 | #define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003 |
111 | #define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004 | 216 | #define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004 |
112 | 217 | ||
218 | #define LPFC_IDIAG_CMD_BARACC_RD 0x00000008 | ||
219 | #define LPFC_IDIAG_CMD_BARACC_WR 0x00000009 | ||
220 | #define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a | ||
221 | #define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b | ||
222 | |||
113 | #define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011 | 223 | #define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011 |
114 | #define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012 | 224 | #define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012 |
115 | #define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013 | 225 | #define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013 |
@@ -119,6 +229,17 @@ struct lpfc_idiag_cmd { | |||
119 | #define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022 | 229 | #define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022 |
120 | #define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023 | 230 | #define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023 |
121 | #define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024 | 231 | #define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024 |
232 | |||
233 | #define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031 | ||
234 | #define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032 | ||
235 | #define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033 | ||
236 | #define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034 | ||
237 | |||
238 | #define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041 | ||
239 | #define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042 | ||
240 | |||
241 | #define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051 | ||
242 | |||
122 | uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE]; | 243 | uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE]; |
123 | }; | 244 | }; |
124 | 245 | ||