diff options
Diffstat (limited to 'drivers/scsi/ipr.h')
-rw-r--r-- | drivers/scsi/ipr.h | 83 |
1 files changed, 81 insertions, 2 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index 6d035283af08..9f62a1d4d511 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
@@ -37,8 +37,8 @@ | |||
37 | /* | 37 | /* |
38 | * Literals | 38 | * Literals |
39 | */ | 39 | */ |
40 | #define IPR_DRIVER_VERSION "2.2.0" | 40 | #define IPR_DRIVER_VERSION "2.3.0" |
41 | #define IPR_DRIVER_DATE "(September 25, 2006)" | 41 | #define IPR_DRIVER_DATE "(November 8, 2006)" |
42 | 42 | ||
43 | /* | 43 | /* |
44 | * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding | 44 | * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding |
@@ -54,6 +54,8 @@ | |||
54 | */ | 54 | */ |
55 | #define IPR_NUM_BASE_CMD_BLKS 100 | 55 | #define IPR_NUM_BASE_CMD_BLKS 100 |
56 | 56 | ||
57 | #define PCI_DEVICE_ID_IBM_OBSIDIAN_E 0x0339 | ||
58 | |||
57 | #define IPR_SUBS_DEV_ID_2780 0x0264 | 59 | #define IPR_SUBS_DEV_ID_2780 0x0264 |
58 | #define IPR_SUBS_DEV_ID_5702 0x0266 | 60 | #define IPR_SUBS_DEV_ID_5702 0x0266 |
59 | #define IPR_SUBS_DEV_ID_5703 0x0278 | 61 | #define IPR_SUBS_DEV_ID_5703 0x0278 |
@@ -66,7 +68,11 @@ | |||
66 | #define IPR_SUBS_DEV_ID_571F 0x02D5 | 68 | #define IPR_SUBS_DEV_ID_571F 0x02D5 |
67 | #define IPR_SUBS_DEV_ID_572A 0x02C1 | 69 | #define IPR_SUBS_DEV_ID_572A 0x02C1 |
68 | #define IPR_SUBS_DEV_ID_572B 0x02C2 | 70 | #define IPR_SUBS_DEV_ID_572B 0x02C2 |
71 | #define IPR_SUBS_DEV_ID_572F 0x02C3 | ||
69 | #define IPR_SUBS_DEV_ID_575B 0x030D | 72 | #define IPR_SUBS_DEV_ID_575B 0x030D |
73 | #define IPR_SUBS_DEV_ID_575C 0x0338 | ||
74 | #define IPR_SUBS_DEV_ID_57B7 0x0360 | ||
75 | #define IPR_SUBS_DEV_ID_57B8 0x02C2 | ||
70 | 76 | ||
71 | #define IPR_NAME "ipr" | 77 | #define IPR_NAME "ipr" |
72 | 78 | ||
@@ -98,6 +104,7 @@ | |||
98 | #define IPR_IOASC_IOA_WAS_RESET 0x10000001 | 104 | #define IPR_IOASC_IOA_WAS_RESET 0x10000001 |
99 | #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002 | 105 | #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002 |
100 | 106 | ||
107 | #define IPR_DEFAULT_MAX_ERROR_DUMP 984 | ||
101 | #define IPR_NUM_LOG_HCAMS 2 | 108 | #define IPR_NUM_LOG_HCAMS 2 |
102 | #define IPR_NUM_CFG_CHG_HCAMS 2 | 109 | #define IPR_NUM_CFG_CHG_HCAMS 2 |
103 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) | 110 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) |
@@ -731,6 +738,64 @@ struct ipr_hostrcb_type_17_error { | |||
731 | u32 data[476]; | 738 | u32 data[476]; |
732 | }__attribute__((packed, aligned (4))); | 739 | }__attribute__((packed, aligned (4))); |
733 | 740 | ||
741 | struct ipr_hostrcb_config_element { | ||
742 | u8 type_status; | ||
743 | #define IPR_PATH_CFG_TYPE_MASK 0xF0 | ||
744 | #define IPR_PATH_CFG_NOT_EXIST 0x00 | ||
745 | #define IPR_PATH_CFG_IOA_PORT 0x10 | ||
746 | #define IPR_PATH_CFG_EXP_PORT 0x20 | ||
747 | #define IPR_PATH_CFG_DEVICE_PORT 0x30 | ||
748 | #define IPR_PATH_CFG_DEVICE_LUN 0x40 | ||
749 | |||
750 | #define IPR_PATH_CFG_STATUS_MASK 0x0F | ||
751 | #define IPR_PATH_CFG_NO_PROB 0x00 | ||
752 | #define IPR_PATH_CFG_DEGRADED 0x01 | ||
753 | #define IPR_PATH_CFG_FAILED 0x02 | ||
754 | #define IPR_PATH_CFG_SUSPECT 0x03 | ||
755 | #define IPR_PATH_NOT_DETECTED 0x04 | ||
756 | #define IPR_PATH_INCORRECT_CONN 0x05 | ||
757 | |||
758 | u8 cascaded_expander; | ||
759 | u8 phy; | ||
760 | u8 link_rate; | ||
761 | #define IPR_PHY_LINK_RATE_MASK 0x0F | ||
762 | |||
763 | __be32 wwid[2]; | ||
764 | }__attribute__((packed, aligned (4))); | ||
765 | |||
766 | struct ipr_hostrcb_fabric_desc { | ||
767 | __be16 length; | ||
768 | u8 ioa_port; | ||
769 | u8 cascaded_expander; | ||
770 | u8 phy; | ||
771 | u8 path_state; | ||
772 | #define IPR_PATH_ACTIVE_MASK 0xC0 | ||
773 | #define IPR_PATH_NO_INFO 0x00 | ||
774 | #define IPR_PATH_ACTIVE 0x40 | ||
775 | #define IPR_PATH_NOT_ACTIVE 0x80 | ||
776 | |||
777 | #define IPR_PATH_STATE_MASK 0x0F | ||
778 | #define IPR_PATH_STATE_NO_INFO 0x00 | ||
779 | #define IPR_PATH_HEALTHY 0x01 | ||
780 | #define IPR_PATH_DEGRADED 0x02 | ||
781 | #define IPR_PATH_FAILED 0x03 | ||
782 | |||
783 | __be16 num_entries; | ||
784 | struct ipr_hostrcb_config_element elem[1]; | ||
785 | }__attribute__((packed, aligned (4))); | ||
786 | |||
787 | #define for_each_fabric_cfg(fabric, cfg) \ | ||
788 | for (cfg = (fabric)->elem; \ | ||
789 | cfg < ((fabric)->elem + be16_to_cpu((fabric)->num_entries)); \ | ||
790 | cfg++) | ||
791 | |||
792 | struct ipr_hostrcb_type_20_error { | ||
793 | u8 failure_reason[64]; | ||
794 | u8 reserved[3]; | ||
795 | u8 num_entries; | ||
796 | struct ipr_hostrcb_fabric_desc desc[1]; | ||
797 | }__attribute__((packed, aligned (4))); | ||
798 | |||
734 | struct ipr_hostrcb_error { | 799 | struct ipr_hostrcb_error { |
735 | __be32 failing_dev_ioasc; | 800 | __be32 failing_dev_ioasc; |
736 | struct ipr_res_addr failing_dev_res_addr; | 801 | struct ipr_res_addr failing_dev_res_addr; |
@@ -747,6 +812,7 @@ struct ipr_hostrcb_error { | |||
747 | struct ipr_hostrcb_type_13_error type_13_error; | 812 | struct ipr_hostrcb_type_13_error type_13_error; |
748 | struct ipr_hostrcb_type_14_error type_14_error; | 813 | struct ipr_hostrcb_type_14_error type_14_error; |
749 | struct ipr_hostrcb_type_17_error type_17_error; | 814 | struct ipr_hostrcb_type_17_error type_17_error; |
815 | struct ipr_hostrcb_type_20_error type_20_error; | ||
750 | } u; | 816 | } u; |
751 | }__attribute__((packed, aligned (4))); | 817 | }__attribute__((packed, aligned (4))); |
752 | 818 | ||
@@ -786,6 +852,7 @@ struct ipr_hcam { | |||
786 | #define IPR_HOST_RCB_OVERLAY_ID_14 0x14 | 852 | #define IPR_HOST_RCB_OVERLAY_ID_14 0x14 |
787 | #define IPR_HOST_RCB_OVERLAY_ID_16 0x16 | 853 | #define IPR_HOST_RCB_OVERLAY_ID_16 0x16 |
788 | #define IPR_HOST_RCB_OVERLAY_ID_17 0x17 | 854 | #define IPR_HOST_RCB_OVERLAY_ID_17 0x17 |
855 | #define IPR_HOST_RCB_OVERLAY_ID_20 0x20 | ||
789 | #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF | 856 | #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF |
790 | 857 | ||
791 | u8 reserved1[3]; | 858 | u8 reserved1[3]; |
@@ -805,6 +872,7 @@ struct ipr_hostrcb { | |||
805 | struct ipr_hcam hcam; | 872 | struct ipr_hcam hcam; |
806 | dma_addr_t hostrcb_dma; | 873 | dma_addr_t hostrcb_dma; |
807 | struct list_head queue; | 874 | struct list_head queue; |
875 | struct ipr_ioa_cfg *ioa_cfg; | ||
808 | }; | 876 | }; |
809 | 877 | ||
810 | /* IPR smart dump table structures */ | 878 | /* IPR smart dump table structures */ |
@@ -1283,6 +1351,17 @@ struct ipr_ucode_image_header { | |||
1283 | } \ | 1351 | } \ |
1284 | } | 1352 | } |
1285 | 1353 | ||
1354 | #define ipr_hcam_err(hostrcb, fmt, ...) \ | ||
1355 | { \ | ||
1356 | if (ipr_is_device(&(hostrcb)->hcam.u.error.failing_dev_res_addr)) { \ | ||
1357 | ipr_ra_err((hostrcb)->ioa_cfg, \ | ||
1358 | (hostrcb)->hcam.u.error.failing_dev_res_addr, \ | ||
1359 | fmt, ##__VA_ARGS__); \ | ||
1360 | } else { \ | ||
1361 | dev_err(&(hostrcb)->ioa_cfg->pdev->dev, fmt, ##__VA_ARGS__); \ | ||
1362 | } \ | ||
1363 | } | ||
1364 | |||
1286 | #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\ | 1365 | #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\ |
1287 | __FILE__, __FUNCTION__, __LINE__) | 1366 | __FILE__, __FUNCTION__, __LINE__) |
1288 | 1367 | ||