diff options
Diffstat (limited to 'drivers/scsi/ipr.h')
| -rw-r--r-- | drivers/scsi/ipr.h | 243 |
1 files changed, 172 insertions, 71 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index 8cf967108500..6bec673c925c 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
| @@ -36,23 +36,8 @@ | |||
| 36 | /* | 36 | /* |
| 37 | * Literals | 37 | * Literals |
| 38 | */ | 38 | */ |
| 39 | #define IPR_DRIVER_VERSION "2.0.14" | 39 | #define IPR_DRIVER_VERSION "2.1.0" |
| 40 | #define IPR_DRIVER_DATE "(May 2, 2005)" | 40 | #define IPR_DRIVER_DATE "(October 31, 2005)" |
| 41 | |||
| 42 | /* | ||
| 43 | * IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing | ||
| 44 | * resulting in a bunch of extra debugging printks to the console | ||
| 45 | * | ||
| 46 | * IPR_DEBUG: Setting this to 1 will turn on some error path tracing. | ||
| 47 | * Enables the ipr_trace macro. | ||
| 48 | */ | ||
| 49 | #ifdef IPR_DEBUG_ALL | ||
| 50 | #define IPR_DEBUG 1 | ||
| 51 | #define IPR_DBG_TRACE 1 | ||
| 52 | #else | ||
| 53 | #define IPR_DEBUG 0 | ||
| 54 | #define IPR_DBG_TRACE 0 | ||
| 55 | #endif | ||
| 56 | 41 | ||
| 57 | /* | 42 | /* |
| 58 | * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding | 43 | * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding |
| @@ -76,6 +61,10 @@ | |||
| 76 | #define IPR_SUBS_DEV_ID_571A 0x02C0 | 61 | #define IPR_SUBS_DEV_ID_571A 0x02C0 |
| 77 | #define IPR_SUBS_DEV_ID_571B 0x02BE | 62 | #define IPR_SUBS_DEV_ID_571B 0x02BE |
| 78 | #define IPR_SUBS_DEV_ID_571E 0x02BF | 63 | #define IPR_SUBS_DEV_ID_571E 0x02BF |
| 64 | #define IPR_SUBS_DEV_ID_571F 0x02D5 | ||
| 65 | #define IPR_SUBS_DEV_ID_572A 0x02C1 | ||
| 66 | #define IPR_SUBS_DEV_ID_572B 0x02C2 | ||
| 67 | #define IPR_SUBS_DEV_ID_575B 0x030D | ||
| 79 | 68 | ||
| 80 | #define IPR_NAME "ipr" | 69 | #define IPR_NAME "ipr" |
| 81 | 70 | ||
| @@ -95,7 +84,10 @@ | |||
| 95 | #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500 | 84 | #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500 |
| 96 | #define IPR_IOASC_IOASC_MASK 0xFFFFFF00 | 85 | #define IPR_IOASC_IOASC_MASK 0xFFFFFF00 |
| 97 | #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF | 86 | #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF |
| 87 | #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT 0x05240000 | ||
| 98 | #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000 | 88 | #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000 |
| 89 | #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA 0x05258100 | ||
| 90 | #define IPR_IOASA_IR_DUAL_IOA_DISABLED 0x052C8000 | ||
| 99 | #define IPR_IOASC_BUS_WAS_RESET 0x06290000 | 91 | #define IPR_IOASC_BUS_WAS_RESET 0x06290000 |
| 100 | #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000 | 92 | #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000 |
| 101 | #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000 | 93 | #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000 |
| @@ -107,14 +99,14 @@ | |||
| 107 | #define IPR_NUM_LOG_HCAMS 2 | 99 | #define IPR_NUM_LOG_HCAMS 2 |
| 108 | #define IPR_NUM_CFG_CHG_HCAMS 2 | 100 | #define IPR_NUM_CFG_CHG_HCAMS 2 |
| 109 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) | 101 | #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS) |
| 110 | #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10 | 102 | #define IPR_MAX_NUM_TARGETS_PER_BUS 256 |
| 111 | #define IPR_MAX_NUM_LUNS_PER_TARGET 256 | 103 | #define IPR_MAX_NUM_LUNS_PER_TARGET 256 |
| 112 | #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8 | 104 | #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8 |
| 113 | #define IPR_VSET_BUS 0xff | 105 | #define IPR_VSET_BUS 0xff |
| 114 | #define IPR_IOA_BUS 0xff | 106 | #define IPR_IOA_BUS 0xff |
| 115 | #define IPR_IOA_TARGET 0xff | 107 | #define IPR_IOA_TARGET 0xff |
| 116 | #define IPR_IOA_LUN 0xff | 108 | #define IPR_IOA_LUN 0xff |
| 117 | #define IPR_MAX_NUM_BUSES 4 | 109 | #define IPR_MAX_NUM_BUSES 8 |
| 118 | #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES | 110 | #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES |
| 119 | 111 | ||
| 120 | #define IPR_NUM_RESET_RELOAD_RETRIES 3 | 112 | #define IPR_NUM_RESET_RELOAD_RETRIES 3 |
| @@ -205,6 +197,7 @@ | |||
| 205 | #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8 | 197 | #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8 |
| 206 | #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2 | 198 | #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2 |
| 207 | #define IPR_DOORBELL 0x82800000 | 199 | #define IPR_DOORBELL 0x82800000 |
| 200 | #define IPR_RUNTIME_RESET 0x40000000 | ||
| 208 | 201 | ||
| 209 | #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0) | 202 | #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0) |
| 210 | #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3) | 203 | #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3) |
| @@ -261,6 +254,16 @@ struct ipr_std_inq_vpids { | |||
| 261 | u8 product_id[IPR_PROD_ID_LEN]; | 254 | u8 product_id[IPR_PROD_ID_LEN]; |
| 262 | }__attribute__((packed)); | 255 | }__attribute__((packed)); |
| 263 | 256 | ||
| 257 | struct ipr_vpd { | ||
| 258 | struct ipr_std_inq_vpids vpids; | ||
| 259 | u8 sn[IPR_SERIAL_NUM_LEN]; | ||
| 260 | }__attribute__((packed)); | ||
| 261 | |||
| 262 | struct ipr_ext_vpd { | ||
| 263 | struct ipr_vpd vpd; | ||
| 264 | __be32 wwid[2]; | ||
| 265 | }__attribute__((packed)); | ||
| 266 | |||
| 264 | struct ipr_std_inq_data { | 267 | struct ipr_std_inq_data { |
| 265 | u8 peri_qual_dev_type; | 268 | u8 peri_qual_dev_type; |
| 266 | #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5) | 269 | #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5) |
| @@ -304,6 +307,10 @@ struct ipr_config_table_entry { | |||
| 304 | #define IPR_SUBTYPE_GENERIC_SCSI 1 | 307 | #define IPR_SUBTYPE_GENERIC_SCSI 1 |
| 305 | #define IPR_SUBTYPE_VOLUME_SET 2 | 308 | #define IPR_SUBTYPE_VOLUME_SET 2 |
| 306 | 309 | ||
| 310 | #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4) | ||
| 311 | #define IPR_QUEUE_FROZEN_MODEL 0 | ||
| 312 | #define IPR_QUEUE_NACA_MODEL 1 | ||
| 313 | |||
| 307 | struct ipr_res_addr res_addr; | 314 | struct ipr_res_addr res_addr; |
| 308 | __be32 res_handle; | 315 | __be32 res_handle; |
| 309 | __be32 reserved4[2]; | 316 | __be32 reserved4[2]; |
| @@ -410,23 +417,26 @@ struct ipr_ioadl_desc { | |||
| 410 | struct ipr_ioasa_vset { | 417 | struct ipr_ioasa_vset { |
| 411 | __be32 failing_lba_hi; | 418 | __be32 failing_lba_hi; |
| 412 | __be32 failing_lba_lo; | 419 | __be32 failing_lba_lo; |
| 413 | __be32 ioa_data[22]; | 420 | __be32 reserved; |
| 414 | }__attribute__((packed, aligned (4))); | 421 | }__attribute__((packed, aligned (4))); |
| 415 | 422 | ||
| 416 | struct ipr_ioasa_af_dasd { | 423 | struct ipr_ioasa_af_dasd { |
| 417 | __be32 failing_lba; | 424 | __be32 failing_lba; |
| 425 | __be32 reserved[2]; | ||
| 418 | }__attribute__((packed, aligned (4))); | 426 | }__attribute__((packed, aligned (4))); |
| 419 | 427 | ||
| 420 | struct ipr_ioasa_gpdd { | 428 | struct ipr_ioasa_gpdd { |
| 421 | u8 end_state; | 429 | u8 end_state; |
| 422 | u8 bus_phase; | 430 | u8 bus_phase; |
| 423 | __be16 reserved; | 431 | __be16 reserved; |
| 424 | __be32 ioa_data[23]; | 432 | __be32 ioa_data[2]; |
| 425 | }__attribute__((packed, aligned (4))); | 433 | }__attribute__((packed, aligned (4))); |
| 426 | 434 | ||
| 427 | struct ipr_ioasa_raw { | 435 | struct ipr_auto_sense { |
| 428 | __be32 ioa_data[24]; | 436 | __be16 auto_sense_len; |
| 429 | }__attribute__((packed, aligned (4))); | 437 | __be16 ioa_data_len; |
| 438 | __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)]; | ||
| 439 | }; | ||
| 430 | 440 | ||
| 431 | struct ipr_ioasa { | 441 | struct ipr_ioasa { |
| 432 | __be32 ioasc; | 442 | __be32 ioasc; |
| @@ -453,6 +463,8 @@ struct ipr_ioasa { | |||
| 453 | __be32 fd_res_handle; | 463 | __be32 fd_res_handle; |
| 454 | 464 | ||
| 455 | __be32 ioasc_specific; /* status code specific field */ | 465 | __be32 ioasc_specific; /* status code specific field */ |
| 466 | #define IPR_ADDITIONAL_STATUS_FMT 0x80000000 | ||
| 467 | #define IPR_AUTOSENSE_VALID 0x40000000 | ||
| 456 | #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff | 468 | #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff |
| 457 | #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8) | 469 | #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8) |
| 458 | #define IPR_FIELD_POINTER_MASK 0x0000ffff | 470 | #define IPR_FIELD_POINTER_MASK 0x0000ffff |
| @@ -461,8 +473,9 @@ struct ipr_ioasa { | |||
| 461 | struct ipr_ioasa_vset vset; | 473 | struct ipr_ioasa_vset vset; |
| 462 | struct ipr_ioasa_af_dasd dasd; | 474 | struct ipr_ioasa_af_dasd dasd; |
| 463 | struct ipr_ioasa_gpdd gpdd; | 475 | struct ipr_ioasa_gpdd gpdd; |
| 464 | struct ipr_ioasa_raw raw; | ||
| 465 | } u; | 476 | } u; |
| 477 | |||
| 478 | struct ipr_auto_sense auto_sense; | ||
| 466 | }__attribute__((packed, aligned (4))); | 479 | }__attribute__((packed, aligned (4))); |
| 467 | 480 | ||
| 468 | struct ipr_mode_parm_hdr { | 481 | struct ipr_mode_parm_hdr { |
| @@ -536,28 +549,49 @@ struct ipr_inquiry_page3 { | |||
| 536 | u8 patch_number[4]; | 549 | u8 patch_number[4]; |
| 537 | }__attribute__((packed)); | 550 | }__attribute__((packed)); |
| 538 | 551 | ||
| 552 | #define IPR_INQUIRY_PAGE0_ENTRIES 20 | ||
| 553 | struct ipr_inquiry_page0 { | ||
| 554 | u8 peri_qual_dev_type; | ||
| 555 | u8 page_code; | ||
| 556 | u8 reserved1; | ||
| 557 | u8 len; | ||
| 558 | u8 page[IPR_INQUIRY_PAGE0_ENTRIES]; | ||
| 559 | }__attribute__((packed)); | ||
| 560 | |||
| 539 | struct ipr_hostrcb_device_data_entry { | 561 | struct ipr_hostrcb_device_data_entry { |
| 540 | struct ipr_std_inq_vpids dev_vpids; | 562 | struct ipr_vpd vpd; |
| 541 | u8 dev_sn[IPR_SERIAL_NUM_LEN]; | ||
| 542 | struct ipr_res_addr dev_res_addr; | 563 | struct ipr_res_addr dev_res_addr; |
| 543 | struct ipr_std_inq_vpids new_dev_vpids; | 564 | struct ipr_vpd new_vpd; |
| 544 | u8 new_dev_sn[IPR_SERIAL_NUM_LEN]; | 565 | struct ipr_vpd ioa_last_with_dev_vpd; |
| 545 | struct ipr_std_inq_vpids ioa_last_with_dev_vpids; | 566 | struct ipr_vpd cfc_last_with_dev_vpd; |
| 546 | u8 ioa_last_with_dev_sn[IPR_SERIAL_NUM_LEN]; | ||
| 547 | struct ipr_std_inq_vpids cfc_last_with_dev_vpids; | ||
| 548 | u8 cfc_last_with_dev_sn[IPR_SERIAL_NUM_LEN]; | ||
| 549 | __be32 ioa_data[5]; | 567 | __be32 ioa_data[5]; |
| 550 | }__attribute__((packed, aligned (4))); | 568 | }__attribute__((packed, aligned (4))); |
| 551 | 569 | ||
| 570 | struct ipr_hostrcb_device_data_entry_enhanced { | ||
| 571 | struct ipr_ext_vpd vpd; | ||
| 572 | u8 ccin[4]; | ||
| 573 | struct ipr_res_addr dev_res_addr; | ||
| 574 | struct ipr_ext_vpd new_vpd; | ||
| 575 | u8 new_ccin[4]; | ||
| 576 | struct ipr_ext_vpd ioa_last_with_dev_vpd; | ||
| 577 | struct ipr_ext_vpd cfc_last_with_dev_vpd; | ||
| 578 | }__attribute__((packed, aligned (4))); | ||
| 579 | |||
| 552 | struct ipr_hostrcb_array_data_entry { | 580 | struct ipr_hostrcb_array_data_entry { |
| 553 | struct ipr_std_inq_vpids vpids; | 581 | struct ipr_vpd vpd; |
| 554 | u8 serial_num[IPR_SERIAL_NUM_LEN]; | 582 | struct ipr_res_addr expected_dev_res_addr; |
| 583 | struct ipr_res_addr dev_res_addr; | ||
| 584 | }__attribute__((packed, aligned (4))); | ||
| 585 | |||
| 586 | struct ipr_hostrcb_array_data_entry_enhanced { | ||
| 587 | struct ipr_ext_vpd vpd; | ||
| 588 | u8 ccin[4]; | ||
| 555 | struct ipr_res_addr expected_dev_res_addr; | 589 | struct ipr_res_addr expected_dev_res_addr; |
| 556 | struct ipr_res_addr dev_res_addr; | 590 | struct ipr_res_addr dev_res_addr; |
| 557 | }__attribute__((packed, aligned (4))); | 591 | }__attribute__((packed, aligned (4))); |
| 558 | 592 | ||
| 559 | struct ipr_hostrcb_type_ff_error { | 593 | struct ipr_hostrcb_type_ff_error { |
| 560 | __be32 ioa_data[246]; | 594 | __be32 ioa_data[502]; |
| 561 | }__attribute__((packed, aligned (4))); | 595 | }__attribute__((packed, aligned (4))); |
| 562 | 596 | ||
| 563 | struct ipr_hostrcb_type_01_error { | 597 | struct ipr_hostrcb_type_01_error { |
| @@ -568,47 +602,75 @@ struct ipr_hostrcb_type_01_error { | |||
| 568 | }__attribute__((packed, aligned (4))); | 602 | }__attribute__((packed, aligned (4))); |
| 569 | 603 | ||
| 570 | struct ipr_hostrcb_type_02_error { | 604 | struct ipr_hostrcb_type_02_error { |
| 571 | struct ipr_std_inq_vpids ioa_vpids; | 605 | struct ipr_vpd ioa_vpd; |
| 572 | u8 ioa_sn[IPR_SERIAL_NUM_LEN]; | 606 | struct ipr_vpd cfc_vpd; |
| 573 | struct ipr_std_inq_vpids cfc_vpids; | 607 | struct ipr_vpd ioa_last_attached_to_cfc_vpd; |
| 574 | u8 cfc_sn[IPR_SERIAL_NUM_LEN]; | 608 | struct ipr_vpd cfc_last_attached_to_ioa_vpd; |
| 575 | struct ipr_std_inq_vpids ioa_last_attached_to_cfc_vpids; | 609 | __be32 ioa_data[3]; |
| 576 | u8 ioa_last_attached_to_cfc_sn[IPR_SERIAL_NUM_LEN]; | 610 | }__attribute__((packed, aligned (4))); |
| 577 | struct ipr_std_inq_vpids cfc_last_attached_to_ioa_vpids; | 611 | |
| 578 | u8 cfc_last_attached_to_ioa_sn[IPR_SERIAL_NUM_LEN]; | 612 | struct ipr_hostrcb_type_12_error { |
| 613 | struct ipr_ext_vpd ioa_vpd; | ||
| 614 | struct ipr_ext_vpd cfc_vpd; | ||
| 615 | struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd; | ||
| 616 | struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd; | ||
| 579 | __be32 ioa_data[3]; | 617 | __be32 ioa_data[3]; |
| 580 | u8 reserved[844]; | ||
| 581 | }__attribute__((packed, aligned (4))); | 618 | }__attribute__((packed, aligned (4))); |
| 582 | 619 | ||
| 583 | struct ipr_hostrcb_type_03_error { | 620 | struct ipr_hostrcb_type_03_error { |
| 584 | struct ipr_std_inq_vpids ioa_vpids; | 621 | struct ipr_vpd ioa_vpd; |
| 585 | u8 ioa_sn[IPR_SERIAL_NUM_LEN]; | 622 | struct ipr_vpd cfc_vpd; |
| 586 | struct ipr_std_inq_vpids cfc_vpids; | ||
| 587 | u8 cfc_sn[IPR_SERIAL_NUM_LEN]; | ||
| 588 | __be32 errors_detected; | 623 | __be32 errors_detected; |
| 589 | __be32 errors_logged; | 624 | __be32 errors_logged; |
| 590 | u8 ioa_data[12]; | 625 | u8 ioa_data[12]; |
| 591 | struct ipr_hostrcb_device_data_entry dev_entry[3]; | 626 | struct ipr_hostrcb_device_data_entry dev[3]; |
| 592 | u8 reserved[444]; | 627 | }__attribute__((packed, aligned (4))); |
| 628 | |||
| 629 | struct ipr_hostrcb_type_13_error { | ||
| 630 | struct ipr_ext_vpd ioa_vpd; | ||
| 631 | struct ipr_ext_vpd cfc_vpd; | ||
| 632 | __be32 errors_detected; | ||
| 633 | __be32 errors_logged; | ||
| 634 | struct ipr_hostrcb_device_data_entry_enhanced dev[3]; | ||
| 593 | }__attribute__((packed, aligned (4))); | 635 | }__attribute__((packed, aligned (4))); |
| 594 | 636 | ||
| 595 | struct ipr_hostrcb_type_04_error { | 637 | struct ipr_hostrcb_type_04_error { |
| 596 | struct ipr_std_inq_vpids ioa_vpids; | 638 | struct ipr_vpd ioa_vpd; |
| 597 | u8 ioa_sn[IPR_SERIAL_NUM_LEN]; | 639 | struct ipr_vpd cfc_vpd; |
| 598 | struct ipr_std_inq_vpids cfc_vpids; | ||
| 599 | u8 cfc_sn[IPR_SERIAL_NUM_LEN]; | ||
| 600 | u8 ioa_data[12]; | 640 | u8 ioa_data[12]; |
| 601 | struct ipr_hostrcb_array_data_entry array_member[10]; | 641 | struct ipr_hostrcb_array_data_entry array_member[10]; |
| 602 | __be32 exposed_mode_adn; | 642 | __be32 exposed_mode_adn; |
| 603 | __be32 array_id; | 643 | __be32 array_id; |
| 604 | struct ipr_std_inq_vpids incomp_dev_vpids; | 644 | struct ipr_vpd incomp_dev_vpd; |
| 605 | u8 incomp_dev_sn[IPR_SERIAL_NUM_LEN]; | ||
| 606 | __be32 ioa_data2; | 645 | __be32 ioa_data2; |
| 607 | struct ipr_hostrcb_array_data_entry array_member2[8]; | 646 | struct ipr_hostrcb_array_data_entry array_member2[8]; |
| 608 | struct ipr_res_addr last_func_vset_res_addr; | 647 | struct ipr_res_addr last_func_vset_res_addr; |
| 609 | u8 vset_serial_num[IPR_SERIAL_NUM_LEN]; | 648 | u8 vset_serial_num[IPR_SERIAL_NUM_LEN]; |
| 610 | u8 protection_level[8]; | 649 | u8 protection_level[8]; |
| 611 | u8 reserved[124]; | 650 | }__attribute__((packed, aligned (4))); |
| 651 | |||
| 652 | struct ipr_hostrcb_type_14_error { | ||
| 653 | struct ipr_ext_vpd ioa_vpd; | ||
| 654 | struct ipr_ext_vpd cfc_vpd; | ||
| 655 | __be32 exposed_mode_adn; | ||
| 656 | __be32 array_id; | ||
| 657 | struct ipr_res_addr last_func_vset_res_addr; | ||
| 658 | u8 vset_serial_num[IPR_SERIAL_NUM_LEN]; | ||
| 659 | u8 protection_level[8]; | ||
| 660 | __be32 num_entries; | ||
| 661 | struct ipr_hostrcb_array_data_entry_enhanced array_member[18]; | ||
| 662 | }__attribute__((packed, aligned (4))); | ||
| 663 | |||
| 664 | struct ipr_hostrcb_type_07_error { | ||
| 665 | u8 failure_reason[64]; | ||
| 666 | struct ipr_vpd vpd; | ||
| 667 | u32 data[222]; | ||
| 668 | }__attribute__((packed, aligned (4))); | ||
| 669 | |||
| 670 | struct ipr_hostrcb_type_17_error { | ||
| 671 | u8 failure_reason[64]; | ||
| 672 | struct ipr_ext_vpd vpd; | ||
| 673 | u32 data[476]; | ||
| 612 | }__attribute__((packed, aligned (4))); | 674 | }__attribute__((packed, aligned (4))); |
| 613 | 675 | ||
| 614 | struct ipr_hostrcb_error { | 676 | struct ipr_hostrcb_error { |
| @@ -622,6 +684,11 @@ struct ipr_hostrcb_error { | |||
| 622 | struct ipr_hostrcb_type_02_error type_02_error; | 684 | struct ipr_hostrcb_type_02_error type_02_error; |
| 623 | struct ipr_hostrcb_type_03_error type_03_error; | 685 | struct ipr_hostrcb_type_03_error type_03_error; |
| 624 | struct ipr_hostrcb_type_04_error type_04_error; | 686 | struct ipr_hostrcb_type_04_error type_04_error; |
| 687 | struct ipr_hostrcb_type_07_error type_07_error; | ||
| 688 | struct ipr_hostrcb_type_12_error type_12_error; | ||
| 689 | struct ipr_hostrcb_type_13_error type_13_error; | ||
| 690 | struct ipr_hostrcb_type_14_error type_14_error; | ||
| 691 | struct ipr_hostrcb_type_17_error type_17_error; | ||
| 625 | } u; | 692 | } u; |
| 626 | }__attribute__((packed, aligned (4))); | 693 | }__attribute__((packed, aligned (4))); |
| 627 | 694 | ||
| @@ -655,6 +722,12 @@ struct ipr_hcam { | |||
| 655 | #define IPR_HOST_RCB_OVERLAY_ID_3 0x03 | 722 | #define IPR_HOST_RCB_OVERLAY_ID_3 0x03 |
| 656 | #define IPR_HOST_RCB_OVERLAY_ID_4 0x04 | 723 | #define IPR_HOST_RCB_OVERLAY_ID_4 0x04 |
| 657 | #define IPR_HOST_RCB_OVERLAY_ID_6 0x06 | 724 | #define IPR_HOST_RCB_OVERLAY_ID_6 0x06 |
| 725 | #define IPR_HOST_RCB_OVERLAY_ID_7 0x07 | ||
| 726 | #define IPR_HOST_RCB_OVERLAY_ID_12 0x12 | ||
| 727 | #define IPR_HOST_RCB_OVERLAY_ID_13 0x13 | ||
| 728 | #define IPR_HOST_RCB_OVERLAY_ID_14 0x14 | ||
| 729 | #define IPR_HOST_RCB_OVERLAY_ID_16 0x16 | ||
| 730 | #define IPR_HOST_RCB_OVERLAY_ID_17 0x17 | ||
| 658 | #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF | 731 | #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF |
| 659 | 732 | ||
| 660 | u8 reserved1[3]; | 733 | u8 reserved1[3]; |
| @@ -743,6 +816,7 @@ struct ipr_resource_table { | |||
| 743 | 816 | ||
| 744 | struct ipr_misc_cbs { | 817 | struct ipr_misc_cbs { |
| 745 | struct ipr_ioa_vpd ioa_vpd; | 818 | struct ipr_ioa_vpd ioa_vpd; |
| 819 | struct ipr_inquiry_page0 page0_data; | ||
| 746 | struct ipr_inquiry_page3 page3_data; | 820 | struct ipr_inquiry_page3 page3_data; |
| 747 | struct ipr_mode_pages mode_pages; | 821 | struct ipr_mode_pages mode_pages; |
| 748 | struct ipr_supported_device supp_dev; | 822 | struct ipr_supported_device supp_dev; |
| @@ -813,6 +887,7 @@ struct ipr_trace_entry { | |||
| 813 | struct ipr_sglist { | 887 | struct ipr_sglist { |
| 814 | u32 order; | 888 | u32 order; |
| 815 | u32 num_sg; | 889 | u32 num_sg; |
| 890 | u32 num_dma_sg; | ||
| 816 | u32 buffer_len; | 891 | u32 buffer_len; |
| 817 | struct scatterlist scatterlist[1]; | 892 | struct scatterlist scatterlist[1]; |
| 818 | }; | 893 | }; |
| @@ -825,6 +900,13 @@ enum ipr_sdt_state { | |||
| 825 | DUMP_OBTAINED | 900 | DUMP_OBTAINED |
| 826 | }; | 901 | }; |
| 827 | 902 | ||
| 903 | enum ipr_cache_state { | ||
| 904 | CACHE_NONE, | ||
| 905 | CACHE_DISABLED, | ||
| 906 | CACHE_ENABLED, | ||
| 907 | CACHE_INVALID | ||
| 908 | }; | ||
| 909 | |||
| 828 | /* Per-controller data */ | 910 | /* Per-controller data */ |
| 829 | struct ipr_ioa_cfg { | 911 | struct ipr_ioa_cfg { |
| 830 | char eye_catcher[8]; | 912 | char eye_catcher[8]; |
| @@ -841,6 +923,7 @@ struct ipr_ioa_cfg { | |||
| 841 | u8 allow_cmds:1; | 923 | u8 allow_cmds:1; |
| 842 | u8 allow_ml_add_del:1; | 924 | u8 allow_ml_add_del:1; |
| 843 | 925 | ||
| 926 | enum ipr_cache_state cache_state; | ||
| 844 | u16 type; /* CCIN of the card */ | 927 | u16 type; /* CCIN of the card */ |
| 845 | 928 | ||
| 846 | u8 log_level; | 929 | u8 log_level; |
| @@ -911,6 +994,7 @@ struct ipr_ioa_cfg { | |||
| 911 | u16 reset_retries; | 994 | u16 reset_retries; |
| 912 | 995 | ||
| 913 | u32 errors_logged; | 996 | u32 errors_logged; |
| 997 | u32 doorbell; | ||
| 914 | 998 | ||
| 915 | struct Scsi_Host *host; | 999 | struct Scsi_Host *host; |
| 916 | struct pci_dev *pdev; | 1000 | struct pci_dev *pdev; |
| @@ -948,6 +1032,7 @@ struct ipr_cmnd { | |||
| 948 | struct timer_list timer; | 1032 | struct timer_list timer; |
| 949 | void (*done) (struct ipr_cmnd *); | 1033 | void (*done) (struct ipr_cmnd *); |
| 950 | int (*job_step) (struct ipr_cmnd *); | 1034 | int (*job_step) (struct ipr_cmnd *); |
| 1035 | int (*job_step_failed) (struct ipr_cmnd *); | ||
| 951 | u16 cmd_index; | 1036 | u16 cmd_index; |
| 952 | u8 sense_buffer[SCSI_SENSE_BUFFERSIZE]; | 1037 | u8 sense_buffer[SCSI_SENSE_BUFFERSIZE]; |
| 953 | dma_addr_t sense_buffer_dma; | 1038 | dma_addr_t sense_buffer_dma; |
| @@ -1083,11 +1168,7 @@ struct ipr_ucode_image_header { | |||
| 1083 | /* | 1168 | /* |
| 1084 | * Macros | 1169 | * Macros |
| 1085 | */ | 1170 | */ |
| 1086 | #if IPR_DEBUG | 1171 | #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; } |
| 1087 | #define IPR_DBG_CMD(CMD) do { CMD; } while (0) | ||
| 1088 | #else | ||
| 1089 | #define IPR_DBG_CMD(CMD) | ||
| 1090 | #endif | ||
| 1091 | 1172 | ||
| 1092 | #ifdef CONFIG_SCSI_IPR_TRACE | 1173 | #ifdef CONFIG_SCSI_IPR_TRACE |
| 1093 | #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr) | 1174 | #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr) |
| @@ -1135,16 +1216,22 @@ struct ipr_ucode_image_header { | |||
| 1135 | #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \ | 1216 | #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \ |
| 1136 | IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__)) | 1217 | IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__)) |
| 1137 | 1218 | ||
| 1219 | #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \ | ||
| 1220 | { \ | ||
| 1221 | if ((res).bus >= IPR_MAX_NUM_BUSES) { \ | ||
| 1222 | ipr_err(fmt": unknown\n", ##__VA_ARGS__); \ | ||
| 1223 | } else { \ | ||
| 1224 | ipr_err(fmt": %d:%d:%d:%d\n", \ | ||
| 1225 | ##__VA_ARGS__, (ioa_cfg)->host->host_no, \ | ||
| 1226 | (res).bus, (res).target, (res).lun); \ | ||
| 1227 | } \ | ||
| 1228 | } | ||
| 1229 | |||
| 1138 | #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\ | 1230 | #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\ |
| 1139 | __FILE__, __FUNCTION__, __LINE__) | 1231 | __FILE__, __FUNCTION__, __LINE__) |
| 1140 | 1232 | ||
| 1141 | #if IPR_DBG_TRACE | 1233 | #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__)) |
| 1142 | #define ENTER printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__) | 1234 | #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__)) |
| 1143 | #define LEAVE printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__) | ||
| 1144 | #else | ||
| 1145 | #define ENTER | ||
| 1146 | #define LEAVE | ||
| 1147 | #endif | ||
| 1148 | 1235 | ||
| 1149 | #define ipr_err_separator \ | 1236 | #define ipr_err_separator \ |
| 1150 | ipr_err("----------------------------------------------------------\n") | 1237 | ipr_err("----------------------------------------------------------\n") |
| @@ -1217,6 +1304,20 @@ static inline int ipr_is_gscsi(struct ipr_resource_entry *res) | |||
| 1217 | } | 1304 | } |
| 1218 | 1305 | ||
| 1219 | /** | 1306 | /** |
| 1307 | * ipr_is_naca_model - Determine if a resource is using NACA queueing model | ||
| 1308 | * @res: resource entry struct | ||
| 1309 | * | ||
| 1310 | * Return value: | ||
| 1311 | * 1 if NACA queueing model / 0 if not NACA queueing model | ||
| 1312 | **/ | ||
| 1313 | static inline int ipr_is_naca_model(struct ipr_resource_entry *res) | ||
| 1314 | { | ||
| 1315 | if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL) | ||
| 1316 | return 1; | ||
| 1317 | return 0; | ||
| 1318 | } | ||
| 1319 | |||
| 1320 | /** | ||
| 1220 | * ipr_is_device - Determine if resource address is that of a device | 1321 | * ipr_is_device - Determine if resource address is that of a device |
| 1221 | * @res_addr: resource address struct | 1322 | * @res_addr: resource address struct |
| 1222 | * | 1323 | * |
| @@ -1226,7 +1327,7 @@ static inline int ipr_is_gscsi(struct ipr_resource_entry *res) | |||
| 1226 | static inline int ipr_is_device(struct ipr_res_addr *res_addr) | 1327 | static inline int ipr_is_device(struct ipr_res_addr *res_addr) |
| 1227 | { | 1328 | { |
| 1228 | if ((res_addr->bus < IPR_MAX_NUM_BUSES) && | 1329 | if ((res_addr->bus < IPR_MAX_NUM_BUSES) && |
| 1229 | (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS)) | 1330 | (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1))) |
| 1230 | return 1; | 1331 | return 1; |
| 1231 | 1332 | ||
| 1232 | return 0; | 1333 | return 0; |
