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Diffstat (limited to 'drivers/scsi/ipr.h')
-rw-r--r--drivers/scsi/ipr.h33
1 files changed, 31 insertions, 2 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index bc53d7cebe0a..d93156671e93 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -37,8 +37,8 @@
37/* 37/*
38 * Literals 38 * Literals
39 */ 39 */
40#define IPR_DRIVER_VERSION "2.3.2" 40#define IPR_DRIVER_VERSION "2.4.1"
41#define IPR_DRIVER_DATE "(March 23, 2007)" 41#define IPR_DRIVER_DATE "(April 24, 2007)"
42 42
43/* 43/*
44 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding 44 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
@@ -91,6 +91,7 @@
91 * IOASCs 91 * IOASCs
92 */ 92 */
93#define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200 93#define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
94#define IPR_IOASC_NR_IOA_RESET_REQUIRED 0x02048000
94#define IPR_IOASC_SYNC_REQUIRED 0x023f0000 95#define IPR_IOASC_SYNC_REQUIRED 0x023f0000
95#define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00 96#define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
96#define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000 97#define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
@@ -111,6 +112,7 @@
111 112
112/* Driver data flags */ 113/* Driver data flags */
113#define IPR_USE_LONG_TRANSOP_TIMEOUT 0x00000001 114#define IPR_USE_LONG_TRANSOP_TIMEOUT 0x00000001
115#define IPR_USE_PCI_WARM_RESET 0x00000002
114 116
115#define IPR_DEFAULT_MAX_ERROR_DUMP 984 117#define IPR_DEFAULT_MAX_ERROR_DUMP 984
116#define IPR_NUM_LOG_HCAMS 2 118#define IPR_NUM_LOG_HCAMS 2
@@ -179,6 +181,7 @@
179#define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ) 181#define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
180#define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ) 182#define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
181#define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ) 183#define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
184#define IPR_DUAL_IOA_ABBR_SHUTDOWN_TO (2 * 60 * HZ)
182#define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 185#define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
183#define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 186#define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
184#define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ) 187#define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
@@ -191,6 +194,7 @@
191#define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ) 194#define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
192#define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10) 195#define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
193#define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ) 196#define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
197#define IPR_PCI_RESET_TIMEOUT (HZ / 2)
194#define IPR_DUMP_TIMEOUT (15 * HZ) 198#define IPR_DUMP_TIMEOUT (15 * HZ)
195 199
196/* 200/*
@@ -602,6 +606,12 @@ struct ipr_mode_page28 {
602 struct ipr_dev_bus_entry bus[0]; 606 struct ipr_dev_bus_entry bus[0];
603}__attribute__((packed)); 607}__attribute__((packed));
604 608
609struct ipr_mode_page24 {
610 struct ipr_mode_page_hdr hdr;
611 u8 flags;
612#define IPR_ENABLE_DUAL_IOA_AF 0x80
613}__attribute__((packed));
614
605struct ipr_ioa_vpd { 615struct ipr_ioa_vpd {
606 struct ipr_std_inq_data std_inq_data; 616 struct ipr_std_inq_data std_inq_data;
607 u8 ascii_part_num[12]; 617 u8 ascii_part_num[12];
@@ -624,6 +634,19 @@ struct ipr_inquiry_page3 {
624 u8 patch_number[4]; 634 u8 patch_number[4];
625}__attribute__((packed)); 635}__attribute__((packed));
626 636
637struct ipr_inquiry_cap {
638 u8 peri_qual_dev_type;
639 u8 page_code;
640 u8 reserved1;
641 u8 page_length;
642 u8 ascii_len;
643 u8 reserved2;
644 u8 sis_version[2];
645 u8 cap;
646#define IPR_CAP_DUAL_IOA_RAID 0x80
647 u8 reserved3[15];
648}__attribute__((packed));
649
627#define IPR_INQUIRY_PAGE0_ENTRIES 20 650#define IPR_INQUIRY_PAGE0_ENTRIES 20
628struct ipr_inquiry_page0 { 651struct ipr_inquiry_page0 {
629 u8 peri_qual_dev_type; 652 u8 peri_qual_dev_type;
@@ -962,6 +985,7 @@ struct ipr_misc_cbs {
962 struct ipr_ioa_vpd ioa_vpd; 985 struct ipr_ioa_vpd ioa_vpd;
963 struct ipr_inquiry_page0 page0_data; 986 struct ipr_inquiry_page0 page0_data;
964 struct ipr_inquiry_page3 page3_data; 987 struct ipr_inquiry_page3 page3_data;
988 struct ipr_inquiry_cap cap;
965 struct ipr_mode_pages mode_pages; 989 struct ipr_mode_pages mode_pages;
966 struct ipr_supported_device supp_dev; 990 struct ipr_supported_device supp_dev;
967}; 991};
@@ -1068,6 +1092,10 @@ struct ipr_ioa_cfg {
1068 u8 allow_cmds:1; 1092 u8 allow_cmds:1;
1069 u8 allow_ml_add_del:1; 1093 u8 allow_ml_add_del:1;
1070 u8 needs_hard_reset:1; 1094 u8 needs_hard_reset:1;
1095 u8 dual_raid:1;
1096 u8 needs_warm_reset:1;
1097
1098 u8 revid;
1071 1099
1072 enum ipr_cache_state cache_state; 1100 enum ipr_cache_state cache_state;
1073 u16 type; /* CCIN of the card */ 1101 u16 type; /* CCIN of the card */
@@ -1161,6 +1189,7 @@ struct ipr_ioa_cfg {
1161 struct pci_pool *ipr_cmd_pool; 1189 struct pci_pool *ipr_cmd_pool;
1162 1190
1163 struct ipr_cmnd *reset_cmd; 1191 struct ipr_cmnd *reset_cmd;
1192 int (*reset) (struct ipr_cmnd *);
1164 1193
1165 struct ata_host ata_host; 1194 struct ata_host ata_host;
1166 char ipr_cmd_label[8]; 1195 char ipr_cmd_label[8];