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Diffstat (limited to 'drivers/scsi/hpsa.h')
-rw-r--r--drivers/scsi/hpsa.h33
1 files changed, 10 insertions, 23 deletions
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 24472cec7de3..8e06d9e280ec 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -118,7 +118,7 @@ struct ctlr_info {
118 struct CfgTable __iomem *cfgtable; 118 struct CfgTable __iomem *cfgtable;
119 int interrupts_enabled; 119 int interrupts_enabled;
120 int max_commands; 120 int max_commands;
121 int commands_outstanding; 121 atomic_t commands_outstanding;
122# define PERF_MODE_INT 0 122# define PERF_MODE_INT 0
123# define DOORBELL_INT 1 123# define DOORBELL_INT 1
124# define SIMPLE_MODE_INT 2 124# define SIMPLE_MODE_INT 2
@@ -164,7 +164,7 @@ struct ctlr_info {
164 */ 164 */
165 u32 trans_support; 165 u32 trans_support;
166 u32 trans_offset; 166 u32 trans_offset;
167 struct TransTable_struct *transtable; 167 struct TransTable_struct __iomem *transtable;
168 unsigned long transMethod; 168 unsigned long transMethod;
169 169
170 /* cap concurrent passthrus at some reasonable maximum */ 170 /* cap concurrent passthrus at some reasonable maximum */
@@ -181,7 +181,7 @@ struct ctlr_info {
181 u32 *blockFetchTable; 181 u32 *blockFetchTable;
182 u32 *ioaccel1_blockFetchTable; 182 u32 *ioaccel1_blockFetchTable;
183 u32 *ioaccel2_blockFetchTable; 183 u32 *ioaccel2_blockFetchTable;
184 u32 *ioaccel2_bft2_regs; 184 u32 __iomem *ioaccel2_bft2_regs;
185 unsigned char *hba_inquiry_data; 185 unsigned char *hba_inquiry_data;
186 u32 driver_support; 186 u32 driver_support;
187 u32 fw_support; 187 u32 fw_support;
@@ -192,7 +192,7 @@ struct ctlr_info {
192 u64 last_heartbeat_timestamp; 192 u64 last_heartbeat_timestamp;
193 u32 heartbeat_sample_interval; 193 u32 heartbeat_sample_interval;
194 atomic_t firmware_flash_in_progress; 194 atomic_t firmware_flash_in_progress;
195 u32 *lockup_detected; 195 u32 __percpu *lockup_detected;
196 struct delayed_work monitor_ctlr_work; 196 struct delayed_work monitor_ctlr_work;
197 int remove_in_progress; 197 int remove_in_progress;
198 u32 fifo_recently_full; 198 u32 fifo_recently_full;
@@ -395,7 +395,7 @@ static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)
395static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q) 395static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)
396{ 396{
397 struct reply_queue_buffer *rq = &h->reply_queue[q]; 397 struct reply_queue_buffer *rq = &h->reply_queue[q];
398 unsigned long flags, register_value = FIFO_EMPTY; 398 unsigned long register_value = FIFO_EMPTY;
399 399
400 /* msi auto clears the interrupt pending bit. */ 400 /* msi auto clears the interrupt pending bit. */
401 if (!(h->msi_vector || h->msix_vector)) { 401 if (!(h->msi_vector || h->msix_vector)) {
@@ -413,9 +413,7 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)
413 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 413 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
414 register_value = rq->head[rq->current_entry]; 414 register_value = rq->head[rq->current_entry];
415 rq->current_entry++; 415 rq->current_entry++;
416 spin_lock_irqsave(&h->lock, flags); 416 atomic_dec(&h->commands_outstanding);
417 h->commands_outstanding--;
418 spin_unlock_irqrestore(&h->lock, flags);
419 } else { 417 } else {
420 register_value = FIFO_EMPTY; 418 register_value = FIFO_EMPTY;
421 } 419 }
@@ -433,11 +431,7 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)
433 */ 431 */
434static unsigned long SA5_fifo_full(struct ctlr_info *h) 432static unsigned long SA5_fifo_full(struct ctlr_info *h)
435{ 433{
436 if (h->commands_outstanding >= h->max_commands) 434 return atomic_read(&h->commands_outstanding) >= h->max_commands;
437 return 1;
438 else
439 return 0;
440
441} 435}
442/* 436/*
443 * returns value read from hardware. 437 * returns value read from hardware.
@@ -448,13 +442,9 @@ static unsigned long SA5_completed(struct ctlr_info *h,
448{ 442{
449 unsigned long register_value 443 unsigned long register_value
450 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET); 444 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
451 unsigned long flags;
452 445
453 if (register_value != FIFO_EMPTY) { 446 if (register_value != FIFO_EMPTY)
454 spin_lock_irqsave(&h->lock, flags); 447 atomic_dec(&h->commands_outstanding);
455 h->commands_outstanding--;
456 spin_unlock_irqrestore(&h->lock, flags);
457 }
458 448
459#ifdef HPSA_DEBUG 449#ifdef HPSA_DEBUG
460 if (register_value != FIFO_EMPTY) 450 if (register_value != FIFO_EMPTY)
@@ -510,7 +500,6 @@ static unsigned long SA5_ioaccel_mode1_completed(struct ctlr_info *h, u8 q)
510{ 500{
511 u64 register_value; 501 u64 register_value;
512 struct reply_queue_buffer *rq = &h->reply_queue[q]; 502 struct reply_queue_buffer *rq = &h->reply_queue[q];
513 unsigned long flags;
514 503
515 BUG_ON(q >= h->nreply_queues); 504 BUG_ON(q >= h->nreply_queues);
516 505
@@ -528,9 +517,7 @@ static unsigned long SA5_ioaccel_mode1_completed(struct ctlr_info *h, u8 q)
528 wmb(); 517 wmb();
529 writel((q << 24) | rq->current_entry, h->vaddr + 518 writel((q << 24) | rq->current_entry, h->vaddr +
530 IOACCEL_MODE1_CONSUMER_INDEX); 519 IOACCEL_MODE1_CONSUMER_INDEX);
531 spin_lock_irqsave(&h->lock, flags); 520 atomic_dec(&h->commands_outstanding);
532 h->commands_outstanding--;
533 spin_unlock_irqrestore(&h->lock, flags);
534 } 521 }
535 return (unsigned long) register_value; 522 return (unsigned long) register_value;
536} 523}