diff options
Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc_cb.c')
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc_cb.c | 124 |
1 files changed, 51 insertions, 73 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc_cb.c b/drivers/scsi/bfa/bfa_ioc_cb.c index 324bdde7ea2e..d7ac864d8539 100644 --- a/drivers/scsi/bfa/bfa_ioc_cb.c +++ b/drivers/scsi/bfa/bfa_ioc_cb.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2005-2009 Brocade Communications Systems, Inc. | 2 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. |
3 | * All rights reserved | 3 | * All rights reserved |
4 | * www.brocade.com | 4 | * www.brocade.com |
5 | * | 5 | * |
@@ -15,22 +15,15 @@ | |||
15 | * General Public License for more details. | 15 | * General Public License for more details. |
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <bfa.h> | 18 | #include "bfa_ioc.h" |
19 | #include <bfa_ioc.h> | 19 | #include "bfi_cbreg.h" |
20 | #include <bfa_fwimg_priv.h> | 20 | #include "bfa_defs.h" |
21 | #include <cna/bfa_cna_trcmod.h> | ||
22 | #include <cs/bfa_debug.h> | ||
23 | #include <bfi/bfi_ioc.h> | ||
24 | #include <bfi/bfi_cbreg.h> | ||
25 | #include <log/bfa_log_hal.h> | ||
26 | #include <defs/bfa_defs_pci.h> | ||
27 | 21 | ||
28 | BFA_TRC_FILE(CNA, IOC_CB); | 22 | BFA_TRC_FILE(CNA, IOC_CB); |
29 | 23 | ||
30 | /* | 24 | /* |
31 | * forward declarations | 25 | * forward declarations |
32 | */ | 26 | */ |
33 | static bfa_status_t bfa_ioc_cb_pll_init(struct bfa_ioc_s *ioc); | ||
34 | static bfa_boolean_t bfa_ioc_cb_firmware_lock(struct bfa_ioc_s *ioc); | 27 | static bfa_boolean_t bfa_ioc_cb_firmware_lock(struct bfa_ioc_s *ioc); |
35 | static void bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc); | 28 | static void bfa_ioc_cb_firmware_unlock(struct bfa_ioc_s *ioc); |
36 | static void bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc); | 29 | static void bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc); |
@@ -95,6 +88,7 @@ static struct { u32 hfn_mbox, lpu_mbox, hfn_pgn; } iocreg_fnreg[] = { | |||
95 | * Host <-> LPU mailbox command/status registers | 88 | * Host <-> LPU mailbox command/status registers |
96 | */ | 89 | */ |
97 | static struct { u32 hfn, lpu; } iocreg_mbcmd[] = { | 90 | static struct { u32 hfn, lpu; } iocreg_mbcmd[] = { |
91 | |||
98 | { HOSTFN0_LPU0_CMD_STAT, LPU0_HOSTFN0_CMD_STAT }, | 92 | { HOSTFN0_LPU0_CMD_STAT, LPU0_HOSTFN0_CMD_STAT }, |
99 | { HOSTFN1_LPU1_CMD_STAT, LPU1_HOSTFN1_CMD_STAT } | 93 | { HOSTFN1_LPU1_CMD_STAT, LPU1_HOSTFN1_CMD_STAT } |
100 | }; | 94 | }; |
@@ -154,6 +148,7 @@ bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc) | |||
154 | /** | 148 | /** |
155 | * Initialize IOC to port mapping. | 149 | * Initialize IOC to port mapping. |
156 | */ | 150 | */ |
151 | |||
157 | static void | 152 | static void |
158 | bfa_ioc_cb_map_port(struct bfa_ioc_s *ioc) | 153 | bfa_ioc_cb_map_port(struct bfa_ioc_s *ioc) |
159 | { | 154 | { |
@@ -161,6 +156,7 @@ bfa_ioc_cb_map_port(struct bfa_ioc_s *ioc) | |||
161 | * For crossbow, port id is same as pci function. | 156 | * For crossbow, port id is same as pci function. |
162 | */ | 157 | */ |
163 | ioc->port_id = bfa_ioc_pcifn(ioc); | 158 | ioc->port_id = bfa_ioc_pcifn(ioc); |
159 | |||
164 | bfa_trc(ioc, ioc->port_id); | 160 | bfa_trc(ioc, ioc->port_id); |
165 | } | 161 | } |
166 | 162 | ||
@@ -172,87 +168,69 @@ bfa_ioc_cb_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix) | |||
172 | { | 168 | { |
173 | } | 169 | } |
174 | 170 | ||
175 | static bfa_status_t | 171 | /** |
176 | bfa_ioc_cb_pll_init(struct bfa_ioc_s *ioc) | 172 | * Cleanup hw semaphore and usecnt registers |
173 | */ | ||
174 | static void | ||
175 | bfa_ioc_cb_ownership_reset(struct bfa_ioc_s *ioc) | ||
177 | { | 176 | { |
178 | bfa_os_addr_t rb = ioc->pcidev.pci_bar_kva; | ||
179 | u32 pll_sclk, pll_fclk; | ||
180 | 177 | ||
181 | /* | 178 | /* |
182 | * Hold semaphore so that nobody can access the chip during init. | 179 | * Read the hw sem reg to make sure that it is locked |
180 | * before we clear it. If it is not locked, writing 1 | ||
181 | * will lock it instead of clearing it. | ||
183 | */ | 182 | */ |
184 | bfa_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg); | 183 | bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); |
184 | bfa_ioc_hw_sem_release(ioc); | ||
185 | } | ||
186 | |||
187 | |||
188 | |||
189 | bfa_status_t | ||
190 | bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode) | ||
191 | { | ||
192 | u32 pll_sclk, pll_fclk; | ||
185 | 193 | ||
186 | pll_sclk = __APP_PLL_212_ENABLE | __APP_PLL_212_LRESETN | | 194 | pll_sclk = __APP_PLL_212_ENABLE | __APP_PLL_212_LRESETN | |
187 | __APP_PLL_212_P0_1(3U) | | 195 | __APP_PLL_212_P0_1(3U) | |
188 | __APP_PLL_212_JITLMT0_1(3U) | | 196 | __APP_PLL_212_JITLMT0_1(3U) | |
189 | __APP_PLL_212_CNTLMT0_1(3U); | 197 | __APP_PLL_212_CNTLMT0_1(3U); |
190 | pll_fclk = __APP_PLL_400_ENABLE | __APP_PLL_400_LRESETN | | 198 | pll_fclk = __APP_PLL_400_ENABLE | __APP_PLL_400_LRESETN | |
191 | __APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) | | 199 | __APP_PLL_400_RSEL200500 | __APP_PLL_400_P0_1(3U) | |
192 | __APP_PLL_400_JITLMT0_1(3U) | | 200 | __APP_PLL_400_JITLMT0_1(3U) | |
193 | __APP_PLL_400_CNTLMT0_1(3U); | 201 | __APP_PLL_400_CNTLMT0_1(3U); |
194 | |||
195 | bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); | 202 | bfa_reg_write((rb + BFA_IOC0_STATE_REG), BFI_IOC_UNINIT); |
196 | bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); | 203 | bfa_reg_write((rb + BFA_IOC1_STATE_REG), BFI_IOC_UNINIT); |
197 | |||
198 | bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); | 204 | bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); |
199 | bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); | 205 | bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); |
200 | bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); | 206 | bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); |
201 | bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); | 207 | bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); |
202 | bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); | 208 | bfa_reg_write((rb + HOSTFN0_INT_MSK), 0xffffffffU); |
203 | bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); | 209 | bfa_reg_write((rb + HOSTFN1_INT_MSK), 0xffffffffU); |
204 | 210 | bfa_reg_write(rb + APP_PLL_212_CTL_REG, | |
205 | bfa_reg_write(ioc->ioc_regs.app_pll_slow_ctl_reg, | 211 | __APP_PLL_212_LOGIC_SOFT_RESET); |
206 | __APP_PLL_212_LOGIC_SOFT_RESET); | 212 | bfa_reg_write(rb + APP_PLL_212_CTL_REG, |
207 | bfa_reg_write(ioc->ioc_regs.app_pll_slow_ctl_reg, | 213 | __APP_PLL_212_BYPASS | |
208 | __APP_PLL_212_BYPASS | | 214 | __APP_PLL_212_LOGIC_SOFT_RESET); |
209 | __APP_PLL_212_LOGIC_SOFT_RESET); | 215 | bfa_reg_write(rb + APP_PLL_400_CTL_REG, |
210 | bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, | 216 | __APP_PLL_400_LOGIC_SOFT_RESET); |
211 | __APP_PLL_400_LOGIC_SOFT_RESET); | 217 | bfa_reg_write(rb + APP_PLL_400_CTL_REG, |
212 | bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, | 218 | __APP_PLL_400_BYPASS | |
213 | __APP_PLL_400_BYPASS | | 219 | __APP_PLL_400_LOGIC_SOFT_RESET); |
214 | __APP_PLL_400_LOGIC_SOFT_RESET); | ||
215 | bfa_os_udelay(2); | 220 | bfa_os_udelay(2); |
216 | bfa_reg_write(ioc->ioc_regs.app_pll_slow_ctl_reg, | 221 | bfa_reg_write(rb + APP_PLL_212_CTL_REG, |
217 | __APP_PLL_212_LOGIC_SOFT_RESET); | 222 | __APP_PLL_212_LOGIC_SOFT_RESET); |
218 | bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, | 223 | bfa_reg_write(rb + APP_PLL_400_CTL_REG, |
219 | __APP_PLL_400_LOGIC_SOFT_RESET); | 224 | __APP_PLL_400_LOGIC_SOFT_RESET); |
220 | 225 | bfa_reg_write(rb + APP_PLL_212_CTL_REG, | |
221 | bfa_reg_write(ioc->ioc_regs.app_pll_slow_ctl_reg, | 226 | pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET); |
222 | pll_sclk | __APP_PLL_212_LOGIC_SOFT_RESET); | 227 | bfa_reg_write(rb + APP_PLL_400_CTL_REG, |
223 | bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, | 228 | pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET); |
224 | pll_fclk | __APP_PLL_400_LOGIC_SOFT_RESET); | ||
225 | |||
226 | /** | ||
227 | * Wait for PLLs to lock. | ||
228 | */ | ||
229 | bfa_os_udelay(2000); | 229 | bfa_os_udelay(2000); |
230 | bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); | 230 | bfa_reg_write((rb + HOSTFN0_INT_STATUS), 0xffffffffU); |
231 | bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); | 231 | bfa_reg_write((rb + HOSTFN1_INT_STATUS), 0xffffffffU); |
232 | 232 | bfa_reg_write((rb + APP_PLL_212_CTL_REG), pll_sclk); | |
233 | bfa_reg_write(ioc->ioc_regs.app_pll_slow_ctl_reg, pll_sclk); | 233 | bfa_reg_write((rb + APP_PLL_400_CTL_REG), pll_fclk); |
234 | bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, pll_fclk); | ||
235 | |||
236 | /* | ||
237 | * release semaphore. | ||
238 | */ | ||
239 | bfa_ioc_sem_release(ioc->ioc_regs.ioc_init_sem_reg); | ||
240 | 234 | ||
241 | return BFA_STATUS_OK; | 235 | return BFA_STATUS_OK; |
242 | } | 236 | } |
243 | |||
244 | /** | ||
245 | * Cleanup hw semaphore and usecnt registers | ||
246 | */ | ||
247 | static void | ||
248 | bfa_ioc_cb_ownership_reset(struct bfa_ioc_s *ioc) | ||
249 | { | ||
250 | |||
251 | /* | ||
252 | * Read the hw sem reg to make sure that it is locked | ||
253 | * before we clear it. If it is not locked, writing 1 | ||
254 | * will lock it instead of clearing it. | ||
255 | */ | ||
256 | bfa_reg_read(ioc->ioc_regs.ioc_sem_reg); | ||
257 | bfa_ioc_hw_sem_release(ioc); | ||
258 | } | ||