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Diffstat (limited to 'drivers/scsi/bfa/bfa_ioc.h')
-rw-r--r--drivers/scsi/bfa/bfa_ioc.h108
1 files changed, 53 insertions, 55 deletions
diff --git a/drivers/scsi/bfa/bfa_ioc.h b/drivers/scsi/bfa/bfa_ioc.h
index 288c5801aace..9c407a87a1a1 100644
--- a/drivers/scsi/bfa/bfa_ioc.h
+++ b/drivers/scsi/bfa/bfa_ioc.h
@@ -22,29 +22,29 @@
22#include "bfa_cs.h" 22#include "bfa_cs.h"
23#include "bfi.h" 23#include "bfi.h"
24 24
25/** 25/*
26 * BFA timer declarations 26 * BFA timer declarations
27 */ 27 */
28typedef void (*bfa_timer_cbfn_t)(void *); 28typedef void (*bfa_timer_cbfn_t)(void *);
29 29
30/** 30/*
31 * BFA timer data structure 31 * BFA timer data structure
32 */ 32 */
33struct bfa_timer_s { 33struct bfa_timer_s {
34 struct list_head qe; 34 struct list_head qe;
35 bfa_timer_cbfn_t timercb; 35 bfa_timer_cbfn_t timercb;
36 void *arg; 36 void *arg;
37 int timeout; /**< in millisecs. */ 37 int timeout; /* in millisecs */
38}; 38};
39 39
40/** 40/*
41 * Timer module structure 41 * Timer module structure
42 */ 42 */
43struct bfa_timer_mod_s { 43struct bfa_timer_mod_s {
44 struct list_head timer_q; 44 struct list_head timer_q;
45}; 45};
46 46
47#define BFA_TIMER_FREQ 200 /**< specified in millisecs */ 47#define BFA_TIMER_FREQ 200 /* specified in millisecs */
48 48
49void bfa_timer_beat(struct bfa_timer_mod_s *mod); 49void bfa_timer_beat(struct bfa_timer_mod_s *mod);
50void bfa_timer_init(struct bfa_timer_mod_s *mod); 50void bfa_timer_init(struct bfa_timer_mod_s *mod);
@@ -53,7 +53,7 @@ void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
53 unsigned int timeout); 53 unsigned int timeout);
54void bfa_timer_stop(struct bfa_timer_s *timer); 54void bfa_timer_stop(struct bfa_timer_s *timer);
55 55
56/** 56/*
57 * Generic Scatter Gather Element used by driver 57 * Generic Scatter Gather Element used by driver
58 */ 58 */
59struct bfa_sge_s { 59struct bfa_sge_s {
@@ -62,9 +62,9 @@ struct bfa_sge_s {
62}; 62};
63 63
64#define bfa_sge_word_swap(__sge) do { \ 64#define bfa_sge_word_swap(__sge) do { \
65 ((u32 *)(__sge))[0] = bfa_os_swap32(((u32 *)(__sge))[0]); \ 65 ((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]); \
66 ((u32 *)(__sge))[1] = bfa_os_swap32(((u32 *)(__sge))[1]); \ 66 ((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]); \
67 ((u32 *)(__sge))[2] = bfa_os_swap32(((u32 *)(__sge))[2]); \ 67 ((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]); \
68} while (0) 68} while (0)
69 69
70#define bfa_swap_words(_x) ( \ 70#define bfa_swap_words(_x) ( \
@@ -80,17 +80,17 @@ struct bfa_sge_s {
80#define bfa_sgaddr_le(_x) (_x) 80#define bfa_sgaddr_le(_x) (_x)
81#endif 81#endif
82 82
83/** 83/*
84 * PCI device information required by IOC 84 * PCI device information required by IOC
85 */ 85 */
86struct bfa_pcidev_s { 86struct bfa_pcidev_s {
87 int pci_slot; 87 int pci_slot;
88 u8 pci_func; 88 u8 pci_func;
89 u16 device_id; 89 u16 device_id;
90 bfa_os_addr_t pci_bar_kva; 90 void __iomem *pci_bar_kva;
91}; 91};
92 92
93/** 93/*
94 * Structure used to remember the DMA-able memory block's KVA and Physical 94 * Structure used to remember the DMA-able memory block's KVA and Physical
95 * Address 95 * Address
96 */ 96 */
@@ -102,7 +102,7 @@ struct bfa_dma_s {
102#define BFA_DMA_ALIGN_SZ 256 102#define BFA_DMA_ALIGN_SZ 256
103#define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1)) 103#define BFA_ROUNDUP(_l, _s) (((_l) + ((_s) - 1)) & ~((_s) - 1))
104 104
105/** 105/*
106 * smem size for Crossbow and Catapult 106 * smem size for Crossbow and Catapult
107 */ 107 */
108#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */ 108#define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
@@ -125,40 +125,38 @@ __bfa_dma_addr_set(union bfi_addr_u *dma_addr, u64 pa)
125static inline void 125static inline void
126__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa) 126__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
127{ 127{
128 dma_addr->a32.addr_lo = (u32) bfa_os_htonl(pa); 128 dma_addr->a32.addr_lo = (u32) cpu_to_be32(pa);
129 dma_addr->a32.addr_hi = (u32) bfa_os_htonl(bfa_os_u32(pa)); 129 dma_addr->a32.addr_hi = (u32) cpu_to_be32(bfa_os_u32(pa));
130} 130}
131 131
132struct bfa_ioc_regs_s { 132struct bfa_ioc_regs_s {
133 bfa_os_addr_t hfn_mbox_cmd; 133 void __iomem *hfn_mbox_cmd;
134 bfa_os_addr_t hfn_mbox; 134 void __iomem *hfn_mbox;
135 bfa_os_addr_t lpu_mbox_cmd; 135 void __iomem *lpu_mbox_cmd;
136 bfa_os_addr_t lpu_mbox; 136 void __iomem *lpu_mbox;
137 bfa_os_addr_t pss_ctl_reg; 137 void __iomem *pss_ctl_reg;
138 bfa_os_addr_t pss_err_status_reg; 138 void __iomem *pss_err_status_reg;
139 bfa_os_addr_t app_pll_fast_ctl_reg; 139 void __iomem *app_pll_fast_ctl_reg;
140 bfa_os_addr_t app_pll_slow_ctl_reg; 140 void __iomem *app_pll_slow_ctl_reg;
141 bfa_os_addr_t ioc_sem_reg; 141 void __iomem *ioc_sem_reg;
142 bfa_os_addr_t ioc_usage_sem_reg; 142 void __iomem *ioc_usage_sem_reg;
143 bfa_os_addr_t ioc_init_sem_reg; 143 void __iomem *ioc_init_sem_reg;
144 bfa_os_addr_t ioc_usage_reg; 144 void __iomem *ioc_usage_reg;
145 bfa_os_addr_t host_page_num_fn; 145 void __iomem *host_page_num_fn;
146 bfa_os_addr_t heartbeat; 146 void __iomem *heartbeat;
147 bfa_os_addr_t ioc_fwstate; 147 void __iomem *ioc_fwstate;
148 bfa_os_addr_t ll_halt; 148 void __iomem *ll_halt;
149 bfa_os_addr_t err_set; 149 void __iomem *err_set;
150 bfa_os_addr_t shirq_isr_next; 150 void __iomem *shirq_isr_next;
151 bfa_os_addr_t shirq_msk_next; 151 void __iomem *shirq_msk_next;
152 bfa_os_addr_t smem_page_start; 152 void __iomem *smem_page_start;
153 u32 smem_pg0; 153 u32 smem_pg0;
154}; 154};
155 155
156#define bfa_reg_read(_raddr) bfa_os_reg_read(_raddr) 156#define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
157#define bfa_reg_write(_raddr, _val) bfa_os_reg_write(_raddr, _val)
158#define bfa_mem_read(_raddr, _off) bfa_os_mem_read(_raddr, _off)
159#define bfa_mem_write(_raddr, _off, _val) \ 157#define bfa_mem_write(_raddr, _off, _val) \
160 bfa_os_mem_write(_raddr, _off, _val) 158 writel(swab32((_val)), ((_raddr) + (_off)))
161/** 159/*
162 * IOC Mailbox structures 160 * IOC Mailbox structures
163 */ 161 */
164struct bfa_mbox_cmd_s { 162struct bfa_mbox_cmd_s {
@@ -166,7 +164,7 @@ struct bfa_mbox_cmd_s {
166 u32 msg[BFI_IOC_MSGSZ]; 164 u32 msg[BFI_IOC_MSGSZ];
167}; 165};
168 166
169/** 167/*
170 * IOC mailbox module 168 * IOC mailbox module
171 */ 169 */
172typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m); 170typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
@@ -179,7 +177,7 @@ struct bfa_ioc_mbox_mod_s {
179 } mbhdlr[BFI_MC_MAX]; 177 } mbhdlr[BFI_MC_MAX];
180}; 178};
181 179
182/** 180/*
183 * IOC callback function interfaces 181 * IOC callback function interfaces
184 */ 182 */
185typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status); 183typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
@@ -193,7 +191,7 @@ struct bfa_ioc_cbfn_s {
193 bfa_ioc_reset_cbfn_t reset_cbfn; 191 bfa_ioc_reset_cbfn_t reset_cbfn;
194}; 192};
195 193
196/** 194/*
197 * Heartbeat failure notification queue element. 195 * Heartbeat failure notification queue element.
198 */ 196 */
199struct bfa_ioc_hbfail_notify_s { 197struct bfa_ioc_hbfail_notify_s {
@@ -202,7 +200,7 @@ struct bfa_ioc_hbfail_notify_s {
202 void *cbarg; 200 void *cbarg;
203}; 201};
204 202
205/** 203/*
206 * Initialize a heartbeat failure notification structure 204 * Initialize a heartbeat failure notification structure
207 */ 205 */
208#define bfa_ioc_hbfail_init(__notify, __cbfn, __cbarg) do { \ 206#define bfa_ioc_hbfail_init(__notify, __cbfn, __cbarg) do { \
@@ -249,7 +247,7 @@ struct bfa_ioc_s {
249}; 247};
250 248
251struct bfa_ioc_hwif_s { 249struct bfa_ioc_hwif_s {
252 bfa_status_t (*ioc_pll_init) (bfa_os_addr_t rb, bfa_boolean_t fcmode); 250 bfa_status_t (*ioc_pll_init) (void __iomem *rb, bfa_boolean_t fcmode);
253 bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc); 251 bfa_boolean_t (*ioc_firmware_lock) (struct bfa_ioc_s *ioc);
254 void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc); 252 void (*ioc_firmware_unlock) (struct bfa_ioc_s *ioc);
255 void (*ioc_reg_init) (struct bfa_ioc_s *ioc); 253 void (*ioc_reg_init) (struct bfa_ioc_s *ioc);
@@ -267,7 +265,7 @@ struct bfa_ioc_hwif_s {
267#define bfa_ioc_fetch_stats(__ioc, __stats) \ 265#define bfa_ioc_fetch_stats(__ioc, __stats) \
268 (((__stats)->drv_stats) = (__ioc)->stats) 266 (((__stats)->drv_stats) = (__ioc)->stats)
269#define bfa_ioc_clr_stats(__ioc) \ 267#define bfa_ioc_clr_stats(__ioc) \
270 bfa_os_memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats)) 268 memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
271#define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize) 269#define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
272#define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit) 270#define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
273#define bfa_ioc_speed_sup(__ioc) \ 271#define bfa_ioc_speed_sup(__ioc) \
@@ -287,7 +285,7 @@ struct bfa_ioc_hwif_s {
287#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS) 285#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
288#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS) 286#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
289 287
290/** 288/*
291 * IOC mailbox interface 289 * IOC mailbox interface
292 */ 290 */
293void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd); 291void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
@@ -299,7 +297,7 @@ void bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
299void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc, 297void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
300 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg); 298 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
301 299
302/** 300/*
303 * IOC interfaces 301 * IOC interfaces
304 */ 302 */
305 303
@@ -308,9 +306,9 @@ void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
308 (__ioc)->fcmode)) 306 (__ioc)->fcmode))
309 307
310bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc); 308bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
311bfa_status_t bfa_ioc_cb_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode); 309bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
312bfa_boolean_t bfa_ioc_ct_pll_init_complete(bfa_os_addr_t rb); 310bfa_boolean_t bfa_ioc_ct_pll_init_complete(void __iomem *rb);
313bfa_status_t bfa_ioc_ct_pll_init(bfa_os_addr_t rb, bfa_boolean_t fcmode); 311bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
314 312
315#define bfa_ioc_isr_mode_set(__ioc, __msix) \ 313#define bfa_ioc_isr_mode_set(__ioc, __msix) \
316 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)) 314 ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix))
@@ -370,8 +368,8 @@ void bfa_ioc_set_fcmode(struct bfa_ioc_s *ioc);
370bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc); 368bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc);
371void bfa_ioc_hbfail_register(struct bfa_ioc_s *ioc, 369void bfa_ioc_hbfail_register(struct bfa_ioc_s *ioc,
372 struct bfa_ioc_hbfail_notify_s *notify); 370 struct bfa_ioc_hbfail_notify_s *notify);
373bfa_boolean_t bfa_ioc_sem_get(bfa_os_addr_t sem_reg); 371bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
374void bfa_ioc_sem_release(bfa_os_addr_t sem_reg); 372void bfa_ioc_sem_release(void __iomem *sem_reg);
375void bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc); 373void bfa_ioc_hw_sem_release(struct bfa_ioc_s *ioc);
376void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc, 374void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
377 struct bfi_ioc_image_hdr_s *fwhdr); 375 struct bfi_ioc_image_hdr_s *fwhdr);
@@ -441,7 +439,7 @@ bfa_cb_image_get_size(int type)
441 } 439 }
442} 440}
443 441
444/** 442/*
445 * CNA TRCMOD declaration 443 * CNA TRCMOD declaration
446 */ 444 */
447/* 445/*