diff options
Diffstat (limited to 'drivers/scsi/arcmsr/arcmsr.h')
-rw-r--r-- | drivers/scsi/arcmsr/arcmsr.h | 135 |
1 files changed, 57 insertions, 78 deletions
diff --git a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h index ce5371b3cdd5..c0861c05cd49 100644 --- a/drivers/scsi/arcmsr/arcmsr.h +++ b/drivers/scsi/arcmsr/arcmsr.h | |||
@@ -48,16 +48,22 @@ struct device_attribute; | |||
48 | /*The limit of outstanding scsi command that firmware can handle*/ | 48 | /*The limit of outstanding scsi command that firmware can handle*/ |
49 | #define ARCMSR_MAX_OUTSTANDING_CMD 256 | 49 | #define ARCMSR_MAX_OUTSTANDING_CMD 256 |
50 | #define ARCMSR_MAX_FREECCB_NUM 320 | 50 | #define ARCMSR_MAX_FREECCB_NUM 320 |
51 | #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2008/11/03" | 51 | #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2009/12/09" |
52 | #define ARCMSR_SCSI_INITIATOR_ID 255 | 52 | #define ARCMSR_SCSI_INITIATOR_ID 255 |
53 | #define ARCMSR_MAX_XFER_SECTORS 512 | 53 | #define ARCMSR_MAX_XFER_SECTORS 512 |
54 | #define ARCMSR_MAX_XFER_SECTORS_B 4096 | 54 | #define ARCMSR_MAX_XFER_SECTORS_B 4096 |
55 | #define ARCMSR_MAX_XFER_SECTORS_C 304 | ||
55 | #define ARCMSR_MAX_TARGETID 17 | 56 | #define ARCMSR_MAX_TARGETID 17 |
56 | #define ARCMSR_MAX_TARGETLUN 8 | 57 | #define ARCMSR_MAX_TARGETLUN 8 |
57 | #define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD | 58 | #define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD |
58 | #define ARCMSR_MAX_QBUFFER 4096 | 59 | #define ARCMSR_MAX_QBUFFER 4096 |
59 | #define ARCMSR_MAX_SG_ENTRIES 38 | 60 | #define ARCMSR_DEFAULT_SG_ENTRIES 38 |
60 | #define ARCMSR_MAX_HBB_POSTQUEUE 264 | 61 | #define ARCMSR_MAX_HBB_POSTQUEUE 264 |
62 | #define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */ | ||
63 | #define ARCMSR_CDB_SG_PAGE_LENGTH 256 | ||
64 | #ifndef PCI_DEVICE_ID_ARECA_1880 | ||
65 | #define PCI_DEVICE_ID_ARECA_1880 0x1880 | ||
66 | #endif | ||
61 | /* | 67 | /* |
62 | ********************************************************************************** | 68 | ********************************************************************************** |
63 | ** | 69 | ** |
@@ -141,26 +147,19 @@ struct CMD_MESSAGE_FIELD | |||
141 | ** structure for holding DMA address data | 147 | ** structure for holding DMA address data |
142 | ************************************************************* | 148 | ************************************************************* |
143 | */ | 149 | */ |
150 | #define IS_DMA64 (sizeof(dma_addr_t) == 8) | ||
144 | #define IS_SG64_ADDR 0x01000000 /* bit24 */ | 151 | #define IS_SG64_ADDR 0x01000000 /* bit24 */ |
145 | struct SG32ENTRY | 152 | struct SG32ENTRY |
146 | { | 153 | { |
147 | __le32 length; | 154 | __le32 length; |
148 | __le32 address; | 155 | __le32 address; |
149 | }; | 156 | } __attribute__ ((packed)); |
150 | struct SG64ENTRY | 157 | struct SG64ENTRY |
151 | { | 158 | { |
152 | __le32 length; | 159 | __le32 length; |
153 | __le32 address; | 160 | __le32 address; |
154 | __le32 addresshigh; | 161 | __le32 addresshigh; |
155 | }; | 162 | } __attribute__ ((packed)); |
156 | struct SGENTRY_UNION | ||
157 | { | ||
158 | union | ||
159 | { | ||
160 | struct SG32ENTRY sg32entry; | ||
161 | struct SG64ENTRY sg64entry; | ||
162 | }u; | ||
163 | }; | ||
164 | /* | 163 | /* |
165 | ******************************************************************** | 164 | ******************************************************************** |
166 | ** Q Buffer of IOP Message Transfer | 165 | ** Q Buffer of IOP Message Transfer |
@@ -187,6 +186,9 @@ struct FIRMWARE_INFO | |||
187 | char model[8]; /*15, 60-67*/ | 186 | char model[8]; /*15, 60-67*/ |
188 | char firmware_ver[16]; /*17, 68-83*/ | 187 | char firmware_ver[16]; /*17, 68-83*/ |
189 | char device_map[16]; /*21, 84-99*/ | 188 | char device_map[16]; /*21, 84-99*/ |
189 | uint32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ | ||
190 | uint8_t cfgSerial[16]; /*26,104-119*/ | ||
191 | uint32_t cfgPicStatus; /*30,120-123*/ | ||
190 | }; | 192 | }; |
191 | /* signature of set and get firmware config */ | 193 | /* signature of set and get firmware config */ |
192 | #define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 | 194 | #define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 |
@@ -213,6 +215,8 @@ struct FIRMWARE_INFO | |||
213 | #define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 | 215 | #define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 |
214 | /* outbound firmware ok */ | 216 | /* outbound firmware ok */ |
215 | #define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 | 217 | #define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 |
218 | /* ARC-1680 Bus Reset*/ | ||
219 | #define ARCMSR_ARC1680_BUS_RESET 0x00000003 | ||
216 | 220 | ||
217 | /* | 221 | /* |
218 | ************************************************************************ | 222 | ************************************************************************ |
@@ -264,11 +268,11 @@ struct FIRMWARE_INFO | |||
264 | 268 | ||
265 | /* data tunnel buffer between user space program and its firmware */ | 269 | /* data tunnel buffer between user space program and its firmware */ |
266 | /* user space data to iop 128bytes */ | 270 | /* user space data to iop 128bytes */ |
267 | #define ARCMSR_IOCTL_WBUFFER 0x0000fe00 | 271 | #define ARCMSR_MESSAGE_WBUFFER 0x0000fe00 |
268 | /* iop data to user space 128bytes */ | 272 | /* iop data to user space 128bytes */ |
269 | #define ARCMSR_IOCTL_RBUFFER 0x0000ff00 | 273 | #define ARCMSR_MESSAGE_RBUFFER 0x0000ff00 |
270 | /* iop message_rwbuffer for message command */ | 274 | /* iop message_rwbuffer for message command */ |
271 | #define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 | 275 | #define ARCMSR_MESSAGE_RWBUFFER 0x0000fa00 |
272 | /* | 276 | /* |
273 | ******************************************************************************* | 277 | ******************************************************************************* |
274 | ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) | 278 | ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) |
@@ -290,7 +294,7 @@ struct ARCMSR_CDB | |||
290 | #define ARCMSR_CDB_FLAG_HEADQ 0x08 | 294 | #define ARCMSR_CDB_FLAG_HEADQ 0x08 |
291 | #define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 | 295 | #define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 |
292 | 296 | ||
293 | uint8_t Reserved1; | 297 | uint8_t msgPages; |
294 | uint32_t Context; | 298 | uint32_t Context; |
295 | uint32_t DataLength; | 299 | uint32_t DataLength; |
296 | uint8_t Cdb[16]; | 300 | uint8_t Cdb[16]; |
@@ -303,10 +307,10 @@ struct ARCMSR_CDB | |||
303 | uint8_t SenseData[15]; | 307 | uint8_t SenseData[15]; |
304 | union | 308 | union |
305 | { | 309 | { |
306 | struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; | 310 | struct SG32ENTRY sg32entry[1]; |
307 | struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; | 311 | struct SG64ENTRY sg64entry[1]; |
308 | } u; | 312 | } u; |
309 | }; | 313 | } __attribute__ ((packed)); |
310 | /* | 314 | /* |
311 | ******************************************************************************* | 315 | ******************************************************************************* |
312 | ** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor | 316 | ** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor |
@@ -344,13 +348,13 @@ struct MessageUnit_B | |||
344 | uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; | 348 | uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; |
345 | uint32_t postq_index; | 349 | uint32_t postq_index; |
346 | uint32_t doneq_index; | 350 | uint32_t doneq_index; |
347 | uint32_t __iomem *drv2iop_doorbell_reg; | 351 | uint32_t __iomem *drv2iop_doorbell; |
348 | uint32_t __iomem *drv2iop_doorbell_mask_reg; | 352 | uint32_t __iomem *drv2iop_doorbell_mask; |
349 | uint32_t __iomem *iop2drv_doorbell_reg; | 353 | uint32_t __iomem *iop2drv_doorbell; |
350 | uint32_t __iomem *iop2drv_doorbell_mask_reg; | 354 | uint32_t __iomem *iop2drv_doorbell_mask; |
351 | uint32_t __iomem *msgcode_rwbuffer_reg; | 355 | uint32_t __iomem *message_rwbuffer; |
352 | uint32_t __iomem *ioctl_wbuffer_reg; | 356 | uint32_t __iomem *message_wbuffer; |
353 | uint32_t __iomem *ioctl_rbuffer_reg; | 357 | uint32_t __iomem *message_rbuffer; |
354 | }; | 358 | }; |
355 | 359 | ||
356 | /* | 360 | /* |
@@ -370,14 +374,17 @@ struct AdapterControlBlock | |||
370 | unsigned long vir2phy_offset; | 374 | unsigned long vir2phy_offset; |
371 | /* Offset is used in making arc cdb physical to virtual calculations */ | 375 | /* Offset is used in making arc cdb physical to virtual calculations */ |
372 | uint32_t outbound_int_enable; | 376 | uint32_t outbound_int_enable; |
373 | 377 | spinlock_t eh_lock; | |
378 | spinlock_t ccblist_lock; | ||
374 | union { | 379 | union { |
375 | struct MessageUnit_A __iomem * pmuA; | 380 | struct MessageUnit_A __iomem * pmuA; |
376 | struct MessageUnit_B * pmuB; | 381 | struct MessageUnit_B * pmuB; |
377 | }; | 382 | }; |
378 | /* message unit ATU inbound base address0 */ | 383 | /* message unit ATU inbound base address0 */ |
379 | 384 | void __iomem *mem_base0; | |
385 | void __iomem *mem_base1; | ||
380 | uint32_t acb_flags; | 386 | uint32_t acb_flags; |
387 | u16 dev_id; | ||
381 | uint8_t adapter_index; | 388 | uint8_t adapter_index; |
382 | #define ACB_F_SCSISTOPADAPTER 0x0001 | 389 | #define ACB_F_SCSISTOPADAPTER 0x0001 |
383 | #define ACB_F_MSG_STOP_BGRB 0x0002 | 390 | #define ACB_F_MSG_STOP_BGRB 0x0002 |
@@ -394,6 +401,7 @@ struct AdapterControlBlock | |||
394 | #define ACB_F_BUS_RESET 0x0080 | 401 | #define ACB_F_BUS_RESET 0x0080 |
395 | #define ACB_F_IOP_INITED 0x0100 | 402 | #define ACB_F_IOP_INITED 0x0100 |
396 | /* iop init */ | 403 | /* iop init */ |
404 | #define ACB_F_ABORT 0x0200 | ||
397 | #define ACB_F_FIRMWARE_TRAP 0x0400 | 405 | #define ACB_F_FIRMWARE_TRAP 0x0400 |
398 | struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; | 406 | struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; |
399 | /* used for memory free */ | 407 | /* used for memory free */ |
@@ -408,7 +416,8 @@ struct AdapterControlBlock | |||
408 | /* dma_coherent used for memory free */ | 416 | /* dma_coherent used for memory free */ |
409 | dma_addr_t dma_coherent_handle; | 417 | dma_addr_t dma_coherent_handle; |
410 | /* dma_coherent_handle used for memory free */ | 418 | /* dma_coherent_handle used for memory free */ |
411 | 419 | dma_addr_t dma_coherent_handle_hbb_mu; | |
420 | unsigned int uncache_size; | ||
412 | uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; | 421 | uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; |
413 | /* data collection buffer for read from 80331 */ | 422 | /* data collection buffer for read from 80331 */ |
414 | int32_t rqbuf_firstindex; | 423 | int32_t rqbuf_firstindex; |
@@ -432,14 +441,18 @@ struct AdapterControlBlock | |||
432 | uint32_t firm_numbers_queue; | 441 | uint32_t firm_numbers_queue; |
433 | uint32_t firm_sdram_size; | 442 | uint32_t firm_sdram_size; |
434 | uint32_t firm_hd_channels; | 443 | uint32_t firm_hd_channels; |
444 | uint32_t firm_cfg_version; | ||
435 | char firm_model[12]; | 445 | char firm_model[12]; |
436 | char firm_version[20]; | 446 | char firm_version[20]; |
437 | char device_map[20]; /*21,84-99*/ | 447 | char device_map[20]; /*21,84-99*/ |
438 | struct work_struct arcmsr_do_message_isr_bh; | 448 | struct work_struct arcmsr_do_message_isr_bh; |
439 | struct timer_list eternal_timer; | 449 | struct timer_list eternal_timer; |
440 | unsigned short fw_state; | 450 | unsigned short fw_flag; |
451 | #define FW_NORMAL 0x0000 | ||
452 | #define FW_BOG 0x0001 | ||
453 | #define FW_DEADLOCK 0x0010 | ||
441 | atomic_t rq_map_token; | 454 | atomic_t rq_map_token; |
442 | int ante_token_value; | 455 | atomic_t ante_token_value; |
443 | };/* HW_DEVICE_EXTENSION */ | 456 | };/* HW_DEVICE_EXTENSION */ |
444 | /* | 457 | /* |
445 | ******************************************************************************* | 458 | ******************************************************************************* |
@@ -449,65 +462,31 @@ struct AdapterControlBlock | |||
449 | */ | 462 | */ |
450 | struct CommandControlBlock | 463 | struct CommandControlBlock |
451 | { | 464 | { |
452 | struct ARCMSR_CDB arcmsr_cdb; | 465 | /*x32:sizeof struct_CCB=(32+60)byte, x64:sizeof struct_CCB=(64+60)byte*/ |
453 | /* | 466 | struct list_head list; /*x32: 8byte, x64: 16byte*/ |
454 | ** 0-503 (size of CDB = 504): | 467 | struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */ |
455 | ** arcmsr messenger scsi command descriptor size 504 bytes | 468 | struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/ |
456 | */ | 469 | uint32_t shifted_cdb_phyaddr; /*x32: 4byte, x64: 4byte*/ |
457 | uint32_t cdb_shifted_phyaddr; | 470 | uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/ |
458 | /* 504-507 */ | ||
459 | uint32_t reserved1; | ||
460 | /* 508-511 */ | ||
461 | #if BITS_PER_LONG == 64 | ||
462 | /* ======================512+64 bytes======================== */ | ||
463 | struct list_head list; | ||
464 | /* 512-527 16 bytes next/prev ptrs for ccb lists */ | ||
465 | struct scsi_cmnd * pcmd; | ||
466 | /* 528-535 8 bytes pointer of linux scsi command */ | ||
467 | struct AdapterControlBlock * acb; | ||
468 | /* 536-543 8 bytes pointer of acb */ | ||
469 | |||
470 | uint16_t ccb_flags; | ||
471 | /* 544-545 */ | ||
472 | #define CCB_FLAG_READ 0x0000 | 471 | #define CCB_FLAG_READ 0x0000 |
473 | #define CCB_FLAG_WRITE 0x0001 | 472 | #define CCB_FLAG_WRITE 0x0001 |
474 | #define CCB_FLAG_ERROR 0x0002 | 473 | #define CCB_FLAG_ERROR 0x0002 |
475 | #define CCB_FLAG_FLUSHCACHE 0x0004 | 474 | #define CCB_FLAG_FLUSHCACHE 0x0004 |
476 | #define CCB_FLAG_MASTER_ABORTED 0x0008 | 475 | #define CCB_FLAG_MASTER_ABORTED 0x0008 |
477 | uint16_t startdone; | 476 | uint16_t startdone; /*x32:2byte,x32:2byte*/ |
478 | /* 546-547 */ | ||
479 | #define ARCMSR_CCB_DONE 0x0000 | 477 | #define ARCMSR_CCB_DONE 0x0000 |
480 | #define ARCMSR_CCB_START 0x55AA | 478 | #define ARCMSR_CCB_START 0x55AA |
481 | #define ARCMSR_CCB_ABORTED 0xAA55 | 479 | #define ARCMSR_CCB_ABORTED 0xAA55 |
482 | #define ARCMSR_CCB_ILLEGAL 0xFFFF | 480 | #define ARCMSR_CCB_ILLEGAL 0xFFFF |
483 | uint32_t reserved2[7]; | 481 | #if BITS_PER_LONG == 64 |
484 | /* 548-551 552-555 556-559 560-563 564-567 568-571 572-575 */ | 482 | /* ======================512+64 bytes======================== */ |
483 | uint32_t reserved[6]; /*24 byte*/ | ||
485 | #else | 484 | #else |
486 | /* ======================512+32 bytes======================== */ | 485 | /* ======================512+32 bytes======================== */ |
487 | struct list_head list; | 486 | uint32_t reserved[2]; /*8 byte*/ |
488 | /* 512-519 8 bytes next/prev ptrs for ccb lists */ | ||
489 | struct scsi_cmnd * pcmd; | ||
490 | /* 520-523 4 bytes pointer of linux scsi command */ | ||
491 | struct AdapterControlBlock * acb; | ||
492 | /* 524-527 4 bytes pointer of acb */ | ||
493 | |||
494 | uint16_t ccb_flags; | ||
495 | /* 528-529 */ | ||
496 | #define CCB_FLAG_READ 0x0000 | ||
497 | #define CCB_FLAG_WRITE 0x0001 | ||
498 | #define CCB_FLAG_ERROR 0x0002 | ||
499 | #define CCB_FLAG_FLUSHCACHE 0x0004 | ||
500 | #define CCB_FLAG_MASTER_ABORTED 0x0008 | ||
501 | uint16_t startdone; | ||
502 | /* 530-531 */ | ||
503 | #define ARCMSR_CCB_DONE 0x0000 | ||
504 | #define ARCMSR_CCB_START 0x55AA | ||
505 | #define ARCMSR_CCB_ABORTED 0xAA55 | ||
506 | #define ARCMSR_CCB_ILLEGAL 0xFFFF | ||
507 | uint32_t reserved2[3]; | ||
508 | /* 532-535 536-539 540-543 */ | ||
509 | #endif | 487 | #endif |
510 | /* ========================================================== */ | 488 | /* ======================================================= */ |
489 | struct ARCMSR_CDB arcmsr_cdb; | ||
511 | }; | 490 | }; |
512 | /* | 491 | /* |
513 | ******************************************************************************* | 492 | ******************************************************************************* |