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path: root/drivers/scsi/ahci.c
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Diffstat (limited to 'drivers/scsi/ahci.c')
-rw-r--r--drivers/scsi/ahci.c34
1 files changed, 28 insertions, 6 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 10c470e7d316..4e96ec5f2ff9 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -134,6 +134,7 @@ enum {
134 PORT_IRQ_D2H_REG_FIS, 134 PORT_IRQ_D2H_REG_FIS,
135 135
136 /* PORT_CMD bits */ 136 /* PORT_CMD bits */
137 PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */
137 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ 138 PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
138 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ 139 PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
139 PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */ 140 PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */
@@ -255,7 +256,7 @@ static struct ata_port_info ahci_port_info[] = {
255 }, 256 },
256}; 257};
257 258
258static struct pci_device_id ahci_pci_tbl[] = { 259static const struct pci_device_id ahci_pci_tbl[] = {
259 { PCI_VENDOR_ID_INTEL, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 260 { PCI_VENDOR_ID_INTEL, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
260 board_ahci }, /* ICH6 */ 261 board_ahci }, /* ICH6 */
261 { PCI_VENDOR_ID_INTEL, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 262 { PCI_VENDOR_ID_INTEL, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
@@ -441,7 +442,7 @@ static void ahci_phy_reset(struct ata_port *ap)
441 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr; 442 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
442 struct ata_taskfile tf; 443 struct ata_taskfile tf;
443 struct ata_device *dev = &ap->device[0]; 444 struct ata_device *dev = &ap->device[0];
444 u32 tmp; 445 u32 new_tmp, tmp;
445 446
446 __sata_phy_reset(ap); 447 __sata_phy_reset(ap);
447 448
@@ -455,8 +456,21 @@ static void ahci_phy_reset(struct ata_port *ap)
455 tf.nsect = (tmp) & 0xff; 456 tf.nsect = (tmp) & 0xff;
456 457
457 dev->class = ata_dev_classify(&tf); 458 dev->class = ata_dev_classify(&tf);
458 if (!ata_dev_present(dev)) 459 if (!ata_dev_present(dev)) {
459 ata_port_disable(ap); 460 ata_port_disable(ap);
461 return;
462 }
463
464 /* Make sure port's ATAPI bit is set appropriately */
465 new_tmp = tmp = readl(port_mmio + PORT_CMD);
466 if (dev->class == ATA_DEV_ATAPI)
467 new_tmp |= PORT_CMD_ATAPI;
468 else
469 new_tmp &= ~PORT_CMD_ATAPI;
470 if (new_tmp != tmp) {
471 writel(new_tmp, port_mmio + PORT_CMD);
472 readl(port_mmio + PORT_CMD); /* flush */
473 }
460} 474}
461 475
462static u8 ahci_check_status(struct ata_port *ap) 476static u8 ahci_check_status(struct ata_port *ap)
@@ -474,11 +488,12 @@ static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
474 ata_tf_from_fis(d2h_fis, tf); 488 ata_tf_from_fis(d2h_fis, tf);
475} 489}
476 490
477static void ahci_fill_sg(struct ata_queued_cmd *qc) 491static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc)
478{ 492{
479 struct ahci_port_priv *pp = qc->ap->private_data; 493 struct ahci_port_priv *pp = qc->ap->private_data;
480 struct scatterlist *sg; 494 struct scatterlist *sg;
481 struct ahci_sg *ahci_sg; 495 struct ahci_sg *ahci_sg;
496 unsigned int n_sg = 0;
482 497
483 VPRINTK("ENTER\n"); 498 VPRINTK("ENTER\n");
484 499
@@ -493,8 +508,12 @@ static void ahci_fill_sg(struct ata_queued_cmd *qc)
493 ahci_sg->addr = cpu_to_le32(addr & 0xffffffff); 508 ahci_sg->addr = cpu_to_le32(addr & 0xffffffff);
494 ahci_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16); 509 ahci_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
495 ahci_sg->flags_size = cpu_to_le32(sg_len - 1); 510 ahci_sg->flags_size = cpu_to_le32(sg_len - 1);
511
496 ahci_sg++; 512 ahci_sg++;
513 n_sg++;
497 } 514 }
515
516 return n_sg;
498} 517}
499 518
500static void ahci_qc_prep(struct ata_queued_cmd *qc) 519static void ahci_qc_prep(struct ata_queued_cmd *qc)
@@ -503,13 +522,14 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
503 struct ahci_port_priv *pp = ap->private_data; 522 struct ahci_port_priv *pp = ap->private_data;
504 u32 opts; 523 u32 opts;
505 const u32 cmd_fis_len = 5; /* five dwords */ 524 const u32 cmd_fis_len = 5; /* five dwords */
525 unsigned int n_elem;
506 526
507 /* 527 /*
508 * Fill in command slot information (currently only one slot, 528 * Fill in command slot information (currently only one slot,
509 * slot 0, is currently since we don't do queueing) 529 * slot 0, is currently since we don't do queueing)
510 */ 530 */
511 531
512 opts = (qc->n_elem << 16) | cmd_fis_len; 532 opts = cmd_fis_len;
513 if (qc->tf.flags & ATA_TFLAG_WRITE) 533 if (qc->tf.flags & ATA_TFLAG_WRITE)
514 opts |= AHCI_CMD_WRITE; 534 opts |= AHCI_CMD_WRITE;
515 if (is_atapi_taskfile(&qc->tf)) 535 if (is_atapi_taskfile(&qc->tf))
@@ -533,7 +553,9 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
533 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 553 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
534 return; 554 return;
535 555
536 ahci_fill_sg(qc); 556 n_elem = ahci_fill_sg(qc);
557
558 pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16);
537} 559}
538 560
539static void ahci_intr_error(struct ata_port *ap, u32 irq_stat) 561static void ahci_intr_error(struct ata_port *ap, u32 irq_stat)