diff options
Diffstat (limited to 'drivers/scsi/advansys.c')
-rw-r--r-- | drivers/scsi/advansys.c | 19980 |
1 files changed, 7646 insertions, 12334 deletions
diff --git a/drivers/scsi/advansys.c b/drivers/scsi/advansys.c index 79c0b6e37a3b..9dd3952516c5 100644 --- a/drivers/scsi/advansys.c +++ b/drivers/scsi/advansys.c | |||
@@ -1,765 +1,27 @@ | |||
1 | #define ASC_VERSION "3.3K" /* AdvanSys Driver Version */ | 1 | #define DRV_NAME "advansys" |
2 | #define ASC_VERSION "3.4" /* AdvanSys Driver Version */ | ||
2 | 3 | ||
3 | /* | 4 | /* |
4 | * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters | 5 | * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters |
5 | * | 6 | * |
6 | * Copyright (c) 1995-2000 Advanced System Products, Inc. | 7 | * Copyright (c) 1995-2000 Advanced System Products, Inc. |
7 | * Copyright (c) 2000-2001 ConnectCom Solutions, Inc. | 8 | * Copyright (c) 2000-2001 ConnectCom Solutions, Inc. |
9 | * Copyright (c) 2007 Matthew Wilcox <matthew@wil.cx> | ||
8 | * All Rights Reserved. | 10 | * All Rights Reserved. |
9 | * | 11 | * |
10 | * Redistribution and use in source and binary forms, with or without | 12 | * This program is free software; you can redistribute it and/or modify |
11 | * modification, are permitted provided that redistributions of source | 13 | * it under the terms of the GNU General Public License as published by |
12 | * code retain the above copyright notice and this comment without | 14 | * the Free Software Foundation; either version 2 of the License, or |
13 | * modification. | 15 | * (at your option) any later version. |
14 | * | ||
15 | * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys) | ||
16 | * changed its name to ConnectCom Solutions, Inc. | ||
17 | * | ||
18 | */ | 16 | */ |
19 | 17 | ||
20 | /* | 18 | /* |
21 | 19 | * As of March 8, 2000 Advanced System Products, Inc. (AdvanSys) | |
22 | Documentation for the AdvanSys Driver | 20 | * changed its name to ConnectCom Solutions, Inc. |
23 | 21 | * On June 18, 2001 Initio Corp. acquired ConnectCom's SCSI assets | |
24 | A. Linux Kernels Supported by this Driver | ||
25 | B. Adapters Supported by this Driver | ||
26 | C. Linux source files modified by AdvanSys Driver | ||
27 | D. Source Comments | ||
28 | E. Driver Compile Time Options and Debugging | ||
29 | F. Driver LILO Option | ||
30 | G. Tests to run before releasing new driver | ||
31 | H. Release History | ||
32 | I. Known Problems/Fix List | ||
33 | J. Credits (Chronological Order) | ||
34 | |||
35 | A. Linux Kernels Supported by this Driver | ||
36 | |||
37 | This driver has been tested in the following Linux kernels: v2.2.18 | ||
38 | v2.4.0. The driver is supported on v2.2 and v2.4 kernels and on x86, | ||
39 | alpha, and PowerPC platforms. | ||
40 | |||
41 | B. Adapters Supported by this Driver | ||
42 | |||
43 | AdvanSys (Advanced System Products, Inc.) manufactures the following | ||
44 | RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow | ||
45 | (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI | ||
46 | buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit | ||
47 | transfer) SCSI Host Adapters for the PCI bus. | ||
48 | |||
49 | The CDB counts below indicate the number of SCSI CDB (Command | ||
50 | Descriptor Block) requests that can be stored in the RISC chip | ||
51 | cache and board LRAM. A CDB is a single SCSI command. The driver | ||
52 | detect routine will display the number of CDBs available for each | ||
53 | adapter detected. The number of CDBs used by the driver can be | ||
54 | lowered in the BIOS by changing the 'Host Queue Size' adapter setting. | ||
55 | |||
56 | Laptop Products: | ||
57 | ABP-480 - Bus-Master CardBus (16 CDB) (2.4 kernel and greater) | ||
58 | |||
59 | Connectivity Products: | ||
60 | ABP510/5150 - Bus-Master ISA (240 CDB) | ||
61 | ABP5140 - Bus-Master ISA PnP (16 CDB) | ||
62 | ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) | ||
63 | ABP902/3902 - Bus-Master PCI (16 CDB) | ||
64 | ABP3905 - Bus-Master PCI (16 CDB) | ||
65 | ABP915 - Bus-Master PCI (16 CDB) | ||
66 | ABP920 - Bus-Master PCI (16 CDB) | ||
67 | ABP3922 - Bus-Master PCI (16 CDB) | ||
68 | ABP3925 - Bus-Master PCI (16 CDB) | ||
69 | ABP930 - Bus-Master PCI (16 CDB) | ||
70 | ABP930U - Bus-Master PCI Ultra (16 CDB) | ||
71 | ABP930UA - Bus-Master PCI Ultra (16 CDB) | ||
72 | ABP960 - Bus-Master PCI MAC/PC (16 CDB) | ||
73 | ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) | ||
74 | |||
75 | Single Channel Products: | ||
76 | ABP542 - Bus-Master ISA with floppy (240 CDB) | ||
77 | ABP742 - Bus-Master EISA (240 CDB) | ||
78 | ABP842 - Bus-Master VL (240 CDB) | ||
79 | ABP940 - Bus-Master PCI (240 CDB) | ||
80 | ABP940U - Bus-Master PCI Ultra (240 CDB) | ||
81 | ABP940UA/3940UA - Bus-Master PCI Ultra (240 CDB) | ||
82 | ABP970 - Bus-Master PCI MAC/PC (240 CDB) | ||
83 | ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) | ||
84 | ABP3960UA - Bus-Master PCI MAC/PC Ultra (240 CDB) | ||
85 | ABP940UW/3940UW - Bus-Master PCI Ultra-Wide (253 CDB) | ||
86 | ABP970UW - Bus-Master PCI MAC/PC Ultra-Wide (253 CDB) | ||
87 | ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB) | ||
88 | |||
89 | Multi-Channel Products: | ||
90 | ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel) | ||
91 | ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) | ||
92 | ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) | ||
93 | ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB Per Channel) | ||
94 | ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) | ||
95 | ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) | ||
96 | ABP980UA/3980UA - Four Channel Bus-Master PCI Ultra (16 CDB Per Chan.) | ||
97 | ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide and Ultra-Wide (253 CDB) | ||
98 | ABP3950U3W - Bus-Master PCI Dual LVD2/Ultra3-Wide (253 CDB) | ||
99 | |||
100 | C. Linux source files modified by AdvanSys Driver | ||
101 | |||
102 | This section for historical purposes documents the changes | ||
103 | originally made to the Linux kernel source to add the advansys | ||
104 | driver. As Linux has changed some of these files have also | ||
105 | been modified. | ||
106 | |||
107 | 1. linux/arch/i386/config.in: | ||
108 | |||
109 | bool 'AdvanSys SCSI support' CONFIG_SCSI_ADVANSYS y | ||
110 | |||
111 | 2. linux/drivers/scsi/hosts.c: | ||
112 | |||
113 | #ifdef CONFIG_SCSI_ADVANSYS | ||
114 | #include "advansys.h" | ||
115 | #endif | ||
116 | |||
117 | and after "static struct scsi_host_template builtin_scsi_hosts[] =": | ||
118 | |||
119 | #ifdef CONFIG_SCSI_ADVANSYS | ||
120 | ADVANSYS, | ||
121 | #endif | ||
122 | |||
123 | 3. linux/drivers/scsi/Makefile: | ||
124 | |||
125 | ifdef CONFIG_SCSI_ADVANSYS | ||
126 | SCSI_SRCS := $(SCSI_SRCS) advansys.c | ||
127 | SCSI_OBJS := $(SCSI_OBJS) advansys.o | ||
128 | else | ||
129 | SCSI_MODULE_OBJS := $(SCSI_MODULE_OBJS) advansys.o | ||
130 | endif | ||
131 | |||
132 | 4. linux/init/main.c: | ||
133 | |||
134 | extern void advansys_setup(char *str, int *ints); | ||
135 | |||
136 | and add the following lines to the bootsetups[] array. | ||
137 | |||
138 | #ifdef CONFIG_SCSI_ADVANSYS | ||
139 | { "advansys=", advansys_setup }, | ||
140 | #endif | ||
141 | |||
142 | D. Source Comments | ||
143 | |||
144 | 1. Use tab stops set to 4 for the source files. For vi use 'se tabstops=4'. | ||
145 | |||
146 | 2. This driver should be maintained in multiple files. But to make | ||
147 | it easier to include with Linux and to follow Linux conventions, | ||
148 | the whole driver is maintained in the source files advansys.h and | ||
149 | advansys.c. In this file logical sections of the driver begin with | ||
150 | a comment that contains '---'. The following are the logical sections | ||
151 | of the driver below. | ||
152 | |||
153 | --- Linux Version | ||
154 | --- Linux Include File | ||
155 | --- Driver Options | ||
156 | --- Debugging Header | ||
157 | --- Asc Library Constants and Macros | ||
158 | --- Adv Library Constants and Macros | ||
159 | --- Driver Constants and Macros | ||
160 | --- Driver Structures | ||
161 | --- Driver Data | ||
162 | --- Driver Function Prototypes | ||
163 | --- Linux 'struct scsi_host_template' and advansys_setup() Functions | ||
164 | --- Loadable Driver Support | ||
165 | --- Miscellaneous Driver Functions | ||
166 | --- Functions Required by the Asc Library | ||
167 | --- Functions Required by the Adv Library | ||
168 | --- Tracing and Debugging Functions | ||
169 | --- Asc Library Functions | ||
170 | --- Adv Library Functions | ||
171 | |||
172 | 3. The string 'XXX' is used to flag code that needs to be re-written | ||
173 | or that contains a problem that needs to be addressed. | ||
174 | |||
175 | 4. I have stripped comments from and reformatted the source for the | ||
176 | Asc Library and Adv Library to reduce the size of this file. This | ||
177 | source can be found under the following headings. The Asc Library | ||
178 | is used to support Narrow Boards. The Adv Library is used to | ||
179 | support Wide Boards. | ||
180 | |||
181 | --- Asc Library Constants and Macros | ||
182 | --- Adv Library Constants and Macros | ||
183 | --- Asc Library Functions | ||
184 | --- Adv Library Functions | ||
185 | |||
186 | E. Driver Compile Time Options and Debugging | ||
187 | |||
188 | In this source file the following constants can be defined. They are | ||
189 | defined in the source below. Both of these options are enabled by | ||
190 | default. | ||
191 | |||
192 | 1. ADVANSYS_ASSERT - Enable driver assertions (Def: Enabled) | ||
193 | |||
194 | Enabling this option adds assertion logic statements to the | ||
195 | driver. If an assertion fails a message will be displayed to | ||
196 | the console, but the system will continue to operate. Any | ||
197 | assertions encountered should be reported to the person | ||
198 | responsible for the driver. Assertion statements may proactively | ||
199 | detect problems with the driver and facilitate fixing these | ||
200 | problems. Enabling assertions will add a small overhead to the | ||
201 | execution of the driver. | ||
202 | |||
203 | 2. ADVANSYS_DEBUG - Enable driver debugging (Def: Disabled) | ||
204 | |||
205 | Enabling this option adds tracing functions to the driver and | ||
206 | the ability to set a driver tracing level at boot time. This | ||
207 | option will also export symbols not required outside the driver to | ||
208 | the kernel name space. This option is very useful for debugging | ||
209 | the driver, but it will add to the size of the driver execution | ||
210 | image and add overhead to the execution of the driver. | ||
211 | |||
212 | The amount of debugging output can be controlled with the global | ||
213 | variable 'asc_dbglvl'. The higher the number the more output. By | ||
214 | default the debug level is 0. | ||
215 | |||
216 | If the driver is loaded at boot time and the LILO Driver Option | ||
217 | is included in the system, the debug level can be changed by | ||
218 | specifying a 5th (ASC_NUM_IOPORT_PROBE + 1) I/O Port. The | ||
219 | first three hex digits of the pseudo I/O Port must be set to | ||
220 | 'deb' and the fourth hex digit specifies the debug level: 0 - F. | ||
221 | The following command line will look for an adapter at 0x330 | ||
222 | and set the debug level to 2. | ||
223 | |||
224 | linux advansys=0x330,0,0,0,0xdeb2 | ||
225 | |||
226 | If the driver is built as a loadable module this variable can be | ||
227 | defined when the driver is loaded. The following insmod command | ||
228 | will set the debug level to one. | ||
229 | |||
230 | insmod advansys.o asc_dbglvl=1 | ||
231 | |||
232 | Debugging Message Levels: | ||
233 | 0: Errors Only | ||
234 | 1: High-Level Tracing | ||
235 | 2-N: Verbose Tracing | ||
236 | |||
237 | To enable debug output to console, please make sure that: | ||
238 | |||
239 | a. System and kernel logging is enabled (syslogd, klogd running). | ||
240 | b. Kernel messages are routed to console output. Check | ||
241 | /etc/syslog.conf for an entry similar to this: | ||
242 | |||
243 | kern.* /dev/console | ||
244 | |||
245 | c. klogd is started with the appropriate -c parameter | ||
246 | (e.g. klogd -c 8) | ||
247 | |||
248 | This will cause printk() messages to be be displayed on the | ||
249 | current console. Refer to the klogd(8) and syslogd(8) man pages | ||
250 | for details. | ||
251 | |||
252 | Alternatively you can enable printk() to console with this | ||
253 | program. However, this is not the 'official' way to do this. | ||
254 | Debug output is logged in /var/log/messages. | ||
255 | |||
256 | main() | ||
257 | { | ||
258 | syscall(103, 7, 0, 0); | ||
259 | } | ||
260 | |||
261 | Increasing LOG_BUF_LEN in kernel/printk.c to something like | ||
262 | 40960 allows more debug messages to be buffered in the kernel | ||
263 | and written to the console or log file. | ||
264 | |||
265 | 3. ADVANSYS_STATS - Enable statistics (Def: Enabled >= v1.3.0) | ||
266 | |||
267 | Enabling this option adds statistics collection and display | ||
268 | through /proc to the driver. The information is useful for | ||
269 | monitoring driver and device performance. It will add to the | ||
270 | size of the driver execution image and add minor overhead to | ||
271 | the execution of the driver. | ||
272 | |||
273 | Statistics are maintained on a per adapter basis. Driver entry | ||
274 | point call counts and transfer size counts are maintained. | ||
275 | Statistics are only available for kernels greater than or equal | ||
276 | to v1.3.0 with the CONFIG_PROC_FS (/proc) file system configured. | ||
277 | |||
278 | AdvanSys SCSI adapter files have the following path name format: | ||
279 | |||
280 | /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)] | ||
281 | |||
282 | This information can be displayed with cat. For example: | ||
283 | |||
284 | cat /proc/scsi/advansys/0 | ||
285 | |||
286 | When ADVANSYS_STATS is not defined the AdvanSys /proc files only | ||
287 | contain adapter and device configuration information. | ||
288 | |||
289 | F. Driver LILO Option | ||
290 | |||
291 | If init/main.c is modified as described in the 'Directions for Adding | ||
292 | the AdvanSys Driver to Linux' section (B.4.) above, the driver will | ||
293 | recognize the 'advansys' LILO command line and /etc/lilo.conf option. | ||
294 | This option can be used to either disable I/O port scanning or to limit | ||
295 | scanning to 1 - 4 I/O ports. Regardless of the option setting EISA and | ||
296 | PCI boards will still be searched for and detected. This option only | ||
297 | affects searching for ISA and VL boards. | ||
298 | |||
299 | Examples: | ||
300 | 1. Eliminate I/O port scanning: | ||
301 | boot: linux advansys= | ||
302 | or | ||
303 | boot: linux advansys=0x0 | ||
304 | 2. Limit I/O port scanning to one I/O port: | ||
305 | boot: linux advansys=0x110 | ||
306 | 3. Limit I/O port scanning to four I/O ports: | ||
307 | boot: linux advansys=0x110,0x210,0x230,0x330 | ||
308 | |||
309 | For a loadable module the same effect can be achieved by setting | ||
310 | the 'asc_iopflag' variable and 'asc_ioport' array when loading | ||
311 | the driver, e.g. | ||
312 | |||
313 | insmod advansys.o asc_iopflag=1 asc_ioport=0x110,0x330 | ||
314 | |||
315 | If ADVANSYS_DEBUG is defined a 5th (ASC_NUM_IOPORT_PROBE + 1) | ||
316 | I/O Port may be added to specify the driver debug level. Refer to | ||
317 | the 'Driver Compile Time Options and Debugging' section above for | ||
318 | more information. | ||
319 | |||
320 | G. Tests to run before releasing new driver | ||
321 | |||
322 | 1. In the supported kernels verify there are no warning or compile | ||
323 | errors when the kernel is built as both a driver and as a module | ||
324 | and with the following options: | ||
325 | |||
326 | ADVANSYS_DEBUG - enabled and disabled | ||
327 | CONFIG_SMP - enabled and disabled | ||
328 | CONFIG_PROC_FS - enabled and disabled | ||
329 | |||
330 | 2. Run tests on an x86, alpha, and PowerPC with at least one narrow | ||
331 | card and one wide card attached to a hard disk and CD-ROM drive: | ||
332 | fdisk, mkfs, fsck, bonnie, copy/compare test from the | ||
333 | CD-ROM to the hard drive. | ||
334 | |||
335 | H. Release History | ||
336 | |||
337 | BETA-1.0 (12/23/95): | ||
338 | First Release | ||
339 | |||
340 | BETA-1.1 (12/28/95): | ||
341 | 1. Prevent advansys_detect() from being called twice. | ||
342 | 2. Add LILO 0xdeb[0-f] option to set 'asc_dbglvl'. | ||
343 | |||
344 | 1.2 (1/12/96): | ||
345 | 1. Prevent re-entrancy in the interrupt handler which | ||
346 | resulted in the driver hanging Linux. | ||
347 | 2. Fix problem that prevented ABP-940 cards from being | ||
348 | recognized on some PCI motherboards. | ||
349 | 3. Add support for the ABP-5140 PnP ISA card. | ||
350 | 4. Fix check condition return status. | ||
351 | 5. Add conditionally compiled code for Linux v1.3.X. | ||
352 | |||
353 | 1.3 (2/23/96): | ||
354 | 1. Fix problem in advansys_biosparam() that resulted in the | ||
355 | wrong drive geometry being returned for drives > 1GB with | ||
356 | extended translation enabled. | ||
357 | 2. Add additional tracing during device initialization. | ||
358 | 3. Change code that only applies to ISA PnP adapter. | ||
359 | 4. Eliminate 'make dep' warning. | ||
360 | 5. Try to fix problem with handling resets by increasing their | ||
361 | timeout value. | ||
362 | |||
363 | 1.4 (5/8/96): | ||
364 | 1. Change definitions to eliminate conflicts with other subsystems. | ||
365 | 2. Add versioning code for the shared interrupt changes. | ||
366 | 3. Eliminate problem in asc_rmqueue() with iterating after removing | ||
367 | a request. | ||
368 | 4. Remove reset request loop problem from the "Known Problems or | ||
369 | Issues" section. This problem was isolated and fixed in the | ||
370 | mid-level SCSI driver. | ||
371 | |||
372 | 1.5 (8/8/96): | ||
373 | 1. Add support for ABP-940U (PCI Ultra) adapter. | ||
374 | 2. Add support for IRQ sharing by setting the IRQF_SHARED flag for | ||
375 | request_irq and supplying a dev_id pointer to both request_irq() | ||
376 | and free_irq(). | ||
377 | 3. In AscSearchIOPortAddr11() restore a call to check_region() which | ||
378 | should be used before I/O port probing. | ||
379 | 4. Fix bug in asc_prt_hex() which resulted in the displaying | ||
380 | the wrong data. | ||
381 | 5. Incorporate miscellaneous Asc Library bug fixes and new microcode. | ||
382 | 6. Change driver versioning to be specific to each Linux sub-level. | ||
383 | 7. Change statistics gathering to be per adapter instead of global | ||
384 | to the driver. | ||
385 | 8. Add more information and statistics to the adapter /proc file: | ||
386 | /proc/scsi/advansys[0...]. | ||
387 | 9. Remove 'cmd_per_lun' from the "Known Problems or Issues" list. | ||
388 | This problem has been addressed with the SCSI mid-level changes | ||
389 | made in v1.3.89. The advansys_select_queue_depths() function | ||
390 | was added for the v1.3.89 changes. | ||
391 | |||
392 | 1.6 (9/10/96): | ||
393 | 1. Incorporate miscellaneous Asc Library bug fixes and new microcode. | ||
394 | |||
395 | 1.7 (9/25/96): | ||
396 | 1. Enable clustering and optimize the setting of the maximum number | ||
397 | of scatter gather elements for any particular board. Clustering | ||
398 | increases CPU utilization, but results in a relatively larger | ||
399 | increase in I/O throughput. | ||
400 | 2. Improve the performance of the request queuing functions by | ||
401 | adding a last pointer to the queue structure. | ||
402 | 3. Correct problems with reset and abort request handling that | ||
403 | could have hung or crashed Linux. | ||
404 | 4. Add more information to the adapter /proc file: | ||
405 | /proc/scsi/advansys[0...]. | ||
406 | 5. Remove the request timeout issue form the driver issues list. | ||
407 | 6. Miscellaneous documentation additions and changes. | ||
408 | |||
409 | 1.8 (10/4/96): | ||
410 | 1. Make changes to handle the new v2.1.0 kernel memory mapping | ||
411 | in which a kernel virtual address may not be equivalent to its | ||
412 | bus or DMA memory address. | ||
413 | 2. Change abort and reset request handling to make it yet even | ||
414 | more robust. | ||
415 | 3. Try to mitigate request starvation by sending ordered requests | ||
416 | to heavily loaded, tag queuing enabled devices. | ||
417 | 4. Maintain statistics on request response time. | ||
418 | 5. Add request response time statistics and other information to | ||
419 | the adapter /proc file: /proc/scsi/advansys[0...]. | ||
420 | |||
421 | 1.9 (10/21/96): | ||
422 | 1. Add conditionally compiled code (ASC_QUEUE_FLOW_CONTROL) to | ||
423 | make use of mid-level SCSI driver device queue depth flow | ||
424 | control mechanism. This will eliminate aborts caused by a | ||
425 | device being unable to keep up with requests and eliminate | ||
426 | repeat busy or QUEUE FULL status returned by a device. | ||
427 | 2. Incorporate miscellaneous Asc Library bug fixes. | ||
428 | 3. To allow the driver to work in kernels with broken module | ||
429 | support set 'cmd_per_lun' if the driver is compiled as a | ||
430 | module. This change affects kernels v1.3.89 to present. | ||
431 | 4. Remove PCI BIOS address from the driver banner. The PCI BIOS | ||
432 | is relocated by the motherboard BIOS and its new address can | ||
433 | not be determined by the driver. | ||
434 | 5. Add mid-level SCSI queue depth information to the adapter | ||
435 | /proc file: /proc/scsi/advansys[0...]. | ||
436 | |||
437 | 2.0 (11/14/96): | ||
438 | 1. Change allocation of global structures used for device | ||
439 | initialization to guarantee they are in DMA-able memory. | ||
440 | Previously when the driver was loaded as a module these | ||
441 | structures might not have been in DMA-able memory, causing | ||
442 | device initialization to fail. | ||
443 | |||
444 | 2.1 (12/30/96): | ||
445 | 1. In advansys_reset(), if the request is a synchronous reset | ||
446 | request, even if the request serial number has changed, then | ||
447 | complete the request. | ||
448 | 2. Add Asc Library bug fixes including new microcode. | ||
449 | 3. Clear inquiry buffer before using it. | ||
450 | 4. Correct ifdef typo. | ||
451 | |||
452 | 2.2 (1/15/97): | ||
453 | 1. Add Asc Library bug fixes including new microcode. | ||
454 | 2. Add synchronous data transfer rate information to the | ||
455 | adapter /proc file: /proc/scsi/advansys[0...]. | ||
456 | 3. Change ADVANSYS_DEBUG to be disabled by default. This | ||
457 | will reduce the size of the driver image, eliminate execution | ||
458 | overhead, and remove unneeded symbols from the kernel symbol | ||
459 | space that were previously added by the driver. | ||
460 | 4. Add new compile-time option ADVANSYS_ASSERT for assertion | ||
461 | code that used to be defined within ADVANSYS_DEBUG. This | ||
462 | option is enabled by default. | ||
463 | |||
464 | 2.8 (5/26/97): | ||
465 | 1. Change version number to 2.8 to synchronize the Linux driver | ||
466 | version numbering with other AdvanSys drivers. | ||
467 | 2. Reformat source files without tabs to present the same view | ||
468 | of the file to everyone regardless of the editor tab setting | ||
469 | being used. | ||
470 | 3. Add Asc Library bug fixes. | ||
471 | |||
472 | 3.1A (1/8/98): | ||
473 | 1. Change version number to 3.1 to indicate that support for | ||
474 | Ultra-Wide adapters (ABP-940UW) is included in this release. | ||
475 | 2. Add Asc Library (Narrow Board) bug fixes. | ||
476 | 3. Report an underrun condition with the host status byte set | ||
477 | to DID_UNDERRUN. Currently DID_UNDERRUN is defined to 0 which | ||
478 | causes the underrun condition to be ignored. When Linux defines | ||
479 | its own DID_UNDERRUN the constant defined in this file can be | ||
480 | removed. | ||
481 | 4. Add patch to AscWaitTixISRDone(). | ||
482 | 5. Add support for up to 16 different AdvanSys host adapter SCSI | ||
483 | channels in one system. This allows four cards with four channels | ||
484 | to be used in one system. | ||
485 | |||
486 | 3.1B (1/9/98): | ||
487 | 1. Handle that PCI register base addresses are not always page | ||
488 | aligned even though ioremap() requires that the address argument | ||
489 | be page aligned. | ||
490 | |||
491 | 3.1C (1/10/98): | ||
492 | 1. Update latest BIOS version checked for from the /proc file. | ||
493 | 2. Don't set microcode SDTR variable at initialization. Instead | ||
494 | wait until device capabilities have been detected from an Inquiry | ||
495 | command. | ||
496 | |||
497 | 3.1D (1/21/98): | ||
498 | 1. Improve performance when the driver is compiled as module by | ||
499 | allowing up to 64 scatter-gather elements instead of 8. | ||
500 | |||
501 | 3.1E (5/1/98): | ||
502 | 1. Set time delay in AscWaitTixISRDone() to 1000 ms. | ||
503 | 2. Include SMP locking changes. | ||
504 | 3. For v2.1.93 and newer kernels use CONFIG_PCI and new PCI BIOS | ||
505 | access functions. | ||
506 | 4. Update board serial number printing. | ||
507 | 5. Try allocating an IRQ both with and without the IRQF_DISABLED | ||
508 | flag set to allow IRQ sharing with drivers that do not set | ||
509 | the IRQF_DISABLED flag. Also display a more descriptive error | ||
510 | message if request_irq() fails. | ||
511 | 6. Update to latest Asc and Adv Libraries. | ||
512 | |||
513 | 3.2A (7/22/99): | ||
514 | 1. Update Adv Library to 4.16 which includes support for | ||
515 | the ASC38C0800 (Ultra2/LVD) IC. | ||
516 | |||
517 | 3.2B (8/23/99): | ||
518 | 1. Correct PCI compile time option for v2.1.93 and greater | ||
519 | kernels, advansys_info() string, and debug compile time | ||
520 | option. | ||
521 | 2. Correct DvcSleepMilliSecond() for v2.1.0 and greater | ||
522 | kernels. This caused an LVD detection/BIST problem problem | ||
523 | among other things. | ||
524 | 3. Sort PCI cards by PCI Bus, Slot, Function ascending order | ||
525 | to be consistent with the BIOS. | ||
526 | 4. Update to Asc Library S121 and Adv Library 5.2. | ||
527 | |||
528 | 3.2C (8/24/99): | ||
529 | 1. Correct PCI card detection bug introduced in 3.2B that | ||
530 | prevented PCI cards from being detected in kernels older | ||
531 | than v2.1.93. | ||
532 | |||
533 | 3.2D (8/26/99): | ||
534 | 1. Correct /proc device synchronous speed information display. | ||
535 | Also when re-negotiation is pending for a target device | ||
536 | note this condition with an * and footnote. | ||
537 | 2. Correct initialization problem with Ultra-Wide cards that | ||
538 | have a pre-3.2 BIOS. A microcode variable changed locations | ||
539 | in 3.2 and greater BIOSes which caused WDTR to be attempted | ||
540 | erroneously with drives that don't support WDTR. | ||
541 | |||
542 | 3.2E (8/30/99): | ||
543 | 1. Fix compile error caused by v2.3.13 PCI structure change. | ||
544 | 2. Remove field from ASCEEP_CONFIG that resulted in an EEPROM | ||
545 | checksum error for ISA cards. | ||
546 | 3. Remove ASC_QUEUE_FLOW_CONTROL conditional code. The mid-level | ||
547 | SCSI changes that it depended on were never included in Linux. | ||
548 | |||
549 | 3.2F (9/3/99): | ||
550 | 1. Handle new initial function code added in v2.3.16 for all | ||
551 | driver versions. | ||
552 | |||
553 | 3.2G (9/8/99): | ||
554 | 1. Fix PCI board detection in v2.3.13 and greater kernels. | ||
555 | 2. Fix comiple errors in v2.3.X with debugging enabled. | ||
556 | |||
557 | 3.2H (9/13/99): | ||
558 | 1. Add 64-bit address, long support for Alpha and UltraSPARC. | ||
559 | The driver has been verified to work on an Alpha system. | ||
560 | 2. Add partial byte order handling support for Power PC and | ||
561 | other big-endian platforms. This support has not yet been | ||
562 | completed or verified. | ||
563 | 3. For wide boards replace block zeroing of request and | ||
564 | scatter-gather structures with individual field initialization | ||
565 | to improve performance. | ||
566 | 4. Correct and clarify ROM BIOS version detection. | ||
567 | |||
568 | 3.2I (10/8/99): | ||
569 | 1. Update to Adv Library 5.4. | ||
570 | 2. Add v2.3.19 underrun reporting to asc_isr_callback() and | ||
571 | adv_isr_callback(). Remove DID_UNDERRUN constant and other | ||
572 | no longer needed code that previously documented the lack | ||
573 | of underrun handling. | ||
574 | |||
575 | 3.2J (10/14/99): | ||
576 | 1. Eliminate compile errors for v2.0 and earlier kernels. | ||
577 | |||
578 | 3.2K (11/15/99): | ||
579 | 1. Correct debug compile error in asc_prt_adv_scsi_req_q(). | ||
580 | 2. Update Adv Library to 5.5. | ||
581 | 3. Add ifdef handling for /proc changes added in v2.3.28. | ||
582 | 4. Increase Wide board scatter-gather list maximum length to | ||
583 | 255 when the driver is compiled into the kernel. | ||
584 | |||
585 | 3.2L (11/18/99): | ||
586 | 1. Fix bug in adv_get_sglist() that caused an assertion failure | ||
587 | at line 7475. The reqp->sgblkp pointer must be initialized | ||
588 | to NULL in adv_get_sglist(). | ||
589 | |||
590 | 3.2M (11/29/99): | ||
591 | 1. Really fix bug in adv_get_sglist(). | ||
592 | 2. Incorporate v2.3.29 changes into driver. | ||
593 | |||
594 | 3.2N (4/1/00): | ||
595 | 1. Add CONFIG_ISA ifdef code. | ||
596 | 2. Include advansys_interrupts_enabled name change patch. | ||
597 | 3. For >= v2.3.28 use new SCSI error handling with new function | ||
598 | advansys_eh_bus_reset(). Don't include an abort function | ||
599 | because of base library limitations. | ||
600 | 4. For >= v2.3.28 use per board lock instead of io_request_lock. | ||
601 | 5. For >= v2.3.28 eliminate advansys_command() and | ||
602 | advansys_command_done(). | ||
603 | 6. Add some changes for PowerPC (Big Endian) support, but it isn't | ||
604 | working yet. | ||
605 | 7. Fix "nonexistent resource free" problem that occurred on a module | ||
606 | unload for boards with an I/O space >= 255. The 'n_io_port' field | ||
607 | is only one byte and can not be used to hold an ioport length more | ||
608 | than 255. | ||
609 | |||
610 | 3.3A (4/4/00): | ||
611 | 1. Update to Adv Library 5.8. | ||
612 | 2. For wide cards add support for CDBs up to 16 bytes. | ||
613 | 3. Eliminate warnings when CONFIG_PROC_FS is not defined. | ||
614 | |||
615 | 3.3B (5/1/00): | ||
616 | 1. Support for PowerPC (Big Endian) wide cards. Narrow cards | ||
617 | still need work. | ||
618 | 2. Change bitfields to shift and mask access for endian | ||
619 | portability. | ||
620 | |||
621 | 3.3C (10/13/00): | ||
622 | 1. Update for latest 2.4 kernel. | ||
623 | 2. Test ABP-480 CardBus support in 2.4 kernel - works! | ||
624 | 3. Update to Asc Library S123. | ||
625 | 4. Update to Adv Library 5.12. | ||
626 | |||
627 | 3.3D (11/22/00): | ||
628 | 1. Update for latest 2.4 kernel. | ||
629 | 2. Create patches for 2.2 and 2.4 kernels. | ||
630 | |||
631 | 3.3E (1/9/01): | ||
632 | 1. Now that 2.4 is released remove ifdef code for kernel versions | ||
633 | less than 2.2. The driver is now only supported in kernels 2.2, | ||
634 | 2.4, and greater. | ||
635 | 2. Add code to release and acquire the io_request_lock in | ||
636 | the driver entrypoint functions: advansys_detect and | ||
637 | advansys_queuecommand. In kernel 2.4 the SCSI mid-level driver | ||
638 | still holds the io_request_lock on entry to SCSI low-level drivers. | ||
639 | This was supposed to be removed before 2.4 was released but never | ||
640 | happened. When the mid-level SCSI driver is changed all references | ||
641 | to the io_request_lock should be removed from the driver. | ||
642 | 3. Simplify error handling by removing advansys_abort(), | ||
643 | AscAbortSRB(), AscResetDevice(). SCSI bus reset requests are | ||
644 | now handled by resetting the SCSI bus and fully re-initializing | ||
645 | the chip. This simple method of error recovery has proven to work | ||
646 | most reliably after attempts at different methods. Also now only | ||
647 | support the "new" error handling method and remove the obsolete | ||
648 | error handling interface. | ||
649 | 4. Fix debug build errors. | ||
650 | |||
651 | 3.3F (1/24/01): | ||
652 | 1. Merge with ConnectCom version from Andy Kellner which | ||
653 | updates Adv Library to 5.14. | ||
654 | 2. Make PowerPC (Big Endian) work for narrow cards and | ||
655 | fix problems writing EEPROM for wide cards. | ||
656 | 3. Remove interrupts_enabled assertion function. | ||
657 | |||
658 | 3.3G (2/16/01): | ||
659 | 1. Return an error from narrow boards if passed a 16 byte | ||
660 | CDB. The wide board can already handle 16 byte CDBs. | ||
661 | |||
662 | 3.3GJ (4/15/02): | ||
663 | 1. hacks for lk 2.5 series (D. Gilbert) | ||
664 | |||
665 | 3.3GJD (10/14/02): | ||
666 | 1. change select_queue_depths to slave_configure | ||
667 | 2. make cmd_per_lun be sane again | ||
668 | |||
669 | 3.3K [2004/06/24]: | ||
670 | 1. continuing cleanup for lk 2.6 series | ||
671 | 2. Fix problem in lk 2.6.7-bk2 that broke PCI wide cards | ||
672 | 3. Fix problem that oopsed ISA cards | ||
673 | |||
674 | I. Known Problems/Fix List (XXX) | ||
675 | |||
676 | 1. Need to add memory mapping workaround. Test the memory mapping. | ||
677 | If it doesn't work revert to I/O port access. Can a test be done | ||
678 | safely? | ||
679 | 2. Handle an interrupt not working. Keep an interrupt counter in | ||
680 | the interrupt handler. In the timeout function if the interrupt | ||
681 | has not occurred then print a message and run in polled mode. | ||
682 | 3. Allow bus type scanning order to be changed. | ||
683 | 4. Need to add support for target mode commands, cf. CAM XPT. | ||
684 | |||
685 | J. Credits (Chronological Order) | ||
686 | |||
687 | Bob Frey <bfrey@turbolinux.com.cn> wrote the AdvanSys SCSI driver | ||
688 | and maintained it up to 3.3F. He continues to answer questions | ||
689 | and help maintain the driver. | ||
690 | |||
691 | Nathan Hartwell <mage@cdc3.cdc.net> provided the directions and | ||
692 | basis for the Linux v1.3.X changes which were included in the | ||
693 | 1.2 release. | ||
694 | |||
695 | Thomas E Zerucha <zerucha@shell.portal.com> pointed out a bug | ||
696 | in advansys_biosparam() which was fixed in the 1.3 release. | ||
697 | |||
698 | Erik Ratcliffe <erik@caldera.com> has done testing of the | ||
699 | AdvanSys driver in the Caldera releases. | ||
700 | |||
701 | Rik van Riel <H.H.vanRiel@fys.ruu.nl> provided a patch to | ||
702 | AscWaitTixISRDone() which he found necessary to make the | ||
703 | driver work with a SCSI-1 disk. | ||
704 | |||
705 | Mark Moran <mmoran@mmoran.com> has helped test Ultra-Wide | ||
706 | support in the 3.1A driver. | ||
707 | |||
708 | Doug Gilbert <dgilbert@interlog.com> has made changes and | ||
709 | suggestions to improve the driver and done a lot of testing. | ||
710 | |||
711 | Ken Mort <ken@mort.net> reported a DEBUG compile bug fixed | ||
712 | in 3.2K. | ||
713 | |||
714 | Tom Rini <trini@kernel.crashing.org> provided the CONFIG_ISA | ||
715 | patch and helped with PowerPC wide and narrow board support. | ||
716 | |||
717 | Philip Blundell <philb@gnu.org> provided an | ||
718 | advansys_interrupts_enabled patch. | ||
719 | |||
720 | Dave Jones <dave@denial.force9.co.uk> reported the compiler | ||
721 | warnings generated when CONFIG_PROC_FS was not defined in | ||
722 | the 3.2M driver. | ||
723 | |||
724 | Jerry Quinn <jlquinn@us.ibm.com> fixed PowerPC support (endian | ||
725 | problems) for wide cards. | ||
726 | |||
727 | Bryan Henderson <bryanh@giraffe-data.com> helped debug narrow | ||
728 | card error handling. | ||
729 | |||
730 | Manuel Veloso <veloso@pobox.com> worked hard on PowerPC narrow | ||
731 | board support and fixed a bug in AscGetEEPConfig(). | ||
732 | |||
733 | Arnaldo Carvalho de Melo <acme@conectiva.com.br> made | ||
734 | save_flags/restore_flags changes. | ||
735 | |||
736 | Andy Kellner <AKellner@connectcom.net> continues the Advansys SCSI | ||
737 | driver development for ConnectCom (Version > 3.3F). | ||
738 | |||
739 | K. ConnectCom (AdvanSys) Contact Information | ||
740 | |||
741 | Mail: ConnectCom Solutions, Inc. | ||
742 | 1150 Ringwood Court | ||
743 | San Jose, CA 95131 | ||
744 | Operator/Sales: 1-408-383-9400 | ||
745 | FAX: 1-408-383-9612 | ||
746 | Tech Support: 1-408-467-2930 | ||
747 | Tech Support E-Mail: linux@connectcom.net | ||
748 | FTP Site: ftp.connectcom.net (login: anonymous) | ||
749 | Web Site: http://www.connectcom.net | ||
750 | |||
751 | */ | ||
752 | |||
753 | /* | ||
754 | * --- Linux Include Files | ||
755 | */ | 22 | */ |
756 | 23 | ||
757 | #include <linux/module.h> | 24 | #include <linux/module.h> |
758 | |||
759 | #if defined(CONFIG_X86) && !defined(CONFIG_ISA) | ||
760 | #define CONFIG_ISA | ||
761 | #endif /* CONFIG_X86 && !CONFIG_ISA */ | ||
762 | |||
763 | #include <linux/string.h> | 25 | #include <linux/string.h> |
764 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
765 | #include <linux/types.h> | 27 | #include <linux/types.h> |
@@ -771,7 +33,9 @@ | |||
771 | #include <linux/proc_fs.h> | 33 | #include <linux/proc_fs.h> |
772 | #include <linux/init.h> | 34 | #include <linux/init.h> |
773 | #include <linux/blkdev.h> | 35 | #include <linux/blkdev.h> |
774 | #include <linux/stat.h> | 36 | #include <linux/isa.h> |
37 | #include <linux/eisa.h> | ||
38 | #include <linux/pci.h> | ||
775 | #include <linux/spinlock.h> | 39 | #include <linux/spinlock.h> |
776 | #include <linux/dma-mapping.h> | 40 | #include <linux/dma-mapping.h> |
777 | 41 | ||
@@ -779,49 +43,38 @@ | |||
779 | #include <asm/system.h> | 43 | #include <asm/system.h> |
780 | #include <asm/dma.h> | 44 | #include <asm/dma.h> |
781 | 45 | ||
782 | /* FIXME: (by jejb@steeleye.com) This warning is present for two | ||
783 | * reasons: | ||
784 | * | ||
785 | * 1) This driver badly needs converting to the correct driver model | ||
786 | * probing API | ||
787 | * | ||
788 | * 2) Although all of the necessary command mapping places have the | ||
789 | * appropriate dma_map.. APIs, the driver still processes its internal | ||
790 | * queue using bus_to_virt() and virt_to_bus() which are illegal under | ||
791 | * the API. The entire queue processing structure will need to be | ||
792 | * altered to fix this. | ||
793 | */ | ||
794 | #warning this driver is still not properly converted to the DMA API | ||
795 | |||
796 | #include <scsi/scsi_cmnd.h> | 46 | #include <scsi/scsi_cmnd.h> |
797 | #include <scsi/scsi_device.h> | 47 | #include <scsi/scsi_device.h> |
798 | #include <scsi/scsi_tcq.h> | 48 | #include <scsi/scsi_tcq.h> |
799 | #include <scsi/scsi.h> | 49 | #include <scsi/scsi.h> |
800 | #include <scsi/scsi_host.h> | 50 | #include <scsi/scsi_host.h> |
801 | #ifdef CONFIG_PCI | ||
802 | #include <linux/pci.h> | ||
803 | #endif /* CONFIG_PCI */ | ||
804 | 51 | ||
805 | /* | 52 | /* FIXME: |
806 | * --- Driver Options | 53 | * |
54 | * 1. Although all of the necessary command mapping places have the | ||
55 | * appropriate dma_map.. APIs, the driver still processes its internal | ||
56 | * queue using bus_to_virt() and virt_to_bus() which are illegal under | ||
57 | * the API. The entire queue processing structure will need to be | ||
58 | * altered to fix this. | ||
59 | * 2. Need to add memory mapping workaround. Test the memory mapping. | ||
60 | * If it doesn't work revert to I/O port access. Can a test be done | ||
61 | * safely? | ||
62 | * 3. Handle an interrupt not working. Keep an interrupt counter in | ||
63 | * the interrupt handler. In the timeout function if the interrupt | ||
64 | * has not occurred then print a message and run in polled mode. | ||
65 | * 4. Need to add support for target mode commands, cf. CAM XPT. | ||
66 | * 5. check DMA mapping functions for failure | ||
67 | * 6. Use scsi_transport_spi | ||
68 | * 7. advansys_info is not safe against multiple simultaneous callers | ||
69 | * 8. Add module_param to override ISA/VLB ioport array | ||
807 | */ | 70 | */ |
808 | 71 | #warning this driver is still not properly converted to the DMA API | |
809 | /* Enable driver assertions. */ | ||
810 | #define ADVANSYS_ASSERT | ||
811 | 72 | ||
812 | /* Enable driver /proc statistics. */ | 73 | /* Enable driver /proc statistics. */ |
813 | #define ADVANSYS_STATS | 74 | #define ADVANSYS_STATS |
814 | 75 | ||
815 | /* Enable driver tracing. */ | 76 | /* Enable driver tracing. */ |
816 | /* #define ADVANSYS_DEBUG */ | 77 | #undef ADVANSYS_DEBUG |
817 | |||
818 | /* | ||
819 | * --- Asc Library Constants and Macros | ||
820 | */ | ||
821 | |||
822 | #define ASC_LIB_VERSION_MAJOR 1 | ||
823 | #define ASC_LIB_VERSION_MINOR 24 | ||
824 | #define ASC_LIB_SERIAL_NUMBER 123 | ||
825 | 78 | ||
826 | /* | 79 | /* |
827 | * Portable Data Types | 80 | * Portable Data Types |
@@ -837,17 +90,6 @@ | |||
837 | #define ASC_DCNT __u32 /* Unsigned Data count type. */ | 90 | #define ASC_DCNT __u32 /* Unsigned Data count type. */ |
838 | #define ASC_SDCNT __s32 /* Signed Data count type. */ | 91 | #define ASC_SDCNT __s32 /* Signed Data count type. */ |
839 | 92 | ||
840 | /* | ||
841 | * These macros are used to convert a virtual address to a | ||
842 | * 32-bit value. This currently can be used on Linux Alpha | ||
843 | * which uses 64-bit virtual address but a 32-bit bus address. | ||
844 | * This is likely to break in the future, but doing this now | ||
845 | * will give us time to change the HW and FW to handle 64-bit | ||
846 | * addresses. | ||
847 | */ | ||
848 | #define ASC_VADDR_TO_U32 virt_to_bus | ||
849 | #define ASC_U32_TO_VADDR bus_to_virt | ||
850 | |||
851 | typedef unsigned char uchar; | 93 | typedef unsigned char uchar; |
852 | 94 | ||
853 | #ifndef TRUE | 95 | #ifndef TRUE |
@@ -857,29 +99,9 @@ typedef unsigned char uchar; | |||
857 | #define FALSE (0) | 99 | #define FALSE (0) |
858 | #endif | 100 | #endif |
859 | 101 | ||
860 | #define EOF (-1) | ||
861 | #define ERR (-1) | 102 | #define ERR (-1) |
862 | #define UW_ERR (uint)(0xFFFF) | 103 | #define UW_ERR (uint)(0xFFFF) |
863 | #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0) | 104 | #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0) |
864 | #define AscPCIConfigVendorIDRegister 0x0000 | ||
865 | #define AscPCIConfigDeviceIDRegister 0x0002 | ||
866 | #define AscPCIConfigCommandRegister 0x0004 | ||
867 | #define AscPCIConfigStatusRegister 0x0006 | ||
868 | #define AscPCIConfigRevisionIDRegister 0x0008 | ||
869 | #define AscPCIConfigCacheSize 0x000C | ||
870 | #define AscPCIConfigLatencyTimer 0x000D | ||
871 | #define AscPCIIOBaseRegister 0x0010 | ||
872 | #define AscPCICmdRegBits_IOMemBusMaster 0x0007 | ||
873 | #define ASC_PCI_ID2BUS(id) ((id) & 0xFF) | ||
874 | #define ASC_PCI_ID2DEV(id) (((id) >> 11) & 0x1F) | ||
875 | #define ASC_PCI_ID2FUNC(id) (((id) >> 8) & 0x7) | ||
876 | #define ASC_PCI_MKID(bus, dev, func) ((((dev) & 0x1F) << 11) | (((func) & 0x7) << 8) | ((bus) & 0xFF)) | ||
877 | #define ASC_PCI_REVISION_3150 0x02 | ||
878 | #define ASC_PCI_REVISION_3050 0x03 | ||
879 | |||
880 | #define ASC_DVCLIB_CALL_DONE (1) | ||
881 | #define ASC_DVCLIB_CALL_FAILED (0) | ||
882 | #define ASC_DVCLIB_CALL_ERROR (-1) | ||
883 | 105 | ||
884 | #define PCI_VENDOR_ID_ASP 0x10cd | 106 | #define PCI_VENDOR_ID_ASP 0x10cd |
885 | #define PCI_DEVICE_ID_ASP_1200A 0x1100 | 107 | #define PCI_DEVICE_ID_ASP_1200A 0x1100 |
@@ -898,7 +120,7 @@ typedef unsigned char uchar; | |||
898 | #define CC_VERY_LONG_SG_LIST 0 | 120 | #define CC_VERY_LONG_SG_LIST 0 |
899 | #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr) | 121 | #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr) |
900 | 122 | ||
901 | #define PortAddr unsigned short /* port address size */ | 123 | #define PortAddr unsigned int /* port address size */ |
902 | #define inp(port) inb(port) | 124 | #define inp(port) inb(port) |
903 | #define outp(port, byte) outb((byte), (port)) | 125 | #define outp(port, byte) outb((byte), (port)) |
904 | 126 | ||
@@ -918,11 +140,10 @@ typedef unsigned char uchar; | |||
918 | #define ASC_IS_PCMCIA (0x0008) | 140 | #define ASC_IS_PCMCIA (0x0008) |
919 | #define ASC_IS_MCA (0x0020) | 141 | #define ASC_IS_MCA (0x0020) |
920 | #define ASC_IS_VL (0x0040) | 142 | #define ASC_IS_VL (0x0040) |
921 | #define ASC_ISA_PNP_PORT_ADDR (0x279) | ||
922 | #define ASC_ISA_PNP_PORT_WRITE (ASC_ISA_PNP_PORT_ADDR+0x800) | ||
923 | #define ASC_IS_WIDESCSI_16 (0x0100) | 143 | #define ASC_IS_WIDESCSI_16 (0x0100) |
924 | #define ASC_IS_WIDESCSI_32 (0x0200) | 144 | #define ASC_IS_WIDESCSI_32 (0x0200) |
925 | #define ASC_IS_BIG_ENDIAN (0x8000) | 145 | #define ASC_IS_BIG_ENDIAN (0x8000) |
146 | |||
926 | #define ASC_CHIP_MIN_VER_VL (0x01) | 147 | #define ASC_CHIP_MIN_VER_VL (0x01) |
927 | #define ASC_CHIP_MAX_VER_VL (0x07) | 148 | #define ASC_CHIP_MAX_VER_VL (0x07) |
928 | #define ASC_CHIP_MIN_VER_PCI (0x09) | 149 | #define ASC_CHIP_MIN_VER_PCI (0x09) |
@@ -941,16 +162,9 @@ typedef unsigned char uchar; | |||
941 | #define ASC_CHIP_MAX_VER_EISA (0x47) | 162 | #define ASC_CHIP_MAX_VER_EISA (0x47) |
942 | #define ASC_CHIP_VER_EISA_BIT (0x40) | 163 | #define ASC_CHIP_VER_EISA_BIT (0x40) |
943 | #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3) | 164 | #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3) |
944 | #define ASC_MAX_LIB_SUPPORTED_ISA_CHIP_VER 0x21 | ||
945 | #define ASC_MAX_LIB_SUPPORTED_PCI_CHIP_VER 0x0A | ||
946 | #define ASC_MAX_VL_DMA_ADDR (0x07FFFFFFL) | ||
947 | #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL) | 165 | #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL) |
948 | #define ASC_MAX_PCI_DMA_ADDR (0xFFFFFFFFL) | ||
949 | #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL) | 166 | #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL) |
950 | #define ASC_MAX_ISA_DMA_ADDR (0x00FFFFFFL) | ||
951 | #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL) | 167 | #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL) |
952 | #define ASC_MAX_EISA_DMA_ADDR (0x07FFFFFFL) | ||
953 | #define ASC_MAX_EISA_DMA_COUNT (0x07FFFFFFL) | ||
954 | 168 | ||
955 | #define ASC_SCSI_ID_BITS 3 | 169 | #define ASC_SCSI_ID_BITS 3 |
956 | #define ASC_SCSI_TIX_TYPE uchar | 170 | #define ASC_SCSI_TIX_TYPE uchar |
@@ -961,82 +175,17 @@ typedef unsigned char uchar; | |||
961 | #define ASC_SCSI_WIDTH_BIT_SET 0xFF | 175 | #define ASC_SCSI_WIDTH_BIT_SET 0xFF |
962 | #define ASC_MAX_SENSE_LEN 32 | 176 | #define ASC_MAX_SENSE_LEN 32 |
963 | #define ASC_MIN_SENSE_LEN 14 | 177 | #define ASC_MIN_SENSE_LEN 14 |
964 | #define ASC_MAX_CDB_LEN 12 | ||
965 | #define ASC_SCSI_RESET_HOLD_TIME_US 60 | 178 | #define ASC_SCSI_RESET_HOLD_TIME_US 60 |
966 | 179 | ||
967 | #define ADV_INQ_CLOCKING_ST_ONLY 0x0 | ||
968 | #define ADV_INQ_CLOCKING_DT_ONLY 0x1 | ||
969 | #define ADV_INQ_CLOCKING_ST_AND_DT 0x3 | ||
970 | |||
971 | /* | 180 | /* |
972 | * Inquiry SPC-2 SPI Byte 1 EVPD (Enable Vital Product Data) | 181 | * Narrow boards only support 12-byte commands, while wide boards |
973 | * and CmdDt (Command Support Data) field bit definitions. | 182 | * extend to 16-byte commands. |
974 | */ | 183 | */ |
975 | #define ADV_INQ_RTN_VPD_AND_CMDDT 0x3 | 184 | #define ASC_MAX_CDB_LEN 12 |
976 | #define ADV_INQ_RTN_CMDDT_FOR_OP_CODE 0x2 | 185 | #define ADV_MAX_CDB_LEN 16 |
977 | #define ADV_INQ_RTN_VPD_FOR_PG_CODE 0x1 | 186 | |
978 | #define ADV_INQ_RTN_STD_INQUIRY_DATA 0x0 | ||
979 | |||
980 | #define ASC_SCSIDIR_NOCHK 0x00 | ||
981 | #define ASC_SCSIDIR_T2H 0x08 | ||
982 | #define ASC_SCSIDIR_H2T 0x10 | ||
983 | #define ASC_SCSIDIR_NODATA 0x18 | ||
984 | #define SCSI_ASC_NOMEDIA 0x3A | ||
985 | #define ASC_SRB_HOST(x) ((uchar)((uchar)(x) >> 4)) | ||
986 | #define ASC_SRB_TID(x) ((uchar)((uchar)(x) & (uchar)0x0F)) | ||
987 | #define ASC_SRB_LUN(x) ((uchar)((uint)(x) >> 13)) | ||
988 | #define PUT_CDB1(x) ((uchar)((uint)(x) >> 8)) | ||
989 | #define MS_CMD_DONE 0x00 | ||
990 | #define MS_EXTEND 0x01 | ||
991 | #define MS_SDTR_LEN 0x03 | 187 | #define MS_SDTR_LEN 0x03 |
992 | #define MS_SDTR_CODE 0x01 | ||
993 | #define MS_WDTR_LEN 0x02 | 188 | #define MS_WDTR_LEN 0x02 |
994 | #define MS_WDTR_CODE 0x03 | ||
995 | #define MS_MDP_LEN 0x05 | ||
996 | #define MS_MDP_CODE 0x00 | ||
997 | |||
998 | /* | ||
999 | * Inquiry data structure and bitfield macros | ||
1000 | * | ||
1001 | * Only quantities of more than 1 bit are shifted, since the others are | ||
1002 | * just tested for true or false. C bitfields aren't portable between big | ||
1003 | * and little-endian platforms so they are not used. | ||
1004 | */ | ||
1005 | |||
1006 | #define ASC_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f) | ||
1007 | #define ASC_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5) | ||
1008 | #define ASC_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f) | ||
1009 | #define ASC_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80) | ||
1010 | #define ASC_INQ_ANSI_VER(inq) ((inq)->ver & 0x07) | ||
1011 | #define ASC_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3) | ||
1012 | #define ASC_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6) | ||
1013 | #define ASC_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f) | ||
1014 | #define ASC_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40) | ||
1015 | #define ASC_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80) | ||
1016 | #define ASC_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01) | ||
1017 | #define ASC_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02) | ||
1018 | #define ASC_INQ_LINK_CMD(inq) ((inq)->flags & 0x08) | ||
1019 | #define ASC_INQ_SYNC(inq) ((inq)->flags & 0x10) | ||
1020 | #define ASC_INQ_WIDE16(inq) ((inq)->flags & 0x20) | ||
1021 | #define ASC_INQ_WIDE32(inq) ((inq)->flags & 0x40) | ||
1022 | #define ASC_INQ_REL_ADDR(inq) ((inq)->flags & 0x80) | ||
1023 | #define ASC_INQ_INFO_UNIT(inq) ((inq)->info & 0x01) | ||
1024 | #define ASC_INQ_QUICK_ARB(inq) ((inq)->info & 0x02) | ||
1025 | #define ASC_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) | ||
1026 | |||
1027 | typedef struct { | ||
1028 | uchar periph; | ||
1029 | uchar devtype; | ||
1030 | uchar ver; | ||
1031 | uchar byte3; | ||
1032 | uchar add_len; | ||
1033 | uchar res1; | ||
1034 | uchar res2; | ||
1035 | uchar flags; | ||
1036 | uchar vendor_id[8]; | ||
1037 | uchar product_id[16]; | ||
1038 | uchar product_rev_level[4]; | ||
1039 | } ASC_SCSI_INQUIRY; | ||
1040 | 189 | ||
1041 | #define ASC_SG_LIST_PER_Q 7 | 190 | #define ASC_SG_LIST_PER_Q 7 |
1042 | #define QS_FREE 0x00 | 191 | #define QS_FREE 0x00 |
@@ -1215,22 +364,9 @@ typedef struct asc_sg_head { | |||
1215 | ushort queue_cnt; | 364 | ushort queue_cnt; |
1216 | ushort entry_to_copy; | 365 | ushort entry_to_copy; |
1217 | ushort res; | 366 | ushort res; |
1218 | ASC_SG_LIST sg_list[ASC_MAX_SG_LIST]; | 367 | ASC_SG_LIST sg_list[0]; |
1219 | } ASC_SG_HEAD; | 368 | } ASC_SG_HEAD; |
1220 | 369 | ||
1221 | #define ASC_MIN_SG_LIST 2 | ||
1222 | |||
1223 | typedef struct asc_min_sg_head { | ||
1224 | ushort entry_cnt; | ||
1225 | ushort queue_cnt; | ||
1226 | ushort entry_to_copy; | ||
1227 | ushort res; | ||
1228 | ASC_SG_LIST sg_list[ASC_MIN_SG_LIST]; | ||
1229 | } ASC_MIN_SG_HEAD; | ||
1230 | |||
1231 | #define QCX_SORT (0x0001) | ||
1232 | #define QCX_COALEASE (0x0002) | ||
1233 | |||
1234 | typedef struct asc_scsi_q { | 370 | typedef struct asc_scsi_q { |
1235 | ASC_SCSIQ_1 q1; | 371 | ASC_SCSIQ_1 q1; |
1236 | ASC_SCSIQ_2 q2; | 372 | ASC_SCSIQ_2 q2; |
@@ -1287,45 +423,12 @@ typedef struct asc_risc_sg_list_q { | |||
1287 | ASC_SG_LIST sg_list[7]; | 423 | ASC_SG_LIST sg_list[7]; |
1288 | } ASC_RISC_SG_LIST_Q; | 424 | } ASC_RISC_SG_LIST_Q; |
1289 | 425 | ||
1290 | #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL | ||
1291 | #define ASC_EXE_SCSI_IO_MAX_WAIT_LOOP 1024 | ||
1292 | #define ASCQ_ERR_NO_ERROR 0 | ||
1293 | #define ASCQ_ERR_IO_NOT_FOUND 1 | ||
1294 | #define ASCQ_ERR_LOCAL_MEM 2 | ||
1295 | #define ASCQ_ERR_CHKSUM 3 | ||
1296 | #define ASCQ_ERR_START_CHIP 4 | ||
1297 | #define ASCQ_ERR_INT_TARGET_ID 5 | ||
1298 | #define ASCQ_ERR_INT_LOCAL_MEM 6 | ||
1299 | #define ASCQ_ERR_HALT_RISC 7 | ||
1300 | #define ASCQ_ERR_GET_ASPI_ENTRY 8 | ||
1301 | #define ASCQ_ERR_CLOSE_ASPI 9 | ||
1302 | #define ASCQ_ERR_HOST_INQUIRY 0x0A | ||
1303 | #define ASCQ_ERR_SAVED_SRB_BAD 0x0B | ||
1304 | #define ASCQ_ERR_QCNTL_SG_LIST 0x0C | ||
1305 | #define ASCQ_ERR_Q_STATUS 0x0D | 426 | #define ASCQ_ERR_Q_STATUS 0x0D |
1306 | #define ASCQ_ERR_WR_SCSIQ 0x0E | ||
1307 | #define ASCQ_ERR_PC_ADDR 0x0F | ||
1308 | #define ASCQ_ERR_SYN_OFFSET 0x10 | ||
1309 | #define ASCQ_ERR_SYN_XFER_TIME 0x11 | ||
1310 | #define ASCQ_ERR_LOCK_DMA 0x12 | ||
1311 | #define ASCQ_ERR_UNLOCK_DMA 0x13 | ||
1312 | #define ASCQ_ERR_VDS_CHK_INSTALL 0x14 | ||
1313 | #define ASCQ_ERR_MICRO_CODE_HALT 0x15 | ||
1314 | #define ASCQ_ERR_SET_LRAM_ADDR 0x16 | ||
1315 | #define ASCQ_ERR_CUR_QNG 0x17 | 427 | #define ASCQ_ERR_CUR_QNG 0x17 |
1316 | #define ASCQ_ERR_SG_Q_LINKS 0x18 | 428 | #define ASCQ_ERR_SG_Q_LINKS 0x18 |
1317 | #define ASCQ_ERR_SCSIQ_PTR 0x19 | ||
1318 | #define ASCQ_ERR_ISR_RE_ENTRY 0x1A | 429 | #define ASCQ_ERR_ISR_RE_ENTRY 0x1A |
1319 | #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B | 430 | #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B |
1320 | #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C | 431 | #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C |
1321 | #define ASCQ_ERR_SG_LIST_ODD_ADDRESS 0x1D | ||
1322 | #define ASCQ_ERR_XFER_ADDRESS_TOO_BIG 0x1E | ||
1323 | #define ASCQ_ERR_SCSIQ_NULL_PTR 0x1F | ||
1324 | #define ASCQ_ERR_SCSIQ_BAD_NEXT_PTR 0x20 | ||
1325 | #define ASCQ_ERR_GET_NUM_OF_FREE_Q 0x21 | ||
1326 | #define ASCQ_ERR_SEND_SCSI_Q 0x22 | ||
1327 | #define ASCQ_ERR_HOST_REQ_RISC_HALT 0x23 | ||
1328 | #define ASCQ_ERR_RESET_SDTR 0x24 | ||
1329 | 432 | ||
1330 | /* | 433 | /* |
1331 | * Warning code values are set in ASC_DVC_VAR 'warn_code'. | 434 | * Warning code values are set in ASC_DVC_VAR 'warn_code'. |
@@ -1338,84 +441,51 @@ typedef struct asc_risc_sg_list_q { | |||
1338 | #define ASC_WARN_CMD_QNG_CONFLICT 0x0010 | 441 | #define ASC_WARN_CMD_QNG_CONFLICT 0x0010 |
1339 | #define ASC_WARN_EEPROM_RECOVER 0x0020 | 442 | #define ASC_WARN_EEPROM_RECOVER 0x0020 |
1340 | #define ASC_WARN_CFG_MSW_RECOVER 0x0040 | 443 | #define ASC_WARN_CFG_MSW_RECOVER 0x0040 |
1341 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 | ||
1342 | 444 | ||
1343 | /* | 445 | /* |
1344 | * Error code values are set in ASC_DVC_VAR 'err_code'. | 446 | * Error code values are set in {ASC/ADV}_DVC_VAR 'err_code'. |
1345 | */ | 447 | */ |
1346 | #define ASC_IERR_WRITE_EEPROM 0x0001 | 448 | #define ASC_IERR_NO_CARRIER 0x0001 /* No more carrier memory */ |
1347 | #define ASC_IERR_MCODE_CHKSUM 0x0002 | 449 | #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */ |
1348 | #define ASC_IERR_SET_PC_ADDR 0x0004 | 450 | #define ASC_IERR_SET_PC_ADDR 0x0004 |
1349 | #define ASC_IERR_START_STOP_CHIP 0x0008 | 451 | #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */ |
1350 | #define ASC_IERR_IRQ_NO 0x0010 | 452 | #define ASC_IERR_ILLEGAL_CONNECTION 0x0010 /* Illegal cable connection */ |
1351 | #define ASC_IERR_SET_IRQ_NO 0x0020 | 453 | #define ASC_IERR_SINGLE_END_DEVICE 0x0020 /* SE device on DIFF bus */ |
1352 | #define ASC_IERR_CHIP_VERSION 0x0040 | 454 | #define ASC_IERR_REVERSED_CABLE 0x0040 /* Narrow flat cable reversed */ |
1353 | #define ASC_IERR_SET_SCSI_ID 0x0080 | 455 | #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */ |
1354 | #define ASC_IERR_GET_PHY_ADDR 0x0100 | 456 | #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD device on LVD port */ |
1355 | #define ASC_IERR_BAD_SIGNATURE 0x0200 | 457 | #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */ |
1356 | #define ASC_IERR_NO_BUS_TYPE 0x0400 | 458 | #define ASC_IERR_NO_BUS_TYPE 0x0400 |
1357 | #define ASC_IERR_SCAM 0x0800 | 459 | #define ASC_IERR_BIST_PRE_TEST 0x0800 /* BIST pre-test error */ |
1358 | #define ASC_IERR_SET_SDTR 0x1000 | 460 | #define ASC_IERR_BIST_RAM_TEST 0x1000 /* BIST RAM test error */ |
1359 | #define ASC_IERR_RW_LRAM 0x8000 | 461 | #define ASC_IERR_BAD_CHIPTYPE 0x2000 /* Invalid chip_type setting */ |
1360 | 462 | ||
1361 | #define ASC_DEF_IRQ_NO 10 | ||
1362 | #define ASC_MAX_IRQ_NO 15 | ||
1363 | #define ASC_MIN_IRQ_NO 10 | ||
1364 | #define ASC_MIN_REMAIN_Q (0x02) | ||
1365 | #define ASC_DEF_MAX_TOTAL_QNG (0xF0) | 463 | #define ASC_DEF_MAX_TOTAL_QNG (0xF0) |
1366 | #define ASC_MIN_TAG_Q_PER_DVC (0x04) | 464 | #define ASC_MIN_TAG_Q_PER_DVC (0x04) |
1367 | #define ASC_DEF_TAG_Q_PER_DVC (0x04) | 465 | #define ASC_MIN_FREE_Q (0x02) |
1368 | #define ASC_MIN_FREE_Q ASC_MIN_REMAIN_Q | ||
1369 | #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q)) | 466 | #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q)) |
1370 | #define ASC_MAX_TOTAL_QNG 240 | 467 | #define ASC_MAX_TOTAL_QNG 240 |
1371 | #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16 | 468 | #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16 |
1372 | #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8 | 469 | #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8 |
1373 | #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20 | 470 | #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20 |
1374 | #define ASC_MAX_INRAM_TAG_QNG 16 | 471 | #define ASC_MAX_INRAM_TAG_QNG 16 |
1375 | #define ASC_IOADR_TABLE_MAX_IX 11 | ||
1376 | #define ASC_IOADR_GAP 0x10 | 472 | #define ASC_IOADR_GAP 0x10 |
1377 | #define ASC_SEARCH_IOP_GAP 0x10 | ||
1378 | #define ASC_MIN_IOP_ADDR (PortAddr)0x0100 | ||
1379 | #define ASC_MAX_IOP_ADDR (PortAddr)0x3F0 | ||
1380 | #define ASC_IOADR_1 (PortAddr)0x0110 | ||
1381 | #define ASC_IOADR_2 (PortAddr)0x0130 | ||
1382 | #define ASC_IOADR_3 (PortAddr)0x0150 | ||
1383 | #define ASC_IOADR_4 (PortAddr)0x0190 | ||
1384 | #define ASC_IOADR_5 (PortAddr)0x0210 | ||
1385 | #define ASC_IOADR_6 (PortAddr)0x0230 | ||
1386 | #define ASC_IOADR_7 (PortAddr)0x0250 | ||
1387 | #define ASC_IOADR_8 (PortAddr)0x0330 | ||
1388 | #define ASC_IOADR_DEF ASC_IOADR_8 | ||
1389 | #define ASC_LIB_SCSIQ_WK_SP 256 | ||
1390 | #define ASC_MAX_SYN_XFER_NO 16 | ||
1391 | #define ASC_SYN_MAX_OFFSET 0x0F | 473 | #define ASC_SYN_MAX_OFFSET 0x0F |
1392 | #define ASC_DEF_SDTR_OFFSET 0x0F | 474 | #define ASC_DEF_SDTR_OFFSET 0x0F |
1393 | #define ASC_DEF_SDTR_INDEX 0x00 | ||
1394 | #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02 | 475 | #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02 |
1395 | #define SYN_XFER_NS_0 25 | 476 | #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41 |
1396 | #define SYN_XFER_NS_1 30 | 477 | |
1397 | #define SYN_XFER_NS_2 35 | 478 | /* The narrow chip only supports a limited selection of transfer rates. |
1398 | #define SYN_XFER_NS_3 40 | 479 | * These are encoded in the range 0..7 or 0..15 depending whether the chip |
1399 | #define SYN_XFER_NS_4 50 | 480 | * is Ultra-capable or not. These tables let us convert from one to the other. |
1400 | #define SYN_XFER_NS_5 60 | 481 | */ |
1401 | #define SYN_XFER_NS_6 70 | 482 | static const unsigned char asc_syn_xfer_period[8] = { |
1402 | #define SYN_XFER_NS_7 85 | 483 | 25, 30, 35, 40, 50, 60, 70, 85 |
1403 | #define SYN_ULTRA_XFER_NS_0 12 | 484 | }; |
1404 | #define SYN_ULTRA_XFER_NS_1 19 | 485 | |
1405 | #define SYN_ULTRA_XFER_NS_2 25 | 486 | static const unsigned char asc_syn_ultra_xfer_period[16] = { |
1406 | #define SYN_ULTRA_XFER_NS_3 32 | 487 | 12, 19, 25, 32, 38, 44, 50, 57, 63, 69, 75, 82, 88, 94, 100, 107 |
1407 | #define SYN_ULTRA_XFER_NS_4 38 | 488 | }; |
1408 | #define SYN_ULTRA_XFER_NS_5 44 | ||
1409 | #define SYN_ULTRA_XFER_NS_6 50 | ||
1410 | #define SYN_ULTRA_XFER_NS_7 57 | ||
1411 | #define SYN_ULTRA_XFER_NS_8 63 | ||
1412 | #define SYN_ULTRA_XFER_NS_9 69 | ||
1413 | #define SYN_ULTRA_XFER_NS_10 75 | ||
1414 | #define SYN_ULTRA_XFER_NS_11 82 | ||
1415 | #define SYN_ULTRA_XFER_NS_12 88 | ||
1416 | #define SYN_ULTRA_XFER_NS_13 94 | ||
1417 | #define SYN_ULTRA_XFER_NS_14 100 | ||
1418 | #define SYN_ULTRA_XFER_NS_15 107 | ||
1419 | 489 | ||
1420 | typedef struct ext_msg { | 490 | typedef struct ext_msg { |
1421 | uchar msg_type; | 491 | uchar msg_type; |
@@ -1456,22 +526,16 @@ typedef struct asc_dvc_cfg { | |||
1456 | uchar isa_dma_speed; | 526 | uchar isa_dma_speed; |
1457 | uchar isa_dma_channel; | 527 | uchar isa_dma_channel; |
1458 | uchar chip_version; | 528 | uchar chip_version; |
1459 | ushort lib_serial_no; | ||
1460 | ushort lib_version; | ||
1461 | ushort mcode_date; | 529 | ushort mcode_date; |
1462 | ushort mcode_version; | 530 | ushort mcode_version; |
1463 | uchar max_tag_qng[ASC_MAX_TID + 1]; | 531 | uchar max_tag_qng[ASC_MAX_TID + 1]; |
1464 | uchar *overrun_buf; | ||
1465 | uchar sdtr_period_offset[ASC_MAX_TID + 1]; | 532 | uchar sdtr_period_offset[ASC_MAX_TID + 1]; |
1466 | ushort pci_slot_info; | ||
1467 | uchar adapter_info[6]; | 533 | uchar adapter_info[6]; |
1468 | struct device *dev; | ||
1469 | } ASC_DVC_CFG; | 534 | } ASC_DVC_CFG; |
1470 | 535 | ||
1471 | #define ASC_DEF_DVC_CNTL 0xFFFF | 536 | #define ASC_DEF_DVC_CNTL 0xFFFF |
1472 | #define ASC_DEF_CHIP_SCSI_ID 7 | 537 | #define ASC_DEF_CHIP_SCSI_ID 7 |
1473 | #define ASC_DEF_ISA_DMA_SPEED 4 | 538 | #define ASC_DEF_ISA_DMA_SPEED 4 |
1474 | #define ASC_INIT_STATE_NULL 0x0000 | ||
1475 | #define ASC_INIT_STATE_BEG_GET_CFG 0x0001 | 539 | #define ASC_INIT_STATE_BEG_GET_CFG 0x0001 |
1476 | #define ASC_INIT_STATE_END_GET_CFG 0x0002 | 540 | #define ASC_INIT_STATE_END_GET_CFG 0x0002 |
1477 | #define ASC_INIT_STATE_BEG_SET_CFG 0x0004 | 541 | #define ASC_INIT_STATE_BEG_SET_CFG 0x0004 |
@@ -1484,43 +548,39 @@ typedef struct asc_dvc_cfg { | |||
1484 | #define ASC_INIT_STATE_WITHOUT_EEP 0x8000 | 548 | #define ASC_INIT_STATE_WITHOUT_EEP 0x8000 |
1485 | #define ASC_BUG_FIX_IF_NOT_DWB 0x0001 | 549 | #define ASC_BUG_FIX_IF_NOT_DWB 0x0001 |
1486 | #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002 | 550 | #define ASC_BUG_FIX_ASYN_USE_SYN 0x0002 |
1487 | #define ASYN_SDTR_DATA_FIX_PCI_REV_AB 0x41 | ||
1488 | #define ASC_MIN_TAGGED_CMD 7 | 551 | #define ASC_MIN_TAGGED_CMD 7 |
1489 | #define ASC_MAX_SCSI_RESET_WAIT 30 | 552 | #define ASC_MAX_SCSI_RESET_WAIT 30 |
553 | #define ASC_OVERRUN_BSIZE 64 | ||
1490 | 554 | ||
1491 | struct asc_dvc_var; /* Forward Declaration. */ | 555 | struct asc_dvc_var; /* Forward Declaration. */ |
1492 | 556 | ||
1493 | typedef void (*ASC_ISR_CALLBACK) (struct asc_dvc_var *, ASC_QDONE_INFO *); | ||
1494 | typedef int (*ASC_EXE_CALLBACK) (struct asc_dvc_var *, ASC_SCSI_Q *); | ||
1495 | |||
1496 | typedef struct asc_dvc_var { | 557 | typedef struct asc_dvc_var { |
1497 | PortAddr iop_base; | 558 | PortAddr iop_base; |
1498 | ushort err_code; | 559 | ushort err_code; |
1499 | ushort dvc_cntl; | 560 | ushort dvc_cntl; |
1500 | ushort bug_fix_cntl; | 561 | ushort bug_fix_cntl; |
1501 | ushort bus_type; | 562 | ushort bus_type; |
1502 | ASC_ISR_CALLBACK isr_callback; | ||
1503 | ASC_EXE_CALLBACK exe_callback; | ||
1504 | ASC_SCSI_BIT_ID_TYPE init_sdtr; | 563 | ASC_SCSI_BIT_ID_TYPE init_sdtr; |
1505 | ASC_SCSI_BIT_ID_TYPE sdtr_done; | 564 | ASC_SCSI_BIT_ID_TYPE sdtr_done; |
1506 | ASC_SCSI_BIT_ID_TYPE use_tagged_qng; | 565 | ASC_SCSI_BIT_ID_TYPE use_tagged_qng; |
1507 | ASC_SCSI_BIT_ID_TYPE unit_not_ready; | 566 | ASC_SCSI_BIT_ID_TYPE unit_not_ready; |
1508 | ASC_SCSI_BIT_ID_TYPE queue_full_or_busy; | 567 | ASC_SCSI_BIT_ID_TYPE queue_full_or_busy; |
1509 | ASC_SCSI_BIT_ID_TYPE start_motor; | 568 | ASC_SCSI_BIT_ID_TYPE start_motor; |
569 | uchar overrun_buf[ASC_OVERRUN_BSIZE] __aligned(8); | ||
570 | dma_addr_t overrun_dma; | ||
1510 | uchar scsi_reset_wait; | 571 | uchar scsi_reset_wait; |
1511 | uchar chip_no; | 572 | uchar chip_no; |
1512 | char is_in_int; | 573 | char is_in_int; |
1513 | uchar max_total_qng; | 574 | uchar max_total_qng; |
1514 | uchar cur_total_qng; | 575 | uchar cur_total_qng; |
1515 | uchar in_critical_cnt; | 576 | uchar in_critical_cnt; |
1516 | uchar irq_no; | ||
1517 | uchar last_q_shortage; | 577 | uchar last_q_shortage; |
1518 | ushort init_state; | 578 | ushort init_state; |
1519 | uchar cur_dvc_qng[ASC_MAX_TID + 1]; | 579 | uchar cur_dvc_qng[ASC_MAX_TID + 1]; |
1520 | uchar max_dvc_qng[ASC_MAX_TID + 1]; | 580 | uchar max_dvc_qng[ASC_MAX_TID + 1]; |
1521 | ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1]; | 581 | ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1]; |
1522 | ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1]; | 582 | ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1]; |
1523 | uchar sdtr_period_tbl[ASC_MAX_SYN_XFER_NO]; | 583 | const uchar *sdtr_period_tbl; |
1524 | ASC_DVC_CFG *cfg; | 584 | ASC_DVC_CFG *cfg; |
1525 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always; | 585 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always; |
1526 | char redo_scam; | 586 | char redo_scam; |
@@ -1529,9 +589,11 @@ typedef struct asc_dvc_var { | |||
1529 | ASC_DCNT max_dma_count; | 589 | ASC_DCNT max_dma_count; |
1530 | ASC_SCSI_BIT_ID_TYPE no_scam; | 590 | ASC_SCSI_BIT_ID_TYPE no_scam; |
1531 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer; | 591 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer; |
592 | uchar min_sdtr_index; | ||
1532 | uchar max_sdtr_index; | 593 | uchar max_sdtr_index; |
1533 | uchar host_init_sdtr_index; | ||
1534 | struct asc_board *drv_ptr; | 594 | struct asc_board *drv_ptr; |
595 | int ptr_map_count; | ||
596 | void **ptr_map; | ||
1535 | ASC_DCNT uc_break; | 597 | ASC_DCNT uc_break; |
1536 | } ASC_DVC_VAR; | 598 | } ASC_DVC_VAR; |
1537 | 599 | ||
@@ -1568,12 +630,7 @@ typedef struct asc_cap_info_array { | |||
1568 | #define ASC_EEP_MAX_DVC_ADDR_VL 15 | 630 | #define ASC_EEP_MAX_DVC_ADDR_VL 15 |
1569 | #define ASC_EEP_DVC_CFG_BEG 32 | 631 | #define ASC_EEP_DVC_CFG_BEG 32 |
1570 | #define ASC_EEP_MAX_DVC_ADDR 45 | 632 | #define ASC_EEP_MAX_DVC_ADDR 45 |
1571 | #define ASC_EEP_DEFINED_WORDS 10 | ||
1572 | #define ASC_EEP_MAX_ADDR 63 | ||
1573 | #define ASC_EEP_RES_WORDS 0 | ||
1574 | #define ASC_EEP_MAX_RETRY 20 | 633 | #define ASC_EEP_MAX_RETRY 20 |
1575 | #define ASC_MAX_INIT_BUSY_RETRY 8 | ||
1576 | #define ASC_EEP_ISA_PNP_WSIZE 16 | ||
1577 | 634 | ||
1578 | /* | 635 | /* |
1579 | * These macros keep the chip SCSI id and ISA DMA speed | 636 | * These macros keep the chip SCSI id and ISA DMA speed |
@@ -1609,17 +666,10 @@ typedef struct asceep_config { | |||
1609 | ushort chksum; | 666 | ushort chksum; |
1610 | } ASCEEP_CONFIG; | 667 | } ASCEEP_CONFIG; |
1611 | 668 | ||
1612 | #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800 | ||
1613 | #define ASC_PCI_CFG_LSW_BURST_MODE 0x0080 | ||
1614 | #define ASC_PCI_CFG_LSW_INTR_ABLE 0x0020 | ||
1615 | |||
1616 | #define ASC_EEP_CMD_READ 0x80 | 669 | #define ASC_EEP_CMD_READ 0x80 |
1617 | #define ASC_EEP_CMD_WRITE 0x40 | 670 | #define ASC_EEP_CMD_WRITE 0x40 |
1618 | #define ASC_EEP_CMD_WRITE_ABLE 0x30 | 671 | #define ASC_EEP_CMD_WRITE_ABLE 0x30 |
1619 | #define ASC_EEP_CMD_WRITE_DISABLE 0x00 | 672 | #define ASC_EEP_CMD_WRITE_DISABLE 0x00 |
1620 | #define ASC_OVERRUN_BSIZE 0x00000048UL | ||
1621 | #define ASC_CTRL_BREAK_ONCE 0x0001 | ||
1622 | #define ASC_CTRL_BREAK_STAY_IDLE 0x0002 | ||
1623 | #define ASCV_MSGOUT_BEG 0x0000 | 673 | #define ASCV_MSGOUT_BEG 0x0000 |
1624 | #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3) | 674 | #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3) |
1625 | #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4) | 675 | #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4) |
@@ -1796,16 +846,9 @@ typedef struct asceep_config { | |||
1796 | #define ASC_1000_ID0W 0x04C1 | 846 | #define ASC_1000_ID0W 0x04C1 |
1797 | #define ASC_1000_ID0W_FIX 0x00C1 | 847 | #define ASC_1000_ID0W_FIX 0x00C1 |
1798 | #define ASC_1000_ID1B 0x25 | 848 | #define ASC_1000_ID1B 0x25 |
1799 | #define ASC_EISA_BIG_IOP_GAP (0x1C30-0x0C50) | ||
1800 | #define ASC_EISA_SMALL_IOP_GAP (0x0020) | ||
1801 | #define ASC_EISA_MIN_IOP_ADDR (0x0C30) | ||
1802 | #define ASC_EISA_MAX_IOP_ADDR (0xFC50) | ||
1803 | #define ASC_EISA_REV_IOP_MASK (0x0C83) | 849 | #define ASC_EISA_REV_IOP_MASK (0x0C83) |
1804 | #define ASC_EISA_PID_IOP_MASK (0x0C80) | ||
1805 | #define ASC_EISA_CFG_IOP_MASK (0x0C86) | 850 | #define ASC_EISA_CFG_IOP_MASK (0x0C86) |
1806 | #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000) | 851 | #define ASC_GET_EISA_SLOT(iop) (PortAddr)((iop) & 0xF000) |
1807 | #define ASC_EISA_ID_740 0x01745004UL | ||
1808 | #define ASC_EISA_ID_750 0x01755004UL | ||
1809 | #define INS_HALTINT (ushort)0x6281 | 852 | #define INS_HALTINT (ushort)0x6281 |
1810 | #define INS_HALT (ushort)0x6280 | 853 | #define INS_HALT (ushort)0x6280 |
1811 | #define INS_SINT (ushort)0x6200 | 854 | #define INS_SINT (ushort)0x6200 |
@@ -1828,11 +871,10 @@ typedef struct asc_mc_saved { | |||
1828 | #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B) | 871 | #define AscGetRiscVarDoneQTail(port) AscReadLramByte((port), ASCV_DONENEXT_B) |
1829 | #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val) | 872 | #define AscPutRiscVarFreeQHead(port, val) AscWriteLramByte((port), ASCV_NEXTRDY_B, val) |
1830 | #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val) | 873 | #define AscPutRiscVarDoneQTail(port, val) AscWriteLramByte((port), ASCV_DONENEXT_B, val) |
1831 | #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data)); | 874 | #define AscPutMCodeSDTRDoneAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id), (data)) |
1832 | #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id)); | 875 | #define AscGetMCodeSDTRDoneAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DONE_BEG+(ushort)id)) |
1833 | #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data); | 876 | #define AscPutMCodeInitSDTRAtID(port, id, data) AscWriteLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id), data) |
1834 | #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id)); | 877 | #define AscGetMCodeInitSDTRAtID(port, id) AscReadLramByte((port), (ushort)((ushort)ASCV_SDTR_DATA_BEG+(ushort)id)) |
1835 | #define AscSynIndexToPeriod(index) (uchar)(asc_dvc->sdtr_period_tbl[ (index) ]) | ||
1836 | #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE) | 878 | #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE) |
1837 | #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD) | 879 | #define AscGetChipSignatureWord(port) (ushort)inpw((port)+IOP_SIG_WORD) |
1838 | #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION) | 880 | #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION) |
@@ -1887,125 +929,6 @@ typedef struct asc_mc_saved { | |||
1887 | #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID) | 929 | #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID) |
1888 | #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data) | 930 | #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data) |
1889 | 931 | ||
1890 | static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg); | ||
1891 | static int AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg); | ||
1892 | static void AscWaitEEPRead(void); | ||
1893 | static void AscWaitEEPWrite(void); | ||
1894 | static ushort AscReadEEPWord(PortAddr, uchar); | ||
1895 | static ushort AscWriteEEPWord(PortAddr, uchar, ushort); | ||
1896 | static ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | ||
1897 | static int AscSetEEPConfigOnce(PortAddr, ASCEEP_CONFIG *, ushort); | ||
1898 | static int AscSetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | ||
1899 | static int AscStartChip(PortAddr); | ||
1900 | static int AscStopChip(PortAddr); | ||
1901 | static void AscSetChipIH(PortAddr, ushort); | ||
1902 | static int AscIsChipHalted(PortAddr); | ||
1903 | static void AscAckInterrupt(PortAddr); | ||
1904 | static void AscDisableInterrupt(PortAddr); | ||
1905 | static void AscEnableInterrupt(PortAddr); | ||
1906 | static void AscSetBank(PortAddr, uchar); | ||
1907 | static int AscResetChipAndScsiBus(ASC_DVC_VAR *); | ||
1908 | #ifdef CONFIG_ISA | ||
1909 | static ushort AscGetIsaDmaChannel(PortAddr); | ||
1910 | static ushort AscSetIsaDmaChannel(PortAddr, ushort); | ||
1911 | static uchar AscSetIsaDmaSpeed(PortAddr, uchar); | ||
1912 | static uchar AscGetIsaDmaSpeed(PortAddr); | ||
1913 | #endif /* CONFIG_ISA */ | ||
1914 | static uchar AscReadLramByte(PortAddr, ushort); | ||
1915 | static ushort AscReadLramWord(PortAddr, ushort); | ||
1916 | #if CC_VERY_LONG_SG_LIST | ||
1917 | static ASC_DCNT AscReadLramDWord(PortAddr, ushort); | ||
1918 | #endif /* CC_VERY_LONG_SG_LIST */ | ||
1919 | static void AscWriteLramWord(PortAddr, ushort, ushort); | ||
1920 | static void AscWriteLramByte(PortAddr, ushort, uchar); | ||
1921 | static ASC_DCNT AscMemSumLramWord(PortAddr, ushort, int); | ||
1922 | static void AscMemWordSetLram(PortAddr, ushort, ushort, int); | ||
1923 | static void AscMemWordCopyPtrToLram(PortAddr, ushort, uchar *, int); | ||
1924 | static void AscMemDWordCopyPtrToLram(PortAddr, ushort, uchar *, int); | ||
1925 | static void AscMemWordCopyPtrFromLram(PortAddr, ushort, uchar *, int); | ||
1926 | static ushort AscInitAscDvcVar(ASC_DVC_VAR *); | ||
1927 | static ushort AscInitFromEEP(ASC_DVC_VAR *); | ||
1928 | static ushort AscInitFromAscDvcVar(ASC_DVC_VAR *); | ||
1929 | static ushort AscInitMicroCodeVar(ASC_DVC_VAR *); | ||
1930 | static int AscTestExternalLram(ASC_DVC_VAR *); | ||
1931 | static uchar AscMsgOutSDTR(ASC_DVC_VAR *, uchar, uchar); | ||
1932 | static uchar AscCalSDTRData(ASC_DVC_VAR *, uchar, uchar); | ||
1933 | static void AscSetChipSDTR(PortAddr, uchar, uchar); | ||
1934 | static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *, uchar); | ||
1935 | static uchar AscAllocFreeQueue(PortAddr, uchar); | ||
1936 | static uchar AscAllocMultipleFreeQueue(PortAddr, uchar, uchar); | ||
1937 | static int AscHostReqRiscHalt(PortAddr); | ||
1938 | static int AscStopQueueExe(PortAddr); | ||
1939 | static int AscSendScsiQueue(ASC_DVC_VAR *, | ||
1940 | ASC_SCSI_Q *scsiq, uchar n_q_required); | ||
1941 | static int AscPutReadyQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar); | ||
1942 | static int AscPutReadySgListQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar); | ||
1943 | static int AscSetChipSynRegAtID(PortAddr, uchar, uchar); | ||
1944 | static int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar); | ||
1945 | static ushort AscInitLram(ASC_DVC_VAR *); | ||
1946 | static ushort AscInitQLinkVar(ASC_DVC_VAR *); | ||
1947 | static int AscSetLibErrorCode(ASC_DVC_VAR *, ushort); | ||
1948 | static int AscIsrChipHalted(ASC_DVC_VAR *); | ||
1949 | static uchar _AscCopyLramScsiDoneQ(PortAddr, ushort, | ||
1950 | ASC_QDONE_INFO *, ASC_DCNT); | ||
1951 | static int AscIsrQDone(ASC_DVC_VAR *); | ||
1952 | static int AscCompareString(uchar *, uchar *, int); | ||
1953 | #ifdef CONFIG_ISA | ||
1954 | static ushort AscGetEisaChipCfg(PortAddr); | ||
1955 | static ASC_DCNT AscGetEisaProductID(PortAddr); | ||
1956 | static PortAddr AscSearchIOPortAddrEISA(PortAddr); | ||
1957 | static PortAddr AscSearchIOPortAddr11(PortAddr); | ||
1958 | static PortAddr AscSearchIOPortAddr(PortAddr, ushort); | ||
1959 | static void AscSetISAPNPWaitForKey(void); | ||
1960 | #endif /* CONFIG_ISA */ | ||
1961 | static uchar AscGetChipScsiCtrl(PortAddr); | ||
1962 | static uchar AscSetChipScsiID(PortAddr, uchar); | ||
1963 | static uchar AscGetChipVersion(PortAddr, ushort); | ||
1964 | static ushort AscGetChipBusType(PortAddr); | ||
1965 | static ASC_DCNT AscLoadMicroCode(PortAddr, ushort, uchar *, ushort); | ||
1966 | static int AscFindSignature(PortAddr); | ||
1967 | static void AscToggleIRQAct(PortAddr); | ||
1968 | static uchar AscGetChipIRQ(PortAddr, ushort); | ||
1969 | static uchar AscSetChipIRQ(PortAddr, uchar, ushort); | ||
1970 | static ushort AscGetChipBiosAddress(PortAddr, ushort); | ||
1971 | static inline ulong DvcEnterCritical(void); | ||
1972 | static inline void DvcLeaveCritical(ulong); | ||
1973 | #ifdef CONFIG_PCI | ||
1974 | static uchar DvcReadPCIConfigByte(ASC_DVC_VAR *, ushort); | ||
1975 | static void DvcWritePCIConfigByte(ASC_DVC_VAR *, ushort, uchar); | ||
1976 | #endif /* CONFIG_PCI */ | ||
1977 | static ushort AscGetChipBiosAddress(PortAddr, ushort); | ||
1978 | static void DvcSleepMilliSecond(ASC_DCNT); | ||
1979 | static void DvcDelayNanoSecond(ASC_DVC_VAR *, ASC_DCNT); | ||
1980 | static void DvcPutScsiQ(PortAddr, ushort, uchar *, int); | ||
1981 | static void DvcGetQinfo(PortAddr, ushort, uchar *, int); | ||
1982 | static ushort AscInitGetConfig(ASC_DVC_VAR *); | ||
1983 | static ushort AscInitSetConfig(ASC_DVC_VAR *); | ||
1984 | static ushort AscInitAsc1000Driver(ASC_DVC_VAR *); | ||
1985 | static void AscAsyncFix(ASC_DVC_VAR *, uchar, ASC_SCSI_INQUIRY *); | ||
1986 | static int AscTagQueuingSafe(ASC_SCSI_INQUIRY *); | ||
1987 | static void AscInquiryHandling(ASC_DVC_VAR *, uchar, ASC_SCSI_INQUIRY *); | ||
1988 | static int AscExeScsiQueue(ASC_DVC_VAR *, ASC_SCSI_Q *); | ||
1989 | static int AscISR(ASC_DVC_VAR *); | ||
1990 | static uint AscGetNumOfFreeQueue(ASC_DVC_VAR *, uchar, uchar); | ||
1991 | static int AscSgListToQueue(int); | ||
1992 | #ifdef CONFIG_ISA | ||
1993 | static void AscEnableIsaDma(uchar); | ||
1994 | #endif /* CONFIG_ISA */ | ||
1995 | static ASC_DCNT AscGetMaxDmaCount(ushort); | ||
1996 | static const char *advansys_info(struct Scsi_Host *shost); | ||
1997 | |||
1998 | /* | ||
1999 | * --- Adv Library Constants and Macros | ||
2000 | */ | ||
2001 | |||
2002 | #define ADV_LIB_VERSION_MAJOR 5 | ||
2003 | #define ADV_LIB_VERSION_MINOR 14 | ||
2004 | |||
2005 | /* | ||
2006 | * Define Adv Library required special types. | ||
2007 | */ | ||
2008 | |||
2009 | /* | 932 | /* |
2010 | * Portable Data Types | 933 | * Portable Data Types |
2011 | * | 934 | * |
@@ -2045,12 +968,6 @@ static const char *advansys_info(struct Scsi_Host *shost); | |||
2045 | #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15) | 968 | #define ADV_CARRIER_COUNT (ASC_DEF_MAX_HOST_QNG + 15) |
2046 | 969 | ||
2047 | /* | 970 | /* |
2048 | * For wide boards a CDB length maximum of 16 bytes | ||
2049 | * is supported. | ||
2050 | */ | ||
2051 | #define ADV_MAX_CDB_LEN 16 | ||
2052 | |||
2053 | /* | ||
2054 | * Define total number of simultaneous maximum element scatter-gather | 971 | * Define total number of simultaneous maximum element scatter-gather |
2055 | * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the | 972 | * request blocks per wide adapter. ASC_DEF_MAX_HOST_QNG (253) is the |
2056 | * maximum number of outstanding commands per wide host adapter. Each | 973 | * maximum number of outstanding commands per wide host adapter. Each |
@@ -2058,28 +975,14 @@ static const char *advansys_info(struct Scsi_Host *shost); | |||
2058 | * elements. Allow each command to have at least one ADV_SG_BLOCK structure. | 975 | * elements. Allow each command to have at least one ADV_SG_BLOCK structure. |
2059 | * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK | 976 | * This allows about 15 commands to have the maximum 17 ADV_SG_BLOCK |
2060 | * structures or 255 scatter-gather elements. | 977 | * structures or 255 scatter-gather elements. |
2061 | * | ||
2062 | */ | 978 | */ |
2063 | #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG | 979 | #define ADV_TOT_SG_BLOCK ASC_DEF_MAX_HOST_QNG |
2064 | 980 | ||
2065 | /* | 981 | /* |
2066 | * Define Adv Library required maximum number of scatter-gather | 982 | * Define maximum number of scatter-gather elements per request. |
2067 | * elements per request. | ||
2068 | */ | 983 | */ |
2069 | #define ADV_MAX_SG_LIST 255 | 984 | #define ADV_MAX_SG_LIST 255 |
2070 | 985 | #define NO_OF_SG_PER_BLOCK 15 | |
2071 | /* Number of SG blocks needed. */ | ||
2072 | #define ADV_NUM_SG_BLOCK \ | ||
2073 | ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK) | ||
2074 | |||
2075 | /* Total contiguous memory needed for SG blocks. */ | ||
2076 | #define ADV_SG_TOTAL_MEM_SIZE \ | ||
2077 | (sizeof(ADV_SG_BLOCK) * ADV_NUM_SG_BLOCK) | ||
2078 | |||
2079 | #define ADV_PAGE_SIZE PAGE_SIZE | ||
2080 | |||
2081 | #define ADV_NUM_PAGE_CROSSING \ | ||
2082 | ((ADV_SG_TOTAL_MEM_SIZE + (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE) | ||
2083 | 986 | ||
2084 | #define ADV_EEP_DVC_CFG_BEGIN (0x00) | 987 | #define ADV_EEP_DVC_CFG_BEGIN (0x00) |
2085 | #define ADV_EEP_DVC_CFG_END (0x15) | 988 | #define ADV_EEP_DVC_CFG_END (0x15) |
@@ -2385,10 +1288,6 @@ typedef struct adveep_38C1600_config { | |||
2385 | * EEPROM Commands | 1288 | * EEPROM Commands |
2386 | */ | 1289 | */ |
2387 | #define ASC_EEP_CMD_DONE 0x0200 | 1290 | #define ASC_EEP_CMD_DONE 0x0200 |
2388 | #define ASC_EEP_CMD_DONE_ERR 0x0001 | ||
2389 | |||
2390 | /* cfg_word */ | ||
2391 | #define EEP_CFG_WORD_BIG_ENDIAN 0x8000 | ||
2392 | 1291 | ||
2393 | /* bios_ctrl */ | 1292 | /* bios_ctrl */ |
2394 | #define BIOS_CTRL_BIOS 0x0001 | 1293 | #define BIOS_CTRL_BIOS 0x0001 |
@@ -2405,10 +1304,8 @@ typedef struct adveep_38C1600_config { | |||
2405 | #define BIOS_CTRL_AIPP_DIS 0x2000 | 1304 | #define BIOS_CTRL_AIPP_DIS 0x2000 |
2406 | 1305 | ||
2407 | #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */ | 1306 | #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */ |
2408 | #define ADV_3550_IOLEN 0x40 /* I/O Port Range in bytes */ | ||
2409 | 1307 | ||
2410 | #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */ | 1308 | #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */ |
2411 | #define ADV_38C0800_IOLEN 0x100 /* I/O Port Range in bytes */ | ||
2412 | 1309 | ||
2413 | /* | 1310 | /* |
2414 | * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is | 1311 | * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is |
@@ -2418,8 +1315,6 @@ typedef struct adveep_38C1600_config { | |||
2418 | * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory * | 1315 | * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory * |
2419 | */ | 1316 | */ |
2420 | #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */ | 1317 | #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */ |
2421 | #define ADV_38C1600_IOLEN 0x100 /* I/O Port Range 256 bytes */ | ||
2422 | #define ADV_38C1600_MEMLEN 0x1000 /* Memory Range 4KB bytes */ | ||
2423 | 1318 | ||
2424 | /* | 1319 | /* |
2425 | * Byte I/O register address from base of 'iop_base'. | 1320 | * Byte I/O register address from base of 'iop_base'. |
@@ -2549,8 +1444,6 @@ typedef struct adveep_38C1600_config { | |||
2549 | #define ADV_CHIP_ID_BYTE 0x25 | 1444 | #define ADV_CHIP_ID_BYTE 0x25 |
2550 | #define ADV_CHIP_ID_WORD 0x04C1 | 1445 | #define ADV_CHIP_ID_WORD 0x04C1 |
2551 | 1446 | ||
2552 | #define ADV_SC_SCSI_BUS_RESET 0x2000 | ||
2553 | |||
2554 | #define ADV_INTR_ENABLE_HOST_INTR 0x01 | 1447 | #define ADV_INTR_ENABLE_HOST_INTR 0x01 |
2555 | #define ADV_INTR_ENABLE_SEL_INTR 0x02 | 1448 | #define ADV_INTR_ENABLE_SEL_INTR 0x02 |
2556 | #define ADV_INTR_ENABLE_DPR_INTR 0x04 | 1449 | #define ADV_INTR_ENABLE_DPR_INTR 0x04 |
@@ -2590,8 +1483,6 @@ typedef struct adveep_38C1600_config { | |||
2590 | #define ADV_TICKLE_B 0x02 | 1483 | #define ADV_TICKLE_B 0x02 |
2591 | #define ADV_TICKLE_C 0x03 | 1484 | #define ADV_TICKLE_C 0x03 |
2592 | 1485 | ||
2593 | #define ADV_SCSI_CTRL_RSTOUT 0x2000 | ||
2594 | |||
2595 | #define AdvIsIntPending(port) \ | 1486 | #define AdvIsIntPending(port) \ |
2596 | (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR) | 1487 | (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR) |
2597 | 1488 | ||
@@ -2744,14 +1635,11 @@ typedef struct adveep_38C1600_config { | |||
2744 | */ | 1635 | */ |
2745 | #define INTAB 0x01 | 1636 | #define INTAB 0x01 |
2746 | 1637 | ||
2747 | /* a_advlib.h */ | ||
2748 | |||
2749 | /* | 1638 | /* |
2750 | * Adv Library Status Definitions | 1639 | * Adv Library Status Definitions |
2751 | */ | 1640 | */ |
2752 | #define ADV_TRUE 1 | 1641 | #define ADV_TRUE 1 |
2753 | #define ADV_FALSE 0 | 1642 | #define ADV_FALSE 0 |
2754 | #define ADV_NOERROR 1 | ||
2755 | #define ADV_SUCCESS 1 | 1643 | #define ADV_SUCCESS 1 |
2756 | #define ADV_BUSY 0 | 1644 | #define ADV_BUSY 0 |
2757 | #define ADV_ERROR (-1) | 1645 | #define ADV_ERROR (-1) |
@@ -2762,31 +1650,12 @@ typedef struct adveep_38C1600_config { | |||
2762 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ | 1650 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ |
2763 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ | 1651 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ |
2764 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ | 1652 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ |
2765 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */ | ||
2766 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ | 1653 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ |
2767 | 1654 | ||
2768 | #define ADV_MAX_TID 15 /* max. target identifier */ | 1655 | #define ADV_MAX_TID 15 /* max. target identifier */ |
2769 | #define ADV_MAX_LUN 7 /* max. logical unit number */ | 1656 | #define ADV_MAX_LUN 7 /* max. logical unit number */ |
2770 | 1657 | ||
2771 | /* | 1658 | /* |
2772 | * Error code values are set in ADV_DVC_VAR 'err_code'. | ||
2773 | */ | ||
2774 | #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */ | ||
2775 | #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */ | ||
2776 | #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */ | ||
2777 | #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */ | ||
2778 | #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */ | ||
2779 | #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */ | ||
2780 | #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */ | ||
2781 | #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */ | ||
2782 | #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */ | ||
2783 | #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */ | ||
2784 | #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */ | ||
2785 | #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */ | ||
2786 | #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */ | ||
2787 | #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */ | ||
2788 | |||
2789 | /* | ||
2790 | * Fixed locations of microcode operating variables. | 1659 | * Fixed locations of microcode operating variables. |
2791 | */ | 1660 | */ |
2792 | #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */ | 1661 | #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */ |
@@ -2902,8 +1771,7 @@ typedef struct adv_carr_t { | |||
2902 | #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK) | 1771 | #define ASC_GET_CARRP(carrp) ((carrp) & ASC_NEXT_VPA_MASK) |
2903 | 1772 | ||
2904 | #define ADV_CARRIER_NUM_PAGE_CROSSING \ | 1773 | #define ADV_CARRIER_NUM_PAGE_CROSSING \ |
2905 | (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + \ | 1774 | (((ADV_CARRIER_COUNT * sizeof(ADV_CARR_T)) + (PAGE_SIZE - 1))/PAGE_SIZE) |
2906 | (ADV_PAGE_SIZE - 1))/ADV_PAGE_SIZE) | ||
2907 | 1775 | ||
2908 | #define ADV_CARRIER_BUFSIZE \ | 1776 | #define ADV_CARRIER_BUFSIZE \ |
2909 | ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T)) | 1777 | ((ADV_CARRIER_COUNT + ADV_CARRIER_NUM_PAGE_CROSSING) * sizeof(ADV_CARR_T)) |
@@ -2937,80 +1805,17 @@ typedef struct adv_dvc_cfg { | |||
2937 | ushort disc_enable; /* enable disconnection */ | 1805 | ushort disc_enable; /* enable disconnection */ |
2938 | uchar chip_version; /* chip version */ | 1806 | uchar chip_version; /* chip version */ |
2939 | uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */ | 1807 | uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */ |
2940 | ushort lib_version; /* Adv Library version number */ | ||
2941 | ushort control_flag; /* Microcode Control Flag */ | 1808 | ushort control_flag; /* Microcode Control Flag */ |
2942 | ushort mcode_date; /* Microcode date */ | 1809 | ushort mcode_date; /* Microcode date */ |
2943 | ushort mcode_version; /* Microcode version */ | 1810 | ushort mcode_version; /* Microcode version */ |
2944 | ushort pci_slot_info; /* high byte device/function number */ | ||
2945 | /* bits 7-3 device num., bits 2-0 function num. */ | ||
2946 | /* low byte bus num. */ | ||
2947 | ushort serial1; /* EEPROM serial number word 1 */ | 1811 | ushort serial1; /* EEPROM serial number word 1 */ |
2948 | ushort serial2; /* EEPROM serial number word 2 */ | 1812 | ushort serial2; /* EEPROM serial number word 2 */ |
2949 | ushort serial3; /* EEPROM serial number word 3 */ | 1813 | ushort serial3; /* EEPROM serial number word 3 */ |
2950 | struct device *dev; /* pointer to the pci dev structure for this board */ | ||
2951 | } ADV_DVC_CFG; | 1814 | } ADV_DVC_CFG; |
2952 | 1815 | ||
2953 | struct adv_dvc_var; | 1816 | struct adv_dvc_var; |
2954 | struct adv_scsi_req_q; | 1817 | struct adv_scsi_req_q; |
2955 | 1818 | ||
2956 | typedef void (*ADV_ISR_CALLBACK) | ||
2957 | (struct adv_dvc_var *, struct adv_scsi_req_q *); | ||
2958 | |||
2959 | typedef void (*ADV_ASYNC_CALLBACK) | ||
2960 | (struct adv_dvc_var *, uchar); | ||
2961 | |||
2962 | /* | ||
2963 | * Adapter operation variable structure. | ||
2964 | * | ||
2965 | * One structure is required per host adapter. | ||
2966 | * | ||
2967 | * Field naming convention: | ||
2968 | * | ||
2969 | * *_able indicates both whether a feature should be enabled or disabled | ||
2970 | * and whether a device isi capable of the feature. At initialization | ||
2971 | * this field may be set, but later if a device is found to be incapable | ||
2972 | * of the feature, the field is cleared. | ||
2973 | */ | ||
2974 | typedef struct adv_dvc_var { | ||
2975 | AdvPortAddr iop_base; /* I/O port address */ | ||
2976 | ushort err_code; /* fatal error code */ | ||
2977 | ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */ | ||
2978 | ADV_ISR_CALLBACK isr_callback; | ||
2979 | ADV_ASYNC_CALLBACK async_callback; | ||
2980 | ushort wdtr_able; /* try WDTR for a device */ | ||
2981 | ushort sdtr_able; /* try SDTR for a device */ | ||
2982 | ushort ultra_able; /* try SDTR Ultra speed for a device */ | ||
2983 | ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */ | ||
2984 | ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */ | ||
2985 | ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */ | ||
2986 | ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */ | ||
2987 | ushort tagqng_able; /* try tagged queuing with a device */ | ||
2988 | ushort ppr_able; /* PPR message capable per TID bitmask. */ | ||
2989 | uchar max_dvc_qng; /* maximum number of tagged commands per device */ | ||
2990 | ushort start_motor; /* start motor command allowed */ | ||
2991 | uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */ | ||
2992 | uchar chip_no; /* should be assigned by caller */ | ||
2993 | uchar max_host_qng; /* maximum number of Q'ed command allowed */ | ||
2994 | uchar irq_no; /* IRQ number */ | ||
2995 | ushort no_scam; /* scam_tolerant of EEPROM */ | ||
2996 | struct asc_board *drv_ptr; /* driver pointer to private structure */ | ||
2997 | uchar chip_scsi_id; /* chip SCSI target ID */ | ||
2998 | uchar chip_type; | ||
2999 | uchar bist_err_code; | ||
3000 | ADV_CARR_T *carrier_buf; | ||
3001 | ADV_CARR_T *carr_freelist; /* Carrier free list. */ | ||
3002 | ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */ | ||
3003 | ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */ | ||
3004 | ushort carr_pending_cnt; /* Count of pending carriers. */ | ||
3005 | /* | ||
3006 | * Note: The following fields will not be used after initialization. The | ||
3007 | * driver may discard the buffer after initialization is done. | ||
3008 | */ | ||
3009 | ADV_DVC_CFG *cfg; /* temporary configuration structure */ | ||
3010 | } ADV_DVC_VAR; | ||
3011 | |||
3012 | #define NO_OF_SG_PER_BLOCK 15 | ||
3013 | |||
3014 | typedef struct asc_sg_block { | 1819 | typedef struct asc_sg_block { |
3015 | uchar reserved1; | 1820 | uchar reserved1; |
3016 | uchar reserved2; | 1821 | uchar reserved2; |
@@ -3069,6 +1874,83 @@ typedef struct adv_scsi_req_q { | |||
3069 | } ADV_SCSI_REQ_Q; | 1874 | } ADV_SCSI_REQ_Q; |
3070 | 1875 | ||
3071 | /* | 1876 | /* |
1877 | * The following two structures are used to process Wide Board requests. | ||
1878 | * | ||
1879 | * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library | ||
1880 | * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the | ||
1881 | * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the | ||
1882 | * Mid-Level SCSI request structure. | ||
1883 | * | ||
1884 | * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each | ||
1885 | * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux | ||
1886 | * up to 255 scatter-gather elements may be used per request or | ||
1887 | * ADV_SCSI_REQ_Q. | ||
1888 | * | ||
1889 | * Both structures must be 32 byte aligned. | ||
1890 | */ | ||
1891 | typedef struct adv_sgblk { | ||
1892 | ADV_SG_BLOCK sg_block; /* Sgblock structure. */ | ||
1893 | uchar align[32]; /* Sgblock structure padding. */ | ||
1894 | struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */ | ||
1895 | } adv_sgblk_t; | ||
1896 | |||
1897 | typedef struct adv_req { | ||
1898 | ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */ | ||
1899 | uchar align[32]; /* Request structure padding. */ | ||
1900 | struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */ | ||
1901 | adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */ | ||
1902 | struct adv_req *next_reqp; /* Next Request Structure. */ | ||
1903 | } adv_req_t; | ||
1904 | |||
1905 | /* | ||
1906 | * Adapter operation variable structure. | ||
1907 | * | ||
1908 | * One structure is required per host adapter. | ||
1909 | * | ||
1910 | * Field naming convention: | ||
1911 | * | ||
1912 | * *_able indicates both whether a feature should be enabled or disabled | ||
1913 | * and whether a device isi capable of the feature. At initialization | ||
1914 | * this field may be set, but later if a device is found to be incapable | ||
1915 | * of the feature, the field is cleared. | ||
1916 | */ | ||
1917 | typedef struct adv_dvc_var { | ||
1918 | AdvPortAddr iop_base; /* I/O port address */ | ||
1919 | ushort err_code; /* fatal error code */ | ||
1920 | ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */ | ||
1921 | ushort wdtr_able; /* try WDTR for a device */ | ||
1922 | ushort sdtr_able; /* try SDTR for a device */ | ||
1923 | ushort ultra_able; /* try SDTR Ultra speed for a device */ | ||
1924 | ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */ | ||
1925 | ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */ | ||
1926 | ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */ | ||
1927 | ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */ | ||
1928 | ushort tagqng_able; /* try tagged queuing with a device */ | ||
1929 | ushort ppr_able; /* PPR message capable per TID bitmask. */ | ||
1930 | uchar max_dvc_qng; /* maximum number of tagged commands per device */ | ||
1931 | ushort start_motor; /* start motor command allowed */ | ||
1932 | uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */ | ||
1933 | uchar chip_no; /* should be assigned by caller */ | ||
1934 | uchar max_host_qng; /* maximum number of Q'ed command allowed */ | ||
1935 | ushort no_scam; /* scam_tolerant of EEPROM */ | ||
1936 | struct asc_board *drv_ptr; /* driver pointer to private structure */ | ||
1937 | uchar chip_scsi_id; /* chip SCSI target ID */ | ||
1938 | uchar chip_type; | ||
1939 | uchar bist_err_code; | ||
1940 | ADV_CARR_T *carrier_buf; | ||
1941 | ADV_CARR_T *carr_freelist; /* Carrier free list. */ | ||
1942 | ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */ | ||
1943 | ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */ | ||
1944 | ushort carr_pending_cnt; /* Count of pending carriers. */ | ||
1945 | struct adv_req *orig_reqp; /* adv_req_t memory block. */ | ||
1946 | /* | ||
1947 | * Note: The following fields will not be used after initialization. The | ||
1948 | * driver may discard the buffer after initialization is done. | ||
1949 | */ | ||
1950 | ADV_DVC_CFG *cfg; /* temporary configuration structure */ | ||
1951 | } ADV_DVC_VAR; | ||
1952 | |||
1953 | /* | ||
3072 | * Microcode idle loop commands | 1954 | * Microcode idle loop commands |
3073 | */ | 1955 | */ |
3074 | #define IDLE_CMD_COMPLETED 0 | 1956 | #define IDLE_CMD_COMPLETED 0 |
@@ -3092,10 +1974,8 @@ typedef struct adv_scsi_req_q { | |||
3092 | /* | 1974 | /* |
3093 | * Wait loop time out values. | 1975 | * Wait loop time out values. |
3094 | */ | 1976 | */ |
3095 | #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */ | ||
3096 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ | 1977 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ |
3097 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ | 1978 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ |
3098 | #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */ | ||
3099 | #define SCSI_MAX_RETRY 10 /* retry count */ | 1979 | #define SCSI_MAX_RETRY 10 /* retry count */ |
3100 | 1980 | ||
3101 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ | 1981 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ |
@@ -3105,53 +1985,6 @@ typedef struct adv_scsi_req_q { | |||
3105 | 1985 | ||
3106 | #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */ | 1986 | #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */ |
3107 | 1987 | ||
3108 | /* | ||
3109 | * Device drivers must define the following functions. | ||
3110 | */ | ||
3111 | static inline ulong DvcEnterCritical(void); | ||
3112 | static inline void DvcLeaveCritical(ulong); | ||
3113 | static void DvcSleepMilliSecond(ADV_DCNT); | ||
3114 | static uchar DvcAdvReadPCIConfigByte(ADV_DVC_VAR *, ushort); | ||
3115 | static void DvcAdvWritePCIConfigByte(ADV_DVC_VAR *, ushort, uchar); | ||
3116 | static ADV_PADDR DvcGetPhyAddr(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *, | ||
3117 | uchar *, ASC_SDCNT *, int); | ||
3118 | static void DvcDelayMicroSecond(ADV_DVC_VAR *, ushort); | ||
3119 | |||
3120 | /* | ||
3121 | * Adv Library functions available to drivers. | ||
3122 | */ | ||
3123 | static int AdvExeScsiQueue(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | ||
3124 | static int AdvISR(ADV_DVC_VAR *); | ||
3125 | static int AdvInitGetConfig(ADV_DVC_VAR *); | ||
3126 | static int AdvInitAsc3550Driver(ADV_DVC_VAR *); | ||
3127 | static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *); | ||
3128 | static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *); | ||
3129 | static int AdvResetChipAndSB(ADV_DVC_VAR *); | ||
3130 | static int AdvResetSB(ADV_DVC_VAR *asc_dvc); | ||
3131 | |||
3132 | /* | ||
3133 | * Internal Adv Library functions. | ||
3134 | */ | ||
3135 | static int AdvSendIdleCmd(ADV_DVC_VAR *, ushort, ADV_DCNT); | ||
3136 | static void AdvInquiryHandling(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | ||
3137 | static int AdvInitFrom3550EEP(ADV_DVC_VAR *); | ||
3138 | static int AdvInitFrom38C0800EEP(ADV_DVC_VAR *); | ||
3139 | static int AdvInitFrom38C1600EEP(ADV_DVC_VAR *); | ||
3140 | static ushort AdvGet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); | ||
3141 | static void AdvSet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); | ||
3142 | static ushort AdvGet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); | ||
3143 | static void AdvSet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); | ||
3144 | static ushort AdvGet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); | ||
3145 | static void AdvSet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); | ||
3146 | static void AdvWaitEEPCmd(AdvPortAddr); | ||
3147 | static ushort AdvReadEEPWord(AdvPortAddr, int); | ||
3148 | |||
3149 | /* | ||
3150 | * PCI Bus Definitions | ||
3151 | */ | ||
3152 | #define AscPCICmdRegBits_BusMastering 0x0007 | ||
3153 | #define AscPCICmdRegBits_ParErrRespCtrl 0x0040 | ||
3154 | |||
3155 | /* Read byte from a register. */ | 1988 | /* Read byte from a register. */ |
3156 | #define AdvReadByteRegister(iop_base, reg_off) \ | 1989 | #define AdvReadByteRegister(iop_base, reg_off) \ |
3157 | (ADV_MEM_READB((iop_base) + (reg_off))) | 1990 | (ADV_MEM_READB((iop_base) + (reg_off))) |
@@ -3319,23 +2152,6 @@ do { \ | |||
3319 | #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */ | 2152 | #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */ |
3320 | #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */ | 2153 | #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */ |
3321 | 2154 | ||
3322 | /* | ||
3323 | * Default EEPROM Configuration structure defined in a_init.c. | ||
3324 | */ | ||
3325 | static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config; | ||
3326 | static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config; | ||
3327 | static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config; | ||
3328 | |||
3329 | /* | ||
3330 | * DvcGetPhyAddr() flag arguments | ||
3331 | */ | ||
3332 | #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */ | ||
3333 | #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */ | ||
3334 | #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */ | ||
3335 | #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */ | ||
3336 | #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */ | ||
3337 | #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */ | ||
3338 | |||
3339 | /* Return the address that is aligned at the next doubleword >= to 'addr'. */ | 2155 | /* Return the address that is aligned at the next doubleword >= to 'addr'. */ |
3340 | #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7) | 2156 | #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7) |
3341 | #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF) | 2157 | #define ADV_16BALIGN(addr) (((ulong) (addr) + 0xF) & ~0xF) |
@@ -3353,92 +2169,10 @@ static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config; | |||
3353 | (sizeof(ADV_SG_BLOCK) * \ | 2169 | (sizeof(ADV_SG_BLOCK) * \ |
3354 | ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)) | 2170 | ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)) |
3355 | 2171 | ||
3356 | /* | 2172 | /* struct asc_board flags */ |
3357 | * Inquiry data structure and bitfield macros | ||
3358 | * | ||
3359 | * Using bitfields to access the subchar data isn't portable across | ||
3360 | * endianness, so instead mask and shift. Only quantities of more | ||
3361 | * than 1 bit are shifted, since the others are just tested for true | ||
3362 | * or false. | ||
3363 | */ | ||
3364 | |||
3365 | #define ADV_INQ_DVC_TYPE(inq) ((inq)->periph & 0x1f) | ||
3366 | #define ADV_INQ_QUALIFIER(inq) (((inq)->periph & 0xe0) >> 5) | ||
3367 | #define ADV_INQ_DVC_TYPE_MOD(inq) ((inq)->devtype & 0x7f) | ||
3368 | #define ADV_INQ_REMOVABLE(inq) ((inq)->devtype & 0x80) | ||
3369 | #define ADV_INQ_ANSI_VER(inq) ((inq)->ver & 0x07) | ||
3370 | #define ADV_INQ_ECMA_VER(inq) (((inq)->ver & 0x38) >> 3) | ||
3371 | #define ADV_INQ_ISO_VER(inq) (((inq)->ver & 0xc0) >> 6) | ||
3372 | #define ADV_INQ_RESPONSE_FMT(inq) ((inq)->byte3 & 0x0f) | ||
3373 | #define ADV_INQ_TERM_IO(inq) ((inq)->byte3 & 0x40) | ||
3374 | #define ADV_INQ_ASYNC_NOTIF(inq) ((inq)->byte3 & 0x80) | ||
3375 | #define ADV_INQ_SOFT_RESET(inq) ((inq)->flags & 0x01) | ||
3376 | #define ADV_INQ_CMD_QUEUE(inq) ((inq)->flags & 0x02) | ||
3377 | #define ADV_INQ_LINK_CMD(inq) ((inq)->flags & 0x08) | ||
3378 | #define ADV_INQ_SYNC(inq) ((inq)->flags & 0x10) | ||
3379 | #define ADV_INQ_WIDE16(inq) ((inq)->flags & 0x20) | ||
3380 | #define ADV_INQ_WIDE32(inq) ((inq)->flags & 0x40) | ||
3381 | #define ADV_INQ_REL_ADDR(inq) ((inq)->flags & 0x80) | ||
3382 | #define ADV_INQ_INFO_UNIT(inq) ((inq)->info & 0x01) | ||
3383 | #define ADV_INQ_QUICK_ARB(inq) ((inq)->info & 0x02) | ||
3384 | #define ADV_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) | ||
3385 | |||
3386 | typedef struct { | ||
3387 | uchar periph; /* peripheral device type [0:4] */ | ||
3388 | /* peripheral qualifier [5:7] */ | ||
3389 | uchar devtype; /* device type modifier (for SCSI I) [0:6] */ | ||
3390 | /* RMB - removable medium bit [7] */ | ||
3391 | uchar ver; /* ANSI approved version [0:2] */ | ||
3392 | /* ECMA version [3:5] */ | ||
3393 | /* ISO version [6:7] */ | ||
3394 | uchar byte3; /* response data format [0:3] */ | ||
3395 | /* 0 SCSI 1 */ | ||
3396 | /* 1 CCS */ | ||
3397 | /* 2 SCSI-2 */ | ||
3398 | /* 3-F reserved */ | ||
3399 | /* reserved [4:5] */ | ||
3400 | /* terminate I/O process bit (see 5.6.22) [6] */ | ||
3401 | /* asynch. event notification (processor) [7] */ | ||
3402 | uchar add_len; /* additional length */ | ||
3403 | uchar res1; /* reserved */ | ||
3404 | uchar res2; /* reserved */ | ||
3405 | uchar flags; /* soft reset implemented [0] */ | ||
3406 | /* command queuing [1] */ | ||
3407 | /* reserved [2] */ | ||
3408 | /* linked command for this logical unit [3] */ | ||
3409 | /* synchronous data transfer [4] */ | ||
3410 | /* wide bus 16 bit data transfer [5] */ | ||
3411 | /* wide bus 32 bit data transfer [6] */ | ||
3412 | /* relative addressing mode [7] */ | ||
3413 | uchar vendor_id[8]; /* vendor identification */ | ||
3414 | uchar product_id[16]; /* product identification */ | ||
3415 | uchar product_rev_level[4]; /* product revision level */ | ||
3416 | uchar vendor_specific[20]; /* vendor specific */ | ||
3417 | uchar info; /* information unit supported [0] */ | ||
3418 | /* quick arbitrate supported [1] */ | ||
3419 | /* clocking field [2:3] */ | ||
3420 | /* reserved [4:7] */ | ||
3421 | uchar res3; /* reserved */ | ||
3422 | } ADV_SCSI_INQUIRY; /* 58 bytes */ | ||
3423 | |||
3424 | /* | ||
3425 | * --- Driver Constants and Macros | ||
3426 | */ | ||
3427 | |||
3428 | #define ASC_NUM_BOARD_SUPPORTED 16 | ||
3429 | #define ASC_NUM_IOPORT_PROBE 4 | ||
3430 | #define ASC_NUM_BUS 4 | ||
3431 | |||
3432 | /* Reference Scsi_Host hostdata */ | ||
3433 | #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata)) | ||
3434 | |||
3435 | /* asc_board_t flags */ | ||
3436 | #define ASC_HOST_IN_RESET 0x01 | ||
3437 | #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */ | 2173 | #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */ |
3438 | #define ASC_SELECT_QUEUE_DEPTHS 0x08 | ||
3439 | 2174 | ||
3440 | #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0) | 2175 | #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0) |
3441 | #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD) | ||
3442 | 2176 | ||
3443 | #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */ | 2177 | #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */ |
3444 | 2178 | ||
@@ -3473,82 +2207,14 @@ typedef struct { | |||
3473 | #define HOST_BYTE(byte) ((byte) << 16) | 2207 | #define HOST_BYTE(byte) ((byte) << 16) |
3474 | #define DRIVER_BYTE(byte) ((byte) << 24) | 2208 | #define DRIVER_BYTE(byte) ((byte) << 24) |
3475 | 2209 | ||
3476 | /* | 2210 | #define ASC_STATS(shost, counter) ASC_STATS_ADD(shost, counter, 1) |
3477 | * The following definitions and macros are OS independent interfaces to | ||
3478 | * the queue functions: | ||
3479 | * REQ - SCSI request structure | ||
3480 | * REQP - pointer to SCSI request structure | ||
3481 | * REQPTID(reqp) - reqp's target id | ||
3482 | * REQPNEXT(reqp) - reqp's next pointer | ||
3483 | * REQPNEXTP(reqp) - pointer to reqp's next pointer | ||
3484 | * REQPTIME(reqp) - reqp's time stamp value | ||
3485 | * REQTIMESTAMP() - system time stamp value | ||
3486 | */ | ||
3487 | typedef struct scsi_cmnd REQ, *REQP; | ||
3488 | #define REQPNEXT(reqp) ((REQP) ((reqp)->host_scribble)) | ||
3489 | #define REQPNEXTP(reqp) ((REQP *) &((reqp)->host_scribble)) | ||
3490 | #define REQPTID(reqp) ((reqp)->device->id) | ||
3491 | #define REQPTIME(reqp) ((reqp)->SCp.this_residual) | ||
3492 | #define REQTIMESTAMP() (jiffies) | ||
3493 | |||
3494 | #define REQTIMESTAT(function, ascq, reqp, tid) \ | ||
3495 | { \ | ||
3496 | /* | ||
3497 | * If the request time stamp is less than the system time stamp, then \ | ||
3498 | * maybe the system time stamp wrapped. Set the request time to zero.\ | ||
3499 | */ \ | ||
3500 | if (REQPTIME(reqp) <= REQTIMESTAMP()) { \ | ||
3501 | REQPTIME(reqp) = REQTIMESTAMP() - REQPTIME(reqp); \ | ||
3502 | } else { \ | ||
3503 | /* Indicate an error occurred with the assertion. */ \ | ||
3504 | ASC_ASSERT(REQPTIME(reqp) <= REQTIMESTAMP()); \ | ||
3505 | REQPTIME(reqp) = 0; \ | ||
3506 | } \ | ||
3507 | /* Handle first minimum time case without external initialization. */ \ | ||
3508 | if (((ascq)->q_tot_cnt[tid] == 1) || \ | ||
3509 | (REQPTIME(reqp) < (ascq)->q_min_tim[tid])) { \ | ||
3510 | (ascq)->q_min_tim[tid] = REQPTIME(reqp); \ | ||
3511 | ASC_DBG3(1, "%s: new q_min_tim[%d] %u\n", \ | ||
3512 | (function), (tid), (ascq)->q_min_tim[tid]); \ | ||
3513 | } \ | ||
3514 | if (REQPTIME(reqp) > (ascq)->q_max_tim[tid]) { \ | ||
3515 | (ascq)->q_max_tim[tid] = REQPTIME(reqp); \ | ||
3516 | ASC_DBG3(1, "%s: new q_max_tim[%d] %u\n", \ | ||
3517 | (function), tid, (ascq)->q_max_tim[tid]); \ | ||
3518 | } \ | ||
3519 | (ascq)->q_tot_tim[tid] += REQPTIME(reqp); \ | ||
3520 | /* Reset the time stamp field. */ \ | ||
3521 | REQPTIME(reqp) = 0; \ | ||
3522 | } | ||
3523 | |||
3524 | /* asc_enqueue() flags */ | ||
3525 | #define ASC_FRONT 1 | ||
3526 | #define ASC_BACK 2 | ||
3527 | |||
3528 | /* asc_dequeue_list() argument */ | ||
3529 | #define ASC_TID_ALL (-1) | ||
3530 | |||
3531 | /* Return non-zero, if the queue is empty. */ | ||
3532 | #define ASC_QUEUE_EMPTY(ascq) ((ascq)->q_tidmask == 0) | ||
3533 | |||
3534 | #define PCI_MAX_SLOT 0x1F | ||
3535 | #define PCI_MAX_BUS 0xFF | ||
3536 | #define PCI_IOADDRESS_MASK 0xFFFE | ||
3537 | #define ASC_PCI_DEVICE_ID_CNT 6 /* PCI Device ID count. */ | ||
3538 | |||
3539 | #ifndef ADVANSYS_STATS | 2211 | #ifndef ADVANSYS_STATS |
3540 | #define ASC_STATS(shost, counter) | ||
3541 | #define ASC_STATS_ADD(shost, counter, count) | 2212 | #define ASC_STATS_ADD(shost, counter, count) |
3542 | #else /* ADVANSYS_STATS */ | 2213 | #else /* ADVANSYS_STATS */ |
3543 | #define ASC_STATS(shost, counter) \ | ||
3544 | (ASC_BOARDP(shost)->asc_stats.counter++) | ||
3545 | |||
3546 | #define ASC_STATS_ADD(shost, counter, count) \ | 2214 | #define ASC_STATS_ADD(shost, counter, count) \ |
3547 | (ASC_BOARDP(shost)->asc_stats.counter += (count)) | 2215 | (((struct asc_board *) shost_priv(shost))->asc_stats.counter += (count)) |
3548 | #endif /* ADVANSYS_STATS */ | 2216 | #endif /* ADVANSYS_STATS */ |
3549 | 2217 | ||
3550 | #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit)) | ||
3551 | |||
3552 | /* If the result wraps when calculating tenths, return 0. */ | 2218 | /* If the result wraps when calculating tenths, return 0. */ |
3553 | #define ASC_TENTHS(num, den) \ | 2219 | #define ASC_TENTHS(num, den) \ |
3554 | (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \ | 2220 | (((10 * ((num)/(den))) > (((num) * 10)/(den))) ? \ |
@@ -3589,13 +2255,8 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3589 | 2255 | ||
3590 | #ifndef ADVANSYS_DEBUG | 2256 | #ifndef ADVANSYS_DEBUG |
3591 | 2257 | ||
3592 | #define ASC_DBG(lvl, s) | 2258 | #define ASC_DBG(lvl, s...) |
3593 | #define ASC_DBG1(lvl, s, a1) | ||
3594 | #define ASC_DBG2(lvl, s, a1, a2) | ||
3595 | #define ASC_DBG3(lvl, s, a1, a2, a3) | ||
3596 | #define ASC_DBG4(lvl, s, a1, a2, a3, a4) | ||
3597 | #define ASC_DBG_PRT_SCSI_HOST(lvl, s) | 2259 | #define ASC_DBG_PRT_SCSI_HOST(lvl, s) |
3598 | #define ASC_DBG_PRT_SCSI_CMND(lvl, s) | ||
3599 | #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) | 2260 | #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) |
3600 | #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) | 2261 | #define ASC_DBG_PRT_ADV_SCSI_REQ_Q(lvl, scsiqp) |
3601 | #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) | 2262 | #define ASC_DBG_PRT_ASC_QDONE_INFO(lvl, qdone) |
@@ -3614,40 +2275,11 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3614 | * 2-N: Verbose Tracing | 2275 | * 2-N: Verbose Tracing |
3615 | */ | 2276 | */ |
3616 | 2277 | ||
3617 | #define ASC_DBG(lvl, s) \ | 2278 | #define ASC_DBG(lvl, format, arg...) { \ |
3618 | { \ | 2279 | if (asc_dbglvl >= (lvl)) \ |
3619 | if (asc_dbglvl >= (lvl)) { \ | 2280 | printk(KERN_DEBUG "%s: %s: " format, DRV_NAME, \ |
3620 | printk(s); \ | 2281 | __FUNCTION__ , ## arg); \ |
3621 | } \ | 2282 | } |
3622 | } | ||
3623 | |||
3624 | #define ASC_DBG1(lvl, s, a1) \ | ||
3625 | { \ | ||
3626 | if (asc_dbglvl >= (lvl)) { \ | ||
3627 | printk((s), (a1)); \ | ||
3628 | } \ | ||
3629 | } | ||
3630 | |||
3631 | #define ASC_DBG2(lvl, s, a1, a2) \ | ||
3632 | { \ | ||
3633 | if (asc_dbglvl >= (lvl)) { \ | ||
3634 | printk((s), (a1), (a2)); \ | ||
3635 | } \ | ||
3636 | } | ||
3637 | |||
3638 | #define ASC_DBG3(lvl, s, a1, a2, a3) \ | ||
3639 | { \ | ||
3640 | if (asc_dbglvl >= (lvl)) { \ | ||
3641 | printk((s), (a1), (a2), (a3)); \ | ||
3642 | } \ | ||
3643 | } | ||
3644 | |||
3645 | #define ASC_DBG4(lvl, s, a1, a2, a3, a4) \ | ||
3646 | { \ | ||
3647 | if (asc_dbglvl >= (lvl)) { \ | ||
3648 | printk((s), (a1), (a2), (a3), (a4)); \ | ||
3649 | } \ | ||
3650 | } | ||
3651 | 2283 | ||
3652 | #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \ | 2284 | #define ASC_DBG_PRT_SCSI_HOST(lvl, s) \ |
3653 | { \ | 2285 | { \ |
@@ -3656,13 +2288,6 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3656 | } \ | 2288 | } \ |
3657 | } | 2289 | } |
3658 | 2290 | ||
3659 | #define ASC_DBG_PRT_SCSI_CMND(lvl, s) \ | ||
3660 | { \ | ||
3661 | if (asc_dbglvl >= (lvl)) { \ | ||
3662 | asc_prt_scsi_cmnd(s); \ | ||
3663 | } \ | ||
3664 | } | ||
3665 | |||
3666 | #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \ | 2291 | #define ASC_DBG_PRT_ASC_SCSI_Q(lvl, scsiqp) \ |
3667 | { \ | 2292 | { \ |
3668 | if (asc_dbglvl >= (lvl)) { \ | 2293 | if (asc_dbglvl >= (lvl)) { \ |
@@ -3701,24 +2326,6 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3701 | ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len)); | 2326 | ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len)); |
3702 | #endif /* ADVANSYS_DEBUG */ | 2327 | #endif /* ADVANSYS_DEBUG */ |
3703 | 2328 | ||
3704 | #ifndef ADVANSYS_ASSERT | ||
3705 | #define ASC_ASSERT(a) | ||
3706 | #else /* ADVANSYS_ASSERT */ | ||
3707 | |||
3708 | #define ASC_ASSERT(a) \ | ||
3709 | { \ | ||
3710 | if (!(a)) { \ | ||
3711 | printk("ASC_ASSERT() Failure: file %s, line %d\n", \ | ||
3712 | __FILE__, __LINE__); \ | ||
3713 | } \ | ||
3714 | } | ||
3715 | |||
3716 | #endif /* ADVANSYS_ASSERT */ | ||
3717 | |||
3718 | /* | ||
3719 | * --- Driver Structures | ||
3720 | */ | ||
3721 | |||
3722 | #ifdef ADVANSYS_STATS | 2329 | #ifdef ADVANSYS_STATS |
3723 | 2330 | ||
3724 | /* Per board statistics structure */ | 2331 | /* Per board statistics structure */ |
@@ -3739,72 +2346,23 @@ struct asc_stats { | |||
3739 | ADV_DCNT exe_error; /* # ASC_ERROR returns. */ | 2346 | ADV_DCNT exe_error; /* # ASC_ERROR returns. */ |
3740 | ADV_DCNT exe_unknown; /* # unknown returns. */ | 2347 | ADV_DCNT exe_unknown; /* # unknown returns. */ |
3741 | /* Data Transfer Statistics */ | 2348 | /* Data Transfer Statistics */ |
3742 | ADV_DCNT cont_cnt; /* # non-scatter-gather I/O requests received */ | 2349 | ADV_DCNT xfer_cnt; /* # I/O requests received */ |
3743 | ADV_DCNT cont_xfer; /* # contiguous transfer 512-bytes */ | 2350 | ADV_DCNT xfer_elem; /* # scatter-gather elements */ |
3744 | ADV_DCNT sg_cnt; /* # scatter-gather I/O requests received */ | 2351 | ADV_DCNT xfer_sect; /* # 512-byte blocks */ |
3745 | ADV_DCNT sg_elem; /* # scatter-gather elements */ | ||
3746 | ADV_DCNT sg_xfer; /* # scatter-gather transfer 512-bytes */ | ||
3747 | }; | 2352 | }; |
3748 | #endif /* ADVANSYS_STATS */ | 2353 | #endif /* ADVANSYS_STATS */ |
3749 | 2354 | ||
3750 | /* | 2355 | /* |
3751 | * Request queuing structure | ||
3752 | */ | ||
3753 | typedef struct asc_queue { | ||
3754 | ADV_SCSI_BIT_ID_TYPE q_tidmask; /* queue mask */ | ||
3755 | REQP q_first[ADV_MAX_TID + 1]; /* first queued request */ | ||
3756 | REQP q_last[ADV_MAX_TID + 1]; /* last queued request */ | ||
3757 | #ifdef ADVANSYS_STATS | ||
3758 | short q_cur_cnt[ADV_MAX_TID + 1]; /* current queue count */ | ||
3759 | short q_max_cnt[ADV_MAX_TID + 1]; /* maximum queue count */ | ||
3760 | ADV_DCNT q_tot_cnt[ADV_MAX_TID + 1]; /* total enqueue count */ | ||
3761 | ADV_DCNT q_tot_tim[ADV_MAX_TID + 1]; /* total time queued */ | ||
3762 | ushort q_max_tim[ADV_MAX_TID + 1]; /* maximum time queued */ | ||
3763 | ushort q_min_tim[ADV_MAX_TID + 1]; /* minimum time queued */ | ||
3764 | #endif /* ADVANSYS_STATS */ | ||
3765 | } asc_queue_t; | ||
3766 | |||
3767 | /* | ||
3768 | * Adv Library Request Structures | ||
3769 | * | ||
3770 | * The following two structures are used to process Wide Board requests. | ||
3771 | * | ||
3772 | * The ADV_SCSI_REQ_Q structure in adv_req_t is passed to the Adv Library | ||
3773 | * and microcode with the ADV_SCSI_REQ_Q field 'srb_ptr' pointing to the | ||
3774 | * adv_req_t. The adv_req_t structure 'cmndp' field in turn points to the | ||
3775 | * Mid-Level SCSI request structure. | ||
3776 | * | ||
3777 | * Zero or more ADV_SG_BLOCK are used with each ADV_SCSI_REQ_Q. Each | ||
3778 | * ADV_SG_BLOCK structure holds 15 scatter-gather elements. Under Linux | ||
3779 | * up to 255 scatter-gather elements may be used per request or | ||
3780 | * ADV_SCSI_REQ_Q. | ||
3781 | * | ||
3782 | * Both structures must be 32 byte aligned. | ||
3783 | */ | ||
3784 | typedef struct adv_sgblk { | ||
3785 | ADV_SG_BLOCK sg_block; /* Sgblock structure. */ | ||
3786 | uchar align[32]; /* Sgblock structure padding. */ | ||
3787 | struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */ | ||
3788 | } adv_sgblk_t; | ||
3789 | |||
3790 | typedef struct adv_req { | ||
3791 | ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */ | ||
3792 | uchar align[32]; /* Request structure padding. */ | ||
3793 | struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */ | ||
3794 | adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */ | ||
3795 | struct adv_req *next_reqp; /* Next Request Structure. */ | ||
3796 | } adv_req_t; | ||
3797 | |||
3798 | /* | ||
3799 | * Structure allocated for each board. | 2356 | * Structure allocated for each board. |
3800 | * | 2357 | * |
3801 | * This structure is allocated by scsi_register() at the end | 2358 | * This structure is allocated by scsi_host_alloc() at the end |
3802 | * of the 'Scsi_Host' structure starting at the 'hostdata' | 2359 | * of the 'Scsi_Host' structure starting at the 'hostdata' |
3803 | * field. It is guaranteed to be allocated from DMA-able memory. | 2360 | * field. It is guaranteed to be allocated from DMA-able memory. |
3804 | */ | 2361 | */ |
3805 | typedef struct asc_board { | 2362 | struct asc_board { |
3806 | int id; /* Board Id */ | 2363 | struct device *dev; |
3807 | uint flags; /* Board flags */ | 2364 | uint flags; /* Board flags */ |
2365 | unsigned int irq; | ||
3808 | union { | 2366 | union { |
3809 | ASC_DVC_VAR asc_dvc_var; /* Narrow board */ | 2367 | ASC_DVC_VAR asc_dvc_var; /* Narrow board */ |
3810 | ADV_DVC_VAR adv_dvc_var; /* Wide board */ | 2368 | ADV_DVC_VAR adv_dvc_var; /* Wide board */ |
@@ -3814,11 +2372,7 @@ typedef struct asc_board { | |||
3814 | ADV_DVC_CFG adv_dvc_cfg; /* Wide board */ | 2372 | ADV_DVC_CFG adv_dvc_cfg; /* Wide board */ |
3815 | } dvc_cfg; | 2373 | } dvc_cfg; |
3816 | ushort asc_n_io_port; /* Number I/O ports. */ | 2374 | ushort asc_n_io_port; /* Number I/O ports. */ |
3817 | asc_queue_t active; /* Active command queue */ | ||
3818 | asc_queue_t waiting; /* Waiting command queue */ | ||
3819 | asc_queue_t done; /* Done command queue */ | ||
3820 | ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */ | 2375 | ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */ |
3821 | struct scsi_device *device[ADV_MAX_TID + 1]; /* Mid-Level Scsi Device */ | ||
3822 | ushort reqcnt[ADV_MAX_TID + 1]; /* Starvation request count */ | 2376 | ushort reqcnt[ADV_MAX_TID + 1]; /* Starvation request count */ |
3823 | ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */ | 2377 | ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */ |
3824 | ushort queue_full_cnt[ADV_MAX_TID + 1]; /* Queue full count */ | 2378 | ushort queue_full_cnt[ADV_MAX_TID + 1]; /* Queue full count */ |
@@ -3829,2409 +2383,529 @@ typedef struct asc_board { | |||
3829 | ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */ | 2383 | ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */ |
3830 | } eep_config; | 2384 | } eep_config; |
3831 | ulong last_reset; /* Saved last reset time */ | 2385 | ulong last_reset; /* Saved last reset time */ |
3832 | spinlock_t lock; /* Board spinlock */ | ||
3833 | #ifdef CONFIG_PROC_FS | ||
3834 | /* /proc/scsi/advansys/[0...] */ | 2386 | /* /proc/scsi/advansys/[0...] */ |
3835 | char *prtbuf; /* /proc print buffer */ | 2387 | char *prtbuf; /* /proc print buffer */ |
3836 | #endif /* CONFIG_PROC_FS */ | ||
3837 | #ifdef ADVANSYS_STATS | 2388 | #ifdef ADVANSYS_STATS |
3838 | struct asc_stats asc_stats; /* Board statistics */ | 2389 | struct asc_stats asc_stats; /* Board statistics */ |
3839 | #endif /* ADVANSYS_STATS */ | 2390 | #endif /* ADVANSYS_STATS */ |
3840 | /* | 2391 | /* |
3841 | * The following fields are used only for Narrow Boards. | 2392 | * The following fields are used only for Narrow Boards. |
3842 | */ | 2393 | */ |
3843 | /* The following three structures must be in DMA-able memory. */ | ||
3844 | ASC_SCSI_REQ_Q scsireqq; | ||
3845 | ASC_CAP_INFO cap_info; | ||
3846 | ASC_SCSI_INQUIRY inquiry; | ||
3847 | uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */ | 2394 | uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */ |
3848 | /* | 2395 | /* |
3849 | * The following fields are used only for Wide Boards. | 2396 | * The following fields are used only for Wide Boards. |
3850 | */ | 2397 | */ |
3851 | void __iomem *ioremap_addr; /* I/O Memory remap address. */ | 2398 | void __iomem *ioremap_addr; /* I/O Memory remap address. */ |
3852 | ushort ioport; /* I/O Port address. */ | 2399 | ushort ioport; /* I/O Port address. */ |
3853 | ADV_CARR_T *orig_carrp; /* ADV_CARR_T memory block. */ | ||
3854 | adv_req_t *orig_reqp; /* adv_req_t memory block. */ | ||
3855 | adv_req_t *adv_reqp; /* Request structures. */ | 2400 | adv_req_t *adv_reqp; /* Request structures. */ |
3856 | adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */ | 2401 | adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */ |
3857 | ushort bios_signature; /* BIOS Signature. */ | 2402 | ushort bios_signature; /* BIOS Signature. */ |
3858 | ushort bios_version; /* BIOS Version. */ | 2403 | ushort bios_version; /* BIOS Version. */ |
3859 | ushort bios_codeseg; /* BIOS Code Segment. */ | 2404 | ushort bios_codeseg; /* BIOS Code Segment. */ |
3860 | ushort bios_codelen; /* BIOS Code Segment Length. */ | 2405 | ushort bios_codelen; /* BIOS Code Segment Length. */ |
3861 | } asc_board_t; | ||
3862 | |||
3863 | /* | ||
3864 | * PCI configuration structures | ||
3865 | */ | ||
3866 | typedef struct _PCI_DATA_ { | ||
3867 | uchar type; | ||
3868 | uchar bus; | ||
3869 | uchar slot; | ||
3870 | uchar func; | ||
3871 | uchar offset; | ||
3872 | } PCI_DATA; | ||
3873 | |||
3874 | typedef struct _PCI_DEVICE_ { | ||
3875 | ushort vendorID; | ||
3876 | ushort deviceID; | ||
3877 | ushort slotNumber; | ||
3878 | ushort slotFound; | ||
3879 | uchar busNumber; | ||
3880 | uchar maxBusNumber; | ||
3881 | uchar devFunc; | ||
3882 | ushort startSlot; | ||
3883 | ushort endSlot; | ||
3884 | uchar bridge; | ||
3885 | uchar type; | ||
3886 | } PCI_DEVICE; | ||
3887 | |||
3888 | typedef struct _PCI_CONFIG_SPACE_ { | ||
3889 | ushort vendorID; | ||
3890 | ushort deviceID; | ||
3891 | ushort command; | ||
3892 | ushort status; | ||
3893 | uchar revision; | ||
3894 | uchar classCode[3]; | ||
3895 | uchar cacheSize; | ||
3896 | uchar latencyTimer; | ||
3897 | uchar headerType; | ||
3898 | uchar bist; | ||
3899 | ADV_PADDR baseAddress[6]; | ||
3900 | ushort reserved[4]; | ||
3901 | ADV_PADDR optionRomAddr; | ||
3902 | ushort reserved2[4]; | ||
3903 | uchar irqLine; | ||
3904 | uchar irqPin; | ||
3905 | uchar minGnt; | ||
3906 | uchar maxLatency; | ||
3907 | } PCI_CONFIG_SPACE; | ||
3908 | |||
3909 | /* | ||
3910 | * --- Driver Data | ||
3911 | */ | ||
3912 | |||
3913 | /* Note: All driver global data should be initialized. */ | ||
3914 | |||
3915 | /* Number of boards detected in system. */ | ||
3916 | static int asc_board_count = 0; | ||
3917 | static struct Scsi_Host *asc_host[ASC_NUM_BOARD_SUPPORTED] = { NULL }; | ||
3918 | |||
3919 | /* Overrun buffer used by all narrow boards. */ | ||
3920 | static uchar overrun_buf[ASC_OVERRUN_BSIZE] = { 0 }; | ||
3921 | |||
3922 | /* | ||
3923 | * Global structures required to issue a command. | ||
3924 | */ | ||
3925 | static ASC_SCSI_Q asc_scsi_q = { {0} }; | ||
3926 | static ASC_SG_HEAD asc_sg_head = { 0 }; | ||
3927 | |||
3928 | /* List of supported bus types. */ | ||
3929 | static ushort asc_bus[ASC_NUM_BUS] __initdata = { | ||
3930 | ASC_IS_ISA, | ||
3931 | ASC_IS_VL, | ||
3932 | ASC_IS_EISA, | ||
3933 | ASC_IS_PCI, | ||
3934 | }; | 2406 | }; |
3935 | 2407 | ||
3936 | static int asc_iopflag = ASC_FALSE; | 2408 | #define asc_dvc_to_board(asc_dvc) container_of(asc_dvc, struct asc_board, \ |
3937 | static int asc_ioport[ASC_NUM_IOPORT_PROBE] = { 0, 0, 0, 0 }; | 2409 | dvc_var.asc_dvc_var) |
2410 | #define adv_dvc_to_board(adv_dvc) container_of(adv_dvc, struct asc_board, \ | ||
2411 | dvc_var.adv_dvc_var) | ||
2412 | #define adv_dvc_to_pdev(adv_dvc) to_pci_dev(adv_dvc_to_board(adv_dvc)->dev) | ||
3938 | 2413 | ||
3939 | #ifdef ADVANSYS_DEBUG | 2414 | #ifdef ADVANSYS_DEBUG |
3940 | static char *asc_bus_name[ASC_NUM_BUS] = { | ||
3941 | "ASC_IS_ISA", | ||
3942 | "ASC_IS_VL", | ||
3943 | "ASC_IS_EISA", | ||
3944 | "ASC_IS_PCI", | ||
3945 | }; | ||
3946 | |||
3947 | static int asc_dbglvl = 3; | 2415 | static int asc_dbglvl = 3; |
3948 | #endif /* ADVANSYS_DEBUG */ | ||
3949 | |||
3950 | /* Declaration for Asc Library internal data referenced by driver. */ | ||
3951 | static PortAddr _asc_def_iop_base[]; | ||
3952 | |||
3953 | /* | ||
3954 | * --- Driver Function Prototypes | ||
3955 | * | ||
3956 | * advansys.h contains function prototypes for functions global to Linux. | ||
3957 | */ | ||
3958 | |||
3959 | static irqreturn_t advansys_interrupt(int, void *); | ||
3960 | static int advansys_slave_configure(struct scsi_device *); | ||
3961 | static void asc_scsi_done_list(struct scsi_cmnd *); | ||
3962 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *); | ||
3963 | static int asc_build_req(asc_board_t *, struct scsi_cmnd *); | ||
3964 | static int adv_build_req(asc_board_t *, struct scsi_cmnd *, ADV_SCSI_REQ_Q **); | ||
3965 | static int adv_get_sglist(asc_board_t *, adv_req_t *, struct scsi_cmnd *, int); | ||
3966 | static void asc_isr_callback(ASC_DVC_VAR *, ASC_QDONE_INFO *); | ||
3967 | static void adv_isr_callback(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | ||
3968 | static void adv_async_callback(ADV_DVC_VAR *, uchar); | ||
3969 | static void asc_enqueue(asc_queue_t *, REQP, int); | ||
3970 | static REQP asc_dequeue(asc_queue_t *, int); | ||
3971 | static REQP asc_dequeue_list(asc_queue_t *, REQP *, int); | ||
3972 | static int asc_rmqueue(asc_queue_t *, REQP); | ||
3973 | static void asc_execute_queue(asc_queue_t *); | ||
3974 | #ifdef CONFIG_PROC_FS | ||
3975 | static int asc_proc_copy(off_t, off_t, char *, int, char *, int); | ||
3976 | static int asc_prt_board_devices(struct Scsi_Host *, char *, int); | ||
3977 | static int asc_prt_adv_bios(struct Scsi_Host *, char *, int); | ||
3978 | static int asc_get_eeprom_string(ushort *serialnum, uchar *cp); | ||
3979 | static int asc_prt_asc_board_eeprom(struct Scsi_Host *, char *, int); | ||
3980 | static int asc_prt_adv_board_eeprom(struct Scsi_Host *, char *, int); | ||
3981 | static int asc_prt_driver_conf(struct Scsi_Host *, char *, int); | ||
3982 | static int asc_prt_asc_board_info(struct Scsi_Host *, char *, int); | ||
3983 | static int asc_prt_adv_board_info(struct Scsi_Host *, char *, int); | ||
3984 | static int asc_prt_line(char *, int, char *fmt, ...); | ||
3985 | #endif /* CONFIG_PROC_FS */ | ||
3986 | |||
3987 | /* Declaration for Asc Library internal functions referenced by driver. */ | ||
3988 | static int AscFindSignature(PortAddr); | ||
3989 | static ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | ||
3990 | |||
3991 | /* Statistics function prototypes. */ | ||
3992 | #ifdef ADVANSYS_STATS | ||
3993 | #ifdef CONFIG_PROC_FS | ||
3994 | static int asc_prt_board_stats(struct Scsi_Host *, char *, int); | ||
3995 | static int asc_prt_target_stats(struct Scsi_Host *, int, char *, int); | ||
3996 | #endif /* CONFIG_PROC_FS */ | ||
3997 | #endif /* ADVANSYS_STATS */ | ||
3998 | |||
3999 | /* Debug function prototypes. */ | ||
4000 | #ifdef ADVANSYS_DEBUG | ||
4001 | static void asc_prt_scsi_host(struct Scsi_Host *); | ||
4002 | static void asc_prt_scsi_cmnd(struct scsi_cmnd *); | ||
4003 | static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *); | ||
4004 | static void asc_prt_asc_dvc_var(ASC_DVC_VAR *); | ||
4005 | static void asc_prt_asc_scsi_q(ASC_SCSI_Q *); | ||
4006 | static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *); | ||
4007 | static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *); | ||
4008 | static void asc_prt_adv_dvc_var(ADV_DVC_VAR *); | ||
4009 | static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *); | ||
4010 | static void asc_prt_adv_sgblock(int, ADV_SG_BLOCK *); | ||
4011 | static void asc_prt_hex(char *f, uchar *, int); | ||
4012 | #endif /* ADVANSYS_DEBUG */ | ||
4013 | 2416 | ||
4014 | #ifdef CONFIG_PROC_FS | ||
4015 | /* | 2417 | /* |
4016 | * advansys_proc_info() - /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)] | 2418 | * asc_prt_asc_dvc_var() |
4017 | * | ||
4018 | * *buffer: I/O buffer | ||
4019 | * **start: if inout == FALSE pointer into buffer where user read should start | ||
4020 | * offset: current offset into a /proc/scsi/advansys/[0...] file | ||
4021 | * length: length of buffer | ||
4022 | * hostno: Scsi_Host host_no | ||
4023 | * inout: TRUE - user is writing; FALSE - user is reading | ||
4024 | * | ||
4025 | * Return the number of bytes read from or written to a | ||
4026 | * /proc/scsi/advansys/[0...] file. | ||
4027 | * | ||
4028 | * Note: This function uses the per board buffer 'prtbuf' which is | ||
4029 | * allocated when the board is initialized in advansys_detect(). The | ||
4030 | * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is | ||
4031 | * used to write to the buffer. The way asc_proc_copy() is written | ||
4032 | * if 'prtbuf' is too small it will not be overwritten. Instead the | ||
4033 | * user just won't get all the available statistics. | ||
4034 | */ | 2419 | */ |
4035 | static int | 2420 | static void asc_prt_asc_dvc_var(ASC_DVC_VAR *h) |
4036 | advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start, | ||
4037 | off_t offset, int length, int inout) | ||
4038 | { | 2421 | { |
4039 | struct Scsi_Host *shp; | 2422 | printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong)h); |
4040 | asc_board_t *boardp; | ||
4041 | int i; | ||
4042 | char *cp; | ||
4043 | int cplen; | ||
4044 | int cnt; | ||
4045 | int totcnt; | ||
4046 | int leftlen; | ||
4047 | char *curbuf; | ||
4048 | off_t advoffset; | ||
4049 | #ifdef ADVANSYS_STATS | ||
4050 | int tgt_id; | ||
4051 | #endif /* ADVANSYS_STATS */ | ||
4052 | |||
4053 | ASC_DBG(1, "advansys_proc_info: begin\n"); | ||
4054 | |||
4055 | /* | ||
4056 | * User write not supported. | ||
4057 | */ | ||
4058 | if (inout == TRUE) { | ||
4059 | return (-ENOSYS); | ||
4060 | } | ||
4061 | |||
4062 | /* | ||
4063 | * User read of /proc/scsi/advansys/[0...] file. | ||
4064 | */ | ||
4065 | |||
4066 | /* Find the specified board. */ | ||
4067 | for (i = 0; i < asc_board_count; i++) { | ||
4068 | if (asc_host[i]->host_no == shost->host_no) { | ||
4069 | break; | ||
4070 | } | ||
4071 | } | ||
4072 | if (i == asc_board_count) { | ||
4073 | return (-ENOENT); | ||
4074 | } | ||
4075 | |||
4076 | shp = asc_host[i]; | ||
4077 | boardp = ASC_BOARDP(shp); | ||
4078 | |||
4079 | /* Copy read data starting at the beginning of the buffer. */ | ||
4080 | *start = buffer; | ||
4081 | curbuf = buffer; | ||
4082 | advoffset = 0; | ||
4083 | totcnt = 0; | ||
4084 | leftlen = length; | ||
4085 | |||
4086 | /* | ||
4087 | * Get board configuration information. | ||
4088 | * | ||
4089 | * advansys_info() returns the board string from its own static buffer. | ||
4090 | */ | ||
4091 | cp = (char *)advansys_info(shp); | ||
4092 | strcat(cp, "\n"); | ||
4093 | cplen = strlen(cp); | ||
4094 | /* Copy board information. */ | ||
4095 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4096 | totcnt += cnt; | ||
4097 | leftlen -= cnt; | ||
4098 | if (leftlen == 0) { | ||
4099 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4100 | return totcnt; | ||
4101 | } | ||
4102 | advoffset += cplen; | ||
4103 | curbuf += cnt; | ||
4104 | |||
4105 | /* | ||
4106 | * Display Wide Board BIOS Information. | ||
4107 | */ | ||
4108 | if (ASC_WIDE_BOARD(boardp)) { | ||
4109 | cp = boardp->prtbuf; | ||
4110 | cplen = asc_prt_adv_bios(shp, cp, ASC_PRTBUF_SIZE); | ||
4111 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4112 | cnt = | ||
4113 | asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, | ||
4114 | cplen); | ||
4115 | totcnt += cnt; | ||
4116 | leftlen -= cnt; | ||
4117 | if (leftlen == 0) { | ||
4118 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4119 | return totcnt; | ||
4120 | } | ||
4121 | advoffset += cplen; | ||
4122 | curbuf += cnt; | ||
4123 | } | ||
4124 | |||
4125 | /* | ||
4126 | * Display driver information for each device attached to the board. | ||
4127 | */ | ||
4128 | cp = boardp->prtbuf; | ||
4129 | cplen = asc_prt_board_devices(shp, cp, ASC_PRTBUF_SIZE); | ||
4130 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4131 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4132 | totcnt += cnt; | ||
4133 | leftlen -= cnt; | ||
4134 | if (leftlen == 0) { | ||
4135 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4136 | return totcnt; | ||
4137 | } | ||
4138 | advoffset += cplen; | ||
4139 | curbuf += cnt; | ||
4140 | |||
4141 | /* | ||
4142 | * Display EEPROM configuration for the board. | ||
4143 | */ | ||
4144 | cp = boardp->prtbuf; | ||
4145 | if (ASC_NARROW_BOARD(boardp)) { | ||
4146 | cplen = asc_prt_asc_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | ||
4147 | } else { | ||
4148 | cplen = asc_prt_adv_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | ||
4149 | } | ||
4150 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4151 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4152 | totcnt += cnt; | ||
4153 | leftlen -= cnt; | ||
4154 | if (leftlen == 0) { | ||
4155 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4156 | return totcnt; | ||
4157 | } | ||
4158 | advoffset += cplen; | ||
4159 | curbuf += cnt; | ||
4160 | |||
4161 | /* | ||
4162 | * Display driver configuration and information for the board. | ||
4163 | */ | ||
4164 | cp = boardp->prtbuf; | ||
4165 | cplen = asc_prt_driver_conf(shp, cp, ASC_PRTBUF_SIZE); | ||
4166 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4167 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4168 | totcnt += cnt; | ||
4169 | leftlen -= cnt; | ||
4170 | if (leftlen == 0) { | ||
4171 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4172 | return totcnt; | ||
4173 | } | ||
4174 | advoffset += cplen; | ||
4175 | curbuf += cnt; | ||
4176 | 2423 | ||
4177 | #ifdef ADVANSYS_STATS | 2424 | printk(" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl " |
4178 | /* | 2425 | "%d,\n", h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl); |
4179 | * Display driver statistics for the board. | ||
4180 | */ | ||
4181 | cp = boardp->prtbuf; | ||
4182 | cplen = asc_prt_board_stats(shp, cp, ASC_PRTBUF_SIZE); | ||
4183 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); | ||
4184 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4185 | totcnt += cnt; | ||
4186 | leftlen -= cnt; | ||
4187 | if (leftlen == 0) { | ||
4188 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4189 | return totcnt; | ||
4190 | } | ||
4191 | advoffset += cplen; | ||
4192 | curbuf += cnt; | ||
4193 | 2426 | ||
4194 | /* | 2427 | printk(" bus_type %d, init_sdtr 0x%x,\n", h->bus_type, |
4195 | * Display driver statistics for each target. | 2428 | (unsigned)h->init_sdtr); |
4196 | */ | ||
4197 | for (tgt_id = 0; tgt_id <= ADV_MAX_TID; tgt_id++) { | ||
4198 | cp = boardp->prtbuf; | ||
4199 | cplen = asc_prt_target_stats(shp, tgt_id, cp, ASC_PRTBUF_SIZE); | ||
4200 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); | ||
4201 | cnt = | ||
4202 | asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, | ||
4203 | cplen); | ||
4204 | totcnt += cnt; | ||
4205 | leftlen -= cnt; | ||
4206 | if (leftlen == 0) { | ||
4207 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4208 | return totcnt; | ||
4209 | } | ||
4210 | advoffset += cplen; | ||
4211 | curbuf += cnt; | ||
4212 | } | ||
4213 | #endif /* ADVANSYS_STATS */ | ||
4214 | 2429 | ||
4215 | /* | 2430 | printk(" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, " |
4216 | * Display Asc Library dynamic configuration information | 2431 | "chip_no 0x%x,\n", (unsigned)h->sdtr_done, |
4217 | * for the board. | 2432 | (unsigned)h->use_tagged_qng, (unsigned)h->unit_not_ready, |
4218 | */ | 2433 | (unsigned)h->chip_no); |
4219 | cp = boardp->prtbuf; | ||
4220 | if (ASC_NARROW_BOARD(boardp)) { | ||
4221 | cplen = asc_prt_asc_board_info(shp, cp, ASC_PRTBUF_SIZE); | ||
4222 | } else { | ||
4223 | cplen = asc_prt_adv_board_info(shp, cp, ASC_PRTBUF_SIZE); | ||
4224 | } | ||
4225 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4226 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4227 | totcnt += cnt; | ||
4228 | leftlen -= cnt; | ||
4229 | if (leftlen == 0) { | ||
4230 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4231 | return totcnt; | ||
4232 | } | ||
4233 | advoffset += cplen; | ||
4234 | curbuf += cnt; | ||
4235 | 2434 | ||
4236 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 2435 | printk(" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait " |
2436 | "%u,\n", (unsigned)h->queue_full_or_busy, | ||
2437 | (unsigned)h->start_motor, (unsigned)h->scsi_reset_wait); | ||
4237 | 2438 | ||
4238 | return totcnt; | 2439 | printk(" is_in_int %u, max_total_qng %u, cur_total_qng %u, " |
4239 | } | 2440 | "in_critical_cnt %u,\n", (unsigned)h->is_in_int, |
4240 | #endif /* CONFIG_PROC_FS */ | 2441 | (unsigned)h->max_total_qng, (unsigned)h->cur_total_qng, |
2442 | (unsigned)h->in_critical_cnt); | ||
4241 | 2443 | ||
4242 | /* | 2444 | printk(" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, " |
4243 | * advansys_info() | 2445 | "pci_fix_asyn_xfer 0x%x,\n", (unsigned)h->last_q_shortage, |
4244 | * | 2446 | (unsigned)h->init_state, (unsigned)h->no_scam, |
4245 | * Return suitable for printing on the console with the argument | 2447 | (unsigned)h->pci_fix_asyn_xfer); |
4246 | * adapter's configuration information. | ||
4247 | * | ||
4248 | * Note: The information line should not exceed ASC_INFO_SIZE bytes, | ||
4249 | * otherwise the static 'info' array will be overrun. | ||
4250 | */ | ||
4251 | static const char *advansys_info(struct Scsi_Host *shost) | ||
4252 | { | ||
4253 | static char info[ASC_INFO_SIZE]; | ||
4254 | asc_board_t *boardp; | ||
4255 | ASC_DVC_VAR *asc_dvc_varp; | ||
4256 | ADV_DVC_VAR *adv_dvc_varp; | ||
4257 | char *busname; | ||
4258 | int iolen; | ||
4259 | char *widename = NULL; | ||
4260 | 2448 | ||
4261 | boardp = ASC_BOARDP(shost); | 2449 | printk(" cfg 0x%lx\n", (ulong)h->cfg); |
4262 | if (ASC_NARROW_BOARD(boardp)) { | ||
4263 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | ||
4264 | ASC_DBG(1, "advansys_info: begin\n"); | ||
4265 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | ||
4266 | if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) == | ||
4267 | ASC_IS_ISAPNP) { | ||
4268 | busname = "ISA PnP"; | ||
4269 | } else { | ||
4270 | busname = "ISA"; | ||
4271 | } | ||
4272 | /* Don't reference 'shost->n_io_port'; It may be truncated. */ | ||
4273 | sprintf(info, | ||
4274 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X", | ||
4275 | ASC_VERSION, busname, | ||
4276 | (ulong)shost->io_port, | ||
4277 | (ulong)shost->io_port + boardp->asc_n_io_port - | ||
4278 | 1, shost->irq, shost->dma_channel); | ||
4279 | } else { | ||
4280 | if (asc_dvc_varp->bus_type & ASC_IS_VL) { | ||
4281 | busname = "VL"; | ||
4282 | } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) { | ||
4283 | busname = "EISA"; | ||
4284 | } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) { | ||
4285 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA) | ||
4286 | == ASC_IS_PCI_ULTRA) { | ||
4287 | busname = "PCI Ultra"; | ||
4288 | } else { | ||
4289 | busname = "PCI"; | ||
4290 | } | ||
4291 | } else { | ||
4292 | busname = "?"; | ||
4293 | ASC_PRINT2 | ||
4294 | ("advansys_info: board %d: unknown bus type %d\n", | ||
4295 | boardp->id, asc_dvc_varp->bus_type); | ||
4296 | } | ||
4297 | /* Don't reference 'shost->n_io_port'; It may be truncated. */ | ||
4298 | sprintf(info, | ||
4299 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X", | ||
4300 | ASC_VERSION, busname, | ||
4301 | (ulong)shost->io_port, | ||
4302 | (ulong)shost->io_port + boardp->asc_n_io_port - | ||
4303 | 1, shost->irq); | ||
4304 | } | ||
4305 | } else { | ||
4306 | /* | ||
4307 | * Wide Adapter Information | ||
4308 | * | ||
4309 | * Memory-mapped I/O is used instead of I/O space to access | ||
4310 | * the adapter, but display the I/O Port range. The Memory | ||
4311 | * I/O address is displayed through the driver /proc file. | ||
4312 | */ | ||
4313 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
4314 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
4315 | iolen = ADV_3550_IOLEN; | ||
4316 | widename = "Ultra-Wide"; | ||
4317 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
4318 | iolen = ADV_38C0800_IOLEN; | ||
4319 | widename = "Ultra2-Wide"; | ||
4320 | } else { | ||
4321 | iolen = ADV_38C1600_IOLEN; | ||
4322 | widename = "Ultra3-Wide"; | ||
4323 | } | ||
4324 | sprintf(info, | ||
4325 | "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X", | ||
4326 | ASC_VERSION, widename, (ulong)adv_dvc_varp->iop_base, | ||
4327 | (ulong)adv_dvc_varp->iop_base + iolen - 1, shost->irq); | ||
4328 | } | ||
4329 | ASC_ASSERT(strlen(info) < ASC_INFO_SIZE); | ||
4330 | ASC_DBG(1, "advansys_info: end\n"); | ||
4331 | return info; | ||
4332 | } | 2450 | } |
4333 | 2451 | ||
4334 | /* | 2452 | /* |
4335 | * advansys_queuecommand() - interrupt-driven I/O entrypoint. | 2453 | * asc_prt_asc_dvc_cfg() |
4336 | * | ||
4337 | * This function always returns 0. Command return status is saved | ||
4338 | * in the 'scp' result field. | ||
4339 | */ | 2454 | */ |
4340 | static int | 2455 | static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h) |
4341 | advansys_queuecommand(struct scsi_cmnd *scp, void (*done) (struct scsi_cmnd *)) | ||
4342 | { | 2456 | { |
4343 | struct Scsi_Host *shost; | 2457 | printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong)h); |
4344 | asc_board_t *boardp; | ||
4345 | ulong flags; | ||
4346 | struct scsi_cmnd *done_scp; | ||
4347 | |||
4348 | shost = scp->device->host; | ||
4349 | boardp = ASC_BOARDP(shost); | ||
4350 | ASC_STATS(shost, queuecommand); | ||
4351 | |||
4352 | /* host_lock taken by mid-level prior to call but need to protect */ | ||
4353 | /* against own ISR */ | ||
4354 | spin_lock_irqsave(&boardp->lock, flags); | ||
4355 | |||
4356 | /* | ||
4357 | * Block new commands while handling a reset or abort request. | ||
4358 | */ | ||
4359 | if (boardp->flags & ASC_HOST_IN_RESET) { | ||
4360 | ASC_DBG1(1, | ||
4361 | "advansys_queuecommand: scp 0x%lx blocked for reset request\n", | ||
4362 | (ulong)scp); | ||
4363 | scp->result = HOST_BYTE(DID_RESET); | ||
4364 | |||
4365 | /* | ||
4366 | * Add blocked requests to the board's 'done' queue. The queued | ||
4367 | * requests will be completed at the end of the abort or reset | ||
4368 | * handling. | ||
4369 | */ | ||
4370 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
4371 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4372 | return 0; | ||
4373 | } | ||
4374 | 2458 | ||
4375 | /* | 2459 | printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n", |
4376 | * Attempt to execute any waiting commands for the board. | 2460 | h->can_tagged_qng, h->cmd_qng_enabled); |
4377 | */ | 2461 | printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n", |
4378 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { | 2462 | h->disc_enable, h->sdtr_enable); |
4379 | ASC_DBG(1, | ||
4380 | "advansys_queuecommand: before asc_execute_queue() waiting\n"); | ||
4381 | asc_execute_queue(&boardp->waiting); | ||
4382 | } | ||
4383 | 2463 | ||
4384 | /* | 2464 | printk(" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, " |
4385 | * Save the function pointer to Linux mid-level 'done' function | 2465 | "chip_version %d,\n", h->chip_scsi_id, h->isa_dma_speed, |
4386 | * and attempt to execute the command. | 2466 | h->isa_dma_channel, h->chip_version); |
4387 | * | ||
4388 | * If ASC_NOERROR is returned the request has been added to the | ||
4389 | * board's 'active' queue and will be completed by the interrupt | ||
4390 | * handler. | ||
4391 | * | ||
4392 | * If ASC_BUSY is returned add the request to the board's per | ||
4393 | * target waiting list. This is the first time the request has | ||
4394 | * been tried. Add it to the back of the waiting list. It will be | ||
4395 | * retried later. | ||
4396 | * | ||
4397 | * If an error occurred, the request will have been placed on the | ||
4398 | * board's 'done' queue and must be completed before returning. | ||
4399 | */ | ||
4400 | scp->scsi_done = done; | ||
4401 | switch (asc_execute_scsi_cmnd(scp)) { | ||
4402 | case ASC_NOERROR: | ||
4403 | break; | ||
4404 | case ASC_BUSY: | ||
4405 | asc_enqueue(&boardp->waiting, scp, ASC_BACK); | ||
4406 | break; | ||
4407 | case ASC_ERROR: | ||
4408 | default: | ||
4409 | done_scp = asc_dequeue_list(&boardp->done, NULL, ASC_TID_ALL); | ||
4410 | /* Interrupts could be enabled here. */ | ||
4411 | asc_scsi_done_list(done_scp); | ||
4412 | break; | ||
4413 | } | ||
4414 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4415 | 2467 | ||
4416 | return 0; | 2468 | printk(" mcode_date 0x%x, mcode_version %d\n", |
2469 | h->mcode_date, h->mcode_version); | ||
4417 | } | 2470 | } |
4418 | 2471 | ||
4419 | /* | 2472 | /* |
4420 | * advansys_reset() | 2473 | * asc_prt_adv_dvc_var() |
4421 | * | ||
4422 | * Reset the bus associated with the command 'scp'. | ||
4423 | * | 2474 | * |
4424 | * This function runs its own thread. Interrupts must be blocked but | 2475 | * Display an ADV_DVC_VAR structure. |
4425 | * sleeping is allowed and no locking other than for host structures is | ||
4426 | * required. Returns SUCCESS or FAILED. | ||
4427 | */ | 2476 | */ |
4428 | static int advansys_reset(struct scsi_cmnd *scp) | 2477 | static void asc_prt_adv_dvc_var(ADV_DVC_VAR *h) |
4429 | { | 2478 | { |
4430 | struct Scsi_Host *shost; | 2479 | printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong)h); |
4431 | asc_board_t *boardp; | ||
4432 | ASC_DVC_VAR *asc_dvc_varp; | ||
4433 | ADV_DVC_VAR *adv_dvc_varp; | ||
4434 | ulong flags; | ||
4435 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; | ||
4436 | struct scsi_cmnd *tscp, *new_last_scp; | ||
4437 | int status; | ||
4438 | int ret = SUCCESS; | ||
4439 | |||
4440 | ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong)scp); | ||
4441 | |||
4442 | #ifdef ADVANSYS_STATS | ||
4443 | if (scp->device->host != NULL) { | ||
4444 | ASC_STATS(scp->device->host, reset); | ||
4445 | } | ||
4446 | #endif /* ADVANSYS_STATS */ | ||
4447 | |||
4448 | if ((shost = scp->device->host) == NULL) { | ||
4449 | scp->result = HOST_BYTE(DID_ERROR); | ||
4450 | return FAILED; | ||
4451 | } | ||
4452 | |||
4453 | boardp = ASC_BOARDP(shost); | ||
4454 | |||
4455 | ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n", | ||
4456 | boardp->id); | ||
4457 | /* | ||
4458 | * Check for re-entrancy. | ||
4459 | */ | ||
4460 | spin_lock_irqsave(&boardp->lock, flags); | ||
4461 | if (boardp->flags & ASC_HOST_IN_RESET) { | ||
4462 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4463 | return FAILED; | ||
4464 | } | ||
4465 | boardp->flags |= ASC_HOST_IN_RESET; | ||
4466 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4467 | |||
4468 | if (ASC_NARROW_BOARD(boardp)) { | ||
4469 | /* | ||
4470 | * Narrow Board | ||
4471 | */ | ||
4472 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | ||
4473 | |||
4474 | /* | ||
4475 | * Reset the chip and SCSI bus. | ||
4476 | */ | ||
4477 | ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n"); | ||
4478 | status = AscInitAsc1000Driver(asc_dvc_varp); | ||
4479 | |||
4480 | /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */ | ||
4481 | if (asc_dvc_varp->err_code) { | ||
4482 | ASC_PRINT2 | ||
4483 | ("advansys_reset: board %d: SCSI bus reset error: 0x%x\n", | ||
4484 | boardp->id, asc_dvc_varp->err_code); | ||
4485 | ret = FAILED; | ||
4486 | } else if (status) { | ||
4487 | ASC_PRINT2 | ||
4488 | ("advansys_reset: board %d: SCSI bus reset warning: 0x%x\n", | ||
4489 | boardp->id, status); | ||
4490 | } else { | ||
4491 | ASC_PRINT1 | ||
4492 | ("advansys_reset: board %d: SCSI bus reset successful.\n", | ||
4493 | boardp->id); | ||
4494 | } | ||
4495 | |||
4496 | ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n"); | ||
4497 | spin_lock_irqsave(&boardp->lock, flags); | ||
4498 | |||
4499 | } else { | ||
4500 | /* | ||
4501 | * Wide Board | ||
4502 | * | ||
4503 | * If the suggest reset bus flags are set, then reset the bus. | ||
4504 | * Otherwise only reset the device. | ||
4505 | */ | ||
4506 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
4507 | |||
4508 | /* | ||
4509 | * Reset the target's SCSI bus. | ||
4510 | */ | ||
4511 | ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n"); | ||
4512 | switch (AdvResetChipAndSB(adv_dvc_varp)) { | ||
4513 | case ASC_TRUE: | ||
4514 | ASC_PRINT1 | ||
4515 | ("advansys_reset: board %d: SCSI bus reset successful.\n", | ||
4516 | boardp->id); | ||
4517 | break; | ||
4518 | case ASC_FALSE: | ||
4519 | default: | ||
4520 | ASC_PRINT1 | ||
4521 | ("advansys_reset: board %d: SCSI bus reset error.\n", | ||
4522 | boardp->id); | ||
4523 | ret = FAILED; | ||
4524 | break; | ||
4525 | } | ||
4526 | spin_lock_irqsave(&boardp->lock, flags); | ||
4527 | (void)AdvISR(adv_dvc_varp); | ||
4528 | } | ||
4529 | /* Board lock is held. */ | ||
4530 | |||
4531 | /* | ||
4532 | * Dequeue all board 'done' requests. A pointer to the last request | ||
4533 | * is returned in 'last_scp'. | ||
4534 | */ | ||
4535 | done_scp = asc_dequeue_list(&boardp->done, &last_scp, ASC_TID_ALL); | ||
4536 | |||
4537 | /* | ||
4538 | * Dequeue all board 'active' requests for all devices and set | ||
4539 | * the request status to DID_RESET. A pointer to the last request | ||
4540 | * is returned in 'last_scp'. | ||
4541 | */ | ||
4542 | if (done_scp == NULL) { | ||
4543 | done_scp = | ||
4544 | asc_dequeue_list(&boardp->active, &last_scp, ASC_TID_ALL); | ||
4545 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | ||
4546 | tscp->result = HOST_BYTE(DID_RESET); | ||
4547 | } | ||
4548 | } else { | ||
4549 | /* Append to 'done_scp' at the end with 'last_scp'. */ | ||
4550 | ASC_ASSERT(last_scp != NULL); | ||
4551 | last_scp->host_scribble = | ||
4552 | (unsigned char *)asc_dequeue_list(&boardp->active, | ||
4553 | &new_last_scp, | ||
4554 | ASC_TID_ALL); | ||
4555 | if (new_last_scp != NULL) { | ||
4556 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
4557 | for (tscp = REQPNEXT(last_scp); tscp; | ||
4558 | tscp = REQPNEXT(tscp)) { | ||
4559 | tscp->result = HOST_BYTE(DID_RESET); | ||
4560 | } | ||
4561 | last_scp = new_last_scp; | ||
4562 | } | ||
4563 | } | ||
4564 | |||
4565 | /* | ||
4566 | * Dequeue all 'waiting' requests and set the request status | ||
4567 | * to DID_RESET. | ||
4568 | */ | ||
4569 | if (done_scp == NULL) { | ||
4570 | done_scp = | ||
4571 | asc_dequeue_list(&boardp->waiting, &last_scp, ASC_TID_ALL); | ||
4572 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | ||
4573 | tscp->result = HOST_BYTE(DID_RESET); | ||
4574 | } | ||
4575 | } else { | ||
4576 | /* Append to 'done_scp' at the end with 'last_scp'. */ | ||
4577 | ASC_ASSERT(last_scp != NULL); | ||
4578 | last_scp->host_scribble = | ||
4579 | (unsigned char *)asc_dequeue_list(&boardp->waiting, | ||
4580 | &new_last_scp, | ||
4581 | ASC_TID_ALL); | ||
4582 | if (new_last_scp != NULL) { | ||
4583 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
4584 | for (tscp = REQPNEXT(last_scp); tscp; | ||
4585 | tscp = REQPNEXT(tscp)) { | ||
4586 | tscp->result = HOST_BYTE(DID_RESET); | ||
4587 | } | ||
4588 | last_scp = new_last_scp; | ||
4589 | } | ||
4590 | } | ||
4591 | 2480 | ||
4592 | /* Save the time of the most recently completed reset. */ | 2481 | printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n", |
4593 | boardp->last_reset = jiffies; | 2482 | (ulong)h->iop_base, h->err_code, (unsigned)h->ultra_able); |
4594 | 2483 | ||
4595 | /* Clear reset flag. */ | 2484 | printk(" sdtr_able 0x%x, wdtr_able 0x%x\n", |
4596 | boardp->flags &= ~ASC_HOST_IN_RESET; | 2485 | (unsigned)h->sdtr_able, (unsigned)h->wdtr_able); |
4597 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4598 | 2486 | ||
4599 | /* | 2487 | printk(" start_motor 0x%x, scsi_reset_wait 0x%x\n", |
4600 | * Complete all the 'done_scp' requests. | 2488 | (unsigned)h->start_motor, (unsigned)h->scsi_reset_wait); |
4601 | */ | ||
4602 | if (done_scp != NULL) { | ||
4603 | asc_scsi_done_list(done_scp); | ||
4604 | } | ||
4605 | 2489 | ||
4606 | ASC_DBG1(1, "advansys_reset: ret %d\n", ret); | 2490 | printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n", |
2491 | (unsigned)h->max_host_qng, (unsigned)h->max_dvc_qng, | ||
2492 | (ulong)h->carr_freelist); | ||
4607 | 2493 | ||
4608 | return ret; | 2494 | printk(" icq_sp 0x%lx, irq_sp 0x%lx\n", |
4609 | } | 2495 | (ulong)h->icq_sp, (ulong)h->irq_sp); |
4610 | 2496 | ||
4611 | /* | 2497 | printk(" no_scam 0x%x, tagqng_able 0x%x\n", |
4612 | * advansys_biosparam() | 2498 | (unsigned)h->no_scam, (unsigned)h->tagqng_able); |
4613 | * | ||
4614 | * Translate disk drive geometry if the "BIOS greater than 1 GB" | ||
4615 | * support is enabled for a drive. | ||
4616 | * | ||
4617 | * ip (information pointer) is an int array with the following definition: | ||
4618 | * ip[0]: heads | ||
4619 | * ip[1]: sectors | ||
4620 | * ip[2]: cylinders | ||
4621 | */ | ||
4622 | static int | ||
4623 | advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev, | ||
4624 | sector_t capacity, int ip[]) | ||
4625 | { | ||
4626 | asc_board_t *boardp; | ||
4627 | 2499 | ||
4628 | ASC_DBG(1, "advansys_biosparam: begin\n"); | 2500 | printk(" chip_scsi_id 0x%x, cfg 0x%lx\n", |
4629 | ASC_STATS(sdev->host, biosparam); | 2501 | (unsigned)h->chip_scsi_id, (ulong)h->cfg); |
4630 | boardp = ASC_BOARDP(sdev->host); | ||
4631 | if (ASC_NARROW_BOARD(boardp)) { | ||
4632 | if ((boardp->dvc_var.asc_dvc_var.dvc_cntl & | ||
4633 | ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) { | ||
4634 | ip[0] = 255; | ||
4635 | ip[1] = 63; | ||
4636 | } else { | ||
4637 | ip[0] = 64; | ||
4638 | ip[1] = 32; | ||
4639 | } | ||
4640 | } else { | ||
4641 | if ((boardp->dvc_var.adv_dvc_var.bios_ctrl & | ||
4642 | BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) { | ||
4643 | ip[0] = 255; | ||
4644 | ip[1] = 63; | ||
4645 | } else { | ||
4646 | ip[0] = 64; | ||
4647 | ip[1] = 32; | ||
4648 | } | ||
4649 | } | ||
4650 | ip[2] = (unsigned long)capacity / (ip[0] * ip[1]); | ||
4651 | ASC_DBG(1, "advansys_biosparam: end\n"); | ||
4652 | return 0; | ||
4653 | } | 2502 | } |
4654 | 2503 | ||
4655 | static int __init advansys_detect(struct scsi_host_template *tpnt); | ||
4656 | static int advansys_release(struct Scsi_Host *shp); | ||
4657 | |||
4658 | static struct scsi_host_template driver_template = { | ||
4659 | .proc_name = "advansys", | ||
4660 | #ifdef CONFIG_PROC_FS | ||
4661 | .proc_info = advansys_proc_info, | ||
4662 | #endif | ||
4663 | .name = "advansys", | ||
4664 | .detect = advansys_detect, | ||
4665 | .release = advansys_release, | ||
4666 | .info = advansys_info, | ||
4667 | .queuecommand = advansys_queuecommand, | ||
4668 | .eh_bus_reset_handler = advansys_reset, | ||
4669 | .bios_param = advansys_biosparam, | ||
4670 | .slave_configure = advansys_slave_configure, | ||
4671 | /* | ||
4672 | * Because the driver may control an ISA adapter 'unchecked_isa_dma' | ||
4673 | * must be set. The flag will be cleared in advansys_detect for non-ISA | ||
4674 | * adapters. Refer to the comment in scsi_module.c for more information. | ||
4675 | */ | ||
4676 | .unchecked_isa_dma = 1, | ||
4677 | /* | ||
4678 | * All adapters controlled by this driver are capable of large | ||
4679 | * scatter-gather lists. According to the mid-level SCSI documentation | ||
4680 | * this obviates any performance gain provided by setting | ||
4681 | * 'use_clustering'. But empirically while CPU utilization is increased | ||
4682 | * by enabling clustering, I/O throughput increases as well. | ||
4683 | */ | ||
4684 | .use_clustering = ENABLE_CLUSTERING, | ||
4685 | }; | ||
4686 | |||
4687 | #include "scsi_module.c" | ||
4688 | |||
4689 | /* | ||
4690 | * --- Miscellaneous Driver Functions | ||
4691 | */ | ||
4692 | |||
4693 | /* | 2504 | /* |
4694 | * First-level interrupt handler. | 2505 | * asc_prt_adv_dvc_cfg() |
4695 | * | 2506 | * |
4696 | * 'dev_id' is a pointer to the interrupting adapter's asc_board_t. Because | 2507 | * Display an ADV_DVC_CFG structure. |
4697 | * all boards are currently checked for interrupts on each interrupt, 'dev_id' | ||
4698 | * is not referenced. 'dev_id' could be used to identify an interrupt passed | ||
4699 | * to the AdvanSys driver which is for a device sharing an interrupt with | ||
4700 | * an AdvanSys adapter. | ||
4701 | */ | 2508 | */ |
4702 | static irqreturn_t advansys_interrupt(int irq, void *dev_id) | 2509 | static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h) |
4703 | { | 2510 | { |
4704 | ulong flags; | 2511 | printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong)h); |
4705 | int i; | ||
4706 | asc_board_t *boardp; | ||
4707 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; | ||
4708 | struct scsi_cmnd *new_last_scp; | ||
4709 | struct Scsi_Host *shost; | ||
4710 | |||
4711 | ASC_DBG(1, "advansys_interrupt: begin\n"); | ||
4712 | |||
4713 | /* | ||
4714 | * Check for interrupts on all boards. | ||
4715 | * AscISR() will call asc_isr_callback(). | ||
4716 | */ | ||
4717 | for (i = 0; i < asc_board_count; i++) { | ||
4718 | shost = asc_host[i]; | ||
4719 | boardp = ASC_BOARDP(shost); | ||
4720 | ASC_DBG2(2, "advansys_interrupt: i %d, boardp 0x%lx\n", | ||
4721 | i, (ulong)boardp); | ||
4722 | spin_lock_irqsave(&boardp->lock, flags); | ||
4723 | if (ASC_NARROW_BOARD(boardp)) { | ||
4724 | /* | ||
4725 | * Narrow Board | ||
4726 | */ | ||
4727 | if (AscIsIntPending(shost->io_port)) { | ||
4728 | ASC_STATS(shost, interrupt); | ||
4729 | ASC_DBG(1, | ||
4730 | "advansys_interrupt: before AscISR()\n"); | ||
4731 | AscISR(&boardp->dvc_var.asc_dvc_var); | ||
4732 | } | ||
4733 | } else { | ||
4734 | /* | ||
4735 | * Wide Board | ||
4736 | */ | ||
4737 | ASC_DBG(1, "advansys_interrupt: before AdvISR()\n"); | ||
4738 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { | ||
4739 | ASC_STATS(shost, interrupt); | ||
4740 | } | ||
4741 | } | ||
4742 | |||
4743 | /* | ||
4744 | * Start waiting requests and create a list of completed requests. | ||
4745 | * | ||
4746 | * If a reset request is being performed for the board, the reset | ||
4747 | * handler will complete pending requests after it has completed. | ||
4748 | */ | ||
4749 | if ((boardp->flags & ASC_HOST_IN_RESET) == 0) { | ||
4750 | ASC_DBG2(1, | ||
4751 | "advansys_interrupt: done_scp 0x%lx, last_scp 0x%lx\n", | ||
4752 | (ulong)done_scp, (ulong)last_scp); | ||
4753 | |||
4754 | /* Start any waiting commands for the board. */ | ||
4755 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { | ||
4756 | ASC_DBG(1, | ||
4757 | "advansys_interrupt: before asc_execute_queue()\n"); | ||
4758 | asc_execute_queue(&boardp->waiting); | ||
4759 | } | ||
4760 | |||
4761 | /* | ||
4762 | * Add to the list of requests that must be completed. | ||
4763 | * | ||
4764 | * 'done_scp' will always be NULL on the first iteration | ||
4765 | * of this loop. 'last_scp' is set at the same time as | ||
4766 | * 'done_scp'. | ||
4767 | */ | ||
4768 | if (done_scp == NULL) { | ||
4769 | done_scp = | ||
4770 | asc_dequeue_list(&boardp->done, &last_scp, | ||
4771 | ASC_TID_ALL); | ||
4772 | } else { | ||
4773 | ASC_ASSERT(last_scp != NULL); | ||
4774 | last_scp->host_scribble = | ||
4775 | (unsigned char *)asc_dequeue_list(&boardp-> | ||
4776 | done, | ||
4777 | &new_last_scp, | ||
4778 | ASC_TID_ALL); | ||
4779 | if (new_last_scp != NULL) { | ||
4780 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
4781 | last_scp = new_last_scp; | ||
4782 | } | ||
4783 | } | ||
4784 | } | ||
4785 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4786 | } | ||
4787 | |||
4788 | /* | ||
4789 | * If interrupts were enabled on entry, then they | ||
4790 | * are now enabled here. | ||
4791 | * | ||
4792 | * Complete all requests on the done list. | ||
4793 | */ | ||
4794 | |||
4795 | asc_scsi_done_list(done_scp); | ||
4796 | 2512 | ||
4797 | ASC_DBG(1, "advansys_interrupt: end\n"); | 2513 | printk(" disc_enable 0x%x, termination 0x%x\n", |
4798 | return IRQ_HANDLED; | 2514 | h->disc_enable, h->termination); |
4799 | } | ||
4800 | 2515 | ||
4801 | /* | 2516 | printk(" chip_version 0x%x, mcode_date 0x%x\n", |
4802 | * Set the number of commands to queue per device for the | 2517 | h->chip_version, h->mcode_date); |
4803 | * specified host adapter. | ||
4804 | */ | ||
4805 | static int advansys_slave_configure(struct scsi_device *device) | ||
4806 | { | ||
4807 | asc_board_t *boardp; | ||
4808 | 2518 | ||
4809 | boardp = ASC_BOARDP(device->host); | 2519 | printk(" mcode_version 0x%x, control_flag 0x%x\n", |
4810 | boardp->flags |= ASC_SELECT_QUEUE_DEPTHS; | 2520 | h->mcode_version, h->control_flag); |
4811 | /* | ||
4812 | * Save a pointer to the device and set its initial/maximum | ||
4813 | * queue depth. Only save the pointer for a lun0 dev though. | ||
4814 | */ | ||
4815 | if (device->lun == 0) | ||
4816 | boardp->device[device->id] = device; | ||
4817 | if (device->tagged_supported) { | ||
4818 | if (ASC_NARROW_BOARD(boardp)) { | ||
4819 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, | ||
4820 | boardp->dvc_var.asc_dvc_var. | ||
4821 | max_dvc_qng[device->id]); | ||
4822 | } else { | ||
4823 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, | ||
4824 | boardp->dvc_var.adv_dvc_var. | ||
4825 | max_dvc_qng); | ||
4826 | } | ||
4827 | } else { | ||
4828 | scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun); | ||
4829 | } | ||
4830 | ASC_DBG4(1, | ||
4831 | "advansys_slave_configure: device 0x%lx, boardp 0x%lx, id %d, depth %d\n", | ||
4832 | (ulong)device, (ulong)boardp, device->id, device->queue_depth); | ||
4833 | return 0; | ||
4834 | } | 2521 | } |
4835 | 2522 | ||
4836 | /* | 2523 | /* |
4837 | * Complete all requests on the singly linked list pointed | 2524 | * asc_prt_scsi_host() |
4838 | * to by 'scp'. | ||
4839 | * | ||
4840 | * Interrupts can be enabled on entry. | ||
4841 | */ | 2525 | */ |
4842 | static void asc_scsi_done_list(struct scsi_cmnd *scp) | 2526 | static void asc_prt_scsi_host(struct Scsi_Host *s) |
4843 | { | 2527 | { |
4844 | struct scsi_cmnd *tscp; | 2528 | struct asc_board *boardp = shost_priv(s); |
4845 | |||
4846 | ASC_DBG(2, "asc_scsi_done_list: begin\n"); | ||
4847 | while (scp != NULL) { | ||
4848 | asc_board_t *boardp; | ||
4849 | struct device *dev; | ||
4850 | 2529 | ||
4851 | ASC_DBG1(3, "asc_scsi_done_list: scp 0x%lx\n", (ulong)scp); | 2530 | printk("Scsi_Host at addr 0x%p, device %s\n", s, boardp->dev->bus_id); |
4852 | tscp = REQPNEXT(scp); | 2531 | printk(" host_busy %u, host_no %d, last_reset %d,\n", |
4853 | scp->host_scribble = NULL; | 2532 | s->host_busy, s->host_no, (unsigned)s->last_reset); |
4854 | |||
4855 | boardp = ASC_BOARDP(scp->device->host); | ||
4856 | |||
4857 | if (ASC_NARROW_BOARD(boardp)) | ||
4858 | dev = boardp->dvc_cfg.asc_dvc_cfg.dev; | ||
4859 | else | ||
4860 | dev = boardp->dvc_cfg.adv_dvc_cfg.dev; | ||
4861 | 2533 | ||
4862 | if (scp->use_sg) | 2534 | printk(" base 0x%lx, io_port 0x%lx, irq %d,\n", |
4863 | dma_unmap_sg(dev, | 2535 | (ulong)s->base, (ulong)s->io_port, boardp->irq); |
4864 | (struct scatterlist *)scp->request_buffer, | ||
4865 | scp->use_sg, scp->sc_data_direction); | ||
4866 | else if (scp->request_bufflen) | ||
4867 | dma_unmap_single(dev, scp->SCp.dma_handle, | ||
4868 | scp->request_bufflen, | ||
4869 | scp->sc_data_direction); | ||
4870 | 2536 | ||
4871 | ASC_STATS(scp->device->host, done); | 2537 | printk(" dma_channel %d, this_id %d, can_queue %d,\n", |
4872 | ASC_ASSERT(scp->scsi_done != NULL); | 2538 | s->dma_channel, s->this_id, s->can_queue); |
4873 | 2539 | ||
4874 | scp->scsi_done(scp); | 2540 | printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n", |
2541 | s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma); | ||
4875 | 2542 | ||
4876 | scp = tscp; | 2543 | if (ASC_NARROW_BOARD(boardp)) { |
2544 | asc_prt_asc_dvc_var(&boardp->dvc_var.asc_dvc_var); | ||
2545 | asc_prt_asc_dvc_cfg(&boardp->dvc_cfg.asc_dvc_cfg); | ||
2546 | } else { | ||
2547 | asc_prt_adv_dvc_var(&boardp->dvc_var.adv_dvc_var); | ||
2548 | asc_prt_adv_dvc_cfg(&boardp->dvc_cfg.adv_dvc_cfg); | ||
4877 | } | 2549 | } |
4878 | ASC_DBG(2, "asc_scsi_done_list: done\n"); | ||
4879 | return; | ||
4880 | } | 2550 | } |
4881 | 2551 | ||
4882 | /* | 2552 | /* |
4883 | * Execute a single 'Scsi_Cmnd'. | 2553 | * asc_prt_hex() |
4884 | * | ||
4885 | * The function 'done' is called when the request has been completed. | ||
4886 | * | ||
4887 | * Scsi_Cmnd: | ||
4888 | * | ||
4889 | * host - board controlling device | ||
4890 | * device - device to send command | ||
4891 | * target - target of device | ||
4892 | * lun - lun of device | ||
4893 | * cmd_len - length of SCSI CDB | ||
4894 | * cmnd - buffer for SCSI 8, 10, or 12 byte CDB | ||
4895 | * use_sg - if non-zero indicates scatter-gather request with use_sg elements | ||
4896 | * | ||
4897 | * if (use_sg == 0) { | ||
4898 | * request_buffer - buffer address for request | ||
4899 | * request_bufflen - length of request buffer | ||
4900 | * } else { | ||
4901 | * request_buffer - pointer to scatterlist structure | ||
4902 | * } | ||
4903 | * | ||
4904 | * sense_buffer - sense command buffer | ||
4905 | * | ||
4906 | * result (4 bytes of an int): | ||
4907 | * Byte Meaning | ||
4908 | * 0 SCSI Status Byte Code | ||
4909 | * 1 SCSI One Byte Message Code | ||
4910 | * 2 Host Error Code | ||
4911 | * 3 Mid-Level Error Code | ||
4912 | * | ||
4913 | * host driver fields: | ||
4914 | * SCp - Scsi_Pointer used for command processing status | ||
4915 | * scsi_done - used to save caller's done function | ||
4916 | * host_scribble - used for pointer to another struct scsi_cmnd | ||
4917 | * | ||
4918 | * If this function returns ASC_NOERROR the request has been enqueued | ||
4919 | * on the board's 'active' queue and will be completed from the | ||
4920 | * interrupt handler. | ||
4921 | * | ||
4922 | * If this function returns ASC_NOERROR the request has been enqueued | ||
4923 | * on the board's 'done' queue and must be completed by the caller. | ||
4924 | * | 2554 | * |
4925 | * If ASC_BUSY is returned the request will be enqueued by the | 2555 | * Print hexadecimal output in 4 byte groupings 32 bytes |
4926 | * caller on the target's waiting queue and re-tried later. | 2556 | * or 8 double-words per line. |
4927 | */ | 2557 | */ |
4928 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *scp) | 2558 | static void asc_prt_hex(char *f, uchar *s, int l) |
4929 | { | 2559 | { |
4930 | asc_board_t *boardp; | 2560 | int i; |
4931 | ASC_DVC_VAR *asc_dvc_varp; | 2561 | int j; |
4932 | ADV_DVC_VAR *adv_dvc_varp; | 2562 | int k; |
4933 | ADV_SCSI_REQ_Q *adv_scsiqp; | 2563 | int m; |
4934 | struct scsi_device *device; | ||
4935 | int ret; | ||
4936 | |||
4937 | ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n", | ||
4938 | (ulong)scp, (ulong)scp->scsi_done); | ||
4939 | |||
4940 | boardp = ASC_BOARDP(scp->device->host); | ||
4941 | device = boardp->device[scp->device->id]; | ||
4942 | 2564 | ||
4943 | if (ASC_NARROW_BOARD(boardp)) { | 2565 | printk("%s: (%d bytes)\n", f, l); |
4944 | /* | ||
4945 | * Build and execute Narrow Board request. | ||
4946 | */ | ||
4947 | 2566 | ||
4948 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 2567 | for (i = 0; i < l; i += 32) { |
4949 | 2568 | ||
4950 | /* | 2569 | /* Display a maximum of 8 double-words per line. */ |
4951 | * Build Asc Library request structure using the | 2570 | if ((k = (l - i) / 4) >= 8) { |
4952 | * global structures 'asc_scsi_req' and 'asc_sg_head'. | 2571 | k = 8; |
4953 | * | 2572 | m = 0; |
4954 | * If an error is returned, then the request has been | 2573 | } else { |
4955 | * queued on the board done queue. It will be completed | 2574 | m = (l - i) % 4; |
4956 | * by the caller. | ||
4957 | * | ||
4958 | * asc_build_req() can not return ASC_BUSY. | ||
4959 | */ | ||
4960 | if (asc_build_req(boardp, scp) == ASC_ERROR) { | ||
4961 | ASC_STATS(scp->device->host, build_error); | ||
4962 | return ASC_ERROR; | ||
4963 | } | 2575 | } |
4964 | 2576 | ||
4965 | /* | 2577 | for (j = 0; j < k; j++) { |
4966 | * Execute the command. If there is no error, add the command | 2578 | printk(" %2.2X%2.2X%2.2X%2.2X", |
4967 | * to the active queue. | 2579 | (unsigned)s[i + (j * 4)], |
4968 | */ | 2580 | (unsigned)s[i + (j * 4) + 1], |
4969 | switch (ret = AscExeScsiQueue(asc_dvc_varp, &asc_scsi_q)) { | 2581 | (unsigned)s[i + (j * 4) + 2], |
4970 | case ASC_NOERROR: | 2582 | (unsigned)s[i + (j * 4) + 3]); |
4971 | ASC_STATS(scp->device->host, exe_noerror); | ||
4972 | /* | ||
4973 | * Increment monotonically increasing per device successful | ||
4974 | * request counter. Wrapping doesn't matter. | ||
4975 | */ | ||
4976 | boardp->reqcnt[scp->device->id]++; | ||
4977 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
4978 | ASC_DBG(1, | ||
4979 | "asc_execute_scsi_cmnd: AscExeScsiQueue(), ASC_NOERROR\n"); | ||
4980 | break; | ||
4981 | case ASC_BUSY: | ||
4982 | /* | ||
4983 | * Caller will enqueue request on the target's waiting queue | ||
4984 | * and retry later. | ||
4985 | */ | ||
4986 | ASC_STATS(scp->device->host, exe_busy); | ||
4987 | break; | ||
4988 | case ASC_ERROR: | ||
4989 | ASC_PRINT2 | ||
4990 | ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | ||
4991 | boardp->id, asc_dvc_varp->err_code); | ||
4992 | ASC_STATS(scp->device->host, exe_error); | ||
4993 | scp->result = HOST_BYTE(DID_ERROR); | ||
4994 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
4995 | break; | ||
4996 | default: | ||
4997 | ASC_PRINT2 | ||
4998 | ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() unknown, err_code 0x%x\n", | ||
4999 | boardp->id, asc_dvc_varp->err_code); | ||
5000 | ASC_STATS(scp->device->host, exe_unknown); | ||
5001 | scp->result = HOST_BYTE(DID_ERROR); | ||
5002 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5003 | break; | ||
5004 | } | 2583 | } |
5005 | } else { | ||
5006 | /* | ||
5007 | * Build and execute Wide Board request. | ||
5008 | */ | ||
5009 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
5010 | 2584 | ||
5011 | /* | 2585 | switch (m) { |
5012 | * Build and get a pointer to an Adv Library request structure. | 2586 | case 0: |
5013 | * | ||
5014 | * If the request is successfully built then send it below, | ||
5015 | * otherwise return with an error. | ||
5016 | */ | ||
5017 | switch (adv_build_req(boardp, scp, &adv_scsiqp)) { | ||
5018 | case ASC_NOERROR: | ||
5019 | ASC_DBG(3, | ||
5020 | "asc_execute_scsi_cmnd: adv_build_req ASC_NOERROR\n"); | ||
5021 | break; | ||
5022 | case ASC_BUSY: | ||
5023 | ASC_DBG(1, | ||
5024 | "asc_execute_scsi_cmnd: adv_build_req ASC_BUSY\n"); | ||
5025 | /* | ||
5026 | * If busy is returned the request has not been enqueued. | ||
5027 | * It will be enqueued by the caller on the target's waiting | ||
5028 | * queue and retried later. | ||
5029 | * | ||
5030 | * The asc_stats fields 'adv_build_noreq' and 'adv_build_nosg' | ||
5031 | * count wide board busy conditions. They are updated in | ||
5032 | * adv_build_req and adv_get_sglist, respectively. | ||
5033 | */ | ||
5034 | return ASC_BUSY; | ||
5035 | case ASC_ERROR: | ||
5036 | /* | ||
5037 | * If an error is returned, then the request has been | ||
5038 | * queued on the board done queue. It will be completed | ||
5039 | * by the caller. | ||
5040 | */ | ||
5041 | default: | 2587 | default: |
5042 | ASC_DBG(1, | ||
5043 | "asc_execute_scsi_cmnd: adv_build_req ASC_ERROR\n"); | ||
5044 | ASC_STATS(scp->device->host, build_error); | ||
5045 | return ASC_ERROR; | ||
5046 | } | ||
5047 | |||
5048 | /* | ||
5049 | * Execute the command. If there is no error, add the command | ||
5050 | * to the active queue. | ||
5051 | */ | ||
5052 | switch (ret = AdvExeScsiQueue(adv_dvc_varp, adv_scsiqp)) { | ||
5053 | case ASC_NOERROR: | ||
5054 | ASC_STATS(scp->device->host, exe_noerror); | ||
5055 | /* | ||
5056 | * Increment monotonically increasing per device successful | ||
5057 | * request counter. Wrapping doesn't matter. | ||
5058 | */ | ||
5059 | boardp->reqcnt[scp->device->id]++; | ||
5060 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
5061 | ASC_DBG(1, | ||
5062 | "asc_execute_scsi_cmnd: AdvExeScsiQueue(), ASC_NOERROR\n"); | ||
5063 | break; | 2588 | break; |
5064 | case ASC_BUSY: | 2589 | case 1: |
5065 | /* | 2590 | printk(" %2.2X", (unsigned)s[i + (j * 4)]); |
5066 | * Caller will enqueue request on the target's waiting queue | ||
5067 | * and retry later. | ||
5068 | */ | ||
5069 | ASC_STATS(scp->device->host, exe_busy); | ||
5070 | break; | 2591 | break; |
5071 | case ASC_ERROR: | 2592 | case 2: |
5072 | ASC_PRINT2 | 2593 | printk(" %2.2X%2.2X", |
5073 | ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | 2594 | (unsigned)s[i + (j * 4)], |
5074 | boardp->id, adv_dvc_varp->err_code); | 2595 | (unsigned)s[i + (j * 4) + 1]); |
5075 | ASC_STATS(scp->device->host, exe_error); | ||
5076 | scp->result = HOST_BYTE(DID_ERROR); | ||
5077 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5078 | break; | 2596 | break; |
5079 | default: | 2597 | case 3: |
5080 | ASC_PRINT2 | 2598 | printk(" %2.2X%2.2X%2.2X", |
5081 | ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() unknown, err_code 0x%x\n", | 2599 | (unsigned)s[i + (j * 4) + 1], |
5082 | boardp->id, adv_dvc_varp->err_code); | 2600 | (unsigned)s[i + (j * 4) + 2], |
5083 | ASC_STATS(scp->device->host, exe_unknown); | 2601 | (unsigned)s[i + (j * 4) + 3]); |
5084 | scp->result = HOST_BYTE(DID_ERROR); | ||
5085 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5086 | break; | 2602 | break; |
5087 | } | 2603 | } |
5088 | } | ||
5089 | |||
5090 | ASC_DBG(1, "asc_execute_scsi_cmnd: end\n"); | ||
5091 | return ret; | ||
5092 | } | ||
5093 | 2604 | ||
5094 | /* | 2605 | printk("\n"); |
5095 | * Build a request structure for the Asc Library (Narrow Board). | ||
5096 | * | ||
5097 | * The global structures 'asc_scsi_q' and 'asc_sg_head' are | ||
5098 | * used to build the request. | ||
5099 | * | ||
5100 | * If an error occurs, then queue the request on the board done | ||
5101 | * queue and return ASC_ERROR. | ||
5102 | */ | ||
5103 | static int asc_build_req(asc_board_t *boardp, struct scsi_cmnd *scp) | ||
5104 | { | ||
5105 | struct device *dev = boardp->dvc_cfg.asc_dvc_cfg.dev; | ||
5106 | |||
5107 | /* | ||
5108 | * Mutually exclusive access is required to 'asc_scsi_q' and | ||
5109 | * 'asc_sg_head' until after the request is started. | ||
5110 | */ | ||
5111 | memset(&asc_scsi_q, 0, sizeof(ASC_SCSI_Q)); | ||
5112 | |||
5113 | /* | ||
5114 | * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'. | ||
5115 | */ | ||
5116 | asc_scsi_q.q2.srb_ptr = ASC_VADDR_TO_U32(scp); | ||
5117 | |||
5118 | /* | ||
5119 | * Build the ASC_SCSI_Q request. | ||
5120 | * | ||
5121 | * For narrow boards a CDB length maximum of 12 bytes | ||
5122 | * is supported. | ||
5123 | */ | ||
5124 | if (scp->cmd_len > ASC_MAX_CDB_LEN) { | ||
5125 | ASC_PRINT3 | ||
5126 | ("asc_build_req: board %d: cmd_len %d > ASC_MAX_CDB_LEN %d\n", | ||
5127 | boardp->id, scp->cmd_len, ASC_MAX_CDB_LEN); | ||
5128 | scp->result = HOST_BYTE(DID_ERROR); | ||
5129 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5130 | return ASC_ERROR; | ||
5131 | } | ||
5132 | asc_scsi_q.cdbptr = &scp->cmnd[0]; | ||
5133 | asc_scsi_q.q2.cdb_len = scp->cmd_len; | ||
5134 | asc_scsi_q.q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id); | ||
5135 | asc_scsi_q.q1.target_lun = scp->device->lun; | ||
5136 | asc_scsi_q.q2.target_ix = | ||
5137 | ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun); | ||
5138 | asc_scsi_q.q1.sense_addr = | ||
5139 | cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | ||
5140 | asc_scsi_q.q1.sense_len = sizeof(scp->sense_buffer); | ||
5141 | |||
5142 | /* | ||
5143 | * If there are any outstanding requests for the current target, | ||
5144 | * then every 255th request send an ORDERED request. This heuristic | ||
5145 | * tries to retain the benefit of request sorting while preventing | ||
5146 | * request starvation. 255 is the max number of tags or pending commands | ||
5147 | * a device may have outstanding. | ||
5148 | * | ||
5149 | * The request count is incremented below for every successfully | ||
5150 | * started request. | ||
5151 | * | ||
5152 | */ | ||
5153 | if ((boardp->dvc_var.asc_dvc_var.cur_dvc_qng[scp->device->id] > 0) && | ||
5154 | (boardp->reqcnt[scp->device->id] % 255) == 0) { | ||
5155 | asc_scsi_q.q2.tag_code = MSG_ORDERED_TAG; | ||
5156 | } else { | ||
5157 | asc_scsi_q.q2.tag_code = MSG_SIMPLE_TAG; | ||
5158 | } | ||
5159 | |||
5160 | /* | ||
5161 | * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather | ||
5162 | * buffer command. | ||
5163 | */ | ||
5164 | if (scp->use_sg == 0) { | ||
5165 | /* | ||
5166 | * CDB request of single contiguous buffer. | ||
5167 | */ | ||
5168 | ASC_STATS(scp->device->host, cont_cnt); | ||
5169 | scp->SCp.dma_handle = scp->request_bufflen ? | ||
5170 | dma_map_single(dev, scp->request_buffer, | ||
5171 | scp->request_bufflen, | ||
5172 | scp->sc_data_direction) : 0; | ||
5173 | asc_scsi_q.q1.data_addr = cpu_to_le32(scp->SCp.dma_handle); | ||
5174 | asc_scsi_q.q1.data_cnt = cpu_to_le32(scp->request_bufflen); | ||
5175 | ASC_STATS_ADD(scp->device->host, cont_xfer, | ||
5176 | ASC_CEILING(scp->request_bufflen, 512)); | ||
5177 | asc_scsi_q.q1.sg_queue_cnt = 0; | ||
5178 | asc_scsi_q.sg_head = NULL; | ||
5179 | } else { | ||
5180 | /* | ||
5181 | * CDB scatter-gather request list. | ||
5182 | */ | ||
5183 | int sgcnt; | ||
5184 | int use_sg; | ||
5185 | struct scatterlist *slp; | ||
5186 | |||
5187 | slp = (struct scatterlist *)scp->request_buffer; | ||
5188 | use_sg = | ||
5189 | dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | ||
5190 | |||
5191 | if (use_sg > scp->device->host->sg_tablesize) { | ||
5192 | ASC_PRINT3 | ||
5193 | ("asc_build_req: board %d: use_sg %d > sg_tablesize %d\n", | ||
5194 | boardp->id, use_sg, | ||
5195 | scp->device->host->sg_tablesize); | ||
5196 | dma_unmap_sg(dev, slp, scp->use_sg, | ||
5197 | scp->sc_data_direction); | ||
5198 | scp->result = HOST_BYTE(DID_ERROR); | ||
5199 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5200 | return ASC_ERROR; | ||
5201 | } | ||
5202 | |||
5203 | ASC_STATS(scp->device->host, sg_cnt); | ||
5204 | |||
5205 | /* | ||
5206 | * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q | ||
5207 | * structure to point to it. | ||
5208 | */ | ||
5209 | memset(&asc_sg_head, 0, sizeof(ASC_SG_HEAD)); | ||
5210 | |||
5211 | asc_scsi_q.q1.cntl |= QC_SG_HEAD; | ||
5212 | asc_scsi_q.sg_head = &asc_sg_head; | ||
5213 | asc_scsi_q.q1.data_cnt = 0; | ||
5214 | asc_scsi_q.q1.data_addr = 0; | ||
5215 | /* This is a byte value, otherwise it would need to be swapped. */ | ||
5216 | asc_sg_head.entry_cnt = asc_scsi_q.q1.sg_queue_cnt = use_sg; | ||
5217 | ASC_STATS_ADD(scp->device->host, sg_elem, | ||
5218 | asc_sg_head.entry_cnt); | ||
5219 | |||
5220 | /* | ||
5221 | * Convert scatter-gather list into ASC_SG_HEAD list. | ||
5222 | */ | ||
5223 | for (sgcnt = 0; sgcnt < use_sg; sgcnt++, slp++) { | ||
5224 | asc_sg_head.sg_list[sgcnt].addr = | ||
5225 | cpu_to_le32(sg_dma_address(slp)); | ||
5226 | asc_sg_head.sg_list[sgcnt].bytes = | ||
5227 | cpu_to_le32(sg_dma_len(slp)); | ||
5228 | ASC_STATS_ADD(scp->device->host, sg_xfer, | ||
5229 | ASC_CEILING(sg_dma_len(slp), 512)); | ||
5230 | } | ||
5231 | } | 2606 | } |
5232 | |||
5233 | ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q); | ||
5234 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); | ||
5235 | |||
5236 | return ASC_NOERROR; | ||
5237 | } | 2607 | } |
5238 | 2608 | ||
5239 | /* | 2609 | /* |
5240 | * Build a request structure for the Adv Library (Wide Board). | 2610 | * asc_prt_asc_scsi_q() |
5241 | * | ||
5242 | * If an adv_req_t can not be allocated to issue the request, | ||
5243 | * then return ASC_BUSY. If an error occurs, then return ASC_ERROR. | ||
5244 | * | ||
5245 | * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the | ||
5246 | * microcode for DMA addresses or math operations are byte swapped | ||
5247 | * to little-endian order. | ||
5248 | */ | 2611 | */ |
5249 | static int | 2612 | static void asc_prt_asc_scsi_q(ASC_SCSI_Q *q) |
5250 | adv_build_req(asc_board_t *boardp, struct scsi_cmnd *scp, | ||
5251 | ADV_SCSI_REQ_Q **adv_scsiqpp) | ||
5252 | { | 2613 | { |
5253 | adv_req_t *reqp; | 2614 | ASC_SG_HEAD *sgp; |
5254 | ADV_SCSI_REQ_Q *scsiqp; | ||
5255 | int i; | 2615 | int i; |
5256 | int ret; | ||
5257 | struct device *dev = boardp->dvc_cfg.adv_dvc_cfg.dev; | ||
5258 | 2616 | ||
5259 | /* | 2617 | printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong)q); |
5260 | * Allocate an adv_req_t structure from the board to execute | ||
5261 | * the command. | ||
5262 | */ | ||
5263 | if (boardp->adv_reqp == NULL) { | ||
5264 | ASC_DBG(1, "adv_build_req: no free adv_req_t\n"); | ||
5265 | ASC_STATS(scp->device->host, adv_build_noreq); | ||
5266 | return ASC_BUSY; | ||
5267 | } else { | ||
5268 | reqp = boardp->adv_reqp; | ||
5269 | boardp->adv_reqp = reqp->next_reqp; | ||
5270 | reqp->next_reqp = NULL; | ||
5271 | } | ||
5272 | |||
5273 | /* | ||
5274 | * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers. | ||
5275 | */ | ||
5276 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); | ||
5277 | |||
5278 | /* | ||
5279 | * Initialize the structure. | ||
5280 | */ | ||
5281 | scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0; | ||
5282 | |||
5283 | /* | ||
5284 | * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure. | ||
5285 | */ | ||
5286 | scsiqp->srb_ptr = ASC_VADDR_TO_U32(reqp); | ||
5287 | |||
5288 | /* | ||
5289 | * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure. | ||
5290 | */ | ||
5291 | reqp->cmndp = scp; | ||
5292 | |||
5293 | /* | ||
5294 | * Build the ADV_SCSI_REQ_Q request. | ||
5295 | */ | ||
5296 | |||
5297 | /* | ||
5298 | * Set CDB length and copy it to the request structure. | ||
5299 | * For wide boards a CDB length maximum of 16 bytes | ||
5300 | * is supported. | ||
5301 | */ | ||
5302 | if (scp->cmd_len > ADV_MAX_CDB_LEN) { | ||
5303 | ASC_PRINT3 | ||
5304 | ("adv_build_req: board %d: cmd_len %d > ADV_MAX_CDB_LEN %d\n", | ||
5305 | boardp->id, scp->cmd_len, ADV_MAX_CDB_LEN); | ||
5306 | scp->result = HOST_BYTE(DID_ERROR); | ||
5307 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5308 | return ASC_ERROR; | ||
5309 | } | ||
5310 | scsiqp->cdb_len = scp->cmd_len; | ||
5311 | /* Copy first 12 CDB bytes to cdb[]. */ | ||
5312 | for (i = 0; i < scp->cmd_len && i < 12; i++) { | ||
5313 | scsiqp->cdb[i] = scp->cmnd[i]; | ||
5314 | } | ||
5315 | /* Copy last 4 CDB bytes, if present, to cdb16[]. */ | ||
5316 | for (; i < scp->cmd_len; i++) { | ||
5317 | scsiqp->cdb16[i - 12] = scp->cmnd[i]; | ||
5318 | } | ||
5319 | |||
5320 | scsiqp->target_id = scp->device->id; | ||
5321 | scsiqp->target_lun = scp->device->lun; | ||
5322 | |||
5323 | scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | ||
5324 | scsiqp->sense_len = sizeof(scp->sense_buffer); | ||
5325 | |||
5326 | /* | ||
5327 | * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather | ||
5328 | * buffer command. | ||
5329 | */ | ||
5330 | |||
5331 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); | ||
5332 | scsiqp->vdata_addr = scp->request_buffer; | ||
5333 | scsiqp->data_addr = cpu_to_le32(virt_to_bus(scp->request_buffer)); | ||
5334 | |||
5335 | if (scp->use_sg == 0) { | ||
5336 | /* | ||
5337 | * CDB request of single contiguous buffer. | ||
5338 | */ | ||
5339 | reqp->sgblkp = NULL; | ||
5340 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); | ||
5341 | if (scp->request_bufflen) { | ||
5342 | scsiqp->vdata_addr = scp->request_buffer; | ||
5343 | scp->SCp.dma_handle = | ||
5344 | dma_map_single(dev, scp->request_buffer, | ||
5345 | scp->request_bufflen, | ||
5346 | scp->sc_data_direction); | ||
5347 | } else { | ||
5348 | scsiqp->vdata_addr = NULL; | ||
5349 | scp->SCp.dma_handle = 0; | ||
5350 | } | ||
5351 | scsiqp->data_addr = cpu_to_le32(scp->SCp.dma_handle); | ||
5352 | scsiqp->sg_list_ptr = NULL; | ||
5353 | scsiqp->sg_real_addr = 0; | ||
5354 | ASC_STATS(scp->device->host, cont_cnt); | ||
5355 | ASC_STATS_ADD(scp->device->host, cont_xfer, | ||
5356 | ASC_CEILING(scp->request_bufflen, 512)); | ||
5357 | } else { | ||
5358 | /* | ||
5359 | * CDB scatter-gather request list. | ||
5360 | */ | ||
5361 | struct scatterlist *slp; | ||
5362 | int use_sg; | ||
5363 | |||
5364 | slp = (struct scatterlist *)scp->request_buffer; | ||
5365 | use_sg = | ||
5366 | dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | ||
5367 | |||
5368 | if (use_sg > ADV_MAX_SG_LIST) { | ||
5369 | ASC_PRINT3 | ||
5370 | ("adv_build_req: board %d: use_sg %d > ADV_MAX_SG_LIST %d\n", | ||
5371 | boardp->id, use_sg, | ||
5372 | scp->device->host->sg_tablesize); | ||
5373 | dma_unmap_sg(dev, slp, scp->use_sg, | ||
5374 | scp->sc_data_direction); | ||
5375 | scp->result = HOST_BYTE(DID_ERROR); | ||
5376 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5377 | 2618 | ||
5378 | /* | 2619 | printk |
5379 | * Free the 'adv_req_t' structure by adding it back to the | 2620 | (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n", |
5380 | * board free list. | 2621 | q->q2.target_ix, q->q1.target_lun, (ulong)q->q2.srb_ptr, |
5381 | */ | 2622 | q->q2.tag_code); |
5382 | reqp->next_reqp = boardp->adv_reqp; | ||
5383 | boardp->adv_reqp = reqp; | ||
5384 | 2623 | ||
5385 | return ASC_ERROR; | 2624 | printk |
5386 | } | 2625 | (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", |
2626 | (ulong)le32_to_cpu(q->q1.data_addr), | ||
2627 | (ulong)le32_to_cpu(q->q1.data_cnt), | ||
2628 | (ulong)le32_to_cpu(q->q1.sense_addr), q->q1.sense_len); | ||
5387 | 2629 | ||
5388 | if ((ret = | 2630 | printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n", |
5389 | adv_get_sglist(boardp, reqp, scp, | 2631 | (ulong)q->cdbptr, q->q2.cdb_len, |
5390 | use_sg)) != ADV_SUCCESS) { | 2632 | (ulong)q->sg_head, q->q1.sg_queue_cnt); |
5391 | /* | ||
5392 | * Free the adv_req_t structure by adding it back to the | ||
5393 | * board free list. | ||
5394 | */ | ||
5395 | reqp->next_reqp = boardp->adv_reqp; | ||
5396 | boardp->adv_reqp = reqp; | ||
5397 | 2633 | ||
5398 | return ret; | 2634 | if (q->sg_head) { |
2635 | sgp = q->sg_head; | ||
2636 | printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong)sgp); | ||
2637 | printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt, | ||
2638 | sgp->queue_cnt); | ||
2639 | for (i = 0; i < sgp->entry_cnt; i++) { | ||
2640 | printk(" [%u]: addr 0x%lx, bytes %lu\n", | ||
2641 | i, (ulong)le32_to_cpu(sgp->sg_list[i].addr), | ||
2642 | (ulong)le32_to_cpu(sgp->sg_list[i].bytes)); | ||
5399 | } | 2643 | } |
5400 | 2644 | ||
5401 | ASC_STATS(scp->device->host, sg_cnt); | ||
5402 | ASC_STATS_ADD(scp->device->host, sg_elem, use_sg); | ||
5403 | } | 2645 | } |
5404 | |||
5405 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); | ||
5406 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); | ||
5407 | |||
5408 | *adv_scsiqpp = scsiqp; | ||
5409 | |||
5410 | return ASC_NOERROR; | ||
5411 | } | 2646 | } |
5412 | 2647 | ||
5413 | /* | 2648 | /* |
5414 | * Build scatter-gather list for Adv Library (Wide Board). | 2649 | * asc_prt_asc_qdone_info() |
5415 | * | ||
5416 | * Additional ADV_SG_BLOCK structures will need to be allocated | ||
5417 | * if the total number of scatter-gather elements exceeds | ||
5418 | * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are | ||
5419 | * assumed to be physically contiguous. | ||
5420 | * | ||
5421 | * Return: | ||
5422 | * ADV_SUCCESS(1) - SG List successfully created | ||
5423 | * ADV_ERROR(-1) - SG List creation failed | ||
5424 | */ | 2650 | */ |
5425 | static int | 2651 | static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *q) |
5426 | adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | ||
5427 | int use_sg) | ||
5428 | { | 2652 | { |
5429 | adv_sgblk_t *sgblkp; | 2653 | printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong)q); |
5430 | ADV_SCSI_REQ_Q *scsiqp; | 2654 | printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n", |
5431 | struct scatterlist *slp; | 2655 | (ulong)q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len, |
5432 | int sg_elem_cnt; | 2656 | q->d2.tag_code); |
5433 | ADV_SG_BLOCK *sg_block, *prev_sg_block; | 2657 | printk |
5434 | ADV_PADDR sg_block_paddr; | 2658 | (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n", |
5435 | int i; | 2659 | q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg); |
5436 | |||
5437 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); | ||
5438 | slp = (struct scatterlist *)scp->request_buffer; | ||
5439 | sg_elem_cnt = use_sg; | ||
5440 | prev_sg_block = NULL; | ||
5441 | reqp->sgblkp = NULL; | ||
5442 | |||
5443 | do { | ||
5444 | /* | ||
5445 | * Allocate a 'adv_sgblk_t' structure from the board free | ||
5446 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK | ||
5447 | * (15) scatter-gather elements. | ||
5448 | */ | ||
5449 | if ((sgblkp = boardp->adv_sgblkp) == NULL) { | ||
5450 | ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n"); | ||
5451 | ASC_STATS(scp->device->host, adv_build_nosg); | ||
5452 | |||
5453 | /* | ||
5454 | * Allocation failed. Free 'adv_sgblk_t' structures already | ||
5455 | * allocated for the request. | ||
5456 | */ | ||
5457 | while ((sgblkp = reqp->sgblkp) != NULL) { | ||
5458 | /* Remove 'sgblkp' from the request list. */ | ||
5459 | reqp->sgblkp = sgblkp->next_sgblkp; | ||
5460 | |||
5461 | /* Add 'sgblkp' to the board free list. */ | ||
5462 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | ||
5463 | boardp->adv_sgblkp = sgblkp; | ||
5464 | } | ||
5465 | return ASC_BUSY; | ||
5466 | } else { | ||
5467 | /* Complete 'adv_sgblk_t' board allocation. */ | ||
5468 | boardp->adv_sgblkp = sgblkp->next_sgblkp; | ||
5469 | sgblkp->next_sgblkp = NULL; | ||
5470 | |||
5471 | /* | ||
5472 | * Get 8 byte aligned virtual and physical addresses for | ||
5473 | * the allocated ADV_SG_BLOCK structure. | ||
5474 | */ | ||
5475 | sg_block = | ||
5476 | (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block); | ||
5477 | sg_block_paddr = virt_to_bus(sg_block); | ||
5478 | |||
5479 | /* | ||
5480 | * Check if this is the first 'adv_sgblk_t' for the request. | ||
5481 | */ | ||
5482 | if (reqp->sgblkp == NULL) { | ||
5483 | /* Request's first scatter-gather block. */ | ||
5484 | reqp->sgblkp = sgblkp; | ||
5485 | |||
5486 | /* | ||
5487 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical | ||
5488 | * address pointers. | ||
5489 | */ | ||
5490 | scsiqp->sg_list_ptr = sg_block; | ||
5491 | scsiqp->sg_real_addr = | ||
5492 | cpu_to_le32(sg_block_paddr); | ||
5493 | } else { | ||
5494 | /* Request's second or later scatter-gather block. */ | ||
5495 | sgblkp->next_sgblkp = reqp->sgblkp; | ||
5496 | reqp->sgblkp = sgblkp; | ||
5497 | |||
5498 | /* | ||
5499 | * Point the previous ADV_SG_BLOCK structure to | ||
5500 | * the newly allocated ADV_SG_BLOCK structure. | ||
5501 | */ | ||
5502 | ASC_ASSERT(prev_sg_block != NULL); | ||
5503 | prev_sg_block->sg_ptr = | ||
5504 | cpu_to_le32(sg_block_paddr); | ||
5505 | } | ||
5506 | } | ||
5507 | |||
5508 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { | ||
5509 | sg_block->sg_list[i].sg_addr = | ||
5510 | cpu_to_le32(sg_dma_address(slp)); | ||
5511 | sg_block->sg_list[i].sg_count = | ||
5512 | cpu_to_le32(sg_dma_len(slp)); | ||
5513 | ASC_STATS_ADD(scp->device->host, sg_xfer, | ||
5514 | ASC_CEILING(sg_dma_len(slp), 512)); | ||
5515 | |||
5516 | if (--sg_elem_cnt == 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */ | ||
5517 | sg_block->sg_cnt = i + 1; | ||
5518 | sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */ | ||
5519 | return ADV_SUCCESS; | ||
5520 | } | ||
5521 | slp++; | ||
5522 | } | ||
5523 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; | ||
5524 | prev_sg_block = sg_block; | ||
5525 | } | ||
5526 | while (1); | ||
5527 | /* NOTREACHED */ | ||
5528 | } | 2660 | } |
5529 | 2661 | ||
5530 | /* | 2662 | /* |
5531 | * asc_isr_callback() - Second Level Interrupt Handler called by AscISR(). | 2663 | * asc_prt_adv_sgblock() |
5532 | * | 2664 | * |
5533 | * Interrupt callback function for the Narrow SCSI Asc Library. | 2665 | * Display an ADV_SG_BLOCK structure. |
5534 | */ | 2666 | */ |
5535 | static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) | 2667 | static void asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b) |
5536 | { | 2668 | { |
5537 | asc_board_t *boardp; | ||
5538 | struct scsi_cmnd *scp; | ||
5539 | struct Scsi_Host *shost; | ||
5540 | int i; | 2669 | int i; |
5541 | 2670 | ||
5542 | ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n", | 2671 | printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n", |
5543 | (ulong)asc_dvc_varp, (ulong)qdonep); | 2672 | (ulong)b, sgblockno); |
5544 | ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep); | 2673 | printk(" sg_cnt %u, sg_ptr 0x%lx\n", |
5545 | 2674 | b->sg_cnt, (ulong)le32_to_cpu(b->sg_ptr)); | |
5546 | /* | 2675 | BUG_ON(b->sg_cnt > NO_OF_SG_PER_BLOCK); |
5547 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the | 2676 | if (b->sg_ptr != 0) |
5548 | * command that has been completed. | 2677 | BUG_ON(b->sg_cnt != NO_OF_SG_PER_BLOCK); |
5549 | */ | 2678 | for (i = 0; i < b->sg_cnt; i++) { |
5550 | scp = (struct scsi_cmnd *)ASC_U32_TO_VADDR(qdonep->d2.srb_ptr); | 2679 | printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n", |
5551 | ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong)scp); | 2680 | i, (ulong)b->sg_list[i].sg_addr, |
5552 | 2681 | (ulong)b->sg_list[i].sg_count); | |
5553 | if (scp == NULL) { | ||
5554 | ASC_PRINT("asc_isr_callback: scp is NULL\n"); | ||
5555 | return; | ||
5556 | } | ||
5557 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
5558 | |||
5559 | /* | ||
5560 | * If the request's host pointer is not valid, display a | ||
5561 | * message and return. | ||
5562 | */ | ||
5563 | shost = scp->device->host; | ||
5564 | for (i = 0; i < asc_board_count; i++) { | ||
5565 | if (asc_host[i] == shost) { | ||
5566 | break; | ||
5567 | } | ||
5568 | } | ||
5569 | if (i == asc_board_count) { | ||
5570 | ASC_PRINT2 | ||
5571 | ("asc_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
5572 | (ulong)scp, (ulong)shost); | ||
5573 | return; | ||
5574 | } | ||
5575 | |||
5576 | ASC_STATS(shost, callback); | ||
5577 | ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong)shost); | ||
5578 | |||
5579 | /* | ||
5580 | * If the request isn't found on the active queue, it may | ||
5581 | * have been removed to handle a reset request. | ||
5582 | * Display a message and return. | ||
5583 | */ | ||
5584 | boardp = ASC_BOARDP(shost); | ||
5585 | ASC_ASSERT(asc_dvc_varp == &boardp->dvc_var.asc_dvc_var); | ||
5586 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { | ||
5587 | ASC_PRINT2 | ||
5588 | ("asc_isr_callback: board %d: scp 0x%lx not on active queue\n", | ||
5589 | boardp->id, (ulong)scp); | ||
5590 | return; | ||
5591 | } | ||
5592 | |||
5593 | /* | ||
5594 | * 'qdonep' contains the command's ending status. | ||
5595 | */ | ||
5596 | switch (qdonep->d3.done_stat) { | ||
5597 | case QD_NO_ERROR: | ||
5598 | ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n"); | ||
5599 | scp->result = 0; | ||
5600 | |||
5601 | /* | ||
5602 | * If an INQUIRY command completed successfully, then call | ||
5603 | * the AscInquiryHandling() function to set-up the device. | ||
5604 | */ | ||
5605 | if (scp->cmnd[0] == INQUIRY && scp->device->lun == 0 && | ||
5606 | (scp->request_bufflen - qdonep->remain_bytes) >= 8) { | ||
5607 | AscInquiryHandling(asc_dvc_varp, scp->device->id & 0x7, | ||
5608 | (ASC_SCSI_INQUIRY *)scp-> | ||
5609 | request_buffer); | ||
5610 | } | ||
5611 | |||
5612 | /* | ||
5613 | * Check for an underrun condition. | ||
5614 | * | ||
5615 | * If there was no error and an underrun condition, then | ||
5616 | * then return the number of underrun bytes. | ||
5617 | */ | ||
5618 | if (scp->request_bufflen != 0 && qdonep->remain_bytes != 0 && | ||
5619 | qdonep->remain_bytes <= scp->request_bufflen) { | ||
5620 | ASC_DBG1(1, | ||
5621 | "asc_isr_callback: underrun condition %u bytes\n", | ||
5622 | (unsigned)qdonep->remain_bytes); | ||
5623 | scp->resid = qdonep->remain_bytes; | ||
5624 | } | ||
5625 | break; | ||
5626 | |||
5627 | case QD_WITH_ERROR: | ||
5628 | ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n"); | ||
5629 | switch (qdonep->d3.host_stat) { | ||
5630 | case QHSTA_NO_ERROR: | ||
5631 | if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) { | ||
5632 | ASC_DBG(2, | ||
5633 | "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | ||
5634 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
5635 | sizeof(scp->sense_buffer)); | ||
5636 | /* | ||
5637 | * Note: The 'status_byte()' macro used by target drivers | ||
5638 | * defined in scsi.h shifts the status byte returned by | ||
5639 | * host drivers right by 1 bit. This is why target drivers | ||
5640 | * also use right shifted status byte definitions. For | ||
5641 | * instance target drivers use CHECK_CONDITION, defined to | ||
5642 | * 0x1, instead of the SCSI defined check condition value | ||
5643 | * of 0x2. Host drivers are supposed to return the status | ||
5644 | * byte as it is defined by SCSI. | ||
5645 | */ | ||
5646 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
5647 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5648 | } else { | ||
5649 | scp->result = STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5650 | } | ||
5651 | break; | ||
5652 | |||
5653 | default: | ||
5654 | /* QHSTA error occurred */ | ||
5655 | ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n", | ||
5656 | qdonep->d3.host_stat); | ||
5657 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
5658 | break; | ||
5659 | } | ||
5660 | break; | ||
5661 | |||
5662 | case QD_ABORTED_BY_HOST: | ||
5663 | ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
5664 | scp->result = | ||
5665 | HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3. | ||
5666 | scsi_msg) | | ||
5667 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5668 | break; | ||
5669 | |||
5670 | default: | ||
5671 | ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n", | ||
5672 | qdonep->d3.done_stat); | ||
5673 | scp->result = | ||
5674 | HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3. | ||
5675 | scsi_msg) | | ||
5676 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5677 | break; | ||
5678 | } | ||
5679 | |||
5680 | /* | ||
5681 | * If the 'init_tidmask' bit isn't already set for the target and the | ||
5682 | * current request finished normally, then set the bit for the target | ||
5683 | * to indicate that a device is present. | ||
5684 | */ | ||
5685 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && | ||
5686 | qdonep->d3.done_stat == QD_NO_ERROR && | ||
5687 | qdonep->d3.host_stat == QHSTA_NO_ERROR) { | ||
5688 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
5689 | } | 2682 | } |
5690 | |||
5691 | /* | ||
5692 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done | ||
5693 | * function, add the command to the end of the board's done queue. | ||
5694 | * The done function for the command will be called from | ||
5695 | * advansys_interrupt(). | ||
5696 | */ | ||
5697 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5698 | |||
5699 | return; | ||
5700 | } | 2683 | } |
5701 | 2684 | ||
5702 | /* | 2685 | /* |
5703 | * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR(). | 2686 | * asc_prt_adv_scsi_req_q() |
5704 | * | 2687 | * |
5705 | * Callback function for the Wide SCSI Adv Library. | 2688 | * Display an ADV_SCSI_REQ_Q structure. |
5706 | */ | 2689 | */ |
5707 | static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp) | 2690 | static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q) |
5708 | { | 2691 | { |
5709 | asc_board_t *boardp; | 2692 | int sg_blk_cnt; |
5710 | adv_req_t *reqp; | 2693 | struct asc_sg_block *sg_ptr; |
5711 | adv_sgblk_t *sgblkp; | ||
5712 | struct scsi_cmnd *scp; | ||
5713 | struct Scsi_Host *shost; | ||
5714 | int i; | ||
5715 | ADV_DCNT resid_cnt; | ||
5716 | |||
5717 | ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n", | ||
5718 | (ulong)adv_dvc_varp, (ulong)scsiqp); | ||
5719 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); | ||
5720 | 2694 | ||
5721 | /* | 2695 | printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong)q); |
5722 | * Get the adv_req_t structure for the command that has been | ||
5723 | * completed. The adv_req_t structure actually contains the | ||
5724 | * completed ADV_SCSI_REQ_Q structure. | ||
5725 | */ | ||
5726 | reqp = (adv_req_t *)ADV_U32_TO_VADDR(scsiqp->srb_ptr); | ||
5727 | ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong)reqp); | ||
5728 | if (reqp == NULL) { | ||
5729 | ASC_PRINT("adv_isr_callback: reqp is NULL\n"); | ||
5730 | return; | ||
5731 | } | ||
5732 | 2696 | ||
5733 | /* | 2697 | printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n", |
5734 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the | 2698 | q->target_id, q->target_lun, (ulong)q->srb_ptr, q->a_flag); |
5735 | * command that has been completed. | ||
5736 | * | ||
5737 | * Note: The adv_req_t request structure and adv_sgblk_t structure, | ||
5738 | * if any, are dropped, because a board structure pointer can not be | ||
5739 | * determined. | ||
5740 | */ | ||
5741 | scp = reqp->cmndp; | ||
5742 | ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong)scp); | ||
5743 | if (scp == NULL) { | ||
5744 | ASC_PRINT | ||
5745 | ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n"); | ||
5746 | return; | ||
5747 | } | ||
5748 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
5749 | 2699 | ||
5750 | /* | 2700 | printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n", |
5751 | * If the request's host pointer is not valid, display a message | 2701 | q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong)q->vdata_addr); |
5752 | * and return. | ||
5753 | */ | ||
5754 | shost = scp->device->host; | ||
5755 | for (i = 0; i < asc_board_count; i++) { | ||
5756 | if (asc_host[i] == shost) { | ||
5757 | break; | ||
5758 | } | ||
5759 | } | ||
5760 | /* | ||
5761 | * Note: If the host structure is not found, the adv_req_t request | ||
5762 | * structure and adv_sgblk_t structure, if any, is dropped. | ||
5763 | */ | ||
5764 | if (i == asc_board_count) { | ||
5765 | ASC_PRINT2 | ||
5766 | ("adv_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
5767 | (ulong)scp, (ulong)shost); | ||
5768 | return; | ||
5769 | } | ||
5770 | 2702 | ||
5771 | ASC_STATS(shost, callback); | 2703 | printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", |
5772 | ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong)shost); | 2704 | (ulong)le32_to_cpu(q->data_cnt), |
2705 | (ulong)le32_to_cpu(q->sense_addr), q->sense_len); | ||
5773 | 2706 | ||
5774 | /* | 2707 | printk |
5775 | * If the request isn't found on the active queue, it may have been | 2708 | (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n", |
5776 | * removed to handle a reset request. Display a message and return. | 2709 | q->cdb_len, q->done_status, q->host_status, q->scsi_status); |
5777 | * | ||
5778 | * Note: Because the structure may still be in use don't attempt | ||
5779 | * to free the adv_req_t and adv_sgblk_t, if any, structures. | ||
5780 | */ | ||
5781 | boardp = ASC_BOARDP(shost); | ||
5782 | ASC_ASSERT(adv_dvc_varp == &boardp->dvc_var.adv_dvc_var); | ||
5783 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { | ||
5784 | ASC_PRINT2 | ||
5785 | ("adv_isr_callback: board %d: scp 0x%lx not on active queue\n", | ||
5786 | boardp->id, (ulong)scp); | ||
5787 | return; | ||
5788 | } | ||
5789 | 2710 | ||
5790 | /* | 2711 | printk(" sg_working_ix 0x%x, target_cmd %u\n", |
5791 | * 'done_status' contains the command's ending status. | 2712 | q->sg_working_ix, q->target_cmd); |
5792 | */ | ||
5793 | switch (scsiqp->done_status) { | ||
5794 | case QD_NO_ERROR: | ||
5795 | ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n"); | ||
5796 | scp->result = 0; | ||
5797 | 2713 | ||
5798 | /* | 2714 | printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n", |
5799 | * Check for an underrun condition. | 2715 | (ulong)le32_to_cpu(q->scsiq_rptr), |
5800 | * | 2716 | (ulong)le32_to_cpu(q->sg_real_addr), (ulong)q->sg_list_ptr); |
5801 | * If there was no error and an underrun condition, then | ||
5802 | * then return the number of underrun bytes. | ||
5803 | */ | ||
5804 | resid_cnt = le32_to_cpu(scsiqp->data_cnt); | ||
5805 | if (scp->request_bufflen != 0 && resid_cnt != 0 && | ||
5806 | resid_cnt <= scp->request_bufflen) { | ||
5807 | ASC_DBG1(1, | ||
5808 | "adv_isr_callback: underrun condition %lu bytes\n", | ||
5809 | (ulong)resid_cnt); | ||
5810 | scp->resid = resid_cnt; | ||
5811 | } | ||
5812 | break; | ||
5813 | 2717 | ||
5814 | case QD_WITH_ERROR: | 2718 | /* Display the request's ADV_SG_BLOCK structures. */ |
5815 | ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n"); | 2719 | if (q->sg_list_ptr != NULL) { |
5816 | switch (scsiqp->host_status) { | 2720 | sg_blk_cnt = 0; |
5817 | case QHSTA_NO_ERROR: | 2721 | while (1) { |
5818 | if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) { | 2722 | /* |
5819 | ASC_DBG(2, | 2723 | * 'sg_ptr' is a physical address. Convert it to a virtual |
5820 | "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | 2724 | * address by indexing 'sg_blk_cnt' into the virtual address |
5821 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | 2725 | * array 'sg_list_ptr'. |
5822 | sizeof(scp->sense_buffer)); | 2726 | * |
5823 | /* | 2727 | * XXX - Assumes all SG physical blocks are virtually contiguous. |
5824 | * Note: The 'status_byte()' macro used by target drivers | 2728 | */ |
5825 | * defined in scsi.h shifts the status byte returned by | 2729 | sg_ptr = |
5826 | * host drivers right by 1 bit. This is why target drivers | 2730 | &(((ADV_SG_BLOCK *)(q->sg_list_ptr))[sg_blk_cnt]); |
5827 | * also use right shifted status byte definitions. For | 2731 | asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr); |
5828 | * instance target drivers use CHECK_CONDITION, defined to | 2732 | if (sg_ptr->sg_ptr == 0) { |
5829 | * 0x1, instead of the SCSI defined check condition value | 2733 | break; |
5830 | * of 0x2. Host drivers are supposed to return the status | ||
5831 | * byte as it is defined by SCSI. | ||
5832 | */ | ||
5833 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
5834 | STATUS_BYTE(scsiqp->scsi_status); | ||
5835 | } else { | ||
5836 | scp->result = STATUS_BYTE(scsiqp->scsi_status); | ||
5837 | } | 2734 | } |
5838 | break; | 2735 | sg_blk_cnt++; |
5839 | |||
5840 | default: | ||
5841 | /* Some other QHSTA error occurred. */ | ||
5842 | ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n", | ||
5843 | scsiqp->host_status); | ||
5844 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
5845 | break; | ||
5846 | } | 2736 | } |
5847 | break; | ||
5848 | |||
5849 | case QD_ABORTED_BY_HOST: | ||
5850 | ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
5851 | scp->result = | ||
5852 | HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status); | ||
5853 | break; | ||
5854 | |||
5855 | default: | ||
5856 | ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n", | ||
5857 | scsiqp->done_status); | ||
5858 | scp->result = | ||
5859 | HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status); | ||
5860 | break; | ||
5861 | } | ||
5862 | |||
5863 | /* | ||
5864 | * If the 'init_tidmask' bit isn't already set for the target and the | ||
5865 | * current request finished normally, then set the bit for the target | ||
5866 | * to indicate that a device is present. | ||
5867 | */ | ||
5868 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && | ||
5869 | scsiqp->done_status == QD_NO_ERROR && | ||
5870 | scsiqp->host_status == QHSTA_NO_ERROR) { | ||
5871 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
5872 | } | ||
5873 | |||
5874 | /* | ||
5875 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done | ||
5876 | * function, add the command to the end of the board's done queue. | ||
5877 | * The done function for the command will be called from | ||
5878 | * advansys_interrupt(). | ||
5879 | */ | ||
5880 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5881 | |||
5882 | /* | ||
5883 | * Free all 'adv_sgblk_t' structures allocated for the request. | ||
5884 | */ | ||
5885 | while ((sgblkp = reqp->sgblkp) != NULL) { | ||
5886 | /* Remove 'sgblkp' from the request list. */ | ||
5887 | reqp->sgblkp = sgblkp->next_sgblkp; | ||
5888 | |||
5889 | /* Add 'sgblkp' to the board free list. */ | ||
5890 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | ||
5891 | boardp->adv_sgblkp = sgblkp; | ||
5892 | } | 2737 | } |
5893 | |||
5894 | /* | ||
5895 | * Free the adv_req_t structure used with the command by adding | ||
5896 | * it back to the board free list. | ||
5897 | */ | ||
5898 | reqp->next_reqp = boardp->adv_reqp; | ||
5899 | boardp->adv_reqp = reqp; | ||
5900 | |||
5901 | ASC_DBG(1, "adv_isr_callback: done\n"); | ||
5902 | |||
5903 | return; | ||
5904 | } | 2738 | } |
2739 | #endif /* ADVANSYS_DEBUG */ | ||
5905 | 2740 | ||
5906 | /* | 2741 | /* |
5907 | * adv_async_callback() - Adv Library asynchronous event callback function. | 2742 | * The advansys chip/microcode contains a 32-bit identifier for each command |
2743 | * known as the 'srb'. I don't know what it stands for. The driver used | ||
2744 | * to encode the scsi_cmnd pointer by calling virt_to_bus and retrieve it | ||
2745 | * with bus_to_virt. Now the driver keeps a per-host map of integers to | ||
2746 | * pointers. It auto-expands when full, unless it can't allocate memory. | ||
2747 | * Note that an srb of 0 is treated specially by the chip/firmware, hence | ||
2748 | * the return of i+1 in this routine, and the corresponding subtraction in | ||
2749 | * the inverse routine. | ||
5908 | */ | 2750 | */ |
5909 | static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code) | 2751 | #define BAD_SRB 0 |
2752 | static u32 advansys_ptr_to_srb(struct asc_dvc_var *asc_dvc, void *ptr) | ||
5910 | { | 2753 | { |
5911 | switch (code) { | 2754 | int i; |
5912 | case ADV_ASYNC_SCSI_BUS_RESET_DET: | 2755 | void **new_ptr; |
5913 | /* | ||
5914 | * The firmware detected a SCSI Bus reset. | ||
5915 | */ | ||
5916 | ASC_DBG(0, | ||
5917 | "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n"); | ||
5918 | break; | ||
5919 | 2756 | ||
5920 | case ADV_ASYNC_RDMA_FAILURE: | 2757 | for (i = 0; i < asc_dvc->ptr_map_count; i++) { |
5921 | /* | 2758 | if (!asc_dvc->ptr_map[i]) |
5922 | * Handle RDMA failure by resetting the SCSI Bus and | 2759 | goto out; |
5923 | * possibly the chip if it is unresponsive. Log the error | 2760 | } |
5924 | * with a unique code. | ||
5925 | */ | ||
5926 | ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n"); | ||
5927 | AdvResetChipAndSB(adv_dvc_varp); | ||
5928 | break; | ||
5929 | 2761 | ||
5930 | case ADV_HOST_SCSI_BUS_RESET: | 2762 | if (asc_dvc->ptr_map_count == 0) |
5931 | /* | 2763 | asc_dvc->ptr_map_count = 1; |
5932 | * Host generated SCSI bus reset occurred. | 2764 | else |
5933 | */ | 2765 | asc_dvc->ptr_map_count *= 2; |
5934 | ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n"); | ||
5935 | break; | ||
5936 | 2766 | ||
5937 | default: | 2767 | new_ptr = krealloc(asc_dvc->ptr_map, |
5938 | ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code); | 2768 | asc_dvc->ptr_map_count * sizeof(void *), GFP_ATOMIC); |
5939 | break; | 2769 | if (!new_ptr) |
5940 | } | 2770 | return BAD_SRB; |
2771 | asc_dvc->ptr_map = new_ptr; | ||
2772 | out: | ||
2773 | ASC_DBG(3, "Putting ptr %p into array offset %d\n", ptr, i); | ||
2774 | asc_dvc->ptr_map[i] = ptr; | ||
2775 | return i + 1; | ||
5941 | } | 2776 | } |
5942 | 2777 | ||
5943 | /* | 2778 | static void * advansys_srb_to_ptr(struct asc_dvc_var *asc_dvc, u32 srb) |
5944 | * Add a 'REQP' to the end of specified queue. Set 'tidmask' | ||
5945 | * to indicate a command is queued for the device. | ||
5946 | * | ||
5947 | * 'flag' may be either ASC_FRONT or ASC_BACK. | ||
5948 | * | ||
5949 | * 'REQPNEXT(reqp)' returns reqp's next pointer. | ||
5950 | */ | ||
5951 | static void asc_enqueue(asc_queue_t *ascq, REQP reqp, int flag) | ||
5952 | { | 2779 | { |
5953 | int tid; | 2780 | void *ptr; |
5954 | |||
5955 | ASC_DBG3(3, "asc_enqueue: ascq 0x%lx, reqp 0x%lx, flag %d\n", | ||
5956 | (ulong)ascq, (ulong)reqp, flag); | ||
5957 | ASC_ASSERT(reqp != NULL); | ||
5958 | ASC_ASSERT(flag == ASC_FRONT || flag == ASC_BACK); | ||
5959 | tid = REQPTID(reqp); | ||
5960 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | ||
5961 | if (flag == ASC_FRONT) { | ||
5962 | reqp->host_scribble = (unsigned char *)ascq->q_first[tid]; | ||
5963 | ascq->q_first[tid] = reqp; | ||
5964 | /* If the queue was empty, set the last pointer. */ | ||
5965 | if (ascq->q_last[tid] == NULL) { | ||
5966 | ascq->q_last[tid] = reqp; | ||
5967 | } | ||
5968 | } else { /* ASC_BACK */ | ||
5969 | if (ascq->q_last[tid] != NULL) { | ||
5970 | ascq->q_last[tid]->host_scribble = | ||
5971 | (unsigned char *)reqp; | ||
5972 | } | ||
5973 | ascq->q_last[tid] = reqp; | ||
5974 | reqp->host_scribble = NULL; | ||
5975 | /* If the queue was empty, set the first pointer. */ | ||
5976 | if (ascq->q_first[tid] == NULL) { | ||
5977 | ascq->q_first[tid] = reqp; | ||
5978 | } | ||
5979 | } | ||
5980 | /* The queue has at least one entry, set its bit. */ | ||
5981 | ascq->q_tidmask |= ADV_TID_TO_TIDMASK(tid); | ||
5982 | #ifdef ADVANSYS_STATS | ||
5983 | /* Maintain request queue statistics. */ | ||
5984 | ascq->q_tot_cnt[tid]++; | ||
5985 | ascq->q_cur_cnt[tid]++; | ||
5986 | if (ascq->q_cur_cnt[tid] > ascq->q_max_cnt[tid]) { | ||
5987 | ascq->q_max_cnt[tid] = ascq->q_cur_cnt[tid]; | ||
5988 | ASC_DBG2(2, "asc_enqueue: new q_max_cnt[%d] %d\n", | ||
5989 | tid, ascq->q_max_cnt[tid]); | ||
5990 | } | ||
5991 | REQPTIME(reqp) = REQTIMESTAMP(); | ||
5992 | #endif /* ADVANSYS_STATS */ | ||
5993 | ASC_DBG1(3, "asc_enqueue: reqp 0x%lx\n", (ulong)reqp); | ||
5994 | return; | ||
5995 | } | ||
5996 | 2781 | ||
5997 | /* | 2782 | srb--; |
5998 | * Return first queued 'REQP' on the specified queue for | 2783 | if (srb >= asc_dvc->ptr_map_count) { |
5999 | * the specified target device. Clear the 'tidmask' bit for | 2784 | printk("advansys: bad SRB %u, max %u\n", srb, |
6000 | * the device if no more commands are left queued for it. | 2785 | asc_dvc->ptr_map_count); |
6001 | * | 2786 | return NULL; |
6002 | * 'REQPNEXT(reqp)' returns reqp's next pointer. | ||
6003 | */ | ||
6004 | static REQP asc_dequeue(asc_queue_t *ascq, int tid) | ||
6005 | { | ||
6006 | REQP reqp; | ||
6007 | |||
6008 | ASC_DBG2(3, "asc_dequeue: ascq 0x%lx, tid %d\n", (ulong)ascq, tid); | ||
6009 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | ||
6010 | if ((reqp = ascq->q_first[tid]) != NULL) { | ||
6011 | ASC_ASSERT(ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)); | ||
6012 | ascq->q_first[tid] = REQPNEXT(reqp); | ||
6013 | /* If the queue is empty, clear its bit and the last pointer. */ | ||
6014 | if (ascq->q_first[tid] == NULL) { | ||
6015 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | ||
6016 | ASC_ASSERT(ascq->q_last[tid] == reqp); | ||
6017 | ascq->q_last[tid] = NULL; | ||
6018 | } | ||
6019 | #ifdef ADVANSYS_STATS | ||
6020 | /* Maintain request queue statistics. */ | ||
6021 | ascq->q_cur_cnt[tid]--; | ||
6022 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); | ||
6023 | REQTIMESTAT("asc_dequeue", ascq, reqp, tid); | ||
6024 | #endif /* ADVANSYS_STATS */ | ||
6025 | } | 2787 | } |
6026 | ASC_DBG1(3, "asc_dequeue: reqp 0x%lx\n", (ulong)reqp); | 2788 | ptr = asc_dvc->ptr_map[srb]; |
6027 | return reqp; | 2789 | asc_dvc->ptr_map[srb] = NULL; |
2790 | ASC_DBG(3, "Returning ptr %p from array offset %d\n", ptr, srb); | ||
2791 | return ptr; | ||
6028 | } | 2792 | } |
6029 | 2793 | ||
6030 | /* | 2794 | /* |
6031 | * Return a pointer to a singly linked list of all the requests queued | 2795 | * advansys_info() |
6032 | * for 'tid' on the 'asc_queue_t' pointed to by 'ascq'. | ||
6033 | * | ||
6034 | * If 'lastpp' is not NULL, '*lastpp' will be set to point to the | ||
6035 | * the last request returned in the singly linked list. | ||
6036 | * | ||
6037 | * 'tid' should either be a valid target id or if it is ASC_TID_ALL, | ||
6038 | * then all queued requests are concatenated into one list and | ||
6039 | * returned. | ||
6040 | * | 2796 | * |
6041 | * Note: If 'lastpp' is used to append a new list to the end of | 2797 | * Return suitable for printing on the console with the argument |
6042 | * an old list, only change the old list last pointer if '*lastpp' | 2798 | * adapter's configuration information. |
6043 | * (or the function return value) is not NULL, i.e. use a temporary | ||
6044 | * variable for 'lastpp' and check its value after the function return | ||
6045 | * before assigning it to the list last pointer. | ||
6046 | * | 2799 | * |
6047 | * Unfortunately collecting queuing time statistics adds overhead to | 2800 | * Note: The information line should not exceed ASC_INFO_SIZE bytes, |
6048 | * the function that isn't inherent to the function's algorithm. | 2801 | * otherwise the static 'info' array will be overrun. |
6049 | */ | 2802 | */ |
6050 | static REQP asc_dequeue_list(asc_queue_t *ascq, REQP *lastpp, int tid) | 2803 | static const char *advansys_info(struct Scsi_Host *shost) |
6051 | { | 2804 | { |
6052 | REQP firstp, lastp; | 2805 | static char info[ASC_INFO_SIZE]; |
6053 | int i; | 2806 | struct asc_board *boardp = shost_priv(shost); |
6054 | 2807 | ASC_DVC_VAR *asc_dvc_varp; | |
6055 | ASC_DBG2(3, "asc_dequeue_list: ascq 0x%lx, tid %d\n", (ulong)ascq, tid); | 2808 | ADV_DVC_VAR *adv_dvc_varp; |
6056 | ASC_ASSERT((tid == ASC_TID_ALL) || (tid >= 0 && tid <= ADV_MAX_TID)); | 2809 | char *busname; |
2810 | char *widename = NULL; | ||
6057 | 2811 | ||
6058 | /* | 2812 | if (ASC_NARROW_BOARD(boardp)) { |
6059 | * If 'tid' is not ASC_TID_ALL, return requests only for | 2813 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
6060 | * the specified 'tid'. If 'tid' is ASC_TID_ALL, return all | 2814 | ASC_DBG(1, "begin\n"); |
6061 | * requests for all tids. | 2815 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { |
6062 | */ | 2816 | if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) == |
6063 | if (tid != ASC_TID_ALL) { | 2817 | ASC_IS_ISAPNP) { |
6064 | /* Return all requests for the specified 'tid'. */ | 2818 | busname = "ISA PnP"; |
6065 | if ((ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)) == 0) { | 2819 | } else { |
6066 | /* List is empty; Set first and last return pointers to NULL. */ | 2820 | busname = "ISA"; |
6067 | firstp = lastp = NULL; | ||
6068 | } else { | ||
6069 | firstp = ascq->q_first[tid]; | ||
6070 | lastp = ascq->q_last[tid]; | ||
6071 | ascq->q_first[tid] = ascq->q_last[tid] = NULL; | ||
6072 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | ||
6073 | #ifdef ADVANSYS_STATS | ||
6074 | { | ||
6075 | REQP reqp; | ||
6076 | ascq->q_cur_cnt[tid] = 0; | ||
6077 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { | ||
6078 | REQTIMESTAT("asc_dequeue_list", ascq, | ||
6079 | reqp, tid); | ||
6080 | } | ||
6081 | } | 2821 | } |
6082 | #endif /* ADVANSYS_STATS */ | 2822 | sprintf(info, |
6083 | } | 2823 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X", |
6084 | } else { | 2824 | ASC_VERSION, busname, |
6085 | /* Return all requests for all tids. */ | 2825 | (ulong)shost->io_port, |
6086 | firstp = lastp = NULL; | 2826 | (ulong)shost->io_port + ASC_IOADR_GAP - 1, |
6087 | for (i = 0; i <= ADV_MAX_TID; i++) { | 2827 | boardp->irq, shost->dma_channel); |
6088 | if (ascq->q_tidmask & ADV_TID_TO_TIDMASK(i)) { | 2828 | } else { |
6089 | if (firstp == NULL) { | 2829 | if (asc_dvc_varp->bus_type & ASC_IS_VL) { |
6090 | firstp = ascq->q_first[i]; | 2830 | busname = "VL"; |
6091 | lastp = ascq->q_last[i]; | 2831 | } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) { |
2832 | busname = "EISA"; | ||
2833 | } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) { | ||
2834 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA) | ||
2835 | == ASC_IS_PCI_ULTRA) { | ||
2836 | busname = "PCI Ultra"; | ||
6092 | } else { | 2837 | } else { |
6093 | ASC_ASSERT(lastp != NULL); | 2838 | busname = "PCI"; |
6094 | lastp->host_scribble = | ||
6095 | (unsigned char *)ascq->q_first[i]; | ||
6096 | lastp = ascq->q_last[i]; | ||
6097 | } | 2839 | } |
6098 | ascq->q_first[i] = ascq->q_last[i] = NULL; | 2840 | } else { |
6099 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(i); | 2841 | busname = "?"; |
6100 | #ifdef ADVANSYS_STATS | 2842 | shost_printk(KERN_ERR, shost, "unknown bus " |
6101 | ascq->q_cur_cnt[i] = 0; | 2843 | "type %d\n", asc_dvc_varp->bus_type); |
6102 | #endif /* ADVANSYS_STATS */ | ||
6103 | } | ||
6104 | } | ||
6105 | #ifdef ADVANSYS_STATS | ||
6106 | { | ||
6107 | REQP reqp; | ||
6108 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { | ||
6109 | REQTIMESTAT("asc_dequeue_list", ascq, reqp, | ||
6110 | reqp->device->id); | ||
6111 | } | 2844 | } |
2845 | sprintf(info, | ||
2846 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X", | ||
2847 | ASC_VERSION, busname, (ulong)shost->io_port, | ||
2848 | (ulong)shost->io_port + ASC_IOADR_GAP - 1, | ||
2849 | boardp->irq); | ||
6112 | } | 2850 | } |
6113 | #endif /* ADVANSYS_STATS */ | 2851 | } else { |
6114 | } | ||
6115 | if (lastpp) { | ||
6116 | *lastpp = lastp; | ||
6117 | } | ||
6118 | ASC_DBG1(3, "asc_dequeue_list: firstp 0x%lx\n", (ulong)firstp); | ||
6119 | return firstp; | ||
6120 | } | ||
6121 | |||
6122 | /* | ||
6123 | * Remove the specified 'REQP' from the specified queue for | ||
6124 | * the specified target device. Clear the 'tidmask' bit for the | ||
6125 | * device if no more commands are left queued for it. | ||
6126 | * | ||
6127 | * 'REQPNEXT(reqp)' returns reqp's the next pointer. | ||
6128 | * | ||
6129 | * Return ASC_TRUE if the command was found and removed, | ||
6130 | * otherwise return ASC_FALSE. | ||
6131 | */ | ||
6132 | static int asc_rmqueue(asc_queue_t *ascq, REQP reqp) | ||
6133 | { | ||
6134 | REQP currp, prevp; | ||
6135 | int tid; | ||
6136 | int ret = ASC_FALSE; | ||
6137 | |||
6138 | ASC_DBG2(3, "asc_rmqueue: ascq 0x%lx, reqp 0x%lx\n", | ||
6139 | (ulong)ascq, (ulong)reqp); | ||
6140 | ASC_ASSERT(reqp != NULL); | ||
6141 | |||
6142 | tid = REQPTID(reqp); | ||
6143 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | ||
6144 | |||
6145 | /* | ||
6146 | * Handle the common case of 'reqp' being the first | ||
6147 | * entry on the queue. | ||
6148 | */ | ||
6149 | if (reqp == ascq->q_first[tid]) { | ||
6150 | ret = ASC_TRUE; | ||
6151 | ascq->q_first[tid] = REQPNEXT(reqp); | ||
6152 | /* If the queue is now empty, clear its bit and the last pointer. */ | ||
6153 | if (ascq->q_first[tid] == NULL) { | ||
6154 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | ||
6155 | ASC_ASSERT(ascq->q_last[tid] == reqp); | ||
6156 | ascq->q_last[tid] = NULL; | ||
6157 | } | ||
6158 | } else if (ascq->q_first[tid] != NULL) { | ||
6159 | ASC_ASSERT(ascq->q_last[tid] != NULL); | ||
6160 | /* | 2852 | /* |
6161 | * Because the case of 'reqp' being the first entry has been | 2853 | * Wide Adapter Information |
6162 | * handled above and it is known the queue is not empty, if | ||
6163 | * 'reqp' is found on the queue it is guaranteed the queue will | ||
6164 | * not become empty and that 'q_first[tid]' will not be changed. | ||
6165 | * | 2854 | * |
6166 | * Set 'prevp' to the first entry, 'currp' to the second entry, | 2855 | * Memory-mapped I/O is used instead of I/O space to access |
6167 | * and search for 'reqp'. | 2856 | * the adapter, but display the I/O Port range. The Memory |
2857 | * I/O address is displayed through the driver /proc file. | ||
6168 | */ | 2858 | */ |
6169 | for (prevp = ascq->q_first[tid], currp = REQPNEXT(prevp); | 2859 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
6170 | currp; prevp = currp, currp = REQPNEXT(currp)) { | 2860 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
6171 | if (currp == reqp) { | 2861 | widename = "Ultra-Wide"; |
6172 | ret = ASC_TRUE; | 2862 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
6173 | prevp->host_scribble = | 2863 | widename = "Ultra2-Wide"; |
6174 | (unsigned char *)REQPNEXT(currp); | 2864 | } else { |
6175 | reqp->host_scribble = NULL; | 2865 | widename = "Ultra3-Wide"; |
6176 | if (ascq->q_last[tid] == reqp) { | ||
6177 | ascq->q_last[tid] = prevp; | ||
6178 | } | ||
6179 | break; | ||
6180 | } | ||
6181 | } | 2866 | } |
2867 | sprintf(info, | ||
2868 | "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X", | ||
2869 | ASC_VERSION, widename, (ulong)adv_dvc_varp->iop_base, | ||
2870 | (ulong)adv_dvc_varp->iop_base + boardp->asc_n_io_port - 1, boardp->irq); | ||
6182 | } | 2871 | } |
6183 | #ifdef ADVANSYS_STATS | 2872 | BUG_ON(strlen(info) >= ASC_INFO_SIZE); |
6184 | /* Maintain request queue statistics. */ | 2873 | ASC_DBG(1, "end\n"); |
6185 | if (ret == ASC_TRUE) { | 2874 | return info; |
6186 | ascq->q_cur_cnt[tid]--; | ||
6187 | REQTIMESTAT("asc_rmqueue", ascq, reqp, tid); | ||
6188 | } | ||
6189 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); | ||
6190 | #endif /* ADVANSYS_STATS */ | ||
6191 | ASC_DBG2(3, "asc_rmqueue: reqp 0x%lx, ret %d\n", (ulong)reqp, ret); | ||
6192 | return ret; | ||
6193 | } | 2875 | } |
6194 | 2876 | ||
2877 | #ifdef CONFIG_PROC_FS | ||
6195 | /* | 2878 | /* |
6196 | * Execute as many queued requests as possible for the specified queue. | 2879 | * asc_prt_line() |
2880 | * | ||
2881 | * If 'cp' is NULL print to the console, otherwise print to a buffer. | ||
6197 | * | 2882 | * |
6198 | * Calls asc_execute_scsi_cmnd() to execute a REQP/struct scsi_cmnd. | 2883 | * Return 0 if printing to the console, otherwise return the number of |
2884 | * bytes written to the buffer. | ||
2885 | * | ||
2886 | * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack | ||
2887 | * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes. | ||
6199 | */ | 2888 | */ |
6200 | static void asc_execute_queue(asc_queue_t *ascq) | 2889 | static int asc_prt_line(char *buf, int buflen, char *fmt, ...) |
6201 | { | 2890 | { |
6202 | ADV_SCSI_BIT_ID_TYPE scan_tidmask; | 2891 | va_list args; |
6203 | REQP reqp; | 2892 | int ret; |
6204 | int i; | 2893 | char s[ASC_PRTLINE_SIZE]; |
6205 | 2894 | ||
6206 | ASC_DBG1(1, "asc_execute_queue: ascq 0x%lx\n", (ulong)ascq); | 2895 | va_start(args, fmt); |
6207 | /* | 2896 | ret = vsprintf(s, fmt, args); |
6208 | * Execute queued commands for devices attached to | 2897 | BUG_ON(ret >= ASC_PRTLINE_SIZE); |
6209 | * the current board in round-robin fashion. | 2898 | if (buf == NULL) { |
6210 | */ | 2899 | (void)printk(s); |
6211 | scan_tidmask = ascq->q_tidmask; | 2900 | ret = 0; |
6212 | do { | 2901 | } else { |
6213 | for (i = 0; i <= ADV_MAX_TID; i++) { | 2902 | ret = min(buflen, ret); |
6214 | if (scan_tidmask & ADV_TID_TO_TIDMASK(i)) { | 2903 | memcpy(buf, s, ret); |
6215 | if ((reqp = asc_dequeue(ascq, i)) == NULL) { | 2904 | } |
6216 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); | 2905 | va_end(args); |
6217 | } else | 2906 | return ret; |
6218 | if (asc_execute_scsi_cmnd | ||
6219 | ((struct scsi_cmnd *)reqp) | ||
6220 | == ASC_BUSY) { | ||
6221 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); | ||
6222 | /* | ||
6223 | * The request returned ASC_BUSY. Enqueue at the front of | ||
6224 | * target's waiting list to maintain correct ordering. | ||
6225 | */ | ||
6226 | asc_enqueue(ascq, reqp, ASC_FRONT); | ||
6227 | } | ||
6228 | } | ||
6229 | } | ||
6230 | } while (scan_tidmask); | ||
6231 | return; | ||
6232 | } | 2907 | } |
6233 | 2908 | ||
6234 | #ifdef CONFIG_PROC_FS | ||
6235 | /* | 2909 | /* |
6236 | * asc_prt_board_devices() | 2910 | * asc_prt_board_devices() |
6237 | * | 2911 | * |
@@ -6245,14 +2919,13 @@ static void asc_execute_queue(asc_queue_t *ascq) | |||
6245 | */ | 2919 | */ |
6246 | static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen) | 2920 | static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen) |
6247 | { | 2921 | { |
6248 | asc_board_t *boardp; | 2922 | struct asc_board *boardp = shost_priv(shost); |
6249 | int leftlen; | 2923 | int leftlen; |
6250 | int totlen; | 2924 | int totlen; |
6251 | int len; | 2925 | int len; |
6252 | int chip_scsi_id; | 2926 | int chip_scsi_id; |
6253 | int i; | 2927 | int i; |
6254 | 2928 | ||
6255 | boardp = ASC_BOARDP(shost); | ||
6256 | leftlen = cplen; | 2929 | leftlen = cplen; |
6257 | totlen = len = 0; | 2930 | totlen = len = 0; |
6258 | 2931 | ||
@@ -6286,13 +2959,12 @@ static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen) | |||
6286 | */ | 2959 | */ |
6287 | static int asc_prt_adv_bios(struct Scsi_Host *shost, char *cp, int cplen) | 2960 | static int asc_prt_adv_bios(struct Scsi_Host *shost, char *cp, int cplen) |
6288 | { | 2961 | { |
6289 | asc_board_t *boardp; | 2962 | struct asc_board *boardp = shost_priv(shost); |
6290 | int leftlen; | 2963 | int leftlen; |
6291 | int totlen; | 2964 | int totlen; |
6292 | int len; | 2965 | int len; |
6293 | ushort major, minor, letter; | 2966 | ushort major, minor, letter; |
6294 | 2967 | ||
6295 | boardp = ASC_BOARDP(shost); | ||
6296 | leftlen = cplen; | 2968 | leftlen = cplen; |
6297 | totlen = len = 0; | 2969 | totlen = len = 0; |
6298 | 2970 | ||
@@ -6452,7 +3124,7 @@ static int asc_get_eeprom_string(ushort *serialnum, uchar *cp) | |||
6452 | */ | 3124 | */ |
6453 | static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) | 3125 | static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) |
6454 | { | 3126 | { |
6455 | asc_board_t *boardp; | 3127 | struct asc_board *boardp = shost_priv(shost); |
6456 | ASC_DVC_VAR *asc_dvc_varp; | 3128 | ASC_DVC_VAR *asc_dvc_varp; |
6457 | int leftlen; | 3129 | int leftlen; |
6458 | int totlen; | 3130 | int totlen; |
@@ -6464,7 +3136,6 @@ static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen | |||
6464 | #endif /* CONFIG_ISA */ | 3136 | #endif /* CONFIG_ISA */ |
6465 | uchar serialstr[13]; | 3137 | uchar serialstr[13]; |
6466 | 3138 | ||
6467 | boardp = ASC_BOARDP(shost); | ||
6468 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 3139 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
6469 | ep = &boardp->eep_config.asc_eep; | 3140 | ep = &boardp->eep_config.asc_eep; |
6470 | 3141 | ||
@@ -6586,7 +3257,7 @@ static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen | |||
6586 | */ | 3257 | */ |
6587 | static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) | 3258 | static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) |
6588 | { | 3259 | { |
6589 | asc_board_t *boardp; | 3260 | struct asc_board *boardp = shost_priv(shost); |
6590 | ADV_DVC_VAR *adv_dvc_varp; | 3261 | ADV_DVC_VAR *adv_dvc_varp; |
6591 | int leftlen; | 3262 | int leftlen; |
6592 | int totlen; | 3263 | int totlen; |
@@ -6601,7 +3272,6 @@ static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen | |||
6601 | ushort *wordp; | 3272 | ushort *wordp; |
6602 | ushort sdtr_speed = 0; | 3273 | ushort sdtr_speed = 0; |
6603 | 3274 | ||
6604 | boardp = ASC_BOARDP(shost); | ||
6605 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | 3275 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
6606 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | 3276 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
6607 | ep_3550 = &boardp->eep_config.adv_3550_eep; | 3277 | ep_3550 = &boardp->eep_config.adv_3550_eep; |
@@ -6873,14 +3543,12 @@ static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen | |||
6873 | */ | 3543 | */ |
6874 | static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen) | 3544 | static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen) |
6875 | { | 3545 | { |
6876 | asc_board_t *boardp; | 3546 | struct asc_board *boardp = shost_priv(shost); |
6877 | int leftlen; | 3547 | int leftlen; |
6878 | int totlen; | 3548 | int totlen; |
6879 | int len; | 3549 | int len; |
6880 | int chip_scsi_id; | 3550 | int chip_scsi_id; |
6881 | 3551 | ||
6882 | boardp = ASC_BOARDP(shost); | ||
6883 | |||
6884 | leftlen = cplen; | 3552 | leftlen = cplen; |
6885 | totlen = len = 0; | 3553 | totlen = len = 0; |
6886 | 3554 | ||
@@ -6912,10 +3580,7 @@ static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen) | |||
6912 | boardp->asc_n_io_port); | 3580 | boardp->asc_n_io_port); |
6913 | ASC_PRT_NEXT(); | 3581 | ASC_PRT_NEXT(); |
6914 | 3582 | ||
6915 | /* 'shost->n_io_port' may be truncated because it is only one byte. */ | 3583 | len = asc_prt_line(cp, leftlen, " io_port 0x%x\n", shost->io_port); |
6916 | len = asc_prt_line(cp, leftlen, | ||
6917 | " io_port 0x%x, n_io_port 0x%x\n", | ||
6918 | shost->io_port, shost->n_io_port); | ||
6919 | ASC_PRT_NEXT(); | 3584 | ASC_PRT_NEXT(); |
6920 | 3585 | ||
6921 | if (ASC_NARROW_BOARD(boardp)) { | 3586 | if (ASC_NARROW_BOARD(boardp)) { |
@@ -6940,7 +3605,7 @@ static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen) | |||
6940 | */ | 3605 | */ |
6941 | static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) | 3606 | static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) |
6942 | { | 3607 | { |
6943 | asc_board_t *boardp; | 3608 | struct asc_board *boardp = shost_priv(shost); |
6944 | int chip_scsi_id; | 3609 | int chip_scsi_id; |
6945 | int leftlen; | 3610 | int leftlen; |
6946 | int totlen; | 3611 | int totlen; |
@@ -6950,7 +3615,6 @@ static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) | |||
6950 | int i; | 3615 | int i; |
6951 | int renegotiate = 0; | 3616 | int renegotiate = 0; |
6952 | 3617 | ||
6953 | boardp = ASC_BOARDP(shost); | ||
6954 | v = &boardp->dvc_var.asc_dvc_var; | 3618 | v = &boardp->dvc_var.asc_dvc_var; |
6955 | c = &boardp->dvc_cfg.asc_dvc_cfg; | 3619 | c = &boardp->dvc_cfg.asc_dvc_cfg; |
6956 | chip_scsi_id = c->chip_scsi_id; | 3620 | chip_scsi_id = c->chip_scsi_id; |
@@ -6963,15 +3627,10 @@ static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) | |||
6963 | shost->host_no); | 3627 | shost->host_no); |
6964 | ASC_PRT_NEXT(); | 3628 | ASC_PRT_NEXT(); |
6965 | 3629 | ||
6966 | len = asc_prt_line(cp, leftlen, | 3630 | len = asc_prt_line(cp, leftlen, " chip_version %u, mcode_date 0x%x, " |
6967 | " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n", | 3631 | "mcode_version 0x%x, err_code %u\n", |
6968 | c->chip_version, c->lib_version, c->lib_serial_no, | 3632 | c->chip_version, c->mcode_date, c->mcode_version, |
6969 | c->mcode_date); | 3633 | v->err_code); |
6970 | ASC_PRT_NEXT(); | ||
6971 | |||
6972 | len = asc_prt_line(cp, leftlen, | ||
6973 | " mcode_version 0x%x, err_code %u\n", | ||
6974 | c->mcode_version, v->err_code); | ||
6975 | ASC_PRT_NEXT(); | 3634 | ASC_PRT_NEXT(); |
6976 | 3635 | ||
6977 | /* Current number of commands waiting for the host. */ | 3636 | /* Current number of commands waiting for the host. */ |
@@ -7128,7 +3787,7 @@ static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) | |||
7128 | */ | 3787 | */ |
7129 | static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen) | 3788 | static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen) |
7130 | { | 3789 | { |
7131 | asc_board_t *boardp; | 3790 | struct asc_board *boardp = shost_priv(shost); |
7132 | int leftlen; | 3791 | int leftlen; |
7133 | int totlen; | 3792 | int totlen; |
7134 | int len; | 3793 | int len; |
@@ -7145,7 +3804,6 @@ static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen) | |||
7145 | ushort period = 0; | 3804 | ushort period = 0; |
7146 | int renegotiate = 0; | 3805 | int renegotiate = 0; |
7147 | 3806 | ||
7148 | boardp = ASC_BOARDP(shost); | ||
7149 | v = &boardp->dvc_var.adv_dvc_var; | 3807 | v = &boardp->dvc_var.adv_dvc_var; |
7150 | c = &boardp->dvc_cfg.adv_dvc_cfg; | 3808 | c = &boardp->dvc_cfg.adv_dvc_cfg; |
7151 | iop_base = v->iop_base; | 3809 | iop_base = v->iop_base; |
@@ -7167,10 +3825,9 @@ static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen) | |||
7167 | v->err_code); | 3825 | v->err_code); |
7168 | ASC_PRT_NEXT(); | 3826 | ASC_PRT_NEXT(); |
7169 | 3827 | ||
7170 | len = asc_prt_line(cp, leftlen, | 3828 | len = asc_prt_line(cp, leftlen, " chip_version %u, mcode_date 0x%x, " |
7171 | " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n", | 3829 | "mcode_version 0x%x\n", c->chip_version, |
7172 | c->chip_version, c->lib_version, c->mcode_date, | 3830 | c->mcode_date, c->mcode_version); |
7173 | c->mcode_version); | ||
7174 | ASC_PRT_NEXT(); | 3831 | ASC_PRT_NEXT(); |
7175 | 3832 | ||
7176 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 3833 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
@@ -7376,12 +4033,12 @@ asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen, | |||
7376 | { | 4033 | { |
7377 | int cnt = 0; | 4034 | int cnt = 0; |
7378 | 4035 | ||
7379 | ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n", | 4036 | ASC_DBG(2, "offset %d, advoffset %d, cplen %d\n", |
7380 | (unsigned)offset, (unsigned)advoffset, cplen); | 4037 | (unsigned)offset, (unsigned)advoffset, cplen); |
7381 | if (offset <= advoffset) { | 4038 | if (offset <= advoffset) { |
7382 | /* Read offset below current offset, copy everything. */ | 4039 | /* Read offset below current offset, copy everything. */ |
7383 | cnt = min(cplen, leftlen); | 4040 | cnt = min(cplen, leftlen); |
7384 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", | 4041 | ASC_DBG(2, "curbuf 0x%lx, cp 0x%lx, cnt %d\n", |
7385 | (ulong)curbuf, (ulong)cp, cnt); | 4042 | (ulong)curbuf, (ulong)cp, cnt); |
7386 | memcpy(curbuf, cp, cnt); | 4043 | memcpy(curbuf, cp, cnt); |
7387 | } else if (offset < advoffset + cplen) { | 4044 | } else if (offset < advoffset + cplen) { |
@@ -7389,1125 +4046,4537 @@ asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen, | |||
7389 | cnt = (advoffset + cplen) - offset; | 4046 | cnt = (advoffset + cplen) - offset; |
7390 | cp = (cp + cplen) - cnt; | 4047 | cp = (cp + cplen) - cnt; |
7391 | cnt = min(cnt, leftlen); | 4048 | cnt = min(cnt, leftlen); |
7392 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", | 4049 | ASC_DBG(2, "curbuf 0x%lx, cp 0x%lx, cnt %d\n", |
7393 | (ulong)curbuf, (ulong)cp, cnt); | 4050 | (ulong)curbuf, (ulong)cp, cnt); |
7394 | memcpy(curbuf, cp, cnt); | 4051 | memcpy(curbuf, cp, cnt); |
7395 | } | 4052 | } |
7396 | return cnt; | 4053 | return cnt; |
7397 | } | 4054 | } |
7398 | 4055 | ||
4056 | #ifdef ADVANSYS_STATS | ||
7399 | /* | 4057 | /* |
7400 | * asc_prt_line() | 4058 | * asc_prt_board_stats() |
7401 | * | 4059 | * |
7402 | * If 'cp' is NULL print to the console, otherwise print to a buffer. | 4060 | * Note: no single line should be greater than ASC_PRTLINE_SIZE, |
4061 | * cf. asc_prt_line(). | ||
7403 | * | 4062 | * |
7404 | * Return 0 if printing to the console, otherwise return the number of | 4063 | * Return the number of characters copied into 'cp'. No more than |
7405 | * bytes written to the buffer. | 4064 | * 'cplen' characters will be copied to 'cp'. |
4065 | */ | ||
4066 | static int asc_prt_board_stats(struct Scsi_Host *shost, char *cp, int cplen) | ||
4067 | { | ||
4068 | struct asc_board *boardp = shost_priv(shost); | ||
4069 | struct asc_stats *s = &boardp->asc_stats; | ||
4070 | |||
4071 | int leftlen = cplen; | ||
4072 | int len, totlen = 0; | ||
4073 | |||
4074 | len = asc_prt_line(cp, leftlen, | ||
4075 | "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n", | ||
4076 | shost->host_no); | ||
4077 | ASC_PRT_NEXT(); | ||
4078 | |||
4079 | len = asc_prt_line(cp, leftlen, | ||
4080 | " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n", | ||
4081 | s->queuecommand, s->reset, s->biosparam, | ||
4082 | s->interrupt); | ||
4083 | ASC_PRT_NEXT(); | ||
4084 | |||
4085 | len = asc_prt_line(cp, leftlen, | ||
4086 | " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n", | ||
4087 | s->callback, s->done, s->build_error, | ||
4088 | s->adv_build_noreq, s->adv_build_nosg); | ||
4089 | ASC_PRT_NEXT(); | ||
4090 | |||
4091 | len = asc_prt_line(cp, leftlen, | ||
4092 | " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n", | ||
4093 | s->exe_noerror, s->exe_busy, s->exe_error, | ||
4094 | s->exe_unknown); | ||
4095 | ASC_PRT_NEXT(); | ||
4096 | |||
4097 | /* | ||
4098 | * Display data transfer statistics. | ||
4099 | */ | ||
4100 | if (s->xfer_cnt > 0) { | ||
4101 | len = asc_prt_line(cp, leftlen, " xfer_cnt %lu, xfer_elem %lu, ", | ||
4102 | s->xfer_cnt, s->xfer_elem); | ||
4103 | ASC_PRT_NEXT(); | ||
4104 | |||
4105 | len = asc_prt_line(cp, leftlen, "xfer_bytes %lu.%01lu kb\n", | ||
4106 | s->xfer_sect / 2, ASC_TENTHS(s->xfer_sect, 2)); | ||
4107 | ASC_PRT_NEXT(); | ||
4108 | |||
4109 | /* Scatter gather transfer statistics */ | ||
4110 | len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ", | ||
4111 | s->xfer_elem / s->xfer_cnt, | ||
4112 | ASC_TENTHS(s->xfer_elem, s->xfer_cnt)); | ||
4113 | ASC_PRT_NEXT(); | ||
4114 | |||
4115 | len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ", | ||
4116 | (s->xfer_sect / 2) / s->xfer_elem, | ||
4117 | ASC_TENTHS((s->xfer_sect / 2), s->xfer_elem)); | ||
4118 | ASC_PRT_NEXT(); | ||
4119 | |||
4120 | len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n", | ||
4121 | (s->xfer_sect / 2) / s->xfer_cnt, | ||
4122 | ASC_TENTHS((s->xfer_sect / 2), s->xfer_cnt)); | ||
4123 | ASC_PRT_NEXT(); | ||
4124 | } | ||
4125 | |||
4126 | return totlen; | ||
4127 | } | ||
4128 | #endif /* ADVANSYS_STATS */ | ||
4129 | |||
4130 | /* | ||
4131 | * advansys_proc_info() - /proc/scsi/advansys/{0,1,2,3,...} | ||
7406 | * | 4132 | * |
7407 | * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack | 4133 | * *buffer: I/O buffer |
7408 | * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes. | 4134 | * **start: if inout == FALSE pointer into buffer where user read should start |
4135 | * offset: current offset into a /proc/scsi/advansys/[0...] file | ||
4136 | * length: length of buffer | ||
4137 | * hostno: Scsi_Host host_no | ||
4138 | * inout: TRUE - user is writing; FALSE - user is reading | ||
4139 | * | ||
4140 | * Return the number of bytes read from or written to a | ||
4141 | * /proc/scsi/advansys/[0...] file. | ||
4142 | * | ||
4143 | * Note: This function uses the per board buffer 'prtbuf' which is | ||
4144 | * allocated when the board is initialized in advansys_detect(). The | ||
4145 | * buffer is ASC_PRTBUF_SIZE bytes. The function asc_proc_copy() is | ||
4146 | * used to write to the buffer. The way asc_proc_copy() is written | ||
4147 | * if 'prtbuf' is too small it will not be overwritten. Instead the | ||
4148 | * user just won't get all the available statistics. | ||
7409 | */ | 4149 | */ |
7410 | static int asc_prt_line(char *buf, int buflen, char *fmt, ...) | 4150 | static int |
4151 | advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start, | ||
4152 | off_t offset, int length, int inout) | ||
7411 | { | 4153 | { |
7412 | va_list args; | 4154 | struct asc_board *boardp = shost_priv(shost); |
7413 | int ret; | 4155 | char *cp; |
7414 | char s[ASC_PRTLINE_SIZE]; | 4156 | int cplen; |
4157 | int cnt; | ||
4158 | int totcnt; | ||
4159 | int leftlen; | ||
4160 | char *curbuf; | ||
4161 | off_t advoffset; | ||
7415 | 4162 | ||
7416 | va_start(args, fmt); | 4163 | ASC_DBG(1, "begin\n"); |
7417 | ret = vsprintf(s, fmt, args); | 4164 | |
7418 | ASC_ASSERT(ret < ASC_PRTLINE_SIZE); | 4165 | /* |
7419 | if (buf == NULL) { | 4166 | * User write not supported. |
7420 | (void)printk(s); | 4167 | */ |
7421 | ret = 0; | 4168 | if (inout == TRUE) |
4169 | return -ENOSYS; | ||
4170 | |||
4171 | /* | ||
4172 | * User read of /proc/scsi/advansys/[0...] file. | ||
4173 | */ | ||
4174 | |||
4175 | /* Copy read data starting at the beginning of the buffer. */ | ||
4176 | *start = buffer; | ||
4177 | curbuf = buffer; | ||
4178 | advoffset = 0; | ||
4179 | totcnt = 0; | ||
4180 | leftlen = length; | ||
4181 | |||
4182 | /* | ||
4183 | * Get board configuration information. | ||
4184 | * | ||
4185 | * advansys_info() returns the board string from its own static buffer. | ||
4186 | */ | ||
4187 | cp = (char *)advansys_info(shost); | ||
4188 | strcat(cp, "\n"); | ||
4189 | cplen = strlen(cp); | ||
4190 | /* Copy board information. */ | ||
4191 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4192 | totcnt += cnt; | ||
4193 | leftlen -= cnt; | ||
4194 | if (leftlen == 0) { | ||
4195 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4196 | return totcnt; | ||
4197 | } | ||
4198 | advoffset += cplen; | ||
4199 | curbuf += cnt; | ||
4200 | |||
4201 | /* | ||
4202 | * Display Wide Board BIOS Information. | ||
4203 | */ | ||
4204 | if (!ASC_NARROW_BOARD(boardp)) { | ||
4205 | cp = boardp->prtbuf; | ||
4206 | cplen = asc_prt_adv_bios(shost, cp, ASC_PRTBUF_SIZE); | ||
4207 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); | ||
4208 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, | ||
4209 | cplen); | ||
4210 | totcnt += cnt; | ||
4211 | leftlen -= cnt; | ||
4212 | if (leftlen == 0) { | ||
4213 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4214 | return totcnt; | ||
4215 | } | ||
4216 | advoffset += cplen; | ||
4217 | curbuf += cnt; | ||
4218 | } | ||
4219 | |||
4220 | /* | ||
4221 | * Display driver information for each device attached to the board. | ||
4222 | */ | ||
4223 | cp = boardp->prtbuf; | ||
4224 | cplen = asc_prt_board_devices(shost, cp, ASC_PRTBUF_SIZE); | ||
4225 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); | ||
4226 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4227 | totcnt += cnt; | ||
4228 | leftlen -= cnt; | ||
4229 | if (leftlen == 0) { | ||
4230 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4231 | return totcnt; | ||
4232 | } | ||
4233 | advoffset += cplen; | ||
4234 | curbuf += cnt; | ||
4235 | |||
4236 | /* | ||
4237 | * Display EEPROM configuration for the board. | ||
4238 | */ | ||
4239 | cp = boardp->prtbuf; | ||
4240 | if (ASC_NARROW_BOARD(boardp)) { | ||
4241 | cplen = asc_prt_asc_board_eeprom(shost, cp, ASC_PRTBUF_SIZE); | ||
7422 | } else { | 4242 | } else { |
7423 | ret = min(buflen, ret); | 4243 | cplen = asc_prt_adv_board_eeprom(shost, cp, ASC_PRTBUF_SIZE); |
7424 | memcpy(buf, s, ret); | ||
7425 | } | 4244 | } |
7426 | va_end(args); | 4245 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); |
7427 | return ret; | 4246 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); |
4247 | totcnt += cnt; | ||
4248 | leftlen -= cnt; | ||
4249 | if (leftlen == 0) { | ||
4250 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4251 | return totcnt; | ||
4252 | } | ||
4253 | advoffset += cplen; | ||
4254 | curbuf += cnt; | ||
4255 | |||
4256 | /* | ||
4257 | * Display driver configuration and information for the board. | ||
4258 | */ | ||
4259 | cp = boardp->prtbuf; | ||
4260 | cplen = asc_prt_driver_conf(shost, cp, ASC_PRTBUF_SIZE); | ||
4261 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); | ||
4262 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4263 | totcnt += cnt; | ||
4264 | leftlen -= cnt; | ||
4265 | if (leftlen == 0) { | ||
4266 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4267 | return totcnt; | ||
4268 | } | ||
4269 | advoffset += cplen; | ||
4270 | curbuf += cnt; | ||
4271 | |||
4272 | #ifdef ADVANSYS_STATS | ||
4273 | /* | ||
4274 | * Display driver statistics for the board. | ||
4275 | */ | ||
4276 | cp = boardp->prtbuf; | ||
4277 | cplen = asc_prt_board_stats(shost, cp, ASC_PRTBUF_SIZE); | ||
4278 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); | ||
4279 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4280 | totcnt += cnt; | ||
4281 | leftlen -= cnt; | ||
4282 | if (leftlen == 0) { | ||
4283 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4284 | return totcnt; | ||
4285 | } | ||
4286 | advoffset += cplen; | ||
4287 | curbuf += cnt; | ||
4288 | #endif /* ADVANSYS_STATS */ | ||
4289 | |||
4290 | /* | ||
4291 | * Display Asc Library dynamic configuration information | ||
4292 | * for the board. | ||
4293 | */ | ||
4294 | cp = boardp->prtbuf; | ||
4295 | if (ASC_NARROW_BOARD(boardp)) { | ||
4296 | cplen = asc_prt_asc_board_info(shost, cp, ASC_PRTBUF_SIZE); | ||
4297 | } else { | ||
4298 | cplen = asc_prt_adv_board_info(shost, cp, ASC_PRTBUF_SIZE); | ||
4299 | } | ||
4300 | BUG_ON(cplen >= ASC_PRTBUF_SIZE); | ||
4301 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4302 | totcnt += cnt; | ||
4303 | leftlen -= cnt; | ||
4304 | if (leftlen == 0) { | ||
4305 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4306 | return totcnt; | ||
4307 | } | ||
4308 | advoffset += cplen; | ||
4309 | curbuf += cnt; | ||
4310 | |||
4311 | ASC_DBG(1, "totcnt %d\n", totcnt); | ||
4312 | |||
4313 | return totcnt; | ||
7428 | } | 4314 | } |
7429 | #endif /* CONFIG_PROC_FS */ | 4315 | #endif /* CONFIG_PROC_FS */ |
7430 | 4316 | ||
7431 | /* | 4317 | static void asc_scsi_done(struct scsi_cmnd *scp) |
7432 | * --- Functions Required by the Asc Library | 4318 | { |
7433 | */ | 4319 | scsi_dma_unmap(scp); |
4320 | ASC_STATS(scp->device->host, done); | ||
4321 | scp->scsi_done(scp); | ||
4322 | } | ||
7434 | 4323 | ||
7435 | /* | 4324 | static void AscSetBank(PortAddr iop_base, uchar bank) |
7436 | * Delay for 'n' milliseconds. Don't use the 'jiffies' | ||
7437 | * global variable which is incremented once every 5 ms | ||
7438 | * from a timer interrupt, because this function may be | ||
7439 | * called when interrupts are disabled. | ||
7440 | */ | ||
7441 | static void DvcSleepMilliSecond(ADV_DCNT n) | ||
7442 | { | 4325 | { |
7443 | ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong)n); | 4326 | uchar val; |
7444 | mdelay(n); | 4327 | |
4328 | val = AscGetChipControl(iop_base) & | ||
4329 | (~ | ||
4330 | (CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET | | ||
4331 | CC_CHIP_RESET)); | ||
4332 | if (bank == 1) { | ||
4333 | val |= CC_BANK_ONE; | ||
4334 | } else if (bank == 2) { | ||
4335 | val |= CC_DIAG | CC_BANK_ONE; | ||
4336 | } else { | ||
4337 | val &= ~CC_BANK_ONE; | ||
4338 | } | ||
4339 | AscSetChipControl(iop_base, val); | ||
7445 | } | 4340 | } |
7446 | 4341 | ||
7447 | /* | 4342 | static void AscSetChipIH(PortAddr iop_base, ushort ins_code) |
7448 | * Currently and inline noop but leave as a placeholder. | ||
7449 | * Leave DvcEnterCritical() as a noop placeholder. | ||
7450 | */ | ||
7451 | static inline ulong DvcEnterCritical(void) | ||
7452 | { | 4343 | { |
7453 | return 0; | 4344 | AscSetBank(iop_base, 1); |
4345 | AscWriteChipIH(iop_base, ins_code); | ||
4346 | AscSetBank(iop_base, 0); | ||
7454 | } | 4347 | } |
7455 | 4348 | ||
7456 | /* | 4349 | static int AscStartChip(PortAddr iop_base) |
7457 | * Critical sections are all protected by the board spinlock. | 4350 | { |
7458 | * Leave DvcLeaveCritical() as a noop placeholder. | 4351 | AscSetChipControl(iop_base, 0); |
7459 | */ | 4352 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { |
7460 | static inline void DvcLeaveCritical(ulong flags) | 4353 | return (0); |
4354 | } | ||
4355 | return (1); | ||
4356 | } | ||
4357 | |||
4358 | static int AscStopChip(PortAddr iop_base) | ||
4359 | { | ||
4360 | uchar cc_val; | ||
4361 | |||
4362 | cc_val = | ||
4363 | AscGetChipControl(iop_base) & | ||
4364 | (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG)); | ||
4365 | AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT)); | ||
4366 | AscSetChipIH(iop_base, INS_HALT); | ||
4367 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | ||
4368 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) { | ||
4369 | return (0); | ||
4370 | } | ||
4371 | return (1); | ||
4372 | } | ||
4373 | |||
4374 | static int AscIsChipHalted(PortAddr iop_base) | ||
4375 | { | ||
4376 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { | ||
4377 | if ((AscGetChipControl(iop_base) & CC_HALT) != 0) { | ||
4378 | return (1); | ||
4379 | } | ||
4380 | } | ||
4381 | return (0); | ||
4382 | } | ||
4383 | |||
4384 | static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc) | ||
4385 | { | ||
4386 | PortAddr iop_base; | ||
4387 | int i = 10; | ||
4388 | |||
4389 | iop_base = asc_dvc->iop_base; | ||
4390 | while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) | ||
4391 | && (i-- > 0)) { | ||
4392 | mdelay(100); | ||
4393 | } | ||
4394 | AscStopChip(iop_base); | ||
4395 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT); | ||
4396 | udelay(60); | ||
4397 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | ||
4398 | AscSetChipIH(iop_base, INS_HALT); | ||
4399 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT); | ||
4400 | AscSetChipControl(iop_base, CC_HALT); | ||
4401 | mdelay(200); | ||
4402 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); | ||
4403 | AscSetChipStatus(iop_base, 0); | ||
4404 | return (AscIsChipHalted(iop_base)); | ||
4405 | } | ||
4406 | |||
4407 | static int AscFindSignature(PortAddr iop_base) | ||
4408 | { | ||
4409 | ushort sig_word; | ||
4410 | |||
4411 | ASC_DBG(1, "AscGetChipSignatureByte(0x%x) 0x%x\n", | ||
4412 | iop_base, AscGetChipSignatureByte(iop_base)); | ||
4413 | if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) { | ||
4414 | ASC_DBG(1, "AscGetChipSignatureWord(0x%x) 0x%x\n", | ||
4415 | iop_base, AscGetChipSignatureWord(iop_base)); | ||
4416 | sig_word = AscGetChipSignatureWord(iop_base); | ||
4417 | if ((sig_word == (ushort)ASC_1000_ID0W) || | ||
4418 | (sig_word == (ushort)ASC_1000_ID0W_FIX)) { | ||
4419 | return (1); | ||
4420 | } | ||
4421 | } | ||
4422 | return (0); | ||
4423 | } | ||
4424 | |||
4425 | static void AscEnableInterrupt(PortAddr iop_base) | ||
4426 | { | ||
4427 | ushort cfg; | ||
4428 | |||
4429 | cfg = AscGetChipCfgLsw(iop_base); | ||
4430 | AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON); | ||
4431 | } | ||
4432 | |||
4433 | static void AscDisableInterrupt(PortAddr iop_base) | ||
4434 | { | ||
4435 | ushort cfg; | ||
4436 | |||
4437 | cfg = AscGetChipCfgLsw(iop_base); | ||
4438 | AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON)); | ||
4439 | } | ||
4440 | |||
4441 | static uchar AscReadLramByte(PortAddr iop_base, ushort addr) | ||
4442 | { | ||
4443 | unsigned char byte_data; | ||
4444 | unsigned short word_data; | ||
4445 | |||
4446 | if (isodd_word(addr)) { | ||
4447 | AscSetChipLramAddr(iop_base, addr - 1); | ||
4448 | word_data = AscGetChipLramData(iop_base); | ||
4449 | byte_data = (word_data >> 8) & 0xFF; | ||
4450 | } else { | ||
4451 | AscSetChipLramAddr(iop_base, addr); | ||
4452 | word_data = AscGetChipLramData(iop_base); | ||
4453 | byte_data = word_data & 0xFF; | ||
4454 | } | ||
4455 | return byte_data; | ||
4456 | } | ||
4457 | |||
4458 | static ushort AscReadLramWord(PortAddr iop_base, ushort addr) | ||
4459 | { | ||
4460 | ushort word_data; | ||
4461 | |||
4462 | AscSetChipLramAddr(iop_base, addr); | ||
4463 | word_data = AscGetChipLramData(iop_base); | ||
4464 | return (word_data); | ||
4465 | } | ||
4466 | |||
4467 | #if CC_VERY_LONG_SG_LIST | ||
4468 | static ASC_DCNT AscReadLramDWord(PortAddr iop_base, ushort addr) | ||
4469 | { | ||
4470 | ushort val_low, val_high; | ||
4471 | ASC_DCNT dword_data; | ||
4472 | |||
4473 | AscSetChipLramAddr(iop_base, addr); | ||
4474 | val_low = AscGetChipLramData(iop_base); | ||
4475 | val_high = AscGetChipLramData(iop_base); | ||
4476 | dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low; | ||
4477 | return (dword_data); | ||
4478 | } | ||
4479 | #endif /* CC_VERY_LONG_SG_LIST */ | ||
4480 | |||
4481 | static void | ||
4482 | AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words) | ||
4483 | { | ||
4484 | int i; | ||
4485 | |||
4486 | AscSetChipLramAddr(iop_base, s_addr); | ||
4487 | for (i = 0; i < words; i++) { | ||
4488 | AscSetChipLramData(iop_base, set_wval); | ||
4489 | } | ||
4490 | } | ||
4491 | |||
4492 | static void AscWriteLramWord(PortAddr iop_base, ushort addr, ushort word_val) | ||
4493 | { | ||
4494 | AscSetChipLramAddr(iop_base, addr); | ||
4495 | AscSetChipLramData(iop_base, word_val); | ||
4496 | } | ||
4497 | |||
4498 | static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val) | ||
7461 | { | 4499 | { |
7462 | return; | 4500 | ushort word_data; |
4501 | |||
4502 | if (isodd_word(addr)) { | ||
4503 | addr--; | ||
4504 | word_data = AscReadLramWord(iop_base, addr); | ||
4505 | word_data &= 0x00FF; | ||
4506 | word_data |= (((ushort)byte_val << 8) & 0xFF00); | ||
4507 | } else { | ||
4508 | word_data = AscReadLramWord(iop_base, addr); | ||
4509 | word_data &= 0xFF00; | ||
4510 | word_data |= ((ushort)byte_val & 0x00FF); | ||
4511 | } | ||
4512 | AscWriteLramWord(iop_base, addr, word_data); | ||
7463 | } | 4513 | } |
7464 | 4514 | ||
7465 | /* | 4515 | /* |
7466 | * void | 4516 | * Copy 2 bytes to LRAM. |
7467 | * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | ||
7468 | * | ||
7469 | * Calling/Exit State: | ||
7470 | * none | ||
7471 | * | 4517 | * |
7472 | * Description: | 4518 | * The source data is assumed to be in little-endian order in memory |
7473 | * Output an ASC_SCSI_Q structure to the chip | 4519 | * and is maintained in little-endian order when written to LRAM. |
7474 | */ | 4520 | */ |
7475 | static void | 4521 | static void |
7476 | DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | 4522 | AscMemWordCopyPtrToLram(PortAddr iop_base, |
4523 | ushort s_addr, uchar *s_buffer, int words) | ||
7477 | { | 4524 | { |
7478 | int i; | 4525 | int i; |
7479 | 4526 | ||
7480 | ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words); | ||
7481 | AscSetChipLramAddr(iop_base, s_addr); | 4527 | AscSetChipLramAddr(iop_base, s_addr); |
7482 | for (i = 0; i < 2 * words; i += 2) { | 4528 | for (i = 0; i < 2 * words; i += 2) { |
7483 | if (i == 4 || i == 20) { | 4529 | /* |
7484 | continue; | 4530 | * On a little-endian system the second argument below |
7485 | } | 4531 | * produces a little-endian ushort which is written to |
4532 | * LRAM in little-endian order. On a big-endian system | ||
4533 | * the second argument produces a big-endian ushort which | ||
4534 | * is "transparently" byte-swapped by outpw() and written | ||
4535 | * in little-endian order to LRAM. | ||
4536 | */ | ||
7486 | outpw(iop_base + IOP_RAM_DATA, | 4537 | outpw(iop_base + IOP_RAM_DATA, |
7487 | ((ushort)outbuf[i + 1] << 8) | outbuf[i]); | 4538 | ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); |
7488 | } | 4539 | } |
7489 | } | 4540 | } |
7490 | 4541 | ||
7491 | /* | 4542 | /* |
7492 | * void | 4543 | * Copy 4 bytes to LRAM. |
7493 | * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) | ||
7494 | * | 4544 | * |
7495 | * Calling/Exit State: | 4545 | * The source data is assumed to be in little-endian order in memory |
7496 | * none | 4546 | * and is maintained in little-endian order when writen to LRAM. |
4547 | */ | ||
4548 | static void | ||
4549 | AscMemDWordCopyPtrToLram(PortAddr iop_base, | ||
4550 | ushort s_addr, uchar *s_buffer, int dwords) | ||
4551 | { | ||
4552 | int i; | ||
4553 | |||
4554 | AscSetChipLramAddr(iop_base, s_addr); | ||
4555 | for (i = 0; i < 4 * dwords; i += 4) { | ||
4556 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */ | ||
4557 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */ | ||
4558 | } | ||
4559 | } | ||
4560 | |||
4561 | /* | ||
4562 | * Copy 2 bytes from LRAM. | ||
7497 | * | 4563 | * |
7498 | * Description: | 4564 | * The source data is assumed to be in little-endian order in LRAM |
7499 | * Input an ASC_QDONE_INFO structure from the chip | 4565 | * and is maintained in little-endian order when written to memory. |
7500 | */ | 4566 | */ |
7501 | static void | 4567 | static void |
7502 | DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) | 4568 | AscMemWordCopyPtrFromLram(PortAddr iop_base, |
4569 | ushort s_addr, uchar *d_buffer, int words) | ||
7503 | { | 4570 | { |
7504 | int i; | 4571 | int i; |
7505 | ushort word; | 4572 | ushort word; |
7506 | 4573 | ||
7507 | AscSetChipLramAddr(iop_base, s_addr); | 4574 | AscSetChipLramAddr(iop_base, s_addr); |
7508 | for (i = 0; i < 2 * words; i += 2) { | 4575 | for (i = 0; i < 2 * words; i += 2) { |
7509 | if (i == 10) { | ||
7510 | continue; | ||
7511 | } | ||
7512 | word = inpw(iop_base + IOP_RAM_DATA); | 4576 | word = inpw(iop_base + IOP_RAM_DATA); |
7513 | inbuf[i] = word & 0xff; | 4577 | d_buffer[i] = word & 0xff; |
7514 | inbuf[i + 1] = (word >> 8) & 0xff; | 4578 | d_buffer[i + 1] = (word >> 8) & 0xff; |
7515 | } | 4579 | } |
7516 | ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words); | ||
7517 | } | 4580 | } |
7518 | 4581 | ||
7519 | /* | 4582 | static ASC_DCNT AscMemSumLramWord(PortAddr iop_base, ushort s_addr, int words) |
7520 | * Read a PCI configuration byte. | ||
7521 | */ | ||
7522 | static uchar __init DvcReadPCIConfigByte(ASC_DVC_VAR *asc_dvc, ushort offset) | ||
7523 | { | 4583 | { |
7524 | #ifdef CONFIG_PCI | 4584 | ASC_DCNT sum; |
7525 | uchar byte_data; | 4585 | int i; |
7526 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); | 4586 | |
7527 | return byte_data; | 4587 | sum = 0L; |
7528 | #else /* !defined(CONFIG_PCI) */ | 4588 | for (i = 0; i < words; i++, s_addr += 2) { |
7529 | return 0; | 4589 | sum += AscReadLramWord(iop_base, s_addr); |
7530 | #endif /* !defined(CONFIG_PCI) */ | 4590 | } |
4591 | return (sum); | ||
7531 | } | 4592 | } |
7532 | 4593 | ||
7533 | /* | 4594 | static ushort AscInitLram(ASC_DVC_VAR *asc_dvc) |
7534 | * Write a PCI configuration byte. | ||
7535 | */ | ||
7536 | static void __init | ||
7537 | DvcWritePCIConfigByte(ASC_DVC_VAR *asc_dvc, ushort offset, uchar byte_data) | ||
7538 | { | 4595 | { |
7539 | #ifdef CONFIG_PCI | 4596 | uchar i; |
7540 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); | 4597 | ushort s_addr; |
7541 | #endif /* CONFIG_PCI */ | 4598 | PortAddr iop_base; |
4599 | ushort warn_code; | ||
4600 | |||
4601 | iop_base = asc_dvc->iop_base; | ||
4602 | warn_code = 0; | ||
4603 | AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0, | ||
4604 | (ushort)(((int)(asc_dvc->max_total_qng + 2 + 1) * | ||
4605 | 64) >> 1)); | ||
4606 | i = ASC_MIN_ACTIVE_QNO; | ||
4607 | s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE; | ||
4608 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
4609 | (uchar)(i + 1)); | ||
4610 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
4611 | (uchar)(asc_dvc->max_total_qng)); | ||
4612 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
4613 | (uchar)i); | ||
4614 | i++; | ||
4615 | s_addr += ASC_QBLK_SIZE; | ||
4616 | for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) { | ||
4617 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
4618 | (uchar)(i + 1)); | ||
4619 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
4620 | (uchar)(i - 1)); | ||
4621 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
4622 | (uchar)i); | ||
4623 | } | ||
4624 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
4625 | (uchar)ASC_QLINK_END); | ||
4626 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
4627 | (uchar)(asc_dvc->max_total_qng - 1)); | ||
4628 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
4629 | (uchar)asc_dvc->max_total_qng); | ||
4630 | i++; | ||
4631 | s_addr += ASC_QBLK_SIZE; | ||
4632 | for (; i <= (uchar)(asc_dvc->max_total_qng + 3); | ||
4633 | i++, s_addr += ASC_QBLK_SIZE) { | ||
4634 | AscWriteLramByte(iop_base, | ||
4635 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_FWD), i); | ||
4636 | AscWriteLramByte(iop_base, | ||
4637 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_BWD), i); | ||
4638 | AscWriteLramByte(iop_base, | ||
4639 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_QNO), i); | ||
4640 | } | ||
4641 | return warn_code; | ||
7542 | } | 4642 | } |
7543 | 4643 | ||
7544 | /* | 4644 | static ASC_DCNT |
7545 | * Return the BIOS address of the adapter at the specified | 4645 | AscLoadMicroCode(PortAddr iop_base, |
7546 | * I/O port and with the specified bus type. | 4646 | ushort s_addr, uchar *mcode_buf, ushort mcode_size) |
7547 | */ | ||
7548 | static ushort __init AscGetChipBiosAddress(PortAddr iop_base, ushort bus_type) | ||
7549 | { | 4647 | { |
7550 | ushort cfg_lsw; | 4648 | ASC_DCNT chksum; |
7551 | ushort bios_addr; | 4649 | ushort mcode_word_size; |
4650 | ushort mcode_chksum; | ||
7552 | 4651 | ||
7553 | /* | 4652 | /* Write the microcode buffer starting at LRAM address 0. */ |
7554 | * The PCI BIOS is re-located by the motherboard BIOS. Because | 4653 | mcode_word_size = (ushort)(mcode_size >> 1); |
7555 | * of this the driver can not determine where a PCI BIOS is | 4654 | AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size); |
7556 | * loaded and executes. | 4655 | AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size); |
7557 | */ | 4656 | |
7558 | if (bus_type & ASC_IS_PCI) { | 4657 | chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size); |
7559 | return (0); | 4658 | ASC_DBG(1, "chksum 0x%lx\n", (ulong)chksum); |
4659 | mcode_chksum = (ushort)AscMemSumLramWord(iop_base, | ||
4660 | (ushort)ASC_CODE_SEC_BEG, | ||
4661 | (ushort)((mcode_size - | ||
4662 | s_addr - (ushort) | ||
4663 | ASC_CODE_SEC_BEG) / | ||
4664 | 2)); | ||
4665 | ASC_DBG(1, "mcode_chksum 0x%lx\n", (ulong)mcode_chksum); | ||
4666 | AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum); | ||
4667 | AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size); | ||
4668 | return chksum; | ||
4669 | } | ||
4670 | |||
4671 | /* Microcode buffer is kept after initialization for error recovery. */ | ||
4672 | static uchar _asc_mcode_buf[] = { | ||
4673 | 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4674 | 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, | ||
4675 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4676 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4677 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, | ||
4679 | 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4680 | 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4681 | 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, | ||
4682 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
4683 | 0x00, 0x00, 0xE4, 0x88, 0x00, 0x00, 0x00, 0x00, 0x80, 0x73, 0x48, 0x04, | ||
4684 | 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40, | ||
4685 | 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2, | ||
4686 | 0xC2, 0x00, 0x92, 0x80, 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, | ||
4687 | 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x4F, 0x00, 0xF5, 0x00, | ||
4688 | 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x80, 0x62, | ||
4689 | 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, | ||
4690 | 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, | ||
4691 | 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1, 0x80, 0x73, 0xCD, 0x04, | ||
4692 | 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, 0xC6, 0x81, 0xC2, 0x88, | ||
4693 | 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00, | ||
4694 | 0x84, 0x97, 0x07, 0xA6, 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, | ||
4695 | 0x03, 0x03, 0x01, 0xDE, 0xC2, 0x88, 0xCE, 0x00, 0x69, 0x60, 0xCE, 0x00, | ||
4696 | 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, 0x80, 0x63, 0x07, 0xA6, | ||
4697 | 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, | ||
4698 | 0x34, 0x01, 0x00, 0x33, 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, | ||
4699 | 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04, 0x04, 0x85, 0x05, 0xD8, | ||
4700 | 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF8, 0x88, 0xFB, 0x23, | ||
4701 | 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01, | ||
4702 | 0x00, 0x33, 0x0A, 0x00, 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, | ||
4703 | 0x00, 0x33, 0x0B, 0x00, 0xC2, 0x88, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, | ||
4704 | 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, 0x06, 0xAB, 0x82, 0x01, | ||
4705 | 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3, | ||
4706 | 0x3C, 0x01, 0x00, 0x05, 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, | ||
4707 | 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xBE, 0x81, 0xFD, 0x23, | ||
4708 | 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, | ||
4709 | 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, | ||
4710 | 0xC2, 0x88, 0x06, 0x23, 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, | ||
4711 | 0x00, 0xA2, 0xD4, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xDA, 0x01, 0xE6, 0x84, | ||
4712 | 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61, | ||
4713 | 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC, | ||
4714 | 0x4F, 0x00, 0x84, 0x97, 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, | ||
4715 | 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80, 0xF0, 0x97, 0x00, 0x46, | ||
4716 | 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29, | ||
4717 | 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88, | ||
4718 | 0x04, 0x98, 0xF0, 0x80, 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, | ||
4719 | 0x7C, 0x95, 0x06, 0xA6, 0x34, 0x02, 0x03, 0xA6, 0x4C, 0x04, 0x46, 0x82, | ||
4720 | 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, 0x46, 0x82, 0xFE, 0x95, | ||
4721 | 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02, | ||
4722 | 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, | ||
4723 | 0xC2, 0x88, 0x7C, 0x95, 0x48, 0x82, 0x60, 0x96, 0x48, 0x82, 0x04, 0x23, | ||
4724 | 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC, | ||
4725 | 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, | ||
4726 | 0x6F, 0x00, 0xA5, 0x01, 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, | ||
4727 | 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAA, 0x02, 0x07, 0xA6, 0x5A, 0x02, | ||
4728 | 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02, | ||
4729 | 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E, | ||
4730 | 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, | ||
4731 | 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84, 0x01, 0x10, 0x31, 0x12, 0x35, | ||
4732 | 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82, | ||
4733 | 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8, | ||
4734 | 0x00, 0x33, 0x1F, 0x00, 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, | ||
4735 | 0x0E, 0x3D, 0x7E, 0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x14, 0x03, 0x00, 0xA6, | ||
4736 | 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10, 0x03, 0x03, 0xA6, | ||
4737 | 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, | ||
4738 | 0x7C, 0x95, 0xEE, 0x82, 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, | ||
4739 | 0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8, 0x31, 0x05, 0x07, 0x01, | ||
4740 | 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x86, 0x98, | ||
4741 | 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6, | ||
4742 | 0x3C, 0x04, 0x06, 0xA6, 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, | ||
4743 | 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x32, 0x83, 0x60, 0x96, 0x32, 0x83, | ||
4744 | 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33, | ||
4745 | 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05, | ||
4746 | 0xFF, 0xA2, 0x7A, 0x03, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, | ||
4747 | 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9A, 0x03, 0xEC, 0x00, 0x6E, 0x00, | ||
4748 | 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x96, 0x03, | ||
4749 | 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, | ||
4750 | 0xA4, 0x03, 0x00, 0xA6, 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, | ||
4751 | 0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03, 0xD4, 0x83, 0x7C, 0x95, | ||
4752 | 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42, | ||
4753 | 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95, | ||
4754 | 0xC0, 0x83, 0x00, 0x33, 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, | ||
4755 | 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23, 0xA1, 0x01, 0x10, 0x84, | ||
4756 | 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, | ||
4757 | 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04, | ||
4758 | 0x06, 0xA6, 0x0A, 0x04, 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, | ||
4759 | 0xF4, 0x83, 0x60, 0x96, 0xF4, 0x83, 0x20, 0x84, 0x07, 0xF0, 0x06, 0xA4, | ||
4760 | 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63, | ||
4761 | 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, | ||
4762 | 0x38, 0x04, 0x00, 0x33, 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, | ||
4763 | 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00, 0x33, 0x00, 0x84, | ||
4764 | 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63, | ||
4765 | 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03, | ||
4766 | 0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, | ||
4767 | 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1D, 0x00, | ||
4768 | 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00, | ||
4769 | 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, | ||
4770 | 0x08, 0x23, 0x22, 0xA3, 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, | ||
4771 | 0x02, 0x23, 0x22, 0xA3, 0xC4, 0x04, 0x42, 0x23, 0xF8, 0x88, 0x4A, 0x00, | ||
4772 | 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8, 0x88, 0x04, 0x98, | ||
4773 | 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, | ||
4774 | 0x81, 0x62, 0xE8, 0x81, 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, | ||
4775 | 0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81, 0xC0, 0x20, 0x81, 0x62, | ||
4776 | 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, 0xF8, 0x88, 0x04, 0x23, | ||
4777 | 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3, | ||
4778 | 0xF4, 0x04, 0x00, 0x33, 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, | ||
4779 | 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0, 0x01, 0x04, 0x98, 0x26, 0x95, | ||
4780 | 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05, | ||
4781 | 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85, | ||
4782 | 0x46, 0x97, 0xCD, 0x04, 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, | ||
4783 | 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x34, 0x85, 0x02, 0x23, 0xA0, 0x01, | ||
4784 | 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D, 0x01, 0x04, 0xD6, | ||
4785 | 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
4786 | 0x49, 0x00, 0x81, 0x01, 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, | ||
4787 | 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9, 0x00, 0x00, 0x05, | ||
4788 | 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00, | ||
4789 | 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, | ||
4790 | 0x07, 0xA4, 0xF8, 0x05, 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, | ||
4791 | 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88, 0x04, 0xA0, 0xB8, 0x05, 0x80, 0x63, | ||
4792 | 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05, | ||
4793 | 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00, | ||
4794 | 0x62, 0x97, 0x04, 0x85, 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, | ||
4795 | 0x08, 0xA0, 0xBE, 0x05, 0xF4, 0x85, 0x03, 0xA0, 0xC4, 0x05, 0xF4, 0x85, | ||
4796 | 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC, 0x86, 0x07, 0xA0, | ||
4797 | 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, | ||
4798 | 0x80, 0x67, 0x80, 0x63, 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, | ||
4799 | 0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23, 0x80, 0x00, 0x06, 0x87, | ||
4800 | 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00, | ||
4801 | 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23, | ||
4802 | 0x07, 0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, | ||
4803 | 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01, 0x01, 0xD6, 0x20, 0x23, 0x63, 0x60, | ||
4804 | 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05, | ||
4805 | 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, | ||
4806 | 0x52, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, | ||
4807 | 0xC0, 0x23, 0x07, 0x41, 0x00, 0x63, 0x1D, 0x01, 0x04, 0xCC, 0x00, 0x33, | ||
4808 | 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63, | ||
4809 | 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23, | ||
4810 | 0xDF, 0x00, 0x06, 0xA6, 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, | ||
4811 | 0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20, 0x81, 0x62, 0x00, 0x63, | ||
4812 | 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x94, 0x06, | ||
4813 | 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B, | ||
4814 | 0x40, 0x0E, 0x80, 0x63, 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, | ||
4815 | 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0xA2, 0x06, | ||
4816 | 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E, | ||
4817 | 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, | ||
4818 | 0x07, 0xA6, 0xD6, 0x06, 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, | ||
4819 | 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, 0xE8, 0x06, 0x00, 0x33, | ||
4820 | 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4, 0x06, 0xC0, 0x0E, | ||
4821 | 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, | ||
4822 | 0x81, 0x62, 0x04, 0x01, 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, | ||
4823 | 0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33, 0x2C, 0x00, 0xC2, 0x88, | ||
4824 | 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, | ||
4825 | 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88, | ||
4826 | 0x00, 0x00, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, | ||
4827 | 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, | ||
4828 | 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00, | ||
4829 | 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, | ||
4830 | 0x80, 0x05, 0x81, 0x05, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, | ||
4831 | 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x71, 0x00, | ||
4832 | 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00, 0x80, 0x01, | ||
4833 | 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, | ||
4834 | 0xF1, 0x00, 0x70, 0x00, 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, | ||
4835 | 0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, | ||
4836 | 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01, | ||
4837 | 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, | ||
4838 | 0xC4, 0x07, 0x00, 0x33, 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, | ||
4839 | 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01, 0xB1, 0x01, 0x08, 0x23, | ||
4840 | 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07, | ||
4841 | 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
4842 | 0x05, 0x05, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, | ||
4843 | 0x00, 0x02, 0x80, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63, | ||
4844 | 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0, | ||
4845 | 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, | ||
4846 | 0x00, 0x63, 0xF3, 0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, | ||
4847 | 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08, 0x74, 0x04, 0x02, 0x01, | ||
4848 | 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x24, 0x08, 0x04, 0x98, | ||
4849 | 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, | ||
4850 | 0x5A, 0x88, 0x02, 0x01, 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, | ||
4851 | 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x64, 0x08, 0x00, 0x05, 0x4E, 0x88, | ||
4852 | 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08, | ||
4853 | 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, | ||
4854 | 0x00, 0x63, 0x38, 0x2B, 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, | ||
4855 | 0x31, 0x05, 0x92, 0x98, 0x05, 0x05, 0xB2, 0x09, 0x00, 0x63, 0x00, 0x32, | ||
4856 | 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36, | ||
4857 | 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, | ||
4858 | 0x40, 0x36, 0x40, 0x3A, 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, | ||
4859 | 0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3, 0x00, 0x63, 0x80, 0x73, | ||
4860 | 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73, | ||
4861 | 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, | ||
4862 | 0xA1, 0x23, 0xA1, 0x01, 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, | ||
4863 | 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2, 0xF1, 0xC7, 0x41, 0x23, | ||
4864 | 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84, | ||
4865 | }; | ||
4866 | |||
4867 | static unsigned short _asc_mcode_size = sizeof(_asc_mcode_buf); | ||
4868 | static ADV_DCNT _asc_mcode_chksum = 0x012C453FUL; | ||
4869 | |||
4870 | /* Microcode buffer is kept after initialization for error recovery. */ | ||
4871 | static unsigned char _adv_asc3550_buf[] = { | ||
4872 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, | ||
4873 | 0x01, 0x00, 0x48, 0xe4, 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, | ||
4874 | 0x00, 0xfa, 0xff, 0xff, 0x28, 0x0e, 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, | ||
4875 | 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, 0x01, 0xf6, | ||
4876 | 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00, | ||
4877 | 0x00, 0xec, 0x85, 0xf0, 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, | ||
4878 | 0x00, 0xe6, 0x1e, 0xf0, 0x86, 0xf0, 0xb4, 0x00, 0x98, 0x57, 0xd0, 0x01, | ||
4879 | 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, 0xaa, 0x18, 0x02, 0x80, | ||
4880 | 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40, | ||
4881 | 0x00, 0x57, 0x01, 0xea, 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, | ||
4882 | 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01, | ||
4883 | 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, 0x02, 0x4a, 0xb9, 0x54, | ||
4884 | 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00, | ||
4885 | 0x3e, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, | ||
4886 | 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x62, 0x0a, | ||
4887 | 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, 0x4c, 0x1c, 0xbb, 0x55, | ||
4888 | 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0, | ||
4889 | 0x03, 0xf7, 0x06, 0xf7, 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, | ||
4890 | 0x00, 0x01, 0xb0, 0x08, 0x30, 0x13, 0x64, 0x15, 0x32, 0x1c, 0x38, 0x1c, | ||
4891 | 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, 0x04, 0xea, 0x5d, 0xf0, | ||
4892 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, | ||
4893 | 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, | ||
4894 | 0x0a, 0x12, 0x04, 0x13, 0x40, 0x13, 0x30, 0x1c, 0x00, 0x4e, 0xbd, 0x56, | ||
4895 | 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xa7, 0xf0, | ||
4896 | 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, | ||
4897 | 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, | ||
4898 | 0xde, 0x03, 0x56, 0x0a, 0x14, 0x0e, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, | ||
4899 | 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, 0x10, 0x15, 0x14, 0x15, | ||
4900 | 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, | ||
4901 | 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, | ||
4902 | 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, 0x0c, 0xf0, | ||
4903 | 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, | ||
4904 | 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00, | ||
4905 | 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, | ||
4906 | 0x26, 0x01, 0x79, 0x01, 0x7a, 0x01, 0xc0, 0x01, 0xc2, 0x01, 0x7c, 0x02, | ||
4907 | 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, 0x69, 0x08, 0xba, 0x08, | ||
4908 | 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10, | ||
4909 | 0xf1, 0x10, 0x06, 0x12, 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, | ||
4910 | 0x42, 0x14, 0xd6, 0x14, 0x8a, 0x15, 0xc6, 0x17, 0xd2, 0x17, 0x6b, 0x18, | ||
4911 | 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0x48, 0x47, | ||
4912 | 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55, | ||
4913 | 0x14, 0x56, 0x77, 0x57, 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, | ||
4914 | 0x03, 0xa1, 0xfe, 0x9c, 0xf0, 0x29, 0x02, 0xfe, 0xb8, 0x0c, 0xff, 0x10, | ||
4915 | 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, 0xfe, 0x80, 0x01, 0xff, | ||
4916 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
4917 | 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, | ||
4918 | 0x00, 0x10, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08, | ||
4919 | 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x0f, | ||
4920 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
4921 | 0xfe, 0x04, 0xf7, 0xcf, 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, | ||
4922 | 0x04, 0xf7, 0xcf, 0x67, 0x0b, 0x3c, 0x2a, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, | ||
4923 | 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, | ||
4924 | 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b, | ||
4925 | 0x02, 0xfe, 0xd4, 0x0c, 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, | ||
4926 | 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x05, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12, | ||
4927 | 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, 0xf0, 0xfe, 0x86, 0x02, | ||
4928 | 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02, | ||
4929 | 0xfe, 0x46, 0xf0, 0xfe, 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, | ||
4930 | 0xfe, 0x43, 0xf0, 0xfe, 0x44, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x48, 0x02, | ||
4931 | 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, 0xa0, 0x17, 0x06, 0x18, | ||
4932 | 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe, | ||
4933 | 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, | ||
4934 | 0xfe, 0x06, 0xfc, 0xc7, 0x0a, 0x6b, 0x01, 0x9e, 0x02, 0x29, 0x14, 0x4d, | ||
4935 | 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xbd, | ||
4936 | 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, | ||
4937 | 0x58, 0x1c, 0x17, 0x06, 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, | ||
4938 | 0xfe, 0x02, 0x02, 0x21, 0xfe, 0x94, 0x02, 0xfe, 0x5a, 0x1c, 0xea, 0xfe, | ||
4939 | 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, 0x01, 0xfe, 0x54, 0x0f, | ||
4940 | 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe, | ||
4941 | 0x69, 0x10, 0x17, 0x06, 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, | ||
4942 | 0x12, 0x20, 0xfe, 0x05, 0xf6, 0xc7, 0x01, 0xfe, 0x52, 0x16, 0x09, 0x4a, | ||
4943 | 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, 0x02, 0x29, 0x0a, 0x40, | ||
4944 | 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41, | ||
4945 | 0x58, 0x0a, 0x99, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, | ||
4946 | 0x01, 0xe6, 0x02, 0x29, 0x2a, 0x46, 0xfe, 0x02, 0xe8, 0x27, 0xf8, 0xfe, | ||
4947 | 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, 0x01, 0xfe, 0x07, 0x4b, | ||
4948 | 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0, | ||
4949 | 0xfe, 0x56, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0, | ||
4950 | 0x9c, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x64, 0x03, 0xeb, 0x0f, | ||
4951 | 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48, 0x1c, 0xeb, 0x09, 0x04, | ||
4952 | 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40, | ||
4953 | 0x01, 0x0e, 0xac, 0x75, 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2, | ||
4954 | 0xfe, 0x01, 0xf0, 0xd2, 0xfe, 0x82, 0xf0, 0xfe, 0x92, 0x03, 0xec, 0x11, | ||
4955 | 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25, 0x32, 0x1f, 0xfe, 0xb4, | ||
4956 | 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe, | ||
4957 | 0x0a, 0xf0, 0xfe, 0x7a, 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe, | ||
4958 | 0xf6, 0x04, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02, 0xd1, | ||
4959 | 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8, 0xf7, 0xfe, 0x48, 0x1c, | ||
4960 | 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3, | ||
4961 | 0x0a, 0xca, 0x01, 0x0e, 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, | ||
4962 | 0xfe, 0x10, 0x12, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, 0x66, 0x02, 0x02, | ||
4963 | 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65, 0xfe, 0x3c, 0x04, 0x1f, | ||
4964 | 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, | ||
4965 | 0x12, 0x2b, 0xff, 0x02, 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04, | ||
4966 | 0x2b, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd5, 0xfe, 0x4c, 0x44, 0xfe, | ||
4967 | 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64, | ||
4968 | 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d, | ||
4969 | 0xfe, 0x2a, 0x13, 0x2f, 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, | ||
4970 | 0xfe, 0x4c, 0x54, 0x64, 0xd3, 0xfa, 0xef, 0x86, 0x09, 0x04, 0x1d, 0xfe, | ||
4971 | 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, 0x1d, 0xfe, 0x1c, 0x12, | ||
4972 | 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, | ||
4973 | 0x70, 0x0c, 0x02, 0x22, 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, | ||
4974 | 0xf9, 0x03, 0x14, 0x92, 0x01, 0x33, 0x02, 0x29, 0xfe, 0x42, 0x5b, 0x67, | ||
4975 | 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4, | ||
4976 | 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a, | ||
4977 | 0xfe, 0x70, 0x12, 0x49, 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2, | ||
4978 | 0x00, 0x28, 0x16, 0xfe, 0x80, 0x05, 0xfe, 0x31, 0xe4, 0x6a, 0x49, 0x04, | ||
4979 | 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x42, 0x12, | ||
4980 | 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05, | ||
4981 | 0x11, 0xfe, 0xe3, 0x00, 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05, | ||
4982 | 0xfe, 0x49, 0xf0, 0xfe, 0x64, 0x05, 0x83, 0x24, 0xfe, 0x21, 0x00, 0xa1, | ||
4983 | 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe, 0x09, 0x48, 0x01, 0x08, | ||
4984 | 0x26, 0xfe, 0x98, 0x05, 0xfe, 0xe2, 0x08, 0x49, 0x04, 0xc5, 0x3b, 0x01, | ||
4985 | 0x86, 0x24, 0x06, 0x12, 0xcc, 0x37, 0xfe, 0x27, 0x01, 0x09, 0x04, 0x1d, | ||
4986 | 0xfe, 0x22, 0x12, 0x47, 0x01, 0xa7, 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, | ||
4987 | 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, 0x02, 0x22, 0x05, 0xfe, | ||
4988 | 0x9c, 0x00, 0x28, 0xfe, 0x3e, 0x12, 0x05, 0x50, 0x28, 0xfe, 0x36, 0x13, | ||
4989 | 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x08, 0x06, 0x0a, 0x06, 0x49, 0x04, 0x19, | ||
4990 | 0xfe, 0x02, 0x12, 0x5f, 0x01, 0xfe, 0xaa, 0x14, 0x1f, 0xfe, 0xfe, 0x05, | ||
4991 | 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x50, 0xb4, 0x0c, | ||
4992 | 0x50, 0x05, 0xc6, 0x28, 0xfe, 0x62, 0x12, 0x05, 0x3f, 0x28, 0xfe, 0x5a, | ||
4993 | 0x13, 0x01, 0xfe, 0x14, 0x18, 0x01, 0xfe, 0x66, 0x18, 0xfe, 0x43, 0x48, | ||
4994 | 0xb7, 0x19, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d, | ||
4995 | 0x85, 0xb7, 0x69, 0x47, 0x01, 0xa7, 0x26, 0xfe, 0x72, 0x06, 0x49, 0x04, | ||
4996 | 0x1b, 0xdf, 0x89, 0x0a, 0x4d, 0x01, 0xfe, 0xd8, 0x14, 0x1f, 0xfe, 0x68, | ||
4997 | 0x06, 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x3f, 0xb4, | ||
4998 | 0x0c, 0x3f, 0x17, 0x06, 0x01, 0xa7, 0xec, 0x72, 0x70, 0x01, 0x6e, 0x87, | ||
4999 | 0x11, 0xfe, 0xe2, 0x00, 0x01, 0x08, 0x25, 0x32, 0xfe, 0x0a, 0xf0, 0xfe, | ||
5000 | 0xa6, 0x06, 0x8c, 0xfe, 0x5c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, 0x64, 0x07, | ||
5001 | 0x8d, 0x81, 0x02, 0x22, 0x09, 0x04, 0x0b, 0xfe, 0x2e, 0x12, 0x15, 0x1a, | ||
5002 | 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, | ||
5003 | 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x15, 0x00, 0x02, 0xfe, 0x32, | ||
5004 | 0x08, 0x61, 0x04, 0x1b, 0xfe, 0x38, 0x12, 0x09, 0x04, 0x1b, 0x6e, 0x15, | ||
5005 | 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, | ||
5006 | 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x06, 0x01, 0x08, 0x15, 0x00, 0x02, | ||
5007 | 0xd9, 0x66, 0x4c, 0xfe, 0x3a, 0x55, 0x5f, 0xfe, 0x9a, 0x81, 0x4b, 0x1d, | ||
5008 | 0xba, 0xfe, 0x32, 0x07, 0x0a, 0x1d, 0xfe, 0x09, 0x6f, 0xaf, 0xfe, 0xca, | ||
5009 | 0x45, 0xfe, 0x32, 0x12, 0x62, 0x2c, 0x85, 0x66, 0x7b, 0x01, 0x08, 0x25, | ||
5010 | 0x32, 0xfe, 0x0a, 0xf0, 0xfe, 0x32, 0x07, 0x8d, 0x81, 0x8c, 0xfe, 0x5c, | ||
5011 | 0x07, 0x02, 0x22, 0x01, 0x43, 0x02, 0xfe, 0x8a, 0x06, 0x15, 0x19, 0x02, | ||
5012 | 0xfe, 0x8a, 0x06, 0xfe, 0x9c, 0xf7, 0xd4, 0xfe, 0x2c, 0x90, 0xfe, 0xae, | ||
5013 | 0x90, 0x77, 0xfe, 0xca, 0x07, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x4a, 0x6a, | ||
5014 | 0x35, 0x1e, 0x20, 0x07, 0x10, 0xfe, 0x0e, 0x12, 0x74, 0xfe, 0x80, 0x80, | ||
5015 | 0x37, 0x20, 0x63, 0x27, 0xfe, 0x06, 0x10, 0xfe, 0x83, 0xe7, 0xc4, 0xa1, | ||
5016 | 0xfe, 0x03, 0x40, 0x09, 0x4a, 0x4f, 0x35, 0x01, 0xa8, 0xad, 0xfe, 0x1f, | ||
5017 | 0x40, 0x12, 0x58, 0x01, 0xa5, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, | ||
5018 | 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x83, 0xfb, 0xfe, 0x8a, 0x90, 0x0c, 0x52, | ||
5019 | 0x18, 0x53, 0xfe, 0x0c, 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, | ||
5020 | 0xc2, 0x50, 0x0c, 0x39, 0x18, 0x3a, 0xfe, 0x4a, 0x10, 0x09, 0x04, 0x6a, | ||
5021 | 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x54, 0x18, | ||
5022 | 0x55, 0x09, 0x04, 0x4f, 0x85, 0x01, 0xa8, 0xfe, 0x1f, 0x80, 0x12, 0x58, | ||
5023 | 0xfe, 0x44, 0x90, 0xfe, 0xc6, 0x90, 0x0c, 0x56, 0x18, 0x57, 0xfb, 0xfe, | ||
5024 | 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, | ||
5025 | 0x0c, 0x39, 0x18, 0x3a, 0x0c, 0x38, 0x18, 0x4e, 0x09, 0x4a, 0x19, 0x35, | ||
5026 | 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x48, 0x08, 0xfe, 0x9e, 0xf0, | ||
5027 | 0xfe, 0x5c, 0x08, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0xfe, 0x80, | ||
5028 | 0x08, 0xb9, 0xfe, 0x9e, 0x08, 0x8c, 0xfe, 0x74, 0x08, 0xfe, 0x06, 0xf0, | ||
5029 | 0xfe, 0x7a, 0x08, 0x8d, 0x81, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xc9, 0x10, | ||
5030 | 0x15, 0x19, 0xfe, 0xc9, 0x10, 0x61, 0x04, 0x06, 0xfe, 0x10, 0x12, 0x61, | ||
5031 | 0x04, 0x0b, 0x45, 0x09, 0x04, 0x0b, 0xfe, 0x68, 0x12, 0xfe, 0x2e, 0x1c, | ||
5032 | 0x02, 0xfe, 0x24, 0x0a, 0x61, 0x04, 0x06, 0x45, 0x61, 0x04, 0x0b, 0xfe, | ||
5033 | 0x52, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0x1e, 0x09, 0xfe, | ||
5034 | 0xac, 0xf0, 0xfe, 0xbe, 0x08, 0xfe, 0x8a, 0x10, 0xaa, 0xfe, 0xf3, 0x10, | ||
5035 | 0xfe, 0xad, 0xf0, 0xfe, 0xca, 0x08, 0x02, 0xfe, 0x24, 0x0a, 0xab, 0xfe, | ||
5036 | 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0x9d, 0xe9, 0x1c, 0xfe, 0x00, 0xfe, 0xfe, | ||
5037 | 0x1c, 0x12, 0xb5, 0xfe, 0xd2, 0xf0, 0x9d, 0xfe, 0x76, 0x18, 0x1c, 0x1a, | ||
5038 | 0x16, 0x9d, 0x05, 0xcb, 0x1c, 0x06, 0x16, 0x9d, 0xb8, 0x6d, 0xb9, 0x6d, | ||
5039 | 0xaa, 0xab, 0xfe, 0xb1, 0x10, 0x70, 0x5e, 0x2b, 0x14, 0x92, 0x01, 0x33, | ||
5040 | 0x0f, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x5a, 0x0f, 0x7c, 0x02, 0x5a, | ||
5041 | 0xfe, 0x74, 0x18, 0x1c, 0xfe, 0x00, 0xf8, 0x16, 0x6d, 0x67, 0x1b, 0x01, | ||
5042 | 0xfe, 0x44, 0x0d, 0x3b, 0x01, 0xe6, 0x1e, 0x27, 0x74, 0x67, 0x1a, 0x02, | ||
5043 | 0x6d, 0x09, 0x04, 0x0b, 0x21, 0xfe, 0x06, 0x0a, 0x09, 0x04, 0x6a, 0xfe, | ||
5044 | 0x82, 0x12, 0x09, 0x04, 0x19, 0xfe, 0x66, 0x13, 0x1e, 0x58, 0xac, 0xfc, | ||
5045 | 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, | ||
5046 | 0xfe, 0x86, 0x91, 0x63, 0x27, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x77, | ||
5047 | 0xd7, 0x05, 0x54, 0x31, 0x55, 0x0c, 0x7b, 0x18, 0x7c, 0xbe, 0x54, 0xbf, | ||
5048 | 0x55, 0x01, 0xa8, 0xad, 0x63, 0x27, 0x12, 0x58, 0xc0, 0x38, 0xc1, 0x4e, | ||
5049 | 0x79, 0x56, 0x68, 0x57, 0xf4, 0xf5, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05, | ||
5050 | 0xfa, 0x4e, 0x01, 0xa5, 0xa2, 0x23, 0x0c, 0x7b, 0x0c, 0x7c, 0x79, 0x56, | ||
5051 | 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x79, 0x39, | ||
5052 | 0x68, 0x3a, 0x09, 0x04, 0xfe, 0xf7, 0x00, 0x35, 0x05, 0x52, 0x31, 0x53, | ||
5053 | 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, | ||
5054 | 0x02, 0x6d, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x09, 0x04, 0xfe, 0xf7, 0x00, | ||
5055 | 0x35, 0xfe, 0x3a, 0x55, 0xfe, 0x19, 0x81, 0x5f, 0xfe, 0x10, 0x90, 0xfe, | ||
5056 | 0x92, 0x90, 0xfe, 0xd7, 0x10, 0x2f, 0x07, 0x9b, 0x16, 0xfe, 0xc6, 0x08, | ||
5057 | 0x11, 0x9b, 0x09, 0x04, 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a, | ||
5058 | 0x77, 0xfe, 0xc6, 0x08, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x6d, | ||
5059 | 0x23, 0x47, 0xfe, 0x19, 0x80, 0xde, 0x09, 0x04, 0x0b, 0xfe, 0x1a, 0x12, | ||
5060 | 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9, | ||
5061 | 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, | ||
5062 | 0x6c, 0x19, 0xbe, 0x39, 0xfe, 0xed, 0x19, 0xbf, 0x3a, 0xfe, 0x0c, 0x51, | ||
5063 | 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, 0x34, 0xfe, 0x74, 0x10, | ||
5064 | 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a, | ||
5065 | 0x84, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00, | ||
5066 | 0x02, 0x5a, 0xfe, 0xd1, 0xf0, 0xfe, 0xc4, 0x0a, 0x14, 0x7a, 0x01, 0x33, | ||
5067 | 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xca, | ||
5068 | 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe, | ||
5069 | 0x22, 0x00, 0x02, 0x5a, 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe, | ||
5070 | 0x24, 0x00, 0x02, 0x5a, 0xfe, 0xd0, 0xf0, 0xfe, 0xec, 0x0a, 0x0f, 0x93, | ||
5071 | 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, 0x4c, 0xfe, 0x10, 0x10, | ||
5072 | 0xfe, 0xcc, 0xf0, 0xd9, 0x61, 0x04, 0x19, 0x3b, 0x0f, 0xfe, 0x12, 0x00, | ||
5073 | 0x2a, 0x13, 0xfe, 0x4e, 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0, | ||
5074 | 0xfe, 0x20, 0x0b, 0xb1, 0x16, 0x32, 0x2a, 0x73, 0xdd, 0xb8, 0x22, 0xb9, | ||
5075 | 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, 0x32, 0x8c, 0xfe, 0x48, | ||
5076 | 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe, | ||
5077 | 0xdb, 0x10, 0x11, 0xfe, 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd, | ||
5078 | 0x7f, 0xfe, 0x89, 0xf0, 0x22, 0x30, 0x2e, 0xd8, 0xbc, 0x7d, 0xbd, 0x7f, | ||
5079 | 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, 0x45, 0x0f, 0xfe, 0x42, | ||
5080 | 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c, | ||
5081 | 0x09, 0x04, 0x0b, 0xfe, 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54, | ||
5082 | 0x12, 0x4b, 0xfe, 0x28, 0x00, 0x21, 0xfe, 0xa6, 0x0c, 0x0a, 0x40, 0x01, | ||
5083 | 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01, | ||
5084 | 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d, | ||
5085 | 0x01, 0x6f, 0x02, 0x29, 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e, | ||
5086 | 0x0b, 0xfe, 0xb4, 0x10, 0x01, 0x86, 0x3e, 0x0b, 0xfe, 0xaa, 0x10, 0x01, | ||
5087 | 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, 0x3e, 0x0b, 0x0f, 0xfe, | ||
5088 | 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01, | ||
5089 | 0xe8, 0x59, 0x11, 0x2d, 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02, | ||
5090 | 0xfe, 0x2a, 0x03, 0x09, 0x04, 0x0b, 0x84, 0x3e, 0x0b, 0x0f, 0x00, 0xfe, | ||
5091 | 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, 0x09, 0x04, 0x1b, 0xfe, | ||
5092 | 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe, | ||
5093 | 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35, | ||
5094 | 0xfe, 0xa9, 0x10, 0x0f, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0b, 0x5f, | ||
5095 | 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x0f, 0xfe, 0x47, 0x00, | ||
5096 | 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa, | ||
5097 | 0xab, 0x70, 0x05, 0x6b, 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b, | ||
5098 | 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x59, 0x01, 0xda, 0x02, 0x29, 0xea, | ||
5099 | 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, 0x00, 0x37, 0x97, 0x01, | ||
5100 | 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e, | ||
5101 | 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47, | ||
5102 | 0x4b, 0x89, 0xfe, 0x75, 0x57, 0x05, 0x51, 0xfe, 0x98, 0x56, 0xfe, 0x38, | ||
5103 | 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, 0x46, 0x09, 0x04, 0x1d, | ||
5104 | 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a, | ||
5105 | 0x99, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe, | ||
5106 | 0x2a, 0x03, 0x0a, 0x51, 0xfe, 0xee, 0x14, 0xee, 0x3e, 0x1d, 0xfe, 0xce, | ||
5107 | 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x29, 0x1e, | ||
5108 | 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12, | ||
5109 | 0xce, 0x1e, 0x2d, 0x47, 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe, | ||
5110 | 0xec, 0x0d, 0x13, 0x06, 0x12, 0x4d, 0x01, 0xfe, 0xe2, 0x15, 0x05, 0xfe, | ||
5111 | 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, 0xf0, 0x0d, 0xfe, 0x02, | ||
5112 | 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05, | ||
5113 | 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4, | ||
5114 | 0x0d, 0xfe, 0x18, 0x13, 0xaf, 0xfe, 0x02, 0xea, 0xce, 0x62, 0x7a, 0xfe, | ||
5115 | 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, 0x05, 0xfe, 0x38, 0x01, | ||
5116 | 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01, | ||
5117 | 0x0c, 0xfe, 0x62, 0x01, 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11, | ||
5118 | 0x2d, 0x8a, 0x13, 0x06, 0x03, 0x23, 0x03, 0x1e, 0x4d, 0xfe, 0xf7, 0x12, | ||
5119 | 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, 0x71, 0x13, 0xfe, 0x24, | ||
5120 | 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03, | ||
5121 | 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc, | ||
5122 | 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x23, | ||
5123 | 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x75, 0x03, 0x09, 0x04, | ||
5124 | 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13, | ||
5125 | 0xfe, 0x1e, 0x80, 0xe1, 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe, | ||
5126 | 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xa3, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, | ||
5127 | 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, 0x16, 0x2f, 0x07, 0x2d, | ||
5128 | 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01, | ||
5129 | 0xe8, 0x11, 0xfe, 0xe9, 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01, | ||
5130 | 0xfe, 0x14, 0x16, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90, | ||
5131 | 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, 0x09, 0x04, 0x4f, 0xfe, | ||
5132 | 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80, | ||
5133 | 0x40, 0x12, 0x20, 0x63, 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76, | ||
5134 | 0x20, 0x03, 0xfe, 0x08, 0x1c, 0x05, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, | ||
5135 | 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, 0xfe, 0xb0, 0x00, 0xfe, | ||
5136 | 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, | ||
5137 | 0x24, 0x69, 0x12, 0xc9, 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48, | ||
5138 | 0x5f, 0x17, 0x1d, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x21, 0xfe, 0x08, | ||
5139 | 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, 0xfe, 0x90, 0x4d, 0xfe, | ||
5140 | 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c, | ||
5141 | 0x46, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0, | ||
5142 | 0xfe, 0x32, 0x0f, 0xea, 0x70, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, | ||
5143 | 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, 0xfe, 0x07, 0xe6, 0x1d, | ||
5144 | 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46, | ||
5145 | 0xfa, 0xef, 0xfe, 0x42, 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a, | ||
5146 | 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x36, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01, | ||
5147 | 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, | ||
5148 | 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e, | ||
5149 | 0x10, 0x07, 0x7e, 0x45, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03, | ||
5150 | 0xfe, 0x44, 0x58, 0x74, 0xfe, 0x01, 0xec, 0x97, 0xfe, 0x9e, 0x40, 0xfe, | ||
5151 | 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, 0x27, 0x01, 0xda, 0xfe, | ||
5152 | 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b, | ||
5153 | 0xfe, 0x48, 0x12, 0x07, 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30, | ||
5154 | 0x12, 0x07, 0xc2, 0x16, 0xfe, 0x3e, 0x11, 0x07, 0xfe, 0x23, 0x00, 0x16, | ||
5155 | 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, 0x11, 0x07, 0x19, 0xfe, | ||
5156 | 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b, | ||
5157 | 0x01, 0x08, 0x8c, 0x43, 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01, | ||
5158 | 0xfe, 0x32, 0x0e, 0x11, 0x7e, 0x02, 0x29, 0x2b, 0x2f, 0x07, 0x9b, 0xfe, | ||
5159 | 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, 0xfc, 0x10, 0x09, 0x04, | ||
5160 | 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe, | ||
5161 | 0xc6, 0x10, 0x1e, 0x58, 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77, | ||
5162 | 0xfe, 0x82, 0x0c, 0x0c, 0x54, 0x18, 0x55, 0x23, 0x0c, 0x7b, 0x0c, 0x7c, | ||
5163 | 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, 0xa5, 0xc0, 0x38, 0xc1, | ||
5164 | 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe, | ||
5165 | 0x05, 0xfa, 0x4e, 0xfe, 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40, | ||
5166 | 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x56, 0x18, 0x57, 0x83, 0xc0, 0x38, 0xc1, | ||
5167 | 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x00, 0x56, 0xfe, 0xa1, | ||
5168 | 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e, | ||
5169 | 0x58, 0xfe, 0x1f, 0x40, 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe, | ||
5170 | 0xae, 0x50, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x44, 0x50, 0xfe, 0xc6, 0x50, | ||
5171 | 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x05, 0x39, | ||
5172 | 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06, | ||
5173 | 0x12, 0xcd, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5, | ||
5174 | 0x07, 0x06, 0x21, 0x44, 0x2f, 0x07, 0x9b, 0x21, 0x5b, 0x01, 0x6e, 0x1c, | ||
5175 | 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, 0x39, 0x68, 0x3a, 0xfe, | ||
5176 | 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c, | ||
5177 | 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19, | ||
5178 | 0x41, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, | ||
5179 | 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, 0x3b, 0x02, 0x44, 0x01, | ||
5180 | 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44, | ||
5181 | 0x01, 0x08, 0x1f, 0xa2, 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, | ||
5182 | 0x60, 0x05, 0xfe, 0x9c, 0x00, 0x28, 0x84, 0x49, 0x04, 0x19, 0x34, 0x9f, | ||
5183 | 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, 0x78, 0x3d, 0xfe, 0xda, | ||
5184 | 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1, | ||
5185 | 0x05, 0xc6, 0x28, 0x84, 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe, | ||
5186 | 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, 0x05, 0x50, 0xb4, 0x0c, | ||
5187 | 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, 0xaa, 0x14, 0x02, | ||
5188 | 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06, | ||
5189 | 0x21, 0x44, 0x01, 0xfe, 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14, | ||
5190 | 0xfe, 0xa4, 0x14, 0x87, 0xfe, 0x4a, 0xf4, 0x0b, 0x16, 0x44, 0xfe, 0x4a, | ||
5191 | 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, 0x85, 0x02, 0x5b, 0x05, | ||
5192 | 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, | ||
5193 | 0xd8, 0x14, 0x02, 0x5c, 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe, | ||
5194 | 0xe0, 0x12, 0x72, 0xf1, 0x01, 0x08, 0x23, 0x72, 0x03, 0x8f, 0xfe, 0xdc, | ||
5195 | 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, 0x12, 0x5e, 0x2b, 0x01, | ||
5196 | 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, | ||
5197 | 0x1c, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, | ||
5198 | 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0x3d, 0xfe, 0x30, 0x56, | ||
5199 | 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, | ||
5200 | 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58, | ||
5201 | 0x03, 0x0a, 0x50, 0x01, 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c, | ||
5202 | 0x10, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x19, 0x48, 0xfe, 0x00, | ||
5203 | 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x63, 0x27, | ||
5204 | 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08, | ||
5205 | 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01, | ||
5206 | 0xfe, 0x14, 0x18, 0xfe, 0x42, 0x48, 0x5f, 0x60, 0x89, 0x01, 0x08, 0x1f, | ||
5207 | 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14, | ||
5208 | 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe, | ||
5209 | 0xcc, 0x12, 0x49, 0x04, 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2, | ||
5210 | 0x4b, 0xc3, 0x64, 0xfe, 0xe8, 0x13, 0x3b, 0x13, 0x06, 0x17, 0xc3, 0x78, | ||
5211 | 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xa1, 0xff, 0x02, 0x83, | ||
5212 | 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c, | ||
5213 | 0x13, 0x06, 0xfe, 0x56, 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00, | ||
5214 | 0x8e, 0xe4, 0x0a, 0xfe, 0x64, 0x00, 0x17, 0x93, 0x13, 0x06, 0xfe, 0x28, | ||
5215 | 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, 0xc8, 0x00, 0x8e, 0xe4, | ||
5216 | 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90, | ||
5217 | 0x01, 0xba, 0xfe, 0x4e, 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4, | ||
5218 | 0x94, 0xfe, 0x56, 0xf0, 0xfe, 0x60, 0x14, 0xfe, 0x04, 0xf4, 0x6c, 0xfe, | ||
5219 | 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, 0xfe, 0x22, 0x13, 0x1c, | ||
5220 | 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba, | ||
5221 | 0xfe, 0x9c, 0x14, 0xb7, 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, | ||
5222 | 0x4d, 0xe4, 0x19, 0xba, 0xfe, 0x9c, 0x14, 0xb7, 0x19, 0x83, 0x60, 0x23, | ||
5223 | 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, 0xfe, 0xb4, 0x56, 0xfe, | ||
5224 | 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26, | ||
5225 | 0xe5, 0x15, 0x0b, 0x01, 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26, | ||
5226 | 0xe5, 0x72, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x03, 0x15, 0x06, 0x01, 0x08, | ||
5227 | 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x06, 0x01, 0x08, | ||
5228 | 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89, | ||
5229 | 0x4a, 0x01, 0x08, 0x03, 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44, | ||
5230 | 0x13, 0xad, 0x12, 0xcc, 0xfe, 0x49, 0xf4, 0x00, 0x3b, 0x72, 0x9f, 0x5e, | ||
5231 | 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, 0x08, 0x2f, 0x07, 0xfe, | ||
5232 | 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd, | ||
5233 | 0x01, 0x43, 0x1e, 0xcd, 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03, | ||
5234 | 0x0a, 0x42, 0x01, 0x0e, 0xed, 0x88, 0x07, 0x10, 0xa4, 0x0a, 0x80, 0x01, | ||
5235 | 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x80, 0x01, 0x0e, 0x88, | ||
5236 | 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3, | ||
5237 | 0x88, 0x03, 0x0a, 0x42, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, | ||
5238 | 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x80, 0x80, 0xf2, 0xfe, 0x49, 0xe4, 0x10, | ||
5239 | 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, 0x01, 0x82, 0x03, 0x17, | ||
5240 | 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, | ||
5241 | 0xfe, 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01, | ||
5242 | 0xfe, 0xfc, 0x16, 0xe0, 0x91, 0x1d, 0x66, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, | ||
5243 | 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, 0xda, 0x10, 0x17, 0x10, | ||
5244 | 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58, | ||
5245 | 0x05, 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90, | ||
5246 | 0xfe, 0x30, 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x66, 0xfe, 0x38, 0x00, 0xfe, | ||
5247 | 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, 0x40, 0x16, 0xfe, 0xb6, | ||
5248 | 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17, | ||
5249 | 0x10, 0x71, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, | ||
5250 | 0x1d, 0xf7, 0x38, 0x90, 0xfe, 0x62, 0x16, 0xfe, 0x94, 0x14, 0xfe, 0x10, | ||
5251 | 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, | ||
5252 | 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71, | ||
5253 | 0xfe, 0x30, 0xbc, 0xfe, 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f, | ||
5254 | 0x79, 0xfe, 0x1c, 0xf7, 0xc5, 0x90, 0xfe, 0x9a, 0x16, 0xfe, 0x5c, 0x14, | ||
5255 | 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, 0x42, 0x10, 0xfe, 0x02, | ||
5256 | 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc, | ||
5257 | 0xfe, 0x1d, 0xf7, 0x4f, 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe, | ||
5258 | 0x1c, 0x13, 0x91, 0x4f, 0x47, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, | ||
5259 | 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, 0xfe, 0xdd, 0x00, 0x63, | ||
5260 | 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14, | ||
5261 | 0x06, 0x37, 0x95, 0xa9, 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17, | ||
5262 | 0x23, 0x03, 0xfe, 0x7e, 0x18, 0x1c, 0x1a, 0x5d, 0x13, 0x0d, 0x03, 0x71, | ||
5263 | 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x78, 0x2c, | ||
5264 | 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42, | ||
5265 | 0x13, 0x3c, 0x8a, 0x0a, 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, | ||
5266 | 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, | ||
5267 | 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x01, 0x6f, | ||
5268 | 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, | ||
5269 | 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, | ||
5270 | 0xe7, 0x0b, 0x0f, 0xfe, 0x15, 0x00, 0x59, 0x76, 0x27, 0x01, 0xda, 0x17, | ||
5271 | 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, 0x11, 0x2d, 0x01, 0x6f, | ||
5272 | 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68, | ||
5273 | 0xc8, 0xfe, 0x48, 0x55, 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, | ||
5274 | 0x12, 0x98, 0x03, 0x0a, 0x99, 0x01, 0x0e, 0xf0, 0x0a, 0x40, 0x01, 0x0e, | ||
5275 | 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, 0x75, 0x03, 0x0a, 0x42, | ||
5276 | 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01, | ||
5277 | 0x0e, 0x73, 0x75, 0x03, 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, | ||
5278 | 0x05, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0x5b, 0xfe, 0x4e, 0xe4, 0xc2, | ||
5279 | 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1b, | ||
5280 | 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05, | ||
5281 | 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, | ||
5282 | 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x2c, 0xfe, 0x4e, 0x45, 0xfe, 0x0c, 0x12, | ||
5283 | 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, 0x03, 0x07, 0x7a, 0xfe, | ||
5284 | 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, | ||
5285 | 0x07, 0x1b, 0xfe, 0x5a, 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, | ||
5286 | 0x10, 0x07, 0x1a, 0x5d, 0x24, 0x2c, 0xdc, 0x07, 0x0b, 0x5d, 0x24, 0x93, | ||
5287 | 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, 0x9f, 0xad, 0x03, 0x14, | ||
5288 | 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9, | ||
5289 | 0x03, 0x25, 0xfe, 0xca, 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, | ||
5290 | 0x18, 0x03, 0xff, 0x1a, 0x00, 0x00, | ||
5291 | }; | ||
5292 | |||
5293 | static unsigned short _adv_asc3550_size = sizeof(_adv_asc3550_buf); /* 0x13AD */ | ||
5294 | static ADV_DCNT _adv_asc3550_chksum = 0x04D52DDDUL; /* Expanded little-endian checksum. */ | ||
5295 | |||
5296 | /* Microcode buffer is kept after initialization for error recovery. */ | ||
5297 | static unsigned char _adv_asc38C0800_buf[] = { | ||
5298 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4, | ||
5299 | 0x01, 0x00, 0x48, 0xe4, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, | ||
5300 | 0x00, 0xfa, 0xff, 0xff, 0x1c, 0x0f, 0x00, 0xf6, 0x9e, 0xe7, 0xff, 0x00, | ||
5301 | 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, | ||
5302 | 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0, | ||
5303 | 0x18, 0xf4, 0x08, 0x00, 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, | ||
5304 | 0x82, 0x0d, 0x00, 0xe6, 0x86, 0xf0, 0xb1, 0xf0, 0x98, 0x57, 0x01, 0xfc, | ||
5305 | 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x3c, 0x00, 0xbb, 0x00, | ||
5306 | 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13, | ||
5307 | 0xba, 0x13, 0x18, 0x40, 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, | ||
5308 | 0x3e, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x74, 0x01, 0x76, 0x01, 0xb9, 0x54, | ||
5309 | 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01, | ||
5310 | 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12, | ||
5311 | 0x08, 0x12, 0x02, 0x4a, 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, | ||
5312 | 0x30, 0xe4, 0x4b, 0xe4, 0x5d, 0xf0, 0x02, 0xfa, 0x20, 0x00, 0x32, 0x00, | ||
5313 | 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, | ||
5314 | 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d, | ||
5315 | 0x06, 0x13, 0x4c, 0x1c, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, | ||
5316 | 0x03, 0xf7, 0x0c, 0x00, 0x0f, 0x00, 0x47, 0x00, 0xbe, 0x00, 0x00, 0x01, | ||
5317 | 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, | ||
5318 | 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa, | ||
5319 | 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, | ||
5320 | 0x4e, 0x01, 0x4a, 0x0b, 0x42, 0x0c, 0x12, 0x0f, 0x0c, 0x10, 0x22, 0x11, | ||
5321 | 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, 0x00, 0x4e, 0x42, 0x54, | ||
5322 | 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, | ||
5323 | 0x59, 0xf0, 0xb8, 0xf0, 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, | ||
5324 | 0x05, 0xfc, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, 0xa4, 0x00, | ||
5325 | 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xe2, 0x03, | ||
5326 | 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13, | ||
5327 | 0x12, 0x13, 0x24, 0x14, 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, | ||
5328 | 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, | ||
5329 | 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x3a, 0x55, 0x83, 0x55, | ||
5330 | 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, | ||
5331 | 0x0c, 0xf0, 0x04, 0xf8, 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, | ||
5332 | 0x1e, 0x00, 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, | ||
5333 | 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, 0xc4, 0x01, 0xc6, 0x01, | ||
5334 | 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08, | ||
5335 | 0x68, 0x08, 0x69, 0x08, 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, | ||
5336 | 0x12, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, 0x2a, 0x11, 0x06, 0x12, | ||
5337 | 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x46, 0x14, | ||
5338 | 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18, | ||
5339 | 0xca, 0x18, 0xe6, 0x19, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, | ||
5340 | 0x0e, 0x47, 0xfe, 0x9c, 0xf0, 0x2b, 0x02, 0xfe, 0xac, 0x0d, 0xff, 0x10, | ||
5341 | 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, 0xfe, 0x84, 0x01, 0xff, | ||
5342 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
5343 | 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, | ||
5344 | 0x00, 0x11, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08, | ||
5345 | 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x11, | ||
5346 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
5347 | 0xfe, 0x04, 0xf7, 0xd6, 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, | ||
5348 | 0x04, 0xf7, 0xd6, 0x99, 0x0a, 0x42, 0x2c, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, | ||
5349 | 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, | ||
5350 | 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d, | ||
5351 | 0x02, 0xfe, 0xc8, 0x0d, 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, | ||
5352 | 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd3, 0x12, | ||
5353 | 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, 0xf0, 0xfe, 0x8a, 0x02, | ||
5354 | 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02, | ||
5355 | 0xfe, 0x46, 0xf0, 0xfe, 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, | ||
5356 | 0xfe, 0x43, 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x4c, 0x02, | ||
5357 | 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, 0xaa, 0x18, 0x06, 0x14, | ||
5358 | 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe, | ||
5359 | 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, | ||
5360 | 0xfe, 0x06, 0xfc, 0xce, 0x09, 0x70, 0x01, 0xa8, 0x02, 0x2b, 0x15, 0x59, | ||
5361 | 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xbd, | ||
5362 | 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, | ||
5363 | 0x58, 0x1c, 0x18, 0x06, 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, | ||
5364 | 0xfe, 0x06, 0x02, 0x23, 0xfe, 0x98, 0x02, 0xfe, 0x5a, 0x1c, 0xf8, 0xfe, | ||
5365 | 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, | ||
5366 | 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe, | ||
5367 | 0x69, 0x10, 0x18, 0x06, 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, | ||
5368 | 0x13, 0x20, 0xfe, 0x05, 0xf6, 0xce, 0x01, 0xfe, 0x4a, 0x17, 0x08, 0x54, | ||
5369 | 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, | ||
5370 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10, | ||
5371 | 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, | ||
5372 | 0x10, 0x03, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, 0x2c, 0x4f, 0xfe, 0x02, | ||
5373 | 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, | ||
5374 | 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7, | ||
5375 | 0xfe, 0x40, 0x1c, 0x1c, 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, | ||
5376 | 0xa0, 0xf0, 0xfe, 0x48, 0x03, 0xfe, 0x11, 0xf0, 0xa7, 0xfe, 0xef, 0x10, | ||
5377 | 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, 0xfe, 0x11, 0x00, 0x02, | ||
5378 | 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13, | ||
5379 | 0x21, 0x22, 0xa3, 0xb7, 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, | ||
5380 | 0x01, 0xfe, 0xb4, 0x16, 0x12, 0xd1, 0x1c, 0xd9, 0xfe, 0x01, 0xf0, 0xd9, | ||
5381 | 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, 0xfe, 0xe4, 0x00, 0x27, | ||
5382 | 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe, | ||
5383 | 0x06, 0xf0, 0xfe, 0xc8, 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, | ||
5384 | 0x06, 0x02, 0x24, 0x03, 0x70, 0x28, 0x17, 0xfe, 0xfa, 0x04, 0x15, 0x6d, | ||
5385 | 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, 0xf9, 0x2c, 0x99, 0x19, | ||
5386 | 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, | ||
5387 | 0x74, 0x01, 0xaf, 0x8c, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, | ||
5388 | 0x09, 0xd1, 0x01, 0x0e, 0x8d, 0x51, 0x64, 0x79, 0x2a, 0x03, 0x70, 0x28, | ||
5389 | 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, | ||
5390 | 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d, | ||
5391 | 0xfe, 0x3c, 0x04, 0x3b, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, | ||
5392 | 0x12, 0x2d, 0xff, 0x02, 0x00, 0x10, 0x01, 0x0b, 0x1d, 0xfe, 0xe4, 0x04, | ||
5393 | 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, 0xfe, 0x4c, 0x44, 0xfe, | ||
5394 | 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, | ||
5395 | 0xda, 0x4f, 0x79, 0x2a, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, | ||
5396 | 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x2a, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x52, | ||
5397 | 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0xfe, | ||
5398 | 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe, | ||
5399 | 0x08, 0x13, 0x32, 0x07, 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, | ||
5400 | 0x1c, 0x12, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, | ||
5401 | 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x2d, 0x12, 0xfe, 0xe6, | ||
5402 | 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36, | ||
5403 | 0x02, 0x2b, 0xfe, 0x42, 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, | ||
5404 | 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4, 0x5b, 0x08, | ||
5405 | 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x19, 0xfe, 0x7c, | ||
5406 | 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28, | ||
5407 | 0x17, 0xfe, 0x90, 0x05, 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, | ||
5408 | 0x56, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x28, 0xfe, 0x4e, 0x12, 0x67, 0xff, | ||
5409 | 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, 0x34, 0xfe, 0x89, 0x48, | ||
5410 | 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05, | ||
5411 | 0x12, 0xfe, 0xe3, 0x00, 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, | ||
5412 | 0xfe, 0x49, 0xf0, 0xfe, 0x70, 0x05, 0x88, 0x25, 0xfe, 0x21, 0x00, 0xab, | ||
5413 | 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, 0x09, 0x48, 0xff, 0x02, | ||
5414 | 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2, | ||
5415 | 0x08, 0x53, 0x05, 0xcb, 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, | ||
5416 | 0xfe, 0x27, 0x01, 0x08, 0x05, 0x1b, 0xfe, 0x22, 0x12, 0x41, 0x01, 0xb2, | ||
5417 | 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, | ||
5418 | 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb, | ||
5419 | 0x03, 0x5c, 0x28, 0xfe, 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, | ||
5420 | 0x06, 0x09, 0x06, 0x53, 0x05, 0x1f, 0xfe, 0x02, 0x12, 0x50, 0x01, 0xfe, | ||
5421 | 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe, | ||
5422 | 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62, | ||
5423 | 0x12, 0x03, 0x45, 0x28, 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01, | ||
5424 | 0xfe, 0x76, 0x19, 0xfe, 0x43, 0x48, 0xc4, 0xcc, 0x0f, 0x71, 0xff, 0x02, | ||
5425 | 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, 0x6e, 0x41, 0x01, 0xb2, | ||
5426 | 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01, | ||
5427 | 0xfe, 0xcc, 0x15, 0x1d, 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, | ||
5428 | 0xfe, 0xe5, 0x00, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x18, 0x06, 0x01, 0xb2, | ||
5429 | 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, 0xe2, 0x00, 0x27, 0xdb, | ||
5430 | 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07, | ||
5431 | 0xfe, 0x06, 0xf0, 0xfe, 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05, | ||
5432 | 0x0a, 0xfe, 0x2e, 0x12, 0x16, 0x19, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, | ||
5433 | 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0xfe, 0x99, 0xa4, 0x01, | ||
5434 | 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38, | ||
5435 | 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01, | ||
5436 | 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, | ||
5437 | 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, 0xe2, 0x6c, 0x58, 0xbe, | ||
5438 | 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b, | ||
5439 | 0xfe, 0x09, 0x6f, 0xba, 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d, | ||
5440 | 0x8b, 0x6c, 0x7f, 0x27, 0xfe, 0x54, 0x07, 0x1c, 0x34, 0xfe, 0x0a, 0xf0, | ||
5441 | 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, 0x07, 0x02, 0x24, 0x01, | ||
5442 | 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe, | ||
5443 | 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14, | ||
5444 | 0x61, 0x08, 0x54, 0x5a, 0x37, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x0e, 0x12, | ||
5445 | 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, 0xfe, 0x06, 0x10, 0xfe, | ||
5446 | 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b, | ||
5447 | 0x37, 0x01, 0xb3, 0xb8, 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe, | ||
5448 | 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0x88, | ||
5449 | 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x0c, | ||
5450 | 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d, | ||
5451 | 0x14, 0x3e, 0xfe, 0x4a, 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe, | ||
5452 | 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x05, 0x5b, | ||
5453 | 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, 0xfe, 0x44, 0x90, 0xfe, | ||
5454 | 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, | ||
5455 | 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d, | ||
5456 | 0x14, 0x3e, 0x0c, 0x2e, 0x14, 0x3c, 0x21, 0x0c, 0x49, 0x0c, 0x63, 0x08, | ||
5457 | 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27, 0xdd, 0xfe, 0x9e, | ||
5458 | 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe, | ||
5459 | 0x9a, 0x08, 0xc6, 0xfe, 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06, | ||
5460 | 0xf0, 0xfe, 0x94, 0x08, 0x95, 0x86, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xc9, | ||
5461 | 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, 0x06, 0xfe, 0x10, 0x12, | ||
5462 | 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e, | ||
5463 | 0x1c, 0x02, 0xfe, 0x18, 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a, | ||
5464 | 0xfe, 0x7a, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0xd2, 0x09, | ||
5465 | 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, 0xde, 0x09, 0xfe, 0xb7, | ||
5466 | 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18, | ||
5467 | 0xfe, 0xf1, 0x18, 0xfe, 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58, | ||
5468 | 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x1c, 0x85, 0xfe, | ||
5469 | 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, 0xfe, 0xf0, 0x08, 0xb5, | ||
5470 | 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18, | ||
5471 | 0x0b, 0xb6, 0xfe, 0xbf, 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe, | ||
5472 | 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xc2, 0xfe, 0xd2, 0xf0, 0x85, 0xfe, 0x76, | ||
5473 | 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, 0x06, 0x17, 0x85, 0xc5, | ||
5474 | 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15, | ||
5475 | 0x9d, 0x01, 0x36, 0x10, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10, | ||
5476 | 0x80, 0x02, 0x65, 0xfe, 0x98, 0x80, 0xfe, 0x19, 0xe4, 0x0a, 0xfe, 0x1a, | ||
5477 | 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, 0xfe, 0x44, 0x54, 0xbe, | ||
5478 | 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08, | ||
5479 | 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f, | ||
5480 | 0x14, 0x40, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x6c, 0x18, 0xfe, 0xed, 0x18, | ||
5481 | 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, 0x3b, 0x40, 0x03, 0x49, | ||
5482 | 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18, | ||
5483 | 0x8f, 0xfe, 0xe3, 0x54, 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a, | ||
5484 | 0xfe, 0x37, 0xf0, 0xfe, 0xda, 0x09, 0xfe, 0x8b, 0xf0, 0xfe, 0x60, 0x09, | ||
5485 | 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, 0x0a, 0x3a, 0x49, 0x3b, | ||
5486 | 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00, | ||
5487 | 0xad, 0xfe, 0x01, 0x59, 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a, | ||
5488 | 0xfe, 0x24, 0x0a, 0x3a, 0x49, 0x8f, 0xfe, 0xe3, 0x54, 0x57, 0x49, 0x7d, | ||
5489 | 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, 0x4a, 0x3a, 0x49, 0x3b, | ||
5490 | 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63, | ||
5491 | 0x02, 0x4a, 0x08, 0x05, 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe, | ||
5492 | 0x66, 0x13, 0x22, 0x62, 0xb7, 0xfe, 0x03, 0xa1, 0xfe, 0x83, 0x80, 0xfe, | ||
5493 | 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x6a, | ||
5494 | 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29, | ||
5495 | 0x61, 0x0c, 0x7f, 0x14, 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8, | ||
5496 | 0x6a, 0x2a, 0x13, 0x62, 0x9b, 0x2e, 0x9c, 0x3c, 0x3a, 0x3f, 0x3b, 0x40, | ||
5497 | 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0x01, 0xef, | ||
5498 | 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40, | ||
5499 | 0xe4, 0x08, 0x05, 0x1f, 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05, | ||
5500 | 0xfe, 0xf7, 0x00, 0x37, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x10, 0x58, 0xfe, | ||
5501 | 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, 0xf4, 0x09, 0x08, 0x05, | ||
5502 | 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19, | ||
5503 | 0x81, 0x50, 0xfe, 0x10, 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32, | ||
5504 | 0x07, 0xa6, 0x17, 0xfe, 0x08, 0x09, 0x12, 0xa6, 0x08, 0x05, 0x0a, 0xfe, | ||
5505 | 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, 0x08, 0x09, 0xfe, 0x0c, | ||
5506 | 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7, | ||
5507 | 0x08, 0x05, 0x0a, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, | ||
5508 | 0xf4, 0xc2, 0xfe, 0xd1, 0xf0, 0xe2, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, | ||
5509 | 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0x57, 0x3d, 0xfe, 0xed, | ||
5510 | 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe, | ||
5511 | 0x00, 0xff, 0x35, 0xfe, 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6, | ||
5512 | 0x0b, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x8a, 0x03, 0xd2, 0x1e, 0x06, 0xfe, | ||
5513 | 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, 0xfe, 0xd1, 0xf0, 0xfe, | ||
5514 | 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42, | ||
5515 | 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, | ||
5516 | 0xf0, 0xfe, 0xca, 0x0b, 0x10, 0xfe, 0x22, 0x00, 0x02, 0x65, 0xfe, 0xcb, | ||
5517 | 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, 0x02, 0x65, 0xfe, 0xd0, | ||
5518 | 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea, | ||
5519 | 0x0b, 0x10, 0x58, 0xfe, 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05, | ||
5520 | 0x1f, 0x4d, 0x10, 0xfe, 0x12, 0x00, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27, | ||
5521 | 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, 0x0c, 0xbc, 0x17, 0x34, | ||
5522 | 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20, | ||
5523 | 0x0c, 0x1c, 0x34, 0x94, 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6, | ||
5524 | 0xdc, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xdb, 0x10, 0x12, 0xfe, 0xe8, 0x00, | ||
5525 | 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, 0x89, 0xf0, 0x24, 0x33, | ||
5526 | 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24, | ||
5527 | 0x33, 0x31, 0xdf, 0xbc, 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c, | ||
5528 | 0x06, 0xfe, 0x81, 0x49, 0x17, 0xfe, 0x2c, 0x0d, 0x08, 0x05, 0x0a, 0xfe, | ||
5529 | 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, 0x12, 0x55, 0xfe, 0x28, | ||
5530 | 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, | ||
5531 | 0x44, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09, | ||
5532 | 0xa4, 0x01, 0xfe, 0x26, 0x0f, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x02, 0x2b, | ||
5533 | 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, 0x0a, 0xfe, 0xb4, 0x10, | ||
5534 | 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82, | ||
5535 | 0xfe, 0x34, 0x46, 0xac, 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96, | ||
5536 | 0x10, 0x08, 0x54, 0x0a, 0x37, 0x01, 0xf5, 0x01, 0xf6, 0x64, 0x12, 0x2f, | ||
5537 | 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, 0xfe, 0x2e, 0x03, 0x08, | ||
5538 | 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05, | ||
5539 | 0x1a, 0xfe, 0x58, 0x12, 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c, | ||
5540 | 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x50, 0x0d, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, | ||
5541 | 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, 0xfe, 0xa9, 0x10, 0x10, | ||
5542 | 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10, | ||
5543 | 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41, | ||
5544 | 0x00, 0xaa, 0x10, 0xfe, 0x24, 0x00, 0x8c, 0xb5, 0xb6, 0x74, 0x03, 0x70, | ||
5545 | 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, 0xfe, 0x9d, 0x41, 0xfe, | ||
5546 | 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0, | ||
5547 | 0xb4, 0x15, 0xfe, 0x31, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02, | ||
5548 | 0xd7, 0x42, 0xfe, 0x06, 0xec, 0xd0, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, | ||
5549 | 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, 0x4b, 0x91, 0xfe, 0x75, | ||
5550 | 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01, | ||
5551 | 0x0e, 0xfe, 0x44, 0x48, 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09, | ||
5552 | 0x46, 0x01, 0x0e, 0x41, 0xfe, 0x41, 0x58, 0x09, 0xa4, 0x01, 0x0e, 0xfe, | ||
5553 | 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, 0x2e, 0x03, 0x09, 0x5d, | ||
5554 | 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, | ||
5555 | 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe, | ||
5556 | 0x9e, 0x12, 0x21, 0x13, 0x59, 0x13, 0x9f, 0x13, 0xd5, 0x22, 0x2f, 0x41, | ||
5557 | 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, 0xe0, 0x0e, 0x0f, 0x06, | ||
5558 | 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe, | ||
5559 | 0x3a, 0x01, 0x56, 0xfe, 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00, | ||
5560 | 0x66, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, | ||
5561 | 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, 0x48, 0xf4, 0x0d, 0xfe, | ||
5562 | 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13, | ||
5563 | 0x15, 0x1a, 0x39, 0xa0, 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01, | ||
5564 | 0x1e, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x03, 0xfe, 0x3a, 0x01, | ||
5565 | 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, 0x06, 0x13, 0x2f, 0x12, | ||
5566 | 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12, | ||
5567 | 0x22, 0x9f, 0xb7, 0x13, 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24, | ||
5568 | 0x1c, 0x15, 0x19, 0x39, 0xa0, 0xb4, 0xfe, 0xd9, 0x10, 0xc3, 0xfe, 0x03, | ||
5569 | 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xc3, 0xfe, 0x03, 0xdc, | ||
5570 | 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21, | ||
5571 | 0xfe, 0x00, 0xcc, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05, | ||
5572 | 0x58, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13, | ||
5573 | 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, 0xfe, 0x0c, 0x90, 0xfe, | ||
5574 | 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, | ||
5575 | 0x0a, 0xfe, 0x3c, 0x50, 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f, | ||
5576 | 0xad, 0x01, 0xfe, 0xb4, 0x16, 0x08, 0x05, 0x1b, 0x4e, 0x01, 0xf5, 0x01, | ||
5577 | 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, 0xfe, 0x2c, 0x13, 0x01, | ||
5578 | 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90, | ||
5579 | 0x0c, 0xfe, 0x64, 0x01, 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe, | ||
5580 | 0x12, 0x12, 0xfe, 0x03, 0x80, 0x8d, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80, | ||
5581 | 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, 0x22, 0x20, 0xfb, 0x79, | ||
5582 | 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, | ||
5583 | 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, | ||
5584 | 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, | ||
5585 | 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, 0x45, 0x0f, 0x46, 0x52, | ||
5586 | 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc, | ||
5587 | 0x0f, 0x44, 0x11, 0x0f, 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe, | ||
5588 | 0x91, 0x54, 0x23, 0xe4, 0x25, 0x11, 0x13, 0x20, 0x7c, 0x6f, 0x4f, 0x22, | ||
5589 | 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, | ||
5590 | 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, | ||
5591 | 0x18, 0x1c, 0x04, 0x42, 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b, | ||
5592 | 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x04, 0x01, 0xb0, 0x7c, 0x6f, 0x4f, | ||
5593 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0x32, 0x07, 0x2f, | ||
5594 | 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe, | ||
5595 | 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, | ||
5596 | 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe, | ||
5597 | 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, 0x82, 0x4e, 0xfe, 0x14, | ||
5598 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d, | ||
5599 | 0xfe, 0x01, 0xec, 0xa2, 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, | ||
5600 | 0x9c, 0xe7, 0x1a, 0x79, 0x2a, 0x01, 0xe3, 0xfe, 0xdd, 0x10, 0x2c, 0xc7, | ||
5601 | 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, 0xfe, 0x48, 0x12, 0x07, | ||
5602 | 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17, | ||
5603 | 0xfe, 0x32, 0x12, 0x07, 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17, | ||
5604 | 0xfe, 0x9c, 0x12, 0x07, 0x1f, 0xfe, 0x12, 0x12, 0x07, 0x00, 0x17, 0x24, | ||
5605 | 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, 0x94, 0x4b, 0x04, 0x2d, | ||
5606 | 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d, | ||
5607 | 0x32, 0x07, 0xa6, 0xfe, 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe, | ||
5608 | 0xf0, 0x11, 0x08, 0x05, 0x5a, 0xfe, 0x72, 0x12, 0x9b, 0x2e, 0x9c, 0x3c, | ||
5609 | 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, 0xfe, 0x26, 0x13, 0x03, | ||
5610 | 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21, | ||
5611 | 0x0c, 0x7f, 0x0c, 0x80, 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01, | ||
5612 | 0xef, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, | ||
5613 | 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, 0x91, 0x10, 0x03, 0x3f, | ||
5614 | 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40, | ||
5615 | 0x88, 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe, | ||
5616 | 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x0c, 0x5e, 0x14, 0x5f, 0x08, 0x05, 0x5a, | ||
5617 | 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, 0x03, 0x60, 0x29, 0x61, | ||
5618 | 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44, | ||
5619 | 0x50, 0xfe, 0xc6, 0x50, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe, | ||
5620 | 0x8a, 0x50, 0x03, 0x3d, 0x29, 0x3e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, | ||
5621 | 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1d, | ||
5622 | 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23, | ||
5623 | 0x72, 0x01, 0xaf, 0x1e, 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a, | ||
5624 | 0x3d, 0x3b, 0x3e, 0xfe, 0x0a, 0x55, 0x35, 0xfe, 0x8b, 0x55, 0x57, 0x3d, | ||
5625 | 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x72, 0xfe, 0x19, | ||
5626 | 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34, | ||
5627 | 0x1d, 0xe8, 0x33, 0x31, 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a, | ||
5628 | 0x4d, 0x02, 0x4c, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0xe8, 0x33, 0x31, 0xdf, | ||
5629 | 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, 0x33, 0x31, 0xfe, 0xe8, | ||
5630 | 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53, | ||
5631 | 0x05, 0x1f, 0x35, 0xa9, 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06, | ||
5632 | 0x7c, 0x43, 0xfe, 0xda, 0x14, 0x01, 0xaf, 0x8c, 0xfe, 0x4b, 0x45, 0xee, | ||
5633 | 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, 0x03, 0x45, 0x28, 0x35, | ||
5634 | 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, | ||
5635 | 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, | ||
5636 | 0xfe, 0x9e, 0x15, 0x02, 0x89, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0x4c, 0x33, | ||
5637 | 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, 0xfe, 0x42, 0x58, 0xf1, | ||
5638 | 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a, | ||
5639 | 0xf4, 0x06, 0xea, 0x32, 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1, | ||
5640 | 0x0c, 0x45, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0xcc, 0x15, | ||
5641 | 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, 0x26, 0xfe, 0xd4, 0x13, | ||
5642 | 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0, | ||
5643 | 0x13, 0x1c, 0xfe, 0xd0, 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01, | ||
5644 | 0x0b, 0xfe, 0xd5, 0x10, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, | ||
5645 | 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x04, 0x0f, | ||
5646 | 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56, | ||
5647 | 0xfe, 0x00, 0x5c, 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, | ||
5648 | 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0xfe, 0x0b, 0x58, | ||
5649 | 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, 0x87, 0x04, 0xfe, 0x03, | ||
5650 | 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52, | ||
5651 | 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, | ||
5652 | 0x6a, 0x2a, 0x0c, 0x5e, 0x14, 0x5f, 0x57, 0x3f, 0x7d, 0x40, 0x04, 0xdd, | ||
5653 | 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x8d, 0x04, 0x01, | ||
5654 | 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d, | ||
5655 | 0xfe, 0x96, 0x15, 0x33, 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, | ||
5656 | 0x33, 0x31, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0xcd, 0x28, 0xfe, | ||
5657 | 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, 0x21, 0x69, 0x1a, 0xee, | ||
5658 | 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c, | ||
5659 | 0x30, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83, | ||
5660 | 0x55, 0x69, 0x19, 0xae, 0x98, 0xfe, 0x30, 0x00, 0x96, 0xf2, 0x18, 0x6d, | ||
5661 | 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, 0x98, 0xfe, 0x64, 0x00, | ||
5662 | 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28, | ||
5663 | 0x10, 0x69, 0x06, 0xfe, 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2, | ||
5664 | 0x09, 0xfe, 0xc8, 0x00, 0x18, 0x59, 0x0f, 0x06, 0x88, 0x98, 0xfe, 0x90, | ||
5665 | 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, 0x43, 0xf4, 0x9f, 0xfe, | ||
5666 | 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4, | ||
5667 | 0x9e, 0xfe, 0xf3, 0x10, 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e, | ||
5668 | 0x43, 0xec, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x6e, 0x7a, 0xfe, 0x90, | ||
5669 | 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, | ||
5670 | 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d, | ||
5671 | 0xf4, 0x00, 0xe9, 0x91, 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, | ||
5672 | 0x04, 0x51, 0x0f, 0x0a, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xf3, 0x16, | ||
5673 | 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, 0x0b, 0x26, 0xf3, 0x76, | ||
5674 | 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, | ||
5675 | 0x16, 0x19, 0x01, 0x0b, 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, | ||
5676 | 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x26, 0xb1, 0x76, 0xfe, 0x89, 0x4a, 0x01, | ||
5677 | 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, 0xfe, 0x48, 0x13, 0xb8, | ||
5678 | 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01, | ||
5679 | 0xec, 0xfe, 0x27, 0x01, 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27, | ||
5680 | 0xfe, 0x2e, 0x16, 0x32, 0x07, 0xfe, 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1d, | ||
5681 | 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, 0x22, 0xd4, 0x07, 0x06, | ||
5682 | 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e, | ||
5683 | 0x07, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8, | ||
5684 | 0x04, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0xfe, 0x80, 0xe7, 0x11, 0x07, 0x11, | ||
5685 | 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, 0x09, 0x48, 0x01, 0x0e, | ||
5686 | 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80, | ||
5687 | 0x80, 0xfe, 0x80, 0x4c, 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01, | ||
5688 | 0x0e, 0xfe, 0x80, 0x4c, 0x09, 0x5d, 0x01, 0x87, 0x04, 0x18, 0x11, 0x75, | ||
5689 | 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, | ||
5690 | 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4, | ||
5691 | 0x17, 0xad, 0x9a, 0x1b, 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04, | ||
5692 | 0xb9, 0x23, 0xfe, 0xde, 0x16, 0xfe, 0xda, 0x10, 0x18, 0x11, 0x75, 0x03, | ||
5693 | 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, 0x18, 0x58, 0x03, 0xfe, | ||
5694 | 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30, | ||
5695 | 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, | ||
5696 | 0xfe, 0x1c, 0xf7, 0x1f, 0x97, 0xfe, 0x38, 0x17, 0xfe, 0xb6, 0x14, 0x35, | ||
5697 | 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, 0x10, 0x18, 0x11, 0x75, | ||
5698 | 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, | ||
5699 | 0x2e, 0x97, 0xfe, 0x5a, 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c, | ||
5700 | 0x1a, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x04, 0xb9, 0x23, 0xfe, | ||
5701 | 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, 0xfe, 0x30, 0xbc, 0xfe, | ||
5702 | 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, | ||
5703 | 0xcb, 0x97, 0xfe, 0x92, 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23, | ||
5704 | 0xfe, 0x7e, 0x17, 0xfe, 0x42, 0x10, 0xfe, 0x02, 0xf6, 0x11, 0x75, 0xfe, | ||
5705 | 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, 0x03, 0xa1, 0xfe, 0x1d, | ||
5706 | 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, | ||
5707 | 0x9a, 0x5b, 0x41, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, | ||
5708 | 0x11, 0xfe, 0x81, 0xe7, 0x11, 0x12, 0xfe, 0xdd, 0x00, 0x6a, 0x2a, 0x04, | ||
5709 | 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, 0x17, 0x15, 0x06, 0x39, | ||
5710 | 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04, | ||
5711 | 0xfe, 0x7e, 0x18, 0x1e, 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, | ||
5712 | 0x1e, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x7c, 0x6f, 0x4f, 0x32, | ||
5713 | 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, 0x13, 0x42, 0x92, 0x09, | ||
5714 | 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, | ||
5715 | 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, | ||
5716 | 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, 0x01, 0x73, 0xfe, 0x16, | ||
5717 | 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14, | ||
5718 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c, | ||
5719 | 0xe7, 0x0a, 0x10, 0xfe, 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, | ||
5720 | 0x06, 0x04, 0x42, 0x92, 0x08, 0x54, 0x1b, 0x37, 0x12, 0x2f, 0x01, 0x73, | ||
5721 | 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x3a, 0xce, 0x3b, | ||
5722 | 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77, | ||
5723 | 0x13, 0xa3, 0x04, 0x09, 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, | ||
5724 | 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x17, 0xfe, 0xe8, 0x18, 0x77, 0x78, 0x04, | ||
5725 | 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, 0x5d, 0x01, 0xa8, 0x09, | ||
5726 | 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe, | ||
5727 | 0x1c, 0x19, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, | ||
5728 | 0xfe, 0x4e, 0xe4, 0xc9, 0x6b, 0xfe, 0x2e, 0x19, 0x03, 0xfe, 0x92, 0x00, | ||
5729 | 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x6b, | ||
5730 | 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe, | ||
5731 | 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, | ||
5732 | 0x45, 0xea, 0xba, 0xff, 0x04, 0x68, 0x54, 0xe7, 0x1e, 0x6e, 0xfe, 0x08, | ||
5733 | 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe, 0x00, | ||
5734 | 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19, | ||
5735 | 0x04, 0x07, 0x7e, 0xfe, 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, | ||
5736 | 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1a, 0xfe, 0x5a, 0xf0, 0xfe, 0x92, 0x19, | ||
5737 | 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, 0x25, 0x6d, 0xe5, 0x07, | ||
5738 | 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59, | ||
5739 | 0xa9, 0xb8, 0x04, 0x15, 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, | ||
5740 | 0x81, 0x03, 0x83, 0xfe, 0x40, 0x5c, 0x04, 0x1c, 0xf7, 0xfe, 0x14, 0xf0, | ||
5741 | 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, 0xf7, 0xfe, 0x82, 0xf0, | ||
5742 | 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00, | ||
5743 | }; | ||
5744 | |||
5745 | static unsigned short _adv_asc38C0800_size = sizeof(_adv_asc38C0800_buf); /* 0x14E1 */ | ||
5746 | static ADV_DCNT _adv_asc38C0800_chksum = 0x050D3FD8UL; /* Expanded little-endian checksum. */ | ||
5747 | |||
5748 | /* Microcode buffer is kept after initialization for error recovery. */ | ||
5749 | static unsigned char _adv_asc38C1600_buf[] = { | ||
5750 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0, | ||
5751 | 0x18, 0xe4, 0x01, 0x00, 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, | ||
5752 | 0x2e, 0x1e, 0x02, 0x00, 0x07, 0x17, 0xc0, 0x5f, 0x00, 0xfa, 0xff, 0xff, | ||
5753 | 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, 0x85, 0xf0, 0x86, 0xf0, | ||
5754 | 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00, | ||
5755 | 0x98, 0x57, 0x01, 0xe6, 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, | ||
5756 | 0x08, 0x00, 0xf0, 0x1d, 0x38, 0x54, 0x32, 0xf0, 0x10, 0x00, 0xc2, 0x0e, | ||
5757 | 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, 0x00, 0xe6, 0xb1, 0xf0, | ||
5758 | 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01, | ||
5759 | 0x06, 0x13, 0x0c, 0x1c, 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, | ||
5760 | 0xbc, 0x0e, 0xa2, 0x12, 0xb9, 0x54, 0x00, 0x80, 0x62, 0x0a, 0x5a, 0x12, | ||
5761 | 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, 0x03, 0xe6, 0x01, 0xea, | ||
5762 | 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, | ||
5763 | 0x04, 0x13, 0xbb, 0x55, 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, | ||
5764 | 0x40, 0x00, 0xb6, 0x00, 0xbb, 0x00, 0xc0, 0x00, 0x00, 0x01, 0x01, 0x01, | ||
5765 | 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, 0x4c, 0x1c, 0x4e, 0x1c, | ||
5766 | 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00, | ||
5767 | 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, | ||
5768 | 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x7c, 0x01, 0xc6, 0x0e, 0x0c, 0x10, | ||
5769 | 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, 0x6e, 0x1e, 0x02, 0x48, | ||
5770 | 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7, | ||
5771 | 0x03, 0xfc, 0x06, 0x00, 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, | ||
5772 | 0x18, 0x1a, 0x70, 0x1a, 0x30, 0x1c, 0x38, 0x1c, 0x10, 0x44, 0x00, 0x4c, | ||
5773 | 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, 0x5d, 0xf0, 0xa7, 0xf0, | ||
5774 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00, | ||
5775 | 0x33, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, | ||
5776 | 0x20, 0x01, 0x4e, 0x01, 0x79, 0x01, 0x3c, 0x09, 0x68, 0x0d, 0x02, 0x10, | ||
5777 | 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, 0x40, 0x16, 0x50, 0x16, | ||
5778 | 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc, | ||
5779 | 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, | ||
5780 | 0x0a, 0x00, 0x9b, 0x00, 0x9c, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, | ||
5781 | 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, 0xe9, 0x09, 0x5c, 0x0c, | ||
5782 | 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, | ||
5783 | 0x42, 0x1d, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, | ||
5784 | 0x89, 0x48, 0x68, 0x54, 0x83, 0x55, 0x83, 0x59, 0x31, 0xe4, 0x02, 0xe6, | ||
5785 | 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, | ||
5786 | 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, | ||
5787 | 0xa8, 0x00, 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, | ||
5788 | 0x26, 0x01, 0x60, 0x01, 0x7a, 0x01, 0x82, 0x01, 0xc8, 0x01, 0xca, 0x01, | ||
5789 | 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, 0x68, 0x08, 0x10, 0x0d, | ||
5790 | 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10, | ||
5791 | 0xf3, 0x10, 0x06, 0x12, 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, | ||
5792 | 0x10, 0x13, 0xfe, 0x9c, 0xf0, 0x35, 0x05, 0xfe, 0xec, 0x0e, 0xff, 0x10, | ||
5793 | 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, 0xfe, 0x88, 0x01, 0xff, | ||
5794 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
5795 | 0x00, 0xfe, 0x57, 0x24, 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, | ||
5796 | 0x00, 0x1a, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, 0x01, 0x01, 0xff, 0x08, | ||
5797 | 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x13, | ||
5798 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
5799 | 0xfe, 0x04, 0xf7, 0xe8, 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, | ||
5800 | 0x04, 0xf7, 0xe8, 0x7d, 0x0d, 0x51, 0x37, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, | ||
5801 | 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, | ||
5802 | 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d, | ||
5803 | 0x05, 0xfe, 0x08, 0x0f, 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, | ||
5804 | 0xfe, 0x0e, 0x03, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, 0x00, 0xfe, 0xd1, | ||
5805 | 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, 0x48, 0xf0, 0xfe, 0x90, | ||
5806 | 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8, | ||
5807 | 0x02, 0xfe, 0x46, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, | ||
5808 | 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x4e, 0x02, 0xfe, 0x44, 0xf0, 0xfe, 0x52, | ||
5809 | 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, 0x0d, 0xa2, 0x1c, 0x07, | ||
5810 | 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02, | ||
5811 | 0x1c, 0xf5, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, | ||
5812 | 0x10, 0xfe, 0x06, 0xfc, 0xde, 0x0a, 0x81, 0x01, 0xa3, 0x05, 0x35, 0x1f, | ||
5813 | 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, 0x81, 0x01, 0x5c, 0xfe, | ||
5814 | 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, | ||
5815 | 0xfe, 0x58, 0x1c, 0x1c, 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, | ||
5816 | 0xf0, 0xfe, 0x0c, 0x02, 0x2b, 0xfe, 0x9e, 0x02, 0xfe, 0x5a, 0x1c, 0xfe, | ||
5817 | 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, 0x00, 0x47, 0xb8, 0x01, | ||
5818 | 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09, | ||
5819 | 0x1a, 0x31, 0xfe, 0x69, 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, | ||
5820 | 0x2c, 0x60, 0x01, 0xfe, 0x1e, 0x1e, 0x20, 0x2c, 0xfe, 0x05, 0xf6, 0xde, | ||
5821 | 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, 0x44, 0x15, 0x56, 0x51, | ||
5822 | 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57, | ||
5823 | 0x01, 0x18, 0x09, 0x00, 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, | ||
5824 | 0x58, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0xc8, 0x54, 0x7b, 0xfe, 0x1c, 0x03, | ||
5825 | 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, 0xfe, 0x02, 0xe8, 0x30, | ||
5826 | 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0, | ||
5827 | 0xfe, 0xe4, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, | ||
5828 | 0x1c, 0x2a, 0xeb, 0xfe, 0x26, 0xf0, 0xfe, 0x66, 0x03, 0xfe, 0xa0, 0xf0, | ||
5829 | 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, 0xef, 0x10, 0xfe, 0x9f, | ||
5830 | 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05, | ||
5831 | 0x70, 0x37, 0xfe, 0x48, 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, | ||
5832 | 0xfe, 0x18, 0x13, 0x26, 0x21, 0xb9, 0xc7, 0x20, 0xb9, 0x0a, 0x57, 0x01, | ||
5833 | 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, 0xe1, 0x2a, 0xeb, 0xfe, | ||
5834 | 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32, | ||
5835 | 0x15, 0xfe, 0xe4, 0x00, 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, | ||
5836 | 0xc6, 0x03, 0x01, 0x41, 0xfe, 0x06, 0xf0, 0xfe, 0xd6, 0x03, 0xaf, 0xa0, | ||
5837 | 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, 0x03, 0x81, 0x1e, 0x1b, | ||
5838 | 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05, | ||
5839 | 0xea, 0xfe, 0x46, 0x1c, 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, | ||
5840 | 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x75, 0x01, 0xa6, 0x86, 0x0a, | ||
5841 | 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, 0xe1, 0x01, 0x18, 0x77, | ||
5842 | 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42, | ||
5843 | 0x8f, 0xfe, 0x70, 0x02, 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, | ||
5844 | 0x2f, 0xfe, 0x4e, 0x04, 0x16, 0xfe, 0x4a, 0x04, 0x7e, 0xfe, 0xa0, 0x00, | ||
5845 | 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, 0x02, 0x00, 0x10, 0x01, | ||
5846 | 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25, | ||
5847 | 0xee, 0xfe, 0x4c, 0x44, 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, | ||
5848 | 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x60, 0x8d, 0x30, 0x01, 0xfe, 0x4e, | ||
5849 | 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xfe, | ||
5850 | 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10, | ||
5851 | 0x13, 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, | ||
5852 | 0x48, 0x47, 0xfe, 0x54, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xa5, 0x01, 0x43, | ||
5853 | 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xf9, 0x1f, 0x7f, | ||
5854 | 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f, | ||
5855 | 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, | ||
5856 | 0x1c, 0x90, 0x04, 0xfe, 0x9c, 0x93, 0x3a, 0x0b, 0x0e, 0x8b, 0x02, 0x1f, | ||
5857 | 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, 0x7d, 0x1d, 0xfe, 0x46, | ||
5858 | 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04, | ||
5859 | 0xfe, 0x87, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, | ||
5860 | 0x06, 0x0d, 0xfe, 0x98, 0x13, 0x0f, 0xfe, 0x20, 0x80, 0x04, 0xfe, 0xa0, | ||
5861 | 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, 0x12, 0x01, 0x38, 0x06, | ||
5862 | 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda, | ||
5863 | 0x05, 0xd0, 0x54, 0x01, 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe, | ||
5864 | 0xa0, 0x00, 0x1e, 0xfe, 0x50, 0x12, 0x5e, 0xff, 0x02, 0x00, 0x10, 0x2f, | ||
5865 | 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, | ||
5866 | 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01, | ||
5867 | 0x38, 0xfe, 0x4a, 0xf0, 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba, | ||
5868 | 0x05, 0x71, 0x2e, 0xfe, 0x21, 0x00, 0xf1, 0x2e, 0xfe, 0x22, 0x00, 0xa2, | ||
5869 | 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, 0xd0, | ||
5870 | 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe, | ||
5871 | 0x1c, 0x00, 0x4d, 0x01, 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27, | ||
5872 | 0x01, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x24, 0x12, 0x3e, 0x01, 0x84, 0x1f, | ||
5873 | 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, | ||
5874 | 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13, | ||
5875 | 0x03, 0xb6, 0x1e, 0xfe, 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13, | ||
5876 | 0x3e, 0x01, 0x84, 0x17, 0xfe, 0x72, 0x06, 0x0a, 0x07, 0x01, 0x38, 0x06, | ||
5877 | 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, 0x19, 0x16, 0xfe, 0x68, | ||
5878 | 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66, | ||
5879 | 0x03, 0x9a, 0x1e, 0xfe, 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13, | ||
5880 | 0x01, 0xc6, 0x09, 0x12, 0x48, 0xfe, 0x92, 0x06, 0x2e, 0x12, 0x01, 0xfe, | ||
5881 | 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, 0x58, 0xff, 0x02, 0x00, | ||
5882 | 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17, | ||
5883 | 0xfe, 0xea, 0x06, 0x01, 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01, | ||
5884 | 0xfe, 0x84, 0x19, 0x16, 0xfe, 0xe0, 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, | ||
5885 | 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0xae, | ||
5886 | 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a, | ||
5887 | 0x1e, 0xfe, 0x1a, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01, | ||
5888 | 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0xf0, 0x45, 0x0a, 0x95, | ||
5889 | 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, 0x36, 0xfe, 0x02, 0xf6, | ||
5890 | 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e, | ||
5891 | 0xd0, 0x0d, 0x17, 0xfe, 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe, | ||
5892 | 0x90, 0x07, 0x26, 0x20, 0x9e, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x21, | ||
5893 | 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, 0x57, 0x10, 0xe6, 0x05, | ||
5894 | 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84, | ||
5895 | 0xfe, 0x9c, 0x32, 0x5f, 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00, | ||
5896 | 0x2f, 0xed, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, 0xce, 0x07, 0xae, 0xfe, | ||
5897 | 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, 0xaf, 0xa0, 0x05, 0x29, | ||
5898 | 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14, | ||
5899 | 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe, | ||
5900 | 0x99, 0xa4, 0x01, 0x08, 0x14, 0x00, 0x05, 0xfe, 0xc6, 0x09, 0x01, 0x76, | ||
5901 | 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x30, 0x13, | ||
5902 | 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, | ||
5903 | 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00, | ||
5904 | 0x05, 0xef, 0x7c, 0x4a, 0x78, 0x4f, 0x0f, 0xfe, 0x9a, 0x81, 0x04, 0xfe, | ||
5905 | 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, 0x28, 0x48, 0xfe, 0x6c, | ||
5906 | 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32, | ||
5907 | 0x12, 0x53, 0x63, 0x4e, 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c, | ||
5908 | 0xfe, 0x0a, 0xf0, 0xfe, 0x6c, 0x08, 0xaf, 0xa0, 0xae, 0xfe, 0x96, 0x08, | ||
5909 | 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, 0x05, 0xed, 0xfe, 0x9c, | ||
5910 | 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe, | ||
5911 | 0x1e, 0xfe, 0x99, 0x58, 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe, | ||
5912 | 0x16, 0x09, 0x10, 0x6a, 0x22, 0x6b, 0x01, 0x0c, 0x61, 0x54, 0x44, 0x21, | ||
5913 | 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, 0x1e, 0x47, 0x2c, 0x7a, | ||
5914 | 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40, | ||
5915 | 0x01, 0x0c, 0x61, 0x65, 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20, | ||
5916 | 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, | ||
5917 | 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, 0x01, 0xfe, 0xce, 0x1e, | ||
5918 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e, | ||
5919 | 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b, | ||
5920 | 0x22, 0x4c, 0xfe, 0x8a, 0x10, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x50, 0x12, | ||
5921 | 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, 0x10, 0x6a, 0x22, 0x6b, | ||
5922 | 0x01, 0x0c, 0x06, 0x65, 0x4e, 0x01, 0xc2, 0x0f, 0xfe, 0x1f, 0x80, 0x04, | ||
5923 | 0xfe, 0x9f, 0x83, 0x33, 0x0b, 0x0e, 0x20, 0x6e, 0x0f, 0xfe, 0x44, 0x90, | ||
5924 | 0x04, 0xfe, 0xc4, 0x93, 0x3a, 0x0b, 0xfe, 0xc6, 0x90, 0x04, 0xfe, 0xc6, | ||
5925 | 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x6c, 0x22, 0x6d, 0x01, 0xfe, 0xce, 0x1e, | ||
5926 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x0f, 0xfe, 0x40, 0x90, | ||
5927 | 0x04, 0xfe, 0xc0, 0x93, 0x3a, 0x0b, 0xfe, 0xc2, 0x90, 0x04, 0xfe, 0xc2, | ||
5928 | 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x4b, 0x22, 0x4c, 0x10, 0x64, 0x22, 0x34, | ||
5929 | 0x01, 0x0c, 0x61, 0x24, 0x44, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe, | ||
5930 | 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b, | ||
5931 | 0x3c, 0x37, 0x88, 0xf5, 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a, | ||
5932 | 0xd2, 0xfe, 0x1e, 0x0a, 0xd3, 0xfe, 0x42, 0x0a, 0xae, 0xfe, 0x12, 0x0a, | ||
5933 | 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, 0x05, 0x29, 0x01, 0x41, | ||
5934 | 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07, | ||
5935 | 0xfe, 0x14, 0x12, 0x01, 0x76, 0x06, 0x0d, 0x5d, 0x01, 0x0c, 0x06, 0x0d, | ||
5936 | 0xfe, 0x74, 0x12, 0xfe, 0x2e, 0x1c, 0x05, 0xfe, 0x1a, 0x0c, 0x01, 0x76, | ||
5937 | 0x06, 0x07, 0x5d, 0x01, 0x76, 0x06, 0x0d, 0x41, 0xfe, 0x2c, 0x1c, 0xfe, | ||
5938 | 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe, | ||
5939 | 0x92, 0x10, 0xc4, 0xf6, 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe, | ||
5940 | 0x1a, 0x0c, 0xc5, 0xfe, 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0xbf, 0xfe, 0x6b, | ||
5941 | 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xac, 0xfe, 0xd2, 0xf0, | ||
5942 | 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07, | ||
5943 | 0x1b, 0xbf, 0xd4, 0x5b, 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5, | ||
5944 | 0xfe, 0xa9, 0x10, 0x75, 0x5e, 0x32, 0x1f, 0x7f, 0x01, 0x42, 0x19, 0xfe, | ||
5945 | 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, 0x05, 0x70, 0xfe, 0x74, | ||
5946 | 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78, | ||
5947 | 0x0f, 0x4d, 0x01, 0xfe, 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05, | ||
5948 | 0x5b, 0x01, 0x0c, 0x06, 0x0d, 0x2b, 0xfe, 0xe2, 0x0b, 0x01, 0x0c, 0x06, | ||
5949 | 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, 0xfe, 0x88, 0x13, 0x21, | ||
5950 | 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe, | ||
5951 | 0x83, 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42, | ||
5952 | 0x13, 0x0f, 0xfe, 0x04, 0x91, 0x04, 0xfe, 0x84, 0x93, 0xfe, 0xca, 0x57, | ||
5953 | 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, 0xfe, 0xcb, 0x57, 0x0b, | ||
5954 | 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03, | ||
5955 | 0x6a, 0x3b, 0x6b, 0x10, 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01, | ||
5956 | 0xc2, 0xc8, 0x7a, 0x30, 0x20, 0x6e, 0xdb, 0x64, 0xdc, 0x34, 0x91, 0x6c, | ||
5957 | 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xfe, 0x04, 0xfa, 0x64, | ||
5958 | 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97, | ||
5959 | 0x10, 0x98, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06, | ||
5960 | 0x24, 0x1b, 0x40, 0x91, 0x4b, 0x7e, 0x4c, 0x01, 0x0c, 0x06, 0xfe, 0xf7, | ||
5961 | 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, | ||
5962 | 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24, | ||
5963 | 0x1b, 0x40, 0x01, 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe, | ||
5964 | 0x8e, 0x1e, 0x4f, 0x0f, 0xfe, 0x10, 0x90, 0x04, 0xfe, 0x90, 0x93, 0x3a, | ||
5965 | 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, 0x79, 0x0b, 0x0e, 0xfe, | ||
5966 | 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb, | ||
5967 | 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e, | ||
5968 | 0xfe, 0x6e, 0x0a, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, 0x58, 0x05, 0x5b, 0x26, | ||
5969 | 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, 0x83, 0x33, 0x0b, 0x0e, | ||
5970 | 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, | ||
5971 | 0x19, 0xfe, 0x19, 0x41, 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef, | ||
5972 | 0x1f, 0x92, 0x01, 0x42, 0x19, 0xfe, 0x44, 0x00, 0xfe, 0x90, 0x10, 0xfe, | ||
5973 | 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, 0x4c, 0xfe, 0x0c, 0x51, | ||
5974 | 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe, | ||
5975 | 0x76, 0x10, 0xac, 0xfe, 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18, | ||
5976 | 0x23, 0x1d, 0x5d, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0x08, 0x13, 0x19, 0xfe, | ||
5977 | 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, 0xcc, 0x0c, 0x1f, 0x92, | ||
5978 | 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2, | ||
5979 | 0x0c, 0xfe, 0x3e, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe, | ||
5980 | 0x22, 0x00, 0x05, 0x70, 0xfe, 0xcb, 0xf0, 0xfe, 0xea, 0x0c, 0x19, 0xfe, | ||
5981 | 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, 0xf4, 0x0c, 0x19, 0x94, | ||
5982 | 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3, | ||
5983 | 0xfe, 0xcc, 0xf0, 0xef, 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12, | ||
5984 | 0x00, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe, 0x16, 0x0d, 0xfe, 0x9e, | ||
5985 | 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, 0x3c, 0x37, 0x88, 0xf5, | ||
5986 | 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32, | ||
5987 | 0x2f, 0xfe, 0x3e, 0x0d, 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0, | ||
5988 | 0xd4, 0x9f, 0xd5, 0x9f, 0xd2, 0x9f, 0xd3, 0x9f, 0x05, 0x29, 0x01, 0x41, | ||
5989 | 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, 0xc5, 0x75, 0xd7, 0x99, | ||
5990 | 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8, | ||
5991 | 0x9c, 0x2f, 0xfe, 0x8c, 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01, | ||
5992 | 0x48, 0xa4, 0x19, 0xfe, 0x42, 0x00, 0x05, 0x70, 0x90, 0x07, 0xfe, 0x81, | ||
5993 | 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x44, 0x13, | ||
5994 | 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b, | ||
5995 | 0xfe, 0xda, 0x0e, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe, | ||
5996 | 0x28, 0x00, 0xfe, 0xfa, 0x10, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, | ||
5997 | 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, 0x15, 0x56, 0x01, 0x85, | ||
5998 | 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe, | ||
5999 | 0xcc, 0x10, 0x01, 0xa7, 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f, | ||
6000 | 0xfe, 0x19, 0x82, 0x04, 0xfe, 0x99, 0x83, 0xfe, 0xcc, 0x47, 0x0b, 0x0e, | ||
6001 | 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, 0x43, 0x00, 0xfe, 0xa2, | ||
6002 | 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, | ||
6003 | 0x00, 0x1d, 0x40, 0x15, 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01, | ||
6004 | 0xfe, 0x9e, 0x1e, 0x05, 0xfe, 0x3a, 0x03, 0x01, 0x0c, 0x06, 0x0d, 0x5d, | ||
6005 | 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, 0x76, 0x06, 0x12, 0xfe, | ||
6006 | 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c, | ||
6007 | 0xfe, 0x9d, 0xf0, 0xfe, 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, | ||
6008 | 0xfe, 0x94, 0x0e, 0x01, 0x0c, 0x61, 0x12, 0x44, 0xfe, 0x9f, 0x10, 0x19, | ||
6009 | 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, 0xfe, 0x2e, 0x10, 0x19, | ||
6010 | 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19, | ||
6011 | 0xfe, 0x41, 0x00, 0xa2, 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75, | ||
6012 | 0x03, 0x81, 0x1e, 0x2b, 0xea, 0x4f, 0xfe, 0x04, 0xe6, 0x12, 0xfe, 0x9d, | ||
6013 | 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, 0x35, 0xfe, 0x12, 0x1c, | ||
6014 | 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01, | ||
6015 | 0xfe, 0xd4, 0x11, 0x05, 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e, | ||
6016 | 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0x06, 0xea, 0xe0, | ||
6017 | 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, 0x67, 0xfe, 0x98, 0x56, | ||
6018 | 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01, | ||
6019 | 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe, | ||
6020 | 0x41, 0x58, 0x0a, 0xba, 0xfe, 0xfa, 0x14, 0xfe, 0x49, 0x54, 0xb0, 0xfe, | ||
6021 | 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, 0xfe, 0xe0, 0x14, 0xfe, | ||
6022 | 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47, | ||
6023 | 0xfe, 0xad, 0x13, 0x05, 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12, | ||
6024 | 0x26, 0x20, 0x96, 0x20, 0xe7, 0xfe, 0x08, 0x1c, 0xfe, 0x7c, 0x19, 0xfe, | ||
6025 | 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, 0x48, 0x55, 0xa5, 0x3b, | ||
6026 | 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe, | ||
6027 | 0xf0, 0x1a, 0x03, 0xfe, 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe, | ||
6028 | 0x1e, 0x10, 0xfe, 0x02, 0xec, 0xe7, 0x53, 0x00, 0x36, 0xfe, 0x04, 0xec, | ||
6029 | 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x62, 0x1b, | ||
6030 | 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02, | ||
6031 | 0xea, 0xe7, 0x53, 0x92, 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3, | ||
6032 | 0xfe, 0x2a, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x23, 0xfe, 0xf0, 0xff, 0x10, | ||
6033 | 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, 0x01, 0x01, 0xfe, 0x1e, | ||
6034 | 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02, | ||
6035 | 0x26, 0x02, 0x21, 0x96, 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13, | ||
6036 | 0x1f, 0x1d, 0x47, 0xb5, 0xc3, 0xfe, 0xe1, 0x10, 0xcf, 0xfe, 0x03, 0xdc, | ||
6037 | 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, 0xfe, 0x03, 0xdc, 0xfe, | ||
6038 | 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe, | ||
6039 | 0x00, 0xcc, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06, | ||
6040 | 0x4a, 0xfe, 0x4e, 0x13, 0x0f, 0xfe, 0x1c, 0x80, 0x04, 0xfe, 0x9c, 0x83, | ||
6041 | 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, 0x0f, 0xfe, 0x1e, 0x80, | ||
6042 | 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe, | ||
6043 | 0x1d, 0x80, 0x04, 0xfe, 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c, | ||
6044 | 0x13, 0x01, 0xfe, 0xee, 0x1e, 0xac, 0xfe, 0x14, 0x13, 0x01, 0xfe, 0xfe, | ||
6045 | 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, | ||
6046 | 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09, | ||
6047 | 0x56, 0xfb, 0x01, 0xfe, 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01, | ||
6048 | 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x15, 0xfe, 0xe9, 0x00, 0x01, | ||
6049 | 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, 0x22, 0x1b, 0xfe, 0x1e, | ||
6050 | 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe, | ||
6051 | 0x96, 0x90, 0x04, 0xfe, 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64, | ||
6052 | 0x01, 0x22, 0xfe, 0x66, 0x01, 0x01, 0x0c, 0x06, 0x65, 0xf9, 0x0f, 0xfe, | ||
6053 | 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x0e, 0x77, 0xfe, 0x01, | ||
6054 | 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40, | ||
6055 | 0x21, 0x2c, 0xfe, 0x00, 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03, | ||
6056 | 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, 0x03, 0xfe, 0xae, 0x00, 0xfe, 0x07, | ||
6057 | 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, | ||
6058 | 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10, | ||
6059 | 0x66, 0x10, 0x55, 0x10, 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe, | ||
6060 | 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, 0x88, 0x11, 0x46, 0x1a, 0x13, | ||
6061 | 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, | ||
6062 | 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe, | ||
6063 | 0x00, 0x40, 0x8d, 0x2c, 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, | ||
6064 | 0xfe, 0xb2, 0x11, 0xfe, 0x12, 0x1c, 0x75, 0xfe, 0x14, 0x1c, 0xfe, 0x10, | ||
6065 | 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, 0x14, 0xfe, 0x0e, 0x47, | ||
6066 | 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01, | ||
6067 | 0xa7, 0x90, 0x34, 0x60, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, | ||
6068 | 0x13, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x34, 0x13, 0x0a, 0x5a, 0x01, | ||
6069 | 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, | ||
6070 | 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89, | ||
6071 | 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85, | ||
6072 | 0xf2, 0x09, 0x9b, 0xa4, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xec, | ||
6073 | 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, 0xec, 0xb8, 0xfe, 0x9e, | ||
6074 | 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01, | ||
6075 | 0xf4, 0xfe, 0xdd, 0x10, 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee, | ||
6076 | 0x09, 0x12, 0xfe, 0x48, 0x12, 0x09, 0x0d, 0xfe, 0x56, 0x12, 0x09, 0x1d, | ||
6077 | 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, 0x13, 0x09, 0xfe, 0x23, | ||
6078 | 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09, | ||
6079 | 0x24, 0xfe, 0x12, 0x12, 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42, | ||
6080 | 0xa1, 0x32, 0x01, 0x08, 0xae, 0x41, 0x02, 0x32, 0xfe, 0x62, 0x08, 0x0a, | ||
6081 | 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, 0x35, 0x32, 0x01, 0x43, | ||
6082 | 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80, | ||
6083 | 0x13, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34, | ||
6084 | 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xb0, 0xfe, 0x4a, 0x13, 0x21, 0x6e, | ||
6085 | 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, 0xfe, 0xb6, 0x0e, 0x10, | ||
6086 | 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49, | ||
6087 | 0x88, 0x20, 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe, | ||
6088 | 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x64, 0xfe, 0x05, 0xfa, | ||
6089 | 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x40, 0x56, 0xfe, | ||
6090 | 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe, | ||
6091 | 0x44, 0x55, 0xfe, 0xe5, 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56, | ||
6092 | 0xfe, 0xa1, 0x56, 0x10, 0x68, 0x22, 0x69, 0x01, 0x0c, 0x06, 0x54, 0xf9, | ||
6093 | 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, 0x6b, 0xfe, 0x2c, 0x50, | ||
6094 | 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6, | ||
6095 | 0x50, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, | ||
6096 | 0x4b, 0x3b, 0x4c, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x05, 0x73, 0x2e, | ||
6097 | 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, 0x16, 0x3d, 0x27, 0x25, | ||
6098 | 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01, | ||
6099 | 0xa6, 0x23, 0x3f, 0x1b, 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13, | ||
6100 | 0x91, 0x4b, 0x7e, 0x4c, 0xfe, 0x0a, 0x55, 0x31, 0xfe, 0x8b, 0x55, 0xd9, | ||
6101 | 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x05, 0x72, 0x01, | ||
6102 | 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08, | ||
6103 | 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d, | ||
6104 | 0x83, 0x2d, 0x7f, 0x1b, 0xfe, 0x66, 0x15, 0x05, 0x3d, 0x01, 0x08, 0x2a, | ||
6105 | 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, 0x2b, 0x3d, 0x01, 0x08, | ||
6106 | 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03, | ||
6107 | 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45, | ||
6108 | 0x2d, 0x00, 0xa4, 0x46, 0x07, 0x90, 0x3f, 0x01, 0xfe, 0xf8, 0x15, 0x01, | ||
6109 | 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, 0x01, 0x43, 0x09, 0x82, | ||
6110 | 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e, | ||
6111 | 0x05, 0x72, 0xfe, 0xc0, 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66, | ||
6112 | 0x8a, 0x10, 0x66, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, 0xfe, 0x56, | ||
6113 | 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, 0x27, 0x25, 0xbd, | ||
6114 | 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe, | ||
6115 | 0xe8, 0x14, 0x01, 0xa6, 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe, | ||
6116 | 0x4a, 0xf4, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05, | ||
6117 | 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, | ||
6118 | 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, | ||
6119 | 0x27, 0x25, 0xbd, 0x09, 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b, | ||
6120 | 0xfe, 0xaa, 0x14, 0xfe, 0xb6, 0x14, 0x86, 0xa8, 0xb2, 0x0d, 0x1b, 0x3d, | ||
6121 | 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05, 0x72, | ||
6122 | 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, | ||
6123 | 0xfe, 0xc0, 0x19, 0x05, 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17, | ||
6124 | 0xfe, 0xe2, 0x15, 0x5f, 0xcc, 0x01, 0x08, 0x26, 0x5f, 0x02, 0x8f, 0xfe, | ||
6125 | 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, 0xcc, 0x15, 0x5e, 0x32, | ||
6126 | 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, | ||
6127 | 0xad, 0x23, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, | ||
6128 | 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0x23, 0x3f, 0xfe, 0x30, | ||
6129 | 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, | ||
6130 | 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e, | ||
6131 | 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58, | ||
6132 | 0x02, 0x0a, 0x66, 0x01, 0x5c, 0x0a, 0x55, 0x01, 0x5c, 0x0a, 0x6f, 0x01, | ||
6133 | 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, 0xff, 0x03, 0x00, 0x54, | ||
6134 | 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07, | ||
6135 | 0x7c, 0x3a, 0x0b, 0x0e, 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a, | ||
6136 | 0x19, 0xfe, 0xfb, 0x19, 0xfe, 0x1a, 0xf7, 0x00, 0xfe, 0x1b, 0xf7, 0x00, | ||
6137 | 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, 0xda, 0x6d, 0x02, 0xfe, | ||
6138 | 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77, | ||
6139 | 0x02, 0x01, 0xc6, 0xfe, 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16, | ||
6140 | 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xbe, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17, | ||
6141 | 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0x9a, 0x1e, 0xfe, | ||
6142 | 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12, | ||
6143 | 0x48, 0xfe, 0x08, 0x17, 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d, | ||
6144 | 0xb4, 0x7b, 0xfe, 0x26, 0x17, 0x4d, 0x13, 0x07, 0x1c, 0xb4, 0x90, 0x04, | ||
6145 | 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, 0xff, 0x02, 0x83, 0x55, | ||
6146 | 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80, | ||
6147 | 0x17, 0x1c, 0x63, 0x13, 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, | ||
6148 | 0x13, 0xd6, 0xfe, 0x64, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0x64, | ||
6149 | 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, 0x53, 0x07, 0xfe, 0x60, | ||
6150 | 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8, | ||
6151 | 0x00, 0x1c, 0x95, 0x13, 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, | ||
6152 | 0x8c, 0x17, 0x45, 0xf3, 0xfe, 0x43, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, | ||
6153 | 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, 0xf4, 0x94, 0xf6, 0x8b, | ||
6154 | 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe, | ||
6155 | 0xda, 0x17, 0x62, 0x49, 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, | ||
6156 | 0xda, 0x17, 0x62, 0x80, 0x71, 0x50, 0x26, 0xfe, 0x4d, 0xf4, 0x00, 0xf7, | ||
6157 | 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x02, 0x50, 0x13, | ||
6158 | 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27, | ||
6159 | 0x25, 0xbe, 0xfe, 0x03, 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, | ||
6160 | 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, | ||
6161 | 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, 0x01, 0x08, 0x16, 0xa9, | ||
6162 | 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01, | ||
6163 | 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, | ||
6164 | 0x03, 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, 0x31, 0xa2, 0x78, 0xf2, | ||
6165 | 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, 0x78, 0x03, 0x9a, 0x1e, | ||
6166 | 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10, | ||
6167 | 0xfe, 0x40, 0x5a, 0x23, 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, | ||
6168 | 0x62, 0x49, 0x71, 0x8c, 0x80, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x80, 0xfe, | ||
6169 | 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, | ||
6170 | 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe, | ||
6171 | 0x43, 0x48, 0x2d, 0x93, 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, | ||
6172 | 0x40, 0x10, 0x2d, 0xb4, 0x36, 0xfe, 0x34, 0xf4, 0x04, 0xfe, 0x34, 0x10, | ||
6173 | 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, 0x28, 0x10, 0xfe, 0xc0, | ||
6174 | 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa, | ||
6175 | 0x18, 0x45, 0xfe, 0x1c, 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, | ||
6176 | 0x56, 0xf0, 0xfe, 0x0c, 0x19, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x40, 0xf4, | ||
6177 | 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x21, 0xfe, 0x7f, 0x01, | ||
6178 | 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe, | ||
6179 | 0x7e, 0x01, 0xfe, 0xc8, 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, | ||
6180 | 0xfe, 0x48, 0x45, 0xfa, 0x21, 0xfe, 0x81, 0x01, 0xfe, 0xc8, 0x44, 0x4e, | ||
6181 | 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, 0x13, 0x0d, 0x02, 0x14, | ||
6182 | 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17, | ||
6183 | 0xfe, 0x82, 0x19, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, | ||
6184 | 0xfe, 0x89, 0x49, 0x01, 0x08, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1, | ||
6185 | 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1, | ||
6186 | 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01, | ||
6187 | 0x08, 0x02, 0x50, 0x02, 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, | ||
6188 | 0x01, 0x08, 0x17, 0x74, 0x14, 0x12, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x89, | ||
6189 | 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, 0x08, 0x17, 0x74, 0xfe, | ||
6190 | 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17, | ||
6191 | 0x74, 0x5f, 0xcc, 0x01, 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, | ||
6192 | 0x13, 0xc8, 0x20, 0xe4, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x5f, 0xa1, 0x5e, | ||
6193 | 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, | ||
6194 | 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13, | ||
6195 | 0x16, 0xfe, 0x64, 0x1a, 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, | ||
6196 | 0x07, 0x5d, 0x01, 0x0c, 0x61, 0x07, 0x44, 0x02, 0x0a, 0x5a, 0x01, 0x18, | ||
6197 | 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, | ||
6198 | 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa, | ||
6199 | 0xfe, 0x80, 0xe7, 0x1a, 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, | ||
6200 | 0xb2, 0x16, 0xaa, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0xaa, 0x0a, 0x67, 0x01, | ||
6201 | 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, 0x7e, 0x1e, 0xfe, 0x80, | ||
6202 | 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18, | ||
6203 | 0xfe, 0x80, 0x4c, 0x0a, 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, | ||
6204 | 0xe5, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, 0x1c, 0xfe, 0x1d, | ||
6205 | 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, 0x2a, 0x1c, 0xfa, 0xb3, | ||
6206 | 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe, | ||
6207 | 0xf4, 0x1a, 0xfe, 0xfa, 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, | ||
6208 | 0xfe, 0x00, 0xf4, 0x24, 0xfe, 0x18, 0x58, 0x03, 0xfe, 0x66, 0x01, 0xfe, | ||
6209 | 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, 0x07, | ||
6210 | 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, | ||
6211 | 0xf7, 0x24, 0xb1, 0xfe, 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, | ||
6212 | 0x2b, 0xfe, 0x26, 0x1b, 0xfe, 0xba, 0x10, 0x1c, 0x1a, 0x87, 0xfe, 0x83, | ||
6213 | 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x54, 0xb1, | ||
6214 | 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe, | ||
6215 | 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, | ||
6216 | 0xfe, 0x8a, 0x10, 0x1c, 0x1a, 0x87, 0x8b, 0x0f, 0xfe, 0x30, 0x90, 0x04, | ||
6217 | 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, 0xfe, 0x32, 0x90, 0x04, | ||
6218 | 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a, | ||
6219 | 0x7c, 0x12, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, | ||
6220 | 0x1b, 0xfe, 0x5e, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x96, 0x1b, 0x5c, | ||
6221 | 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, 0x6a, 0xfe, 0x19, 0xfe, | ||
6222 | 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee, | ||
6223 | 0x1b, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, | ||
6224 | 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x1a, 0xfe, 0x81, 0xe7, 0x1a, | ||
6225 | 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, 0x30, 0xfe, 0x12, 0x45, | ||
6226 | 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe, | ||
6227 | 0x39, 0xf0, 0x75, 0x26, 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, | ||
6228 | 0x11, 0x02, 0x87, 0x03, 0xe3, 0x23, 0x07, 0xfe, 0xef, 0x12, 0xfe, 0xe1, | ||
6229 | 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x3c, 0x13, | ||
6230 | 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a, | ||
6231 | 0x01, 0x18, 0xcb, 0xfe, 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, | ||
6232 | 0x01, 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, | ||
6233 | 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x01, | ||
6234 | 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24, | ||
6235 | 0x12, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, | ||
6236 | 0x02, 0xfe, 0x9c, 0xe7, 0x0d, 0x19, 0xfe, 0x15, 0x00, 0x40, 0x8d, 0x30, | ||
6237 | 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, 0x83, 0xfe, 0x18, 0x80, | ||
6238 | 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38, | ||
6239 | 0x90, 0xfe, 0xba, 0x90, 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, | ||
6240 | 0xfe, 0xc9, 0x55, 0x02, 0x21, 0xb9, 0x88, 0x20, 0xb9, 0x02, 0x0a, 0xba, | ||
6241 | 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, 0x18, 0xfe, 0x49, 0x44, | ||
6242 | 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09, | ||
6243 | 0x1a, 0xa4, 0x0a, 0x67, 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, | ||
6244 | 0x02, 0xfe, 0x4e, 0xe4, 0x1d, 0x7b, 0xfe, 0x52, 0x1d, 0x03, 0xfe, 0x90, | ||
6245 | 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xdd, 0x7b, | ||
6246 | 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10, | ||
6247 | 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, | ||
6248 | 0x94, 0x00, 0xd1, 0x24, 0xfe, 0x08, 0x10, 0x03, 0xfe, 0x96, 0x00, 0xd1, | ||
6249 | 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, 0x68, 0x54, 0xfe, 0xf1, | ||
6250 | 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, | ||
6251 | 0xfe, 0x1a, 0xf4, 0xfe, 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, | ||
6252 | 0x1d, 0x13, 0x1d, 0x02, 0x09, 0x92, 0xfe, 0x5a, 0xf0, 0xfe, 0xba, 0x1d, | ||
6253 | 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, 0x5a, 0xf0, 0xfe, 0xc8, | ||
6254 | 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe, | ||
6255 | 0x1a, 0x10, 0x09, 0x0d, 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, | ||
6256 | 0x95, 0xa1, 0xc8, 0x02, 0x1f, 0x93, 0x01, 0x42, 0xfe, 0x04, 0xfe, 0x99, | ||
6257 | 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, 0xfe, 0x14, 0xf0, 0x08, | ||
6258 | 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e, | ||
6259 | 0xfe, 0x82, 0xf0, 0xfe, 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, | ||
6260 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x18, 0x80, 0x04, 0xfe, 0x98, | ||
6261 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, 0x80, 0x04, 0xfe, 0x82, | ||
6262 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86, | ||
6263 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, | ||
6264 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x04, 0x80, 0x04, 0xfe, 0x84, | ||
6265 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, 0x80, 0x04, 0xfe, 0x80, | ||
6266 | 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04, | ||
6267 | 0xfe, 0x99, 0x83, 0xfe, 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, | ||
6268 | 0x83, 0x04, 0xfe, 0x86, 0x83, 0xfe, 0xce, 0x47, 0x0b, 0x0e, 0x02, 0x0f, | ||
6269 | 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, | ||
6270 | 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
6271 | 0xfe, 0x08, 0x90, 0x04, 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, | ||
6272 | 0xfe, 0x8a, 0x90, 0x04, 0xfe, 0x8a, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
6273 | 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, | ||
6274 | 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
6275 | 0xfe, 0x3c, 0x90, 0x04, 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, | ||
6276 | 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x77, 0x0e, | ||
6277 | 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00, | ||
6278 | }; | ||
6279 | |||
6280 | static unsigned short _adv_asc38C1600_size = sizeof(_adv_asc38C1600_buf); /* 0x1673 */ | ||
6281 | static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian checksum. */ | ||
6282 | |||
6283 | static void AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) | ||
6284 | { | ||
6285 | PortAddr iop_base; | ||
6286 | int i; | ||
6287 | ushort lram_addr; | ||
6288 | |||
6289 | iop_base = asc_dvc->iop_base; | ||
6290 | AscPutRiscVarFreeQHead(iop_base, 1); | ||
6291 | AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng); | ||
6292 | AscPutVarFreeQHead(iop_base, 1); | ||
6293 | AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng); | ||
6294 | AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B, | ||
6295 | (uchar)((int)asc_dvc->max_total_qng + 1)); | ||
6296 | AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B, | ||
6297 | (uchar)((int)asc_dvc->max_total_qng + 2)); | ||
6298 | AscWriteLramByte(iop_base, (ushort)ASCV_TOTAL_READY_Q_B, | ||
6299 | asc_dvc->max_total_qng); | ||
6300 | AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0); | ||
6301 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | ||
6302 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0); | ||
6303 | AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0); | ||
6304 | AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0); | ||
6305 | AscPutQDoneInProgress(iop_base, 0); | ||
6306 | lram_addr = ASC_QADR_BEG; | ||
6307 | for (i = 0; i < 32; i++, lram_addr += 2) { | ||
6308 | AscWriteLramWord(iop_base, lram_addr, 0); | ||
7560 | } | 6309 | } |
7561 | #ifdef CONFIG_ISA | 6310 | } |
7562 | if ((bus_type & ASC_IS_EISA) != 0) { | ||
7563 | cfg_lsw = AscGetEisaChipCfg(iop_base); | ||
7564 | cfg_lsw &= 0x000F; | ||
7565 | bios_addr = (ushort)(ASC_BIOS_MIN_ADDR + | ||
7566 | (cfg_lsw * ASC_BIOS_BANK_SIZE)); | ||
7567 | return (bios_addr); | ||
7568 | } /* if */ | ||
7569 | #endif /* CONFIG_ISA */ | ||
7570 | 6311 | ||
7571 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 6312 | static ushort AscInitMicroCodeVar(ASC_DVC_VAR *asc_dvc) |
6313 | { | ||
6314 | int i; | ||
6315 | ushort warn_code; | ||
6316 | PortAddr iop_base; | ||
6317 | ASC_PADDR phy_addr; | ||
6318 | ASC_DCNT phy_size; | ||
6319 | struct asc_board *board = asc_dvc_to_board(asc_dvc); | ||
7572 | 6320 | ||
7573 | /* | 6321 | iop_base = asc_dvc->iop_base; |
7574 | * ISA PnP uses the top bit as the 32K BIOS flag | 6322 | warn_code = 0; |
7575 | */ | 6323 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7576 | if (bus_type == ASC_IS_ISAPNP) { | 6324 | AscPutMCodeInitSDTRAtID(iop_base, i, |
7577 | cfg_lsw &= 0x7FFF; | 6325 | asc_dvc->cfg->sdtr_period_offset[i]); |
7578 | } | 6326 | } |
7579 | /* if */ | 6327 | |
7580 | bios_addr = (ushort)(((cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE) + | 6328 | AscInitQLinkVar(asc_dvc); |
7581 | ASC_BIOS_MIN_ADDR); | 6329 | AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B, |
7582 | return (bios_addr); | 6330 | asc_dvc->cfg->disc_enable); |
6331 | AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B, | ||
6332 | ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id)); | ||
6333 | |||
6334 | /* Ensure overrun buffer is aligned on an 8 byte boundary. */ | ||
6335 | BUG_ON((unsigned long)asc_dvc->overrun_buf & 7); | ||
6336 | asc_dvc->overrun_dma = dma_map_single(board->dev, asc_dvc->overrun_buf, | ||
6337 | ASC_OVERRUN_BSIZE, DMA_FROM_DEVICE); | ||
6338 | phy_addr = cpu_to_le32(asc_dvc->overrun_dma); | ||
6339 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D, | ||
6340 | (uchar *)&phy_addr, 1); | ||
6341 | phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE); | ||
6342 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D, | ||
6343 | (uchar *)&phy_size, 1); | ||
6344 | |||
6345 | asc_dvc->cfg->mcode_date = | ||
6346 | AscReadLramWord(iop_base, (ushort)ASCV_MC_DATE_W); | ||
6347 | asc_dvc->cfg->mcode_version = | ||
6348 | AscReadLramWord(iop_base, (ushort)ASCV_MC_VER_W); | ||
6349 | |||
6350 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | ||
6351 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | ||
6352 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | ||
6353 | return warn_code; | ||
6354 | } | ||
6355 | if (AscStartChip(iop_base) != 1) { | ||
6356 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | ||
6357 | return warn_code; | ||
6358 | } | ||
6359 | |||
6360 | return warn_code; | ||
7583 | } | 6361 | } |
7584 | 6362 | ||
7585 | /* | 6363 | static ushort AscInitAsc1000Driver(ASC_DVC_VAR *asc_dvc) |
7586 | * --- Functions Required by the Adv Library | 6364 | { |
7587 | */ | 6365 | ushort warn_code; |
6366 | PortAddr iop_base; | ||
6367 | |||
6368 | iop_base = asc_dvc->iop_base; | ||
6369 | warn_code = 0; | ||
6370 | if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) && | ||
6371 | !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) { | ||
6372 | AscResetChipAndScsiBus(asc_dvc); | ||
6373 | mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */ | ||
6374 | } | ||
6375 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC; | ||
6376 | if (asc_dvc->err_code != 0) | ||
6377 | return UW_ERR; | ||
6378 | if (!AscFindSignature(asc_dvc->iop_base)) { | ||
6379 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
6380 | return warn_code; | ||
6381 | } | ||
6382 | AscDisableInterrupt(iop_base); | ||
6383 | warn_code |= AscInitLram(asc_dvc); | ||
6384 | if (asc_dvc->err_code != 0) | ||
6385 | return UW_ERR; | ||
6386 | ASC_DBG(1, "_asc_mcode_chksum 0x%lx\n", (ulong)_asc_mcode_chksum); | ||
6387 | if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf, | ||
6388 | _asc_mcode_size) != _asc_mcode_chksum) { | ||
6389 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
6390 | return warn_code; | ||
6391 | } | ||
6392 | warn_code |= AscInitMicroCodeVar(asc_dvc); | ||
6393 | asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC; | ||
6394 | AscEnableInterrupt(iop_base); | ||
6395 | return warn_code; | ||
6396 | } | ||
7588 | 6397 | ||
7589 | /* | 6398 | /* |
7590 | * DvcGetPhyAddr() | 6399 | * Load the Microcode |
6400 | * | ||
6401 | * Write the microcode image to RISC memory starting at address 0. | ||
6402 | * | ||
6403 | * The microcode is stored compressed in the following format: | ||
7591 | * | 6404 | * |
7592 | * Return the physical address of 'vaddr' and set '*lenp' to the | 6405 | * 254 word (508 byte) table indexed by byte code followed |
7593 | * number of physically contiguous bytes that follow 'vaddr'. | 6406 | * by the following byte codes: |
7594 | * 'flag' indicates the type of structure whose physical address | ||
7595 | * is being translated. | ||
7596 | * | 6407 | * |
7597 | * Note: Because Linux currently doesn't page the kernel and all | 6408 | * 1-Byte Code: |
7598 | * kernel buffers are physically contiguous, leave '*lenp' unchanged. | 6409 | * 00: Emit word 0 in table. |
6410 | * 01: Emit word 1 in table. | ||
6411 | * . | ||
6412 | * FD: Emit word 253 in table. | ||
6413 | * | ||
6414 | * Multi-Byte Code: | ||
6415 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
6416 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
6417 | * | ||
6418 | * Returns 0 or an error if the checksum doesn't match | ||
7599 | */ | 6419 | */ |
7600 | ADV_PADDR | 6420 | static int AdvLoadMicrocode(AdvPortAddr iop_base, unsigned char *buf, int size, |
7601 | DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq, | 6421 | int memsize, int chksum) |
7602 | uchar *vaddr, ADV_SDCNT *lenp, int flag) | ||
7603 | { | 6422 | { |
7604 | ADV_PADDR paddr; | 6423 | int i, j, end, len = 0; |
6424 | ADV_DCNT sum; | ||
6425 | |||
6426 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
7605 | 6427 | ||
7606 | paddr = virt_to_bus(vaddr); | 6428 | for (i = 253 * 2; i < size; i++) { |
6429 | if (buf[i] == 0xff) { | ||
6430 | unsigned short word = (buf[i + 3] << 8) | buf[i + 2]; | ||
6431 | for (j = 0; j < buf[i + 1]; j++) { | ||
6432 | AdvWriteWordAutoIncLram(iop_base, word); | ||
6433 | len += 2; | ||
6434 | } | ||
6435 | i += 3; | ||
6436 | } else if (buf[i] == 0xfe) { | ||
6437 | unsigned short word = (buf[i + 2] << 8) | buf[i + 1]; | ||
6438 | AdvWriteWordAutoIncLram(iop_base, word); | ||
6439 | i += 2; | ||
6440 | len += 2; | ||
6441 | } else { | ||
6442 | unsigned char off = buf[i] * 2; | ||
6443 | unsigned short word = (buf[off + 1] << 8) | buf[off]; | ||
6444 | AdvWriteWordAutoIncLram(iop_base, word); | ||
6445 | len += 2; | ||
6446 | } | ||
6447 | } | ||
7607 | 6448 | ||
7608 | ASC_DBG4(4, | 6449 | end = len; |
7609 | "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n", | ||
7610 | (ulong)vaddr, (ulong)lenp, (ulong)*((ulong *)lenp), | ||
7611 | (ulong)paddr); | ||
7612 | 6450 | ||
7613 | return paddr; | 6451 | while (len < memsize) { |
6452 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
6453 | len += 2; | ||
6454 | } | ||
6455 | |||
6456 | /* Verify the microcode checksum. */ | ||
6457 | sum = 0; | ||
6458 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
6459 | |||
6460 | for (len = 0; len < end; len += 2) { | ||
6461 | sum += AdvReadWordAutoIncLram(iop_base); | ||
6462 | } | ||
6463 | |||
6464 | if (sum != chksum) | ||
6465 | return ASC_IERR_MCODE_CHKSUM; | ||
6466 | |||
6467 | return 0; | ||
7614 | } | 6468 | } |
7615 | 6469 | ||
7616 | /* | 6470 | static void AdvBuildCarrierFreelist(struct adv_dvc_var *asc_dvc) |
7617 | * Read a PCI configuration byte. | ||
7618 | */ | ||
7619 | static uchar __init DvcAdvReadPCIConfigByte(ADV_DVC_VAR *asc_dvc, ushort offset) | ||
7620 | { | 6471 | { |
7621 | #ifdef CONFIG_PCI | 6472 | ADV_CARR_T *carrp; |
7622 | uchar byte_data; | 6473 | ADV_SDCNT buf_size; |
7623 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); | 6474 | ADV_PADDR carr_paddr; |
7624 | return byte_data; | 6475 | |
7625 | #else /* CONFIG_PCI */ | 6476 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); |
7626 | return 0; | 6477 | asc_dvc->carr_freelist = NULL; |
7627 | #endif /* CONFIG_PCI */ | 6478 | if (carrp == asc_dvc->carrier_buf) { |
6479 | buf_size = ADV_CARRIER_BUFSIZE; | ||
6480 | } else { | ||
6481 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
6482 | } | ||
6483 | |||
6484 | do { | ||
6485 | /* Get physical address of the carrier 'carrp'. */ | ||
6486 | carr_paddr = cpu_to_le32(virt_to_bus(carrp)); | ||
6487 | |||
6488 | buf_size -= sizeof(ADV_CARR_T); | ||
6489 | |||
6490 | carrp->carr_pa = carr_paddr; | ||
6491 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | ||
6492 | |||
6493 | /* | ||
6494 | * Insert the carrier at the beginning of the freelist. | ||
6495 | */ | ||
6496 | carrp->next_vpa = | ||
6497 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
6498 | asc_dvc->carr_freelist = carrp; | ||
6499 | |||
6500 | carrp++; | ||
6501 | } while (buf_size > 0); | ||
7628 | } | 6502 | } |
7629 | 6503 | ||
7630 | /* | 6504 | /* |
7631 | * Write a PCI configuration byte. | 6505 | * Send an idle command to the chip and wait for completion. |
6506 | * | ||
6507 | * Command completion is polled for once per microsecond. | ||
6508 | * | ||
6509 | * The function can be called from anywhere including an interrupt handler. | ||
6510 | * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical() | ||
6511 | * functions to prevent reentrancy. | ||
6512 | * | ||
6513 | * Return Values: | ||
6514 | * ADV_TRUE - command completed successfully | ||
6515 | * ADV_FALSE - command failed | ||
6516 | * ADV_ERROR - command timed out | ||
7632 | */ | 6517 | */ |
7633 | static void __init | 6518 | static int |
7634 | DvcAdvWritePCIConfigByte(ADV_DVC_VAR *asc_dvc, ushort offset, uchar byte_data) | 6519 | AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, |
6520 | ushort idle_cmd, ADV_DCNT idle_cmd_parameter) | ||
7635 | { | 6521 | { |
7636 | #ifdef CONFIG_PCI | 6522 | int result; |
7637 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); | 6523 | ADV_DCNT i, j; |
7638 | #else /* CONFIG_PCI */ | 6524 | AdvPortAddr iop_base; |
7639 | return; | 6525 | |
7640 | #endif /* CONFIG_PCI */ | 6526 | iop_base = asc_dvc->iop_base; |
6527 | |||
6528 | /* | ||
6529 | * Clear the idle command status which is set by the microcode | ||
6530 | * to a non-zero value to indicate when the command is completed. | ||
6531 | * The non-zero result is one of the IDLE_CMD_STATUS_* values | ||
6532 | */ | ||
6533 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0); | ||
6534 | |||
6535 | /* | ||
6536 | * Write the idle command value after the idle command parameter | ||
6537 | * has been written to avoid a race condition. If the order is not | ||
6538 | * followed, the microcode may process the idle command before the | ||
6539 | * parameters have been written to LRAM. | ||
6540 | */ | ||
6541 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER, | ||
6542 | cpu_to_le32(idle_cmd_parameter)); | ||
6543 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd); | ||
6544 | |||
6545 | /* | ||
6546 | * Tickle the RISC to tell it to process the idle command. | ||
6547 | */ | ||
6548 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B); | ||
6549 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
6550 | /* | ||
6551 | * Clear the tickle value. In the ASC-3550 the RISC flag | ||
6552 | * command 'clr_tickle_b' does not work unless the host | ||
6553 | * value is cleared. | ||
6554 | */ | ||
6555 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); | ||
6556 | } | ||
6557 | |||
6558 | /* Wait for up to 100 millisecond for the idle command to timeout. */ | ||
6559 | for (i = 0; i < SCSI_WAIT_100_MSEC; i++) { | ||
6560 | /* Poll once each microsecond for command completion. */ | ||
6561 | for (j = 0; j < SCSI_US_PER_MSEC; j++) { | ||
6562 | AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, | ||
6563 | result); | ||
6564 | if (result != 0) | ||
6565 | return result; | ||
6566 | udelay(1); | ||
6567 | } | ||
6568 | } | ||
6569 | |||
6570 | BUG(); /* The idle command should never timeout. */ | ||
6571 | return ADV_ERROR; | ||
7641 | } | 6572 | } |
7642 | 6573 | ||
7643 | /* | 6574 | /* |
7644 | * --- Tracing and Debugging Functions | 6575 | * Reset SCSI Bus and purge all outstanding requests. |
6576 | * | ||
6577 | * Return Value: | ||
6578 | * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset. | ||
6579 | * ADV_FALSE(0) - Microcode command failed. | ||
6580 | * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC | ||
6581 | * may be hung which requires driver recovery. | ||
7645 | */ | 6582 | */ |
6583 | static int AdvResetSB(ADV_DVC_VAR *asc_dvc) | ||
6584 | { | ||
6585 | int status; | ||
6586 | |||
6587 | /* | ||
6588 | * Send the SCSI Bus Reset idle start idle command which asserts | ||
6589 | * the SCSI Bus Reset signal. | ||
6590 | */ | ||
6591 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_START, 0L); | ||
6592 | if (status != ADV_TRUE) { | ||
6593 | return status; | ||
6594 | } | ||
6595 | |||
6596 | /* | ||
6597 | * Delay for the specified SCSI Bus Reset hold time. | ||
6598 | * | ||
6599 | * The hold time delay is done on the host because the RISC has no | ||
6600 | * microsecond accurate timer. | ||
6601 | */ | ||
6602 | udelay(ASC_SCSI_RESET_HOLD_TIME_US); | ||
6603 | |||
6604 | /* | ||
6605 | * Send the SCSI Bus Reset end idle command which de-asserts | ||
6606 | * the SCSI Bus Reset signal and purges any pending requests. | ||
6607 | */ | ||
6608 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_END, 0L); | ||
6609 | if (status != ADV_TRUE) { | ||
6610 | return status; | ||
6611 | } | ||
6612 | |||
6613 | mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */ | ||
6614 | |||
6615 | return status; | ||
6616 | } | ||
7646 | 6617 | ||
7647 | #ifdef ADVANSYS_STATS | ||
7648 | #ifdef CONFIG_PROC_FS | ||
7649 | /* | 6618 | /* |
7650 | * asc_prt_board_stats() | 6619 | * Initialize the ASC-3550. |
7651 | * | 6620 | * |
7652 | * Note: no single line should be greater than ASC_PRTLINE_SIZE, | 6621 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. |
7653 | * cf. asc_prt_line(). | ||
7654 | * | 6622 | * |
7655 | * Return the number of characters copied into 'cp'. No more than | 6623 | * For a non-fatal error return a warning code. If there are no warnings |
7656 | * 'cplen' characters will be copied to 'cp'. | 6624 | * then 0 is returned. |
6625 | * | ||
6626 | * Needed after initialization for error recovery. | ||
7657 | */ | 6627 | */ |
7658 | static int asc_prt_board_stats(struct Scsi_Host *shost, char *cp, int cplen) | 6628 | static int AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc) |
7659 | { | 6629 | { |
7660 | int leftlen; | 6630 | AdvPortAddr iop_base; |
7661 | int totlen; | 6631 | ushort warn_code; |
7662 | int len; | 6632 | int begin_addr; |
7663 | struct asc_stats *s; | 6633 | int end_addr; |
7664 | asc_board_t *boardp; | 6634 | ushort code_sum; |
6635 | int word; | ||
6636 | int i; | ||
6637 | ushort scsi_cfg1; | ||
6638 | uchar tid; | ||
6639 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
6640 | ushort wdtr_able = 0, sdtr_able, tagqng_able; | ||
6641 | uchar max_cmd[ADV_MAX_TID + 1]; | ||
7665 | 6642 | ||
7666 | leftlen = cplen; | 6643 | /* If there is already an error, don't continue. */ |
7667 | totlen = len = 0; | 6644 | if (asc_dvc->err_code != 0) |
6645 | return ADV_ERROR; | ||
7668 | 6646 | ||
7669 | boardp = ASC_BOARDP(shost); | 6647 | /* |
7670 | s = &boardp->asc_stats; | 6648 | * The caller must set 'chip_type' to ADV_CHIP_ASC3550. |
6649 | */ | ||
6650 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550) { | ||
6651 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
6652 | return ADV_ERROR; | ||
6653 | } | ||
7671 | 6654 | ||
7672 | len = asc_prt_line(cp, leftlen, | 6655 | warn_code = 0; |
7673 | "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n", | 6656 | iop_base = asc_dvc->iop_base; |
7674 | shost->host_no); | ||
7675 | ASC_PRT_NEXT(); | ||
7676 | 6657 | ||
7677 | len = asc_prt_line(cp, leftlen, | 6658 | /* |
7678 | " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n", | 6659 | * Save the RISC memory BIOS region before writing the microcode. |
7679 | s->queuecommand, s->reset, s->biosparam, | 6660 | * The BIOS may already be loaded and using its RISC LRAM region |
7680 | s->interrupt); | 6661 | * so its region must be saved and restored. |
7681 | ASC_PRT_NEXT(); | 6662 | * |
6663 | * Note: This code makes the assumption, which is currently true, | ||
6664 | * that a chip reset does not clear RISC LRAM. | ||
6665 | */ | ||
6666 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
6667 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
6668 | bios_mem[i]); | ||
6669 | } | ||
7682 | 6670 | ||
7683 | len = asc_prt_line(cp, leftlen, | 6671 | /* |
7684 | " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n", | 6672 | * Save current per TID negotiated values. |
7685 | s->callback, s->done, s->build_error, | 6673 | */ |
7686 | s->adv_build_noreq, s->adv_build_nosg); | 6674 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == 0x55AA) { |
7687 | ASC_PRT_NEXT(); | 6675 | ushort bios_version, major, minor; |
7688 | 6676 | ||
7689 | len = asc_prt_line(cp, leftlen, | 6677 | bios_version = |
7690 | " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n", | 6678 | bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM) / 2]; |
7691 | s->exe_noerror, s->exe_busy, s->exe_error, | 6679 | major = (bios_version >> 12) & 0xF; |
7692 | s->exe_unknown); | 6680 | minor = (bios_version >> 8) & 0xF; |
7693 | ASC_PRT_NEXT(); | 6681 | if (major < 3 || (major == 3 && minor == 1)) { |
6682 | /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */ | ||
6683 | AdvReadWordLram(iop_base, 0x120, wdtr_able); | ||
6684 | } else { | ||
6685 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
6686 | } | ||
6687 | } | ||
6688 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
6689 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
6690 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
6691 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
6692 | max_cmd[tid]); | ||
6693 | } | ||
6694 | |||
6695 | asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc3550_buf, | ||
6696 | _adv_asc3550_size, ADV_3550_MEMSIZE, | ||
6697 | _adv_asc3550_chksum); | ||
6698 | if (asc_dvc->err_code) | ||
6699 | return ADV_ERROR; | ||
7694 | 6700 | ||
7695 | /* | 6701 | /* |
7696 | * Display data transfer statistics. | 6702 | * Restore the RISC memory BIOS region. |
7697 | */ | 6703 | */ |
7698 | if (s->cont_cnt > 0) { | 6704 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { |
7699 | len = asc_prt_line(cp, leftlen, " cont_cnt %lu, ", s->cont_cnt); | 6705 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), |
7700 | ASC_PRT_NEXT(); | 6706 | bios_mem[i]); |
6707 | } | ||
7701 | 6708 | ||
7702 | len = asc_prt_line(cp, leftlen, "cont_xfer %lu.%01lu kb ", | 6709 | /* |
7703 | s->cont_xfer / 2, | 6710 | * Calculate and write the microcode code checksum to the microcode |
7704 | ASC_TENTHS(s->cont_xfer, 2)); | 6711 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). |
7705 | ASC_PRT_NEXT(); | 6712 | */ |
6713 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
6714 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
6715 | code_sum = 0; | ||
6716 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
6717 | for (word = begin_addr; word < end_addr; word += 2) { | ||
6718 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
6719 | } | ||
6720 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
7706 | 6721 | ||
7707 | /* Contiguous transfer average size */ | 6722 | /* |
7708 | len = asc_prt_line(cp, leftlen, "avg_xfer %lu.%01lu kb\n", | 6723 | * Read and save microcode version and date. |
7709 | (s->cont_xfer / 2) / s->cont_cnt, | 6724 | */ |
7710 | ASC_TENTHS((s->cont_xfer / 2), s->cont_cnt)); | 6725 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, |
7711 | ASC_PRT_NEXT(); | 6726 | asc_dvc->cfg->mcode_date); |
6727 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
6728 | asc_dvc->cfg->mcode_version); | ||
6729 | |||
6730 | /* | ||
6731 | * Set the chip type to indicate the ASC3550. | ||
6732 | */ | ||
6733 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550); | ||
6734 | |||
6735 | /* | ||
6736 | * If the PCI Configuration Command Register "Parity Error Response | ||
6737 | * Control" Bit was clear (0), then set the microcode variable | ||
6738 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
6739 | * to ignore DMA parity errors. | ||
6740 | */ | ||
6741 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
6742 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
6743 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
6744 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7712 | } | 6745 | } |
7713 | 6746 | ||
7714 | if (s->sg_cnt > 0) { | 6747 | /* |
6748 | * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO | ||
6749 | * threshold of 128 bytes. This register is only accessible to the host. | ||
6750 | */ | ||
6751 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
6752 | START_CTL_EMFU | READ_CMD_MRM); | ||
7715 | 6753 | ||
7716 | len = asc_prt_line(cp, leftlen, " sg_cnt %lu, sg_elem %lu, ", | 6754 | /* |
7717 | s->sg_cnt, s->sg_elem); | 6755 | * Microcode operating variables for WDTR, SDTR, and command tag |
7718 | ASC_PRT_NEXT(); | 6756 | * queuing will be set in slave_configure() based on what a |
6757 | * device reports it is capable of in Inquiry byte 7. | ||
6758 | * | ||
6759 | * If SCSI Bus Resets have been disabled, then directly set | ||
6760 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
6761 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
6762 | * the Inquiry caused by host and target mismatched DTR values. | ||
6763 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
6764 | * be assumed to be in Asynchronous, Narrow mode. | ||
6765 | */ | ||
6766 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
6767 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
6768 | asc_dvc->wdtr_able); | ||
6769 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
6770 | asc_dvc->sdtr_able); | ||
6771 | } | ||
7719 | 6772 | ||
7720 | len = asc_prt_line(cp, leftlen, "sg_xfer %lu.%01lu kb\n", | 6773 | /* |
7721 | s->sg_xfer / 2, ASC_TENTHS(s->sg_xfer, 2)); | 6774 | * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2, |
7722 | ASC_PRT_NEXT(); | 6775 | * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID |
6776 | * bitmask. These values determine the maximum SDTR speed negotiated | ||
6777 | * with a device. | ||
6778 | * | ||
6779 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
6780 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
6781 | * without determining here whether the device supports SDTR. | ||
6782 | * | ||
6783 | * 4-bit speed SDTR speed name | ||
6784 | * =========== =============== | ||
6785 | * 0000b (0x0) SDTR disabled | ||
6786 | * 0001b (0x1) 5 Mhz | ||
6787 | * 0010b (0x2) 10 Mhz | ||
6788 | * 0011b (0x3) 20 Mhz (Ultra) | ||
6789 | * 0100b (0x4) 40 Mhz (LVD/Ultra2) | ||
6790 | * 0101b (0x5) 80 Mhz (LVD2/Ultra3) | ||
6791 | * 0110b (0x6) Undefined | ||
6792 | * . | ||
6793 | * 1111b (0xF) Undefined | ||
6794 | */ | ||
6795 | word = 0; | ||
6796 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
6797 | if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) { | ||
6798 | /* Set Ultra speed for TID 'tid'. */ | ||
6799 | word |= (0x3 << (4 * (tid % 4))); | ||
6800 | } else { | ||
6801 | /* Set Fast speed for TID 'tid'. */ | ||
6802 | word |= (0x2 << (4 * (tid % 4))); | ||
6803 | } | ||
6804 | if (tid == 3) { /* Check if done with sdtr_speed1. */ | ||
6805 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word); | ||
6806 | word = 0; | ||
6807 | } else if (tid == 7) { /* Check if done with sdtr_speed2. */ | ||
6808 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word); | ||
6809 | word = 0; | ||
6810 | } else if (tid == 11) { /* Check if done with sdtr_speed3. */ | ||
6811 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word); | ||
6812 | word = 0; | ||
6813 | } else if (tid == 15) { /* Check if done with sdtr_speed4. */ | ||
6814 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word); | ||
6815 | /* End of loop. */ | ||
6816 | } | ||
6817 | } | ||
7723 | 6818 | ||
7724 | /* Scatter gather transfer statistics */ | 6819 | /* |
7725 | len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ", | 6820 | * Set microcode operating variable for the disconnect per TID bitmask. |
7726 | s->sg_elem / s->sg_cnt, | 6821 | */ |
7727 | ASC_TENTHS(s->sg_elem, s->sg_cnt)); | 6822 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, |
7728 | ASC_PRT_NEXT(); | 6823 | asc_dvc->cfg->disc_enable); |
7729 | 6824 | ||
7730 | len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ", | 6825 | /* |
7731 | (s->sg_xfer / 2) / s->sg_elem, | 6826 | * Set SCSI_CFG0 Microcode Default Value. |
7732 | ASC_TENTHS((s->sg_xfer / 2), s->sg_elem)); | 6827 | * |
7733 | ASC_PRT_NEXT(); | 6828 | * The microcode will set the SCSI_CFG0 register using this value |
6829 | * after it is started below. | ||
6830 | */ | ||
6831 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
6832 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
6833 | asc_dvc->chip_scsi_id); | ||
7734 | 6834 | ||
7735 | len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n", | 6835 | /* |
7736 | (s->sg_xfer / 2) / s->sg_cnt, | 6836 | * Determine SCSI_CFG1 Microcode Default Value. |
7737 | ASC_TENTHS((s->sg_xfer / 2), s->sg_cnt)); | 6837 | * |
7738 | ASC_PRT_NEXT(); | 6838 | * The microcode will set the SCSI_CFG1 register using this value |
6839 | * after it is started below. | ||
6840 | */ | ||
6841 | |||
6842 | /* Read current SCSI_CFG1 Register value. */ | ||
6843 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
6844 | |||
6845 | /* | ||
6846 | * If all three connectors are in use, return an error. | ||
6847 | */ | ||
6848 | if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 || | ||
6849 | (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) { | ||
6850 | asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION; | ||
6851 | return ADV_ERROR; | ||
7739 | } | 6852 | } |
7740 | 6853 | ||
7741 | /* | 6854 | /* |
7742 | * Display request queuing statistics. | 6855 | * If the internal narrow cable is reversed all of the SCSI_CTRL |
6856 | * register signals will be set. Check for and return an error if | ||
6857 | * this condition is found. | ||
7743 | */ | 6858 | */ |
7744 | len = asc_prt_line(cp, leftlen, | 6859 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { |
7745 | " Active and Waiting Request Queues (Time Unit: %d HZ):\n", | 6860 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; |
7746 | HZ); | 6861 | return ADV_ERROR; |
7747 | ASC_PRT_NEXT(); | 6862 | } |
7748 | 6863 | ||
7749 | return totlen; | 6864 | /* |
6865 | * If this is a differential board and a single-ended device | ||
6866 | * is attached to one of the connectors, return an error. | ||
6867 | */ | ||
6868 | if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) { | ||
6869 | asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE; | ||
6870 | return ADV_ERROR; | ||
6871 | } | ||
6872 | |||
6873 | /* | ||
6874 | * If automatic termination control is enabled, then set the | ||
6875 | * termination value based on a table listed in a_condor.h. | ||
6876 | * | ||
6877 | * If manual termination was specified with an EEPROM setting | ||
6878 | * then 'termination' was set-up in AdvInitFrom3550EEPROM() and | ||
6879 | * is ready to be 'ored' into SCSI_CFG1. | ||
6880 | */ | ||
6881 | if (asc_dvc->cfg->termination == 0) { | ||
6882 | /* | ||
6883 | * The software always controls termination by setting TERM_CTL_SEL. | ||
6884 | * If TERM_CTL_SEL were set to 0, the hardware would set termination. | ||
6885 | */ | ||
6886 | asc_dvc->cfg->termination |= TERM_CTL_SEL; | ||
6887 | |||
6888 | switch (scsi_cfg1 & CABLE_DETECT) { | ||
6889 | /* TERM_CTL_H: on, TERM_CTL_L: on */ | ||
6890 | case 0x3: | ||
6891 | case 0x7: | ||
6892 | case 0xB: | ||
6893 | case 0xD: | ||
6894 | case 0xE: | ||
6895 | case 0xF: | ||
6896 | asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L); | ||
6897 | break; | ||
6898 | |||
6899 | /* TERM_CTL_H: on, TERM_CTL_L: off */ | ||
6900 | case 0x1: | ||
6901 | case 0x5: | ||
6902 | case 0x9: | ||
6903 | case 0xA: | ||
6904 | case 0xC: | ||
6905 | asc_dvc->cfg->termination |= TERM_CTL_H; | ||
6906 | break; | ||
6907 | |||
6908 | /* TERM_CTL_H: off, TERM_CTL_L: off */ | ||
6909 | case 0x2: | ||
6910 | case 0x6: | ||
6911 | break; | ||
6912 | } | ||
6913 | } | ||
6914 | |||
6915 | /* | ||
6916 | * Clear any set TERM_CTL_H and TERM_CTL_L bits. | ||
6917 | */ | ||
6918 | scsi_cfg1 &= ~TERM_CTL; | ||
6919 | |||
6920 | /* | ||
6921 | * Invert the TERM_CTL_H and TERM_CTL_L bits and then | ||
6922 | * set 'scsi_cfg1'. The TERM_POL bit does not need to be | ||
6923 | * referenced, because the hardware internally inverts | ||
6924 | * the Termination High and Low bits if TERM_POL is set. | ||
6925 | */ | ||
6926 | scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL)); | ||
6927 | |||
6928 | /* | ||
6929 | * Set SCSI_CFG1 Microcode Default Value | ||
6930 | * | ||
6931 | * Set filter value and possibly modified termination control | ||
6932 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
6933 | * | ||
6934 | * The microcode will set the SCSI_CFG1 register using this value | ||
6935 | * after it is started below. | ||
6936 | */ | ||
6937 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, | ||
6938 | FLTR_DISABLE | scsi_cfg1); | ||
6939 | |||
6940 | /* | ||
6941 | * Set MEM_CFG Microcode Default Value | ||
6942 | * | ||
6943 | * The microcode will set the MEM_CFG register using this value | ||
6944 | * after it is started below. | ||
6945 | * | ||
6946 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
6947 | * are defined. | ||
6948 | * | ||
6949 | * ASC-3550 has 8KB internal memory. | ||
6950 | */ | ||
6951 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
6952 | BIOS_EN | RAM_SZ_8KB); | ||
6953 | |||
6954 | /* | ||
6955 | * Set SEL_MASK Microcode Default Value | ||
6956 | * | ||
6957 | * The microcode will set the SEL_MASK register using this value | ||
6958 | * after it is started below. | ||
6959 | */ | ||
6960 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
6961 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
6962 | |||
6963 | AdvBuildCarrierFreelist(asc_dvc); | ||
6964 | |||
6965 | /* | ||
6966 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | ||
6967 | */ | ||
6968 | |||
6969 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { | ||
6970 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
6971 | return ADV_ERROR; | ||
6972 | } | ||
6973 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
6974 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | ||
6975 | |||
6976 | /* | ||
6977 | * The first command issued will be placed in the stopper carrier. | ||
6978 | */ | ||
6979 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
6980 | |||
6981 | /* | ||
6982 | * Set RISC ICQ physical address start value. | ||
6983 | */ | ||
6984 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
6985 | |||
6986 | /* | ||
6987 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
6988 | */ | ||
6989 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
6990 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
6991 | return ADV_ERROR; | ||
6992 | } | ||
6993 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
6994 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
6995 | |||
6996 | /* | ||
6997 | * The first command completed by the RISC will be placed in | ||
6998 | * the stopper. | ||
6999 | * | ||
7000 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
7001 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
7002 | */ | ||
7003 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
7004 | |||
7005 | /* | ||
7006 | * Set RISC IRQ physical address start value. | ||
7007 | */ | ||
7008 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
7009 | asc_dvc->carr_pending_cnt = 0; | ||
7010 | |||
7011 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
7012 | (ADV_INTR_ENABLE_HOST_INTR | | ||
7013 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
7014 | |||
7015 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
7016 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
7017 | |||
7018 | /* finally, finally, gentlemen, start your engine */ | ||
7019 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
7020 | |||
7021 | /* | ||
7022 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
7023 | * Resets should be performed. The RISC has to be running | ||
7024 | * to issue a SCSI Bus Reset. | ||
7025 | */ | ||
7026 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
7027 | /* | ||
7028 | * If the BIOS Signature is present in memory, restore the | ||
7029 | * BIOS Handshake Configuration Table and do not perform | ||
7030 | * a SCSI Bus Reset. | ||
7031 | */ | ||
7032 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
7033 | 0x55AA) { | ||
7034 | /* | ||
7035 | * Restore per TID negotiated values. | ||
7036 | */ | ||
7037 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
7038 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
7039 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
7040 | tagqng_able); | ||
7041 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
7042 | AdvWriteByteLram(iop_base, | ||
7043 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
7044 | max_cmd[tid]); | ||
7045 | } | ||
7046 | } else { | ||
7047 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
7048 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
7049 | } | ||
7050 | } | ||
7051 | } | ||
7052 | |||
7053 | return warn_code; | ||
7750 | } | 7054 | } |
7751 | 7055 | ||
7752 | /* | 7056 | /* |
7753 | * asc_prt_target_stats() | 7057 | * Initialize the ASC-38C0800. |
7754 | * | 7058 | * |
7755 | * Note: no single line should be greater than ASC_PRTLINE_SIZE, | 7059 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. |
7756 | * cf. asc_prt_line(). | ||
7757 | * | 7060 | * |
7758 | * This is separated from asc_prt_board_stats because a full set | 7061 | * For a non-fatal error return a warning code. If there are no warnings |
7759 | * of targets will overflow ASC_PRTBUF_SIZE. | 7062 | * then 0 is returned. |
7760 | * | 7063 | * |
7761 | * Return the number of characters copied into 'cp'. No more than | 7064 | * Needed after initialization for error recovery. |
7762 | * 'cplen' characters will be copied to 'cp'. | ||
7763 | */ | 7065 | */ |
7764 | static int | 7066 | static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc) |
7765 | asc_prt_target_stats(struct Scsi_Host *shost, int tgt_id, char *cp, int cplen) | ||
7766 | { | 7067 | { |
7767 | int leftlen; | 7068 | AdvPortAddr iop_base; |
7768 | int totlen; | 7069 | ushort warn_code; |
7769 | int len; | 7070 | int begin_addr; |
7770 | struct asc_stats *s; | 7071 | int end_addr; |
7771 | ushort chip_scsi_id; | 7072 | ushort code_sum; |
7772 | asc_board_t *boardp; | 7073 | int word; |
7773 | asc_queue_t *active; | 7074 | int i; |
7774 | asc_queue_t *waiting; | 7075 | ushort scsi_cfg1; |
7076 | uchar byte; | ||
7077 | uchar tid; | ||
7078 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
7079 | ushort wdtr_able, sdtr_able, tagqng_able; | ||
7080 | uchar max_cmd[ADV_MAX_TID + 1]; | ||
7775 | 7081 | ||
7776 | leftlen = cplen; | 7082 | /* If there is already an error, don't continue. */ |
7777 | totlen = len = 0; | 7083 | if (asc_dvc->err_code != 0) |
7084 | return ADV_ERROR; | ||
7778 | 7085 | ||
7779 | boardp = ASC_BOARDP(shost); | 7086 | /* |
7780 | s = &boardp->asc_stats; | 7087 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800. |
7088 | */ | ||
7089 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) { | ||
7090 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
7091 | return ADV_ERROR; | ||
7092 | } | ||
7781 | 7093 | ||
7782 | active = &ASC_BOARDP(shost)->active; | 7094 | warn_code = 0; |
7783 | waiting = &ASC_BOARDP(shost)->waiting; | 7095 | iop_base = asc_dvc->iop_base; |
7784 | 7096 | ||
7785 | if (ASC_NARROW_BOARD(boardp)) { | 7097 | /* |
7786 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; | 7098 | * Save the RISC memory BIOS region before writing the microcode. |
7787 | } else { | 7099 | * The BIOS may already be loaded and using its RISC LRAM region |
7788 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; | 7100 | * so its region must be saved and restored. |
7101 | * | ||
7102 | * Note: This code makes the assumption, which is currently true, | ||
7103 | * that a chip reset does not clear RISC LRAM. | ||
7104 | */ | ||
7105 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
7106 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
7107 | bios_mem[i]); | ||
7789 | } | 7108 | } |
7790 | 7109 | ||
7791 | if ((chip_scsi_id == tgt_id) || | 7110 | /* |
7792 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(tgt_id)) == 0)) { | 7111 | * Save current per TID negotiated values. |
7793 | return 0; | 7112 | */ |
7113 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
7114 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
7115 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
7116 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
7117 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
7118 | max_cmd[tid]); | ||
7794 | } | 7119 | } |
7795 | 7120 | ||
7796 | do { | 7121 | /* |
7797 | if (active->q_tot_cnt[tgt_id] > 0 | 7122 | * RAM BIST (RAM Built-In Self Test) |
7798 | || waiting->q_tot_cnt[tgt_id] > 0) { | 7123 | * |
7799 | len = asc_prt_line(cp, leftlen, " target %d\n", tgt_id); | 7124 | * Address : I/O base + offset 0x38h register (byte). |
7800 | ASC_PRT_NEXT(); | 7125 | * Function: Bit 7-6(RW) : RAM mode |
7126 | * Normal Mode : 0x00 | ||
7127 | * Pre-test Mode : 0x40 | ||
7128 | * RAM Test Mode : 0x80 | ||
7129 | * Bit 5 : unused | ||
7130 | * Bit 4(RO) : Done bit | ||
7131 | * Bit 3-0(RO) : Status | ||
7132 | * Host Error : 0x08 | ||
7133 | * Int_RAM Error : 0x04 | ||
7134 | * RISC Error : 0x02 | ||
7135 | * SCSI Error : 0x01 | ||
7136 | * No Error : 0x00 | ||
7137 | * | ||
7138 | * Note: RAM BIST code should be put right here, before loading the | ||
7139 | * microcode and after saving the RISC memory BIOS region. | ||
7140 | */ | ||
7801 | 7141 | ||
7802 | len = asc_prt_line(cp, leftlen, | 7142 | /* |
7803 | " active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n", | 7143 | * LRAM Pre-test |
7804 | active->q_cur_cnt[tgt_id], | 7144 | * |
7805 | active->q_max_cnt[tgt_id], | 7145 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. |
7806 | active->q_tot_cnt[tgt_id], | 7146 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return |
7807 | active->q_min_tim[tgt_id], | 7147 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset |
7808 | active->q_max_tim[tgt_id], | 7148 | * to NORMAL_MODE, return an error too. |
7809 | (active->q_tot_cnt[tgt_id] == | 7149 | */ |
7810 | 0) ? 0 : (active-> | 7150 | for (i = 0; i < 2; i++) { |
7811 | q_tot_tim[tgt_id] / | 7151 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); |
7812 | active-> | 7152 | mdelay(10); /* Wait for 10ms before reading back. */ |
7813 | q_tot_cnt[tgt_id]), | 7153 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); |
7814 | (active->q_tot_cnt[tgt_id] == | 7154 | if ((byte & RAM_TEST_DONE) == 0 |
7815 | 0) ? 0 : ASC_TENTHS(active-> | 7155 | || (byte & 0x0F) != PRE_TEST_VALUE) { |
7816 | q_tot_tim | 7156 | asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST; |
7817 | [tgt_id], | 7157 | return ADV_ERROR; |
7818 | active-> | 7158 | } |
7819 | q_tot_cnt | ||
7820 | [tgt_id])); | ||
7821 | ASC_PRT_NEXT(); | ||
7822 | 7159 | ||
7823 | len = asc_prt_line(cp, leftlen, | 7160 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); |
7824 | " waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n", | 7161 | mdelay(10); /* Wait for 10ms before reading back. */ |
7825 | waiting->q_cur_cnt[tgt_id], | 7162 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) |
7826 | waiting->q_max_cnt[tgt_id], | 7163 | != NORMAL_VALUE) { |
7827 | waiting->q_tot_cnt[tgt_id], | 7164 | asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST; |
7828 | waiting->q_min_tim[tgt_id], | 7165 | return ADV_ERROR; |
7829 | waiting->q_max_tim[tgt_id], | ||
7830 | (waiting->q_tot_cnt[tgt_id] == | ||
7831 | 0) ? 0 : (waiting-> | ||
7832 | q_tot_tim[tgt_id] / | ||
7833 | waiting-> | ||
7834 | q_tot_cnt[tgt_id]), | ||
7835 | (waiting->q_tot_cnt[tgt_id] == | ||
7836 | 0) ? 0 : ASC_TENTHS(waiting-> | ||
7837 | q_tot_tim | ||
7838 | [tgt_id], | ||
7839 | waiting-> | ||
7840 | q_tot_cnt | ||
7841 | [tgt_id])); | ||
7842 | ASC_PRT_NEXT(); | ||
7843 | } | 7166 | } |
7844 | } while (0); | 7167 | } |
7845 | 7168 | ||
7846 | return totlen; | 7169 | /* |
7847 | } | 7170 | * LRAM Test - It takes about 1.5 ms to run through the test. |
7848 | #endif /* CONFIG_PROC_FS */ | 7171 | * |
7849 | #endif /* ADVANSYS_STATS */ | 7172 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. |
7173 | * If Done bit not set or Status not 0, save register byte, set the | ||
7174 | * err_code, and return an error. | ||
7175 | */ | ||
7176 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); | ||
7177 | mdelay(10); /* Wait for 10ms before checking status. */ | ||
7850 | 7178 | ||
7851 | #ifdef ADVANSYS_DEBUG | 7179 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); |
7852 | /* | 7180 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { |
7853 | * asc_prt_scsi_host() | 7181 | /* Get here if Done bit not set or Status not 0. */ |
7854 | */ | 7182 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ |
7855 | static void asc_prt_scsi_host(struct Scsi_Host *s) | 7183 | asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST; |
7856 | { | 7184 | return ADV_ERROR; |
7857 | asc_board_t *boardp; | 7185 | } |
7858 | 7186 | ||
7859 | boardp = ASC_BOARDP(s); | 7187 | /* We need to reset back to normal mode after LRAM test passes. */ |
7188 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
7860 | 7189 | ||
7861 | printk("Scsi_Host at addr 0x%lx\n", (ulong)s); | 7190 | asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C0800_buf, |
7862 | printk(" host_busy %u, host_no %d, last_reset %d,\n", | 7191 | _adv_asc38C0800_size, ADV_38C0800_MEMSIZE, |
7863 | s->host_busy, s->host_no, (unsigned)s->last_reset); | 7192 | _adv_asc38C0800_chksum); |
7193 | if (asc_dvc->err_code) | ||
7194 | return ADV_ERROR; | ||
7864 | 7195 | ||
7865 | printk(" base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,\n", | 7196 | /* |
7866 | (ulong)s->base, (ulong)s->io_port, s->n_io_port, s->irq); | 7197 | * Restore the RISC memory BIOS region. |
7198 | */ | ||
7199 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
7200 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
7201 | bios_mem[i]); | ||
7202 | } | ||
7867 | 7203 | ||
7868 | printk(" dma_channel %d, this_id %d, can_queue %d,\n", | 7204 | /* |
7869 | s->dma_channel, s->this_id, s->can_queue); | 7205 | * Calculate and write the microcode code checksum to the microcode |
7206 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
7207 | */ | ||
7208 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
7209 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
7210 | code_sum = 0; | ||
7211 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
7212 | for (word = begin_addr; word < end_addr; word += 2) { | ||
7213 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
7214 | } | ||
7215 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
7870 | 7216 | ||
7871 | printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n", | 7217 | /* |
7872 | s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma); | 7218 | * Read microcode version and date. |
7219 | */ | ||
7220 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
7221 | asc_dvc->cfg->mcode_date); | ||
7222 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
7223 | asc_dvc->cfg->mcode_version); | ||
7873 | 7224 | ||
7874 | if (ASC_NARROW_BOARD(boardp)) { | 7225 | /* |
7875 | asc_prt_asc_dvc_var(&ASC_BOARDP(s)->dvc_var.asc_dvc_var); | 7226 | * Set the chip type to indicate the ASC38C0800. |
7876 | asc_prt_asc_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.asc_dvc_cfg); | 7227 | */ |
7877 | } else { | 7228 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800); |
7878 | asc_prt_adv_dvc_var(&ASC_BOARDP(s)->dvc_var.adv_dvc_var); | 7229 | |
7879 | asc_prt_adv_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.adv_dvc_cfg); | 7230 | /* |
7231 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
7232 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
7233 | * cable detection and then we are able to read C_DET[3:0]. | ||
7234 | * | ||
7235 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
7236 | * Microcode Default Value' section below. | ||
7237 | */ | ||
7238 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
7239 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
7240 | scsi_cfg1 | DIS_TERM_DRV); | ||
7241 | |||
7242 | /* | ||
7243 | * If the PCI Configuration Command Register "Parity Error Response | ||
7244 | * Control" Bit was clear (0), then set the microcode variable | ||
7245 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
7246 | * to ignore DMA parity errors. | ||
7247 | */ | ||
7248 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
7249 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7250 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
7251 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7880 | } | 7252 | } |
7881 | } | ||
7882 | 7253 | ||
7883 | /* | 7254 | /* |
7884 | * asc_prt_scsi_cmnd() | 7255 | * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2] |
7885 | */ | 7256 | * bits for the default FIFO threshold. |
7886 | static void asc_prt_scsi_cmnd(struct scsi_cmnd *s) | 7257 | * |
7887 | { | 7258 | * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes. |
7888 | printk("struct scsi_cmnd at addr 0x%lx\n", (ulong)s); | 7259 | * |
7260 | * For DMA Errata #4 set the BC_THRESH_ENB bit. | ||
7261 | */ | ||
7262 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
7263 | BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH | | ||
7264 | READ_CMD_MRM); | ||
7889 | 7265 | ||
7890 | printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n", | 7266 | /* |
7891 | (ulong)s->device->host, (ulong)s->device, s->device->id, | 7267 | * Microcode operating variables for WDTR, SDTR, and command tag |
7892 | s->device->lun, s->device->channel); | 7268 | * queuing will be set in slave_configure() based on what a |
7269 | * device reports it is capable of in Inquiry byte 7. | ||
7270 | * | ||
7271 | * If SCSI Bus Resets have been disabled, then directly set | ||
7272 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
7273 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
7274 | * the Inquiry caused by host and target mismatched DTR values. | ||
7275 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
7276 | * be assumed to be in Asynchronous, Narrow mode. | ||
7277 | */ | ||
7278 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
7279 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
7280 | asc_dvc->wdtr_able); | ||
7281 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
7282 | asc_dvc->sdtr_able); | ||
7283 | } | ||
7893 | 7284 | ||
7894 | asc_prt_hex(" CDB", s->cmnd, s->cmd_len); | 7285 | /* |
7286 | * Set microcode operating variables for DISC and SDTR_SPEED1, | ||
7287 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM | ||
7288 | * configuration values. | ||
7289 | * | ||
7290 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
7291 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
7292 | * without determining here whether the device supports SDTR. | ||
7293 | */ | ||
7294 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | ||
7295 | asc_dvc->cfg->disc_enable); | ||
7296 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
7297 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
7298 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
7299 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
7895 | 7300 | ||
7896 | printk("sc_data_direction %u, resid %d\n", | 7301 | /* |
7897 | s->sc_data_direction, s->resid); | 7302 | * Set SCSI_CFG0 Microcode Default Value. |
7303 | * | ||
7304 | * The microcode will set the SCSI_CFG0 register using this value | ||
7305 | * after it is started below. | ||
7306 | */ | ||
7307 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
7308 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
7309 | asc_dvc->chip_scsi_id); | ||
7898 | 7310 | ||
7899 | printk(" use_sg %u, sglist_len %u\n", s->use_sg, s->sglist_len); | 7311 | /* |
7312 | * Determine SCSI_CFG1 Microcode Default Value. | ||
7313 | * | ||
7314 | * The microcode will set the SCSI_CFG1 register using this value | ||
7315 | * after it is started below. | ||
7316 | */ | ||
7900 | 7317 | ||
7901 | printk(" serial_number 0x%x, retries %d, allowed %d\n", | 7318 | /* Read current SCSI_CFG1 Register value. */ |
7902 | (unsigned)s->serial_number, s->retries, s->allowed); | 7319 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); |
7903 | 7320 | ||
7904 | printk(" timeout_per_command %d\n", s->timeout_per_command); | 7321 | /* |
7322 | * If the internal narrow cable is reversed all of the SCSI_CTRL | ||
7323 | * register signals will be set. Check for and return an error if | ||
7324 | * this condition is found. | ||
7325 | */ | ||
7326 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
7327 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
7328 | return ADV_ERROR; | ||
7329 | } | ||
7905 | 7330 | ||
7906 | printk | 7331 | /* |
7907 | (" scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%x\n", | 7332 | * All kind of combinations of devices attached to one of four |
7908 | (ulong)s->scsi_done, (ulong)s->done, (ulong)s->host_scribble, | 7333 | * connectors are acceptable except HVD device attached. For example, |
7909 | s->result); | 7334 | * LVD device can be attached to SE connector while SE device attached |
7335 | * to LVD connector. If LVD device attached to SE connector, it only | ||
7336 | * runs up to Ultra speed. | ||
7337 | * | ||
7338 | * If an HVD device is attached to one of LVD connectors, return an | ||
7339 | * error. However, there is no way to detect HVD device attached to | ||
7340 | * SE connectors. | ||
7341 | */ | ||
7342 | if (scsi_cfg1 & HVD) { | ||
7343 | asc_dvc->err_code = ASC_IERR_HVD_DEVICE; | ||
7344 | return ADV_ERROR; | ||
7345 | } | ||
7910 | 7346 | ||
7911 | printk(" tag %u, pid %u\n", (unsigned)s->tag, (unsigned)s->pid); | 7347 | /* |
7912 | } | 7348 | * If either SE or LVD automatic termination control is enabled, then |
7349 | * set the termination value based on a table listed in a_condor.h. | ||
7350 | * | ||
7351 | * If manual termination was specified with an EEPROM setting then | ||
7352 | * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready | ||
7353 | * to be 'ored' into SCSI_CFG1. | ||
7354 | */ | ||
7355 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
7356 | /* SE automatic termination control is enabled. */ | ||
7357 | switch (scsi_cfg1 & C_DET_SE) { | ||
7358 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
7359 | case 0x1: | ||
7360 | case 0x2: | ||
7361 | case 0x3: | ||
7362 | asc_dvc->cfg->termination |= TERM_SE; | ||
7363 | break; | ||
7913 | 7364 | ||
7914 | /* | 7365 | /* TERM_SE_HI: on, TERM_SE_LO: off */ |
7915 | * asc_prt_asc_dvc_var() | 7366 | case 0x0: |
7916 | */ | 7367 | asc_dvc->cfg->termination |= TERM_SE_HI; |
7917 | static void asc_prt_asc_dvc_var(ASC_DVC_VAR *h) | 7368 | break; |
7918 | { | 7369 | } |
7919 | printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong)h); | 7370 | } |
7920 | 7371 | ||
7921 | printk | 7372 | if ((asc_dvc->cfg->termination & TERM_LVD) == 0) { |
7922 | (" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,\n", | 7373 | /* LVD automatic termination control is enabled. */ |
7923 | h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl); | 7374 | switch (scsi_cfg1 & C_DET_LVD) { |
7375 | /* TERM_LVD_HI: on, TERM_LVD_LO: on */ | ||
7376 | case 0x4: | ||
7377 | case 0x8: | ||
7378 | case 0xC: | ||
7379 | asc_dvc->cfg->termination |= TERM_LVD; | ||
7380 | break; | ||
7924 | 7381 | ||
7925 | printk | 7382 | /* TERM_LVD_HI: off, TERM_LVD_LO: off */ |
7926 | (" bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,\n", | 7383 | case 0x0: |
7927 | h->bus_type, (ulong)h->isr_callback, (ulong)h->exe_callback, | 7384 | break; |
7928 | (unsigned)h->init_sdtr); | 7385 | } |
7386 | } | ||
7929 | 7387 | ||
7930 | printk | 7388 | /* |
7931 | (" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,\n", | 7389 | * Clear any set TERM_SE and TERM_LVD bits. |
7932 | (unsigned)h->sdtr_done, (unsigned)h->use_tagged_qng, | 7390 | */ |
7933 | (unsigned)h->unit_not_ready, (unsigned)h->chip_no); | 7391 | scsi_cfg1 &= (~TERM_SE & ~TERM_LVD); |
7934 | 7392 | ||
7935 | printk | 7393 | /* |
7936 | (" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,\n", | 7394 | * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'. |
7937 | (unsigned)h->queue_full_or_busy, (unsigned)h->start_motor, | 7395 | */ |
7938 | (unsigned)h->scsi_reset_wait); | 7396 | scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0); |
7939 | 7397 | ||
7940 | printk | 7398 | /* |
7941 | (" is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,\n", | 7399 | * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE |
7942 | (unsigned)h->is_in_int, (unsigned)h->max_total_qng, | 7400 | * bits and set possibly modified termination control bits in the |
7943 | (unsigned)h->cur_total_qng, (unsigned)h->in_critical_cnt); | 7401 | * Microcode SCSI_CFG1 Register Value. |
7402 | */ | ||
7403 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE); | ||
7944 | 7404 | ||
7945 | printk | 7405 | /* |
7946 | (" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,\n", | 7406 | * Set SCSI_CFG1 Microcode Default Value |
7947 | (unsigned)h->last_q_shortage, (unsigned)h->init_state, | 7407 | * |
7948 | (unsigned)h->no_scam, (unsigned)h->pci_fix_asyn_xfer); | 7408 | * Set possibly modified termination control and reset DIS_TERM_DRV |
7409 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
7410 | * | ||
7411 | * The microcode will set the SCSI_CFG1 register using this value | ||
7412 | * after it is started below. | ||
7413 | */ | ||
7414 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
7949 | 7415 | ||
7950 | printk(" cfg 0x%lx, irq_no 0x%x\n", (ulong)h->cfg, (unsigned)h->irq_no); | 7416 | /* |
7951 | } | 7417 | * Set MEM_CFG Microcode Default Value |
7418 | * | ||
7419 | * The microcode will set the MEM_CFG register using this value | ||
7420 | * after it is started below. | ||
7421 | * | ||
7422 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
7423 | * are defined. | ||
7424 | * | ||
7425 | * ASC-38C0800 has 16KB internal memory. | ||
7426 | */ | ||
7427 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
7428 | BIOS_EN | RAM_SZ_16KB); | ||
7952 | 7429 | ||
7953 | /* | 7430 | /* |
7954 | * asc_prt_asc_dvc_cfg() | 7431 | * Set SEL_MASK Microcode Default Value |
7955 | */ | 7432 | * |
7956 | static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h) | 7433 | * The microcode will set the SEL_MASK register using this value |
7957 | { | 7434 | * after it is started below. |
7958 | printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong)h); | 7435 | */ |
7436 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
7437 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
7959 | 7438 | ||
7960 | printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n", | 7439 | AdvBuildCarrierFreelist(asc_dvc); |
7961 | h->can_tagged_qng, h->cmd_qng_enabled); | ||
7962 | printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n", | ||
7963 | h->disc_enable, h->sdtr_enable); | ||
7964 | 7440 | ||
7965 | printk | 7441 | /* |
7966 | (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n", | 7442 | * Set-up the Host->RISC Initiator Command Queue (ICQ). |
7967 | h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel, | 7443 | */ |
7968 | h->chip_version); | ||
7969 | 7444 | ||
7970 | printk | 7445 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { |
7971 | (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n", | 7446 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
7972 | to_pci_dev(h->dev)->device, h->lib_serial_no, h->lib_version, | 7447 | return ADV_ERROR; |
7973 | h->mcode_date); | 7448 | } |
7449 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
7450 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | ||
7974 | 7451 | ||
7975 | printk(" mcode_version %d, overrun_buf 0x%lx\n", | 7452 | /* |
7976 | h->mcode_version, (ulong)h->overrun_buf); | 7453 | * The first command issued will be placed in the stopper carrier. |
7454 | */ | ||
7455 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
7456 | |||
7457 | /* | ||
7458 | * Set RISC ICQ physical address start value. | ||
7459 | * carr_pa is LE, must be native before write | ||
7460 | */ | ||
7461 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
7462 | |||
7463 | /* | ||
7464 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
7465 | */ | ||
7466 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
7467 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
7468 | return ADV_ERROR; | ||
7469 | } | ||
7470 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
7471 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
7472 | |||
7473 | /* | ||
7474 | * The first command completed by the RISC will be placed in | ||
7475 | * the stopper. | ||
7476 | * | ||
7477 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
7478 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
7479 | */ | ||
7480 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
7481 | |||
7482 | /* | ||
7483 | * Set RISC IRQ physical address start value. | ||
7484 | * | ||
7485 | * carr_pa is LE, must be native before write * | ||
7486 | */ | ||
7487 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
7488 | asc_dvc->carr_pending_cnt = 0; | ||
7489 | |||
7490 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
7491 | (ADV_INTR_ENABLE_HOST_INTR | | ||
7492 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
7493 | |||
7494 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
7495 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
7496 | |||
7497 | /* finally, finally, gentlemen, start your engine */ | ||
7498 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
7499 | |||
7500 | /* | ||
7501 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
7502 | * Resets should be performed. The RISC has to be running | ||
7503 | * to issue a SCSI Bus Reset. | ||
7504 | */ | ||
7505 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
7506 | /* | ||
7507 | * If the BIOS Signature is present in memory, restore the | ||
7508 | * BIOS Handshake Configuration Table and do not perform | ||
7509 | * a SCSI Bus Reset. | ||
7510 | */ | ||
7511 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
7512 | 0x55AA) { | ||
7513 | /* | ||
7514 | * Restore per TID negotiated values. | ||
7515 | */ | ||
7516 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
7517 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
7518 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
7519 | tagqng_able); | ||
7520 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
7521 | AdvWriteByteLram(iop_base, | ||
7522 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
7523 | max_cmd[tid]); | ||
7524 | } | ||
7525 | } else { | ||
7526 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
7527 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
7528 | } | ||
7529 | } | ||
7530 | } | ||
7531 | |||
7532 | return warn_code; | ||
7977 | } | 7533 | } |
7978 | 7534 | ||
7979 | /* | 7535 | /* |
7980 | * asc_prt_asc_scsi_q() | 7536 | * Initialize the ASC-38C1600. |
7537 | * | ||
7538 | * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR. | ||
7539 | * | ||
7540 | * For a non-fatal error return a warning code. If there are no warnings | ||
7541 | * then 0 is returned. | ||
7542 | * | ||
7543 | * Needed after initialization for error recovery. | ||
7981 | */ | 7544 | */ |
7982 | static void asc_prt_asc_scsi_q(ASC_SCSI_Q *q) | 7545 | static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) |
7983 | { | 7546 | { |
7984 | ASC_SG_HEAD *sgp; | 7547 | AdvPortAddr iop_base; |
7548 | ushort warn_code; | ||
7549 | int begin_addr; | ||
7550 | int end_addr; | ||
7551 | ushort code_sum; | ||
7552 | long word; | ||
7985 | int i; | 7553 | int i; |
7554 | ushort scsi_cfg1; | ||
7555 | uchar byte; | ||
7556 | uchar tid; | ||
7557 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
7558 | ushort wdtr_able, sdtr_able, ppr_able, tagqng_able; | ||
7559 | uchar max_cmd[ASC_MAX_TID + 1]; | ||
7986 | 7560 | ||
7987 | printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong)q); | 7561 | /* If there is already an error, don't continue. */ |
7562 | if (asc_dvc->err_code != 0) { | ||
7563 | return ADV_ERROR; | ||
7564 | } | ||
7988 | 7565 | ||
7989 | printk | 7566 | /* |
7990 | (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n", | 7567 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600. |
7991 | q->q2.target_ix, q->q1.target_lun, (ulong)q->q2.srb_ptr, | 7568 | */ |
7992 | q->q2.tag_code); | 7569 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { |
7570 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
7571 | return ADV_ERROR; | ||
7572 | } | ||
7993 | 7573 | ||
7994 | printk | 7574 | warn_code = 0; |
7995 | (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", | 7575 | iop_base = asc_dvc->iop_base; |
7996 | (ulong)le32_to_cpu(q->q1.data_addr), | ||
7997 | (ulong)le32_to_cpu(q->q1.data_cnt), | ||
7998 | (ulong)le32_to_cpu(q->q1.sense_addr), q->q1.sense_len); | ||
7999 | 7576 | ||
8000 | printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n", | 7577 | /* |
8001 | (ulong)q->cdbptr, q->q2.cdb_len, | 7578 | * Save the RISC memory BIOS region before writing the microcode. |
8002 | (ulong)q->sg_head, q->q1.sg_queue_cnt); | 7579 | * The BIOS may already be loaded and using its RISC LRAM region |
7580 | * so its region must be saved and restored. | ||
7581 | * | ||
7582 | * Note: This code makes the assumption, which is currently true, | ||
7583 | * that a chip reset does not clear RISC LRAM. | ||
7584 | */ | ||
7585 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
7586 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
7587 | bios_mem[i]); | ||
7588 | } | ||
8003 | 7589 | ||
8004 | if (q->sg_head) { | 7590 | /* |
8005 | sgp = q->sg_head; | 7591 | * Save current per TID negotiated values. |
8006 | printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong)sgp); | 7592 | */ |
8007 | printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt, | 7593 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
8008 | sgp->queue_cnt); | 7594 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
8009 | for (i = 0; i < sgp->entry_cnt; i++) { | 7595 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); |
8010 | printk(" [%u]: addr 0x%lx, bytes %lu\n", | 7596 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
8011 | i, (ulong)le32_to_cpu(sgp->sg_list[i].addr), | 7597 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { |
8012 | (ulong)le32_to_cpu(sgp->sg_list[i].bytes)); | 7598 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, |
7599 | max_cmd[tid]); | ||
7600 | } | ||
7601 | |||
7602 | /* | ||
7603 | * RAM BIST (Built-In Self Test) | ||
7604 | * | ||
7605 | * Address : I/O base + offset 0x38h register (byte). | ||
7606 | * Function: Bit 7-6(RW) : RAM mode | ||
7607 | * Normal Mode : 0x00 | ||
7608 | * Pre-test Mode : 0x40 | ||
7609 | * RAM Test Mode : 0x80 | ||
7610 | * Bit 5 : unused | ||
7611 | * Bit 4(RO) : Done bit | ||
7612 | * Bit 3-0(RO) : Status | ||
7613 | * Host Error : 0x08 | ||
7614 | * Int_RAM Error : 0x04 | ||
7615 | * RISC Error : 0x02 | ||
7616 | * SCSI Error : 0x01 | ||
7617 | * No Error : 0x00 | ||
7618 | * | ||
7619 | * Note: RAM BIST code should be put right here, before loading the | ||
7620 | * microcode and after saving the RISC memory BIOS region. | ||
7621 | */ | ||
7622 | |||
7623 | /* | ||
7624 | * LRAM Pre-test | ||
7625 | * | ||
7626 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
7627 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
7628 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
7629 | * to NORMAL_MODE, return an error too. | ||
7630 | */ | ||
7631 | for (i = 0; i < 2; i++) { | ||
7632 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
7633 | mdelay(10); /* Wait for 10ms before reading back. */ | ||
7634 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
7635 | if ((byte & RAM_TEST_DONE) == 0 | ||
7636 | || (byte & 0x0F) != PRE_TEST_VALUE) { | ||
7637 | asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST; | ||
7638 | return ADV_ERROR; | ||
8013 | } | 7639 | } |
8014 | 7640 | ||
7641 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
7642 | mdelay(10); /* Wait for 10ms before reading back. */ | ||
7643 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
7644 | != NORMAL_VALUE) { | ||
7645 | asc_dvc->err_code = ASC_IERR_BIST_PRE_TEST; | ||
7646 | return ADV_ERROR; | ||
7647 | } | ||
8015 | } | 7648 | } |
8016 | } | ||
8017 | 7649 | ||
8018 | /* | 7650 | /* |
8019 | * asc_prt_asc_qdone_info() | 7651 | * LRAM Test - It takes about 1.5 ms to run through the test. |
8020 | */ | 7652 | * |
8021 | static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *q) | 7653 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. |
8022 | { | 7654 | * If Done bit not set or Status not 0, save register byte, set the |
8023 | printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong)q); | 7655 | * err_code, and return an error. |
8024 | printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n", | 7656 | */ |
8025 | (ulong)q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len, | 7657 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); |
8026 | q->d2.tag_code); | 7658 | mdelay(10); /* Wait for 10ms before checking status. */ |
8027 | printk | ||
8028 | (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n", | ||
8029 | q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg); | ||
8030 | } | ||
8031 | 7659 | ||
8032 | /* | 7660 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); |
8033 | * asc_prt_adv_dvc_var() | 7661 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { |
8034 | * | 7662 | /* Get here if Done bit not set or Status not 0. */ |
8035 | * Display an ADV_DVC_VAR structure. | 7663 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ |
8036 | */ | 7664 | asc_dvc->err_code = ASC_IERR_BIST_RAM_TEST; |
8037 | static void asc_prt_adv_dvc_var(ADV_DVC_VAR *h) | 7665 | return ADV_ERROR; |
8038 | { | 7666 | } |
8039 | printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong)h); | ||
8040 | 7667 | ||
8041 | printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n", | 7668 | /* We need to reset back to normal mode after LRAM test passes. */ |
8042 | (ulong)h->iop_base, h->err_code, (unsigned)h->ultra_able); | 7669 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); |
8043 | 7670 | ||
8044 | printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n", | 7671 | asc_dvc->err_code = AdvLoadMicrocode(iop_base, _adv_asc38C1600_buf, |
8045 | (ulong)h->isr_callback, (unsigned)h->sdtr_able, | 7672 | _adv_asc38C1600_size, ADV_38C1600_MEMSIZE, |
8046 | (unsigned)h->wdtr_able); | 7673 | _adv_asc38C1600_chksum); |
7674 | if (asc_dvc->err_code) | ||
7675 | return ADV_ERROR; | ||
8047 | 7676 | ||
8048 | printk(" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n", | 7677 | /* |
8049 | (unsigned)h->start_motor, | 7678 | * Restore the RISC memory BIOS region. |
8050 | (unsigned)h->scsi_reset_wait, (unsigned)h->irq_no); | 7679 | */ |
7680 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
7681 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
7682 | bios_mem[i]); | ||
7683 | } | ||
8051 | 7684 | ||
8052 | printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n", | 7685 | /* |
8053 | (unsigned)h->max_host_qng, (unsigned)h->max_dvc_qng, | 7686 | * Calculate and write the microcode code checksum to the microcode |
8054 | (ulong)h->carr_freelist); | 7687 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). |
7688 | */ | ||
7689 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
7690 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
7691 | code_sum = 0; | ||
7692 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
7693 | for (word = begin_addr; word < end_addr; word += 2) { | ||
7694 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
7695 | } | ||
7696 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
8055 | 7697 | ||
8056 | printk(" icq_sp 0x%lx, irq_sp 0x%lx\n", | 7698 | /* |
8057 | (ulong)h->icq_sp, (ulong)h->irq_sp); | 7699 | * Read microcode version and date. |
7700 | */ | ||
7701 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
7702 | asc_dvc->cfg->mcode_date); | ||
7703 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
7704 | asc_dvc->cfg->mcode_version); | ||
8058 | 7705 | ||
8059 | printk(" no_scam 0x%x, tagqng_able 0x%x\n", | 7706 | /* |
8060 | (unsigned)h->no_scam, (unsigned)h->tagqng_able); | 7707 | * Set the chip type to indicate the ASC38C1600. |
7708 | */ | ||
7709 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600); | ||
8061 | 7710 | ||
8062 | printk(" chip_scsi_id 0x%x, cfg 0x%lx\n", | 7711 | /* |
8063 | (unsigned)h->chip_scsi_id, (ulong)h->cfg); | 7712 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. |
8064 | } | 7713 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current |
7714 | * cable detection and then we are able to read C_DET[3:0]. | ||
7715 | * | ||
7716 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
7717 | * Microcode Default Value' section below. | ||
7718 | */ | ||
7719 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
7720 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
7721 | scsi_cfg1 | DIS_TERM_DRV); | ||
8065 | 7722 | ||
8066 | /* | 7723 | /* |
8067 | * asc_prt_adv_dvc_cfg() | 7724 | * If the PCI Configuration Command Register "Parity Error Response |
8068 | * | 7725 | * Control" Bit was clear (0), then set the microcode variable |
8069 | * Display an ADV_DVC_CFG structure. | 7726 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode |
8070 | */ | 7727 | * to ignore DMA parity errors. |
8071 | static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h) | 7728 | */ |
8072 | { | 7729 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { |
8073 | printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong)h); | 7730 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); |
7731 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
7732 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7733 | } | ||
8074 | 7734 | ||
8075 | printk(" disc_enable 0x%x, termination 0x%x\n", | 7735 | /* |
8076 | h->disc_enable, h->termination); | 7736 | * If the BIOS control flag AIPP (Asynchronous Information |
7737 | * Phase Protection) disable bit is not set, then set the firmware | ||
7738 | * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable | ||
7739 | * AIPP checking and encoding. | ||
7740 | */ | ||
7741 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) { | ||
7742 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7743 | word |= CONTROL_FLAG_ENABLE_AIPP; | ||
7744 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
7745 | } | ||
8077 | 7746 | ||
8078 | printk(" chip_version 0x%x, mcode_date 0x%x\n", | 7747 | /* |
8079 | h->chip_version, h->mcode_date); | 7748 | * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4], |
7749 | * and START_CTL_TH [3:2]. | ||
7750 | */ | ||
7751 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
7752 | FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM); | ||
8080 | 7753 | ||
8081 | printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n", | 7754 | /* |
8082 | h->mcode_version, to_pci_dev(h->dev)->device, h->lib_version); | 7755 | * Microcode operating variables for WDTR, SDTR, and command tag |
7756 | * queuing will be set in slave_configure() based on what a | ||
7757 | * device reports it is capable of in Inquiry byte 7. | ||
7758 | * | ||
7759 | * If SCSI Bus Resets have been disabled, then directly set | ||
7760 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
7761 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
7762 | * the Inquiry caused by host and target mismatched DTR values. | ||
7763 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
7764 | * be assumed to be in Asynchronous, Narrow mode. | ||
7765 | */ | ||
7766 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
7767 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
7768 | asc_dvc->wdtr_able); | ||
7769 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
7770 | asc_dvc->sdtr_able); | ||
7771 | } | ||
8083 | 7772 | ||
8084 | printk(" control_flag 0x%x, pci_slot_info 0x%x\n", | 7773 | /* |
8085 | h->control_flag, h->pci_slot_info); | 7774 | * Set microcode operating variables for DISC and SDTR_SPEED1, |
8086 | } | 7775 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM |
7776 | * configuration values. | ||
7777 | * | ||
7778 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
7779 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
7780 | * without determining here whether the device supports SDTR. | ||
7781 | */ | ||
7782 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | ||
7783 | asc_dvc->cfg->disc_enable); | ||
7784 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
7785 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
7786 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
7787 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
8087 | 7788 | ||
8088 | /* | 7789 | /* |
8089 | * asc_prt_adv_scsi_req_q() | 7790 | * Set SCSI_CFG0 Microcode Default Value. |
8090 | * | 7791 | * |
8091 | * Display an ADV_SCSI_REQ_Q structure. | 7792 | * The microcode will set the SCSI_CFG0 register using this value |
8092 | */ | 7793 | * after it is started below. |
8093 | static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q) | 7794 | */ |
8094 | { | 7795 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, |
8095 | int sg_blk_cnt; | 7796 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | |
8096 | struct asc_sg_block *sg_ptr; | 7797 | asc_dvc->chip_scsi_id); |
8097 | 7798 | ||
8098 | printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong)q); | 7799 | /* |
7800 | * Calculate SCSI_CFG1 Microcode Default Value. | ||
7801 | * | ||
7802 | * The microcode will set the SCSI_CFG1 register using this value | ||
7803 | * after it is started below. | ||
7804 | * | ||
7805 | * Each ASC-38C1600 function has only two cable detect bits. | ||
7806 | * The bus mode override bits are in IOPB_SOFT_OVER_WR. | ||
7807 | */ | ||
7808 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
8099 | 7809 | ||
8100 | printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n", | 7810 | /* |
8101 | q->target_id, q->target_lun, (ulong)q->srb_ptr, q->a_flag); | 7811 | * If the cable is reversed all of the SCSI_CTRL register signals |
7812 | * will be set. Check for and return an error if this condition is | ||
7813 | * found. | ||
7814 | */ | ||
7815 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
7816 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
7817 | return ADV_ERROR; | ||
7818 | } | ||
8102 | 7819 | ||
8103 | printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n", | 7820 | /* |
8104 | q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong)q->vdata_addr); | 7821 | * Each ASC-38C1600 function has two connectors. Only an HVD device |
7822 | * can not be connected to either connector. An LVD device or SE device | ||
7823 | * may be connected to either connecor. If an SE device is connected, | ||
7824 | * then at most Ultra speed (20 Mhz) can be used on both connectors. | ||
7825 | * | ||
7826 | * If an HVD device is attached, return an error. | ||
7827 | */ | ||
7828 | if (scsi_cfg1 & HVD) { | ||
7829 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | ||
7830 | return ADV_ERROR; | ||
7831 | } | ||
8105 | 7832 | ||
8106 | printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", | 7833 | /* |
8107 | (ulong)le32_to_cpu(q->data_cnt), | 7834 | * Each function in the ASC-38C1600 uses only the SE cable detect and |
8108 | (ulong)le32_to_cpu(q->sense_addr), q->sense_len); | 7835 | * termination because there are two connectors for each function. Each |
7836 | * function may use either LVD or SE mode. Corresponding the SE automatic | ||
7837 | * termination control EEPROM bits are used for each function. Each | ||
7838 | * function has its own EEPROM. If SE automatic control is enabled for | ||
7839 | * the function, then set the termination value based on a table listed | ||
7840 | * in a_condor.h. | ||
7841 | * | ||
7842 | * If manual termination is specified in the EEPROM for the function, | ||
7843 | * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is | ||
7844 | * ready to be 'ored' into SCSI_CFG1. | ||
7845 | */ | ||
7846 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
7847 | struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc); | ||
7848 | /* SE automatic termination control is enabled. */ | ||
7849 | switch (scsi_cfg1 & C_DET_SE) { | ||
7850 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
7851 | case 0x1: | ||
7852 | case 0x2: | ||
7853 | case 0x3: | ||
7854 | asc_dvc->cfg->termination |= TERM_SE; | ||
7855 | break; | ||
8109 | 7856 | ||
8110 | printk | 7857 | case 0x0: |
8111 | (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n", | 7858 | if (PCI_FUNC(pdev->devfn) == 0) { |
8112 | q->cdb_len, q->done_status, q->host_status, q->scsi_status); | 7859 | /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */ |
7860 | } else { | ||
7861 | /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */ | ||
7862 | asc_dvc->cfg->termination |= TERM_SE_HI; | ||
7863 | } | ||
7864 | break; | ||
7865 | } | ||
7866 | } | ||
8113 | 7867 | ||
8114 | printk(" sg_working_ix 0x%x, target_cmd %u\n", | 7868 | /* |
8115 | q->sg_working_ix, q->target_cmd); | 7869 | * Clear any set TERM_SE bits. |
7870 | */ | ||
7871 | scsi_cfg1 &= ~TERM_SE; | ||
8116 | 7872 | ||
8117 | printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n", | 7873 | /* |
8118 | (ulong)le32_to_cpu(q->scsiq_rptr), | 7874 | * Invert the TERM_SE bits and then set 'scsi_cfg1'. |
8119 | (ulong)le32_to_cpu(q->sg_real_addr), (ulong)q->sg_list_ptr); | 7875 | */ |
7876 | scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE); | ||
8120 | 7877 | ||
8121 | /* Display the request's ADV_SG_BLOCK structures. */ | 7878 | /* |
8122 | if (q->sg_list_ptr != NULL) { | 7879 | * Clear Big Endian and Terminator Polarity bits and set possibly |
8123 | sg_blk_cnt = 0; | 7880 | * modified termination control bits in the Microcode SCSI_CFG1 |
8124 | while (1) { | 7881 | * Register Value. |
7882 | * | ||
7883 | * Big Endian bit is not used even on big endian machines. | ||
7884 | */ | ||
7885 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL); | ||
7886 | |||
7887 | /* | ||
7888 | * Set SCSI_CFG1 Microcode Default Value | ||
7889 | * | ||
7890 | * Set possibly modified termination control bits in the Microcode | ||
7891 | * SCSI_CFG1 Register Value. | ||
7892 | * | ||
7893 | * The microcode will set the SCSI_CFG1 register using this value | ||
7894 | * after it is started below. | ||
7895 | */ | ||
7896 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
7897 | |||
7898 | /* | ||
7899 | * Set MEM_CFG Microcode Default Value | ||
7900 | * | ||
7901 | * The microcode will set the MEM_CFG register using this value | ||
7902 | * after it is started below. | ||
7903 | * | ||
7904 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
7905 | * are defined. | ||
7906 | * | ||
7907 | * ASC-38C1600 has 32KB internal memory. | ||
7908 | * | ||
7909 | * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come | ||
7910 | * out a special 16K Adv Library and Microcode version. After the issue | ||
7911 | * resolved, we should turn back to the 32K support. Both a_condor.h and | ||
7912 | * mcode.sas files also need to be updated. | ||
7913 | * | ||
7914 | * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
7915 | * BIOS_EN | RAM_SZ_32KB); | ||
7916 | */ | ||
7917 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
7918 | BIOS_EN | RAM_SZ_16KB); | ||
7919 | |||
7920 | /* | ||
7921 | * Set SEL_MASK Microcode Default Value | ||
7922 | * | ||
7923 | * The microcode will set the SEL_MASK register using this value | ||
7924 | * after it is started below. | ||
7925 | */ | ||
7926 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
7927 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
7928 | |||
7929 | AdvBuildCarrierFreelist(asc_dvc); | ||
7930 | |||
7931 | /* | ||
7932 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | ||
7933 | */ | ||
7934 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { | ||
7935 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
7936 | return ADV_ERROR; | ||
7937 | } | ||
7938 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
7939 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | ||
7940 | |||
7941 | /* | ||
7942 | * The first command issued will be placed in the stopper carrier. | ||
7943 | */ | ||
7944 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
7945 | |||
7946 | /* | ||
7947 | * Set RISC ICQ physical address start value. Initialize the | ||
7948 | * COMMA register to the same value otherwise the RISC will | ||
7949 | * prematurely detect a command is available. | ||
7950 | */ | ||
7951 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
7952 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | ||
7953 | le32_to_cpu(asc_dvc->icq_sp->carr_pa)); | ||
7954 | |||
7955 | /* | ||
7956 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
7957 | */ | ||
7958 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
7959 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
7960 | return ADV_ERROR; | ||
7961 | } | ||
7962 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
7963 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
7964 | |||
7965 | /* | ||
7966 | * The first command completed by the RISC will be placed in | ||
7967 | * the stopper. | ||
7968 | * | ||
7969 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
7970 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
7971 | */ | ||
7972 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
7973 | |||
7974 | /* | ||
7975 | * Set RISC IRQ physical address start value. | ||
7976 | */ | ||
7977 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
7978 | asc_dvc->carr_pending_cnt = 0; | ||
7979 | |||
7980 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
7981 | (ADV_INTR_ENABLE_HOST_INTR | | ||
7982 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
7983 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
7984 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
7985 | |||
7986 | /* finally, finally, gentlemen, start your engine */ | ||
7987 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
7988 | |||
7989 | /* | ||
7990 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
7991 | * Resets should be performed. The RISC has to be running | ||
7992 | * to issue a SCSI Bus Reset. | ||
7993 | */ | ||
7994 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
7995 | /* | ||
7996 | * If the BIOS Signature is present in memory, restore the | ||
7997 | * per TID microcode operating variables. | ||
7998 | */ | ||
7999 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
8000 | 0x55AA) { | ||
8125 | /* | 8001 | /* |
8126 | * 'sg_ptr' is a physical address. Convert it to a virtual | 8002 | * Restore per TID negotiated values. |
8127 | * address by indexing 'sg_blk_cnt' into the virtual address | ||
8128 | * array 'sg_list_ptr'. | ||
8129 | * | ||
8130 | * XXX - Assumes all SG physical blocks are virtually contiguous. | ||
8131 | */ | 8003 | */ |
8132 | sg_ptr = | 8004 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
8133 | &(((ADV_SG_BLOCK *)(q->sg_list_ptr))[sg_blk_cnt]); | 8005 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
8134 | asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr); | 8006 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); |
8135 | if (sg_ptr->sg_ptr == 0) { | 8007 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, |
8136 | break; | 8008 | tagqng_able); |
8009 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { | ||
8010 | AdvWriteByteLram(iop_base, | ||
8011 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
8012 | max_cmd[tid]); | ||
8013 | } | ||
8014 | } else { | ||
8015 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
8016 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
8137 | } | 8017 | } |
8138 | sg_blk_cnt++; | ||
8139 | } | 8018 | } |
8140 | } | 8019 | } |
8020 | |||
8021 | return warn_code; | ||
8141 | } | 8022 | } |
8142 | 8023 | ||
8143 | /* | 8024 | /* |
8144 | * asc_prt_adv_sgblock() | 8025 | * Reset chip and SCSI Bus. |
8145 | * | 8026 | * |
8146 | * Display an ADV_SG_BLOCK structure. | 8027 | * Return Value: |
8028 | * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful. | ||
8029 | * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure. | ||
8147 | */ | 8030 | */ |
8148 | static void asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b) | 8031 | static int AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc) |
8149 | { | 8032 | { |
8150 | int i; | 8033 | int status; |
8034 | ushort wdtr_able, sdtr_able, tagqng_able; | ||
8035 | ushort ppr_able = 0; | ||
8036 | uchar tid, max_cmd[ADV_MAX_TID + 1]; | ||
8037 | AdvPortAddr iop_base; | ||
8038 | ushort bios_sig; | ||
8151 | 8039 | ||
8152 | printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n", | 8040 | iop_base = asc_dvc->iop_base; |
8153 | (ulong)b, sgblockno); | 8041 | |
8154 | printk(" sg_cnt %u, sg_ptr 0x%lx\n", | 8042 | /* |
8155 | b->sg_cnt, (ulong)le32_to_cpu(b->sg_ptr)); | 8043 | * Save current per TID negotiated values. |
8156 | ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK); | 8044 | */ |
8157 | if (b->sg_ptr != 0) { | 8045 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
8158 | ASC_ASSERT(b->sg_cnt == NO_OF_SG_PER_BLOCK); | 8046 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
8047 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
8048 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
8159 | } | 8049 | } |
8160 | for (i = 0; i < b->sg_cnt; i++) { | 8050 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
8161 | printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n", | 8051 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { |
8162 | i, (ulong)b->sg_list[i].sg_addr, | 8052 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, |
8163 | (ulong)b->sg_list[i].sg_count); | 8053 | max_cmd[tid]); |
8164 | } | 8054 | } |
8165 | } | ||
8166 | 8055 | ||
8167 | /* | 8056 | /* |
8168 | * asc_prt_hex() | 8057 | * Force the AdvInitAsc3550/38C0800Driver() function to |
8169 | * | 8058 | * perform a SCSI Bus Reset by clearing the BIOS signature word. |
8170 | * Print hexadecimal output in 4 byte groupings 32 bytes | 8059 | * The initialization functions assumes a SCSI Bus Reset is not |
8171 | * or 8 double-words per line. | 8060 | * needed if the BIOS signature word is present. |
8172 | */ | 8061 | */ |
8173 | static void asc_prt_hex(char *f, uchar *s, int l) | 8062 | AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); |
8174 | { | 8063 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0); |
8175 | int i; | ||
8176 | int j; | ||
8177 | int k; | ||
8178 | int m; | ||
8179 | |||
8180 | printk("%s: (%d bytes)\n", f, l); | ||
8181 | 8064 | ||
8182 | for (i = 0; i < l; i += 32) { | 8065 | /* |
8066 | * Stop chip and reset it. | ||
8067 | */ | ||
8068 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP); | ||
8069 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET); | ||
8070 | mdelay(100); | ||
8071 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
8072 | ADV_CTRL_REG_CMD_WR_IO_REG); | ||
8183 | 8073 | ||
8184 | /* Display a maximum of 8 double-words per line. */ | 8074 | /* |
8185 | if ((k = (l - i) / 4) >= 8) { | 8075 | * Reset Adv Library error code, if any, and try |
8186 | k = 8; | 8076 | * re-initializing the chip. |
8187 | m = 0; | 8077 | */ |
8188 | } else { | 8078 | asc_dvc->err_code = 0; |
8189 | m = (l - i) % 4; | 8079 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
8190 | } | 8080 | status = AdvInitAsc38C1600Driver(asc_dvc); |
8081 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
8082 | status = AdvInitAsc38C0800Driver(asc_dvc); | ||
8083 | } else { | ||
8084 | status = AdvInitAsc3550Driver(asc_dvc); | ||
8085 | } | ||
8191 | 8086 | ||
8192 | for (j = 0; j < k; j++) { | 8087 | /* Translate initialization return value to status value. */ |
8193 | printk(" %2.2X%2.2X%2.2X%2.2X", | 8088 | if (status == 0) { |
8194 | (unsigned)s[i + (j * 4)], | 8089 | status = ADV_TRUE; |
8195 | (unsigned)s[i + (j * 4) + 1], | 8090 | } else { |
8196 | (unsigned)s[i + (j * 4) + 2], | 8091 | status = ADV_FALSE; |
8197 | (unsigned)s[i + (j * 4) + 3]); | 8092 | } |
8198 | } | ||
8199 | 8093 | ||
8200 | switch (m) { | 8094 | /* |
8201 | case 0: | 8095 | * Restore the BIOS signature word. |
8202 | default: | 8096 | */ |
8203 | break; | 8097 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); |
8204 | case 1: | ||
8205 | printk(" %2.2X", (unsigned)s[i + (j * 4)]); | ||
8206 | break; | ||
8207 | case 2: | ||
8208 | printk(" %2.2X%2.2X", | ||
8209 | (unsigned)s[i + (j * 4)], | ||
8210 | (unsigned)s[i + (j * 4) + 1]); | ||
8211 | break; | ||
8212 | case 3: | ||
8213 | printk(" %2.2X%2.2X%2.2X", | ||
8214 | (unsigned)s[i + (j * 4) + 1], | ||
8215 | (unsigned)s[i + (j * 4) + 2], | ||
8216 | (unsigned)s[i + (j * 4) + 3]); | ||
8217 | break; | ||
8218 | } | ||
8219 | 8098 | ||
8220 | printk("\n"); | 8099 | /* |
8100 | * Restore per TID negotiated values. | ||
8101 | */ | ||
8102 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
8103 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
8104 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
8105 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
8106 | } | ||
8107 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
8108 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
8109 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
8110 | max_cmd[tid]); | ||
8221 | } | 8111 | } |
8112 | |||
8113 | return status; | ||
8222 | } | 8114 | } |
8223 | #endif /* ADVANSYS_DEBUG */ | ||
8224 | 8115 | ||
8225 | /* | 8116 | /* |
8226 | * --- Asc Library Functions | 8117 | * adv_async_callback() - Adv Library asynchronous event callback function. |
8227 | */ | 8118 | */ |
8228 | 8119 | static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code) | |
8229 | static ushort __init AscGetEisaChipCfg(PortAddr iop_base) | ||
8230 | { | 8120 | { |
8231 | PortAddr eisa_cfg_iop; | 8121 | switch (code) { |
8122 | case ADV_ASYNC_SCSI_BUS_RESET_DET: | ||
8123 | /* | ||
8124 | * The firmware detected a SCSI Bus reset. | ||
8125 | */ | ||
8126 | ASC_DBG(0, "ADV_ASYNC_SCSI_BUS_RESET_DET\n"); | ||
8127 | break; | ||
8232 | 8128 | ||
8233 | eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | | 8129 | case ADV_ASYNC_RDMA_FAILURE: |
8234 | (PortAddr) (ASC_EISA_CFG_IOP_MASK); | 8130 | /* |
8235 | return (inpw(eisa_cfg_iop)); | 8131 | * Handle RDMA failure by resetting the SCSI Bus and |
8236 | } | 8132 | * possibly the chip if it is unresponsive. Log the error |
8133 | * with a unique code. | ||
8134 | */ | ||
8135 | ASC_DBG(0, "ADV_ASYNC_RDMA_FAILURE\n"); | ||
8136 | AdvResetChipAndSB(adv_dvc_varp); | ||
8137 | break; | ||
8237 | 8138 | ||
8238 | static uchar __init AscSetChipScsiID(PortAddr iop_base, uchar new_host_id) | 8139 | case ADV_HOST_SCSI_BUS_RESET: |
8239 | { | 8140 | /* |
8240 | ushort cfg_lsw; | 8141 | * Host generated SCSI bus reset occurred. |
8142 | */ | ||
8143 | ASC_DBG(0, "ADV_HOST_SCSI_BUS_RESET\n"); | ||
8144 | break; | ||
8241 | 8145 | ||
8242 | if (AscGetChipScsiID(iop_base) == new_host_id) { | 8146 | default: |
8243 | return (new_host_id); | 8147 | ASC_DBG(0, "unknown code 0x%x\n", code); |
8148 | break; | ||
8244 | } | 8149 | } |
8245 | cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
8246 | cfg_lsw &= 0xF8FF; | ||
8247 | cfg_lsw |= (ushort)((new_host_id & ASC_MAX_TID) << 8); | ||
8248 | AscSetChipCfgLsw(iop_base, cfg_lsw); | ||
8249 | return (AscGetChipScsiID(iop_base)); | ||
8250 | } | 8150 | } |
8251 | 8151 | ||
8252 | static uchar __init AscGetChipScsiCtrl(PortAddr iop_base) | 8152 | /* |
8153 | * adv_isr_callback() - Second Level Interrupt Handler called by AdvISR(). | ||
8154 | * | ||
8155 | * Callback function for the Wide SCSI Adv Library. | ||
8156 | */ | ||
8157 | static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp) | ||
8253 | { | 8158 | { |
8254 | uchar sc; | 8159 | struct asc_board *boardp; |
8160 | adv_req_t *reqp; | ||
8161 | adv_sgblk_t *sgblkp; | ||
8162 | struct scsi_cmnd *scp; | ||
8163 | struct Scsi_Host *shost; | ||
8164 | ADV_DCNT resid_cnt; | ||
8255 | 8165 | ||
8256 | AscSetBank(iop_base, 1); | 8166 | ASC_DBG(1, "adv_dvc_varp 0x%lx, scsiqp 0x%lx\n", |
8257 | sc = inp(iop_base + IOP_REG_SC); | 8167 | (ulong)adv_dvc_varp, (ulong)scsiqp); |
8258 | AscSetBank(iop_base, 0); | 8168 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); |
8259 | return (sc); | ||
8260 | } | ||
8261 | 8169 | ||
8262 | static uchar __init AscGetChipVersion(PortAddr iop_base, ushort bus_type) | 8170 | /* |
8263 | { | 8171 | * Get the adv_req_t structure for the command that has been |
8264 | if ((bus_type & ASC_IS_EISA) != 0) { | 8172 | * completed. The adv_req_t structure actually contains the |
8265 | PortAddr eisa_iop; | 8173 | * completed ADV_SCSI_REQ_Q structure. |
8266 | uchar revision; | 8174 | */ |
8267 | eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | | 8175 | reqp = (adv_req_t *)ADV_U32_TO_VADDR(scsiqp->srb_ptr); |
8268 | (PortAddr) ASC_EISA_REV_IOP_MASK; | 8176 | ASC_DBG(1, "reqp 0x%lx\n", (ulong)reqp); |
8269 | revision = inp(eisa_iop); | 8177 | if (reqp == NULL) { |
8270 | return ((uchar)((ASC_CHIP_MIN_VER_EISA - 1) + revision)); | 8178 | ASC_PRINT("adv_isr_callback: reqp is NULL\n"); |
8179 | return; | ||
8271 | } | 8180 | } |
8272 | return (AscGetChipVerNo(iop_base)); | ||
8273 | } | ||
8274 | 8181 | ||
8275 | static ushort __init AscGetChipBusType(PortAddr iop_base) | 8182 | /* |
8276 | { | 8183 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the |
8277 | ushort chip_ver; | 8184 | * command that has been completed. |
8278 | 8185 | * | |
8279 | chip_ver = AscGetChipVerNo(iop_base); | 8186 | * Note: The adv_req_t request structure and adv_sgblk_t structure, |
8280 | if ((chip_ver >= ASC_CHIP_MIN_VER_VL) | 8187 | * if any, are dropped, because a board structure pointer can not be |
8281 | && (chip_ver <= ASC_CHIP_MAX_VER_VL) | 8188 | * determined. |
8282 | ) { | 8189 | */ |
8283 | if (((iop_base & 0x0C30) == 0x0C30) | 8190 | scp = reqp->cmndp; |
8284 | || ((iop_base & 0x0C50) == 0x0C50) | 8191 | ASC_DBG(1, "scp 0x%p\n", scp); |
8285 | ) { | 8192 | if (scp == NULL) { |
8286 | return (ASC_IS_EISA); | 8193 | ASC_PRINT |
8287 | } | 8194 | ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n"); |
8288 | return (ASC_IS_VL); | 8195 | return; |
8289 | } | 8196 | } |
8290 | if ((chip_ver >= ASC_CHIP_MIN_VER_ISA) && | 8197 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); |
8291 | (chip_ver <= ASC_CHIP_MAX_VER_ISA)) { | 8198 | |
8292 | if (chip_ver >= ASC_CHIP_MIN_VER_ISA_PNP) { | 8199 | shost = scp->device->host; |
8293 | return (ASC_IS_ISAPNP); | 8200 | ASC_STATS(shost, callback); |
8201 | ASC_DBG(1, "shost 0x%p\n", shost); | ||
8202 | |||
8203 | boardp = shost_priv(shost); | ||
8204 | BUG_ON(adv_dvc_varp != &boardp->dvc_var.adv_dvc_var); | ||
8205 | |||
8206 | /* | ||
8207 | * 'done_status' contains the command's ending status. | ||
8208 | */ | ||
8209 | switch (scsiqp->done_status) { | ||
8210 | case QD_NO_ERROR: | ||
8211 | ASC_DBG(2, "QD_NO_ERROR\n"); | ||
8212 | scp->result = 0; | ||
8213 | |||
8214 | /* | ||
8215 | * Check for an underrun condition. | ||
8216 | * | ||
8217 | * If there was no error and an underrun condition, then | ||
8218 | * then return the number of underrun bytes. | ||
8219 | */ | ||
8220 | resid_cnt = le32_to_cpu(scsiqp->data_cnt); | ||
8221 | if (scsi_bufflen(scp) != 0 && resid_cnt != 0 && | ||
8222 | resid_cnt <= scsi_bufflen(scp)) { | ||
8223 | ASC_DBG(1, "underrun condition %lu bytes\n", | ||
8224 | (ulong)resid_cnt); | ||
8225 | scsi_set_resid(scp, resid_cnt); | ||
8294 | } | 8226 | } |
8295 | return (ASC_IS_ISA); | 8227 | break; |
8296 | } else if ((chip_ver >= ASC_CHIP_MIN_VER_PCI) && | 8228 | |
8297 | (chip_ver <= ASC_CHIP_MAX_VER_PCI)) { | 8229 | case QD_WITH_ERROR: |
8298 | return (ASC_IS_PCI); | 8230 | ASC_DBG(2, "QD_WITH_ERROR\n"); |
8231 | switch (scsiqp->host_status) { | ||
8232 | case QHSTA_NO_ERROR: | ||
8233 | if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) { | ||
8234 | ASC_DBG(2, "SAM_STAT_CHECK_CONDITION\n"); | ||
8235 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
8236 | sizeof(scp->sense_buffer)); | ||
8237 | /* | ||
8238 | * Note: The 'status_byte()' macro used by | ||
8239 | * target drivers defined in scsi.h shifts the | ||
8240 | * status byte returned by host drivers right | ||
8241 | * by 1 bit. This is why target drivers also | ||
8242 | * use right shifted status byte definitions. | ||
8243 | * For instance target drivers use | ||
8244 | * CHECK_CONDITION, defined to 0x1, instead of | ||
8245 | * the SCSI defined check condition value of | ||
8246 | * 0x2. Host drivers are supposed to return | ||
8247 | * the status byte as it is defined by SCSI. | ||
8248 | */ | ||
8249 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
8250 | STATUS_BYTE(scsiqp->scsi_status); | ||
8251 | } else { | ||
8252 | scp->result = STATUS_BYTE(scsiqp->scsi_status); | ||
8253 | } | ||
8254 | break; | ||
8255 | |||
8256 | default: | ||
8257 | /* Some other QHSTA error occurred. */ | ||
8258 | ASC_DBG(1, "host_status 0x%x\n", scsiqp->host_status); | ||
8259 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
8260 | break; | ||
8261 | } | ||
8262 | break; | ||
8263 | |||
8264 | case QD_ABORTED_BY_HOST: | ||
8265 | ASC_DBG(1, "QD_ABORTED_BY_HOST\n"); | ||
8266 | scp->result = | ||
8267 | HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status); | ||
8268 | break; | ||
8269 | |||
8270 | default: | ||
8271 | ASC_DBG(1, "done_status 0x%x\n", scsiqp->done_status); | ||
8272 | scp->result = | ||
8273 | HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status); | ||
8274 | break; | ||
8299 | } | 8275 | } |
8300 | return (0); | ||
8301 | } | ||
8302 | 8276 | ||
8303 | static ASC_DCNT | 8277 | /* |
8304 | AscLoadMicroCode(PortAddr iop_base, | 8278 | * If the 'init_tidmask' bit isn't already set for the target and the |
8305 | ushort s_addr, uchar *mcode_buf, ushort mcode_size) | 8279 | * current request finished normally, then set the bit for the target |
8306 | { | 8280 | * to indicate that a device is present. |
8307 | ASC_DCNT chksum; | 8281 | */ |
8308 | ushort mcode_word_size; | 8282 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && |
8309 | ushort mcode_chksum; | 8283 | scsiqp->done_status == QD_NO_ERROR && |
8284 | scsiqp->host_status == QHSTA_NO_ERROR) { | ||
8285 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
8286 | } | ||
8310 | 8287 | ||
8311 | /* Write the microcode buffer starting at LRAM address 0. */ | 8288 | asc_scsi_done(scp); |
8312 | mcode_word_size = (ushort)(mcode_size >> 1); | ||
8313 | AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size); | ||
8314 | AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size); | ||
8315 | 8289 | ||
8316 | chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size); | 8290 | /* |
8317 | ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong)chksum); | 8291 | * Free all 'adv_sgblk_t' structures allocated for the request. |
8318 | mcode_chksum = (ushort)AscMemSumLramWord(iop_base, | 8292 | */ |
8319 | (ushort)ASC_CODE_SEC_BEG, | 8293 | while ((sgblkp = reqp->sgblkp) != NULL) { |
8320 | (ushort)((mcode_size - | 8294 | /* Remove 'sgblkp' from the request list. */ |
8321 | s_addr - (ushort) | 8295 | reqp->sgblkp = sgblkp->next_sgblkp; |
8322 | ASC_CODE_SEC_BEG) / | 8296 | |
8323 | 2)); | 8297 | /* Add 'sgblkp' to the board free list. */ |
8324 | ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n", | 8298 | sgblkp->next_sgblkp = boardp->adv_sgblkp; |
8325 | (ulong)mcode_chksum); | 8299 | boardp->adv_sgblkp = sgblkp; |
8326 | AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum); | 8300 | } |
8327 | AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size); | 8301 | |
8328 | return (chksum); | 8302 | /* |
8303 | * Free the adv_req_t structure used with the command by adding | ||
8304 | * it back to the board free list. | ||
8305 | */ | ||
8306 | reqp->next_reqp = boardp->adv_reqp; | ||
8307 | boardp->adv_reqp = reqp; | ||
8308 | |||
8309 | ASC_DBG(1, "done\n"); | ||
8329 | } | 8310 | } |
8330 | 8311 | ||
8331 | static int AscFindSignature(PortAddr iop_base) | 8312 | /* |
8313 | * Adv Library Interrupt Service Routine | ||
8314 | * | ||
8315 | * This function is called by a driver's interrupt service routine. | ||
8316 | * The function disables and re-enables interrupts. | ||
8317 | * | ||
8318 | * When a microcode idle command is completed, the ADV_DVC_VAR | ||
8319 | * 'idle_cmd_done' field is set to ADV_TRUE. | ||
8320 | * | ||
8321 | * Note: AdvISR() can be called when interrupts are disabled or even | ||
8322 | * when there is no hardware interrupt condition present. It will | ||
8323 | * always check for completed idle commands and microcode requests. | ||
8324 | * This is an important feature that shouldn't be changed because it | ||
8325 | * allows commands to be completed from polling mode loops. | ||
8326 | * | ||
8327 | * Return: | ||
8328 | * ADV_TRUE(1) - interrupt was pending | ||
8329 | * ADV_FALSE(0) - no interrupt was pending | ||
8330 | */ | ||
8331 | static int AdvISR(ADV_DVC_VAR *asc_dvc) | ||
8332 | { | 8332 | { |
8333 | ushort sig_word; | 8333 | AdvPortAddr iop_base; |
8334 | uchar int_stat; | ||
8335 | ushort target_bit; | ||
8336 | ADV_CARR_T *free_carrp; | ||
8337 | ADV_VADDR irq_next_vpa; | ||
8338 | ADV_SCSI_REQ_Q *scsiq; | ||
8334 | 8339 | ||
8335 | ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n", | 8340 | iop_base = asc_dvc->iop_base; |
8336 | iop_base, AscGetChipSignatureByte(iop_base)); | 8341 | |
8337 | if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) { | 8342 | /* Reading the register clears the interrupt. */ |
8338 | ASC_DBG2(1, | 8343 | int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG); |
8339 | "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n", | 8344 | |
8340 | iop_base, AscGetChipSignatureWord(iop_base)); | 8345 | if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB | |
8341 | sig_word = AscGetChipSignatureWord(iop_base); | 8346 | ADV_INTR_STATUS_INTRC)) == 0) { |
8342 | if ((sig_word == (ushort)ASC_1000_ID0W) || | 8347 | return ADV_FALSE; |
8343 | (sig_word == (ushort)ASC_1000_ID0W_FIX)) { | ||
8344 | return (1); | ||
8345 | } | ||
8346 | } | 8348 | } |
8347 | return (0); | ||
8348 | } | ||
8349 | 8349 | ||
8350 | static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __initdata = { | 8350 | /* |
8351 | 0x100, ASC_IOADR_1, 0x120, ASC_IOADR_2, 0x140, ASC_IOADR_3, ASC_IOADR_4, | 8351 | * Notify the driver of an asynchronous microcode condition by |
8352 | ASC_IOADR_5, ASC_IOADR_6, ASC_IOADR_7, ASC_IOADR_8 | 8352 | * calling the adv_async_callback function. The function |
8353 | }; | 8353 | * is passed the microcode ASC_MC_INTRB_CODE byte value. |
8354 | */ | ||
8355 | if (int_stat & ADV_INTR_STATUS_INTRB) { | ||
8356 | uchar intrb_code; | ||
8354 | 8357 | ||
8355 | #ifdef CONFIG_ISA | 8358 | AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code); |
8356 | static uchar _isa_pnp_inited __initdata = 0; | ||
8357 | 8359 | ||
8358 | static PortAddr __init AscSearchIOPortAddr(PortAddr iop_beg, ushort bus_type) | 8360 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || |
8359 | { | 8361 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { |
8360 | if (bus_type & ASC_IS_VL) { | 8362 | if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE && |
8361 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { | 8363 | asc_dvc->carr_pending_cnt != 0) { |
8362 | if (AscGetChipVersion(iop_beg, bus_type) <= | 8364 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, |
8363 | ASC_CHIP_MAX_VER_VL) { | 8365 | ADV_TICKLE_A); |
8364 | return (iop_beg); | 8366 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { |
8367 | AdvWriteByteRegister(iop_base, | ||
8368 | IOPB_TICKLE, | ||
8369 | ADV_TICKLE_NOP); | ||
8370 | } | ||
8365 | } | 8371 | } |
8366 | } | 8372 | } |
8367 | return (0); | 8373 | |
8374 | adv_async_callback(asc_dvc, intrb_code); | ||
8368 | } | 8375 | } |
8369 | if (bus_type & ASC_IS_ISA) { | 8376 | |
8370 | if (_isa_pnp_inited == 0) { | 8377 | /* |
8371 | AscSetISAPNPWaitForKey(); | 8378 | * Check if the IRQ stopper carrier contains a completed request. |
8372 | _isa_pnp_inited++; | 8379 | */ |
8373 | } | 8380 | while (((irq_next_vpa = |
8374 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { | 8381 | le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) { |
8375 | if ((AscGetChipVersion(iop_beg, bus_type) & | 8382 | /* |
8376 | ASC_CHIP_VER_ISA_BIT) != 0) { | 8383 | * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure. |
8377 | return (iop_beg); | 8384 | * The RISC will have set 'areq_vpa' to a virtual address. |
8378 | } | 8385 | * |
8386 | * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr | ||
8387 | * field to the carrier ADV_CARR_T.areq_vpa field. The conversion | ||
8388 | * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr' | ||
8389 | * in AdvExeScsiQueue(). | ||
8390 | */ | ||
8391 | scsiq = (ADV_SCSI_REQ_Q *) | ||
8392 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa)); | ||
8393 | |||
8394 | /* | ||
8395 | * Request finished with good status and the queue was not | ||
8396 | * DMAed to host memory by the firmware. Set all status fields | ||
8397 | * to indicate good status. | ||
8398 | */ | ||
8399 | if ((irq_next_vpa & ASC_RQ_GOOD) != 0) { | ||
8400 | scsiq->done_status = QD_NO_ERROR; | ||
8401 | scsiq->host_status = scsiq->scsi_status = 0; | ||
8402 | scsiq->data_cnt = 0L; | ||
8379 | } | 8403 | } |
8380 | return (0); | 8404 | |
8405 | /* | ||
8406 | * Advance the stopper pointer to the next carrier | ||
8407 | * ignoring the lower four bits. Free the previous | ||
8408 | * stopper carrier. | ||
8409 | */ | ||
8410 | free_carrp = asc_dvc->irq_sp; | ||
8411 | asc_dvc->irq_sp = (ADV_CARR_T *) | ||
8412 | ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa)); | ||
8413 | |||
8414 | free_carrp->next_vpa = | ||
8415 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
8416 | asc_dvc->carr_freelist = free_carrp; | ||
8417 | asc_dvc->carr_pending_cnt--; | ||
8418 | |||
8419 | target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id); | ||
8420 | |||
8421 | /* | ||
8422 | * Clear request microcode control flag. | ||
8423 | */ | ||
8424 | scsiq->cntl = 0; | ||
8425 | |||
8426 | /* | ||
8427 | * Notify the driver of the completed request by passing | ||
8428 | * the ADV_SCSI_REQ_Q pointer to its callback function. | ||
8429 | */ | ||
8430 | scsiq->a_flag |= ADV_SCSIQ_DONE; | ||
8431 | adv_isr_callback(asc_dvc, scsiq); | ||
8432 | /* | ||
8433 | * Note: After the driver callback function is called, 'scsiq' | ||
8434 | * can no longer be referenced. | ||
8435 | * | ||
8436 | * Fall through and continue processing other completed | ||
8437 | * requests... | ||
8438 | */ | ||
8381 | } | 8439 | } |
8382 | if (bus_type & ASC_IS_EISA) { | 8440 | return ADV_TRUE; |
8383 | if ((iop_beg = AscSearchIOPortAddrEISA(iop_beg)) != 0) { | 8441 | } |
8384 | return (iop_beg); | 8442 | |
8385 | } | 8443 | static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code) |
8386 | return (0); | 8444 | { |
8445 | if (asc_dvc->err_code == 0) { | ||
8446 | asc_dvc->err_code = err_code; | ||
8447 | AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W, | ||
8448 | err_code); | ||
8387 | } | 8449 | } |
8388 | return (0); | 8450 | return err_code; |
8389 | } | 8451 | } |
8390 | 8452 | ||
8391 | static PortAddr __init AscSearchIOPortAddr11(PortAddr s_addr) | 8453 | static void AscAckInterrupt(PortAddr iop_base) |
8392 | { | 8454 | { |
8393 | int i; | 8455 | uchar host_flag; |
8394 | PortAddr iop_base; | 8456 | uchar risc_flag; |
8457 | ushort loop; | ||
8395 | 8458 | ||
8396 | for (i = 0; i < ASC_IOADR_TABLE_MAX_IX; i++) { | 8459 | loop = 0; |
8397 | if (_asc_def_iop_base[i] > s_addr) { | 8460 | do { |
8461 | risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B); | ||
8462 | if (loop++ > 0x7FFF) { | ||
8398 | break; | 8463 | break; |
8399 | } | 8464 | } |
8400 | } | 8465 | } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0); |
8401 | for (; i < ASC_IOADR_TABLE_MAX_IX; i++) { | 8466 | host_flag = |
8402 | iop_base = _asc_def_iop_base[i]; | 8467 | AscReadLramByte(iop_base, |
8403 | if (!request_region(iop_base, ASC_IOADR_GAP, "advansys")) { | 8468 | ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT); |
8404 | ASC_DBG1(1, | 8469 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, |
8405 | "AscSearchIOPortAddr11: check_region() failed I/O port 0x%x\n", | 8470 | (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT)); |
8406 | iop_base); | 8471 | AscSetChipStatus(iop_base, CIW_INT_ACK); |
8407 | continue; | 8472 | loop = 0; |
8408 | } | 8473 | while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) { |
8409 | ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%x\n", | 8474 | AscSetChipStatus(iop_base, CIW_INT_ACK); |
8410 | iop_base); | 8475 | if (loop++ > 3) { |
8411 | release_region(iop_base, ASC_IOADR_GAP); | 8476 | break; |
8412 | if (AscFindSignature(iop_base)) { | ||
8413 | return (iop_base); | ||
8414 | } | 8477 | } |
8415 | } | 8478 | } |
8416 | return (0); | 8479 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); |
8417 | } | 8480 | } |
8418 | 8481 | ||
8419 | static void __init AscSetISAPNPWaitForKey(void) | 8482 | static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time) |
8420 | { | 8483 | { |
8421 | outp(ASC_ISA_PNP_PORT_ADDR, 0x02); | 8484 | const uchar *period_table; |
8422 | outp(ASC_ISA_PNP_PORT_WRITE, 0x02); | 8485 | int max_index; |
8423 | return; | 8486 | int min_index; |
8487 | int i; | ||
8488 | |||
8489 | period_table = asc_dvc->sdtr_period_tbl; | ||
8490 | max_index = (int)asc_dvc->max_sdtr_index; | ||
8491 | min_index = (int)asc_dvc->min_sdtr_index; | ||
8492 | if ((syn_time <= period_table[max_index])) { | ||
8493 | for (i = min_index; i < (max_index - 1); i++) { | ||
8494 | if (syn_time <= period_table[i]) { | ||
8495 | return (uchar)i; | ||
8496 | } | ||
8497 | } | ||
8498 | return (uchar)max_index; | ||
8499 | } else { | ||
8500 | return (uchar)(max_index + 1); | ||
8501 | } | ||
8424 | } | 8502 | } |
8425 | #endif /* CONFIG_ISA */ | ||
8426 | 8503 | ||
8427 | static void __init AscToggleIRQAct(PortAddr iop_base) | 8504 | static uchar |
8505 | AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset) | ||
8428 | { | 8506 | { |
8429 | AscSetChipStatus(iop_base, CIW_IRQ_ACT); | 8507 | EXT_MSG sdtr_buf; |
8430 | AscSetChipStatus(iop_base, 0); | 8508 | uchar sdtr_period_index; |
8431 | return; | 8509 | PortAddr iop_base; |
8510 | |||
8511 | iop_base = asc_dvc->iop_base; | ||
8512 | sdtr_buf.msg_type = EXTENDED_MESSAGE; | ||
8513 | sdtr_buf.msg_len = MS_SDTR_LEN; | ||
8514 | sdtr_buf.msg_req = EXTENDED_SDTR; | ||
8515 | sdtr_buf.xfer_period = sdtr_period; | ||
8516 | sdtr_offset &= ASC_SYN_MAX_OFFSET; | ||
8517 | sdtr_buf.req_ack_offset = sdtr_offset; | ||
8518 | sdtr_period_index = AscGetSynPeriodIndex(asc_dvc, sdtr_period); | ||
8519 | if (sdtr_period_index <= asc_dvc->max_sdtr_index) { | ||
8520 | AscMemWordCopyPtrToLram(iop_base, ASCV_MSGOUT_BEG, | ||
8521 | (uchar *)&sdtr_buf, | ||
8522 | sizeof(EXT_MSG) >> 1); | ||
8523 | return ((sdtr_period_index << 4) | sdtr_offset); | ||
8524 | } else { | ||
8525 | sdtr_buf.req_ack_offset = 0; | ||
8526 | AscMemWordCopyPtrToLram(iop_base, ASCV_MSGOUT_BEG, | ||
8527 | (uchar *)&sdtr_buf, | ||
8528 | sizeof(EXT_MSG) >> 1); | ||
8529 | return 0; | ||
8530 | } | ||
8432 | } | 8531 | } |
8433 | 8532 | ||
8434 | static uchar __init AscGetChipIRQ(PortAddr iop_base, ushort bus_type) | 8533 | static uchar |
8534 | AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset) | ||
8435 | { | 8535 | { |
8436 | ushort cfg_lsw; | 8536 | uchar byte; |
8437 | uchar chip_irq; | 8537 | uchar sdtr_period_ix; |
8438 | 8538 | ||
8439 | if ((bus_type & ASC_IS_EISA) != 0) { | 8539 | sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period); |
8440 | cfg_lsw = AscGetEisaChipCfg(iop_base); | 8540 | if (sdtr_period_ix > asc_dvc->max_sdtr_index) |
8441 | chip_irq = (uchar)(((cfg_lsw >> 8) & 0x07) + 10); | 8541 | return 0xFF; |
8442 | if ((chip_irq == 13) || (chip_irq > 15)) { | 8542 | byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET); |
8443 | return (0); | 8543 | return byte; |
8444 | } | ||
8445 | return (chip_irq); | ||
8446 | } | ||
8447 | if ((bus_type & ASC_IS_VL) != 0) { | ||
8448 | cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
8449 | chip_irq = (uchar)(((cfg_lsw >> 2) & 0x07)); | ||
8450 | if ((chip_irq == 0) || (chip_irq == 4) || (chip_irq == 7)) { | ||
8451 | return (0); | ||
8452 | } | ||
8453 | return ((uchar)(chip_irq + (ASC_MIN_IRQ_NO - 1))); | ||
8454 | } | ||
8455 | cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
8456 | chip_irq = (uchar)(((cfg_lsw >> 2) & 0x03)); | ||
8457 | if (chip_irq == 3) | ||
8458 | chip_irq += (uchar)2; | ||
8459 | return ((uchar)(chip_irq + ASC_MIN_IRQ_NO)); | ||
8460 | } | 8544 | } |
8461 | 8545 | ||
8462 | static uchar __init | 8546 | static int AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data) |
8463 | AscSetChipIRQ(PortAddr iop_base, uchar irq_no, ushort bus_type) | ||
8464 | { | 8547 | { |
8465 | ushort cfg_lsw; | 8548 | ASC_SCSI_BIT_ID_TYPE org_id; |
8549 | int i; | ||
8550 | int sta = TRUE; | ||
8466 | 8551 | ||
8467 | if ((bus_type & ASC_IS_VL) != 0) { | 8552 | AscSetBank(iop_base, 1); |
8468 | if (irq_no != 0) { | 8553 | org_id = AscReadChipDvcID(iop_base); |
8469 | if ((irq_no < ASC_MIN_IRQ_NO) | 8554 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8470 | || (irq_no > ASC_MAX_IRQ_NO)) { | 8555 | if (org_id == (0x01 << i)) |
8471 | irq_no = 0; | 8556 | break; |
8472 | } else { | 8557 | } |
8473 | irq_no -= (uchar)((ASC_MIN_IRQ_NO - 1)); | 8558 | org_id = (ASC_SCSI_BIT_ID_TYPE) i; |
8474 | } | 8559 | AscWriteChipDvcID(iop_base, id); |
8560 | if (AscReadChipDvcID(iop_base) == (0x01 << id)) { | ||
8561 | AscSetBank(iop_base, 0); | ||
8562 | AscSetChipSyn(iop_base, sdtr_data); | ||
8563 | if (AscGetChipSyn(iop_base) != sdtr_data) { | ||
8564 | sta = FALSE; | ||
8475 | } | 8565 | } |
8476 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE3); | 8566 | } else { |
8477 | cfg_lsw |= (ushort)0x0010; | 8567 | sta = FALSE; |
8478 | AscSetChipCfgLsw(iop_base, cfg_lsw); | ||
8479 | AscToggleIRQAct(iop_base); | ||
8480 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE0); | ||
8481 | cfg_lsw |= (ushort)((irq_no & 0x07) << 2); | ||
8482 | AscSetChipCfgLsw(iop_base, cfg_lsw); | ||
8483 | AscToggleIRQAct(iop_base); | ||
8484 | return (AscGetChipIRQ(iop_base, bus_type)); | ||
8485 | } | ||
8486 | if ((bus_type & (ASC_IS_ISA)) != 0) { | ||
8487 | if (irq_no == 15) | ||
8488 | irq_no -= (uchar)2; | ||
8489 | irq_no -= (uchar)ASC_MIN_IRQ_NO; | ||
8490 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFF3); | ||
8491 | cfg_lsw |= (ushort)((irq_no & 0x03) << 2); | ||
8492 | AscSetChipCfgLsw(iop_base, cfg_lsw); | ||
8493 | return (AscGetChipIRQ(iop_base, bus_type)); | ||
8494 | } | 8568 | } |
8495 | return (0); | 8569 | AscSetBank(iop_base, 1); |
8570 | AscWriteChipDvcID(iop_base, org_id); | ||
8571 | AscSetBank(iop_base, 0); | ||
8572 | return (sta); | ||
8496 | } | 8573 | } |
8497 | 8574 | ||
8498 | #ifdef CONFIG_ISA | 8575 | static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no) |
8499 | static void __init AscEnableIsaDma(uchar dma_channel) | ||
8500 | { | 8576 | { |
8501 | if (dma_channel < 4) { | 8577 | AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); |
8502 | outp(0x000B, (ushort)(0xC0 | dma_channel)); | 8578 | AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data); |
8503 | outp(0x000A, dma_channel); | ||
8504 | } else if (dma_channel < 8) { | ||
8505 | outp(0x00D6, (ushort)(0xC0 | (dma_channel - 4))); | ||
8506 | outp(0x00D4, (ushort)(dma_channel - 4)); | ||
8507 | } | ||
8508 | return; | ||
8509 | } | 8579 | } |
8510 | #endif /* CONFIG_ISA */ | ||
8511 | 8580 | ||
8512 | static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | 8581 | static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) |
8513 | { | 8582 | { |
@@ -8528,9 +8597,9 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8528 | uchar cur_dvc_qng; | 8597 | uchar cur_dvc_qng; |
8529 | uchar asyn_sdtr; | 8598 | uchar asyn_sdtr; |
8530 | uchar scsi_status; | 8599 | uchar scsi_status; |
8531 | asc_board_t *boardp; | 8600 | struct asc_board *boardp; |
8532 | 8601 | ||
8533 | ASC_ASSERT(asc_dvc->drv_ptr != NULL); | 8602 | BUG_ON(!asc_dvc->drv_ptr); |
8534 | boardp = asc_dvc->drv_ptr; | 8603 | boardp = asc_dvc->drv_ptr; |
8535 | 8604 | ||
8536 | iop_base = asc_dvc->iop_base; | 8605 | iop_base = asc_dvc->iop_base; |
@@ -8541,8 +8610,7 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8541 | target_ix = AscReadLramByte(iop_base, | 8610 | target_ix = AscReadLramByte(iop_base, |
8542 | (ushort)(halt_q_addr + | 8611 | (ushort)(halt_q_addr + |
8543 | (ushort)ASC_SCSIQ_B_TARGET_IX)); | 8612 | (ushort)ASC_SCSIQ_B_TARGET_IX)); |
8544 | q_cntl = | 8613 | q_cntl = AscReadLramByte(iop_base, |
8545 | AscReadLramByte(iop_base, | ||
8546 | (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL)); | 8614 | (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL)); |
8547 | tid_no = ASC_TIX_TO_TID(target_ix); | 8615 | tid_no = ASC_TIX_TO_TID(target_ix); |
8548 | target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no); | 8616 | target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no); |
@@ -8566,14 +8634,13 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8566 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8634 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
8567 | return (0); | 8635 | return (0); |
8568 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { | 8636 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { |
8569 | |||
8570 | AscMemWordCopyPtrFromLram(iop_base, | 8637 | AscMemWordCopyPtrFromLram(iop_base, |
8571 | ASCV_MSGIN_BEG, | 8638 | ASCV_MSGIN_BEG, |
8572 | (uchar *)&ext_msg, | 8639 | (uchar *)&ext_msg, |
8573 | sizeof(EXT_MSG) >> 1); | 8640 | sizeof(EXT_MSG) >> 1); |
8574 | 8641 | ||
8575 | if (ext_msg.msg_type == MS_EXTEND && | 8642 | if (ext_msg.msg_type == EXTENDED_MESSAGE && |
8576 | ext_msg.msg_req == MS_SDTR_CODE && | 8643 | ext_msg.msg_req == EXTENDED_SDTR && |
8577 | ext_msg.msg_len == MS_SDTR_LEN) { | 8644 | ext_msg.msg_len == MS_SDTR_LEN) { |
8578 | sdtr_accept = TRUE; | 8645 | sdtr_accept = TRUE; |
8579 | if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) { | 8646 | if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) { |
@@ -8582,15 +8649,14 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8582 | ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET; | 8649 | ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET; |
8583 | } | 8650 | } |
8584 | if ((ext_msg.xfer_period < | 8651 | if ((ext_msg.xfer_period < |
8585 | asc_dvc->sdtr_period_tbl[asc_dvc-> | 8652 | asc_dvc->sdtr_period_tbl[asc_dvc->min_sdtr_index]) |
8586 | host_init_sdtr_index]) | ||
8587 | || (ext_msg.xfer_period > | 8653 | || (ext_msg.xfer_period > |
8588 | asc_dvc->sdtr_period_tbl[asc_dvc-> | 8654 | asc_dvc->sdtr_period_tbl[asc_dvc-> |
8589 | max_sdtr_index])) { | 8655 | max_sdtr_index])) { |
8590 | sdtr_accept = FALSE; | 8656 | sdtr_accept = FALSE; |
8591 | ext_msg.xfer_period = | 8657 | ext_msg.xfer_period = |
8592 | asc_dvc->sdtr_period_tbl[asc_dvc-> | 8658 | asc_dvc->sdtr_period_tbl[asc_dvc-> |
8593 | host_init_sdtr_index]; | 8659 | min_sdtr_index]; |
8594 | } | 8660 | } |
8595 | if (sdtr_accept) { | 8661 | if (sdtr_accept) { |
8596 | sdtr_data = | 8662 | sdtr_data = |
@@ -8614,7 +8680,6 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8614 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); | 8680 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); |
8615 | } else { | 8681 | } else { |
8616 | if (sdtr_accept && (q_cntl & QC_MSG_OUT)) { | 8682 | if (sdtr_accept && (q_cntl & QC_MSG_OUT)) { |
8617 | |||
8618 | q_cntl &= ~QC_MSG_OUT; | 8683 | q_cntl &= ~QC_MSG_OUT; |
8619 | asc_dvc->sdtr_done |= target_id; | 8684 | asc_dvc->sdtr_done |= target_id; |
8620 | asc_dvc->init_sdtr |= target_id; | 8685 | asc_dvc->init_sdtr |= target_id; |
@@ -8629,7 +8694,6 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8629 | tid_no); | 8694 | tid_no); |
8630 | boardp->sdtr_data[tid_no] = sdtr_data; | 8695 | boardp->sdtr_data[tid_no] = sdtr_data; |
8631 | } else { | 8696 | } else { |
8632 | |||
8633 | q_cntl |= QC_MSG_OUT; | 8697 | q_cntl |= QC_MSG_OUT; |
8634 | AscMsgOutSDTR(asc_dvc, | 8698 | AscMsgOutSDTR(asc_dvc, |
8635 | ext_msg.xfer_period, | 8699 | ext_msg.xfer_period, |
@@ -8655,8 +8719,8 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8655 | q_cntl); | 8719 | q_cntl); |
8656 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8720 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
8657 | return (0); | 8721 | return (0); |
8658 | } else if (ext_msg.msg_type == MS_EXTEND && | 8722 | } else if (ext_msg.msg_type == EXTENDED_MESSAGE && |
8659 | ext_msg.msg_req == MS_WDTR_CODE && | 8723 | ext_msg.msg_req == EXTENDED_WDTR && |
8660 | ext_msg.msg_len == MS_WDTR_LEN) { | 8724 | ext_msg.msg_len == MS_WDTR_LEN) { |
8661 | 8725 | ||
8662 | ext_msg.wdtr_width = 0; | 8726 | ext_msg.wdtr_width = 0; |
@@ -8749,9 +8813,9 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8749 | (uchar *)&out_msg, | 8813 | (uchar *)&out_msg, |
8750 | sizeof(EXT_MSG) >> 1); | 8814 | sizeof(EXT_MSG) >> 1); |
8751 | 8815 | ||
8752 | if ((out_msg.msg_type == MS_EXTEND) && | 8816 | if ((out_msg.msg_type == EXTENDED_MESSAGE) && |
8753 | (out_msg.msg_len == MS_SDTR_LEN) && | 8817 | (out_msg.msg_len == MS_SDTR_LEN) && |
8754 | (out_msg.msg_req == MS_SDTR_CODE)) { | 8818 | (out_msg.msg_req == EXTENDED_SDTR)) { |
8755 | 8819 | ||
8756 | asc_dvc->init_sdtr &= ~target_id; | 8820 | asc_dvc->init_sdtr &= ~target_id; |
8757 | asc_dvc->sdtr_done &= ~target_id; | 8821 | asc_dvc->sdtr_done &= ~target_id; |
@@ -8797,9 +8861,9 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8797 | cur_dvc_qng); | 8861 | cur_dvc_qng); |
8798 | 8862 | ||
8799 | /* | 8863 | /* |
8800 | * Set the device queue depth to the number of | 8864 | * Set the device queue depth to the |
8801 | * active requests when the QUEUE FULL condition | 8865 | * number of active requests when the |
8802 | * was encountered. | 8866 | * QUEUE FULL condition was encountered. |
8803 | */ | 8867 | */ |
8804 | boardp->queue_full |= target_id; | 8868 | boardp->queue_full |= target_id; |
8805 | boardp->queue_full_cnt[tid_no] = | 8869 | boardp->queue_full_cnt[tid_no] = |
@@ -8825,9 +8889,8 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8825 | int i; | 8889 | int i; |
8826 | 8890 | ||
8827 | q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP); | 8891 | q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP); |
8828 | if (q_no == ASC_QLINK_END) { | 8892 | if (q_no == ASC_QLINK_END) |
8829 | return (0); | 8893 | return 0; |
8830 | } | ||
8831 | 8894 | ||
8832 | q_addr = ASC_QNO_TO_QADDR(q_no); | 8895 | q_addr = ASC_QNO_TO_QADDR(q_no); |
8833 | 8896 | ||
@@ -8879,8 +8942,8 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8879 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; | 8942 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; |
8880 | 8943 | ||
8881 | /* | 8944 | /* |
8882 | * Keep track of remaining number of SG elements that will | 8945 | * Keep track of remaining number of SG elements that |
8883 | * need to be handled on the next interrupt. | 8946 | * will need to be handled on the next interrupt. |
8884 | */ | 8947 | */ |
8885 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); | 8948 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); |
8886 | } else { | 8949 | } else { |
@@ -8971,6 +9034,34 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
8971 | return (0); | 9034 | return (0); |
8972 | } | 9035 | } |
8973 | 9036 | ||
9037 | /* | ||
9038 | * void | ||
9039 | * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) | ||
9040 | * | ||
9041 | * Calling/Exit State: | ||
9042 | * none | ||
9043 | * | ||
9044 | * Description: | ||
9045 | * Input an ASC_QDONE_INFO structure from the chip | ||
9046 | */ | ||
9047 | static void | ||
9048 | DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) | ||
9049 | { | ||
9050 | int i; | ||
9051 | ushort word; | ||
9052 | |||
9053 | AscSetChipLramAddr(iop_base, s_addr); | ||
9054 | for (i = 0; i < 2 * words; i += 2) { | ||
9055 | if (i == 10) { | ||
9056 | continue; | ||
9057 | } | ||
9058 | word = inpw(iop_base + IOP_RAM_DATA); | ||
9059 | inbuf[i] = word & 0xff; | ||
9060 | inbuf[i + 1] = (word >> 8) & 0xff; | ||
9061 | } | ||
9062 | ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words); | ||
9063 | } | ||
9064 | |||
8974 | static uchar | 9065 | static uchar |
8975 | _AscCopyLramScsiDoneQ(PortAddr iop_base, | 9066 | _AscCopyLramScsiDoneQ(PortAddr iop_base, |
8976 | ushort q_addr, | 9067 | ushort q_addr, |
@@ -9014,7 +9105,124 @@ _AscCopyLramScsiDoneQ(PortAddr iop_base, | |||
9014 | ASC_SCSIQ_DW_REMAIN_XFER_CNT)); | 9105 | ASC_SCSIQ_DW_REMAIN_XFER_CNT)); |
9015 | 9106 | ||
9016 | scsiq->remain_bytes &= max_dma_count; | 9107 | scsiq->remain_bytes &= max_dma_count; |
9017 | return (sg_queue_cnt); | 9108 | return sg_queue_cnt; |
9109 | } | ||
9110 | |||
9111 | /* | ||
9112 | * asc_isr_callback() - Second Level Interrupt Handler called by AscISR(). | ||
9113 | * | ||
9114 | * Interrupt callback function for the Narrow SCSI Asc Library. | ||
9115 | */ | ||
9116 | static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) | ||
9117 | { | ||
9118 | struct asc_board *boardp; | ||
9119 | struct scsi_cmnd *scp; | ||
9120 | struct Scsi_Host *shost; | ||
9121 | |||
9122 | ASC_DBG(1, "asc_dvc_varp 0x%p, qdonep 0x%p\n", asc_dvc_varp, qdonep); | ||
9123 | ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep); | ||
9124 | |||
9125 | scp = advansys_srb_to_ptr(asc_dvc_varp, qdonep->d2.srb_ptr); | ||
9126 | if (!scp) | ||
9127 | return; | ||
9128 | |||
9129 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
9130 | |||
9131 | shost = scp->device->host; | ||
9132 | ASC_STATS(shost, callback); | ||
9133 | ASC_DBG(1, "shost 0x%p\n", shost); | ||
9134 | |||
9135 | boardp = shost_priv(shost); | ||
9136 | BUG_ON(asc_dvc_varp != &boardp->dvc_var.asc_dvc_var); | ||
9137 | |||
9138 | dma_unmap_single(boardp->dev, scp->SCp.dma_handle, | ||
9139 | sizeof(scp->sense_buffer), DMA_FROM_DEVICE); | ||
9140 | /* | ||
9141 | * 'qdonep' contains the command's ending status. | ||
9142 | */ | ||
9143 | switch (qdonep->d3.done_stat) { | ||
9144 | case QD_NO_ERROR: | ||
9145 | ASC_DBG(2, "QD_NO_ERROR\n"); | ||
9146 | scp->result = 0; | ||
9147 | |||
9148 | /* | ||
9149 | * Check for an underrun condition. | ||
9150 | * | ||
9151 | * If there was no error and an underrun condition, then | ||
9152 | * return the number of underrun bytes. | ||
9153 | */ | ||
9154 | if (scsi_bufflen(scp) != 0 && qdonep->remain_bytes != 0 && | ||
9155 | qdonep->remain_bytes <= scsi_bufflen(scp)) { | ||
9156 | ASC_DBG(1, "underrun condition %u bytes\n", | ||
9157 | (unsigned)qdonep->remain_bytes); | ||
9158 | scsi_set_resid(scp, qdonep->remain_bytes); | ||
9159 | } | ||
9160 | break; | ||
9161 | |||
9162 | case QD_WITH_ERROR: | ||
9163 | ASC_DBG(2, "QD_WITH_ERROR\n"); | ||
9164 | switch (qdonep->d3.host_stat) { | ||
9165 | case QHSTA_NO_ERROR: | ||
9166 | if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) { | ||
9167 | ASC_DBG(2, "SAM_STAT_CHECK_CONDITION\n"); | ||
9168 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
9169 | sizeof(scp->sense_buffer)); | ||
9170 | /* | ||
9171 | * Note: The 'status_byte()' macro used by | ||
9172 | * target drivers defined in scsi.h shifts the | ||
9173 | * status byte returned by host drivers right | ||
9174 | * by 1 bit. This is why target drivers also | ||
9175 | * use right shifted status byte definitions. | ||
9176 | * For instance target drivers use | ||
9177 | * CHECK_CONDITION, defined to 0x1, instead of | ||
9178 | * the SCSI defined check condition value of | ||
9179 | * 0x2. Host drivers are supposed to return | ||
9180 | * the status byte as it is defined by SCSI. | ||
9181 | */ | ||
9182 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
9183 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
9184 | } else { | ||
9185 | scp->result = STATUS_BYTE(qdonep->d3.scsi_stat); | ||
9186 | } | ||
9187 | break; | ||
9188 | |||
9189 | default: | ||
9190 | /* QHSTA error occurred */ | ||
9191 | ASC_DBG(1, "host_stat 0x%x\n", qdonep->d3.host_stat); | ||
9192 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
9193 | break; | ||
9194 | } | ||
9195 | break; | ||
9196 | |||
9197 | case QD_ABORTED_BY_HOST: | ||
9198 | ASC_DBG(1, "QD_ABORTED_BY_HOST\n"); | ||
9199 | scp->result = | ||
9200 | HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3. | ||
9201 | scsi_msg) | | ||
9202 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
9203 | break; | ||
9204 | |||
9205 | default: | ||
9206 | ASC_DBG(1, "done_stat 0x%x\n", qdonep->d3.done_stat); | ||
9207 | scp->result = | ||
9208 | HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3. | ||
9209 | scsi_msg) | | ||
9210 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
9211 | break; | ||
9212 | } | ||
9213 | |||
9214 | /* | ||
9215 | * If the 'init_tidmask' bit isn't already set for the target and the | ||
9216 | * current request finished normally, then set the bit for the target | ||
9217 | * to indicate that a device is present. | ||
9218 | */ | ||
9219 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && | ||
9220 | qdonep->d3.done_stat == QD_NO_ERROR && | ||
9221 | qdonep->d3.host_stat == QHSTA_NO_ERROR) { | ||
9222 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
9223 | } | ||
9224 | |||
9225 | asc_scsi_done(scp); | ||
9018 | } | 9226 | } |
9019 | 9227 | ||
9020 | static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) | 9228 | static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) |
@@ -9035,10 +9243,8 @@ static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) | |||
9035 | ASC_QDONE_INFO scsiq_buf; | 9243 | ASC_QDONE_INFO scsiq_buf; |
9036 | ASC_QDONE_INFO *scsiq; | 9244 | ASC_QDONE_INFO *scsiq; |
9037 | int false_overrun; | 9245 | int false_overrun; |
9038 | ASC_ISR_CALLBACK asc_isr_callback; | ||
9039 | 9246 | ||
9040 | iop_base = asc_dvc->iop_base; | 9247 | iop_base = asc_dvc->iop_base; |
9041 | asc_isr_callback = asc_dvc->isr_callback; | ||
9042 | n_q_used = 1; | 9248 | n_q_used = 1; |
9043 | scsiq = (ASC_QDONE_INFO *)&scsiq_buf; | 9249 | scsiq = (ASC_QDONE_INFO *)&scsiq_buf; |
9044 | done_q_tail = (uchar)AscGetVarDoneQTail(iop_base); | 9250 | done_q_tail = (uchar)AscGetVarDoneQTail(iop_base); |
@@ -9141,7 +9347,7 @@ static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) | |||
9141 | AscSetChipControl(iop_base, | 9347 | AscSetChipControl(iop_base, |
9142 | (uchar)(CC_SCSI_RESET | 9348 | (uchar)(CC_SCSI_RESET |
9143 | | CC_HALT)); | 9349 | | CC_HALT)); |
9144 | DvcDelayNanoSecond(asc_dvc, 60000); | 9350 | udelay(60); |
9145 | AscSetChipControl(iop_base, CC_HALT); | 9351 | AscSetChipControl(iop_base, CC_HALT); |
9146 | AscSetChipStatus(iop_base, | 9352 | AscSetChipStatus(iop_base, |
9147 | CIW_CLR_SCSI_RESET_INT); | 9353 | CIW_CLR_SCSI_RESET_INT); |
@@ -9150,7 +9356,7 @@ static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) | |||
9150 | } | 9356 | } |
9151 | } | 9357 | } |
9152 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | 9358 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { |
9153 | (*asc_isr_callback) (asc_dvc, scsiq); | 9359 | asc_isr_callback(asc_dvc, scsiq); |
9154 | } else { | 9360 | } else { |
9155 | if ((AscReadLramByte(iop_base, | 9361 | if ((AscReadLramByte(iop_base, |
9156 | (ushort)(q_addr + (ushort) | 9362 | (ushort)(q_addr + (ushort) |
@@ -9168,7 +9374,7 @@ static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) | |||
9168 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS); | 9374 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS); |
9169 | FATAL_ERR_QDONE: | 9375 | FATAL_ERR_QDONE: |
9170 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | 9376 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { |
9171 | (*asc_isr_callback) (asc_dvc, scsiq); | 9377 | asc_isr_callback(asc_dvc, scsiq); |
9172 | } | 9378 | } |
9173 | return (0x80); | 9379 | return (0x80); |
9174 | } | 9380 | } |
@@ -9190,22 +9396,19 @@ static int AscISR(ASC_DVC_VAR *asc_dvc) | |||
9190 | iop_base = asc_dvc->iop_base; | 9396 | iop_base = asc_dvc->iop_base; |
9191 | int_pending = FALSE; | 9397 | int_pending = FALSE; |
9192 | 9398 | ||
9193 | if (AscIsIntPending(iop_base) == 0) { | 9399 | if (AscIsIntPending(iop_base) == 0) |
9194 | return int_pending; | 9400 | return int_pending; |
9195 | } | ||
9196 | 9401 | ||
9197 | if (((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) | 9402 | if ((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) { |
9198 | || (asc_dvc->isr_callback == 0) | 9403 | return ERR; |
9199 | ) { | ||
9200 | return (ERR); | ||
9201 | } | 9404 | } |
9202 | if (asc_dvc->in_critical_cnt != 0) { | 9405 | if (asc_dvc->in_critical_cnt != 0) { |
9203 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL); | 9406 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL); |
9204 | return (ERR); | 9407 | return ERR; |
9205 | } | 9408 | } |
9206 | if (asc_dvc->is_in_int) { | 9409 | if (asc_dvc->is_in_int) { |
9207 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY); | 9410 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY); |
9208 | return (ERR); | 9411 | return ERR; |
9209 | } | 9412 | } |
9210 | asc_dvc->is_in_int = TRUE; | 9413 | asc_dvc->is_in_int = TRUE; |
9211 | ctrl_reg = AscGetChipControl(iop_base); | 9414 | ctrl_reg = AscGetChipControl(iop_base); |
@@ -9220,7 +9423,7 @@ static int AscISR(ASC_DVC_VAR *asc_dvc) | |||
9220 | saved_ctrl_reg &= (uchar)(~CC_HALT); | 9423 | saved_ctrl_reg &= (uchar)(~CC_HALT); |
9221 | while ((AscGetChipStatus(iop_base) & | 9424 | while ((AscGetChipStatus(iop_base) & |
9222 | CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) { | 9425 | CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) { |
9223 | DvcSleepMilliSecond(100); | 9426 | mdelay(100); |
9224 | } | 9427 | } |
9225 | AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT)); | 9428 | AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT)); |
9226 | AscSetChipControl(iop_base, CC_HALT); | 9429 | AscSetChipControl(iop_base, CC_HALT); |
@@ -9235,9 +9438,7 @@ static int AscISR(ASC_DVC_VAR *asc_dvc) | |||
9235 | (uchar)(~ASC_HOST_FLAG_IN_ISR); | 9438 | (uchar)(~ASC_HOST_FLAG_IN_ISR); |
9236 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, | 9439 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, |
9237 | (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR)); | 9440 | (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR)); |
9238 | if ((chipstat & CSW_INT_PENDING) | 9441 | if ((chipstat & CSW_INT_PENDING) || (int_pending)) { |
9239 | || (int_pending) | ||
9240 | ) { | ||
9241 | AscAckInterrupt(iop_base); | 9442 | AscAckInterrupt(iop_base); |
9242 | int_pending = TRUE; | 9443 | int_pending = TRUE; |
9243 | if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) { | 9444 | if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) { |
@@ -9268,615 +9469,767 @@ static int AscISR(ASC_DVC_VAR *asc_dvc) | |||
9268 | AscSetChipLramAddr(iop_base, saved_ram_addr); | 9469 | AscSetChipLramAddr(iop_base, saved_ram_addr); |
9269 | AscSetChipControl(iop_base, saved_ctrl_reg); | 9470 | AscSetChipControl(iop_base, saved_ctrl_reg); |
9270 | asc_dvc->is_in_int = FALSE; | 9471 | asc_dvc->is_in_int = FALSE; |
9271 | return (int_pending); | 9472 | return int_pending; |
9272 | } | 9473 | } |
9273 | 9474 | ||
9274 | /* Microcode buffer is kept after initialization for error recovery. */ | 9475 | /* |
9275 | static uchar _asc_mcode_buf[] = { | 9476 | * advansys_reset() |
9276 | 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9477 | * |
9277 | 0x00, 0x00, 0x00, 0x00, | 9478 | * Reset the bus associated with the command 'scp'. |
9278 | 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, | 9479 | * |
9279 | 0x00, 0x00, 0x00, 0x00, | 9480 | * This function runs its own thread. Interrupts must be blocked but |
9280 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9481 | * sleeping is allowed and no locking other than for host structures is |
9281 | 0x00, 0x00, 0x00, 0x00, | 9482 | * required. Returns SUCCESS or FAILED. |
9282 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9483 | */ |
9283 | 0x00, 0x00, 0x00, 0x00, | 9484 | static int advansys_reset(struct scsi_cmnd *scp) |
9284 | 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00, | 9485 | { |
9285 | 0x00, 0xFF, 0x00, 0x00, | 9486 | struct Scsi_Host *shost = scp->device->host; |
9286 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, | 9487 | struct asc_board *boardp = shost_priv(shost); |
9287 | 0x00, 0x00, 0x00, 0x00, | 9488 | unsigned long flags; |
9288 | 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, | 9489 | int status; |
9289 | 0x00, 0x00, 0x00, 0x00, | 9490 | int ret = SUCCESS; |
9290 | 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88, | ||
9291 | 0x00, 0x00, 0x00, 0x00, | ||
9292 | 0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, | ||
9293 | 0x03, 0x23, 0x36, 0x40, | ||
9294 | 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2, | ||
9295 | 0xC2, 0x00, 0x92, 0x80, | ||
9296 | 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60, | ||
9297 | 0xB6, 0x00, 0x92, 0x80, | ||
9298 | 0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, | ||
9299 | 0x92, 0x80, 0x80, 0x62, | ||
9300 | 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, | ||
9301 | 0xCD, 0x04, 0x4D, 0x00, | ||
9302 | 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01, | ||
9303 | 0xE6, 0x84, 0xD2, 0xC1, | ||
9304 | 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, | ||
9305 | 0xC6, 0x81, 0xC2, 0x88, | ||
9306 | 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00, | ||
9307 | 0x84, 0x97, 0x07, 0xA6, | ||
9308 | 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE, | ||
9309 | 0xC2, 0x88, 0xCE, 0x00, | ||
9310 | 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, | ||
9311 | 0x80, 0x63, 0x07, 0xA6, | ||
9312 | 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, | ||
9313 | 0x34, 0x01, 0x00, 0x33, | ||
9314 | 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23, | ||
9315 | 0x68, 0x98, 0x4D, 0x04, | ||
9316 | 0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, | ||
9317 | 0xF8, 0x88, 0xFB, 0x23, | ||
9318 | 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01, | ||
9319 | 0x00, 0x33, 0x0A, 0x00, | ||
9320 | 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00, | ||
9321 | 0xC2, 0x88, 0xCD, 0x04, | ||
9322 | 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, | ||
9323 | 0x06, 0xAB, 0x82, 0x01, | ||
9324 | 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3, | ||
9325 | 0x3C, 0x01, 0x00, 0x05, | ||
9326 | 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01, | ||
9327 | 0x15, 0x23, 0xA1, 0x01, | ||
9328 | 0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, | ||
9329 | 0x06, 0x61, 0x00, 0xA0, | ||
9330 | 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, | ||
9331 | 0xC2, 0x88, 0x06, 0x23, | ||
9332 | 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01, | ||
9333 | 0x57, 0x60, 0x00, 0xA0, | ||
9334 | 0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, | ||
9335 | 0x4B, 0x00, 0x06, 0x61, | ||
9336 | 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC, | ||
9337 | 0x4F, 0x00, 0x84, 0x97, | ||
9338 | 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97, | ||
9339 | 0x48, 0x04, 0x84, 0x80, | ||
9340 | 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, | ||
9341 | 0x81, 0x73, 0x06, 0x29, | ||
9342 | 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88, | ||
9343 | 0x04, 0x98, 0xF0, 0x80, | ||
9344 | 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6, | ||
9345 | 0x34, 0x02, 0x03, 0xA6, | ||
9346 | 0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, | ||
9347 | 0x46, 0x82, 0xFE, 0x95, | ||
9348 | 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02, | ||
9349 | 0x07, 0xA6, 0x5A, 0x02, | ||
9350 | 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95, | ||
9351 | 0x48, 0x82, 0x60, 0x96, | ||
9352 | 0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, | ||
9353 | 0x04, 0x01, 0x0C, 0xDC, | ||
9354 | 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, | ||
9355 | 0x6F, 0x00, 0xA5, 0x01, | ||
9356 | 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, | ||
9357 | 0x02, 0xA6, 0xAA, 0x02, | ||
9358 | 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, | ||
9359 | 0x01, 0xA6, 0xB4, 0x02, | ||
9360 | 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E, | ||
9361 | 0x80, 0x63, 0x00, 0x43, | ||
9362 | 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, | ||
9363 | 0x04, 0x61, 0x84, 0x01, | ||
9364 | 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, | ||
9365 | 0x00, 0x00, 0xEA, 0x82, | ||
9366 | 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8, | ||
9367 | 0x00, 0x33, 0x1F, 0x00, | ||
9368 | 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98, | ||
9369 | 0xB6, 0x2D, 0x01, 0xA6, | ||
9370 | 0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, | ||
9371 | 0x10, 0x03, 0x03, 0xA6, | ||
9372 | 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, | ||
9373 | 0x7C, 0x95, 0xEE, 0x82, | ||
9374 | 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4, | ||
9375 | 0x04, 0x01, 0x2D, 0xC8, | ||
9376 | 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, | ||
9377 | 0x05, 0x05, 0x86, 0x98, | ||
9378 | 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6, | ||
9379 | 0x3C, 0x04, 0x06, 0xA6, | ||
9380 | 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88, | ||
9381 | 0x7C, 0x95, 0x32, 0x83, | ||
9382 | 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, | ||
9383 | 0xEB, 0x04, 0x00, 0x33, | ||
9384 | 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05, | ||
9385 | 0xFF, 0xA2, 0x7A, 0x03, | ||
9386 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01, | ||
9387 | 0x00, 0xA2, 0x9A, 0x03, | ||
9388 | 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, | ||
9389 | 0x01, 0xA6, 0x96, 0x03, | ||
9390 | 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, | ||
9391 | 0xA4, 0x03, 0x00, 0xA6, | ||
9392 | 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03, | ||
9393 | 0x07, 0xA6, 0xB2, 0x03, | ||
9394 | 0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, | ||
9395 | 0xA8, 0x98, 0x80, 0x42, | ||
9396 | 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95, | ||
9397 | 0xC0, 0x83, 0x00, 0x33, | ||
9398 | 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, | ||
9399 | 0xA0, 0x01, 0x12, 0x23, | ||
9400 | 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, | ||
9401 | 0x80, 0x67, 0x05, 0x23, | ||
9402 | 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04, | ||
9403 | 0x06, 0xA6, 0x0A, 0x04, | ||
9404 | 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96, | ||
9405 | 0xF4, 0x83, 0x20, 0x84, | ||
9406 | 0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, | ||
9407 | 0x83, 0x03, 0x80, 0x63, | ||
9408 | 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, | ||
9409 | 0x38, 0x04, 0x00, 0x33, | ||
9410 | 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84, | ||
9411 | 0x1D, 0x01, 0x06, 0xCC, | ||
9412 | 0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, | ||
9413 | 0xA2, 0x0D, 0x80, 0x63, | ||
9414 | 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03, | ||
9415 | 0x80, 0x63, 0xA3, 0x01, | ||
9416 | 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, | ||
9417 | 0x76, 0x04, 0xE0, 0x00, | ||
9418 | 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, | ||
9419 | 0x00, 0x33, 0x1E, 0x00, | ||
9420 | 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, | ||
9421 | 0x08, 0x23, 0x22, 0xA3, | ||
9422 | 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3, | ||
9423 | 0xC4, 0x04, 0x42, 0x23, | ||
9424 | 0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, | ||
9425 | 0xF8, 0x88, 0x04, 0x98, | ||
9426 | 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, | ||
9427 | 0x81, 0x62, 0xE8, 0x81, | ||
9428 | 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98, | ||
9429 | 0x00, 0x33, 0x00, 0x81, | ||
9430 | 0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, | ||
9431 | 0xF8, 0x88, 0x04, 0x23, | ||
9432 | 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3, | ||
9433 | 0xF4, 0x04, 0x00, 0x33, | ||
9434 | 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, | ||
9435 | 0x04, 0x23, 0xA0, 0x01, | ||
9436 | 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, | ||
9437 | 0x00, 0xA3, 0x22, 0x05, | ||
9438 | 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85, | ||
9439 | 0x46, 0x97, 0xCD, 0x04, | ||
9440 | 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23, | ||
9441 | 0x82, 0x01, 0x34, 0x85, | ||
9442 | 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, | ||
9443 | 0x1D, 0x01, 0x04, 0xD6, | ||
9444 | 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
9445 | 0x49, 0x00, 0x81, 0x01, | ||
9446 | 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01, | ||
9447 | 0x49, 0x04, 0x80, 0x01, | ||
9448 | 0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, | ||
9449 | 0x01, 0x23, 0xEA, 0x00, | ||
9450 | 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, | ||
9451 | 0x07, 0xA4, 0xF8, 0x05, | ||
9452 | 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00, | ||
9453 | 0xC2, 0x88, 0x04, 0xA0, | ||
9454 | 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, | ||
9455 | 0x00, 0xA2, 0xA4, 0x05, | ||
9456 | 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00, | ||
9457 | 0x62, 0x97, 0x04, 0x85, | ||
9458 | 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05, | ||
9459 | 0xF4, 0x85, 0x03, 0xA0, | ||
9460 | 0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, | ||
9461 | 0xCC, 0x86, 0x07, 0xA0, | ||
9462 | 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, | ||
9463 | 0x80, 0x67, 0x80, 0x63, | ||
9464 | 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23, | ||
9465 | 0xF8, 0x88, 0x07, 0x23, | ||
9466 | 0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, | ||
9467 | 0x00, 0x63, 0x4A, 0x00, | ||
9468 | 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23, | ||
9469 | 0x07, 0x41, 0x83, 0x03, | ||
9470 | 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88, | ||
9471 | 0x1D, 0x01, 0x01, 0xD6, | ||
9472 | 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, | ||
9473 | 0x07, 0xA6, 0x7C, 0x05, | ||
9474 | 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, | ||
9475 | 0x52, 0x00, 0x06, 0x61, | ||
9476 | 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41, | ||
9477 | 0x00, 0x63, 0x1D, 0x01, | ||
9478 | 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, | ||
9479 | 0x07, 0x41, 0x00, 0x63, | ||
9480 | 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23, | ||
9481 | 0xDF, 0x00, 0x06, 0xA6, | ||
9482 | 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33, | ||
9483 | 0x00, 0x40, 0xC0, 0x20, | ||
9484 | 0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, | ||
9485 | 0x06, 0xA6, 0x94, 0x06, | ||
9486 | 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B, | ||
9487 | 0x40, 0x0E, 0x80, 0x63, | ||
9488 | 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E, | ||
9489 | 0x80, 0x63, 0x00, 0x43, | ||
9490 | 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, | ||
9491 | 0x80, 0x67, 0x40, 0x0E, | ||
9492 | 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, | ||
9493 | 0x07, 0xA6, 0xD6, 0x06, | ||
9494 | 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00, | ||
9495 | 0x0A, 0x2B, 0x07, 0xA6, | ||
9496 | 0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, | ||
9497 | 0xF4, 0x06, 0xC0, 0x0E, | ||
9498 | 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, | ||
9499 | 0x81, 0x62, 0x04, 0x01, | ||
9500 | 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, | ||
9501 | 0x8C, 0x06, 0x00, 0x33, | ||
9502 | 0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, | ||
9503 | 0x80, 0x63, 0x06, 0xA6, | ||
9504 | 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88, | ||
9505 | 0x00, 0x00, 0x80, 0x67, | ||
9506 | 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05, | ||
9507 | 0xBF, 0x23, 0x04, 0x61, | ||
9508 | 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, | ||
9509 | 0x00, 0x01, 0xF2, 0x00, | ||
9510 | 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, | ||
9511 | 0x80, 0x05, 0x81, 0x05, | ||
9512 | 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, | ||
9513 | 0x70, 0x00, 0x81, 0x01, | ||
9514 | 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, | ||
9515 | 0x70, 0x00, 0x80, 0x01, | ||
9516 | 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, | ||
9517 | 0xF1, 0x00, 0x70, 0x00, | ||
9518 | 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01, | ||
9519 | 0x71, 0x04, 0x70, 0x00, | ||
9520 | 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, | ||
9521 | 0xA3, 0x01, 0xA2, 0x01, | ||
9522 | 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, | ||
9523 | 0xC4, 0x07, 0x00, 0x33, | ||
9524 | 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, | ||
9525 | 0x48, 0x00, 0xB0, 0x01, | ||
9526 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, | ||
9527 | 0x00, 0xA2, 0xE4, 0x07, | ||
9528 | 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
9529 | 0x05, 0x05, 0x00, 0x63, | ||
9530 | 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, | ||
9531 | 0x76, 0x08, 0x80, 0x02, | ||
9532 | 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, | ||
9533 | 0x00, 0x02, 0x00, 0xA0, | ||
9534 | 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, | ||
9535 | 0x00, 0x63, 0xF3, 0x04, | ||
9536 | 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40, | ||
9537 | 0x00, 0xA2, 0x44, 0x08, | ||
9538 | 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, | ||
9539 | 0x24, 0x08, 0x04, 0x98, | ||
9540 | 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, | ||
9541 | 0x5A, 0x88, 0x02, 0x01, | ||
9542 | 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00, | ||
9543 | 0x00, 0xA3, 0x64, 0x08, | ||
9544 | 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, | ||
9545 | 0x06, 0xA6, 0x76, 0x08, | ||
9546 | 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, | ||
9547 | 0x00, 0x63, 0x38, 0x2B, | ||
9548 | 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98, | ||
9549 | 0x05, 0x05, 0xB2, 0x09, | ||
9550 | 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, | ||
9551 | 0x80, 0x32, 0x80, 0x36, | ||
9552 | 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, | ||
9553 | 0x40, 0x36, 0x40, 0x3A, | ||
9554 | 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08, | ||
9555 | 0x5D, 0x00, 0xFE, 0xC3, | ||
9556 | 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, | ||
9557 | 0xFF, 0xFD, 0x80, 0x73, | ||
9558 | 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, | ||
9559 | 0xA1, 0x23, 0xA1, 0x01, | ||
9560 | 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, | ||
9561 | 0x80, 0x00, 0x03, 0xC2, | ||
9562 | 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, | ||
9563 | 0xA0, 0x01, 0xE6, 0x84, | ||
9564 | }; | ||
9565 | 9491 | ||
9566 | static ushort _asc_mcode_size = sizeof(_asc_mcode_buf); | 9492 | ASC_DBG(1, "0x%p\n", scp); |
9567 | static ADV_DCNT _asc_mcode_chksum = 0x012C453FUL; | ||
9568 | 9493 | ||
9569 | #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16 | 9494 | ASC_STATS(shost, reset); |
9570 | static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = { | ||
9571 | INQUIRY, | ||
9572 | REQUEST_SENSE, | ||
9573 | READ_CAPACITY, | ||
9574 | READ_TOC, | ||
9575 | MODE_SELECT, | ||
9576 | MODE_SENSE, | ||
9577 | MODE_SELECT_10, | ||
9578 | MODE_SENSE_10, | ||
9579 | 0xFF, | ||
9580 | 0xFF, | ||
9581 | 0xFF, | ||
9582 | 0xFF, | ||
9583 | 0xFF, | ||
9584 | 0xFF, | ||
9585 | 0xFF, | ||
9586 | 0xFF | ||
9587 | }; | ||
9588 | 9495 | ||
9589 | static int AscExeScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq) | 9496 | scmd_printk(KERN_INFO, scp, "SCSI bus reset started...\n"); |
9590 | { | ||
9591 | PortAddr iop_base; | ||
9592 | ulong last_int_level; | ||
9593 | int sta; | ||
9594 | int n_q_required; | ||
9595 | int disable_syn_offset_one_fix; | ||
9596 | int i; | ||
9597 | ASC_PADDR addr; | ||
9598 | ASC_EXE_CALLBACK asc_exe_callback; | ||
9599 | ushort sg_entry_cnt = 0; | ||
9600 | ushort sg_entry_cnt_minus_one = 0; | ||
9601 | uchar target_ix; | ||
9602 | uchar tid_no; | ||
9603 | uchar sdtr_data; | ||
9604 | uchar extra_bytes; | ||
9605 | uchar scsi_cmd; | ||
9606 | uchar disable_cmd; | ||
9607 | ASC_SG_HEAD *sg_head; | ||
9608 | ASC_DCNT data_cnt; | ||
9609 | 9497 | ||
9610 | iop_base = asc_dvc->iop_base; | 9498 | if (ASC_NARROW_BOARD(boardp)) { |
9611 | sg_head = scsiq->sg_head; | 9499 | ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var; |
9612 | asc_exe_callback = asc_dvc->exe_callback; | 9500 | |
9613 | if (asc_dvc->err_code != 0) | 9501 | /* Reset the chip and SCSI bus. */ |
9614 | return (ERR); | 9502 | ASC_DBG(1, "before AscInitAsc1000Driver()\n"); |
9615 | if (scsiq == (ASC_SCSI_Q *)0L) { | 9503 | status = AscInitAsc1000Driver(asc_dvc); |
9616 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SCSIQ_NULL_PTR); | 9504 | |
9617 | return (ERR); | 9505 | /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */ |
9618 | } | 9506 | if (asc_dvc->err_code) { |
9619 | scsiq->q1.q_no = 0; | 9507 | scmd_printk(KERN_INFO, scp, "SCSI bus reset error: " |
9620 | if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) { | 9508 | "0x%x\n", asc_dvc->err_code); |
9621 | scsiq->q1.extra_bytes = 0; | 9509 | ret = FAILED; |
9622 | } | 9510 | } else if (status) { |
9623 | sta = 0; | 9511 | scmd_printk(KERN_INFO, scp, "SCSI bus reset warning: " |
9624 | target_ix = scsiq->q2.target_ix; | 9512 | "0x%x\n", status); |
9625 | tid_no = ASC_TIX_TO_TID(target_ix); | 9513 | } else { |
9626 | n_q_required = 1; | 9514 | scmd_printk(KERN_INFO, scp, "SCSI bus reset " |
9627 | if (scsiq->cdbptr[0] == REQUEST_SENSE) { | 9515 | "successful\n"); |
9628 | if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) { | 9516 | } |
9629 | asc_dvc->sdtr_done &= ~scsiq->q1.target_id; | 9517 | |
9630 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); | 9518 | ASC_DBG(1, "after AscInitAsc1000Driver()\n"); |
9631 | AscMsgOutSDTR(asc_dvc, | 9519 | spin_lock_irqsave(shost->host_lock, flags); |
9632 | asc_dvc-> | 9520 | } else { |
9633 | sdtr_period_tbl[(sdtr_data >> 4) & | 9521 | /* |
9634 | (uchar)(asc_dvc-> | 9522 | * If the suggest reset bus flags are set, then reset the bus. |
9635 | max_sdtr_index - | 9523 | * Otherwise only reset the device. |
9636 | 1)], | 9524 | */ |
9637 | (uchar)(sdtr_data & (uchar) | 9525 | ADV_DVC_VAR *adv_dvc = &boardp->dvc_var.adv_dvc_var; |
9638 | ASC_SYN_MAX_OFFSET)); | 9526 | |
9639 | scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT); | 9527 | /* |
9528 | * Reset the target's SCSI bus. | ||
9529 | */ | ||
9530 | ASC_DBG(1, "before AdvResetChipAndSB()\n"); | ||
9531 | switch (AdvResetChipAndSB(adv_dvc)) { | ||
9532 | case ASC_TRUE: | ||
9533 | scmd_printk(KERN_INFO, scp, "SCSI bus reset " | ||
9534 | "successful\n"); | ||
9535 | break; | ||
9536 | case ASC_FALSE: | ||
9537 | default: | ||
9538 | scmd_printk(KERN_INFO, scp, "SCSI bus reset error\n"); | ||
9539 | ret = FAILED; | ||
9540 | break; | ||
9640 | } | 9541 | } |
9542 | spin_lock_irqsave(shost->host_lock, flags); | ||
9543 | AdvISR(adv_dvc); | ||
9641 | } | 9544 | } |
9642 | last_int_level = DvcEnterCritical(); | 9545 | |
9643 | if (asc_dvc->in_critical_cnt != 0) { | 9546 | /* Save the time of the most recently completed reset. */ |
9644 | DvcLeaveCritical(last_int_level); | 9547 | boardp->last_reset = jiffies; |
9645 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY); | 9548 | spin_unlock_irqrestore(shost->host_lock, flags); |
9646 | return (ERR); | 9549 | |
9550 | ASC_DBG(1, "ret %d\n", ret); | ||
9551 | |||
9552 | return ret; | ||
9553 | } | ||
9554 | |||
9555 | /* | ||
9556 | * advansys_biosparam() | ||
9557 | * | ||
9558 | * Translate disk drive geometry if the "BIOS greater than 1 GB" | ||
9559 | * support is enabled for a drive. | ||
9560 | * | ||
9561 | * ip (information pointer) is an int array with the following definition: | ||
9562 | * ip[0]: heads | ||
9563 | * ip[1]: sectors | ||
9564 | * ip[2]: cylinders | ||
9565 | */ | ||
9566 | static int | ||
9567 | advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev, | ||
9568 | sector_t capacity, int ip[]) | ||
9569 | { | ||
9570 | struct asc_board *boardp = shost_priv(sdev->host); | ||
9571 | |||
9572 | ASC_DBG(1, "begin\n"); | ||
9573 | ASC_STATS(sdev->host, biosparam); | ||
9574 | if (ASC_NARROW_BOARD(boardp)) { | ||
9575 | if ((boardp->dvc_var.asc_dvc_var.dvc_cntl & | ||
9576 | ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) { | ||
9577 | ip[0] = 255; | ||
9578 | ip[1] = 63; | ||
9579 | } else { | ||
9580 | ip[0] = 64; | ||
9581 | ip[1] = 32; | ||
9582 | } | ||
9583 | } else { | ||
9584 | if ((boardp->dvc_var.adv_dvc_var.bios_ctrl & | ||
9585 | BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) { | ||
9586 | ip[0] = 255; | ||
9587 | ip[1] = 63; | ||
9588 | } else { | ||
9589 | ip[0] = 64; | ||
9590 | ip[1] = 32; | ||
9591 | } | ||
9647 | } | 9592 | } |
9648 | asc_dvc->in_critical_cnt++; | 9593 | ip[2] = (unsigned long)capacity / (ip[0] * ip[1]); |
9649 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { | 9594 | ASC_DBG(1, "end\n"); |
9650 | if ((sg_entry_cnt = sg_head->entry_cnt) == 0) { | 9595 | return 0; |
9651 | asc_dvc->in_critical_cnt--; | 9596 | } |
9652 | DvcLeaveCritical(last_int_level); | 9597 | |
9653 | return (ERR); | 9598 | /* |
9599 | * First-level interrupt handler. | ||
9600 | * | ||
9601 | * 'dev_id' is a pointer to the interrupting adapter's Scsi_Host. | ||
9602 | */ | ||
9603 | static irqreturn_t advansys_interrupt(int irq, void *dev_id) | ||
9604 | { | ||
9605 | struct Scsi_Host *shost = dev_id; | ||
9606 | struct asc_board *boardp = shost_priv(shost); | ||
9607 | irqreturn_t result = IRQ_NONE; | ||
9608 | |||
9609 | ASC_DBG(2, "boardp 0x%p\n", boardp); | ||
9610 | spin_lock(shost->host_lock); | ||
9611 | if (ASC_NARROW_BOARD(boardp)) { | ||
9612 | if (AscIsIntPending(shost->io_port)) { | ||
9613 | result = IRQ_HANDLED; | ||
9614 | ASC_STATS(shost, interrupt); | ||
9615 | ASC_DBG(1, "before AscISR()\n"); | ||
9616 | AscISR(&boardp->dvc_var.asc_dvc_var); | ||
9654 | } | 9617 | } |
9655 | #if !CC_VERY_LONG_SG_LIST | 9618 | } else { |
9656 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { | 9619 | ASC_DBG(1, "before AdvISR()\n"); |
9657 | asc_dvc->in_critical_cnt--; | 9620 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { |
9658 | DvcLeaveCritical(last_int_level); | 9621 | result = IRQ_HANDLED; |
9659 | return (ERR); | 9622 | ASC_STATS(shost, interrupt); |
9660 | } | 9623 | } |
9661 | #endif /* !CC_VERY_LONG_SG_LIST */ | 9624 | } |
9662 | if (sg_entry_cnt == 1) { | 9625 | spin_unlock(shost->host_lock); |
9663 | scsiq->q1.data_addr = | 9626 | |
9664 | (ADV_PADDR)sg_head->sg_list[0].addr; | 9627 | ASC_DBG(1, "end\n"); |
9665 | scsiq->q1.data_cnt = | 9628 | return result; |
9666 | (ADV_DCNT)sg_head->sg_list[0].bytes; | 9629 | } |
9667 | scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE); | 9630 | |
9631 | static int AscHostReqRiscHalt(PortAddr iop_base) | ||
9632 | { | ||
9633 | int count = 0; | ||
9634 | int sta = 0; | ||
9635 | uchar saved_stop_code; | ||
9636 | |||
9637 | if (AscIsChipHalted(iop_base)) | ||
9638 | return (1); | ||
9639 | saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B); | ||
9640 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, | ||
9641 | ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP); | ||
9642 | do { | ||
9643 | if (AscIsChipHalted(iop_base)) { | ||
9644 | sta = 1; | ||
9645 | break; | ||
9668 | } | 9646 | } |
9669 | sg_entry_cnt_minus_one = sg_entry_cnt - 1; | 9647 | mdelay(100); |
9648 | } while (count++ < 20); | ||
9649 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code); | ||
9650 | return (sta); | ||
9651 | } | ||
9652 | |||
9653 | static int | ||
9654 | AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data) | ||
9655 | { | ||
9656 | int sta = FALSE; | ||
9657 | |||
9658 | if (AscHostReqRiscHalt(iop_base)) { | ||
9659 | sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); | ||
9660 | AscStartChip(iop_base); | ||
9670 | } | 9661 | } |
9671 | scsi_cmd = scsiq->cdbptr[0]; | 9662 | return sta; |
9672 | disable_syn_offset_one_fix = FALSE; | 9663 | } |
9673 | if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) && | 9664 | |
9674 | !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) { | 9665 | static void AscAsyncFix(ASC_DVC_VAR *asc_dvc, struct scsi_device *sdev) |
9675 | if (scsiq->q1.cntl & QC_SG_HEAD) { | 9666 | { |
9676 | data_cnt = 0; | 9667 | char type = sdev->type; |
9677 | for (i = 0; i < sg_entry_cnt; i++) { | 9668 | ASC_SCSI_BIT_ID_TYPE tid_bits = 1 << sdev->id; |
9678 | data_cnt += | 9669 | |
9679 | (ADV_DCNT)le32_to_cpu(sg_head->sg_list[i]. | 9670 | if (!(asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN)) |
9680 | bytes); | 9671 | return; |
9681 | } | 9672 | if (asc_dvc->init_sdtr & tid_bits) |
9673 | return; | ||
9674 | |||
9675 | if ((type == TYPE_ROM) && (strncmp(sdev->vendor, "HP ", 3) == 0)) | ||
9676 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; | ||
9677 | |||
9678 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; | ||
9679 | if ((type == TYPE_PROCESSOR) || (type == TYPE_SCANNER) || | ||
9680 | (type == TYPE_ROM) || (type == TYPE_TAPE)) | ||
9681 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; | ||
9682 | |||
9683 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) | ||
9684 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, sdev->id, | ||
9685 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); | ||
9686 | } | ||
9687 | |||
9688 | static void | ||
9689 | advansys_narrow_slave_configure(struct scsi_device *sdev, ASC_DVC_VAR *asc_dvc) | ||
9690 | { | ||
9691 | ASC_SCSI_BIT_ID_TYPE tid_bit = 1 << sdev->id; | ||
9692 | ASC_SCSI_BIT_ID_TYPE orig_use_tagged_qng = asc_dvc->use_tagged_qng; | ||
9693 | |||
9694 | if (sdev->lun == 0) { | ||
9695 | ASC_SCSI_BIT_ID_TYPE orig_init_sdtr = asc_dvc->init_sdtr; | ||
9696 | if ((asc_dvc->cfg->sdtr_enable & tid_bit) && sdev->sdtr) { | ||
9697 | asc_dvc->init_sdtr |= tid_bit; | ||
9682 | } else { | 9698 | } else { |
9683 | data_cnt = le32_to_cpu(scsiq->q1.data_cnt); | 9699 | asc_dvc->init_sdtr &= ~tid_bit; |
9684 | } | 9700 | } |
9685 | if (data_cnt != 0UL) { | 9701 | |
9686 | if (data_cnt < 512UL) { | 9702 | if (orig_init_sdtr != asc_dvc->init_sdtr) |
9687 | disable_syn_offset_one_fix = TRUE; | 9703 | AscAsyncFix(asc_dvc, sdev); |
9688 | } else { | 9704 | } |
9689 | for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST; | 9705 | |
9690 | i++) { | 9706 | if (sdev->tagged_supported) { |
9691 | disable_cmd = | 9707 | if (asc_dvc->cfg->cmd_qng_enabled & tid_bit) { |
9692 | _syn_offset_one_disable_cmd[i]; | 9708 | if (sdev->lun == 0) { |
9693 | if (disable_cmd == 0xFF) { | 9709 | asc_dvc->cfg->can_tagged_qng |= tid_bit; |
9694 | break; | 9710 | asc_dvc->use_tagged_qng |= tid_bit; |
9695 | } | ||
9696 | if (scsi_cmd == disable_cmd) { | ||
9697 | disable_syn_offset_one_fix = | ||
9698 | TRUE; | ||
9699 | break; | ||
9700 | } | ||
9701 | } | ||
9702 | } | 9711 | } |
9712 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, | ||
9713 | asc_dvc->max_dvc_qng[sdev->id]); | ||
9714 | } | ||
9715 | } else { | ||
9716 | if (sdev->lun == 0) { | ||
9717 | asc_dvc->cfg->can_tagged_qng &= ~tid_bit; | ||
9718 | asc_dvc->use_tagged_qng &= ~tid_bit; | ||
9703 | } | 9719 | } |
9720 | scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun); | ||
9704 | } | 9721 | } |
9705 | if (disable_syn_offset_one_fix) { | 9722 | |
9706 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG; | 9723 | if ((sdev->lun == 0) && |
9707 | scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX | | 9724 | (orig_use_tagged_qng != asc_dvc->use_tagged_qng)) { |
9708 | ASC_TAG_FLAG_DISABLE_DISCONNECT); | 9725 | AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B, |
9726 | asc_dvc->cfg->disc_enable); | ||
9727 | AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B, | ||
9728 | asc_dvc->use_tagged_qng); | ||
9729 | AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B, | ||
9730 | asc_dvc->cfg->can_tagged_qng); | ||
9731 | |||
9732 | asc_dvc->max_dvc_qng[sdev->id] = | ||
9733 | asc_dvc->cfg->max_tag_qng[sdev->id]; | ||
9734 | AscWriteLramByte(asc_dvc->iop_base, | ||
9735 | (ushort)(ASCV_MAX_DVC_QNG_BEG + sdev->id), | ||
9736 | asc_dvc->max_dvc_qng[sdev->id]); | ||
9737 | } | ||
9738 | } | ||
9739 | |||
9740 | /* | ||
9741 | * Wide Transfers | ||
9742 | * | ||
9743 | * If the EEPROM enabled WDTR for the device and the device supports wide | ||
9744 | * bus (16 bit) transfers, then turn on the device's 'wdtr_able' bit and | ||
9745 | * write the new value to the microcode. | ||
9746 | */ | ||
9747 | static void | ||
9748 | advansys_wide_enable_wdtr(AdvPortAddr iop_base, unsigned short tidmask) | ||
9749 | { | ||
9750 | unsigned short cfg_word; | ||
9751 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); | ||
9752 | if ((cfg_word & tidmask) != 0) | ||
9753 | return; | ||
9754 | |||
9755 | cfg_word |= tidmask; | ||
9756 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); | ||
9757 | |||
9758 | /* | ||
9759 | * Clear the microcode SDTR and WDTR negotiation done indicators for | ||
9760 | * the target to cause it to negotiate with the new setting set above. | ||
9761 | * WDTR when accepted causes the target to enter asynchronous mode, so | ||
9762 | * SDTR must be negotiated. | ||
9763 | */ | ||
9764 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | ||
9765 | cfg_word &= ~tidmask; | ||
9766 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | ||
9767 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word); | ||
9768 | cfg_word &= ~tidmask; | ||
9769 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word); | ||
9770 | } | ||
9771 | |||
9772 | /* | ||
9773 | * Synchronous Transfers | ||
9774 | * | ||
9775 | * If the EEPROM enabled SDTR for the device and the device | ||
9776 | * supports synchronous transfers, then turn on the device's | ||
9777 | * 'sdtr_able' bit. Write the new value to the microcode. | ||
9778 | */ | ||
9779 | static void | ||
9780 | advansys_wide_enable_sdtr(AdvPortAddr iop_base, unsigned short tidmask) | ||
9781 | { | ||
9782 | unsigned short cfg_word; | ||
9783 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); | ||
9784 | if ((cfg_word & tidmask) != 0) | ||
9785 | return; | ||
9786 | |||
9787 | cfg_word |= tidmask; | ||
9788 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); | ||
9789 | |||
9790 | /* | ||
9791 | * Clear the microcode "SDTR negotiation" done indicator for the | ||
9792 | * target to cause it to negotiate with the new setting set above. | ||
9793 | */ | ||
9794 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | ||
9795 | cfg_word &= ~tidmask; | ||
9796 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | ||
9797 | } | ||
9798 | |||
9799 | /* | ||
9800 | * PPR (Parallel Protocol Request) Capable | ||
9801 | * | ||
9802 | * If the device supports DT mode, then it must be PPR capable. | ||
9803 | * The PPR message will be used in place of the SDTR and WDTR | ||
9804 | * messages to negotiate synchronous speed and offset, transfer | ||
9805 | * width, and protocol options. | ||
9806 | */ | ||
9807 | static void advansys_wide_enable_ppr(ADV_DVC_VAR *adv_dvc, | ||
9808 | AdvPortAddr iop_base, unsigned short tidmask) | ||
9809 | { | ||
9810 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able); | ||
9811 | adv_dvc->ppr_able |= tidmask; | ||
9812 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, adv_dvc->ppr_able); | ||
9813 | } | ||
9814 | |||
9815 | static void | ||
9816 | advansys_wide_slave_configure(struct scsi_device *sdev, ADV_DVC_VAR *adv_dvc) | ||
9817 | { | ||
9818 | AdvPortAddr iop_base = adv_dvc->iop_base; | ||
9819 | unsigned short tidmask = 1 << sdev->id; | ||
9820 | |||
9821 | if (sdev->lun == 0) { | ||
9822 | /* | ||
9823 | * Handle WDTR, SDTR, and Tag Queuing. If the feature | ||
9824 | * is enabled in the EEPROM and the device supports the | ||
9825 | * feature, then enable it in the microcode. | ||
9826 | */ | ||
9827 | |||
9828 | if ((adv_dvc->wdtr_able & tidmask) && sdev->wdtr) | ||
9829 | advansys_wide_enable_wdtr(iop_base, tidmask); | ||
9830 | if ((adv_dvc->sdtr_able & tidmask) && sdev->sdtr) | ||
9831 | advansys_wide_enable_sdtr(iop_base, tidmask); | ||
9832 | if (adv_dvc->chip_type == ADV_CHIP_ASC38C1600 && sdev->ppr) | ||
9833 | advansys_wide_enable_ppr(adv_dvc, iop_base, tidmask); | ||
9834 | |||
9835 | /* | ||
9836 | * Tag Queuing is disabled for the BIOS which runs in polled | ||
9837 | * mode and would see no benefit from Tag Queuing. Also by | ||
9838 | * disabling Tag Queuing in the BIOS devices with Tag Queuing | ||
9839 | * bugs will at least work with the BIOS. | ||
9840 | */ | ||
9841 | if ((adv_dvc->tagqng_able & tidmask) && | ||
9842 | sdev->tagged_supported) { | ||
9843 | unsigned short cfg_word; | ||
9844 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word); | ||
9845 | cfg_word |= tidmask; | ||
9846 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
9847 | cfg_word); | ||
9848 | AdvWriteByteLram(iop_base, | ||
9849 | ASC_MC_NUMBER_OF_MAX_CMD + sdev->id, | ||
9850 | adv_dvc->max_dvc_qng); | ||
9851 | } | ||
9852 | } | ||
9853 | |||
9854 | if ((adv_dvc->tagqng_able & tidmask) && sdev->tagged_supported) { | ||
9855 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, | ||
9856 | adv_dvc->max_dvc_qng); | ||
9709 | } else { | 9857 | } else { |
9710 | scsiq->q2.tag_code &= 0x27; | 9858 | scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun); |
9711 | } | 9859 | } |
9712 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { | 9860 | } |
9713 | if (asc_dvc->bug_fix_cntl) { | 9861 | |
9714 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { | 9862 | /* |
9715 | if ((scsi_cmd == READ_6) || | 9863 | * Set the number of commands to queue per device for the |
9716 | (scsi_cmd == READ_10)) { | 9864 | * specified host adapter. |
9717 | addr = | 9865 | */ |
9718 | (ADV_PADDR)le32_to_cpu(sg_head-> | 9866 | static int advansys_slave_configure(struct scsi_device *sdev) |
9719 | sg_list | 9867 | { |
9720 | [sg_entry_cnt_minus_one]. | 9868 | struct asc_board *boardp = shost_priv(sdev->host); |
9721 | addr) + | 9869 | |
9722 | (ADV_DCNT)le32_to_cpu(sg_head-> | 9870 | if (ASC_NARROW_BOARD(boardp)) |
9723 | sg_list | 9871 | advansys_narrow_slave_configure(sdev, |
9724 | [sg_entry_cnt_minus_one]. | 9872 | &boardp->dvc_var.asc_dvc_var); |
9725 | bytes); | 9873 | else |
9726 | extra_bytes = | 9874 | advansys_wide_slave_configure(sdev, |
9727 | (uchar)((ushort)addr & 0x0003); | 9875 | &boardp->dvc_var.adv_dvc_var); |
9728 | if ((extra_bytes != 0) | 9876 | |
9729 | && | 9877 | return 0; |
9730 | ((scsiq->q2. | 9878 | } |
9731 | tag_code & | 9879 | |
9732 | ASC_TAG_FLAG_EXTRA_BYTES) | 9880 | static __le32 advansys_get_sense_buffer_dma(struct scsi_cmnd *scp) |
9733 | == 0)) { | 9881 | { |
9734 | scsiq->q2.tag_code |= | 9882 | struct asc_board *board = shost_priv(scp->device->host); |
9735 | ASC_TAG_FLAG_EXTRA_BYTES; | 9883 | scp->SCp.dma_handle = dma_map_single(board->dev, scp->sense_buffer, |
9736 | scsiq->q1.extra_bytes = | 9884 | sizeof(scp->sense_buffer), DMA_FROM_DEVICE); |
9737 | extra_bytes; | 9885 | dma_cache_sync(board->dev, scp->sense_buffer, |
9738 | data_cnt = | 9886 | sizeof(scp->sense_buffer), DMA_FROM_DEVICE); |
9739 | le32_to_cpu(sg_head-> | 9887 | return cpu_to_le32(scp->SCp.dma_handle); |
9740 | sg_list | 9888 | } |
9741 | [sg_entry_cnt_minus_one]. | 9889 | |
9742 | bytes); | 9890 | static int asc_build_req(struct asc_board *boardp, struct scsi_cmnd *scp, |
9743 | data_cnt -= | 9891 | struct asc_scsi_q *asc_scsi_q) |
9744 | (ASC_DCNT) extra_bytes; | 9892 | { |
9745 | sg_head-> | 9893 | struct asc_dvc_var *asc_dvc = &boardp->dvc_var.asc_dvc_var; |
9746 | sg_list | 9894 | int use_sg; |
9747 | [sg_entry_cnt_minus_one]. | 9895 | |
9748 | bytes = | 9896 | memset(asc_scsi_q, 0, sizeof(*asc_scsi_q)); |
9749 | cpu_to_le32(data_cnt); | 9897 | |
9750 | } | 9898 | /* |
9751 | } | 9899 | * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'. |
9752 | } | 9900 | */ |
9901 | asc_scsi_q->q2.srb_ptr = advansys_ptr_to_srb(asc_dvc, scp); | ||
9902 | if (asc_scsi_q->q2.srb_ptr == BAD_SRB) { | ||
9903 | scp->result = HOST_BYTE(DID_SOFT_ERROR); | ||
9904 | return ASC_ERROR; | ||
9905 | } | ||
9906 | |||
9907 | /* | ||
9908 | * Build the ASC_SCSI_Q request. | ||
9909 | */ | ||
9910 | asc_scsi_q->cdbptr = &scp->cmnd[0]; | ||
9911 | asc_scsi_q->q2.cdb_len = scp->cmd_len; | ||
9912 | asc_scsi_q->q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id); | ||
9913 | asc_scsi_q->q1.target_lun = scp->device->lun; | ||
9914 | asc_scsi_q->q2.target_ix = | ||
9915 | ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun); | ||
9916 | asc_scsi_q->q1.sense_addr = advansys_get_sense_buffer_dma(scp); | ||
9917 | asc_scsi_q->q1.sense_len = sizeof(scp->sense_buffer); | ||
9918 | |||
9919 | /* | ||
9920 | * If there are any outstanding requests for the current target, | ||
9921 | * then every 255th request send an ORDERED request. This heuristic | ||
9922 | * tries to retain the benefit of request sorting while preventing | ||
9923 | * request starvation. 255 is the max number of tags or pending commands | ||
9924 | * a device may have outstanding. | ||
9925 | * | ||
9926 | * The request count is incremented below for every successfully | ||
9927 | * started request. | ||
9928 | * | ||
9929 | */ | ||
9930 | if ((asc_dvc->cur_dvc_qng[scp->device->id] > 0) && | ||
9931 | (boardp->reqcnt[scp->device->id] % 255) == 0) { | ||
9932 | asc_scsi_q->q2.tag_code = MSG_ORDERED_TAG; | ||
9933 | } else { | ||
9934 | asc_scsi_q->q2.tag_code = MSG_SIMPLE_TAG; | ||
9935 | } | ||
9936 | |||
9937 | /* Build ASC_SCSI_Q */ | ||
9938 | use_sg = scsi_dma_map(scp); | ||
9939 | if (use_sg != 0) { | ||
9940 | int sgcnt; | ||
9941 | struct scatterlist *slp; | ||
9942 | struct asc_sg_head *asc_sg_head; | ||
9943 | |||
9944 | if (use_sg > scp->device->host->sg_tablesize) { | ||
9945 | scmd_printk(KERN_ERR, scp, "use_sg %d > " | ||
9946 | "sg_tablesize %d\n", use_sg, | ||
9947 | scp->device->host->sg_tablesize); | ||
9948 | scsi_dma_unmap(scp); | ||
9949 | scp->result = HOST_BYTE(DID_ERROR); | ||
9950 | return ASC_ERROR; | ||
9753 | } | 9951 | } |
9754 | sg_head->entry_to_copy = sg_head->entry_cnt; | 9952 | |
9755 | #if CC_VERY_LONG_SG_LIST | 9953 | asc_sg_head = kzalloc(sizeof(asc_scsi_q->sg_head) + |
9954 | use_sg * sizeof(struct asc_sg_list), GFP_ATOMIC); | ||
9955 | if (!asc_sg_head) { | ||
9956 | scsi_dma_unmap(scp); | ||
9957 | scp->result = HOST_BYTE(DID_SOFT_ERROR); | ||
9958 | return ASC_ERROR; | ||
9959 | } | ||
9960 | |||
9961 | asc_scsi_q->q1.cntl |= QC_SG_HEAD; | ||
9962 | asc_scsi_q->sg_head = asc_sg_head; | ||
9963 | asc_scsi_q->q1.data_cnt = 0; | ||
9964 | asc_scsi_q->q1.data_addr = 0; | ||
9965 | /* This is a byte value, otherwise it would need to be swapped. */ | ||
9966 | asc_sg_head->entry_cnt = asc_scsi_q->q1.sg_queue_cnt = use_sg; | ||
9967 | ASC_STATS_ADD(scp->device->host, xfer_elem, | ||
9968 | asc_sg_head->entry_cnt); | ||
9969 | |||
9756 | /* | 9970 | /* |
9757 | * Set the sg_entry_cnt to the maximum possible. The rest of | 9971 | * Convert scatter-gather list into ASC_SG_HEAD list. |
9758 | * the SG elements will be copied when the RISC completes the | ||
9759 | * SG elements that fit and halts. | ||
9760 | */ | 9972 | */ |
9761 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { | 9973 | scsi_for_each_sg(scp, slp, use_sg, sgcnt) { |
9762 | sg_entry_cnt = ASC_MAX_SG_LIST; | 9974 | asc_sg_head->sg_list[sgcnt].addr = |
9975 | cpu_to_le32(sg_dma_address(slp)); | ||
9976 | asc_sg_head->sg_list[sgcnt].bytes = | ||
9977 | cpu_to_le32(sg_dma_len(slp)); | ||
9978 | ASC_STATS_ADD(scp->device->host, xfer_sect, | ||
9979 | DIV_ROUND_UP(sg_dma_len(slp), 512)); | ||
9763 | } | 9980 | } |
9764 | #endif /* CC_VERY_LONG_SG_LIST */ | 9981 | } |
9765 | n_q_required = AscSgListToQueue(sg_entry_cnt); | 9982 | |
9766 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >= | 9983 | ASC_STATS(scp->device->host, xfer_cnt); |
9767 | (uint) n_q_required) | 9984 | |
9768 | || ((scsiq->q1.cntl & QC_URGENT) != 0)) { | 9985 | ASC_DBG_PRT_ASC_SCSI_Q(2, asc_scsi_q); |
9769 | if ((sta = | 9986 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); |
9770 | AscSendScsiQueue(asc_dvc, scsiq, | 9987 | |
9771 | n_q_required)) == 1) { | 9988 | return ASC_NOERROR; |
9772 | asc_dvc->in_critical_cnt--; | 9989 | } |
9773 | if (asc_exe_callback != 0) { | 9990 | |
9774 | (*asc_exe_callback) (asc_dvc, scsiq); | 9991 | /* |
9775 | } | 9992 | * Build scatter-gather list for Adv Library (Wide Board). |
9776 | DvcLeaveCritical(last_int_level); | 9993 | * |
9777 | return (sta); | 9994 | * Additional ADV_SG_BLOCK structures will need to be allocated |
9995 | * if the total number of scatter-gather elements exceeds | ||
9996 | * NO_OF_SG_PER_BLOCK (15). The ADV_SG_BLOCK structures are | ||
9997 | * assumed to be physically contiguous. | ||
9998 | * | ||
9999 | * Return: | ||
10000 | * ADV_SUCCESS(1) - SG List successfully created | ||
10001 | * ADV_ERROR(-1) - SG List creation failed | ||
10002 | */ | ||
10003 | static int | ||
10004 | adv_get_sglist(struct asc_board *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | ||
10005 | int use_sg) | ||
10006 | { | ||
10007 | adv_sgblk_t *sgblkp; | ||
10008 | ADV_SCSI_REQ_Q *scsiqp; | ||
10009 | struct scatterlist *slp; | ||
10010 | int sg_elem_cnt; | ||
10011 | ADV_SG_BLOCK *sg_block, *prev_sg_block; | ||
10012 | ADV_PADDR sg_block_paddr; | ||
10013 | int i; | ||
10014 | |||
10015 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); | ||
10016 | slp = scsi_sglist(scp); | ||
10017 | sg_elem_cnt = use_sg; | ||
10018 | prev_sg_block = NULL; | ||
10019 | reqp->sgblkp = NULL; | ||
10020 | |||
10021 | for (;;) { | ||
10022 | /* | ||
10023 | * Allocate a 'adv_sgblk_t' structure from the board free | ||
10024 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK | ||
10025 | * (15) scatter-gather elements. | ||
10026 | */ | ||
10027 | if ((sgblkp = boardp->adv_sgblkp) == NULL) { | ||
10028 | ASC_DBG(1, "no free adv_sgblk_t\n"); | ||
10029 | ASC_STATS(scp->device->host, adv_build_nosg); | ||
10030 | |||
10031 | /* | ||
10032 | * Allocation failed. Free 'adv_sgblk_t' structures | ||
10033 | * already allocated for the request. | ||
10034 | */ | ||
10035 | while ((sgblkp = reqp->sgblkp) != NULL) { | ||
10036 | /* Remove 'sgblkp' from the request list. */ | ||
10037 | reqp->sgblkp = sgblkp->next_sgblkp; | ||
10038 | |||
10039 | /* Add 'sgblkp' to the board free list. */ | ||
10040 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | ||
10041 | boardp->adv_sgblkp = sgblkp; | ||
9778 | } | 10042 | } |
10043 | return ASC_BUSY; | ||
9779 | } | 10044 | } |
9780 | } else { | 10045 | |
9781 | if (asc_dvc->bug_fix_cntl) { | 10046 | /* Complete 'adv_sgblk_t' board allocation. */ |
9782 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { | 10047 | boardp->adv_sgblkp = sgblkp->next_sgblkp; |
9783 | if ((scsi_cmd == READ_6) || | 10048 | sgblkp->next_sgblkp = NULL; |
9784 | (scsi_cmd == READ_10)) { | 10049 | |
9785 | addr = | 10050 | /* |
9786 | le32_to_cpu(scsiq->q1.data_addr) + | 10051 | * Get 8 byte aligned virtual and physical addresses |
9787 | le32_to_cpu(scsiq->q1.data_cnt); | 10052 | * for the allocated ADV_SG_BLOCK structure. |
9788 | extra_bytes = | 10053 | */ |
9789 | (uchar)((ushort)addr & 0x0003); | 10054 | sg_block = (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block); |
9790 | if ((extra_bytes != 0) | 10055 | sg_block_paddr = virt_to_bus(sg_block); |
9791 | && | 10056 | |
9792 | ((scsiq->q2. | 10057 | /* |
9793 | tag_code & | 10058 | * Check if this is the first 'adv_sgblk_t' for the |
9794 | ASC_TAG_FLAG_EXTRA_BYTES) | 10059 | * request. |
9795 | == 0)) { | 10060 | */ |
9796 | data_cnt = | 10061 | if (reqp->sgblkp == NULL) { |
9797 | le32_to_cpu(scsiq->q1. | 10062 | /* Request's first scatter-gather block. */ |
9798 | data_cnt); | 10063 | reqp->sgblkp = sgblkp; |
9799 | if (((ushort)data_cnt & 0x01FF) | 10064 | |
9800 | == 0) { | 10065 | /* |
9801 | scsiq->q2.tag_code |= | 10066 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical |
9802 | ASC_TAG_FLAG_EXTRA_BYTES; | 10067 | * address pointers. |
9803 | data_cnt -= (ASC_DCNT) | 10068 | */ |
9804 | extra_bytes; | 10069 | scsiqp->sg_list_ptr = sg_block; |
9805 | scsiq->q1.data_cnt = | 10070 | scsiqp->sg_real_addr = cpu_to_le32(sg_block_paddr); |
9806 | cpu_to_le32 | 10071 | } else { |
9807 | (data_cnt); | 10072 | /* Request's second or later scatter-gather block. */ |
9808 | scsiq->q1.extra_bytes = | 10073 | sgblkp->next_sgblkp = reqp->sgblkp; |
9809 | extra_bytes; | 10074 | reqp->sgblkp = sgblkp; |
9810 | } | 10075 | |
9811 | } | 10076 | /* |
9812 | } | 10077 | * Point the previous ADV_SG_BLOCK structure to |
9813 | } | 10078 | * the newly allocated ADV_SG_BLOCK structure. |
10079 | */ | ||
10080 | prev_sg_block->sg_ptr = cpu_to_le32(sg_block_paddr); | ||
9814 | } | 10081 | } |
9815 | n_q_required = 1; | 10082 | |
9816 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) || | 10083 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { |
9817 | ((scsiq->q1.cntl & QC_URGENT) != 0)) { | 10084 | sg_block->sg_list[i].sg_addr = |
9818 | if ((sta = AscSendScsiQueue(asc_dvc, scsiq, | 10085 | cpu_to_le32(sg_dma_address(slp)); |
9819 | n_q_required)) == 1) { | 10086 | sg_block->sg_list[i].sg_count = |
9820 | asc_dvc->in_critical_cnt--; | 10087 | cpu_to_le32(sg_dma_len(slp)); |
9821 | if (asc_exe_callback != 0) { | 10088 | ASC_STATS_ADD(scp->device->host, xfer_sect, |
9822 | (*asc_exe_callback) (asc_dvc, scsiq); | 10089 | DIV_ROUND_UP(sg_dma_len(slp), 512)); |
9823 | } | 10090 | |
9824 | DvcLeaveCritical(last_int_level); | 10091 | if (--sg_elem_cnt == 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */ |
9825 | return (sta); | 10092 | sg_block->sg_cnt = i + 1; |
10093 | sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */ | ||
10094 | return ADV_SUCCESS; | ||
9826 | } | 10095 | } |
10096 | slp++; | ||
9827 | } | 10097 | } |
10098 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; | ||
10099 | prev_sg_block = sg_block; | ||
9828 | } | 10100 | } |
9829 | asc_dvc->in_critical_cnt--; | ||
9830 | DvcLeaveCritical(last_int_level); | ||
9831 | return (sta); | ||
9832 | } | 10101 | } |
9833 | 10102 | ||
10103 | /* | ||
10104 | * Build a request structure for the Adv Library (Wide Board). | ||
10105 | * | ||
10106 | * If an adv_req_t can not be allocated to issue the request, | ||
10107 | * then return ASC_BUSY. If an error occurs, then return ASC_ERROR. | ||
10108 | * | ||
10109 | * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the | ||
10110 | * microcode for DMA addresses or math operations are byte swapped | ||
10111 | * to little-endian order. | ||
10112 | */ | ||
9834 | static int | 10113 | static int |
9835 | AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required) | 10114 | adv_build_req(struct asc_board *boardp, struct scsi_cmnd *scp, |
10115 | ADV_SCSI_REQ_Q **adv_scsiqpp) | ||
9836 | { | 10116 | { |
9837 | PortAddr iop_base; | 10117 | adv_req_t *reqp; |
9838 | uchar free_q_head; | 10118 | ADV_SCSI_REQ_Q *scsiqp; |
9839 | uchar next_qp; | 10119 | int i; |
9840 | uchar tid_no; | 10120 | int ret; |
9841 | uchar target_ix; | 10121 | int use_sg; |
9842 | int sta; | ||
9843 | 10122 | ||
9844 | iop_base = asc_dvc->iop_base; | 10123 | /* |
9845 | target_ix = scsiq->q2.target_ix; | 10124 | * Allocate an adv_req_t structure from the board to execute |
9846 | tid_no = ASC_TIX_TO_TID(target_ix); | 10125 | * the command. |
9847 | sta = 0; | 10126 | */ |
9848 | free_q_head = (uchar)AscGetVarFreeQHead(iop_base); | 10127 | if (boardp->adv_reqp == NULL) { |
9849 | if (n_q_required > 1) { | 10128 | ASC_DBG(1, "no free adv_req_t\n"); |
9850 | if ((next_qp = AscAllocMultipleFreeQueue(iop_base, | 10129 | ASC_STATS(scp->device->host, adv_build_noreq); |
9851 | free_q_head, (uchar) | 10130 | return ASC_BUSY; |
9852 | (n_q_required))) | 10131 | } else { |
9853 | != (uchar)ASC_QLINK_END) { | 10132 | reqp = boardp->adv_reqp; |
9854 | asc_dvc->last_q_shortage = 0; | 10133 | boardp->adv_reqp = reqp->next_reqp; |
9855 | scsiq->sg_head->queue_cnt = n_q_required - 1; | 10134 | reqp->next_reqp = NULL; |
9856 | scsiq->q1.q_no = free_q_head; | 10135 | } |
9857 | if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq, | 10136 | |
9858 | free_q_head)) == 1) { | 10137 | /* |
9859 | AscPutVarFreeQHead(iop_base, next_qp); | 10138 | * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers. |
9860 | asc_dvc->cur_total_qng += (uchar)(n_q_required); | 10139 | */ |
9861 | asc_dvc->cur_dvc_qng[tid_no]++; | 10140 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); |
9862 | } | 10141 | |
9863 | return (sta); | 10142 | /* |
10143 | * Initialize the structure. | ||
10144 | */ | ||
10145 | scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0; | ||
10146 | |||
10147 | /* | ||
10148 | * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure. | ||
10149 | */ | ||
10150 | scsiqp->srb_ptr = ADV_VADDR_TO_U32(reqp); | ||
10151 | |||
10152 | /* | ||
10153 | * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure. | ||
10154 | */ | ||
10155 | reqp->cmndp = scp; | ||
10156 | |||
10157 | /* | ||
10158 | * Build the ADV_SCSI_REQ_Q request. | ||
10159 | */ | ||
10160 | |||
10161 | /* Set CDB length and copy it to the request structure. */ | ||
10162 | scsiqp->cdb_len = scp->cmd_len; | ||
10163 | /* Copy first 12 CDB bytes to cdb[]. */ | ||
10164 | for (i = 0; i < scp->cmd_len && i < 12; i++) { | ||
10165 | scsiqp->cdb[i] = scp->cmnd[i]; | ||
10166 | } | ||
10167 | /* Copy last 4 CDB bytes, if present, to cdb16[]. */ | ||
10168 | for (; i < scp->cmd_len; i++) { | ||
10169 | scsiqp->cdb16[i - 12] = scp->cmnd[i]; | ||
10170 | } | ||
10171 | |||
10172 | scsiqp->target_id = scp->device->id; | ||
10173 | scsiqp->target_lun = scp->device->lun; | ||
10174 | |||
10175 | scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | ||
10176 | scsiqp->sense_len = sizeof(scp->sense_buffer); | ||
10177 | |||
10178 | /* Build ADV_SCSI_REQ_Q */ | ||
10179 | |||
10180 | use_sg = scsi_dma_map(scp); | ||
10181 | if (use_sg == 0) { | ||
10182 | /* Zero-length transfer */ | ||
10183 | reqp->sgblkp = NULL; | ||
10184 | scsiqp->data_cnt = 0; | ||
10185 | scsiqp->vdata_addr = NULL; | ||
10186 | |||
10187 | scsiqp->data_addr = 0; | ||
10188 | scsiqp->sg_list_ptr = NULL; | ||
10189 | scsiqp->sg_real_addr = 0; | ||
10190 | } else { | ||
10191 | if (use_sg > ADV_MAX_SG_LIST) { | ||
10192 | scmd_printk(KERN_ERR, scp, "use_sg %d > " | ||
10193 | "ADV_MAX_SG_LIST %d\n", use_sg, | ||
10194 | scp->device->host->sg_tablesize); | ||
10195 | scsi_dma_unmap(scp); | ||
10196 | scp->result = HOST_BYTE(DID_ERROR); | ||
10197 | |||
10198 | /* | ||
10199 | * Free the 'adv_req_t' structure by adding it back | ||
10200 | * to the board free list. | ||
10201 | */ | ||
10202 | reqp->next_reqp = boardp->adv_reqp; | ||
10203 | boardp->adv_reqp = reqp; | ||
10204 | |||
10205 | return ASC_ERROR; | ||
9864 | } | 10206 | } |
9865 | } else if (n_q_required == 1) { | 10207 | |
9866 | if ((next_qp = AscAllocFreeQueue(iop_base, | 10208 | scsiqp->data_cnt = cpu_to_le32(scsi_bufflen(scp)); |
9867 | free_q_head)) != | 10209 | |
9868 | ASC_QLINK_END) { | 10210 | ret = adv_get_sglist(boardp, reqp, scp, use_sg); |
9869 | scsiq->q1.q_no = free_q_head; | 10211 | if (ret != ADV_SUCCESS) { |
9870 | if ((sta = AscPutReadyQueue(asc_dvc, scsiq, | 10212 | /* |
9871 | free_q_head)) == 1) { | 10213 | * Free the adv_req_t structure by adding it back to |
9872 | AscPutVarFreeQHead(iop_base, next_qp); | 10214 | * the board free list. |
9873 | asc_dvc->cur_total_qng++; | 10215 | */ |
9874 | asc_dvc->cur_dvc_qng[tid_no]++; | 10216 | reqp->next_reqp = boardp->adv_reqp; |
9875 | } | 10217 | boardp->adv_reqp = reqp; |
9876 | return (sta); | 10218 | |
10219 | return ret; | ||
9877 | } | 10220 | } |
10221 | |||
10222 | ASC_STATS_ADD(scp->device->host, xfer_elem, use_sg); | ||
9878 | } | 10223 | } |
9879 | return (sta); | 10224 | |
10225 | ASC_STATS(scp->device->host, xfer_cnt); | ||
10226 | |||
10227 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); | ||
10228 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); | ||
10229 | |||
10230 | *adv_scsiqpp = scsiqp; | ||
10231 | |||
10232 | return ASC_NOERROR; | ||
9880 | } | 10233 | } |
9881 | 10234 | ||
9882 | static int AscSgListToQueue(int sg_list) | 10235 | static int AscSgListToQueue(int sg_list) |
@@ -9886,7 +10239,7 @@ static int AscSgListToQueue(int sg_list) | |||
9886 | n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q); | 10239 | n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q); |
9887 | if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0) | 10240 | if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0) |
9888 | n_sg_list_qs++; | 10241 | n_sg_list_qs++; |
9889 | return (n_sg_list_qs + 1); | 10242 | return n_sg_list_qs + 1; |
9890 | } | 10243 | } |
9891 | 10244 | ||
9892 | static uint | 10245 | static uint |
@@ -9901,7 +10254,7 @@ AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs) | |||
9901 | tid_no = ASC_TIX_TO_TID(target_ix); | 10254 | tid_no = ASC_TIX_TO_TID(target_ix); |
9902 | if ((asc_dvc->unit_not_ready & target_id) || | 10255 | if ((asc_dvc->unit_not_ready & target_id) || |
9903 | (asc_dvc->queue_full_or_busy & target_id)) { | 10256 | (asc_dvc->queue_full_or_busy & target_id)) { |
9904 | return (0); | 10257 | return 0; |
9905 | } | 10258 | } |
9906 | if (n_qs == 1) { | 10259 | if (n_qs == 1) { |
9907 | cur_used_qs = (uint) asc_dvc->cur_total_qng + | 10260 | cur_used_qs = (uint) asc_dvc->cur_total_qng + |
@@ -9914,9 +10267,9 @@ AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs) | |||
9914 | cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs; | 10267 | cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs; |
9915 | if (asc_dvc->cur_dvc_qng[tid_no] >= | 10268 | if (asc_dvc->cur_dvc_qng[tid_no] >= |
9916 | asc_dvc->max_dvc_qng[tid_no]) { | 10269 | asc_dvc->max_dvc_qng[tid_no]) { |
9917 | return (0); | 10270 | return 0; |
9918 | } | 10271 | } |
9919 | return (cur_free_qs); | 10272 | return cur_free_qs; |
9920 | } | 10273 | } |
9921 | if (n_qs > 1) { | 10274 | if (n_qs > 1) { |
9922 | if ((n_qs > asc_dvc->last_q_shortage) | 10275 | if ((n_qs > asc_dvc->last_q_shortage) |
@@ -9924,7 +10277,62 @@ AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs) | |||
9924 | asc_dvc->last_q_shortage = n_qs; | 10277 | asc_dvc->last_q_shortage = n_qs; |
9925 | } | 10278 | } |
9926 | } | 10279 | } |
9927 | return (0); | 10280 | return 0; |
10281 | } | ||
10282 | |||
10283 | static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head) | ||
10284 | { | ||
10285 | ushort q_addr; | ||
10286 | uchar next_qp; | ||
10287 | uchar q_status; | ||
10288 | |||
10289 | q_addr = ASC_QNO_TO_QADDR(free_q_head); | ||
10290 | q_status = (uchar)AscReadLramByte(iop_base, | ||
10291 | (ushort)(q_addr + | ||
10292 | ASC_SCSIQ_B_STATUS)); | ||
10293 | next_qp = AscReadLramByte(iop_base, (ushort)(q_addr + ASC_SCSIQ_B_FWD)); | ||
10294 | if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) | ||
10295 | return next_qp; | ||
10296 | return ASC_QLINK_END; | ||
10297 | } | ||
10298 | |||
10299 | static uchar | ||
10300 | AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q) | ||
10301 | { | ||
10302 | uchar i; | ||
10303 | |||
10304 | for (i = 0; i < n_free_q; i++) { | ||
10305 | free_q_head = AscAllocFreeQueue(iop_base, free_q_head); | ||
10306 | if (free_q_head == ASC_QLINK_END) | ||
10307 | break; | ||
10308 | } | ||
10309 | return free_q_head; | ||
10310 | } | ||
10311 | |||
10312 | /* | ||
10313 | * void | ||
10314 | * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | ||
10315 | * | ||
10316 | * Calling/Exit State: | ||
10317 | * none | ||
10318 | * | ||
10319 | * Description: | ||
10320 | * Output an ASC_SCSI_Q structure to the chip | ||
10321 | */ | ||
10322 | static void | ||
10323 | DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | ||
10324 | { | ||
10325 | int i; | ||
10326 | |||
10327 | ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words); | ||
10328 | AscSetChipLramAddr(iop_base, s_addr); | ||
10329 | for (i = 0; i < 2 * words; i += 2) { | ||
10330 | if (i == 4 || i == 20) { | ||
10331 | continue; | ||
10332 | } | ||
10333 | outpw(iop_base + IOP_RAM_DATA, | ||
10334 | ((ushort)outbuf[i + 1] << 8) | outbuf[i]); | ||
10335 | } | ||
9928 | } | 10336 | } |
9929 | 10337 | ||
9930 | static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) | 10338 | static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) |
@@ -9966,7 +10374,7 @@ static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) | |||
9966 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS), | 10374 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS), |
9967 | (ushort)(((ushort)scsiq->q1. | 10375 | (ushort)(((ushort)scsiq->q1. |
9968 | q_no << 8) | (ushort)QS_READY)); | 10376 | q_no << 8) | (ushort)QS_READY)); |
9969 | return (1); | 10377 | return 1; |
9970 | } | 10378 | } |
9971 | 10379 | ||
9972 | static int | 10380 | static int |
@@ -10104,491 +10512,651 @@ AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) | |||
10104 | } | 10512 | } |
10105 | 10513 | ||
10106 | static int | 10514 | static int |
10107 | AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data) | 10515 | AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required) |
10108 | { | 10516 | { |
10109 | int sta = FALSE; | 10517 | PortAddr iop_base; |
10518 | uchar free_q_head; | ||
10519 | uchar next_qp; | ||
10520 | uchar tid_no; | ||
10521 | uchar target_ix; | ||
10522 | int sta; | ||
10110 | 10523 | ||
10111 | if (AscHostReqRiscHalt(iop_base)) { | 10524 | iop_base = asc_dvc->iop_base; |
10112 | sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); | 10525 | target_ix = scsiq->q2.target_ix; |
10113 | AscStartChip(iop_base); | 10526 | tid_no = ASC_TIX_TO_TID(target_ix); |
10114 | return (sta); | 10527 | sta = 0; |
10528 | free_q_head = (uchar)AscGetVarFreeQHead(iop_base); | ||
10529 | if (n_q_required > 1) { | ||
10530 | next_qp = AscAllocMultipleFreeQueue(iop_base, free_q_head, | ||
10531 | (uchar)n_q_required); | ||
10532 | if (next_qp != ASC_QLINK_END) { | ||
10533 | asc_dvc->last_q_shortage = 0; | ||
10534 | scsiq->sg_head->queue_cnt = n_q_required - 1; | ||
10535 | scsiq->q1.q_no = free_q_head; | ||
10536 | sta = AscPutReadySgListQueue(asc_dvc, scsiq, | ||
10537 | free_q_head); | ||
10538 | } | ||
10539 | } else if (n_q_required == 1) { | ||
10540 | next_qp = AscAllocFreeQueue(iop_base, free_q_head); | ||
10541 | if (next_qp != ASC_QLINK_END) { | ||
10542 | scsiq->q1.q_no = free_q_head; | ||
10543 | sta = AscPutReadyQueue(asc_dvc, scsiq, free_q_head); | ||
10544 | } | ||
10115 | } | 10545 | } |
10116 | return (sta); | 10546 | if (sta == 1) { |
10547 | AscPutVarFreeQHead(iop_base, next_qp); | ||
10548 | asc_dvc->cur_total_qng += n_q_required; | ||
10549 | asc_dvc->cur_dvc_qng[tid_no]++; | ||
10550 | } | ||
10551 | return sta; | ||
10117 | } | 10552 | } |
10118 | 10553 | ||
10119 | static int AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data) | 10554 | #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16 |
10555 | static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = { | ||
10556 | INQUIRY, | ||
10557 | REQUEST_SENSE, | ||
10558 | READ_CAPACITY, | ||
10559 | READ_TOC, | ||
10560 | MODE_SELECT, | ||
10561 | MODE_SENSE, | ||
10562 | MODE_SELECT_10, | ||
10563 | MODE_SENSE_10, | ||
10564 | 0xFF, | ||
10565 | 0xFF, | ||
10566 | 0xFF, | ||
10567 | 0xFF, | ||
10568 | 0xFF, | ||
10569 | 0xFF, | ||
10570 | 0xFF, | ||
10571 | 0xFF | ||
10572 | }; | ||
10573 | |||
10574 | static int AscExeScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq) | ||
10120 | { | 10575 | { |
10121 | ASC_SCSI_BIT_ID_TYPE org_id; | 10576 | PortAddr iop_base; |
10577 | int sta; | ||
10578 | int n_q_required; | ||
10579 | int disable_syn_offset_one_fix; | ||
10122 | int i; | 10580 | int i; |
10123 | int sta = TRUE; | 10581 | ASC_PADDR addr; |
10582 | ushort sg_entry_cnt = 0; | ||
10583 | ushort sg_entry_cnt_minus_one = 0; | ||
10584 | uchar target_ix; | ||
10585 | uchar tid_no; | ||
10586 | uchar sdtr_data; | ||
10587 | uchar extra_bytes; | ||
10588 | uchar scsi_cmd; | ||
10589 | uchar disable_cmd; | ||
10590 | ASC_SG_HEAD *sg_head; | ||
10591 | ASC_DCNT data_cnt; | ||
10124 | 10592 | ||
10125 | AscSetBank(iop_base, 1); | 10593 | iop_base = asc_dvc->iop_base; |
10126 | org_id = AscReadChipDvcID(iop_base); | 10594 | sg_head = scsiq->sg_head; |
10127 | for (i = 0; i <= ASC_MAX_TID; i++) { | 10595 | if (asc_dvc->err_code != 0) |
10128 | if (org_id == (0x01 << i)) | 10596 | return (ERR); |
10129 | break; | 10597 | scsiq->q1.q_no = 0; |
10598 | if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) { | ||
10599 | scsiq->q1.extra_bytes = 0; | ||
10130 | } | 10600 | } |
10131 | org_id = (ASC_SCSI_BIT_ID_TYPE) i; | 10601 | sta = 0; |
10132 | AscWriteChipDvcID(iop_base, id); | 10602 | target_ix = scsiq->q2.target_ix; |
10133 | if (AscReadChipDvcID(iop_base) == (0x01 << id)) { | 10603 | tid_no = ASC_TIX_TO_TID(target_ix); |
10134 | AscSetBank(iop_base, 0); | 10604 | n_q_required = 1; |
10135 | AscSetChipSyn(iop_base, sdtr_data); | 10605 | if (scsiq->cdbptr[0] == REQUEST_SENSE) { |
10136 | if (AscGetChipSyn(iop_base) != sdtr_data) { | 10606 | if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) { |
10137 | sta = FALSE; | 10607 | asc_dvc->sdtr_done &= ~scsiq->q1.target_id; |
10608 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); | ||
10609 | AscMsgOutSDTR(asc_dvc, | ||
10610 | asc_dvc-> | ||
10611 | sdtr_period_tbl[(sdtr_data >> 4) & | ||
10612 | (uchar)(asc_dvc-> | ||
10613 | max_sdtr_index - | ||
10614 | 1)], | ||
10615 | (uchar)(sdtr_data & (uchar) | ||
10616 | ASC_SYN_MAX_OFFSET)); | ||
10617 | scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT); | ||
10138 | } | 10618 | } |
10619 | } | ||
10620 | if (asc_dvc->in_critical_cnt != 0) { | ||
10621 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY); | ||
10622 | return (ERR); | ||
10623 | } | ||
10624 | asc_dvc->in_critical_cnt++; | ||
10625 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { | ||
10626 | if ((sg_entry_cnt = sg_head->entry_cnt) == 0) { | ||
10627 | asc_dvc->in_critical_cnt--; | ||
10628 | return (ERR); | ||
10629 | } | ||
10630 | #if !CC_VERY_LONG_SG_LIST | ||
10631 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { | ||
10632 | asc_dvc->in_critical_cnt--; | ||
10633 | return (ERR); | ||
10634 | } | ||
10635 | #endif /* !CC_VERY_LONG_SG_LIST */ | ||
10636 | if (sg_entry_cnt == 1) { | ||
10637 | scsiq->q1.data_addr = | ||
10638 | (ADV_PADDR)sg_head->sg_list[0].addr; | ||
10639 | scsiq->q1.data_cnt = | ||
10640 | (ADV_DCNT)sg_head->sg_list[0].bytes; | ||
10641 | scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE); | ||
10642 | } | ||
10643 | sg_entry_cnt_minus_one = sg_entry_cnt - 1; | ||
10644 | } | ||
10645 | scsi_cmd = scsiq->cdbptr[0]; | ||
10646 | disable_syn_offset_one_fix = FALSE; | ||
10647 | if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) && | ||
10648 | !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) { | ||
10649 | if (scsiq->q1.cntl & QC_SG_HEAD) { | ||
10650 | data_cnt = 0; | ||
10651 | for (i = 0; i < sg_entry_cnt; i++) { | ||
10652 | data_cnt += | ||
10653 | (ADV_DCNT)le32_to_cpu(sg_head->sg_list[i]. | ||
10654 | bytes); | ||
10655 | } | ||
10656 | } else { | ||
10657 | data_cnt = le32_to_cpu(scsiq->q1.data_cnt); | ||
10658 | } | ||
10659 | if (data_cnt != 0UL) { | ||
10660 | if (data_cnt < 512UL) { | ||
10661 | disable_syn_offset_one_fix = TRUE; | ||
10662 | } else { | ||
10663 | for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST; | ||
10664 | i++) { | ||
10665 | disable_cmd = | ||
10666 | _syn_offset_one_disable_cmd[i]; | ||
10667 | if (disable_cmd == 0xFF) { | ||
10668 | break; | ||
10669 | } | ||
10670 | if (scsi_cmd == disable_cmd) { | ||
10671 | disable_syn_offset_one_fix = | ||
10672 | TRUE; | ||
10673 | break; | ||
10674 | } | ||
10675 | } | ||
10676 | } | ||
10677 | } | ||
10678 | } | ||
10679 | if (disable_syn_offset_one_fix) { | ||
10680 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG; | ||
10681 | scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX | | ||
10682 | ASC_TAG_FLAG_DISABLE_DISCONNECT); | ||
10139 | } else { | 10683 | } else { |
10140 | sta = FALSE; | 10684 | scsiq->q2.tag_code &= 0x27; |
10141 | } | 10685 | } |
10142 | AscSetBank(iop_base, 1); | 10686 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { |
10143 | AscWriteChipDvcID(iop_base, org_id); | 10687 | if (asc_dvc->bug_fix_cntl) { |
10144 | AscSetBank(iop_base, 0); | 10688 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { |
10689 | if ((scsi_cmd == READ_6) || | ||
10690 | (scsi_cmd == READ_10)) { | ||
10691 | addr = | ||
10692 | (ADV_PADDR)le32_to_cpu(sg_head-> | ||
10693 | sg_list | ||
10694 | [sg_entry_cnt_minus_one]. | ||
10695 | addr) + | ||
10696 | (ADV_DCNT)le32_to_cpu(sg_head-> | ||
10697 | sg_list | ||
10698 | [sg_entry_cnt_minus_one]. | ||
10699 | bytes); | ||
10700 | extra_bytes = | ||
10701 | (uchar)((ushort)addr & 0x0003); | ||
10702 | if ((extra_bytes != 0) | ||
10703 | && | ||
10704 | ((scsiq->q2. | ||
10705 | tag_code & | ||
10706 | ASC_TAG_FLAG_EXTRA_BYTES) | ||
10707 | == 0)) { | ||
10708 | scsiq->q2.tag_code |= | ||
10709 | ASC_TAG_FLAG_EXTRA_BYTES; | ||
10710 | scsiq->q1.extra_bytes = | ||
10711 | extra_bytes; | ||
10712 | data_cnt = | ||
10713 | le32_to_cpu(sg_head-> | ||
10714 | sg_list | ||
10715 | [sg_entry_cnt_minus_one]. | ||
10716 | bytes); | ||
10717 | data_cnt -= | ||
10718 | (ASC_DCNT) extra_bytes; | ||
10719 | sg_head-> | ||
10720 | sg_list | ||
10721 | [sg_entry_cnt_minus_one]. | ||
10722 | bytes = | ||
10723 | cpu_to_le32(data_cnt); | ||
10724 | } | ||
10725 | } | ||
10726 | } | ||
10727 | } | ||
10728 | sg_head->entry_to_copy = sg_head->entry_cnt; | ||
10729 | #if CC_VERY_LONG_SG_LIST | ||
10730 | /* | ||
10731 | * Set the sg_entry_cnt to the maximum possible. The rest of | ||
10732 | * the SG elements will be copied when the RISC completes the | ||
10733 | * SG elements that fit and halts. | ||
10734 | */ | ||
10735 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { | ||
10736 | sg_entry_cnt = ASC_MAX_SG_LIST; | ||
10737 | } | ||
10738 | #endif /* CC_VERY_LONG_SG_LIST */ | ||
10739 | n_q_required = AscSgListToQueue(sg_entry_cnt); | ||
10740 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >= | ||
10741 | (uint) n_q_required) | ||
10742 | || ((scsiq->q1.cntl & QC_URGENT) != 0)) { | ||
10743 | if ((sta = | ||
10744 | AscSendScsiQueue(asc_dvc, scsiq, | ||
10745 | n_q_required)) == 1) { | ||
10746 | asc_dvc->in_critical_cnt--; | ||
10747 | return (sta); | ||
10748 | } | ||
10749 | } | ||
10750 | } else { | ||
10751 | if (asc_dvc->bug_fix_cntl) { | ||
10752 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { | ||
10753 | if ((scsi_cmd == READ_6) || | ||
10754 | (scsi_cmd == READ_10)) { | ||
10755 | addr = | ||
10756 | le32_to_cpu(scsiq->q1.data_addr) + | ||
10757 | le32_to_cpu(scsiq->q1.data_cnt); | ||
10758 | extra_bytes = | ||
10759 | (uchar)((ushort)addr & 0x0003); | ||
10760 | if ((extra_bytes != 0) | ||
10761 | && | ||
10762 | ((scsiq->q2. | ||
10763 | tag_code & | ||
10764 | ASC_TAG_FLAG_EXTRA_BYTES) | ||
10765 | == 0)) { | ||
10766 | data_cnt = | ||
10767 | le32_to_cpu(scsiq->q1. | ||
10768 | data_cnt); | ||
10769 | if (((ushort)data_cnt & 0x01FF) | ||
10770 | == 0) { | ||
10771 | scsiq->q2.tag_code |= | ||
10772 | ASC_TAG_FLAG_EXTRA_BYTES; | ||
10773 | data_cnt -= (ASC_DCNT) | ||
10774 | extra_bytes; | ||
10775 | scsiq->q1.data_cnt = | ||
10776 | cpu_to_le32 | ||
10777 | (data_cnt); | ||
10778 | scsiq->q1.extra_bytes = | ||
10779 | extra_bytes; | ||
10780 | } | ||
10781 | } | ||
10782 | } | ||
10783 | } | ||
10784 | } | ||
10785 | n_q_required = 1; | ||
10786 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) || | ||
10787 | ((scsiq->q1.cntl & QC_URGENT) != 0)) { | ||
10788 | if ((sta = AscSendScsiQueue(asc_dvc, scsiq, | ||
10789 | n_q_required)) == 1) { | ||
10790 | asc_dvc->in_critical_cnt--; | ||
10791 | return (sta); | ||
10792 | } | ||
10793 | } | ||
10794 | } | ||
10795 | asc_dvc->in_critical_cnt--; | ||
10145 | return (sta); | 10796 | return (sta); |
10146 | } | 10797 | } |
10147 | 10798 | ||
10148 | static ushort AscInitLram(ASC_DVC_VAR *asc_dvc) | 10799 | /* |
10800 | * AdvExeScsiQueue() - Send a request to the RISC microcode program. | ||
10801 | * | ||
10802 | * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q, | ||
10803 | * add the carrier to the ICQ (Initiator Command Queue), and tickle the | ||
10804 | * RISC to notify it a new command is ready to be executed. | ||
10805 | * | ||
10806 | * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be | ||
10807 | * set to SCSI_MAX_RETRY. | ||
10808 | * | ||
10809 | * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode | ||
10810 | * for DMA addresses or math operations are byte swapped to little-endian | ||
10811 | * order. | ||
10812 | * | ||
10813 | * Return: | ||
10814 | * ADV_SUCCESS(1) - The request was successfully queued. | ||
10815 | * ADV_BUSY(0) - Resource unavailable; Retry again after pending | ||
10816 | * request completes. | ||
10817 | * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure | ||
10818 | * host IC error. | ||
10819 | */ | ||
10820 | static int AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq) | ||
10149 | { | 10821 | { |
10150 | uchar i; | 10822 | AdvPortAddr iop_base; |
10151 | ushort s_addr; | 10823 | ADV_PADDR req_paddr; |
10152 | PortAddr iop_base; | 10824 | ADV_CARR_T *new_carrp; |
10153 | ushort warn_code; | ||
10154 | 10825 | ||
10155 | iop_base = asc_dvc->iop_base; | 10826 | /* |
10156 | warn_code = 0; | 10827 | * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID. |
10157 | AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0, | 10828 | */ |
10158 | (ushort)(((int)(asc_dvc->max_total_qng + 2 + 1) * | 10829 | if (scsiq->target_id > ADV_MAX_TID) { |
10159 | 64) >> 1) | 10830 | scsiq->host_status = QHSTA_M_INVALID_DEVICE; |
10160 | ); | 10831 | scsiq->done_status = QD_WITH_ERROR; |
10161 | i = ASC_MIN_ACTIVE_QNO; | 10832 | return ADV_ERROR; |
10162 | s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE; | ||
10163 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
10164 | (uchar)(i + 1)); | ||
10165 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
10166 | (uchar)(asc_dvc->max_total_qng)); | ||
10167 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
10168 | (uchar)i); | ||
10169 | i++; | ||
10170 | s_addr += ASC_QBLK_SIZE; | ||
10171 | for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) { | ||
10172 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
10173 | (uchar)(i + 1)); | ||
10174 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
10175 | (uchar)(i - 1)); | ||
10176 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
10177 | (uchar)i); | ||
10178 | } | ||
10179 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), | ||
10180 | (uchar)ASC_QLINK_END); | ||
10181 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), | ||
10182 | (uchar)(asc_dvc->max_total_qng - 1)); | ||
10183 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), | ||
10184 | (uchar)asc_dvc->max_total_qng); | ||
10185 | i++; | ||
10186 | s_addr += ASC_QBLK_SIZE; | ||
10187 | for (; i <= (uchar)(asc_dvc->max_total_qng + 3); | ||
10188 | i++, s_addr += ASC_QBLK_SIZE) { | ||
10189 | AscWriteLramByte(iop_base, | ||
10190 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_FWD), i); | ||
10191 | AscWriteLramByte(iop_base, | ||
10192 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_BWD), i); | ||
10193 | AscWriteLramByte(iop_base, | ||
10194 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_QNO), i); | ||
10195 | } | 10833 | } |
10196 | return (warn_code); | ||
10197 | } | ||
10198 | |||
10199 | static ushort AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) | ||
10200 | { | ||
10201 | PortAddr iop_base; | ||
10202 | int i; | ||
10203 | ushort lram_addr; | ||
10204 | 10834 | ||
10205 | iop_base = asc_dvc->iop_base; | 10835 | iop_base = asc_dvc->iop_base; |
10206 | AscPutRiscVarFreeQHead(iop_base, 1); | ||
10207 | AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng); | ||
10208 | AscPutVarFreeQHead(iop_base, 1); | ||
10209 | AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng); | ||
10210 | AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B, | ||
10211 | (uchar)((int)asc_dvc->max_total_qng + 1)); | ||
10212 | AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B, | ||
10213 | (uchar)((int)asc_dvc->max_total_qng + 2)); | ||
10214 | AscWriteLramByte(iop_base, (ushort)ASCV_TOTAL_READY_Q_B, | ||
10215 | asc_dvc->max_total_qng); | ||
10216 | AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0); | ||
10217 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | ||
10218 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0); | ||
10219 | AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0); | ||
10220 | AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0); | ||
10221 | AscPutQDoneInProgress(iop_base, 0); | ||
10222 | lram_addr = ASC_QADR_BEG; | ||
10223 | for (i = 0; i < 32; i++, lram_addr += 2) { | ||
10224 | AscWriteLramWord(iop_base, lram_addr, 0); | ||
10225 | } | ||
10226 | return (0); | ||
10227 | } | ||
10228 | 10836 | ||
10229 | static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code) | 10837 | /* |
10230 | { | 10838 | * Allocate a carrier ensuring at least one carrier always |
10231 | if (asc_dvc->err_code == 0) { | 10839 | * remains on the freelist and initialize fields. |
10232 | asc_dvc->err_code = err_code; | 10840 | */ |
10233 | AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W, | 10841 | if ((new_carrp = asc_dvc->carr_freelist) == NULL) { |
10234 | err_code); | 10842 | return ADV_BUSY; |
10235 | } | 10843 | } |
10236 | return (err_code); | 10844 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
10237 | } | 10845 | ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa)); |
10846 | asc_dvc->carr_pending_cnt++; | ||
10238 | 10847 | ||
10239 | static uchar | 10848 | /* |
10240 | AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset) | 10849 | * Set the carrier to be a stopper by setting 'next_vpa' |
10241 | { | 10850 | * to the stopper value. The current stopper will be changed |
10242 | EXT_MSG sdtr_buf; | 10851 | * below to point to the new stopper. |
10243 | uchar sdtr_period_index; | 10852 | */ |
10244 | PortAddr iop_base; | 10853 | new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); |
10245 | 10854 | ||
10246 | iop_base = asc_dvc->iop_base; | 10855 | /* |
10247 | sdtr_buf.msg_type = MS_EXTEND; | 10856 | * Clear the ADV_SCSI_REQ_Q done flag. |
10248 | sdtr_buf.msg_len = MS_SDTR_LEN; | 10857 | */ |
10249 | sdtr_buf.msg_req = MS_SDTR_CODE; | 10858 | scsiq->a_flag &= ~ADV_SCSIQ_DONE; |
10250 | sdtr_buf.xfer_period = sdtr_period; | ||
10251 | sdtr_offset &= ASC_SYN_MAX_OFFSET; | ||
10252 | sdtr_buf.req_ack_offset = sdtr_offset; | ||
10253 | if ((sdtr_period_index = | ||
10254 | AscGetSynPeriodIndex(asc_dvc, sdtr_period)) <= | ||
10255 | asc_dvc->max_sdtr_index) { | ||
10256 | AscMemWordCopyPtrToLram(iop_base, | ||
10257 | ASCV_MSGOUT_BEG, | ||
10258 | (uchar *)&sdtr_buf, | ||
10259 | sizeof(EXT_MSG) >> 1); | ||
10260 | return ((sdtr_period_index << 4) | sdtr_offset); | ||
10261 | } else { | ||
10262 | 10859 | ||
10263 | sdtr_buf.req_ack_offset = 0; | 10860 | req_paddr = virt_to_bus(scsiq); |
10264 | AscMemWordCopyPtrToLram(iop_base, | 10861 | BUG_ON(req_paddr & 31); |
10265 | ASCV_MSGOUT_BEG, | 10862 | /* Wait for assertion before making little-endian */ |
10266 | (uchar *)&sdtr_buf, | 10863 | req_paddr = cpu_to_le32(req_paddr); |
10267 | sizeof(EXT_MSG) >> 1); | ||
10268 | return (0); | ||
10269 | } | ||
10270 | } | ||
10271 | 10864 | ||
10272 | static uchar | 10865 | /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */ |
10273 | AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset) | 10866 | scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq)); |
10274 | { | 10867 | scsiq->scsiq_rptr = req_paddr; |
10275 | uchar byte; | ||
10276 | uchar sdtr_period_ix; | ||
10277 | 10868 | ||
10278 | sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period); | 10869 | scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp)); |
10279 | if ((sdtr_period_ix > asc_dvc->max_sdtr_index) | 10870 | /* |
10280 | ) { | 10871 | * Every ADV_CARR_T.carr_pa is byte swapped to little-endian |
10281 | return (0xFF); | 10872 | * order during initialization. |
10282 | } | 10873 | */ |
10283 | byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET); | 10874 | scsiq->carr_pa = asc_dvc->icq_sp->carr_pa; |
10284 | return (byte); | ||
10285 | } | ||
10286 | 10875 | ||
10287 | static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no) | 10876 | /* |
10288 | { | 10877 | * Use the current stopper to send the ADV_SCSI_REQ_Q command to |
10289 | AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); | 10878 | * the microcode. The newly allocated stopper will become the new |
10290 | AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data); | 10879 | * stopper. |
10291 | return; | 10880 | */ |
10292 | } | 10881 | asc_dvc->icq_sp->areq_vpa = req_paddr; |
10293 | 10882 | ||
10294 | static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time) | 10883 | /* |
10295 | { | 10884 | * Set the 'next_vpa' pointer for the old stopper to be the |
10296 | uchar *period_table; | 10885 | * physical address of the new stopper. The RISC can only |
10297 | int max_index; | 10886 | * follow physical addresses. |
10298 | int min_index; | 10887 | */ |
10299 | int i; | 10888 | asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa; |
10300 | 10889 | ||
10301 | period_table = asc_dvc->sdtr_period_tbl; | 10890 | /* |
10302 | max_index = (int)asc_dvc->max_sdtr_index; | 10891 | * Set the host adapter stopper pointer to point to the new carrier. |
10303 | min_index = (int)asc_dvc->host_init_sdtr_index; | 10892 | */ |
10304 | if ((syn_time <= period_table[max_index])) { | 10893 | asc_dvc->icq_sp = new_carrp; |
10305 | for (i = min_index; i < (max_index - 1); i++) { | 10894 | |
10306 | if (syn_time <= period_table[i]) { | 10895 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || |
10307 | return ((uchar)i); | 10896 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { |
10308 | } | 10897 | /* |
10898 | * Tickle the RISC to tell it to read its Command Queue Head pointer. | ||
10899 | */ | ||
10900 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A); | ||
10901 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
10902 | /* | ||
10903 | * Clear the tickle value. In the ASC-3550 the RISC flag | ||
10904 | * command 'clr_tickle_a' does not work unless the host | ||
10905 | * value is cleared. | ||
10906 | */ | ||
10907 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, | ||
10908 | ADV_TICKLE_NOP); | ||
10309 | } | 10909 | } |
10310 | return ((uchar)max_index); | 10910 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
10311 | } else { | 10911 | /* |
10312 | return ((uchar)(max_index + 1)); | 10912 | * Notify the RISC a carrier is ready by writing the physical |
10913 | * address of the new carrier stopper to the COMMA register. | ||
10914 | */ | ||
10915 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | ||
10916 | le32_to_cpu(new_carrp->carr_pa)); | ||
10313 | } | 10917 | } |
10918 | |||
10919 | return ADV_SUCCESS; | ||
10314 | } | 10920 | } |
10315 | 10921 | ||
10316 | static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head) | 10922 | /* |
10923 | * Execute a single 'Scsi_Cmnd'. | ||
10924 | */ | ||
10925 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *scp) | ||
10317 | { | 10926 | { |
10318 | ushort q_addr; | 10927 | int ret, err_code; |
10319 | uchar next_qp; | 10928 | struct asc_board *boardp = shost_priv(scp->device->host); |
10320 | uchar q_status; | ||
10321 | 10929 | ||
10322 | q_addr = ASC_QNO_TO_QADDR(free_q_head); | 10930 | ASC_DBG(1, "scp 0x%p\n", scp); |
10323 | q_status = (uchar)AscReadLramByte(iop_base, | ||
10324 | (ushort)(q_addr + | ||
10325 | ASC_SCSIQ_B_STATUS)); | ||
10326 | next_qp = AscReadLramByte(iop_base, (ushort)(q_addr + ASC_SCSIQ_B_FWD)); | ||
10327 | if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) { | ||
10328 | return (next_qp); | ||
10329 | } | ||
10330 | return (ASC_QLINK_END); | ||
10331 | } | ||
10332 | 10931 | ||
10333 | static uchar | 10932 | if (ASC_NARROW_BOARD(boardp)) { |
10334 | AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q) | 10933 | ASC_DVC_VAR *asc_dvc = &boardp->dvc_var.asc_dvc_var; |
10335 | { | 10934 | struct asc_scsi_q asc_scsi_q; |
10336 | uchar i; | ||
10337 | 10935 | ||
10338 | for (i = 0; i < n_free_q; i++) { | 10936 | /* asc_build_req() can not return ASC_BUSY. */ |
10339 | if ((free_q_head = AscAllocFreeQueue(iop_base, free_q_head)) | 10937 | ret = asc_build_req(boardp, scp, &asc_scsi_q); |
10340 | == ASC_QLINK_END) { | 10938 | if (ret == ASC_ERROR) { |
10341 | return (ASC_QLINK_END); | 10939 | ASC_STATS(scp->device->host, build_error); |
10940 | return ASC_ERROR; | ||
10342 | } | 10941 | } |
10343 | } | ||
10344 | return (free_q_head); | ||
10345 | } | ||
10346 | 10942 | ||
10347 | static int AscHostReqRiscHalt(PortAddr iop_base) | 10943 | ret = AscExeScsiQueue(asc_dvc, &asc_scsi_q); |
10348 | { | 10944 | kfree(asc_scsi_q.sg_head); |
10349 | int count = 0; | 10945 | err_code = asc_dvc->err_code; |
10350 | int sta = 0; | 10946 | } else { |
10351 | uchar saved_stop_code; | 10947 | ADV_DVC_VAR *adv_dvc = &boardp->dvc_var.adv_dvc_var; |
10948 | ADV_SCSI_REQ_Q *adv_scsiqp; | ||
10352 | 10949 | ||
10353 | if (AscIsChipHalted(iop_base)) | 10950 | switch (adv_build_req(boardp, scp, &adv_scsiqp)) { |
10354 | return (1); | 10951 | case ASC_NOERROR: |
10355 | saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B); | 10952 | ASC_DBG(3, "adv_build_req ASC_NOERROR\n"); |
10356 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, | ||
10357 | ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP); | ||
10358 | do { | ||
10359 | if (AscIsChipHalted(iop_base)) { | ||
10360 | sta = 1; | ||
10361 | break; | 10953 | break; |
10954 | case ASC_BUSY: | ||
10955 | ASC_DBG(1, "adv_build_req ASC_BUSY\n"); | ||
10956 | /* | ||
10957 | * The asc_stats fields 'adv_build_noreq' and | ||
10958 | * 'adv_build_nosg' count wide board busy conditions. | ||
10959 | * They are updated in adv_build_req and | ||
10960 | * adv_get_sglist, respectively. | ||
10961 | */ | ||
10962 | return ASC_BUSY; | ||
10963 | case ASC_ERROR: | ||
10964 | default: | ||
10965 | ASC_DBG(1, "adv_build_req ASC_ERROR\n"); | ||
10966 | ASC_STATS(scp->device->host, build_error); | ||
10967 | return ASC_ERROR; | ||
10362 | } | 10968 | } |
10363 | DvcSleepMilliSecond(100); | ||
10364 | } while (count++ < 20); | ||
10365 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code); | ||
10366 | return (sta); | ||
10367 | } | ||
10368 | 10969 | ||
10369 | static int AscStopQueueExe(PortAddr iop_base) | 10970 | ret = AdvExeScsiQueue(adv_dvc, adv_scsiqp); |
10370 | { | 10971 | err_code = adv_dvc->err_code; |
10371 | int count = 0; | 10972 | } |
10372 | 10973 | ||
10373 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) { | 10974 | switch (ret) { |
10374 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, | 10975 | case ASC_NOERROR: |
10375 | ASC_STOP_REQ_RISC_STOP); | 10976 | ASC_STATS(scp->device->host, exe_noerror); |
10376 | do { | 10977 | /* |
10377 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) & | 10978 | * Increment monotonically increasing per device |
10378 | ASC_STOP_ACK_RISC_STOP) { | 10979 | * successful request counter. Wrapping doesn't matter. |
10379 | return (1); | 10980 | */ |
10380 | } | 10981 | boardp->reqcnt[scp->device->id]++; |
10381 | DvcSleepMilliSecond(100); | 10982 | ASC_DBG(1, "ExeScsiQueue() ASC_NOERROR\n"); |
10382 | } while (count++ < 20); | 10983 | break; |
10984 | case ASC_BUSY: | ||
10985 | ASC_STATS(scp->device->host, exe_busy); | ||
10986 | break; | ||
10987 | case ASC_ERROR: | ||
10988 | scmd_printk(KERN_ERR, scp, "ExeScsiQueue() ASC_ERROR, " | ||
10989 | "err_code 0x%x\n", err_code); | ||
10990 | ASC_STATS(scp->device->host, exe_error); | ||
10991 | scp->result = HOST_BYTE(DID_ERROR); | ||
10992 | break; | ||
10993 | default: | ||
10994 | scmd_printk(KERN_ERR, scp, "ExeScsiQueue() unknown, " | ||
10995 | "err_code 0x%x\n", err_code); | ||
10996 | ASC_STATS(scp->device->host, exe_unknown); | ||
10997 | scp->result = HOST_BYTE(DID_ERROR); | ||
10998 | break; | ||
10383 | } | 10999 | } |
10384 | return (0); | ||
10385 | } | ||
10386 | 11000 | ||
10387 | static void DvcDelayMicroSecond(ADV_DVC_VAR *asc_dvc, ushort micro_sec) | 11001 | ASC_DBG(1, "end\n"); |
10388 | { | 11002 | return ret; |
10389 | udelay(micro_sec); | ||
10390 | } | 11003 | } |
10391 | 11004 | ||
10392 | static void DvcDelayNanoSecond(ASC_DVC_VAR *asc_dvc, ASC_DCNT nano_sec) | 11005 | /* |
11006 | * advansys_queuecommand() - interrupt-driven I/O entrypoint. | ||
11007 | * | ||
11008 | * This function always returns 0. Command return status is saved | ||
11009 | * in the 'scp' result field. | ||
11010 | */ | ||
11011 | static int | ||
11012 | advansys_queuecommand(struct scsi_cmnd *scp, void (*done)(struct scsi_cmnd *)) | ||
10393 | { | 11013 | { |
10394 | udelay((nano_sec + 999) / 1000); | 11014 | struct Scsi_Host *shost = scp->device->host; |
10395 | } | 11015 | int asc_res, result = 0; |
10396 | 11016 | ||
10397 | #ifdef CONFIG_ISA | 11017 | ASC_STATS(shost, queuecommand); |
10398 | static ASC_DCNT __init AscGetEisaProductID(PortAddr iop_base) | 11018 | scp->scsi_done = done; |
10399 | { | ||
10400 | PortAddr eisa_iop; | ||
10401 | ushort product_id_high, product_id_low; | ||
10402 | ASC_DCNT product_id; | ||
10403 | |||
10404 | eisa_iop = ASC_GET_EISA_SLOT(iop_base) | ASC_EISA_PID_IOP_MASK; | ||
10405 | product_id_low = inpw(eisa_iop); | ||
10406 | product_id_high = inpw(eisa_iop + 2); | ||
10407 | product_id = ((ASC_DCNT) product_id_high << 16) | | ||
10408 | (ASC_DCNT) product_id_low; | ||
10409 | return (product_id); | ||
10410 | } | ||
10411 | 11019 | ||
10412 | static PortAddr __init AscSearchIOPortAddrEISA(PortAddr iop_base) | 11020 | asc_res = asc_execute_scsi_cmnd(scp); |
10413 | { | ||
10414 | ASC_DCNT eisa_product_id; | ||
10415 | 11021 | ||
10416 | if (iop_base == 0) { | 11022 | switch (asc_res) { |
10417 | iop_base = ASC_EISA_MIN_IOP_ADDR; | 11023 | case ASC_NOERROR: |
10418 | } else { | 11024 | break; |
10419 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) | 11025 | case ASC_BUSY: |
10420 | return (0); | 11026 | result = SCSI_MLQUEUE_HOST_BUSY; |
10421 | if ((iop_base & 0x0050) == 0x0050) { | 11027 | break; |
10422 | iop_base += ASC_EISA_BIG_IOP_GAP; | 11028 | case ASC_ERROR: |
10423 | } else { | 11029 | default: |
10424 | iop_base += ASC_EISA_SMALL_IOP_GAP; | 11030 | asc_scsi_done(scp); |
10425 | } | 11031 | break; |
10426 | } | ||
10427 | while (iop_base <= ASC_EISA_MAX_IOP_ADDR) { | ||
10428 | eisa_product_id = AscGetEisaProductID(iop_base); | ||
10429 | if ((eisa_product_id == ASC_EISA_ID_740) || | ||
10430 | (eisa_product_id == ASC_EISA_ID_750)) { | ||
10431 | if (AscFindSignature(iop_base)) { | ||
10432 | inpw(iop_base + 4); | ||
10433 | return (iop_base); | ||
10434 | } | ||
10435 | } | ||
10436 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) | ||
10437 | return (0); | ||
10438 | if ((iop_base & 0x0050) == 0x0050) { | ||
10439 | iop_base += ASC_EISA_BIG_IOP_GAP; | ||
10440 | } else { | ||
10441 | iop_base += ASC_EISA_SMALL_IOP_GAP; | ||
10442 | } | ||
10443 | } | 11032 | } |
10444 | return (0); | 11033 | |
11034 | return result; | ||
10445 | } | 11035 | } |
10446 | #endif /* CONFIG_ISA */ | ||
10447 | 11036 | ||
10448 | static int AscStartChip(PortAddr iop_base) | 11037 | static ushort __devinit AscGetEisaChipCfg(PortAddr iop_base) |
10449 | { | 11038 | { |
10450 | AscSetChipControl(iop_base, 0); | 11039 | PortAddr eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | |
10451 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { | 11040 | (PortAddr) (ASC_EISA_CFG_IOP_MASK); |
10452 | return (0); | 11041 | return inpw(eisa_cfg_iop); |
10453 | } | ||
10454 | return (1); | ||
10455 | } | 11042 | } |
10456 | 11043 | ||
10457 | static int AscStopChip(PortAddr iop_base) | 11044 | /* |
11045 | * Return the BIOS address of the adapter at the specified | ||
11046 | * I/O port and with the specified bus type. | ||
11047 | */ | ||
11048 | static unsigned short __devinit | ||
11049 | AscGetChipBiosAddress(PortAddr iop_base, unsigned short bus_type) | ||
10458 | { | 11050 | { |
10459 | uchar cc_val; | 11051 | unsigned short cfg_lsw; |
11052 | unsigned short bios_addr; | ||
10460 | 11053 | ||
10461 | cc_val = | 11054 | /* |
10462 | AscGetChipControl(iop_base) & | 11055 | * The PCI BIOS is re-located by the motherboard BIOS. Because |
10463 | (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG)); | 11056 | * of this the driver can not determine where a PCI BIOS is |
10464 | AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT)); | 11057 | * loaded and executes. |
10465 | AscSetChipIH(iop_base, INS_HALT); | 11058 | */ |
10466 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | 11059 | if (bus_type & ASC_IS_PCI) |
10467 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) { | 11060 | return 0; |
10468 | return (0); | ||
10469 | } | ||
10470 | return (1); | ||
10471 | } | ||
10472 | 11061 | ||
10473 | static int AscIsChipHalted(PortAddr iop_base) | 11062 | if ((bus_type & ASC_IS_EISA) != 0) { |
10474 | { | 11063 | cfg_lsw = AscGetEisaChipCfg(iop_base); |
10475 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { | 11064 | cfg_lsw &= 0x000F; |
10476 | if ((AscGetChipControl(iop_base) & CC_HALT) != 0) { | 11065 | bios_addr = ASC_BIOS_MIN_ADDR + cfg_lsw * ASC_BIOS_BANK_SIZE; |
10477 | return (1); | 11066 | return bios_addr; |
10478 | } | ||
10479 | } | 11067 | } |
10480 | return (0); | ||
10481 | } | ||
10482 | 11068 | ||
10483 | static void AscSetChipIH(PortAddr iop_base, ushort ins_code) | 11069 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
10484 | { | 11070 | |
10485 | AscSetBank(iop_base, 1); | 11071 | /* |
10486 | AscWriteChipIH(iop_base, ins_code); | 11072 | * ISA PnP uses the top bit as the 32K BIOS flag |
10487 | AscSetBank(iop_base, 0); | 11073 | */ |
10488 | return; | 11074 | if (bus_type == ASC_IS_ISAPNP) |
11075 | cfg_lsw &= 0x7FFF; | ||
11076 | bios_addr = ASC_BIOS_MIN_ADDR + (cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE; | ||
11077 | return bios_addr; | ||
10489 | } | 11078 | } |
10490 | 11079 | ||
10491 | static void AscAckInterrupt(PortAddr iop_base) | 11080 | static uchar __devinit AscSetChipScsiID(PortAddr iop_base, uchar new_host_id) |
10492 | { | 11081 | { |
10493 | uchar host_flag; | 11082 | ushort cfg_lsw; |
10494 | uchar risc_flag; | ||
10495 | ushort loop; | ||
10496 | 11083 | ||
10497 | loop = 0; | 11084 | if (AscGetChipScsiID(iop_base) == new_host_id) { |
10498 | do { | 11085 | return (new_host_id); |
10499 | risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B); | ||
10500 | if (loop++ > 0x7FFF) { | ||
10501 | break; | ||
10502 | } | ||
10503 | } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0); | ||
10504 | host_flag = | ||
10505 | AscReadLramByte(iop_base, | ||
10506 | ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT); | ||
10507 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, | ||
10508 | (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT)); | ||
10509 | AscSetChipStatus(iop_base, CIW_INT_ACK); | ||
10510 | loop = 0; | ||
10511 | while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) { | ||
10512 | AscSetChipStatus(iop_base, CIW_INT_ACK); | ||
10513 | if (loop++ > 3) { | ||
10514 | break; | ||
10515 | } | ||
10516 | } | 11086 | } |
10517 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); | 11087 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
10518 | return; | 11088 | cfg_lsw &= 0xF8FF; |
11089 | cfg_lsw |= (ushort)((new_host_id & ASC_MAX_TID) << 8); | ||
11090 | AscSetChipCfgLsw(iop_base, cfg_lsw); | ||
11091 | return (AscGetChipScsiID(iop_base)); | ||
10519 | } | 11092 | } |
10520 | 11093 | ||
10521 | static void AscDisableInterrupt(PortAddr iop_base) | 11094 | static unsigned char __devinit AscGetChipScsiCtrl(PortAddr iop_base) |
10522 | { | 11095 | { |
10523 | ushort cfg; | 11096 | unsigned char sc; |
10524 | 11097 | ||
10525 | cfg = AscGetChipCfgLsw(iop_base); | 11098 | AscSetBank(iop_base, 1); |
10526 | AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON)); | 11099 | sc = inp(iop_base + IOP_REG_SC); |
10527 | return; | 11100 | AscSetBank(iop_base, 0); |
11101 | return sc; | ||
10528 | } | 11102 | } |
10529 | 11103 | ||
10530 | static void AscEnableInterrupt(PortAddr iop_base) | 11104 | static unsigned char __devinit |
11105 | AscGetChipVersion(PortAddr iop_base, unsigned short bus_type) | ||
10531 | { | 11106 | { |
10532 | ushort cfg; | 11107 | if (bus_type & ASC_IS_EISA) { |
10533 | 11108 | PortAddr eisa_iop; | |
10534 | cfg = AscGetChipCfgLsw(iop_base); | 11109 | unsigned char revision; |
10535 | AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON); | 11110 | eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | |
10536 | return; | 11111 | (PortAddr) ASC_EISA_REV_IOP_MASK; |
11112 | revision = inp(eisa_iop); | ||
11113 | return ASC_CHIP_MIN_VER_EISA - 1 + revision; | ||
11114 | } | ||
11115 | return AscGetChipVerNo(iop_base); | ||
10537 | } | 11116 | } |
10538 | 11117 | ||
10539 | static void AscSetBank(PortAddr iop_base, uchar bank) | 11118 | #ifdef CONFIG_ISA |
11119 | static void __devinit AscEnableIsaDma(uchar dma_channel) | ||
10540 | { | 11120 | { |
10541 | uchar val; | 11121 | if (dma_channel < 4) { |
10542 | 11122 | outp(0x000B, (ushort)(0xC0 | dma_channel)); | |
10543 | val = AscGetChipControl(iop_base) & | 11123 | outp(0x000A, dma_channel); |
10544 | (~ | 11124 | } else if (dma_channel < 8) { |
10545 | (CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET | | 11125 | outp(0x00D6, (ushort)(0xC0 | (dma_channel - 4))); |
10546 | CC_CHIP_RESET)); | 11126 | outp(0x00D4, (ushort)(dma_channel - 4)); |
10547 | if (bank == 1) { | ||
10548 | val |= CC_BANK_ONE; | ||
10549 | } else if (bank == 2) { | ||
10550 | val |= CC_DIAG | CC_BANK_ONE; | ||
10551 | } else { | ||
10552 | val &= ~CC_BANK_ONE; | ||
10553 | } | 11127 | } |
10554 | AscSetChipControl(iop_base, val); | ||
10555 | return; | ||
10556 | } | 11128 | } |
11129 | #endif /* CONFIG_ISA */ | ||
10557 | 11130 | ||
10558 | static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc) | 11131 | static int AscStopQueueExe(PortAddr iop_base) |
10559 | { | 11132 | { |
10560 | PortAddr iop_base; | 11133 | int count = 0; |
10561 | int i = 10; | ||
10562 | 11134 | ||
10563 | iop_base = asc_dvc->iop_base; | 11135 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) { |
10564 | while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) | 11136 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, |
10565 | && (i-- > 0)) { | 11137 | ASC_STOP_REQ_RISC_STOP); |
10566 | DvcSleepMilliSecond(100); | 11138 | do { |
11139 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) & | ||
11140 | ASC_STOP_ACK_RISC_STOP) { | ||
11141 | return (1); | ||
11142 | } | ||
11143 | mdelay(100); | ||
11144 | } while (count++ < 20); | ||
10567 | } | 11145 | } |
10568 | AscStopChip(iop_base); | 11146 | return (0); |
10569 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT); | ||
10570 | DvcDelayNanoSecond(asc_dvc, 60000); | ||
10571 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | ||
10572 | AscSetChipIH(iop_base, INS_HALT); | ||
10573 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT); | ||
10574 | AscSetChipControl(iop_base, CC_HALT); | ||
10575 | DvcSleepMilliSecond(200); | ||
10576 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); | ||
10577 | AscSetChipStatus(iop_base, 0); | ||
10578 | return (AscIsChipHalted(iop_base)); | ||
10579 | } | 11147 | } |
10580 | 11148 | ||
10581 | static ASC_DCNT __init AscGetMaxDmaCount(ushort bus_type) | 11149 | static ASC_DCNT __devinit AscGetMaxDmaCount(ushort bus_type) |
10582 | { | 11150 | { |
10583 | if (bus_type & ASC_IS_ISA) | 11151 | if (bus_type & ASC_IS_ISA) |
10584 | return (ASC_MAX_ISA_DMA_COUNT); | 11152 | return ASC_MAX_ISA_DMA_COUNT; |
10585 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) | 11153 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) |
10586 | return (ASC_MAX_VL_DMA_COUNT); | 11154 | return ASC_MAX_VL_DMA_COUNT; |
10587 | return (ASC_MAX_PCI_DMA_COUNT); | 11155 | return ASC_MAX_PCI_DMA_COUNT; |
10588 | } | 11156 | } |
10589 | 11157 | ||
10590 | #ifdef CONFIG_ISA | 11158 | #ifdef CONFIG_ISA |
10591 | static ushort __init AscGetIsaDmaChannel(PortAddr iop_base) | 11159 | static ushort __devinit AscGetIsaDmaChannel(PortAddr iop_base) |
10592 | { | 11160 | { |
10593 | ushort channel; | 11161 | ushort channel; |
10594 | 11162 | ||
@@ -10600,7 +11168,7 @@ static ushort __init AscGetIsaDmaChannel(PortAddr iop_base) | |||
10600 | return (channel + 4); | 11168 | return (channel + 4); |
10601 | } | 11169 | } |
10602 | 11170 | ||
10603 | static ushort __init AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel) | 11171 | static ushort __devinit AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel) |
10604 | { | 11172 | { |
10605 | ushort cfg_lsw; | 11173 | ushort cfg_lsw; |
10606 | uchar value; | 11174 | uchar value; |
@@ -10615,19 +11183,10 @@ static ushort __init AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel) | |||
10615 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 11183 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
10616 | return (AscGetIsaDmaChannel(iop_base)); | 11184 | return (AscGetIsaDmaChannel(iop_base)); |
10617 | } | 11185 | } |
10618 | return (0); | 11186 | return 0; |
10619 | } | ||
10620 | |||
10621 | static uchar __init AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value) | ||
10622 | { | ||
10623 | speed_value &= 0x07; | ||
10624 | AscSetBank(iop_base, 1); | ||
10625 | AscWriteChipDmaSpeed(iop_base, speed_value); | ||
10626 | AscSetBank(iop_base, 0); | ||
10627 | return (AscGetIsaDmaSpeed(iop_base)); | ||
10628 | } | 11187 | } |
10629 | 11188 | ||
10630 | static uchar __init AscGetIsaDmaSpeed(PortAddr iop_base) | 11189 | static uchar __devinit AscGetIsaDmaSpeed(PortAddr iop_base) |
10631 | { | 11190 | { |
10632 | uchar speed_value; | 11191 | uchar speed_value; |
10633 | 11192 | ||
@@ -10635,223 +11194,20 @@ static uchar __init AscGetIsaDmaSpeed(PortAddr iop_base) | |||
10635 | speed_value = AscReadChipDmaSpeed(iop_base); | 11194 | speed_value = AscReadChipDmaSpeed(iop_base); |
10636 | speed_value &= 0x07; | 11195 | speed_value &= 0x07; |
10637 | AscSetBank(iop_base, 0); | 11196 | AscSetBank(iop_base, 0); |
10638 | return (speed_value); | 11197 | return speed_value; |
10639 | } | 11198 | } |
10640 | #endif /* CONFIG_ISA */ | ||
10641 | 11199 | ||
10642 | static ushort __init | 11200 | static uchar __devinit AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value) |
10643 | AscReadPCIConfigWord(ASC_DVC_VAR *asc_dvc, ushort pci_config_offset) | ||
10644 | { | 11201 | { |
10645 | uchar lsb, msb; | 11202 | speed_value &= 0x07; |
10646 | 11203 | AscSetBank(iop_base, 1); | |
10647 | lsb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset); | 11204 | AscWriteChipDmaSpeed(iop_base, speed_value); |
10648 | msb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset + 1); | 11205 | AscSetBank(iop_base, 0); |
10649 | return ((ushort)((msb << 8) | lsb)); | 11206 | return AscGetIsaDmaSpeed(iop_base); |
10650 | } | ||
10651 | |||
10652 | static ushort __init AscInitGetConfig(ASC_DVC_VAR *asc_dvc) | ||
10653 | { | ||
10654 | ushort warn_code; | ||
10655 | PortAddr iop_base; | ||
10656 | ushort PCIDeviceID; | ||
10657 | ushort PCIVendorID; | ||
10658 | uchar PCIRevisionID; | ||
10659 | uchar prevCmdRegBits; | ||
10660 | |||
10661 | warn_code = 0; | ||
10662 | iop_base = asc_dvc->iop_base; | ||
10663 | asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG; | ||
10664 | if (asc_dvc->err_code != 0) { | ||
10665 | return (UW_ERR); | ||
10666 | } | ||
10667 | if (asc_dvc->bus_type == ASC_IS_PCI) { | ||
10668 | PCIVendorID = AscReadPCIConfigWord(asc_dvc, | ||
10669 | AscPCIConfigVendorIDRegister); | ||
10670 | |||
10671 | PCIDeviceID = AscReadPCIConfigWord(asc_dvc, | ||
10672 | AscPCIConfigDeviceIDRegister); | ||
10673 | |||
10674 | PCIRevisionID = DvcReadPCIConfigByte(asc_dvc, | ||
10675 | AscPCIConfigRevisionIDRegister); | ||
10676 | |||
10677 | if (PCIVendorID != PCI_VENDOR_ID_ASP) { | ||
10678 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
10679 | } | ||
10680 | prevCmdRegBits = DvcReadPCIConfigByte(asc_dvc, | ||
10681 | AscPCIConfigCommandRegister); | ||
10682 | |||
10683 | if ((prevCmdRegBits & AscPCICmdRegBits_IOMemBusMaster) != | ||
10684 | AscPCICmdRegBits_IOMemBusMaster) { | ||
10685 | DvcWritePCIConfigByte(asc_dvc, | ||
10686 | AscPCIConfigCommandRegister, | ||
10687 | (prevCmdRegBits | | ||
10688 | AscPCICmdRegBits_IOMemBusMaster)); | ||
10689 | |||
10690 | if ((DvcReadPCIConfigByte(asc_dvc, | ||
10691 | AscPCIConfigCommandRegister) | ||
10692 | & AscPCICmdRegBits_IOMemBusMaster) | ||
10693 | != AscPCICmdRegBits_IOMemBusMaster) { | ||
10694 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
10695 | } | ||
10696 | } | ||
10697 | if ((PCIDeviceID == PCI_DEVICE_ID_ASP_1200A) || | ||
10698 | (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940)) { | ||
10699 | DvcWritePCIConfigByte(asc_dvc, | ||
10700 | AscPCIConfigLatencyTimer, 0x00); | ||
10701 | if (DvcReadPCIConfigByte | ||
10702 | (asc_dvc, AscPCIConfigLatencyTimer) | ||
10703 | != 0x00) { | ||
10704 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
10705 | } | ||
10706 | } else if (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940U) { | ||
10707 | if (DvcReadPCIConfigByte(asc_dvc, | ||
10708 | AscPCIConfigLatencyTimer) < | ||
10709 | 0x20) { | ||
10710 | DvcWritePCIConfigByte(asc_dvc, | ||
10711 | AscPCIConfigLatencyTimer, | ||
10712 | 0x20); | ||
10713 | |||
10714 | if (DvcReadPCIConfigByte(asc_dvc, | ||
10715 | AscPCIConfigLatencyTimer) | ||
10716 | < 0x20) { | ||
10717 | warn_code |= | ||
10718 | ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
10719 | } | ||
10720 | } | ||
10721 | } | ||
10722 | } | ||
10723 | |||
10724 | if (AscFindSignature(iop_base)) { | ||
10725 | warn_code |= AscInitAscDvcVar(asc_dvc); | ||
10726 | warn_code |= AscInitFromEEP(asc_dvc); | ||
10727 | asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG; | ||
10728 | if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) { | ||
10729 | asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; | ||
10730 | } | ||
10731 | } else { | ||
10732 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
10733 | } | ||
10734 | return (warn_code); | ||
10735 | } | ||
10736 | |||
10737 | static ushort __init AscInitSetConfig(ASC_DVC_VAR *asc_dvc) | ||
10738 | { | ||
10739 | ushort warn_code = 0; | ||
10740 | |||
10741 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG; | ||
10742 | if (asc_dvc->err_code != 0) | ||
10743 | return (UW_ERR); | ||
10744 | if (AscFindSignature(asc_dvc->iop_base)) { | ||
10745 | warn_code |= AscInitFromAscDvcVar(asc_dvc); | ||
10746 | asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG; | ||
10747 | } else { | ||
10748 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
10749 | } | ||
10750 | return (warn_code); | ||
10751 | } | 11207 | } |
10752 | |||
10753 | static ushort __init AscInitFromAscDvcVar(ASC_DVC_VAR *asc_dvc) | ||
10754 | { | ||
10755 | PortAddr iop_base; | ||
10756 | ushort cfg_msw; | ||
10757 | ushort warn_code; | ||
10758 | ushort pci_device_id = 0; | ||
10759 | |||
10760 | iop_base = asc_dvc->iop_base; | ||
10761 | #ifdef CONFIG_PCI | ||
10762 | if (asc_dvc->cfg->dev) | ||
10763 | pci_device_id = to_pci_dev(asc_dvc->cfg->dev)->device; | ||
10764 | #endif | ||
10765 | warn_code = 0; | ||
10766 | cfg_msw = AscGetChipCfgMsw(iop_base); | ||
10767 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { | ||
10768 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); | ||
10769 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | ||
10770 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
10771 | } | ||
10772 | if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) != | ||
10773 | asc_dvc->cfg->cmd_qng_enabled) { | ||
10774 | asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled; | ||
10775 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; | ||
10776 | } | ||
10777 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { | ||
10778 | warn_code |= ASC_WARN_AUTO_CONFIG; | ||
10779 | } | ||
10780 | if ((asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) { | ||
10781 | if (AscSetChipIRQ(iop_base, asc_dvc->irq_no, asc_dvc->bus_type) | ||
10782 | != asc_dvc->irq_no) { | ||
10783 | asc_dvc->err_code |= ASC_IERR_SET_IRQ_NO; | ||
10784 | } | ||
10785 | } | ||
10786 | if (asc_dvc->bus_type & ASC_IS_PCI) { | ||
10787 | cfg_msw &= 0xFFC0; | ||
10788 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
10789 | if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) { | ||
10790 | } else { | ||
10791 | if ((pci_device_id == PCI_DEVICE_ID_ASP_1200A) || | ||
10792 | (pci_device_id == PCI_DEVICE_ID_ASP_ABP940)) { | ||
10793 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB; | ||
10794 | asc_dvc->bug_fix_cntl |= | ||
10795 | ASC_BUG_FIX_ASYN_USE_SYN; | ||
10796 | } | ||
10797 | } | ||
10798 | } else if (asc_dvc->bus_type == ASC_IS_ISAPNP) { | ||
10799 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) | ||
10800 | == ASC_CHIP_VER_ASYN_BUG) { | ||
10801 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN; | ||
10802 | } | ||
10803 | } | ||
10804 | if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) != | ||
10805 | asc_dvc->cfg->chip_scsi_id) { | ||
10806 | asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID; | ||
10807 | } | ||
10808 | #ifdef CONFIG_ISA | ||
10809 | if (asc_dvc->bus_type & ASC_IS_ISA) { | ||
10810 | AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel); | ||
10811 | AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed); | ||
10812 | } | ||
10813 | #endif /* CONFIG_ISA */ | 11208 | #endif /* CONFIG_ISA */ |
10814 | return (warn_code); | ||
10815 | } | ||
10816 | |||
10817 | static ushort AscInitAsc1000Driver(ASC_DVC_VAR *asc_dvc) | ||
10818 | { | ||
10819 | ushort warn_code; | ||
10820 | PortAddr iop_base; | ||
10821 | |||
10822 | iop_base = asc_dvc->iop_base; | ||
10823 | warn_code = 0; | ||
10824 | if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) && | ||
10825 | !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) { | ||
10826 | AscResetChipAndScsiBus(asc_dvc); | ||
10827 | DvcSleepMilliSecond((ASC_DCNT) | ||
10828 | ((ushort)asc_dvc->scsi_reset_wait * 1000)); | ||
10829 | } | ||
10830 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC; | ||
10831 | if (asc_dvc->err_code != 0) | ||
10832 | return (UW_ERR); | ||
10833 | if (!AscFindSignature(asc_dvc->iop_base)) { | ||
10834 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
10835 | return (warn_code); | ||
10836 | } | ||
10837 | AscDisableInterrupt(iop_base); | ||
10838 | warn_code |= AscInitLram(asc_dvc); | ||
10839 | if (asc_dvc->err_code != 0) | ||
10840 | return (UW_ERR); | ||
10841 | ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n", | ||
10842 | (ulong)_asc_mcode_chksum); | ||
10843 | if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf, | ||
10844 | _asc_mcode_size) != _asc_mcode_chksum) { | ||
10845 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
10846 | return (warn_code); | ||
10847 | } | ||
10848 | warn_code |= AscInitMicroCodeVar(asc_dvc); | ||
10849 | asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC; | ||
10850 | AscEnableInterrupt(iop_base); | ||
10851 | return (warn_code); | ||
10852 | } | ||
10853 | 11209 | ||
10854 | static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) | 11210 | static ushort __devinit AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) |
10855 | { | 11211 | { |
10856 | int i; | 11212 | int i; |
10857 | PortAddr iop_base; | 11213 | PortAddr iop_base; |
@@ -10882,7 +11238,7 @@ static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) | |||
10882 | asc_dvc->queue_full_or_busy = 0; | 11238 | asc_dvc->queue_full_or_busy = 0; |
10883 | asc_dvc->redo_scam = 0; | 11239 | asc_dvc->redo_scam = 0; |
10884 | asc_dvc->res2 = 0; | 11240 | asc_dvc->res2 = 0; |
10885 | asc_dvc->host_init_sdtr_index = 0; | 11241 | asc_dvc->min_sdtr_index = 0; |
10886 | asc_dvc->cfg->can_tagged_qng = 0; | 11242 | asc_dvc->cfg->can_tagged_qng = 0; |
10887 | asc_dvc->cfg->cmd_qng_enabled = 0; | 11243 | asc_dvc->cfg->cmd_qng_enabled = 0; |
10888 | asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL; | 11244 | asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL; |
@@ -10894,39 +11250,14 @@ static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) | |||
10894 | asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET; | 11250 | asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET; |
10895 | asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET; | 11251 | asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET; |
10896 | asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID; | 11252 | asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID; |
10897 | asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER; | ||
10898 | asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) | | ||
10899 | ASC_LIB_VERSION_MINOR; | ||
10900 | chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type); | 11253 | chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type); |
10901 | asc_dvc->cfg->chip_version = chip_version; | 11254 | asc_dvc->cfg->chip_version = chip_version; |
10902 | asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0; | 11255 | asc_dvc->sdtr_period_tbl = asc_syn_xfer_period; |
10903 | asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1; | ||
10904 | asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2; | ||
10905 | asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3; | ||
10906 | asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4; | ||
10907 | asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5; | ||
10908 | asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6; | ||
10909 | asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7; | ||
10910 | asc_dvc->max_sdtr_index = 7; | 11256 | asc_dvc->max_sdtr_index = 7; |
10911 | if ((asc_dvc->bus_type & ASC_IS_PCI) && | 11257 | if ((asc_dvc->bus_type & ASC_IS_PCI) && |
10912 | (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) { | 11258 | (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) { |
10913 | asc_dvc->bus_type = ASC_IS_PCI_ULTRA; | 11259 | asc_dvc->bus_type = ASC_IS_PCI_ULTRA; |
10914 | asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0; | 11260 | asc_dvc->sdtr_period_tbl = asc_syn_ultra_xfer_period; |
10915 | asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1; | ||
10916 | asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2; | ||
10917 | asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3; | ||
10918 | asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4; | ||
10919 | asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5; | ||
10920 | asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6; | ||
10921 | asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7; | ||
10922 | asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8; | ||
10923 | asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9; | ||
10924 | asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10; | ||
10925 | asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11; | ||
10926 | asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12; | ||
10927 | asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13; | ||
10928 | asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14; | ||
10929 | asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15; | ||
10930 | asc_dvc->max_sdtr_index = 15; | 11261 | asc_dvc->max_sdtr_index = 15; |
10931 | if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) { | 11262 | if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) { |
10932 | AscSetExtraControl(iop_base, | 11263 | AscSetExtraControl(iop_base, |
@@ -10943,12 +11274,12 @@ static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) | |||
10943 | } | 11274 | } |
10944 | 11275 | ||
10945 | asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED; | 11276 | asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED; |
10946 | if (AscGetChipBusType(iop_base) == ASC_IS_ISAPNP) { | ||
10947 | AscSetChipIFC(iop_base, IFC_INIT_DEFAULT); | ||
10948 | asc_dvc->bus_type = ASC_IS_ISAPNP; | ||
10949 | } | ||
10950 | #ifdef CONFIG_ISA | 11277 | #ifdef CONFIG_ISA |
10951 | if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) { | 11278 | if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) { |
11279 | if (chip_version >= ASC_CHIP_MIN_VER_ISA_PNP) { | ||
11280 | AscSetChipIFC(iop_base, IFC_INIT_DEFAULT); | ||
11281 | asc_dvc->bus_type = ASC_IS_ISAPNP; | ||
11282 | } | ||
10952 | asc_dvc->cfg->isa_dma_channel = | 11283 | asc_dvc->cfg->isa_dma_channel = |
10953 | (uchar)AscGetIsaDmaChannel(iop_base); | 11284 | (uchar)AscGetIsaDmaChannel(iop_base); |
10954 | } | 11285 | } |
@@ -10960,231 +11291,92 @@ static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) | |||
10960 | asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *)0L; | 11291 | asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *)0L; |
10961 | asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG; | 11292 | asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG; |
10962 | } | 11293 | } |
10963 | return (warn_code); | 11294 | return warn_code; |
10964 | } | 11295 | } |
10965 | 11296 | ||
10966 | static ushort __init AscInitFromEEP(ASC_DVC_VAR *asc_dvc) | 11297 | static int __devinit AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) |
10967 | { | 11298 | { |
10968 | ASCEEP_CONFIG eep_config_buf; | 11299 | int retry; |
10969 | ASCEEP_CONFIG *eep_config; | ||
10970 | PortAddr iop_base; | ||
10971 | ushort chksum; | ||
10972 | ushort warn_code; | ||
10973 | ushort cfg_msw, cfg_lsw; | ||
10974 | int i; | ||
10975 | int write_eep = 0; | ||
10976 | |||
10977 | iop_base = asc_dvc->iop_base; | ||
10978 | warn_code = 0; | ||
10979 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE); | ||
10980 | AscStopQueueExe(iop_base); | ||
10981 | if ((AscStopChip(iop_base) == FALSE) || | ||
10982 | (AscGetChipScsiCtrl(iop_base) != 0)) { | ||
10983 | asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE; | ||
10984 | AscResetChipAndScsiBus(asc_dvc); | ||
10985 | DvcSleepMilliSecond((ASC_DCNT) | ||
10986 | ((ushort)asc_dvc->scsi_reset_wait * 1000)); | ||
10987 | } | ||
10988 | if (AscIsChipHalted(iop_base) == FALSE) { | ||
10989 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | ||
10990 | return (warn_code); | ||
10991 | } | ||
10992 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | ||
10993 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | ||
10994 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | ||
10995 | return (warn_code); | ||
10996 | } | ||
10997 | eep_config = (ASCEEP_CONFIG *)&eep_config_buf; | ||
10998 | cfg_msw = AscGetChipCfgMsw(iop_base); | ||
10999 | cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
11000 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { | ||
11001 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); | ||
11002 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | ||
11003 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
11004 | } | ||
11005 | chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type); | ||
11006 | ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum); | ||
11007 | if (chksum == 0) { | ||
11008 | chksum = 0xaa55; | ||
11009 | } | ||
11010 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { | ||
11011 | warn_code |= ASC_WARN_AUTO_CONFIG; | ||
11012 | if (asc_dvc->cfg->chip_version == 3) { | ||
11013 | if (eep_config->cfg_lsw != cfg_lsw) { | ||
11014 | warn_code |= ASC_WARN_EEPROM_RECOVER; | ||
11015 | eep_config->cfg_lsw = | ||
11016 | AscGetChipCfgLsw(iop_base); | ||
11017 | } | ||
11018 | if (eep_config->cfg_msw != cfg_msw) { | ||
11019 | warn_code |= ASC_WARN_EEPROM_RECOVER; | ||
11020 | eep_config->cfg_msw = | ||
11021 | AscGetChipCfgMsw(iop_base); | ||
11022 | } | ||
11023 | } | ||
11024 | } | ||
11025 | eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; | ||
11026 | eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON; | ||
11027 | ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n", | ||
11028 | eep_config->chksum); | ||
11029 | if (chksum != eep_config->chksum) { | ||
11030 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) == | ||
11031 | ASC_CHIP_VER_PCI_ULTRA_3050) { | ||
11032 | ASC_DBG(1, | ||
11033 | "AscInitFromEEP: chksum error ignored; EEPROM-less board\n"); | ||
11034 | eep_config->init_sdtr = 0xFF; | ||
11035 | eep_config->disc_enable = 0xFF; | ||
11036 | eep_config->start_motor = 0xFF; | ||
11037 | eep_config->use_cmd_qng = 0; | ||
11038 | eep_config->max_total_qng = 0xF0; | ||
11039 | eep_config->max_tag_qng = 0x20; | ||
11040 | eep_config->cntl = 0xBFFF; | ||
11041 | ASC_EEP_SET_CHIP_ID(eep_config, 7); | ||
11042 | eep_config->no_scam = 0; | ||
11043 | eep_config->adapter_info[0] = 0; | ||
11044 | eep_config->adapter_info[1] = 0; | ||
11045 | eep_config->adapter_info[2] = 0; | ||
11046 | eep_config->adapter_info[3] = 0; | ||
11047 | eep_config->adapter_info[4] = 0; | ||
11048 | /* Indicate EEPROM-less board. */ | ||
11049 | eep_config->adapter_info[5] = 0xBB; | ||
11050 | } else { | ||
11051 | ASC_PRINT | ||
11052 | ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n"); | ||
11053 | write_eep = 1; | ||
11054 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
11055 | } | ||
11056 | } | ||
11057 | asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr; | ||
11058 | asc_dvc->cfg->disc_enable = eep_config->disc_enable; | ||
11059 | asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng; | ||
11060 | asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config); | ||
11061 | asc_dvc->start_motor = eep_config->start_motor; | ||
11062 | asc_dvc->dvc_cntl = eep_config->cntl; | ||
11063 | asc_dvc->no_scam = eep_config->no_scam; | ||
11064 | asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0]; | ||
11065 | asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1]; | ||
11066 | asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2]; | ||
11067 | asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3]; | ||
11068 | asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4]; | ||
11069 | asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5]; | ||
11070 | if (!AscTestExternalLram(asc_dvc)) { | ||
11071 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == | ||
11072 | ASC_IS_PCI_ULTRA)) { | ||
11073 | eep_config->max_total_qng = | ||
11074 | ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG; | ||
11075 | eep_config->max_tag_qng = | ||
11076 | ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG; | ||
11077 | } else { | ||
11078 | eep_config->cfg_msw |= 0x0800; | ||
11079 | cfg_msw |= 0x0800; | ||
11080 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
11081 | eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG; | ||
11082 | eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG; | ||
11083 | } | ||
11084 | } else { | ||
11085 | } | ||
11086 | if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) { | ||
11087 | eep_config->max_total_qng = ASC_MIN_TOTAL_QNG; | ||
11088 | } | ||
11089 | if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) { | ||
11090 | eep_config->max_total_qng = ASC_MAX_TOTAL_QNG; | ||
11091 | } | ||
11092 | if (eep_config->max_tag_qng > eep_config->max_total_qng) { | ||
11093 | eep_config->max_tag_qng = eep_config->max_total_qng; | ||
11094 | } | ||
11095 | if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) { | ||
11096 | eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC; | ||
11097 | } | ||
11098 | asc_dvc->max_total_qng = eep_config->max_total_qng; | ||
11099 | if ((eep_config->use_cmd_qng & eep_config->disc_enable) != | ||
11100 | eep_config->use_cmd_qng) { | ||
11101 | eep_config->disc_enable = eep_config->use_cmd_qng; | ||
11102 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; | ||
11103 | } | ||
11104 | if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) { | ||
11105 | asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type); | ||
11106 | } | ||
11107 | ASC_EEP_SET_CHIP_ID(eep_config, | ||
11108 | ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID); | ||
11109 | asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config); | ||
11110 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) && | ||
11111 | !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) { | ||
11112 | asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX; | ||
11113 | } | ||
11114 | 11300 | ||
11115 | for (i = 0; i <= ASC_MAX_TID; i++) { | 11301 | for (retry = 0; retry < ASC_EEP_MAX_RETRY; retry++) { |
11116 | asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i]; | 11302 | unsigned char read_back; |
11117 | asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng; | 11303 | AscSetChipEEPCmd(iop_base, cmd_reg); |
11118 | asc_dvc->cfg->sdtr_period_offset[i] = | 11304 | mdelay(1); |
11119 | (uchar)(ASC_DEF_SDTR_OFFSET | | 11305 | read_back = AscGetChipEEPCmd(iop_base); |
11120 | (asc_dvc->host_init_sdtr_index << 4)); | 11306 | if (read_back == cmd_reg) |
11121 | } | 11307 | return 1; |
11122 | eep_config->cfg_msw = AscGetChipCfgMsw(iop_base); | ||
11123 | if (write_eep) { | ||
11124 | if ((i = | ||
11125 | AscSetEEPConfig(iop_base, eep_config, | ||
11126 | asc_dvc->bus_type)) != 0) { | ||
11127 | ASC_PRINT1 | ||
11128 | ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n", | ||
11129 | i); | ||
11130 | } else { | ||
11131 | ASC_PRINT | ||
11132 | ("AscInitFromEEP: Successfully re-wrote EEPROM.\n"); | ||
11133 | } | ||
11134 | } | 11308 | } |
11135 | return (warn_code); | 11309 | return 0; |
11136 | } | 11310 | } |
11137 | 11311 | ||
11138 | static ushort AscInitMicroCodeVar(ASC_DVC_VAR *asc_dvc) | 11312 | static void __devinit AscWaitEEPRead(void) |
11139 | { | 11313 | { |
11140 | int i; | 11314 | mdelay(1); |
11141 | ushort warn_code; | 11315 | } |
11142 | PortAddr iop_base; | ||
11143 | ASC_PADDR phy_addr; | ||
11144 | ASC_DCNT phy_size; | ||
11145 | |||
11146 | iop_base = asc_dvc->iop_base; | ||
11147 | warn_code = 0; | ||
11148 | for (i = 0; i <= ASC_MAX_TID; i++) { | ||
11149 | AscPutMCodeInitSDTRAtID(iop_base, i, | ||
11150 | asc_dvc->cfg->sdtr_period_offset[i] | ||
11151 | ); | ||
11152 | } | ||
11153 | 11316 | ||
11154 | AscInitQLinkVar(asc_dvc); | 11317 | static ushort __devinit AscReadEEPWord(PortAddr iop_base, uchar addr) |
11155 | AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B, | 11318 | { |
11156 | asc_dvc->cfg->disc_enable); | 11319 | ushort read_wval; |
11157 | AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B, | 11320 | uchar cmd_reg; |
11158 | ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id)); | ||
11159 | 11321 | ||
11160 | /* Align overrun buffer on an 8 byte boundary. */ | 11322 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); |
11161 | phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf); | 11323 | AscWaitEEPRead(); |
11162 | phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7); | 11324 | cmd_reg = addr | ASC_EEP_CMD_READ; |
11163 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D, | 11325 | AscWriteEEPCmdReg(iop_base, cmd_reg); |
11164 | (uchar *)&phy_addr, 1); | 11326 | AscWaitEEPRead(); |
11165 | phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8); | 11327 | read_wval = AscGetChipEEPData(iop_base); |
11166 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D, | 11328 | AscWaitEEPRead(); |
11167 | (uchar *)&phy_size, 1); | 11329 | return read_wval; |
11330 | } | ||
11168 | 11331 | ||
11169 | asc_dvc->cfg->mcode_date = | 11332 | static ushort __devinit |
11170 | AscReadLramWord(iop_base, (ushort)ASCV_MC_DATE_W); | 11333 | AscGetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
11171 | asc_dvc->cfg->mcode_version = | 11334 | { |
11172 | AscReadLramWord(iop_base, (ushort)ASCV_MC_VER_W); | 11335 | ushort wval; |
11336 | ushort sum; | ||
11337 | ushort *wbuf; | ||
11338 | int cfg_beg; | ||
11339 | int cfg_end; | ||
11340 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; | ||
11341 | int s_addr; | ||
11173 | 11342 | ||
11174 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | 11343 | wbuf = (ushort *)cfg_buf; |
11175 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | 11344 | sum = 0; |
11176 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | 11345 | /* Read two config words; Byte-swapping done by AscReadEEPWord(). */ |
11177 | return (warn_code); | 11346 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { |
11347 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); | ||
11348 | sum += *wbuf; | ||
11178 | } | 11349 | } |
11179 | if (AscStartChip(iop_base) != 1) { | 11350 | if (bus_type & ASC_IS_VL) { |
11180 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | 11351 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; |
11181 | return (warn_code); | 11352 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; |
11353 | } else { | ||
11354 | cfg_beg = ASC_EEP_DVC_CFG_BEG; | ||
11355 | cfg_end = ASC_EEP_MAX_DVC_ADDR; | ||
11182 | } | 11356 | } |
11183 | 11357 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { | |
11184 | return (warn_code); | 11358 | wval = AscReadEEPWord(iop_base, (uchar)s_addr); |
11359 | if (s_addr <= uchar_end_in_config) { | ||
11360 | /* | ||
11361 | * Swap all char fields - must unswap bytes already swapped | ||
11362 | * by AscReadEEPWord(). | ||
11363 | */ | ||
11364 | *wbuf = le16_to_cpu(wval); | ||
11365 | } else { | ||
11366 | /* Don't swap word field at the end - cntl field. */ | ||
11367 | *wbuf = wval; | ||
11368 | } | ||
11369 | sum += wval; /* Checksum treats all EEPROM data as words. */ | ||
11370 | } | ||
11371 | /* | ||
11372 | * Read the checksum word which will be compared against 'sum' | ||
11373 | * by the caller. Word field already swapped. | ||
11374 | */ | ||
11375 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); | ||
11376 | return sum; | ||
11185 | } | 11377 | } |
11186 | 11378 | ||
11187 | static int __init AscTestExternalLram(ASC_DVC_VAR *asc_dvc) | 11379 | static int __devinit AscTestExternalLram(ASC_DVC_VAR *asc_dvc) |
11188 | { | 11380 | { |
11189 | PortAddr iop_base; | 11381 | PortAddr iop_base; |
11190 | ushort q_addr; | 11382 | ushort q_addr; |
@@ -11197,7 +11389,7 @@ static int __init AscTestExternalLram(ASC_DVC_VAR *asc_dvc) | |||
11197 | saved_word = AscReadLramWord(iop_base, q_addr); | 11389 | saved_word = AscReadLramWord(iop_base, q_addr); |
11198 | AscSetChipLramAddr(iop_base, q_addr); | 11390 | AscSetChipLramAddr(iop_base, q_addr); |
11199 | AscSetChipLramData(iop_base, 0x55AA); | 11391 | AscSetChipLramData(iop_base, 0x55AA); |
11200 | DvcSleepMilliSecond(10); | 11392 | mdelay(10); |
11201 | AscSetChipLramAddr(iop_base, q_addr); | 11393 | AscSetChipLramAddr(iop_base, q_addr); |
11202 | if (AscGetChipLramData(iop_base) == 0x55AA) { | 11394 | if (AscGetChipLramData(iop_base) == 0x55AA) { |
11203 | sta = 1; | 11395 | sta = 1; |
@@ -11206,26 +11398,12 @@ static int __init AscTestExternalLram(ASC_DVC_VAR *asc_dvc) | |||
11206 | return (sta); | 11398 | return (sta); |
11207 | } | 11399 | } |
11208 | 11400 | ||
11209 | static int __init AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) | 11401 | static void __devinit AscWaitEEPWrite(void) |
11210 | { | 11402 | { |
11211 | uchar read_back; | 11403 | mdelay(20); |
11212 | int retry; | ||
11213 | |||
11214 | retry = 0; | ||
11215 | while (TRUE) { | ||
11216 | AscSetChipEEPCmd(iop_base, cmd_reg); | ||
11217 | DvcSleepMilliSecond(1); | ||
11218 | read_back = AscGetChipEEPCmd(iop_base); | ||
11219 | if (read_back == cmd_reg) { | ||
11220 | return (1); | ||
11221 | } | ||
11222 | if (retry++ > ASC_EEP_MAX_RETRY) { | ||
11223 | return (0); | ||
11224 | } | ||
11225 | } | ||
11226 | } | 11404 | } |
11227 | 11405 | ||
11228 | static int __init AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg) | 11406 | static int __devinit AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg) |
11229 | { | 11407 | { |
11230 | ushort read_back; | 11408 | ushort read_back; |
11231 | int retry; | 11409 | int retry; |
@@ -11233,7 +11411,7 @@ static int __init AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg) | |||
11233 | retry = 0; | 11411 | retry = 0; |
11234 | while (TRUE) { | 11412 | while (TRUE) { |
11235 | AscSetChipEEPData(iop_base, data_reg); | 11413 | AscSetChipEEPData(iop_base, data_reg); |
11236 | DvcSleepMilliSecond(1); | 11414 | mdelay(1); |
11237 | read_back = AscGetChipEEPData(iop_base); | 11415 | read_back = AscGetChipEEPData(iop_base); |
11238 | if (read_back == data_reg) { | 11416 | if (read_back == data_reg) { |
11239 | return (1); | 11417 | return (1); |
@@ -11244,34 +11422,7 @@ static int __init AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg) | |||
11244 | } | 11422 | } |
11245 | } | 11423 | } |
11246 | 11424 | ||
11247 | static void __init AscWaitEEPRead(void) | 11425 | static ushort __devinit |
11248 | { | ||
11249 | DvcSleepMilliSecond(1); | ||
11250 | return; | ||
11251 | } | ||
11252 | |||
11253 | static void __init AscWaitEEPWrite(void) | ||
11254 | { | ||
11255 | DvcSleepMilliSecond(20); | ||
11256 | return; | ||
11257 | } | ||
11258 | |||
11259 | static ushort __init AscReadEEPWord(PortAddr iop_base, uchar addr) | ||
11260 | { | ||
11261 | ushort read_wval; | ||
11262 | uchar cmd_reg; | ||
11263 | |||
11264 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); | ||
11265 | AscWaitEEPRead(); | ||
11266 | cmd_reg = addr | ASC_EEP_CMD_READ; | ||
11267 | AscWriteEEPCmdReg(iop_base, cmd_reg); | ||
11268 | AscWaitEEPRead(); | ||
11269 | read_wval = AscGetChipEEPData(iop_base); | ||
11270 | AscWaitEEPRead(); | ||
11271 | return (read_wval); | ||
11272 | } | ||
11273 | |||
11274 | static ushort __init | ||
11275 | AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val) | 11426 | AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val) |
11276 | { | 11427 | { |
11277 | ushort read_wval; | 11428 | ushort read_wval; |
@@ -11292,54 +11443,7 @@ AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val) | |||
11292 | return (read_wval); | 11443 | return (read_wval); |
11293 | } | 11444 | } |
11294 | 11445 | ||
11295 | static ushort __init | 11446 | static int __devinit |
11296 | AscGetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) | ||
11297 | { | ||
11298 | ushort wval; | ||
11299 | ushort sum; | ||
11300 | ushort *wbuf; | ||
11301 | int cfg_beg; | ||
11302 | int cfg_end; | ||
11303 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; | ||
11304 | int s_addr; | ||
11305 | |||
11306 | wbuf = (ushort *)cfg_buf; | ||
11307 | sum = 0; | ||
11308 | /* Read two config words; Byte-swapping done by AscReadEEPWord(). */ | ||
11309 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { | ||
11310 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); | ||
11311 | sum += *wbuf; | ||
11312 | } | ||
11313 | if (bus_type & ASC_IS_VL) { | ||
11314 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; | ||
11315 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; | ||
11316 | } else { | ||
11317 | cfg_beg = ASC_EEP_DVC_CFG_BEG; | ||
11318 | cfg_end = ASC_EEP_MAX_DVC_ADDR; | ||
11319 | } | ||
11320 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { | ||
11321 | wval = AscReadEEPWord(iop_base, (uchar)s_addr); | ||
11322 | if (s_addr <= uchar_end_in_config) { | ||
11323 | /* | ||
11324 | * Swap all char fields - must unswap bytes already swapped | ||
11325 | * by AscReadEEPWord(). | ||
11326 | */ | ||
11327 | *wbuf = le16_to_cpu(wval); | ||
11328 | } else { | ||
11329 | /* Don't swap word field at the end - cntl field. */ | ||
11330 | *wbuf = wval; | ||
11331 | } | ||
11332 | sum += wval; /* Checksum treats all EEPROM data as words. */ | ||
11333 | } | ||
11334 | /* | ||
11335 | * Read the checksum word which will be compared against 'sum' | ||
11336 | * by the caller. Word field already swapped. | ||
11337 | */ | ||
11338 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); | ||
11339 | return (sum); | ||
11340 | } | ||
11341 | |||
11342 | static int __init | ||
11343 | AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) | 11447 | AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
11344 | { | 11448 | { |
11345 | int n_error; | 11449 | int n_error; |
@@ -11432,10 +11536,10 @@ AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) | |||
11432 | if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) { | 11536 | if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) { |
11433 | n_error++; | 11537 | n_error++; |
11434 | } | 11538 | } |
11435 | return (n_error); | 11539 | return n_error; |
11436 | } | 11540 | } |
11437 | 11541 | ||
11438 | static int __init | 11542 | static int __devinit |
11439 | AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) | 11543 | AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
11440 | { | 11544 | { |
11441 | int retry; | 11545 | int retry; |
@@ -11451,2386 +11555,326 @@ AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) | |||
11451 | break; | 11555 | break; |
11452 | } | 11556 | } |
11453 | } | 11557 | } |
11454 | return (n_error); | 11558 | return n_error; |
11455 | } | 11559 | } |
11456 | 11560 | ||
11457 | static void | 11561 | static ushort __devinit AscInitFromEEP(ASC_DVC_VAR *asc_dvc) |
11458 | AscAsyncFix(ASC_DVC_VAR *asc_dvc, uchar tid_no, ASC_SCSI_INQUIRY *inq) | ||
11459 | { | 11562 | { |
11460 | uchar dvc_type; | 11563 | ASCEEP_CONFIG eep_config_buf; |
11461 | ASC_SCSI_BIT_ID_TYPE tid_bits; | 11564 | ASCEEP_CONFIG *eep_config; |
11462 | 11565 | PortAddr iop_base; | |
11463 | dvc_type = ASC_INQ_DVC_TYPE(inq); | 11566 | ushort chksum; |
11464 | tid_bits = ASC_TIX_TO_TARGET_ID(tid_no); | 11567 | ushort warn_code; |
11465 | 11568 | ushort cfg_msw, cfg_lsw; | |
11466 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) { | 11569 | int i; |
11467 | if (!(asc_dvc->init_sdtr & tid_bits)) { | 11570 | int write_eep = 0; |
11468 | if ((dvc_type == TYPE_ROM) && | ||
11469 | (AscCompareString((uchar *)inq->vendor_id, | ||
11470 | (uchar *)"HP ", 3) == 0)) { | ||
11471 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; | ||
11472 | } | ||
11473 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; | ||
11474 | if ((dvc_type == TYPE_PROCESSOR) || | ||
11475 | (dvc_type == TYPE_SCANNER) || | ||
11476 | (dvc_type == TYPE_ROM) || (dvc_type == TYPE_TAPE)) { | ||
11477 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; | ||
11478 | } | ||
11479 | 11571 | ||
11480 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) { | 11572 | iop_base = asc_dvc->iop_base; |
11481 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, | 11573 | warn_code = 0; |
11482 | tid_no, | 11574 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE); |
11483 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); | 11575 | AscStopQueueExe(iop_base); |
11576 | if ((AscStopChip(iop_base) == FALSE) || | ||
11577 | (AscGetChipScsiCtrl(iop_base) != 0)) { | ||
11578 | asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE; | ||
11579 | AscResetChipAndScsiBus(asc_dvc); | ||
11580 | mdelay(asc_dvc->scsi_reset_wait * 1000); /* XXX: msleep? */ | ||
11581 | } | ||
11582 | if (AscIsChipHalted(iop_base) == FALSE) { | ||
11583 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | ||
11584 | return (warn_code); | ||
11585 | } | ||
11586 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | ||
11587 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | ||
11588 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | ||
11589 | return (warn_code); | ||
11590 | } | ||
11591 | eep_config = (ASCEEP_CONFIG *)&eep_config_buf; | ||
11592 | cfg_msw = AscGetChipCfgMsw(iop_base); | ||
11593 | cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
11594 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { | ||
11595 | cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; | ||
11596 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | ||
11597 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
11598 | } | ||
11599 | chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type); | ||
11600 | ASC_DBG(1, "chksum 0x%x\n", chksum); | ||
11601 | if (chksum == 0) { | ||
11602 | chksum = 0xaa55; | ||
11603 | } | ||
11604 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { | ||
11605 | warn_code |= ASC_WARN_AUTO_CONFIG; | ||
11606 | if (asc_dvc->cfg->chip_version == 3) { | ||
11607 | if (eep_config->cfg_lsw != cfg_lsw) { | ||
11608 | warn_code |= ASC_WARN_EEPROM_RECOVER; | ||
11609 | eep_config->cfg_lsw = | ||
11610 | AscGetChipCfgLsw(iop_base); | ||
11611 | } | ||
11612 | if (eep_config->cfg_msw != cfg_msw) { | ||
11613 | warn_code |= ASC_WARN_EEPROM_RECOVER; | ||
11614 | eep_config->cfg_msw = | ||
11615 | AscGetChipCfgMsw(iop_base); | ||
11484 | } | 11616 | } |
11485 | } | 11617 | } |
11486 | } | 11618 | } |
11487 | return; | 11619 | eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; |
11488 | } | 11620 | eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON; |
11489 | 11621 | ASC_DBG(1, "eep_config->chksum 0x%x\n", eep_config->chksum); | |
11490 | static int AscTagQueuingSafe(ASC_SCSI_INQUIRY *inq) | 11622 | if (chksum != eep_config->chksum) { |
11491 | { | 11623 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) == |
11492 | if ((inq->add_len >= 32) && | 11624 | ASC_CHIP_VER_PCI_ULTRA_3050) { |
11493 | (AscCompareString((uchar *)inq->vendor_id, | 11625 | ASC_DBG(1, "chksum error ignored; EEPROM-less board\n"); |
11494 | (uchar *)"QUANTUM XP34301", 15) == 0) && | 11626 | eep_config->init_sdtr = 0xFF; |
11495 | (AscCompareString((uchar *)inq->product_rev_level, | 11627 | eep_config->disc_enable = 0xFF; |
11496 | (uchar *)"1071", 4) == 0)) { | 11628 | eep_config->start_motor = 0xFF; |
11497 | return 0; | 11629 | eep_config->use_cmd_qng = 0; |
11498 | } | 11630 | eep_config->max_total_qng = 0xF0; |
11499 | return 1; | 11631 | eep_config->max_tag_qng = 0x20; |
11500 | } | 11632 | eep_config->cntl = 0xBFFF; |
11501 | 11633 | ASC_EEP_SET_CHIP_ID(eep_config, 7); | |
11502 | static void | 11634 | eep_config->no_scam = 0; |
11503 | AscInquiryHandling(ASC_DVC_VAR *asc_dvc, uchar tid_no, ASC_SCSI_INQUIRY *inq) | 11635 | eep_config->adapter_info[0] = 0; |
11504 | { | 11636 | eep_config->adapter_info[1] = 0; |
11505 | ASC_SCSI_BIT_ID_TYPE tid_bit = ASC_TIX_TO_TARGET_ID(tid_no); | 11637 | eep_config->adapter_info[2] = 0; |
11506 | ASC_SCSI_BIT_ID_TYPE orig_init_sdtr, orig_use_tagged_qng; | 11638 | eep_config->adapter_info[3] = 0; |
11507 | 11639 | eep_config->adapter_info[4] = 0; | |
11508 | orig_init_sdtr = asc_dvc->init_sdtr; | 11640 | /* Indicate EEPROM-less board. */ |
11509 | orig_use_tagged_qng = asc_dvc->use_tagged_qng; | 11641 | eep_config->adapter_info[5] = 0xBB; |
11510 | 11642 | } else { | |
11511 | asc_dvc->init_sdtr &= ~tid_bit; | 11643 | ASC_PRINT |
11512 | asc_dvc->cfg->can_tagged_qng &= ~tid_bit; | 11644 | ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n"); |
11513 | asc_dvc->use_tagged_qng &= ~tid_bit; | 11645 | write_eep = 1; |
11514 | 11646 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | |
11515 | if (ASC_INQ_RESPONSE_FMT(inq) >= 2 || ASC_INQ_ANSI_VER(inq) >= 2) { | ||
11516 | if ((asc_dvc->cfg->sdtr_enable & tid_bit) && ASC_INQ_SYNC(inq)) { | ||
11517 | asc_dvc->init_sdtr |= tid_bit; | ||
11518 | } | 11647 | } |
11519 | if ((asc_dvc->cfg->cmd_qng_enabled & tid_bit) && | 11648 | } |
11520 | ASC_INQ_CMD_QUEUE(inq)) { | 11649 | asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr; |
11521 | if (AscTagQueuingSafe(inq)) { | 11650 | asc_dvc->cfg->disc_enable = eep_config->disc_enable; |
11522 | asc_dvc->use_tagged_qng |= tid_bit; | 11651 | asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng; |
11523 | asc_dvc->cfg->can_tagged_qng |= tid_bit; | 11652 | asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config); |
11524 | } | 11653 | asc_dvc->start_motor = eep_config->start_motor; |
11654 | asc_dvc->dvc_cntl = eep_config->cntl; | ||
11655 | asc_dvc->no_scam = eep_config->no_scam; | ||
11656 | asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0]; | ||
11657 | asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1]; | ||
11658 | asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2]; | ||
11659 | asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3]; | ||
11660 | asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4]; | ||
11661 | asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5]; | ||
11662 | if (!AscTestExternalLram(asc_dvc)) { | ||
11663 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == | ||
11664 | ASC_IS_PCI_ULTRA)) { | ||
11665 | eep_config->max_total_qng = | ||
11666 | ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG; | ||
11667 | eep_config->max_tag_qng = | ||
11668 | ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG; | ||
11669 | } else { | ||
11670 | eep_config->cfg_msw |= 0x0800; | ||
11671 | cfg_msw |= 0x0800; | ||
11672 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
11673 | eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG; | ||
11674 | eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG; | ||
11525 | } | 11675 | } |
11676 | } else { | ||
11526 | } | 11677 | } |
11527 | if (orig_use_tagged_qng != asc_dvc->use_tagged_qng) { | 11678 | if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) { |
11528 | AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B, | 11679 | eep_config->max_total_qng = ASC_MIN_TOTAL_QNG; |
11529 | asc_dvc->cfg->disc_enable); | ||
11530 | AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B, | ||
11531 | asc_dvc->use_tagged_qng); | ||
11532 | AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B, | ||
11533 | asc_dvc->cfg->can_tagged_qng); | ||
11534 | |||
11535 | asc_dvc->max_dvc_qng[tid_no] = | ||
11536 | asc_dvc->cfg->max_tag_qng[tid_no]; | ||
11537 | AscWriteLramByte(asc_dvc->iop_base, | ||
11538 | (ushort)(ASCV_MAX_DVC_QNG_BEG + tid_no), | ||
11539 | asc_dvc->max_dvc_qng[tid_no]); | ||
11540 | } | 11680 | } |
11541 | if (orig_init_sdtr != asc_dvc->init_sdtr) { | 11681 | if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) { |
11542 | AscAsyncFix(asc_dvc, tid_no, inq); | 11682 | eep_config->max_total_qng = ASC_MAX_TOTAL_QNG; |
11543 | } | 11683 | } |
11544 | return; | 11684 | if (eep_config->max_tag_qng > eep_config->max_total_qng) { |
11545 | } | 11685 | eep_config->max_tag_qng = eep_config->max_total_qng; |
11546 | |||
11547 | static int AscCompareString(uchar *str1, uchar *str2, int len) | ||
11548 | { | ||
11549 | int i; | ||
11550 | int diff; | ||
11551 | |||
11552 | for (i = 0; i < len; i++) { | ||
11553 | diff = (int)(str1[i] - str2[i]); | ||
11554 | if (diff != 0) | ||
11555 | return (diff); | ||
11556 | } | 11686 | } |
11557 | return (0); | 11687 | if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) { |
11558 | } | 11688 | eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC; |
11559 | 11689 | } | |
11560 | static uchar AscReadLramByte(PortAddr iop_base, ushort addr) | 11690 | asc_dvc->max_total_qng = eep_config->max_total_qng; |
11561 | { | 11691 | if ((eep_config->use_cmd_qng & eep_config->disc_enable) != |
11562 | uchar byte_data; | 11692 | eep_config->use_cmd_qng) { |
11563 | ushort word_data; | 11693 | eep_config->disc_enable = eep_config->use_cmd_qng; |
11564 | 11694 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; | |
11565 | if (isodd_word(addr)) { | 11695 | } |
11566 | AscSetChipLramAddr(iop_base, addr - 1); | 11696 | ASC_EEP_SET_CHIP_ID(eep_config, |
11567 | word_data = AscGetChipLramData(iop_base); | 11697 | ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID); |
11568 | byte_data = (uchar)((word_data >> 8) & 0xFF); | 11698 | asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config); |
11569 | } else { | 11699 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) && |
11570 | AscSetChipLramAddr(iop_base, addr); | 11700 | !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) { |
11571 | word_data = AscGetChipLramData(iop_base); | 11701 | asc_dvc->min_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX; |
11572 | byte_data = (uchar)(word_data & 0xFF); | ||
11573 | } | 11702 | } |
11574 | return (byte_data); | ||
11575 | } | ||
11576 | |||
11577 | static ushort AscReadLramWord(PortAddr iop_base, ushort addr) | ||
11578 | { | ||
11579 | ushort word_data; | ||
11580 | |||
11581 | AscSetChipLramAddr(iop_base, addr); | ||
11582 | word_data = AscGetChipLramData(iop_base); | ||
11583 | return (word_data); | ||
11584 | } | ||
11585 | |||
11586 | #if CC_VERY_LONG_SG_LIST | ||
11587 | static ASC_DCNT AscReadLramDWord(PortAddr iop_base, ushort addr) | ||
11588 | { | ||
11589 | ushort val_low, val_high; | ||
11590 | ASC_DCNT dword_data; | ||
11591 | 11703 | ||
11592 | AscSetChipLramAddr(iop_base, addr); | 11704 | for (i = 0; i <= ASC_MAX_TID; i++) { |
11593 | val_low = AscGetChipLramData(iop_base); | 11705 | asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i]; |
11594 | val_high = AscGetChipLramData(iop_base); | 11706 | asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng; |
11595 | dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low; | 11707 | asc_dvc->cfg->sdtr_period_offset[i] = |
11596 | return (dword_data); | 11708 | (uchar)(ASC_DEF_SDTR_OFFSET | |
11709 | (asc_dvc->min_sdtr_index << 4)); | ||
11710 | } | ||
11711 | eep_config->cfg_msw = AscGetChipCfgMsw(iop_base); | ||
11712 | if (write_eep) { | ||
11713 | if ((i = AscSetEEPConfig(iop_base, eep_config, | ||
11714 | asc_dvc->bus_type)) != 0) { | ||
11715 | ASC_PRINT1 | ||
11716 | ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n", | ||
11717 | i); | ||
11718 | } else { | ||
11719 | ASC_PRINT | ||
11720 | ("AscInitFromEEP: Successfully re-wrote EEPROM.\n"); | ||
11721 | } | ||
11722 | } | ||
11723 | return (warn_code); | ||
11597 | } | 11724 | } |
11598 | #endif /* CC_VERY_LONG_SG_LIST */ | ||
11599 | 11725 | ||
11600 | static void AscWriteLramWord(PortAddr iop_base, ushort addr, ushort word_val) | 11726 | static int __devinit AscInitGetConfig(struct Scsi_Host *shost) |
11601 | { | 11727 | { |
11602 | AscSetChipLramAddr(iop_base, addr); | 11728 | struct asc_board *board = shost_priv(shost); |
11603 | AscSetChipLramData(iop_base, word_val); | 11729 | ASC_DVC_VAR *asc_dvc = &board->dvc_var.asc_dvc_var; |
11604 | return; | 11730 | unsigned short warn_code = 0; |
11605 | } | ||
11606 | 11731 | ||
11607 | static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val) | 11732 | asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG; |
11608 | { | 11733 | if (asc_dvc->err_code != 0) |
11609 | ushort word_data; | 11734 | return asc_dvc->err_code; |
11610 | 11735 | ||
11611 | if (isodd_word(addr)) { | 11736 | if (AscFindSignature(asc_dvc->iop_base)) { |
11612 | addr--; | 11737 | warn_code |= AscInitAscDvcVar(asc_dvc); |
11613 | word_data = AscReadLramWord(iop_base, addr); | 11738 | warn_code |= AscInitFromEEP(asc_dvc); |
11614 | word_data &= 0x00FF; | 11739 | asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG; |
11615 | word_data |= (((ushort)byte_val << 8) & 0xFF00); | 11740 | if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) |
11741 | asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; | ||
11616 | } else { | 11742 | } else { |
11617 | word_data = AscReadLramWord(iop_base, addr); | 11743 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
11618 | word_data &= 0xFF00; | ||
11619 | word_data |= ((ushort)byte_val & 0x00FF); | ||
11620 | } | 11744 | } |
11621 | AscWriteLramWord(iop_base, addr, word_data); | ||
11622 | return; | ||
11623 | } | ||
11624 | 11745 | ||
11625 | /* | 11746 | switch (warn_code) { |
11626 | * Copy 2 bytes to LRAM. | 11747 | case 0: /* No error */ |
11627 | * | 11748 | break; |
11628 | * The source data is assumed to be in little-endian order in memory | 11749 | case ASC_WARN_IO_PORT_ROTATE: |
11629 | * and is maintained in little-endian order when written to LRAM. | 11750 | shost_printk(KERN_WARNING, shost, "I/O port address " |
11630 | */ | 11751 | "modified\n"); |
11631 | static void | 11752 | break; |
11632 | AscMemWordCopyPtrToLram(PortAddr iop_base, | 11753 | case ASC_WARN_AUTO_CONFIG: |
11633 | ushort s_addr, uchar *s_buffer, int words) | 11754 | shost_printk(KERN_WARNING, shost, "I/O port increment switch " |
11634 | { | 11755 | "enabled\n"); |
11635 | int i; | 11756 | break; |
11636 | 11757 | case ASC_WARN_EEPROM_CHKSUM: | |
11637 | AscSetChipLramAddr(iop_base, s_addr); | 11758 | shost_printk(KERN_WARNING, shost, "EEPROM checksum error\n"); |
11638 | for (i = 0; i < 2 * words; i += 2) { | 11759 | break; |
11639 | /* | 11760 | case ASC_WARN_IRQ_MODIFIED: |
11640 | * On a little-endian system the second argument below | 11761 | shost_printk(KERN_WARNING, shost, "IRQ modified\n"); |
11641 | * produces a little-endian ushort which is written to | 11762 | break; |
11642 | * LRAM in little-endian order. On a big-endian system | 11763 | case ASC_WARN_CMD_QNG_CONFLICT: |
11643 | * the second argument produces a big-endian ushort which | 11764 | shost_printk(KERN_WARNING, shost, "tag queuing enabled w/o " |
11644 | * is "transparently" byte-swapped by outpw() and written | 11765 | "disconnects\n"); |
11645 | * in little-endian order to LRAM. | 11766 | break; |
11646 | */ | 11767 | default: |
11647 | outpw(iop_base + IOP_RAM_DATA, | 11768 | shost_printk(KERN_WARNING, shost, "unknown warning: 0x%x\n", |
11648 | ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); | 11769 | warn_code); |
11770 | break; | ||
11649 | } | 11771 | } |
11650 | return; | ||
11651 | } | ||
11652 | 11772 | ||
11653 | /* | 11773 | if (asc_dvc->err_code != 0) |
11654 | * Copy 4 bytes to LRAM. | 11774 | shost_printk(KERN_ERR, shost, "error 0x%x at init_state " |
11655 | * | 11775 | "0x%x\n", asc_dvc->err_code, asc_dvc->init_state); |
11656 | * The source data is assumed to be in little-endian order in memory | ||
11657 | * and is maintained in little-endian order when writen to LRAM. | ||
11658 | */ | ||
11659 | static void | ||
11660 | AscMemDWordCopyPtrToLram(PortAddr iop_base, | ||
11661 | ushort s_addr, uchar *s_buffer, int dwords) | ||
11662 | { | ||
11663 | int i; | ||
11664 | 11776 | ||
11665 | AscSetChipLramAddr(iop_base, s_addr); | 11777 | return asc_dvc->err_code; |
11666 | for (i = 0; i < 4 * dwords; i += 4) { | ||
11667 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */ | ||
11668 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */ | ||
11669 | } | ||
11670 | return; | ||
11671 | } | 11778 | } |
11672 | 11779 | ||
11673 | /* | 11780 | static int __devinit AscInitSetConfig(struct pci_dev *pdev, struct Scsi_Host *shost) |
11674 | * Copy 2 bytes from LRAM. | ||
11675 | * | ||
11676 | * The source data is assumed to be in little-endian order in LRAM | ||
11677 | * and is maintained in little-endian order when written to memory. | ||
11678 | */ | ||
11679 | static void | ||
11680 | AscMemWordCopyPtrFromLram(PortAddr iop_base, | ||
11681 | ushort s_addr, uchar *d_buffer, int words) | ||
11682 | { | 11781 | { |
11683 | int i; | 11782 | struct asc_board *board = shost_priv(shost); |
11684 | ushort word; | 11783 | ASC_DVC_VAR *asc_dvc = &board->dvc_var.asc_dvc_var; |
11784 | PortAddr iop_base = asc_dvc->iop_base; | ||
11785 | unsigned short cfg_msw; | ||
11786 | unsigned short warn_code = 0; | ||
11685 | 11787 | ||
11686 | AscSetChipLramAddr(iop_base, s_addr); | 11788 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG; |
11687 | for (i = 0; i < 2 * words; i += 2) { | 11789 | if (asc_dvc->err_code != 0) |
11688 | word = inpw(iop_base + IOP_RAM_DATA); | 11790 | return asc_dvc->err_code; |
11689 | d_buffer[i] = word & 0xff; | 11791 | if (!AscFindSignature(asc_dvc->iop_base)) { |
11690 | d_buffer[i + 1] = (word >> 8) & 0xff; | 11792 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
11793 | return asc_dvc->err_code; | ||
11691 | } | 11794 | } |
11692 | return; | ||
11693 | } | ||
11694 | |||
11695 | static ASC_DCNT AscMemSumLramWord(PortAddr iop_base, ushort s_addr, int words) | ||
11696 | { | ||
11697 | ASC_DCNT sum; | ||
11698 | int i; | ||
11699 | 11795 | ||
11700 | sum = 0L; | 11796 | cfg_msw = AscGetChipCfgMsw(iop_base); |
11701 | for (i = 0; i < words; i++, s_addr += 2) { | 11797 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { |
11702 | sum += AscReadLramWord(iop_base, s_addr); | 11798 | cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; |
11799 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | ||
11800 | AscSetChipCfgMsw(iop_base, cfg_msw); | ||
11703 | } | 11801 | } |
11704 | return (sum); | 11802 | if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) != |
11705 | } | 11803 | asc_dvc->cfg->cmd_qng_enabled) { |
11706 | 11804 | asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled; | |
11707 | static void | 11805 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; |
11708 | AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words) | ||
11709 | { | ||
11710 | int i; | ||
11711 | |||
11712 | AscSetChipLramAddr(iop_base, s_addr); | ||
11713 | for (i = 0; i < words; i++) { | ||
11714 | AscSetChipLramData(iop_base, set_wval); | ||
11715 | } | 11806 | } |
11716 | return; | 11807 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { |
11717 | } | 11808 | warn_code |= ASC_WARN_AUTO_CONFIG; |
11718 | 11809 | } | |
11719 | /* | 11810 | #ifdef CONFIG_PCI |
11720 | * --- Adv Library Functions | 11811 | if (asc_dvc->bus_type & ASC_IS_PCI) { |
11721 | */ | 11812 | cfg_msw &= 0xFFC0; |
11722 | 11813 | AscSetChipCfgMsw(iop_base, cfg_msw); | |
11723 | /* a_mcode.h */ | 11814 | if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) { |
11724 | 11815 | } else { | |
11725 | /* Microcode buffer is kept after initialization for error recovery. */ | 11816 | if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) || |
11726 | static unsigned char _adv_asc3550_buf[] = { | 11817 | (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) { |
11727 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, | 11818 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB; |
11728 | 0x01, 0x00, 0x48, 0xe4, | 11819 | asc_dvc->bug_fix_cntl |= |
11729 | 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff, | 11820 | ASC_BUG_FIX_ASYN_USE_SYN; |
11730 | 0x28, 0x0e, 0x9e, 0xe7, | 11821 | } |
11731 | 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, | 11822 | } |
11732 | 0x55, 0xf0, 0x01, 0xf6, | 11823 | } else |
11733 | 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00, | 11824 | #endif /* CONFIG_PCI */ |
11734 | 0x00, 0xec, 0x85, 0xf0, | 11825 | if (asc_dvc->bus_type == ASC_IS_ISAPNP) { |
11735 | 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0, | 11826 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) |
11736 | 0x86, 0xf0, 0xb4, 0x00, | 11827 | == ASC_CHIP_VER_ASYN_BUG) { |
11737 | 0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, | 11828 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN; |
11738 | 0xaa, 0x18, 0x02, 0x80, | 11829 | } |
11739 | 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40, | 11830 | } |
11740 | 0x00, 0x57, 0x01, 0xea, | 11831 | if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) != |
11741 | 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80, | 11832 | asc_dvc->cfg->chip_scsi_id) { |
11742 | 0x03, 0xe6, 0xb6, 0x00, | 11833 | asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID; |
11743 | 0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, | 11834 | } |
11744 | 0x02, 0x4a, 0xb9, 0x54, | 11835 | #ifdef CONFIG_ISA |
11745 | 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00, | 11836 | if (asc_dvc->bus_type & ASC_IS_ISA) { |
11746 | 0x3e, 0x00, 0x80, 0x00, | 11837 | AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel); |
11747 | 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, | 11838 | AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed); |
11748 | 0x74, 0x01, 0x76, 0x01, | 11839 | } |
11749 | 0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, | 11840 | #endif /* CONFIG_ISA */ |
11750 | 0x4c, 0x1c, 0xbb, 0x55, | ||
11751 | 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0, | ||
11752 | 0x03, 0xf7, 0x06, 0xf7, | ||
11753 | 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08, | ||
11754 | 0x30, 0x13, 0x64, 0x15, | ||
11755 | 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, | ||
11756 | 0x04, 0xea, 0x5d, 0xf0, | ||
11757 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, | ||
11758 | 0xcc, 0x00, 0x20, 0x01, | ||
11759 | 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13, | ||
11760 | 0x40, 0x13, 0x30, 0x1c, | ||
11761 | 0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, | ||
11762 | 0x59, 0xf0, 0xa7, 0xf0, | ||
11763 | 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, | ||
11764 | 0xa4, 0x00, 0xb5, 0x00, | ||
11765 | 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a, | ||
11766 | 0x14, 0x0e, 0x02, 0x10, | ||
11767 | 0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, | ||
11768 | 0x10, 0x15, 0x14, 0x15, | ||
11769 | 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, | ||
11770 | 0x91, 0x44, 0x0a, 0x45, | ||
11771 | 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58, | ||
11772 | 0x83, 0x59, 0x05, 0xe6, | ||
11773 | 0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, | ||
11774 | 0x02, 0xfa, 0x03, 0xfa, | ||
11775 | 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00, | ||
11776 | 0x9e, 0x00, 0xa8, 0x00, | ||
11777 | 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, | ||
11778 | 0x7a, 0x01, 0xc0, 0x01, | ||
11779 | 0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, | ||
11780 | 0x69, 0x08, 0xba, 0x08, | ||
11781 | 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10, | ||
11782 | 0xf1, 0x10, 0x06, 0x12, | ||
11783 | 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14, | ||
11784 | 0x8a, 0x15, 0xc6, 0x17, | ||
11785 | 0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, | ||
11786 | 0x0e, 0x47, 0x48, 0x47, | ||
11787 | 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55, | ||
11788 | 0x14, 0x56, 0x77, 0x57, | ||
11789 | 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c, | ||
11790 | 0xf0, 0x29, 0x02, 0xfe, | ||
11791 | 0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, | ||
11792 | 0xfe, 0x80, 0x01, 0xff, | ||
11793 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
11794 | 0x00, 0xfe, 0x57, 0x24, | ||
11795 | 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09, | ||
11796 | 0x00, 0x00, 0xff, 0x08, | ||
11797 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, | ||
11798 | 0xff, 0xff, 0xff, 0x0f, | ||
11799 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
11800 | 0xfe, 0x04, 0xf7, 0xcf, | ||
11801 | 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67, | ||
11802 | 0x0b, 0x3c, 0x2a, 0xfe, | ||
11803 | 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, | ||
11804 | 0xfe, 0xf0, 0x01, 0xfe, | ||
11805 | 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b, | ||
11806 | 0x02, 0xfe, 0xd4, 0x0c, | ||
11807 | 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, | ||
11808 | 0x1c, 0x05, 0xfe, 0xa6, | ||
11809 | 0x00, 0xfe, 0xd3, 0x12, 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, | ||
11810 | 0xf0, 0xfe, 0x86, 0x02, | ||
11811 | 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02, | ||
11812 | 0xfe, 0x46, 0xf0, 0xfe, | ||
11813 | 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, 0xfe, 0x43, 0xf0, 0xfe, | ||
11814 | 0x44, 0x02, 0xfe, 0x44, | ||
11815 | 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, | ||
11816 | 0xa0, 0x17, 0x06, 0x18, | ||
11817 | 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe, | ||
11818 | 0x1e, 0x1c, 0xfe, 0xe9, | ||
11819 | 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xc7, | ||
11820 | 0x0a, 0x6b, 0x01, 0x9e, | ||
11821 | 0x02, 0x29, 0x14, 0x4d, 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, | ||
11822 | 0x01, 0x82, 0xfe, 0xbd, | ||
11823 | 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, | ||
11824 | 0x58, 0x1c, 0x17, 0x06, | ||
11825 | 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0x21, | ||
11826 | 0xfe, 0x94, 0x02, 0xfe, | ||
11827 | 0x5a, 0x1c, 0xea, 0xfe, 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, | ||
11828 | 0x01, 0xfe, 0x54, 0x0f, | ||
11829 | 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe, | ||
11830 | 0x69, 0x10, 0x17, 0x06, | ||
11831 | 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, 0x12, 0x20, 0xfe, 0x05, | ||
11832 | 0xf6, 0xc7, 0x01, 0xfe, | ||
11833 | 0x52, 0x16, 0x09, 0x4a, 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, | ||
11834 | 0x02, 0x29, 0x0a, 0x40, | ||
11835 | 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41, | ||
11836 | 0x58, 0x0a, 0x99, 0x01, | ||
11837 | 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, 0x01, 0xe6, 0x02, 0x29, | ||
11838 | 0x2a, 0x46, 0xfe, 0x02, | ||
11839 | 0xe8, 0x27, 0xf8, 0xfe, 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, | ||
11840 | 0x01, 0xfe, 0x07, 0x4b, | ||
11841 | 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0, | ||
11842 | 0xfe, 0x56, 0x03, 0xfe, | ||
11843 | 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0, 0x9c, 0xfe, 0xef, 0x10, | ||
11844 | 0xfe, 0x9f, 0xf0, 0xfe, | ||
11845 | 0x64, 0x03, 0xeb, 0x0f, 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48, | ||
11846 | 0x1c, 0xeb, 0x09, 0x04, | ||
11847 | 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40, | ||
11848 | 0x01, 0x0e, 0xac, 0x75, | ||
11849 | 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2, 0xfe, 0x01, 0xf0, 0xd2, | ||
11850 | 0xfe, 0x82, 0xf0, 0xfe, | ||
11851 | 0x92, 0x03, 0xec, 0x11, 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25, | ||
11852 | 0x32, 0x1f, 0xfe, 0xb4, | ||
11853 | 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe, | ||
11854 | 0x0a, 0xf0, 0xfe, 0x7a, | ||
11855 | 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe, 0xf6, 0x04, 0x14, 0x2c, | ||
11856 | 0x01, 0x33, 0x8f, 0xfe, | ||
11857 | 0x66, 0x02, 0x02, 0xd1, 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8, | ||
11858 | 0xf7, 0xfe, 0x48, 0x1c, | ||
11859 | 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3, | ||
11860 | 0x0a, 0xca, 0x01, 0x0e, | ||
11861 | 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, 0xfe, 0x10, 0x12, 0x14, | ||
11862 | 0x2c, 0x01, 0x33, 0x8f, | ||
11863 | 0xfe, 0x66, 0x02, 0x02, 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65, | ||
11864 | 0xfe, 0x3c, 0x04, 0x1f, | ||
11865 | 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, | ||
11866 | 0x12, 0x2b, 0xff, 0x02, | ||
11867 | 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04, 0x2b, 0x01, 0x08, 0x1f, | ||
11868 | 0x22, 0x30, 0x2e, 0xd5, | ||
11869 | 0xfe, 0x4c, 0x44, 0xfe, 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, | ||
11870 | 0xfe, 0x4c, 0x54, 0x64, | ||
11871 | 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d, | ||
11872 | 0xfe, 0x2a, 0x13, 0x2f, | ||
11873 | 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64, | ||
11874 | 0xd3, 0xfa, 0xef, 0x86, | ||
11875 | 0x09, 0x04, 0x1d, 0xfe, 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, | ||
11876 | 0x1d, 0xfe, 0x1c, 0x12, | ||
11877 | 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, | ||
11878 | 0x70, 0x0c, 0x02, 0x22, | ||
11879 | 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, 0xf9, 0x03, 0x14, 0x92, | ||
11880 | 0x01, 0x33, 0x02, 0x29, | ||
11881 | 0xfe, 0x42, 0x5b, 0x67, 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, | ||
11882 | 0x80, 0xfe, 0x31, 0xe4, | ||
11883 | 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a, | ||
11884 | 0xfe, 0x70, 0x12, 0x49, | ||
11885 | 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2, 0x00, 0x28, 0x16, 0xfe, | ||
11886 | 0x80, 0x05, 0xfe, 0x31, | ||
11887 | 0xe4, 0x6a, 0x49, 0x04, 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00, | ||
11888 | 0x28, 0xfe, 0x42, 0x12, | ||
11889 | 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05, | ||
11890 | 0x11, 0xfe, 0xe3, 0x00, | ||
11891 | 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05, 0xfe, 0x49, 0xf0, 0xfe, | ||
11892 | 0x64, 0x05, 0x83, 0x24, | ||
11893 | 0xfe, 0x21, 0x00, 0xa1, 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe, | ||
11894 | 0x09, 0x48, 0x01, 0x08, | ||
11895 | 0x26, 0xfe, 0x98, 0x05, 0xfe, 0xe2, 0x08, 0x49, 0x04, 0xc5, 0x3b, 0x01, | ||
11896 | 0x86, 0x24, 0x06, 0x12, | ||
11897 | 0xcc, 0x37, 0xfe, 0x27, 0x01, 0x09, 0x04, 0x1d, 0xfe, 0x22, 0x12, 0x47, | ||
11898 | 0x01, 0xa7, 0x14, 0x92, | ||
11899 | 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, | ||
11900 | 0x02, 0x22, 0x05, 0xfe, | ||
11901 | 0x9c, 0x00, 0x28, 0xfe, 0x3e, 0x12, 0x05, 0x50, 0x28, 0xfe, 0x36, 0x13, | ||
11902 | 0x47, 0x01, 0xa7, 0x26, | ||
11903 | 0xfe, 0x08, 0x06, 0x0a, 0x06, 0x49, 0x04, 0x19, 0xfe, 0x02, 0x12, 0x5f, | ||
11904 | 0x01, 0xfe, 0xaa, 0x14, | ||
11905 | 0x1f, 0xfe, 0xfe, 0x05, 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, | ||
11906 | 0x05, 0x50, 0xb4, 0x0c, | ||
11907 | 0x50, 0x05, 0xc6, 0x28, 0xfe, 0x62, 0x12, 0x05, 0x3f, 0x28, 0xfe, 0x5a, | ||
11908 | 0x13, 0x01, 0xfe, 0x14, | ||
11909 | 0x18, 0x01, 0xfe, 0x66, 0x18, 0xfe, 0x43, 0x48, 0xb7, 0x19, 0x13, 0x6c, | ||
11910 | 0xff, 0x02, 0x00, 0x57, | ||
11911 | 0x48, 0x8b, 0x1c, 0x3d, 0x85, 0xb7, 0x69, 0x47, 0x01, 0xa7, 0x26, 0xfe, | ||
11912 | 0x72, 0x06, 0x49, 0x04, | ||
11913 | 0x1b, 0xdf, 0x89, 0x0a, 0x4d, 0x01, 0xfe, 0xd8, 0x14, 0x1f, 0xfe, 0x68, | ||
11914 | 0x06, 0x11, 0x9a, 0x01, | ||
11915 | 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x3f, 0xb4, 0x0c, 0x3f, 0x17, 0x06, | ||
11916 | 0x01, 0xa7, 0xec, 0x72, | ||
11917 | 0x70, 0x01, 0x6e, 0x87, 0x11, 0xfe, 0xe2, 0x00, 0x01, 0x08, 0x25, 0x32, | ||
11918 | 0xfe, 0x0a, 0xf0, 0xfe, | ||
11919 | 0xa6, 0x06, 0x8c, 0xfe, 0x5c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, 0x64, 0x07, | ||
11920 | 0x8d, 0x81, 0x02, 0x22, | ||
11921 | 0x09, 0x04, 0x0b, 0xfe, 0x2e, 0x12, 0x15, 0x1a, 0x01, 0x08, 0x15, 0x00, | ||
11922 | 0x01, 0x08, 0x15, 0x00, | ||
11923 | 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x15, | ||
11924 | 0x00, 0x02, 0xfe, 0x32, | ||
11925 | 0x08, 0x61, 0x04, 0x1b, 0xfe, 0x38, 0x12, 0x09, 0x04, 0x1b, 0x6e, 0x15, | ||
11926 | 0xfe, 0x1b, 0x00, 0x01, | ||
11927 | 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, | ||
11928 | 0x08, 0x15, 0x06, 0x01, | ||
11929 | 0x08, 0x15, 0x00, 0x02, 0xd9, 0x66, 0x4c, 0xfe, 0x3a, 0x55, 0x5f, 0xfe, | ||
11930 | 0x9a, 0x81, 0x4b, 0x1d, | ||
11931 | 0xba, 0xfe, 0x32, 0x07, 0x0a, 0x1d, 0xfe, 0x09, 0x6f, 0xaf, 0xfe, 0xca, | ||
11932 | 0x45, 0xfe, 0x32, 0x12, | ||
11933 | 0x62, 0x2c, 0x85, 0x66, 0x7b, 0x01, 0x08, 0x25, 0x32, 0xfe, 0x0a, 0xf0, | ||
11934 | 0xfe, 0x32, 0x07, 0x8d, | ||
11935 | 0x81, 0x8c, 0xfe, 0x5c, 0x07, 0x02, 0x22, 0x01, 0x43, 0x02, 0xfe, 0x8a, | ||
11936 | 0x06, 0x15, 0x19, 0x02, | ||
11937 | 0xfe, 0x8a, 0x06, 0xfe, 0x9c, 0xf7, 0xd4, 0xfe, 0x2c, 0x90, 0xfe, 0xae, | ||
11938 | 0x90, 0x77, 0xfe, 0xca, | ||
11939 | 0x07, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x4a, 0x6a, 0x35, 0x1e, 0x20, 0x07, | ||
11940 | 0x10, 0xfe, 0x0e, 0x12, | ||
11941 | 0x74, 0xfe, 0x80, 0x80, 0x37, 0x20, 0x63, 0x27, 0xfe, 0x06, 0x10, 0xfe, | ||
11942 | 0x83, 0xe7, 0xc4, 0xa1, | ||
11943 | 0xfe, 0x03, 0x40, 0x09, 0x4a, 0x4f, 0x35, 0x01, 0xa8, 0xad, 0xfe, 0x1f, | ||
11944 | 0x40, 0x12, 0x58, 0x01, | ||
11945 | 0xa5, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, | ||
11946 | 0x51, 0x83, 0xfb, 0xfe, | ||
11947 | 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x0c, 0x90, 0xfe, 0x8e, 0x90, | ||
11948 | 0xfe, 0x40, 0x50, 0xfe, | ||
11949 | 0xc2, 0x50, 0x0c, 0x39, 0x18, 0x3a, 0xfe, 0x4a, 0x10, 0x09, 0x04, 0x6a, | ||
11950 | 0xfe, 0x2a, 0x12, 0xfe, | ||
11951 | 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x04, 0x4f, | ||
11952 | 0x85, 0x01, 0xa8, 0xfe, | ||
11953 | 0x1f, 0x80, 0x12, 0x58, 0xfe, 0x44, 0x90, 0xfe, 0xc6, 0x90, 0x0c, 0x56, | ||
11954 | 0x18, 0x57, 0xfb, 0xfe, | ||
11955 | 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, | ||
11956 | 0x0c, 0x39, 0x18, 0x3a, | ||
11957 | 0x0c, 0x38, 0x18, 0x4e, 0x09, 0x4a, 0x19, 0x35, 0x2a, 0x13, 0xfe, 0x4e, | ||
11958 | 0x11, 0x65, 0xfe, 0x48, | ||
11959 | 0x08, 0xfe, 0x9e, 0xf0, 0xfe, 0x5c, 0x08, 0xb1, 0x16, 0x32, 0x2a, 0x73, | ||
11960 | 0xdd, 0xb8, 0xfe, 0x80, | ||
11961 | 0x08, 0xb9, 0xfe, 0x9e, 0x08, 0x8c, 0xfe, 0x74, 0x08, 0xfe, 0x06, 0xf0, | ||
11962 | 0xfe, 0x7a, 0x08, 0x8d, | ||
11963 | 0x81, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xc9, 0x10, 0x15, 0x19, 0xfe, 0xc9, | ||
11964 | 0x10, 0x61, 0x04, 0x06, | ||
11965 | 0xfe, 0x10, 0x12, 0x61, 0x04, 0x0b, 0x45, 0x09, 0x04, 0x0b, 0xfe, 0x68, | ||
11966 | 0x12, 0xfe, 0x2e, 0x1c, | ||
11967 | 0x02, 0xfe, 0x24, 0x0a, 0x61, 0x04, 0x06, 0x45, 0x61, 0x04, 0x0b, 0xfe, | ||
11968 | 0x52, 0x12, 0xfe, 0x2c, | ||
11969 | 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0x1e, 0x09, 0xfe, 0xac, 0xf0, 0xfe, 0xbe, | ||
11970 | 0x08, 0xfe, 0x8a, 0x10, | ||
11971 | 0xaa, 0xfe, 0xf3, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0xca, 0x08, 0x02, 0xfe, | ||
11972 | 0x24, 0x0a, 0xab, 0xfe, | ||
11973 | 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0x9d, 0xe9, 0x1c, 0xfe, 0x00, 0xfe, 0xfe, | ||
11974 | 0x1c, 0x12, 0xb5, 0xfe, | ||
11975 | 0xd2, 0xf0, 0x9d, 0xfe, 0x76, 0x18, 0x1c, 0x1a, 0x16, 0x9d, 0x05, 0xcb, | ||
11976 | 0x1c, 0x06, 0x16, 0x9d, | ||
11977 | 0xb8, 0x6d, 0xb9, 0x6d, 0xaa, 0xab, 0xfe, 0xb1, 0x10, 0x70, 0x5e, 0x2b, | ||
11978 | 0x14, 0x92, 0x01, 0x33, | ||
11979 | 0x0f, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x5a, 0x0f, 0x7c, 0x02, 0x5a, | ||
11980 | 0xfe, 0x74, 0x18, 0x1c, | ||
11981 | 0xfe, 0x00, 0xf8, 0x16, 0x6d, 0x67, 0x1b, 0x01, 0xfe, 0x44, 0x0d, 0x3b, | ||
11982 | 0x01, 0xe6, 0x1e, 0x27, | ||
11983 | 0x74, 0x67, 0x1a, 0x02, 0x6d, 0x09, 0x04, 0x0b, 0x21, 0xfe, 0x06, 0x0a, | ||
11984 | 0x09, 0x04, 0x6a, 0xfe, | ||
11985 | 0x82, 0x12, 0x09, 0x04, 0x19, 0xfe, 0x66, 0x13, 0x1e, 0x58, 0xac, 0xfc, | ||
11986 | 0xfe, 0x83, 0x80, 0xfe, | ||
11987 | 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x63, | ||
11988 | 0x27, 0xfe, 0x40, 0x59, | ||
11989 | 0xfe, 0xc1, 0x59, 0x77, 0xd7, 0x05, 0x54, 0x31, 0x55, 0x0c, 0x7b, 0x18, | ||
11990 | 0x7c, 0xbe, 0x54, 0xbf, | ||
11991 | 0x55, 0x01, 0xa8, 0xad, 0x63, 0x27, 0x12, 0x58, 0xc0, 0x38, 0xc1, 0x4e, | ||
11992 | 0x79, 0x56, 0x68, 0x57, | ||
11993 | 0xf4, 0xf5, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05, 0xfa, 0x4e, 0x01, 0xa5, | ||
11994 | 0xa2, 0x23, 0x0c, 0x7b, | ||
11995 | 0x0c, 0x7c, 0x79, 0x56, 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, | ||
11996 | 0x16, 0xd7, 0x79, 0x39, | ||
11997 | 0x68, 0x3a, 0x09, 0x04, 0xfe, 0xf7, 0x00, 0x35, 0x05, 0x52, 0x31, 0x53, | ||
11998 | 0xfe, 0x10, 0x58, 0xfe, | ||
11999 | 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x02, 0x6d, 0x09, 0x04, | ||
12000 | 0x19, 0x16, 0xd7, 0x09, | ||
12001 | 0x04, 0xfe, 0xf7, 0x00, 0x35, 0xfe, 0x3a, 0x55, 0xfe, 0x19, 0x81, 0x5f, | ||
12002 | 0xfe, 0x10, 0x90, 0xfe, | ||
12003 | 0x92, 0x90, 0xfe, 0xd7, 0x10, 0x2f, 0x07, 0x9b, 0x16, 0xfe, 0xc6, 0x08, | ||
12004 | 0x11, 0x9b, 0x09, 0x04, | ||
12005 | 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a, 0x77, 0xfe, 0xc6, 0x08, | ||
12006 | 0xfe, 0x0c, 0x58, 0xfe, | ||
12007 | 0x8d, 0x58, 0x02, 0x6d, 0x23, 0x47, 0xfe, 0x19, 0x80, 0xde, 0x09, 0x04, | ||
12008 | 0x0b, 0xfe, 0x1a, 0x12, | ||
12009 | 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9, | ||
12010 | 0x14, 0x7a, 0x01, 0x33, | ||
12011 | 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0xbe, 0x39, | ||
12012 | 0xfe, 0xed, 0x19, 0xbf, | ||
12013 | 0x3a, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, | ||
12014 | 0x34, 0xfe, 0x74, 0x10, | ||
12015 | 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a, | ||
12016 | 0x84, 0x05, 0xcb, 0x1c, | ||
12017 | 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00, 0x02, 0x5a, 0xfe, 0xd1, | ||
12018 | 0xf0, 0xfe, 0xc4, 0x0a, | ||
12019 | 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, | ||
12020 | 0xce, 0xf0, 0xfe, 0xca, | ||
12021 | 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe, | ||
12022 | 0x22, 0x00, 0x02, 0x5a, | ||
12023 | 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe, 0x24, 0x00, 0x02, 0x5a, | ||
12024 | 0xfe, 0xd0, 0xf0, 0xfe, | ||
12025 | 0xec, 0x0a, 0x0f, 0x93, 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, | ||
12026 | 0x4c, 0xfe, 0x10, 0x10, | ||
12027 | 0xfe, 0xcc, 0xf0, 0xd9, 0x61, 0x04, 0x19, 0x3b, 0x0f, 0xfe, 0x12, 0x00, | ||
12028 | 0x2a, 0x13, 0xfe, 0x4e, | ||
12029 | 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0, 0xfe, 0x20, 0x0b, 0xb1, | ||
12030 | 0x16, 0x32, 0x2a, 0x73, | ||
12031 | 0xdd, 0xb8, 0x22, 0xb9, 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, | ||
12032 | 0x32, 0x8c, 0xfe, 0x48, | ||
12033 | 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe, | ||
12034 | 0xdb, 0x10, 0x11, 0xfe, | ||
12035 | 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd, 0x7f, 0xfe, 0x89, 0xf0, | ||
12036 | 0x22, 0x30, 0x2e, 0xd8, | ||
12037 | 0xbc, 0x7d, 0xbd, 0x7f, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, | ||
12038 | 0x45, 0x0f, 0xfe, 0x42, | ||
12039 | 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c, | ||
12040 | 0x09, 0x04, 0x0b, 0xfe, | ||
12041 | 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54, 0x12, 0x4b, 0xfe, 0x28, | ||
12042 | 0x00, 0x21, 0xfe, 0xa6, | ||
12043 | 0x0c, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, | ||
12044 | 0xfe, 0xe2, 0x10, 0x01, | ||
12045 | 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d, | ||
12046 | 0x01, 0x6f, 0x02, 0x29, | ||
12047 | 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e, 0x0b, 0xfe, 0xb4, 0x10, | ||
12048 | 0x01, 0x86, 0x3e, 0x0b, | ||
12049 | 0xfe, 0xaa, 0x10, 0x01, 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, | ||
12050 | 0x3e, 0x0b, 0x0f, 0xfe, | ||
12051 | 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01, | ||
12052 | 0xe8, 0x59, 0x11, 0x2d, | ||
12053 | 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02, 0xfe, 0x2a, 0x03, 0x09, | ||
12054 | 0x04, 0x0b, 0x84, 0x3e, | ||
12055 | 0x0b, 0x0f, 0x00, 0xfe, 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, | ||
12056 | 0x09, 0x04, 0x1b, 0xfe, | ||
12057 | 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe, | ||
12058 | 0x1c, 0x1c, 0xfe, 0x9d, | ||
12059 | 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35, 0xfe, 0xa9, 0x10, 0x0f, | ||
12060 | 0xfe, 0x15, 0x00, 0xfe, | ||
12061 | 0x04, 0xe6, 0x0b, 0x5f, 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, | ||
12062 | 0x0f, 0xfe, 0x47, 0x00, | ||
12063 | 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa, | ||
12064 | 0xab, 0x70, 0x05, 0x6b, | ||
12065 | 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b, 0xfe, 0x9d, 0x41, 0xfe, | ||
12066 | 0x1c, 0x42, 0x59, 0x01, | ||
12067 | 0xda, 0x02, 0x29, 0xea, 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, | ||
12068 | 0x00, 0x37, 0x97, 0x01, | ||
12069 | 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e, | ||
12070 | 0x1d, 0xfe, 0xce, 0x45, | ||
12071 | 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47, 0x4b, 0x89, 0xfe, 0x75, | ||
12072 | 0x57, 0x05, 0x51, 0xfe, | ||
12073 | 0x98, 0x56, 0xfe, 0x38, 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, | ||
12074 | 0x46, 0x09, 0x04, 0x1d, | ||
12075 | 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a, | ||
12076 | 0x99, 0x01, 0x0e, 0xfe, | ||
12077 | 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe, 0x2a, 0x03, 0x0a, 0x51, | ||
12078 | 0xfe, 0xee, 0x14, 0xee, | ||
12079 | 0x3e, 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, | ||
12080 | 0x13, 0x02, 0x29, 0x1e, | ||
12081 | 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12, | ||
12082 | 0xce, 0x1e, 0x2d, 0x47, | ||
12083 | 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe, 0xec, 0x0d, 0x13, 0x06, | ||
12084 | 0x12, 0x4d, 0x01, 0xfe, | ||
12085 | 0xe2, 0x15, 0x05, 0xfe, 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, | ||
12086 | 0xf0, 0x0d, 0xfe, 0x02, | ||
12087 | 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05, | ||
12088 | 0xf6, 0xfe, 0x34, 0x01, | ||
12089 | 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4, 0x0d, 0xfe, 0x18, 0x13, | ||
12090 | 0xaf, 0xfe, 0x02, 0xea, | ||
12091 | 0xce, 0x62, 0x7a, 0xfe, 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, | ||
12092 | 0x05, 0xfe, 0x38, 0x01, | ||
12093 | 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01, | ||
12094 | 0x0c, 0xfe, 0x62, 0x01, | ||
12095 | 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11, 0x2d, 0x8a, 0x13, 0x06, | ||
12096 | 0x03, 0x23, 0x03, 0x1e, | ||
12097 | 0x4d, 0xfe, 0xf7, 0x12, 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, | ||
12098 | 0x71, 0x13, 0xfe, 0x24, | ||
12099 | 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03, | ||
12100 | 0xdc, 0xfe, 0x73, 0x57, | ||
12101 | 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc, 0xfe, 0x5b, 0x57, 0xfe, | ||
12102 | 0x80, 0x5d, 0x03, 0xfe, | ||
12103 | 0x03, 0x57, 0xb6, 0x23, 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, | ||
12104 | 0x75, 0x03, 0x09, 0x04, | ||
12105 | 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13, | ||
12106 | 0xfe, 0x1e, 0x80, 0xe1, | ||
12107 | 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe, 0x0e, 0x13, 0xfe, 0x0e, | ||
12108 | 0x90, 0xa3, 0xfe, 0x3c, | ||
12109 | 0x90, 0xfe, 0x30, 0xf4, 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, | ||
12110 | 0x16, 0x2f, 0x07, 0x2d, | ||
12111 | 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01, | ||
12112 | 0xe8, 0x11, 0xfe, 0xe9, | ||
12113 | 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01, 0xfe, 0x14, 0x16, 0xfe, | ||
12114 | 0x1e, 0x1c, 0xfe, 0x14, | ||
12115 | 0x90, 0xfe, 0x96, 0x90, 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, | ||
12116 | 0x09, 0x04, 0x4f, 0xfe, | ||
12117 | 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80, | ||
12118 | 0x40, 0x12, 0x20, 0x63, | ||
12119 | 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x03, 0xfe, 0x08, | ||
12120 | 0x1c, 0x05, 0xfe, 0xac, | ||
12121 | 0x00, 0xfe, 0x06, 0x58, 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, | ||
12122 | 0xfe, 0xb0, 0x00, 0xfe, | ||
12123 | 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, | ||
12124 | 0x24, 0x69, 0x12, 0xc9, | ||
12125 | 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48, 0x5f, 0x17, 0x1d, 0xfe, | ||
12126 | 0x90, 0x4d, 0xfe, 0x91, | ||
12127 | 0x54, 0x21, 0xfe, 0x08, 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, | ||
12128 | 0xfe, 0x90, 0x4d, 0xfe, | ||
12129 | 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c, | ||
12130 | 0x46, 0x1e, 0x20, 0xed, | ||
12131 | 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x32, 0x0f, 0xea, | ||
12132 | 0x70, 0xfe, 0x14, 0x1c, | ||
12133 | 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, | ||
12134 | 0xfe, 0x07, 0xe6, 0x1d, | ||
12135 | 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46, | ||
12136 | 0xfa, 0xef, 0xfe, 0x42, | ||
12137 | 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a, 0x42, 0x01, 0x0e, 0xb0, | ||
12138 | 0xfe, 0x36, 0x12, 0xf0, | ||
12139 | 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, | ||
12140 | 0x3d, 0x75, 0x07, 0x10, | ||
12141 | 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e, | ||
12142 | 0x10, 0x07, 0x7e, 0x45, | ||
12143 | 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03, 0xfe, 0x44, 0x58, 0x74, | ||
12144 | 0xfe, 0x01, 0xec, 0x97, | ||
12145 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, | ||
12146 | 0x27, 0x01, 0xda, 0xfe, | ||
12147 | 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b, | ||
12148 | 0xfe, 0x48, 0x12, 0x07, | ||
12149 | 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30, 0x12, 0x07, 0xc2, 0x16, | ||
12150 | 0xfe, 0x3e, 0x11, 0x07, | ||
12151 | 0xfe, 0x23, 0x00, 0x16, 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, | ||
12152 | 0x11, 0x07, 0x19, 0xfe, | ||
12153 | 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b, | ||
12154 | 0x01, 0x08, 0x8c, 0x43, | ||
12155 | 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01, 0xfe, 0x32, 0x0e, 0x11, | ||
12156 | 0x7e, 0x02, 0x29, 0x2b, | ||
12157 | 0x2f, 0x07, 0x9b, 0xfe, 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, | ||
12158 | 0xfc, 0x10, 0x09, 0x04, | ||
12159 | 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe, | ||
12160 | 0xc6, 0x10, 0x1e, 0x58, | ||
12161 | 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77, 0xfe, 0x82, 0x0c, 0x0c, | ||
12162 | 0x54, 0x18, 0x55, 0x23, | ||
12163 | 0x0c, 0x7b, 0x0c, 0x7c, 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, | ||
12164 | 0xa5, 0xc0, 0x38, 0xc1, | ||
12165 | 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe, | ||
12166 | 0x05, 0xfa, 0x4e, 0xfe, | ||
12167 | 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, | ||
12168 | 0x0c, 0x56, 0x18, 0x57, | ||
12169 | 0x83, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, | ||
12170 | 0x00, 0x56, 0xfe, 0xa1, | ||
12171 | 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e, | ||
12172 | 0x58, 0xfe, 0x1f, 0x40, | ||
12173 | 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x05, 0x56, | ||
12174 | 0x31, 0x57, 0xfe, 0x44, | ||
12175 | 0x50, 0xfe, 0xc6, 0x50, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, | ||
12176 | 0x8a, 0x50, 0x05, 0x39, | ||
12177 | 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06, | ||
12178 | 0x12, 0xcd, 0x02, 0x5b, | ||
12179 | 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5, 0x07, 0x06, 0x21, 0x44, | ||
12180 | 0x2f, 0x07, 0x9b, 0x21, | ||
12181 | 0x5b, 0x01, 0x6e, 0x1c, 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, | ||
12182 | 0x39, 0x68, 0x3a, 0xfe, | ||
12183 | 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c, | ||
12184 | 0x51, 0xfe, 0x8e, 0x51, | ||
12185 | 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19, 0x41, 0x02, 0x5b, 0x2b, | ||
12186 | 0x01, 0x08, 0x25, 0x32, | ||
12187 | 0x1f, 0xa2, 0x30, 0x2e, 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, | ||
12188 | 0x3b, 0x02, 0x44, 0x01, | ||
12189 | 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44, | ||
12190 | 0x01, 0x08, 0x1f, 0xa2, | ||
12191 | 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x60, 0x05, 0xfe, 0x9c, | ||
12192 | 0x00, 0x28, 0x84, 0x49, | ||
12193 | 0x04, 0x19, 0x34, 0x9f, 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, | ||
12194 | 0x78, 0x3d, 0xfe, 0xda, | ||
12195 | 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1, | ||
12196 | 0x05, 0xc6, 0x28, 0x84, | ||
12197 | 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, | ||
12198 | 0x14, 0xfe, 0x03, 0x17, | ||
12199 | 0x05, 0x50, 0xb4, 0x0c, 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, | ||
12200 | 0xfe, 0xaa, 0x14, 0x02, | ||
12201 | 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06, | ||
12202 | 0x21, 0x44, 0x01, 0xfe, | ||
12203 | 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14, 0xfe, 0xa4, 0x14, 0x87, | ||
12204 | 0xfe, 0x4a, 0xf4, 0x0b, | ||
12205 | 0x16, 0x44, 0xfe, 0x4a, 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, | ||
12206 | 0x85, 0x02, 0x5b, 0x05, | ||
12207 | 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, | ||
12208 | 0xd8, 0x14, 0x02, 0x5c, | ||
12209 | 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe, 0xe0, 0x12, 0x72, 0xf1, | ||
12210 | 0x01, 0x08, 0x23, 0x72, | ||
12211 | 0x03, 0x8f, 0xfe, 0xdc, 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, | ||
12212 | 0x12, 0x5e, 0x2b, 0x01, | ||
12213 | 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, | ||
12214 | 0x1c, 0xfe, 0xff, 0x7f, | ||
12215 | 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, | ||
12216 | 0x57, 0x48, 0x8b, 0x1c, | ||
12217 | 0x3d, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, | ||
12218 | 0x00, 0x57, 0x48, 0x8b, | ||
12219 | 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58, | ||
12220 | 0x03, 0x0a, 0x50, 0x01, | ||
12221 | 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c, 0x10, 0xff, 0x03, 0x00, | ||
12222 | 0x54, 0xfe, 0x00, 0xf4, | ||
12223 | 0x19, 0x48, 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, | ||
12224 | 0x03, 0x7c, 0x63, 0x27, | ||
12225 | 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08, | ||
12226 | 0xfe, 0x82, 0x4a, 0xfe, | ||
12227 | 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01, 0xfe, 0x14, 0x18, 0xfe, | ||
12228 | 0x42, 0x48, 0x5f, 0x60, | ||
12229 | 0x89, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, | ||
12230 | 0x1f, 0xfe, 0xa2, 0x14, | ||
12231 | 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe, | ||
12232 | 0xcc, 0x12, 0x49, 0x04, | ||
12233 | 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2, 0x4b, 0xc3, 0x64, 0xfe, | ||
12234 | 0xe8, 0x13, 0x3b, 0x13, | ||
12235 | 0x06, 0x17, 0xc3, 0x78, 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, | ||
12236 | 0xa1, 0xff, 0x02, 0x83, | ||
12237 | 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c, | ||
12238 | 0x13, 0x06, 0xfe, 0x56, | ||
12239 | 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00, 0x8e, 0xe4, 0x0a, 0xfe, | ||
12240 | 0x64, 0x00, 0x17, 0x93, | ||
12241 | 0x13, 0x06, 0xfe, 0x28, 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, | ||
12242 | 0xc8, 0x00, 0x8e, 0xe4, | ||
12243 | 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90, | ||
12244 | 0x01, 0xba, 0xfe, 0x4e, | ||
12245 | 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4, 0x94, 0xfe, 0x56, 0xf0, | ||
12246 | 0xfe, 0x60, 0x14, 0xfe, | ||
12247 | 0x04, 0xf4, 0x6c, 0xfe, 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, | ||
12248 | 0xfe, 0x22, 0x13, 0x1c, | ||
12249 | 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba, | ||
12250 | 0xfe, 0x9c, 0x14, 0xb7, | ||
12251 | 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x19, 0xba, | ||
12252 | 0xfe, 0x9c, 0x14, 0xb7, | ||
12253 | 0x19, 0x83, 0x60, 0x23, 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, | ||
12254 | 0xfe, 0xb4, 0x56, 0xfe, | ||
12255 | 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26, | ||
12256 | 0xe5, 0x15, 0x0b, 0x01, | ||
12257 | 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xe5, 0x72, 0xfe, 0x89, | ||
12258 | 0x49, 0x01, 0x08, 0x03, | ||
12259 | 0x15, 0x06, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, | ||
12260 | 0x15, 0x06, 0x01, 0x08, | ||
12261 | 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89, | ||
12262 | 0x4a, 0x01, 0x08, 0x03, | ||
12263 | 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44, 0x13, 0xad, 0x12, 0xcc, | ||
12264 | 0xfe, 0x49, 0xf4, 0x00, | ||
12265 | 0x3b, 0x72, 0x9f, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, | ||
12266 | 0x08, 0x2f, 0x07, 0xfe, | ||
12267 | 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd, | ||
12268 | 0x01, 0x43, 0x1e, 0xcd, | ||
12269 | 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03, 0x0a, 0x42, 0x01, 0x0e, | ||
12270 | 0xed, 0x88, 0x07, 0x10, | ||
12271 | 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, | ||
12272 | 0x80, 0x01, 0x0e, 0x88, | ||
12273 | 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3, | ||
12274 | 0x88, 0x03, 0x0a, 0x42, | ||
12275 | 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x42, 0x01, 0x0e, | ||
12276 | 0xfe, 0x80, 0x80, 0xf2, | ||
12277 | 0xfe, 0x49, 0xe4, 0x10, 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, | ||
12278 | 0x01, 0x82, 0x03, 0x17, | ||
12279 | 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, | ||
12280 | 0xfe, 0x24, 0x1c, 0xfe, | ||
12281 | 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01, 0xfe, 0xfc, 0x16, 0xe0, | ||
12282 | 0x91, 0x1d, 0x66, 0xfe, | ||
12283 | 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, | ||
12284 | 0xda, 0x10, 0x17, 0x10, | ||
12285 | 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58, | ||
12286 | 0x05, 0xfe, 0x66, 0x01, | ||
12287 | 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, 0x06, | ||
12288 | 0xfe, 0x3c, 0x50, 0x66, | ||
12289 | 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, | ||
12290 | 0x40, 0x16, 0xfe, 0xb6, | ||
12291 | 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17, | ||
12292 | 0x10, 0x71, 0xfe, 0x83, | ||
12293 | 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x38, 0x90, | ||
12294 | 0xfe, 0x62, 0x16, 0xfe, | ||
12295 | 0x94, 0x14, 0xfe, 0x10, 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, | ||
12296 | 0xfe, 0x98, 0xe7, 0x00, | ||
12297 | 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71, | ||
12298 | 0xfe, 0x30, 0xbc, 0xfe, | ||
12299 | 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, | ||
12300 | 0xc5, 0x90, 0xfe, 0x9a, | ||
12301 | 0x16, 0xfe, 0x5c, 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, | ||
12302 | 0x42, 0x10, 0xfe, 0x02, | ||
12303 | 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc, | ||
12304 | 0xfe, 0x1d, 0xf7, 0x4f, | ||
12305 | 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0x91, 0x4f, | ||
12306 | 0x47, 0xfe, 0x83, 0x58, | ||
12307 | 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, | ||
12308 | 0xfe, 0xdd, 0x00, 0x63, | ||
12309 | 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14, | ||
12310 | 0x06, 0x37, 0x95, 0xa9, | ||
12311 | 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17, 0x23, 0x03, 0xfe, 0x7e, | ||
12312 | 0x18, 0x1c, 0x1a, 0x5d, | ||
12313 | 0x13, 0x0d, 0x03, 0x71, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, | ||
12314 | 0xe1, 0x10, 0x78, 0x2c, | ||
12315 | 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42, | ||
12316 | 0x13, 0x3c, 0x8a, 0x0a, | ||
12317 | 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01, | ||
12318 | 0xe3, 0xfe, 0x00, 0xcc, | ||
12319 | 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, | ||
12320 | 0x0e, 0xf2, 0x01, 0x6f, | ||
12321 | 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, | ||
12322 | 0xf6, 0xfe, 0xd6, 0xf0, | ||
12323 | 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, 0xe7, 0x0b, 0x0f, 0xfe, | ||
12324 | 0x15, 0x00, 0x59, 0x76, | ||
12325 | 0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, | ||
12326 | 0x11, 0x2d, 0x01, 0x6f, | ||
12327 | 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68, | ||
12328 | 0xc8, 0xfe, 0x48, 0x55, | ||
12329 | 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a, | ||
12330 | 0x99, 0x01, 0x0e, 0xf0, | ||
12331 | 0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, | ||
12332 | 0x75, 0x03, 0x0a, 0x42, | ||
12333 | 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01, | ||
12334 | 0x0e, 0x73, 0x75, 0x03, | ||
12335 | 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00, | ||
12336 | 0xfe, 0x3a, 0x45, 0x5b, | ||
12337 | 0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, | ||
12338 | 0xfe, 0x02, 0xe6, 0x1b, | ||
12339 | 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05, | ||
12340 | 0xfe, 0x94, 0x00, 0xfe, | ||
12341 | 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02, | ||
12342 | 0xe6, 0x2c, 0xfe, 0x4e, | ||
12343 | 0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, | ||
12344 | 0x03, 0x07, 0x7a, 0xfe, | ||
12345 | 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, | ||
12346 | 0x07, 0x1b, 0xfe, 0x5a, | ||
12347 | 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d, | ||
12348 | 0x24, 0x2c, 0xdc, 0x07, | ||
12349 | 0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, | ||
12350 | 0x9f, 0xad, 0x03, 0x14, | ||
12351 | 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9, | ||
12352 | 0x03, 0x25, 0xfe, 0xca, | ||
12353 | 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a, | ||
12354 | 0x00, 0x00, | ||
12355 | }; | ||
12356 | |||
12357 | static unsigned short _adv_asc3550_size = sizeof(_adv_asc3550_buf); /* 0x13AD */ | ||
12358 | static ADV_DCNT _adv_asc3550_chksum = 0x04D52DDDUL; /* Expanded little-endian checksum. */ | ||
12359 | |||
12360 | /* Microcode buffer is kept after initialization for error recovery. */ | ||
12361 | static unsigned char _adv_asc38C0800_buf[] = { | ||
12362 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4, | ||
12363 | 0x01, 0x00, 0x48, 0xe4, | ||
12364 | 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff, | ||
12365 | 0x1c, 0x0f, 0x00, 0xf6, | ||
12366 | 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, | ||
12367 | 0x09, 0xe7, 0x55, 0xf0, | ||
12368 | 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0, | ||
12369 | 0x18, 0xf4, 0x08, 0x00, | ||
12370 | 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6, | ||
12371 | 0x86, 0xf0, 0xb1, 0xf0, | ||
12372 | 0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, | ||
12373 | 0x3c, 0x00, 0xbb, 0x00, | ||
12374 | 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13, | ||
12375 | 0xba, 0x13, 0x18, 0x40, | ||
12376 | 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01, | ||
12377 | 0x6e, 0x01, 0x74, 0x01, | ||
12378 | 0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, | ||
12379 | 0xc0, 0x00, 0x01, 0x01, | ||
12380 | 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12, | ||
12381 | 0x08, 0x12, 0x02, 0x4a, | ||
12382 | 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, | ||
12383 | 0x5d, 0xf0, 0x02, 0xfa, | ||
12384 | 0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, | ||
12385 | 0x68, 0x01, 0x6a, 0x01, | ||
12386 | 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d, | ||
12387 | 0x06, 0x13, 0x4c, 0x1c, | ||
12388 | 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00, | ||
12389 | 0x0f, 0x00, 0x47, 0x00, | ||
12390 | 0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, | ||
12391 | 0x4e, 0x1c, 0x10, 0x44, | ||
12392 | 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa, | ||
12393 | 0x05, 0x00, 0x34, 0x00, | ||
12394 | 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b, | ||
12395 | 0x42, 0x0c, 0x12, 0x0f, | ||
12396 | 0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, | ||
12397 | 0x00, 0x4e, 0x42, 0x54, | ||
12398 | 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, | ||
12399 | 0x59, 0xf0, 0xb8, 0xf0, | ||
12400 | 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00, | ||
12401 | 0x19, 0x00, 0x33, 0x00, | ||
12402 | 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, | ||
12403 | 0xe7, 0x00, 0xe2, 0x03, | ||
12404 | 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13, | ||
12405 | 0x12, 0x13, 0x24, 0x14, | ||
12406 | 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c, | ||
12407 | 0x36, 0x1c, 0x08, 0x44, | ||
12408 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, | ||
12409 | 0x3a, 0x55, 0x83, 0x55, | ||
12410 | 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, | ||
12411 | 0x0c, 0xf0, 0x04, 0xf8, | ||
12412 | 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00, | ||
12413 | 0xa8, 0x00, 0xaa, 0x00, | ||
12414 | 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, | ||
12415 | 0xc4, 0x01, 0xc6, 0x01, | ||
12416 | 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08, | ||
12417 | 0x68, 0x08, 0x69, 0x08, | ||
12418 | 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10, | ||
12419 | 0xed, 0x10, 0xf1, 0x10, | ||
12420 | 0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, | ||
12421 | 0x1e, 0x13, 0x46, 0x14, | ||
12422 | 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18, | ||
12423 | 0xca, 0x18, 0xe6, 0x19, | ||
12424 | 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c, | ||
12425 | 0xf0, 0x2b, 0x02, 0xfe, | ||
12426 | 0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, | ||
12427 | 0xfe, 0x84, 0x01, 0xff, | ||
12428 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
12429 | 0x00, 0xfe, 0x57, 0x24, | ||
12430 | 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09, | ||
12431 | 0x00, 0x00, 0xff, 0x08, | ||
12432 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, | ||
12433 | 0xff, 0xff, 0xff, 0x11, | ||
12434 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
12435 | 0xfe, 0x04, 0xf7, 0xd6, | ||
12436 | 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99, | ||
12437 | 0x0a, 0x42, 0x2c, 0xfe, | ||
12438 | 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, | ||
12439 | 0xfe, 0xf4, 0x01, 0xfe, | ||
12440 | 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d, | ||
12441 | 0x02, 0xfe, 0xc8, 0x0d, | ||
12442 | 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, | ||
12443 | 0x1c, 0x03, 0xfe, 0xa6, | ||
12444 | 0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, | ||
12445 | 0xf0, 0xfe, 0x8a, 0x02, | ||
12446 | 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02, | ||
12447 | 0xfe, 0x46, 0xf0, 0xfe, | ||
12448 | 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe, | ||
12449 | 0x48, 0x02, 0xfe, 0x44, | ||
12450 | 0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, | ||
12451 | 0xaa, 0x18, 0x06, 0x14, | ||
12452 | 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe, | ||
12453 | 0x1e, 0x1c, 0xfe, 0xe9, | ||
12454 | 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce, | ||
12455 | 0x09, 0x70, 0x01, 0xa8, | ||
12456 | 0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, | ||
12457 | 0x01, 0x87, 0xfe, 0xbd, | ||
12458 | 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, | ||
12459 | 0x58, 0x1c, 0x18, 0x06, | ||
12460 | 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23, | ||
12461 | 0xfe, 0x98, 0x02, 0xfe, | ||
12462 | 0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, | ||
12463 | 0x01, 0xfe, 0x48, 0x10, | ||
12464 | 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe, | ||
12465 | 0x69, 0x10, 0x18, 0x06, | ||
12466 | 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05, | ||
12467 | 0xf6, 0xce, 0x01, 0xfe, | ||
12468 | 0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, | ||
12469 | 0x82, 0x16, 0x02, 0x2b, | ||
12470 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10, | ||
12471 | 0xfe, 0x41, 0x58, 0x09, | ||
12472 | 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe, | ||
12473 | 0x82, 0x16, 0x02, 0x2b, | ||
12474 | 0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, | ||
12475 | 0xfe, 0x77, 0x57, 0xfe, | ||
12476 | 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7, | ||
12477 | 0xfe, 0x40, 0x1c, 0x1c, | ||
12478 | 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48, | ||
12479 | 0x03, 0xfe, 0x11, 0xf0, | ||
12480 | 0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, | ||
12481 | 0xfe, 0x11, 0x00, 0x02, | ||
12482 | 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13, | ||
12483 | 0x21, 0x22, 0xa3, 0xb7, | ||
12484 | 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16, | ||
12485 | 0x12, 0xd1, 0x1c, 0xd9, | ||
12486 | 0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, | ||
12487 | 0xfe, 0xe4, 0x00, 0x27, | ||
12488 | 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe, | ||
12489 | 0x06, 0xf0, 0xfe, 0xc8, | ||
12490 | 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03, | ||
12491 | 0x70, 0x28, 0x17, 0xfe, | ||
12492 | 0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, | ||
12493 | 0xf9, 0x2c, 0x99, 0x19, | ||
12494 | 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, | ||
12495 | 0x74, 0x01, 0xaf, 0x8c, | ||
12496 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e, | ||
12497 | 0x8d, 0x51, 0x64, 0x79, | ||
12498 | 0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, | ||
12499 | 0xfe, 0x6a, 0x02, 0x02, | ||
12500 | 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d, | ||
12501 | 0xfe, 0x3c, 0x04, 0x3b, | ||
12502 | 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02, | ||
12503 | 0x00, 0x10, 0x01, 0x0b, | ||
12504 | 0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, | ||
12505 | 0xfe, 0x4c, 0x44, 0xfe, | ||
12506 | 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, | ||
12507 | 0xda, 0x4f, 0x79, 0x2a, | ||
12508 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b, | ||
12509 | 0xfe, 0x2a, 0x13, 0x32, | ||
12510 | 0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, | ||
12511 | 0x54, 0x6b, 0xda, 0xfe, | ||
12512 | 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe, | ||
12513 | 0x08, 0x13, 0x32, 0x07, | ||
12514 | 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d, | ||
12515 | 0x08, 0x05, 0x06, 0x4d, | ||
12516 | 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, | ||
12517 | 0x2d, 0x12, 0xfe, 0xe6, | ||
12518 | 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36, | ||
12519 | 0x02, 0x2b, 0xfe, 0x42, | ||
12520 | 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, | ||
12521 | 0xfe, 0x87, 0x80, 0xfe, | ||
12522 | 0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, | ||
12523 | 0x07, 0x19, 0xfe, 0x7c, | ||
12524 | 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28, | ||
12525 | 0x17, 0xfe, 0x90, 0x05, | ||
12526 | 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe, | ||
12527 | 0xa0, 0x00, 0x28, 0xfe, | ||
12528 | 0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, | ||
12529 | 0x34, 0xfe, 0x89, 0x48, | ||
12530 | 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05, | ||
12531 | 0x12, 0xfe, 0xe3, 0x00, | ||
12532 | 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe, | ||
12533 | 0x70, 0x05, 0x88, 0x25, | ||
12534 | 0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, | ||
12535 | 0x09, 0x48, 0xff, 0x02, | ||
12536 | 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2, | ||
12537 | 0x08, 0x53, 0x05, 0xcb, | ||
12538 | 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, 0xfe, 0x27, 0x01, 0x08, | ||
12539 | 0x05, 0x1b, 0xfe, 0x22, | ||
12540 | 0x12, 0x41, 0x01, 0xb2, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, | ||
12541 | 0x0d, 0x00, 0x01, 0x36, | ||
12542 | 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb, | ||
12543 | 0x03, 0x5c, 0x28, 0xfe, | ||
12544 | 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, 0x06, 0x09, 0x06, 0x53, | ||
12545 | 0x05, 0x1f, 0xfe, 0x02, | ||
12546 | 0x12, 0x50, 0x01, 0xfe, 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, | ||
12547 | 0x01, 0x4b, 0x12, 0xfe, | ||
12548 | 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62, | ||
12549 | 0x12, 0x03, 0x45, 0x28, | ||
12550 | 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01, 0xfe, 0x76, 0x19, 0xfe, | ||
12551 | 0x43, 0x48, 0xc4, 0xcc, | ||
12552 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, | ||
12553 | 0x6e, 0x41, 0x01, 0xb2, | ||
12554 | 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01, | ||
12555 | 0xfe, 0xcc, 0x15, 0x1d, | ||
12556 | 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe, 0xe5, 0x00, 0x03, | ||
12557 | 0x45, 0xc1, 0x0c, 0x45, | ||
12558 | 0x18, 0x06, 0x01, 0xb2, 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, | ||
12559 | 0xe2, 0x00, 0x27, 0xdb, | ||
12560 | 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07, | ||
12561 | 0xfe, 0x06, 0xf0, 0xfe, | ||
12562 | 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05, 0x0a, 0xfe, 0x2e, 0x12, | ||
12563 | 0x16, 0x19, 0x01, 0x0b, | ||
12564 | 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, | ||
12565 | 0xfe, 0x99, 0xa4, 0x01, | ||
12566 | 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38, | ||
12567 | 0x12, 0x08, 0x05, 0x1a, | ||
12568 | 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, | ||
12569 | 0x0b, 0x16, 0x00, 0x01, | ||
12570 | 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, | ||
12571 | 0xe2, 0x6c, 0x58, 0xbe, | ||
12572 | 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b, | ||
12573 | 0xfe, 0x09, 0x6f, 0xba, | ||
12574 | 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d, 0x8b, 0x6c, 0x7f, 0x27, | ||
12575 | 0xfe, 0x54, 0x07, 0x1c, | ||
12576 | 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, | ||
12577 | 0x07, 0x02, 0x24, 0x01, | ||
12578 | 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe, | ||
12579 | 0x2c, 0x90, 0xfe, 0xae, | ||
12580 | 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x54, 0x5a, | ||
12581 | 0x37, 0x22, 0x20, 0x07, | ||
12582 | 0x11, 0xfe, 0x0e, 0x12, 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, | ||
12583 | 0xfe, 0x06, 0x10, 0xfe, | ||
12584 | 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b, | ||
12585 | 0x37, 0x01, 0xb3, 0xb8, | ||
12586 | 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe, 0x08, 0x50, 0xfe, 0x8a, | ||
12587 | 0x50, 0xfe, 0x44, 0x51, | ||
12588 | 0xfe, 0xc6, 0x51, 0x88, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, | ||
12589 | 0x14, 0x5f, 0xfe, 0x0c, | ||
12590 | 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d, | ||
12591 | 0x14, 0x3e, 0xfe, 0x4a, | ||
12592 | 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, | ||
12593 | 0x90, 0x0c, 0x60, 0x14, | ||
12594 | 0x61, 0x08, 0x05, 0x5b, 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, | ||
12595 | 0xfe, 0x44, 0x90, 0xfe, | ||
12596 | 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, | ||
12597 | 0x0c, 0x5e, 0x14, 0x5f, | ||
12598 | 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d, 0x14, 0x3e, 0x0c, 0x2e, | ||
12599 | 0x14, 0x3c, 0x21, 0x0c, | ||
12600 | 0x49, 0x0c, 0x63, 0x08, 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, | ||
12601 | 0x27, 0xdd, 0xfe, 0x9e, | ||
12602 | 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe, | ||
12603 | 0x9a, 0x08, 0xc6, 0xfe, | ||
12604 | 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x94, 0x08, | ||
12605 | 0x95, 0x86, 0x02, 0x24, | ||
12606 | 0x01, 0x4b, 0xfe, 0xc9, 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, | ||
12607 | 0x06, 0xfe, 0x10, 0x12, | ||
12608 | 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e, | ||
12609 | 0x1c, 0x02, 0xfe, 0x18, | ||
12610 | 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a, 0xfe, 0x7a, 0x12, 0xfe, | ||
12611 | 0x2c, 0x1c, 0xfe, 0xaa, | ||
12612 | 0xf0, 0xfe, 0xd2, 0x09, 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, | ||
12613 | 0xde, 0x09, 0xfe, 0xb7, | ||
12614 | 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18, | ||
12615 | 0xfe, 0xf1, 0x18, 0xfe, | ||
12616 | 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, | ||
12617 | 0x14, 0x59, 0xfe, 0x95, | ||
12618 | 0x59, 0x1c, 0x85, 0xfe, 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, | ||
12619 | 0xfe, 0xf0, 0x08, 0xb5, | ||
12620 | 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18, | ||
12621 | 0x0b, 0xb6, 0xfe, 0xbf, | ||
12622 | 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, | ||
12623 | 0x12, 0xc2, 0xfe, 0xd2, | ||
12624 | 0xf0, 0x85, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, | ||
12625 | 0x06, 0x17, 0x85, 0xc5, | ||
12626 | 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15, | ||
12627 | 0x9d, 0x01, 0x36, 0x10, | ||
12628 | 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10, 0x80, 0x02, 0x65, 0xfe, | ||
12629 | 0x98, 0x80, 0xfe, 0x19, | ||
12630 | 0xe4, 0x0a, 0xfe, 0x1a, 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, | ||
12631 | 0xfe, 0x44, 0x54, 0xbe, | ||
12632 | 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08, | ||
12633 | 0x02, 0x4a, 0x08, 0x05, | ||
12634 | 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f, 0x14, 0x40, 0x9b, 0x2e, | ||
12635 | 0x9c, 0x3c, 0xfe, 0x6c, | ||
12636 | 0x18, 0xfe, 0xed, 0x18, 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, | ||
12637 | 0x3b, 0x40, 0x03, 0x49, | ||
12638 | 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18, | ||
12639 | 0x8f, 0xfe, 0xe3, 0x54, | ||
12640 | 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a, 0xfe, 0x37, 0xf0, 0xfe, | ||
12641 | 0xda, 0x09, 0xfe, 0x8b, | ||
12642 | 0xf0, 0xfe, 0x60, 0x09, 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, | ||
12643 | 0x0a, 0x3a, 0x49, 0x3b, | ||
12644 | 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00, | ||
12645 | 0xad, 0xfe, 0x01, 0x59, | ||
12646 | 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a, 0xfe, 0x24, 0x0a, 0x3a, | ||
12647 | 0x49, 0x8f, 0xfe, 0xe3, | ||
12648 | 0x54, 0x57, 0x49, 0x7d, 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, | ||
12649 | 0x4a, 0x3a, 0x49, 0x3b, | ||
12650 | 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63, | ||
12651 | 0x02, 0x4a, 0x08, 0x05, | ||
12652 | 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe, 0x66, 0x13, 0x22, 0x62, | ||
12653 | 0xb7, 0xfe, 0x03, 0xa1, | ||
12654 | 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, | ||
12655 | 0xfe, 0x86, 0x91, 0x6a, | ||
12656 | 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29, | ||
12657 | 0x61, 0x0c, 0x7f, 0x14, | ||
12658 | 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8, 0x6a, 0x2a, 0x13, 0x62, | ||
12659 | 0x9b, 0x2e, 0x9c, 0x3c, | ||
12660 | 0x3a, 0x3f, 0x3b, 0x40, 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, | ||
12661 | 0xfa, 0x3c, 0x01, 0xef, | ||
12662 | 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40, | ||
12663 | 0xe4, 0x08, 0x05, 0x1f, | ||
12664 | 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, | ||
12665 | 0x03, 0x5e, 0x29, 0x5f, | ||
12666 | 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, | ||
12667 | 0xf4, 0x09, 0x08, 0x05, | ||
12668 | 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19, | ||
12669 | 0x81, 0x50, 0xfe, 0x10, | ||
12670 | 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32, 0x07, 0xa6, 0x17, 0xfe, | ||
12671 | 0x08, 0x09, 0x12, 0xa6, | ||
12672 | 0x08, 0x05, 0x0a, 0xfe, 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, | ||
12673 | 0x08, 0x09, 0xfe, 0x0c, | ||
12674 | 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7, | ||
12675 | 0x08, 0x05, 0x0a, 0xfe, | ||
12676 | 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xf4, 0xc2, 0xfe, 0xd1, | ||
12677 | 0xf0, 0xe2, 0x15, 0x7e, | ||
12678 | 0x01, 0x36, 0x10, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, | ||
12679 | 0x57, 0x3d, 0xfe, 0xed, | ||
12680 | 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe, | ||
12681 | 0x00, 0xff, 0x35, 0xfe, | ||
12682 | 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6, 0x0b, 0xfe, 0x76, 0x18, | ||
12683 | 0x1e, 0x19, 0x8a, 0x03, | ||
12684 | 0xd2, 0x1e, 0x06, 0xfe, 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, | ||
12685 | 0xfe, 0xd1, 0xf0, 0xfe, | ||
12686 | 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42, | ||
12687 | 0x10, 0xfe, 0xce, 0xf0, | ||
12688 | 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xca, 0x0b, | ||
12689 | 0x10, 0xfe, 0x22, 0x00, | ||
12690 | 0x02, 0x65, 0xfe, 0xcb, 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, | ||
12691 | 0x02, 0x65, 0xfe, 0xd0, | ||
12692 | 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea, | ||
12693 | 0x0b, 0x10, 0x58, 0xfe, | ||
12694 | 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05, 0x1f, 0x4d, 0x10, 0xfe, | ||
12695 | 0x12, 0x00, 0x2c, 0x0f, | ||
12696 | 0xfe, 0x4e, 0x11, 0x27, 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, | ||
12697 | 0x0c, 0xbc, 0x17, 0x34, | ||
12698 | 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20, | ||
12699 | 0x0c, 0x1c, 0x34, 0x94, | ||
12700 | 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6, 0xdc, 0x02, 0x24, 0x01, | ||
12701 | 0x4b, 0xfe, 0xdb, 0x10, | ||
12702 | 0x12, 0xfe, 0xe8, 0x00, 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, | ||
12703 | 0x89, 0xf0, 0x24, 0x33, | ||
12704 | 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24, | ||
12705 | 0x33, 0x31, 0xdf, 0xbc, | ||
12706 | 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c, 0x06, 0xfe, 0x81, 0x49, | ||
12707 | 0x17, 0xfe, 0x2c, 0x0d, | ||
12708 | 0x08, 0x05, 0x0a, 0xfe, 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, | ||
12709 | 0x12, 0x55, 0xfe, 0x28, | ||
12710 | 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, | ||
12711 | 0x44, 0xfe, 0x28, 0x00, | ||
12712 | 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09, 0xa4, 0x01, 0xfe, 0x26, | ||
12713 | 0x0f, 0x64, 0x12, 0x2f, | ||
12714 | 0x01, 0x73, 0x02, 0x2b, 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, | ||
12715 | 0x0a, 0xfe, 0xb4, 0x10, | ||
12716 | 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82, | ||
12717 | 0xfe, 0x34, 0x46, 0xac, | ||
12718 | 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96, 0x10, 0x08, 0x54, 0x0a, | ||
12719 | 0x37, 0x01, 0xf5, 0x01, | ||
12720 | 0xf6, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, | ||
12721 | 0xfe, 0x2e, 0x03, 0x08, | ||
12722 | 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05, | ||
12723 | 0x1a, 0xfe, 0x58, 0x12, | ||
12724 | 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, | ||
12725 | 0xfe, 0x50, 0x0d, 0xfe, | ||
12726 | 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, | ||
12727 | 0xfe, 0xa9, 0x10, 0x10, | ||
12728 | 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10, | ||
12729 | 0xfe, 0x13, 0x00, 0xfe, | ||
12730 | 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41, 0x00, 0xaa, 0x10, 0xfe, | ||
12731 | 0x24, 0x00, 0x8c, 0xb5, | ||
12732 | 0xb6, 0x74, 0x03, 0x70, 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, | ||
12733 | 0xfe, 0x9d, 0x41, 0xfe, | ||
12734 | 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0, | ||
12735 | 0xb4, 0x15, 0xfe, 0x31, | ||
12736 | 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02, 0xd7, 0x42, 0xfe, 0x06, | ||
12737 | 0xec, 0xd0, 0xfc, 0x44, | ||
12738 | 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, | ||
12739 | 0x4b, 0x91, 0xfe, 0x75, | ||
12740 | 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01, | ||
12741 | 0x0e, 0xfe, 0x44, 0x48, | ||
12742 | 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09, 0x46, 0x01, 0x0e, 0x41, | ||
12743 | 0xfe, 0x41, 0x58, 0x09, | ||
12744 | 0xa4, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, | ||
12745 | 0x2e, 0x03, 0x09, 0x5d, | ||
12746 | 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, | ||
12747 | 0xce, 0x47, 0xfe, 0xad, | ||
12748 | 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x9e, 0x12, 0x21, 0x13, | ||
12749 | 0x59, 0x13, 0x9f, 0x13, | ||
12750 | 0xd5, 0x22, 0x2f, 0x41, 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, | ||
12751 | 0xe0, 0x0e, 0x0f, 0x06, | ||
12752 | 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe, | ||
12753 | 0x3a, 0x01, 0x56, 0xfe, | ||
12754 | 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00, 0x66, 0xfe, 0x04, 0xec, | ||
12755 | 0x20, 0x4f, 0xfe, 0x05, | ||
12756 | 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, | ||
12757 | 0x48, 0xf4, 0x0d, 0xfe, | ||
12758 | 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13, | ||
12759 | 0x15, 0x1a, 0x39, 0xa0, | ||
12760 | 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x1e, 0xfe, 0xf0, 0xff, | ||
12761 | 0x0c, 0xfe, 0x60, 0x01, | ||
12762 | 0x03, 0xfe, 0x3a, 0x01, 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, | ||
12763 | 0x06, 0x13, 0x2f, 0x12, | ||
12764 | 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12, | ||
12765 | 0x22, 0x9f, 0xb7, 0x13, | ||
12766 | 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24, 0x1c, 0x15, 0x19, 0x39, | ||
12767 | 0xa0, 0xb4, 0xfe, 0xd9, | ||
12768 | 0x10, 0xc3, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, | ||
12769 | 0xc3, 0xfe, 0x03, 0xdc, | ||
12770 | 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21, | ||
12771 | 0xfe, 0x00, 0xcc, 0x04, | ||
12772 | 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05, 0x58, 0xfe, 0x22, 0x13, | ||
12773 | 0xfe, 0x1c, 0x80, 0x07, | ||
12774 | 0x06, 0xfe, 0x1a, 0x13, 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, | ||
12775 | 0xfe, 0x0c, 0x90, 0xfe, | ||
12776 | 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, | ||
12777 | 0x0a, 0xfe, 0x3c, 0x50, | ||
12778 | 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f, 0xad, 0x01, 0xfe, 0xb4, | ||
12779 | 0x16, 0x08, 0x05, 0x1b, | ||
12780 | 0x4e, 0x01, 0xf5, 0x01, 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, | ||
12781 | 0xfe, 0x2c, 0x13, 0x01, | ||
12782 | 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90, | ||
12783 | 0x0c, 0xfe, 0x64, 0x01, | ||
12784 | 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe, 0x12, 0x12, 0xfe, 0x03, | ||
12785 | 0x80, 0x8d, 0xfe, 0x01, | ||
12786 | 0xec, 0x20, 0xfe, 0x80, 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, | ||
12787 | 0x22, 0x20, 0xfb, 0x79, | ||
12788 | 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, | ||
12789 | 0x03, 0xfe, 0xae, 0x00, | ||
12790 | 11841 | ||
12791 | 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, | 11842 | asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG; |
12792 | 0xb2, 0x00, 0xfe, 0x09, | ||
12793 | 0x58, 0xfe, 0x0a, 0x1c, 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, | ||
12794 | 0x45, 0x0f, 0x46, 0x52, | ||
12795 | 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc, | ||
12796 | 0x0f, 0x44, 0x11, 0x0f, | ||
12797 | 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xe4, | ||
12798 | 0x25, 0x11, 0x13, 0x20, | ||
12799 | 0x7c, 0x6f, 0x4f, 0x22, 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, | ||
12800 | 0x56, 0xfe, 0xd6, 0xf0, | ||
12801 | 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, | ||
12802 | 0x18, 0x1c, 0x04, 0x42, | ||
12803 | 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b, 0xfe, 0xce, 0x47, 0xfe, | ||
12804 | 0xf5, 0x13, 0x04, 0x01, | ||
12805 | 0xb0, 0x7c, 0x6f, 0x4f, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, | ||
12806 | 0x13, 0x32, 0x07, 0x2f, | ||
12807 | 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe, | ||
12808 | 0x41, 0x48, 0xfe, 0x45, | ||
12809 | 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, | ||
12810 | 0x07, 0x11, 0xac, 0x09, | ||
12811 | 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, | ||
12812 | 0x82, 0x4e, 0xfe, 0x14, | ||
12813 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d, | ||
12814 | 0xfe, 0x01, 0xec, 0xa2, | ||
12815 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1a, 0x79, | ||
12816 | 0x2a, 0x01, 0xe3, 0xfe, | ||
12817 | 0xdd, 0x10, 0x2c, 0xc7, 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, | ||
12818 | 0xfe, 0x48, 0x12, 0x07, | ||
12819 | 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17, | ||
12820 | 0xfe, 0x32, 0x12, 0x07, | ||
12821 | 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17, 0xfe, 0x9c, 0x12, 0x07, | ||
12822 | 0x1f, 0xfe, 0x12, 0x12, | ||
12823 | 0x07, 0x00, 0x17, 0x24, 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, | ||
12824 | 0x94, 0x4b, 0x04, 0x2d, | ||
12825 | 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d, | ||
12826 | 0x32, 0x07, 0xa6, 0xfe, | ||
12827 | 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe, 0xf0, 0x11, 0x08, 0x05, | ||
12828 | 0x5a, 0xfe, 0x72, 0x12, | ||
12829 | 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, | ||
12830 | 0xfe, 0x26, 0x13, 0x03, | ||
12831 | 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21, | ||
12832 | 0x0c, 0x7f, 0x0c, 0x80, | ||
12833 | 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01, 0xef, 0x9b, 0x2e, 0x9c, | ||
12834 | 0x3c, 0xfe, 0x04, 0x55, | ||
12835 | 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, | ||
12836 | 0x91, 0x10, 0x03, 0x3f, | ||
12837 | 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40, | ||
12838 | 0x88, 0x9b, 0x2e, 0x9c, | ||
12839 | 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x00, 0x56, 0xfe, 0xa1, | ||
12840 | 0x56, 0x0c, 0x5e, 0x14, | ||
12841 | 0x5f, 0x08, 0x05, 0x5a, 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, | ||
12842 | 0x03, 0x60, 0x29, 0x61, | ||
12843 | 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44, | ||
12844 | 0x50, 0xfe, 0xc6, 0x50, | ||
12845 | 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x3d, | ||
12846 | 0x29, 0x3e, 0xfe, 0x40, | ||
12847 | 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, | ||
12848 | 0x2d, 0x01, 0x0b, 0x1d, | ||
12849 | 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23, | ||
12850 | 0x72, 0x01, 0xaf, 0x1e, | ||
12851 | 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a, 0x3d, 0x3b, 0x3e, 0xfe, | ||
12852 | 0x0a, 0x55, 0x35, 0xfe, | ||
12853 | 0x8b, 0x55, 0x57, 0x3d, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, | ||
12854 | 0x02, 0x72, 0xfe, 0x19, | ||
12855 | 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34, | ||
12856 | 0x1d, 0xe8, 0x33, 0x31, | ||
12857 | 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a, 0x4d, 0x02, 0x4c, 0x01, | ||
12858 | 0x0b, 0x1c, 0x34, 0x1d, | ||
12859 | 0xe8, 0x33, 0x31, 0xdf, 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, | ||
12860 | 0x33, 0x31, 0xfe, 0xe8, | ||
12861 | 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53, | ||
12862 | 0x05, 0x1f, 0x35, 0xa9, | ||
12863 | 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06, 0x7c, 0x43, 0xfe, 0xda, | ||
12864 | 0x14, 0x01, 0xaf, 0x8c, | ||
12865 | 0xfe, 0x4b, 0x45, 0xee, 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, | ||
12866 | 0x03, 0x45, 0x28, 0x35, | ||
12867 | 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, | ||
12868 | 0x03, 0x5c, 0xc1, 0x0c, | ||
12869 | 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0x9e, 0x15, 0x02, | ||
12870 | 0x89, 0x01, 0x0b, 0x1c, | ||
12871 | 0x34, 0x1d, 0x4c, 0x33, 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, | ||
12872 | 0xfe, 0x42, 0x58, 0xf1, | ||
12873 | 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a, | ||
12874 | 0xf4, 0x06, 0xea, 0x32, | ||
12875 | 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x67, 0x2d, | ||
12876 | 0x01, 0x0b, 0x26, 0x89, | ||
12877 | 0x01, 0xfe, 0xcc, 0x15, 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, | ||
12878 | 0x26, 0xfe, 0xd4, 0x13, | ||
12879 | 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0, | ||
12880 | 0x13, 0x1c, 0xfe, 0xd0, | ||
12881 | 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01, 0x0b, 0xfe, 0xd5, 0x10, | ||
12882 | 0x0f, 0x71, 0xff, 0x02, | ||
12883 | 0x00, 0x57, 0x52, 0x93, 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, | ||
12884 | 0x00, 0x5c, 0x04, 0x0f, | ||
12885 | 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56, | ||
12886 | 0xfe, 0x00, 0x5c, 0x04, | ||
12887 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x04, 0x0f, 0x71, 0xff, | ||
12888 | 0x02, 0x00, 0x57, 0x52, | ||
12889 | 0x93, 0xfe, 0x0b, 0x58, 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, | ||
12890 | 0x87, 0x04, 0xfe, 0x03, | ||
12891 | 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52, | ||
12892 | 0xfe, 0x00, 0x7d, 0xfe, | ||
12893 | 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x6a, 0x2a, 0x0c, 0x5e, | ||
12894 | 0x14, 0x5f, 0x57, 0x3f, | ||
12895 | 0x7d, 0x40, 0x04, 0xdd, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, | ||
12896 | 0x5a, 0x8d, 0x04, 0x01, | ||
12897 | 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d, | ||
12898 | 0xfe, 0x96, 0x15, 0x33, | ||
12899 | 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, 0x33, 0x31, 0xfe, 0xe8, | ||
12900 | 0x0a, 0xfe, 0xc1, 0x59, | ||
12901 | 0x03, 0xcd, 0x28, 0xfe, 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, | ||
12902 | 0x21, 0x69, 0x1a, 0xee, | ||
12903 | 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c, | ||
12904 | 0x30, 0xfe, 0x78, 0x10, | ||
12905 | 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83, 0x55, 0x69, 0x19, 0xae, | ||
12906 | 0x98, 0xfe, 0x30, 0x00, | ||
12907 | 0x96, 0xf2, 0x18, 0x6d, 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, | ||
12908 | 0x98, 0xfe, 0x64, 0x00, | ||
12909 | 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28, | ||
12910 | 0x10, 0x69, 0x06, 0xfe, | ||
12911 | 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2, 0x09, 0xfe, 0xc8, 0x00, | ||
12912 | 0x18, 0x59, 0x0f, 0x06, | ||
12913 | 0x88, 0x98, 0xfe, 0x90, 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, | ||
12914 | 0x43, 0xf4, 0x9f, 0xfe, | ||
12915 | 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4, | ||
12916 | 0x9e, 0xfe, 0xf3, 0x10, | ||
12917 | 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e, 0x43, 0xec, 0xfe, 0x00, | ||
12918 | 0x17, 0xfe, 0x4d, 0xe4, | ||
12919 | 0x6e, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, | ||
12920 | 0x17, 0xfe, 0x4d, 0xe4, | ||
12921 | 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d, | ||
12922 | 0xf4, 0x00, 0xe9, 0x91, | ||
12923 | 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x04, 0x51, 0x0f, 0x0a, | ||
12924 | 0x04, 0x16, 0x06, 0x01, | ||
12925 | 0x0b, 0x26, 0xf3, 0x16, 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, | ||
12926 | 0x0b, 0x26, 0xf3, 0x76, | ||
12927 | 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, | ||
12928 | 0x16, 0x19, 0x01, 0x0b, | ||
12929 | 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, 0xfe, 0x89, 0x49, 0x01, | ||
12930 | 0x0b, 0x26, 0xb1, 0x76, | ||
12931 | 0xfe, 0x89, 0x4a, 0x01, 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, | ||
12932 | 0xfe, 0x48, 0x13, 0xb8, | ||
12933 | 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01, | ||
12934 | 0xec, 0xfe, 0x27, 0x01, | ||
12935 | 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x2e, 0x16, 0x32, | ||
12936 | 0x07, 0xfe, 0xe3, 0x00, | ||
12937 | 0xfe, 0x20, 0x13, 0x1d, 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, | ||
12938 | 0x22, 0xd4, 0x07, 0x06, | ||
12939 | 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e, | ||
12940 | 0x07, 0x11, 0xae, 0x09, | ||
12941 | 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x84, 0x01, | ||
12942 | 0x0e, 0x8e, 0xfe, 0x80, | ||
12943 | 0xe7, 0x11, 0x07, 0x11, 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, | ||
12944 | 0x09, 0x48, 0x01, 0x0e, | ||
12945 | 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80, | ||
12946 | 0x80, 0xfe, 0x80, 0x4c, | ||
12947 | 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, | ||
12948 | 0x09, 0x5d, 0x01, 0x87, | ||
12949 | 0x04, 0x18, 0x11, 0x75, 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, | ||
12950 | 0x19, 0xde, 0xfe, 0x24, | ||
12951 | 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4, | ||
12952 | 0x17, 0xad, 0x9a, 0x1b, | ||
12953 | 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04, 0xb9, 0x23, 0xfe, 0xde, | ||
12954 | 0x16, 0xfe, 0xda, 0x10, | ||
12955 | 0x18, 0x11, 0x75, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, | ||
12956 | 0x18, 0x58, 0x03, 0xfe, | ||
12957 | 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30, | ||
12958 | 0xf4, 0x06, 0xfe, 0x3c, | ||
12959 | 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x1f, | ||
12960 | 0x97, 0xfe, 0x38, 0x17, | ||
12961 | 0xfe, 0xb6, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, | ||
12962 | 0x10, 0x18, 0x11, 0x75, | ||
12963 | 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, | ||
12964 | 0x2e, 0x97, 0xfe, 0x5a, | ||
12965 | 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c, 0x1a, 0xfe, 0xaf, 0x19, | ||
12966 | 0xfe, 0x98, 0xe7, 0x00, | ||
12967 | 0x04, 0xb9, 0x23, 0xfe, 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, | ||
12968 | 0xfe, 0x30, 0xbc, 0xfe, | ||
12969 | 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, | ||
12970 | 0xcb, 0x97, 0xfe, 0x92, | ||
12971 | 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x7e, 0x17, 0xfe, | ||
12972 | 0x42, 0x10, 0xfe, 0x02, | ||
12973 | 0xf6, 0x11, 0x75, 0xfe, 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, | ||
12974 | 0x03, 0xa1, 0xfe, 0x1d, | ||
12975 | 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, | ||
12976 | 0x9a, 0x5b, 0x41, 0xfe, | ||
12977 | 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x11, 0xfe, 0x81, 0xe7, | ||
12978 | 0x11, 0x12, 0xfe, 0xdd, | ||
12979 | 0x00, 0x6a, 0x2a, 0x04, 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, | ||
12980 | 0x17, 0x15, 0x06, 0x39, | ||
12981 | 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04, | ||
12982 | 0xfe, 0x7e, 0x18, 0x1e, | ||
12983 | 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, 0x1e, 0x06, 0xfe, 0xef, | ||
12984 | 0x12, 0xfe, 0xe1, 0x10, | ||
12985 | 0x7c, 0x6f, 0x4f, 0x32, 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, | ||
12986 | 0x13, 0x42, 0x92, 0x09, | ||
12987 | 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, | ||
12988 | 0xf0, 0xfe, 0x00, 0xcc, | ||
12989 | 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, | ||
12990 | 0x0e, 0xfe, 0x80, 0x4c, | ||
12991 | 0x01, 0x73, 0xfe, 0x16, 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, | ||
12992 | 0x24, 0x12, 0xfe, 0x14, | ||
12993 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c, | ||
12994 | 0xe7, 0x0a, 0x10, 0xfe, | ||
12995 | 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, 0x06, 0x04, 0x42, 0x92, | ||
12996 | 0x08, 0x54, 0x1b, 0x37, | ||
12997 | 0x12, 0x2f, 0x01, 0x73, 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, | ||
12998 | 0x90, 0x3a, 0xce, 0x3b, | ||
12999 | 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77, | ||
13000 | 0x13, 0xa3, 0x04, 0x09, | ||
13001 | 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, 0x01, 0x0e, 0xfe, 0x49, | ||
13002 | 0x44, 0x17, 0xfe, 0xe8, | ||
13003 | 0x18, 0x77, 0x78, 0x04, 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, | ||
13004 | 0x5d, 0x01, 0xa8, 0x09, | ||
13005 | 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe, | ||
13006 | 0x1c, 0x19, 0x03, 0xfe, | ||
13007 | 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xc9, | ||
13008 | 0x6b, 0xfe, 0x2e, 0x19, | ||
13009 | 0x03, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, | ||
13010 | 0xfe, 0x0b, 0x00, 0x6b, | ||
13011 | 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe, | ||
13012 | 0x08, 0x10, 0x03, 0xfe, | ||
13013 | 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, 0x45, 0xea, 0xba, 0xff, | ||
13014 | 0x04, 0x68, 0x54, 0xe7, | ||
13015 | 0x1e, 0x6e, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, | ||
13016 | 0x1a, 0xf4, 0xfe, 0x00, | ||
13017 | 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19, | ||
13018 | 0x04, 0x07, 0x7e, 0xfe, | ||
13019 | 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, | ||
13020 | 0x07, 0x1a, 0xfe, 0x5a, | ||
13021 | 0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, | ||
13022 | 0x25, 0x6d, 0xe5, 0x07, | ||
13023 | 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59, | ||
13024 | 0xa9, 0xb8, 0x04, 0x15, | ||
13025 | 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe, | ||
13026 | 0x40, 0x5c, 0x04, 0x1c, | ||
13027 | 0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, | ||
13028 | 0xf7, 0xfe, 0x82, 0xf0, | ||
13029 | 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00, | ||
13030 | }; | ||
13031 | 11843 | ||
13032 | static unsigned short _adv_asc38C0800_size = sizeof(_adv_asc38C0800_buf); /* 0x14E1 */ | 11844 | switch (warn_code) { |
13033 | static ADV_DCNT _adv_asc38C0800_chksum = 0x050D3FD8UL; /* Expanded little-endian checksum. */ | 11845 | case 0: /* No error. */ |
11846 | break; | ||
11847 | case ASC_WARN_IO_PORT_ROTATE: | ||
11848 | shost_printk(KERN_WARNING, shost, "I/O port address " | ||
11849 | "modified\n"); | ||
11850 | break; | ||
11851 | case ASC_WARN_AUTO_CONFIG: | ||
11852 | shost_printk(KERN_WARNING, shost, "I/O port increment switch " | ||
11853 | "enabled\n"); | ||
11854 | break; | ||
11855 | case ASC_WARN_EEPROM_CHKSUM: | ||
11856 | shost_printk(KERN_WARNING, shost, "EEPROM checksum error\n"); | ||
11857 | break; | ||
11858 | case ASC_WARN_IRQ_MODIFIED: | ||
11859 | shost_printk(KERN_WARNING, shost, "IRQ modified\n"); | ||
11860 | break; | ||
11861 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
11862 | shost_printk(KERN_WARNING, shost, "tag queuing w/o " | ||
11863 | "disconnects\n"); | ||
11864 | break; | ||
11865 | default: | ||
11866 | shost_printk(KERN_WARNING, shost, "unknown warning: 0x%x\n", | ||
11867 | warn_code); | ||
11868 | break; | ||
11869 | } | ||
13034 | 11870 | ||
13035 | /* Microcode buffer is kept after initialization for error recovery. */ | 11871 | if (asc_dvc->err_code != 0) |
13036 | static unsigned char _adv_asc38C1600_buf[] = { | 11872 | shost_printk(KERN_ERR, shost, "error 0x%x at init_state " |
13037 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0, | 11873 | "0x%x\n", asc_dvc->err_code, asc_dvc->init_state); |
13038 | 0x18, 0xe4, 0x01, 0x00, | ||
13039 | 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00, | ||
13040 | 0x07, 0x17, 0xc0, 0x5f, | ||
13041 | 0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, | ||
13042 | 0x85, 0xf0, 0x86, 0xf0, | ||
13043 | 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00, | ||
13044 | 0x98, 0x57, 0x01, 0xe6, | ||
13045 | 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d, | ||
13046 | 0x38, 0x54, 0x32, 0xf0, | ||
13047 | 0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, | ||
13048 | 0x00, 0xe6, 0xb1, 0xf0, | ||
13049 | 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01, | ||
13050 | 0x06, 0x13, 0x0c, 0x1c, | ||
13051 | 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12, | ||
13052 | 0xb9, 0x54, 0x00, 0x80, | ||
13053 | 0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, | ||
13054 | 0x03, 0xe6, 0x01, 0xea, | ||
13055 | 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, | ||
13056 | 0x04, 0x13, 0xbb, 0x55, | ||
13057 | 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00, | ||
13058 | 0xbb, 0x00, 0xc0, 0x00, | ||
13059 | 0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, | ||
13060 | 0x4c, 0x1c, 0x4e, 0x1c, | ||
13061 | 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00, | ||
13062 | 0x24, 0x01, 0x3c, 0x01, | ||
13063 | 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, | ||
13064 | 0x78, 0x01, 0x7c, 0x01, | ||
13065 | 0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, | ||
13066 | 0x6e, 0x1e, 0x02, 0x48, | ||
13067 | 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7, | ||
13068 | 0x03, 0xfc, 0x06, 0x00, | ||
13069 | 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a, | ||
13070 | 0x30, 0x1c, 0x38, 0x1c, | ||
13071 | 0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, | ||
13072 | 0x5d, 0xf0, 0xa7, 0xf0, | ||
13073 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00, | ||
13074 | 0x33, 0x00, 0x34, 0x00, | ||
13075 | 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, | ||
13076 | 0x79, 0x01, 0x3c, 0x09, | ||
13077 | 0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, | ||
13078 | 0x40, 0x16, 0x50, 0x16, | ||
13079 | 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc, | ||
13080 | 0x05, 0xf0, 0x09, 0xf0, | ||
13081 | 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00, | ||
13082 | 0x9c, 0x00, 0xa4, 0x00, | ||
13083 | 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, | ||
13084 | 0xe9, 0x09, 0x5c, 0x0c, | ||
13085 | 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, | ||
13086 | 0x42, 0x1d, 0x08, 0x44, | ||
13087 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54, | ||
13088 | 0x83, 0x55, 0x83, 0x59, | ||
13089 | 0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, | ||
13090 | 0x4b, 0xf4, 0x04, 0xf8, | ||
13091 | 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, | ||
13092 | 0xa8, 0x00, 0xaa, 0x00, | ||
13093 | 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01, | ||
13094 | 0x7a, 0x01, 0x82, 0x01, | ||
13095 | 0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, | ||
13096 | 0x68, 0x08, 0x10, 0x0d, | ||
13097 | 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10, | ||
13098 | 0xf3, 0x10, 0x06, 0x12, | ||
13099 | 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c, | ||
13100 | 0xf0, 0x35, 0x05, 0xfe, | ||
13101 | 0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, | ||
13102 | 0xfe, 0x88, 0x01, 0xff, | ||
13103 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, | ||
13104 | 0x00, 0xfe, 0x57, 0x24, | ||
13105 | 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09, | ||
13106 | 0x00, 0x00, 0xff, 0x08, | ||
13107 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, | ||
13108 | 0xff, 0xff, 0xff, 0x13, | ||
13109 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, | ||
13110 | 0xfe, 0x04, 0xf7, 0xe8, | ||
13111 | 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d, | ||
13112 | 0x0d, 0x51, 0x37, 0xfe, | ||
13113 | 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, | ||
13114 | 0xfe, 0xf8, 0x01, 0xfe, | ||
13115 | 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d, | ||
13116 | 0x05, 0xfe, 0x08, 0x0f, | ||
13117 | 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe, | ||
13118 | 0x28, 0x1c, 0x03, 0xfe, | ||
13119 | 0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, | ||
13120 | 0x48, 0xf0, 0xfe, 0x90, | ||
13121 | 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8, | ||
13122 | 0x02, 0xfe, 0x46, 0xf0, | ||
13123 | 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0, | ||
13124 | 0xfe, 0x4e, 0x02, 0xfe, | ||
13125 | 0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, | ||
13126 | 0x0d, 0xa2, 0x1c, 0x07, | ||
13127 | 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02, | ||
13128 | 0x1c, 0xf5, 0xfe, 0x1e, | ||
13129 | 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, | ||
13130 | 0xde, 0x0a, 0x81, 0x01, | ||
13131 | 0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, | ||
13132 | 0x81, 0x01, 0x5c, 0xfe, | ||
13133 | 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, | ||
13134 | 0xfe, 0x58, 0x1c, 0x1c, | ||
13135 | 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02, | ||
13136 | 0x2b, 0xfe, 0x9e, 0x02, | ||
13137 | 0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, | ||
13138 | 0x00, 0x47, 0xb8, 0x01, | ||
13139 | 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09, | ||
13140 | 0x1a, 0x31, 0xfe, 0x69, | ||
13141 | 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe, | ||
13142 | 0x1e, 0x1e, 0x20, 0x2c, | ||
13143 | 0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, | ||
13144 | 0x44, 0x15, 0x56, 0x51, | ||
13145 | 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57, | ||
13146 | 0x01, 0x18, 0x09, 0x00, | ||
13147 | 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01, | ||
13148 | 0x18, 0xfe, 0xc8, 0x54, | ||
13149 | 0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, | ||
13150 | 0xfe, 0x02, 0xe8, 0x30, | ||
13151 | 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0, | ||
13152 | 0xfe, 0xe4, 0x01, 0xfe, | ||
13153 | 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe, | ||
13154 | 0x26, 0xf0, 0xfe, 0x66, | ||
13155 | 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, | ||
13156 | 0xef, 0x10, 0xfe, 0x9f, | ||
13157 | 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05, | ||
13158 | 0x70, 0x37, 0xfe, 0x48, | ||
13159 | 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26, | ||
13160 | 0x21, 0xb9, 0xc7, 0x20, | ||
13161 | 0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, | ||
13162 | 0xe1, 0x2a, 0xeb, 0xfe, | ||
13163 | 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32, | ||
13164 | 0x15, 0xfe, 0xe4, 0x00, | ||
13165 | 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41, | ||
13166 | 0xfe, 0x06, 0xf0, 0xfe, | ||
13167 | 0xd6, 0x03, 0xaf, 0xa0, 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, | ||
13168 | 0x03, 0x81, 0x1e, 0x1b, | ||
13169 | 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05, | ||
13170 | 0xea, 0xfe, 0x46, 0x1c, | ||
13171 | 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, | ||
13172 | 0xfe, 0x48, 0x1c, 0x75, | ||
13173 | 0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, | ||
13174 | 0xe1, 0x01, 0x18, 0x77, | ||
13175 | 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42, | ||
13176 | 0x8f, 0xfe, 0x70, 0x02, | ||
13177 | 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, 0x2f, 0xfe, 0x4e, 0x04, | ||
13178 | 0x16, 0xfe, 0x4a, 0x04, | ||
13179 | 0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, | ||
13180 | 0x02, 0x00, 0x10, 0x01, | ||
13181 | 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25, | ||
13182 | 0xee, 0xfe, 0x4c, 0x44, | ||
13183 | 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54, | ||
13184 | 0x7b, 0xec, 0x60, 0x8d, | ||
13185 | 0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, | ||
13186 | 0x0c, 0x06, 0x28, 0xfe, | ||
13187 | 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10, | ||
13188 | 0x13, 0x34, 0xfe, 0x4c, | ||
13189 | 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x54, | ||
13190 | 0x13, 0x01, 0x0c, 0x06, | ||
13191 | 0x28, 0xa5, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, | ||
13192 | 0x28, 0xf9, 0x1f, 0x7f, | ||
13193 | 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f, | ||
13194 | 0xfe, 0xa4, 0x0e, 0x05, | ||
13195 | 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, 0x1c, 0x90, 0x04, 0xfe, | ||
13196 | 0x9c, 0x93, 0x3a, 0x0b, | ||
13197 | 0x0e, 0x8b, 0x02, 0x1f, 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, | ||
13198 | 0x7d, 0x1d, 0xfe, 0x46, | ||
13199 | 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04, | ||
13200 | 0xfe, 0x87, 0x83, 0xfe, | ||
13201 | 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x98, | ||
13202 | 0x13, 0x0f, 0xfe, 0x20, | ||
13203 | 0x80, 0x04, 0xfe, 0xa0, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, | ||
13204 | 0x12, 0x01, 0x38, 0x06, | ||
13205 | 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda, | ||
13206 | 0x05, 0xd0, 0x54, 0x01, | ||
13207 | 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x1e, 0xfe, | ||
13208 | 0x50, 0x12, 0x5e, 0xff, | ||
13209 | 0x02, 0x00, 0x10, 0x2f, 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, | ||
13210 | 0x00, 0x10, 0x2f, 0xfe, | ||
13211 | 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01, | ||
13212 | 0x38, 0xfe, 0x4a, 0xf0, | ||
13213 | 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba, 0x05, 0x71, 0x2e, 0xfe, | ||
13214 | 0x21, 0x00, 0xf1, 0x2e, | ||
13215 | 0xfe, 0x22, 0x00, 0xa2, 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, | ||
13216 | 0x10, 0x2f, 0xfe, 0xd0, | ||
13217 | 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe, | ||
13218 | 0x1c, 0x00, 0x4d, 0x01, | ||
13219 | 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27, 0x01, 0x01, 0x0c, 0x06, | ||
13220 | 0x28, 0xfe, 0x24, 0x12, | ||
13221 | 0x3e, 0x01, 0x84, 0x1f, 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, | ||
13222 | 0x0d, 0x00, 0x01, 0x42, | ||
13223 | 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13, | ||
13224 | 0x03, 0xb6, 0x1e, 0xfe, | ||
13225 | 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13, 0x3e, 0x01, 0x84, 0x17, | ||
13226 | 0xfe, 0x72, 0x06, 0x0a, | ||
13227 | 0x07, 0x01, 0x38, 0x06, 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, | ||
13228 | 0x19, 0x16, 0xfe, 0x68, | ||
13229 | 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66, | ||
13230 | 0x03, 0x9a, 0x1e, 0xfe, | ||
13231 | 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13, 0x01, 0xc6, 0x09, 0x12, | ||
13232 | 0x48, 0xfe, 0x92, 0x06, | ||
13233 | 0x2e, 0x12, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, | ||
13234 | 0x58, 0xff, 0x02, 0x00, | ||
13235 | 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17, | ||
13236 | 0xfe, 0xea, 0x06, 0x01, | ||
13237 | 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01, 0xfe, 0x84, 0x19, 0x16, | ||
13238 | 0xfe, 0xe0, 0x06, 0x15, | ||
13239 | 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, | ||
13240 | 0x01, 0x84, 0xfe, 0xae, | ||
13241 | 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a, | ||
13242 | 0x1e, 0xfe, 0x1a, 0x12, | ||
13243 | 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, | ||
13244 | 0x43, 0x48, 0x62, 0x80, | ||
13245 | 0xf0, 0x45, 0x0a, 0x95, 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, | ||
13246 | 0x36, 0xfe, 0x02, 0xf6, | ||
13247 | 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e, | ||
13248 | 0xd0, 0x0d, 0x17, 0xfe, | ||
13249 | 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe, 0x90, 0x07, 0x26, 0x20, | ||
13250 | 0x9e, 0x15, 0x82, 0x01, | ||
13251 | 0x41, 0x15, 0xe2, 0x21, 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, | ||
13252 | 0x57, 0x10, 0xe6, 0x05, | ||
13253 | 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84, | ||
13254 | 0xfe, 0x9c, 0x32, 0x5f, | ||
13255 | 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00, 0x2f, 0xed, 0x2a, 0x3c, | ||
13256 | 0xfe, 0x0a, 0xf0, 0xfe, | ||
13257 | 0xce, 0x07, 0xae, 0xfe, 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, | ||
13258 | 0xaf, 0xa0, 0x05, 0x29, | ||
13259 | 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14, | ||
13260 | 0x00, 0x01, 0x08, 0x14, | ||
13261 | 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, | ||
13262 | 0x14, 0x00, 0x05, 0xfe, | ||
13263 | 0xc6, 0x09, 0x01, 0x76, 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, | ||
13264 | 0x12, 0xfe, 0x30, 0x13, | ||
13265 | 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, | ||
13266 | 0x01, 0x08, 0x14, 0x00, | ||
13267 | 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00, 0x05, 0xef, 0x7c, 0x4a, | ||
13268 | 0x78, 0x4f, 0x0f, 0xfe, | ||
13269 | 0x9a, 0x81, 0x04, 0xfe, 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, | ||
13270 | 0x28, 0x48, 0xfe, 0x6c, | ||
13271 | 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32, | ||
13272 | 0x12, 0x53, 0x63, 0x4e, | ||
13273 | 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, | ||
13274 | 0x6c, 0x08, 0xaf, 0xa0, | ||
13275 | 0xae, 0xfe, 0x96, 0x08, 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, | ||
13276 | 0x05, 0xed, 0xfe, 0x9c, | ||
13277 | 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe, | ||
13278 | 0x1e, 0xfe, 0x99, 0x58, | ||
13279 | 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe, 0x16, 0x09, 0x10, 0x6a, | ||
13280 | 0x22, 0x6b, 0x01, 0x0c, | ||
13281 | 0x61, 0x54, 0x44, 0x21, 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, | ||
13282 | 0x1e, 0x47, 0x2c, 0x7a, | ||
13283 | 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40, | ||
13284 | 0x01, 0x0c, 0x61, 0x65, | ||
13285 | 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20, 0x6e, 0x01, 0xfe, 0x6a, | ||
13286 | 0x16, 0xfe, 0x08, 0x50, | ||
13287 | 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, | ||
13288 | 0x01, 0xfe, 0xce, 0x1e, | ||
13289 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e, | ||
13290 | 0x01, 0xfe, 0xfe, 0x1e, | ||
13291 | 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b, 0x22, 0x4c, 0xfe, 0x8a, | ||
13292 | 0x10, 0x01, 0x0c, 0x06, | ||
13293 | 0x54, 0xfe, 0x50, 0x12, 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, | ||
13294 | 0x10, 0x6a, 0x22, 0x6b, | ||
13295 | 0x01, 0x0c, 0x06, 0x65, 0x4e, 0x01, 0xc2, 0x0f, 0xfe, 0x1f, 0x80, 0x04, | ||
13296 | 0xfe, 0x9f, 0x83, 0x33, | ||
13297 | 0x0b, 0x0e, 0x20, 0x6e, 0x0f, 0xfe, 0x44, 0x90, 0x04, 0xfe, 0xc4, 0x93, | ||
13298 | 0x3a, 0x0b, 0xfe, 0xc6, | ||
13299 | 0x90, 0x04, 0xfe, 0xc6, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x6c, 0x22, 0x6d, | ||
13300 | 0x01, 0xfe, 0xce, 0x1e, | ||
13301 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x0f, 0xfe, 0x40, 0x90, | ||
13302 | 0x04, 0xfe, 0xc0, 0x93, | ||
13303 | 0x3a, 0x0b, 0xfe, 0xc2, 0x90, 0x04, 0xfe, 0xc2, 0x93, 0x79, 0x0b, 0x0e, | ||
13304 | 0x10, 0x4b, 0x22, 0x4c, | ||
13305 | 0x10, 0x64, 0x22, 0x34, 0x01, 0x0c, 0x61, 0x24, 0x44, 0x37, 0x13, 0xfe, | ||
13306 | 0x4e, 0x11, 0x2f, 0xfe, | ||
13307 | 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b, | ||
13308 | 0x3c, 0x37, 0x88, 0xf5, | ||
13309 | 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a, 0xd2, 0xfe, 0x1e, 0x0a, | ||
13310 | 0xd3, 0xfe, 0x42, 0x0a, | ||
13311 | 0xae, 0xfe, 0x12, 0x0a, 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, | ||
13312 | 0x05, 0x29, 0x01, 0x41, | ||
13313 | 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07, | ||
13314 | 0xfe, 0x14, 0x12, 0x01, | ||
13315 | 0x76, 0x06, 0x0d, 0x5d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x74, 0x12, 0xfe, | ||
13316 | 0x2e, 0x1c, 0x05, 0xfe, | ||
13317 | 0x1a, 0x0c, 0x01, 0x76, 0x06, 0x07, 0x5d, 0x01, 0x76, 0x06, 0x0d, 0x41, | ||
13318 | 0xfe, 0x2c, 0x1c, 0xfe, | ||
13319 | 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe, | ||
13320 | 0x92, 0x10, 0xc4, 0xf6, | ||
13321 | 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe, 0x1a, 0x0c, 0xc5, 0xfe, | ||
13322 | 0xe7, 0x10, 0xfe, 0x2b, | ||
13323 | 0xf0, 0xbf, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, | ||
13324 | 0xac, 0xfe, 0xd2, 0xf0, | ||
13325 | 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07, | ||
13326 | 0x1b, 0xbf, 0xd4, 0x5b, | ||
13327 | 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5, 0xfe, 0xa9, 0x10, 0x75, | ||
13328 | 0x5e, 0x32, 0x1f, 0x7f, | ||
13329 | 0x01, 0x42, 0x19, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, | ||
13330 | 0x05, 0x70, 0xfe, 0x74, | ||
13331 | 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78, | ||
13332 | 0x0f, 0x4d, 0x01, 0xfe, | ||
13333 | 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05, 0x5b, 0x01, 0x0c, 0x06, | ||
13334 | 0x0d, 0x2b, 0xfe, 0xe2, | ||
13335 | 0x0b, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, | ||
13336 | 0xfe, 0x88, 0x13, 0x21, | ||
13337 | 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe, | ||
13338 | 0x83, 0x83, 0xfe, 0xc9, | ||
13339 | 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42, 0x13, 0x0f, 0xfe, 0x04, | ||
13340 | 0x91, 0x04, 0xfe, 0x84, | ||
13341 | 0x93, 0xfe, 0xca, 0x57, 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, | ||
13342 | 0xfe, 0xcb, 0x57, 0x0b, | ||
13343 | 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03, | ||
13344 | 0x6a, 0x3b, 0x6b, 0x10, | ||
13345 | 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01, 0xc2, 0xc8, 0x7a, 0x30, | ||
13346 | 0x20, 0x6e, 0xdb, 0x64, | ||
13347 | 0xdc, 0x34, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, | ||
13348 | 0xfe, 0x04, 0xfa, 0x64, | ||
13349 | 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97, | ||
13350 | 0x10, 0x98, 0x91, 0x6c, | ||
13351 | 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06, 0x24, 0x1b, 0x40, 0x91, | ||
13352 | 0x4b, 0x7e, 0x4c, 0x01, | ||
13353 | 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, | ||
13354 | 0x58, 0xfe, 0x91, 0x58, | ||
13355 | 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24, | ||
13356 | 0x1b, 0x40, 0x01, 0x0c, | ||
13357 | 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe, 0x8e, 0x1e, 0x4f, 0x0f, | ||
13358 | 0xfe, 0x10, 0x90, 0x04, | ||
13359 | 0xfe, 0x90, 0x93, 0x3a, 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, | ||
13360 | 0x79, 0x0b, 0x0e, 0xfe, | ||
13361 | 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb, | ||
13362 | 0x01, 0x0c, 0x06, 0x0d, | ||
13363 | 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e, 0xfe, 0x6e, 0x0a, 0xfe, | ||
13364 | 0x0c, 0x58, 0xfe, 0x8d, | ||
13365 | 0x58, 0x05, 0x5b, 0x26, 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, | ||
13366 | 0x83, 0x33, 0x0b, 0x0e, | ||
13367 | 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, | ||
13368 | 0x19, 0xfe, 0x19, 0x41, | ||
13369 | 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef, 0x1f, 0x92, 0x01, 0x42, | ||
13370 | 0x19, 0xfe, 0x44, 0x00, | ||
13371 | 0xfe, 0x90, 0x10, 0xfe, 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, | ||
13372 | 0x4c, 0xfe, 0x0c, 0x51, | ||
13373 | 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe, | ||
13374 | 0x76, 0x10, 0xac, 0xfe, | ||
13375 | 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x5d, 0x03, | ||
13376 | 0xe3, 0x23, 0x07, 0xfe, | ||
13377 | 0x08, 0x13, 0x19, 0xfe, 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, | ||
13378 | 0xcc, 0x0c, 0x1f, 0x92, | ||
13379 | 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2, | ||
13380 | 0x0c, 0xfe, 0x3e, 0x10, | ||
13381 | 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe, 0x22, 0x00, 0x05, 0x70, | ||
13382 | 0xfe, 0xcb, 0xf0, 0xfe, | ||
13383 | 0xea, 0x0c, 0x19, 0xfe, 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, | ||
13384 | 0xf4, 0x0c, 0x19, 0x94, | ||
13385 | 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3, | ||
13386 | 0xfe, 0xcc, 0xf0, 0xef, | ||
13387 | 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12, 0x00, 0x37, 0x13, 0xfe, | ||
13388 | 0x4e, 0x11, 0x2f, 0xfe, | ||
13389 | 0x16, 0x0d, 0xfe, 0x9e, 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, | ||
13390 | 0x3c, 0x37, 0x88, 0xf5, | ||
13391 | 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32, | ||
13392 | 0x2f, 0xfe, 0x3e, 0x0d, | ||
13393 | 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0, 0xd4, 0x9f, 0xd5, 0x9f, | ||
13394 | 0xd2, 0x9f, 0xd3, 0x9f, | ||
13395 | 0x05, 0x29, 0x01, 0x41, 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, | ||
13396 | 0xc5, 0x75, 0xd7, 0x99, | ||
13397 | 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8, | ||
13398 | 0x9c, 0x2f, 0xfe, 0x8c, | ||
13399 | 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01, 0x48, 0xa4, 0x19, 0xfe, | ||
13400 | 0x42, 0x00, 0x05, 0x70, | ||
13401 | 0x90, 0x07, 0xfe, 0x81, 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, | ||
13402 | 0x0d, 0xfe, 0x44, 0x13, | ||
13403 | 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b, | ||
13404 | 0xfe, 0xda, 0x0e, 0x0a, | ||
13405 | 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe, 0x28, 0x00, 0xfe, 0xfa, | ||
13406 | 0x10, 0x01, 0xfe, 0xf4, | ||
13407 | 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, | ||
13408 | 0x15, 0x56, 0x01, 0x85, | ||
13409 | 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe, | ||
13410 | 0xcc, 0x10, 0x01, 0xa7, | ||
13411 | 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f, 0xfe, 0x19, 0x82, 0x04, | ||
13412 | 0xfe, 0x99, 0x83, 0xfe, | ||
13413 | 0xcc, 0x47, 0x0b, 0x0e, 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, | ||
13414 | 0x43, 0x00, 0xfe, 0xa2, | ||
13415 | 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, | ||
13416 | 0x00, 0x1d, 0x40, 0x15, | ||
13417 | 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01, 0xfe, 0x9e, 0x1e, 0x05, | ||
13418 | 0xfe, 0x3a, 0x03, 0x01, | ||
13419 | 0x0c, 0x06, 0x0d, 0x5d, 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, | ||
13420 | 0x76, 0x06, 0x12, 0xfe, | ||
13421 | 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c, | ||
13422 | 0xfe, 0x9d, 0xf0, 0xfe, | ||
13423 | 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x94, 0x0e, 0x01, | ||
13424 | 0x0c, 0x61, 0x12, 0x44, | ||
13425 | 0xfe, 0x9f, 0x10, 0x19, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, | ||
13426 | 0xfe, 0x2e, 0x10, 0x19, | ||
13427 | 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19, | ||
13428 | 0xfe, 0x41, 0x00, 0xa2, | ||
13429 | 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75, 0x03, 0x81, 0x1e, 0x2b, | ||
13430 | 0xea, 0x4f, 0xfe, 0x04, | ||
13431 | 0xe6, 0x12, 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, | ||
13432 | 0x35, 0xfe, 0x12, 0x1c, | ||
13433 | 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01, | ||
13434 | 0xfe, 0xd4, 0x11, 0x05, | ||
13435 | 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e, 0x47, 0x46, 0x28, 0xfe, | ||
13436 | 0xce, 0x45, 0x31, 0x51, | ||
13437 | 0xfe, 0x06, 0xea, 0xe0, 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, | ||
13438 | 0x67, 0xfe, 0x98, 0x56, | ||
13439 | 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01, | ||
13440 | 0x0c, 0x06, 0x28, 0xfe, | ||
13441 | 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe, 0x41, 0x58, 0x0a, 0xba, | ||
13442 | 0xfe, 0xfa, 0x14, 0xfe, | ||
13443 | 0x49, 0x54, 0xb0, 0xfe, 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, | ||
13444 | 0xfe, 0xe0, 0x14, 0xfe, | ||
13445 | 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47, | ||
13446 | 0xfe, 0xad, 0x13, 0x05, | ||
13447 | 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12, 0x26, 0x20, 0x96, 0x20, | ||
13448 | 0xe7, 0xfe, 0x08, 0x1c, | ||
13449 | 0xfe, 0x7c, 0x19, 0xfe, 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, | ||
13450 | 0x48, 0x55, 0xa5, 0x3b, | ||
13451 | 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe, | ||
13452 | 0xf0, 0x1a, 0x03, 0xfe, | ||
13453 | 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe, 0x1e, 0x10, 0xfe, 0x02, | ||
13454 | 0xec, 0xe7, 0x53, 0x00, | ||
13455 | 0x36, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, | ||
13456 | 0x01, 0xfe, 0x62, 0x1b, | ||
13457 | 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02, | ||
13458 | 0xea, 0xe7, 0x53, 0x92, | ||
13459 | 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3, 0xfe, 0x2a, 0x10, 0x03, | ||
13460 | 0xfe, 0x38, 0x01, 0x23, | ||
13461 | 0xfe, 0xf0, 0xff, 0x10, 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, | ||
13462 | 0x01, 0x01, 0xfe, 0x1e, | ||
13463 | 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02, | ||
13464 | 0x26, 0x02, 0x21, 0x96, | ||
13465 | 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13, 0x1f, 0x1d, 0x47, 0xb5, | ||
13466 | 0xc3, 0xfe, 0xe1, 0x10, | ||
13467 | 0xcf, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, | ||
13468 | 0xfe, 0x03, 0xdc, 0xfe, | ||
13469 | 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe, | ||
13470 | 0x00, 0xcc, 0x02, 0xfe, | ||
13471 | 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, | ||
13472 | 0x0f, 0xfe, 0x1c, 0x80, | ||
13473 | 0x04, 0xfe, 0x9c, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, | ||
13474 | 0x0f, 0xfe, 0x1e, 0x80, | ||
13475 | 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe, | ||
13476 | 0x1d, 0x80, 0x04, 0xfe, | ||
13477 | 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c, 0x13, 0x01, 0xfe, 0xee, | ||
13478 | 0x1e, 0xac, 0xfe, 0x14, | ||
13479 | 0x13, 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, | ||
13480 | 0x1f, 0xfe, 0x30, 0xf4, | ||
13481 | 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09, | ||
13482 | 0x56, 0xfb, 0x01, 0xfe, | ||
13483 | 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01, 0xfe, 0xf4, 0x1c, 0x01, | ||
13484 | 0xfe, 0x00, 0x1d, 0x15, | ||
13485 | 0xfe, 0xe9, 0x00, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, | ||
13486 | 0x22, 0x1b, 0xfe, 0x1e, | ||
13487 | 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe, | ||
13488 | 0x96, 0x90, 0x04, 0xfe, | ||
13489 | 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64, 0x01, 0x22, 0xfe, 0x66, | ||
13490 | 0x01, 0x01, 0x0c, 0x06, | ||
13491 | 0x65, 0xf9, 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, | ||
13492 | 0x0e, 0x77, 0xfe, 0x01, | ||
13493 | 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40, | ||
13494 | 0x21, 0x2c, 0xfe, 0x00, | ||
13495 | 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, | ||
13496 | 0x06, 0x58, 0x03, 0xfe, | ||
13497 | 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, | ||
13498 | 0x03, 0xfe, 0xb2, 0x00, | ||
13499 | 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10, | ||
13500 | 0x66, 0x10, 0x55, 0x10, | ||
13501 | 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe, 0x90, 0x4d, 0xfe, 0x91, | ||
13502 | 0x54, 0x2b, 0xfe, 0x88, | ||
13503 | 0x11, 0x46, 0x1a, 0x13, 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, | ||
13504 | 0x91, 0x54, 0x2b, 0xfe, | ||
13505 | 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe, | ||
13506 | 0x00, 0x40, 0x8d, 0x2c, | ||
13507 | 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xb2, 0x11, 0xfe, | ||
13508 | 0x12, 0x1c, 0x75, 0xfe, | ||
13509 | 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, | ||
13510 | 0x14, 0xfe, 0x0e, 0x47, | ||
13511 | 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01, | ||
13512 | 0xa7, 0x90, 0x34, 0x60, | ||
13513 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0xfe, 0x02, 0x80, | ||
13514 | 0x09, 0x56, 0xfe, 0x34, | ||
13515 | 0x13, 0x0a, 0x5a, 0x01, 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, | ||
13516 | 0xfe, 0x45, 0x48, 0x01, | ||
13517 | 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89, | ||
13518 | 0x09, 0x1a, 0xa5, 0x0a, | ||
13519 | 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85, 0xf2, 0x09, 0x9b, 0xa4, | ||
13520 | 0xfe, 0x14, 0x56, 0xfe, | ||
13521 | 0xd6, 0xf0, 0xfe, 0xec, 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, | ||
13522 | 0xec, 0xb8, 0xfe, 0x9e, | ||
13523 | 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01, | ||
13524 | 0xf4, 0xfe, 0xdd, 0x10, | ||
13525 | 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee, 0x09, 0x12, 0xfe, 0x48, | ||
13526 | 0x12, 0x09, 0x0d, 0xfe, | ||
13527 | 0x56, 0x12, 0x09, 0x1d, 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, | ||
13528 | 0x13, 0x09, 0xfe, 0x23, | ||
13529 | 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09, | ||
13530 | 0x24, 0xfe, 0x12, 0x12, | ||
13531 | 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42, 0xa1, 0x32, 0x01, 0x08, | ||
13532 | 0xae, 0x41, 0x02, 0x32, | ||
13533 | 0xfe, 0x62, 0x08, 0x0a, 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, | ||
13534 | 0x35, 0x32, 0x01, 0x43, | ||
13535 | 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80, | ||
13536 | 0x13, 0x01, 0x0c, 0x06, | ||
13537 | 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x44, 0x55, 0xfe, | ||
13538 | 0xe5, 0x55, 0xb0, 0xfe, | ||
13539 | 0x4a, 0x13, 0x21, 0x6e, 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, | ||
13540 | 0xfe, 0xb6, 0x0e, 0x10, | ||
13541 | 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49, | ||
13542 | 0x88, 0x20, 0x6e, 0x01, | ||
13543 | 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x04, 0x55, 0xfe, 0xa5, | ||
13544 | 0x55, 0xfe, 0x04, 0xfa, | ||
13545 | 0x64, 0xfe, 0x05, 0xfa, 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, | ||
13546 | 0xfe, 0x40, 0x56, 0xfe, | ||
13547 | 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe, | ||
13548 | 0x44, 0x55, 0xfe, 0xe5, | ||
13549 | 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x10, | ||
13550 | 0x68, 0x22, 0x69, 0x01, | ||
13551 | 0x0c, 0x06, 0x54, 0xf9, 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, | ||
13552 | 0x6b, 0xfe, 0x2c, 0x50, | ||
13553 | 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6, | ||
13554 | 0x50, 0x03, 0x68, 0x3b, | ||
13555 | 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x4b, 0x3b, 0x4c, 0xfe, | ||
13556 | 0x40, 0x50, 0xfe, 0xc2, | ||
13557 | 0x50, 0x05, 0x73, 0x2e, 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, | ||
13558 | 0x16, 0x3d, 0x27, 0x25, | ||
13559 | 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01, | ||
13560 | 0xa6, 0x23, 0x3f, 0x1b, | ||
13561 | 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13, 0x91, 0x4b, 0x7e, 0x4c, | ||
13562 | 0xfe, 0x0a, 0x55, 0x31, | ||
13563 | 0xfe, 0x8b, 0x55, 0xd9, 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, | ||
13564 | 0x51, 0x05, 0x72, 0x01, | ||
13565 | 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08, | ||
13566 | 0x2a, 0x3c, 0x16, 0xc0, | ||
13567 | 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d, 0x83, 0x2d, 0x7f, 0x1b, | ||
13568 | 0xfe, 0x66, 0x15, 0x05, | ||
13569 | 0x3d, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, | ||
13570 | 0x2b, 0x3d, 0x01, 0x08, | ||
13571 | 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03, | ||
13572 | 0xb6, 0x1e, 0x83, 0x01, | ||
13573 | 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45, 0x2d, 0x00, 0xa4, 0x46, | ||
13574 | 0x07, 0x90, 0x3f, 0x01, | ||
13575 | 0xfe, 0xf8, 0x15, 0x01, 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, | ||
13576 | 0x01, 0x43, 0x09, 0x82, | ||
13577 | 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e, | ||
13578 | 0x05, 0x72, 0xfe, 0xc0, | ||
13579 | 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66, 0x8a, 0x10, 0x66, 0x5e, | ||
13580 | 0x32, 0x01, 0x08, 0x17, | ||
13581 | 0x73, 0x01, 0xfe, 0x56, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, | ||
13582 | 0x3d, 0x27, 0x25, 0xbd, | ||
13583 | 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe, | ||
13584 | 0xe8, 0x14, 0x01, 0xa6, | ||
13585 | 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe, 0x4a, 0xf4, 0x07, 0xfe, | ||
13586 | 0x0e, 0x12, 0x01, 0x43, | ||
13587 | 0x09, 0x82, 0x4e, 0x05, 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, | ||
13588 | 0x01, 0x08, 0x17, 0x73, | ||
13589 | 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, | ||
13590 | 0x27, 0x25, 0xbd, 0x09, | ||
13591 | 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b, 0xfe, 0xaa, 0x14, 0xfe, | ||
13592 | 0xb6, 0x14, 0x86, 0xa8, | ||
13593 | 0xb2, 0x0d, 0x1b, 0x3d, 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, | ||
13594 | 0x82, 0x4e, 0x05, 0x72, | ||
13595 | 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, | ||
13596 | 0xfe, 0xc0, 0x19, 0x05, | ||
13597 | 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17, 0xfe, 0xe2, 0x15, 0x5f, | ||
13598 | 0xcc, 0x01, 0x08, 0x26, | ||
13599 | 0x5f, 0x02, 0x8f, 0xfe, 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, | ||
13600 | 0xcc, 0x15, 0x5e, 0x32, | ||
13601 | 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, | ||
13602 | 0xad, 0x23, 0xfe, 0xff, | ||
13603 | 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, | ||
13604 | 0x00, 0x57, 0x52, 0xad, | ||
13605 | 0x23, 0x3f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, | ||
13606 | 0x02, 0x00, 0x57, 0x52, | ||
13607 | 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e, | ||
13608 | 0x02, 0x13, 0x58, 0xff, | ||
13609 | 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58, 0x02, 0x0a, 0x66, 0x01, | ||
13610 | 0x5c, 0x0a, 0x55, 0x01, | ||
13611 | 0x5c, 0x0a, 0x6f, 0x01, 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, | ||
13612 | 0xff, 0x03, 0x00, 0x54, | ||
13613 | 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07, | ||
13614 | 0x7c, 0x3a, 0x0b, 0x0e, | ||
13615 | 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a, 0x19, 0xfe, 0xfb, 0x19, | ||
13616 | 0xfe, 0x1a, 0xf7, 0x00, | ||
13617 | 0xfe, 0x1b, 0xf7, 0x00, 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, | ||
13618 | 0xda, 0x6d, 0x02, 0xfe, | ||
13619 | 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77, | ||
13620 | 0x02, 0x01, 0xc6, 0xfe, | ||
13621 | 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17, 0x27, | ||
13622 | 0x25, 0xbe, 0x01, 0x08, | ||
13623 | 0x16, 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, | ||
13624 | 0x03, 0x9a, 0x1e, 0xfe, | ||
13625 | 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12, | ||
13626 | 0x48, 0xfe, 0x08, 0x17, | ||
13627 | 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d, 0xb4, 0x7b, 0xfe, 0x26, | ||
13628 | 0x17, 0x4d, 0x13, 0x07, | ||
13629 | 0x1c, 0xb4, 0x90, 0x04, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, | ||
13630 | 0xff, 0x02, 0x83, 0x55, | ||
13631 | 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80, | ||
13632 | 0x17, 0x1c, 0x63, 0x13, | ||
13633 | 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, 0x13, 0xd6, 0xfe, 0x64, | ||
13634 | 0x00, 0xb0, 0xfe, 0x80, | ||
13635 | 0x17, 0x0a, 0xfe, 0x64, 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, | ||
13636 | 0x53, 0x07, 0xfe, 0x60, | ||
13637 | 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8, | ||
13638 | 0x00, 0x1c, 0x95, 0x13, | ||
13639 | 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0x8c, 0x17, 0x45, 0xf3, | ||
13640 | 0xfe, 0x43, 0xf4, 0x96, | ||
13641 | 0xfe, 0x56, 0xf0, 0xfe, 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, | ||
13642 | 0xf4, 0x94, 0xf6, 0x8b, | ||
13643 | 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe, | ||
13644 | 0xda, 0x17, 0x62, 0x49, | ||
13645 | 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x80, | ||
13646 | 0x71, 0x50, 0x26, 0xfe, | ||
13647 | 0x4d, 0xf4, 0x00, 0xf7, 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, | ||
13648 | 0x58, 0x02, 0x50, 0x13, | ||
13649 | 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27, | ||
13650 | 0x25, 0xbe, 0xfe, 0x03, | ||
13651 | 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe9, | ||
13652 | 0x0a, 0x01, 0x08, 0x16, | ||
13653 | 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, | ||
13654 | 0x01, 0x08, 0x16, 0xa9, | ||
13655 | 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01, | ||
13656 | 0x08, 0x16, 0xa9, 0x27, | ||
13657 | 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, 0x03, 0xb6, 0x1e, 0x83, | ||
13658 | 0x01, 0x38, 0x06, 0x24, | ||
13659 | 0x31, 0xa2, 0x78, 0xf2, 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, | ||
13660 | 0x78, 0x03, 0x9a, 0x1e, | ||
13661 | 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10, | ||
13662 | 0xfe, 0x40, 0x5a, 0x23, | ||
13663 | 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x49, 0x71, 0x8c, | ||
13664 | 0x80, 0x48, 0xfe, 0xaa, | ||
13665 | 0x18, 0x62, 0x80, 0xfe, 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, | ||
13666 | 0xfe, 0xac, 0x1d, 0xfe, | ||
13667 | 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe, | ||
13668 | 0x43, 0x48, 0x2d, 0x93, | ||
13669 | 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, 0x40, 0x10, 0x2d, 0xb4, | ||
13670 | 0x36, 0xfe, 0x34, 0xf4, | ||
13671 | 0x04, 0xfe, 0x34, 0x10, 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, | ||
13672 | 0x28, 0x10, 0xfe, 0xc0, | ||
13673 | 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa, | ||
13674 | 0x18, 0x45, 0xfe, 0x1c, | ||
13675 | 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, 0x0c, | ||
13676 | 0x19, 0xfe, 0x04, 0xf4, | ||
13677 | 0x58, 0xfe, 0x40, 0xf4, 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, | ||
13678 | 0x21, 0xfe, 0x7f, 0x01, | ||
13679 | 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe, | ||
13680 | 0x7e, 0x01, 0xfe, 0xc8, | ||
13681 | 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, 0xfe, 0x48, 0x45, 0xfa, | ||
13682 | 0x21, 0xfe, 0x81, 0x01, | ||
13683 | 0xfe, 0xc8, 0x44, 0x4e, 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, | ||
13684 | 0x13, 0x0d, 0x02, 0x14, | ||
13685 | 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17, | ||
13686 | 0xfe, 0x82, 0x19, 0x14, | ||
13687 | 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, 0xfe, 0x89, 0x49, 0x01, | ||
13688 | 0x08, 0x02, 0x14, 0x07, | ||
13689 | 0x01, 0x08, 0x17, 0xc1, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, | ||
13690 | 0x01, 0x08, 0x17, 0xc1, | ||
13691 | 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01, | ||
13692 | 0x08, 0x02, 0x50, 0x02, | ||
13693 | 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, 0x01, 0x08, 0x17, 0x74, | ||
13694 | 0x14, 0x12, 0x01, 0x08, | ||
13695 | 0x17, 0x74, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, | ||
13696 | 0x08, 0x17, 0x74, 0xfe, | ||
13697 | 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17, | ||
13698 | 0x74, 0x5f, 0xcc, 0x01, | ||
13699 | 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, 0x13, 0xc8, 0x20, 0xe4, | ||
13700 | 0xfe, 0x49, 0xf4, 0x00, | ||
13701 | 0x4d, 0x5f, 0xa1, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, | ||
13702 | 0x02, 0x00, 0x10, 0x2f, | ||
13703 | 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13, | ||
13704 | 0x16, 0xfe, 0x64, 0x1a, | ||
13705 | 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, 0x07, 0x5d, 0x01, 0x0c, | ||
13706 | 0x61, 0x07, 0x44, 0x02, | ||
13707 | 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, | ||
13708 | 0x13, 0x0a, 0x9d, 0x01, | ||
13709 | 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa, | ||
13710 | 0xfe, 0x80, 0xe7, 0x1a, | ||
13711 | 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, 0xb2, 0x16, 0xaa, 0x02, | ||
13712 | 0x0a, 0x5a, 0x01, 0x18, | ||
13713 | 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, | ||
13714 | 0x7e, 0x1e, 0xfe, 0x80, | ||
13715 | 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18, | ||
13716 | 0xfe, 0x80, 0x4c, 0x0a, | ||
13717 | 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, 0xe5, 0xfe, 0x18, 0xdf, | ||
13718 | 0xfe, 0x19, 0xde, 0xfe, | ||
13719 | 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, | ||
13720 | 0x2a, 0x1c, 0xfa, 0xb3, | ||
13721 | 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe, | ||
13722 | 0xf4, 0x1a, 0xfe, 0xfa, | ||
13723 | 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24, | ||
13724 | 0xfe, 0x18, 0x58, 0x03, | ||
13725 | 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, | ||
13726 | 0xfe, 0x30, 0xf4, 0x07, | ||
13727 | 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, | ||
13728 | 0xf7, 0x24, 0xb1, 0xfe, | ||
13729 | 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b, | ||
13730 | 0xfe, 0xba, 0x10, 0x1c, | ||
13731 | 0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, | ||
13732 | 0x1d, 0xf7, 0x54, 0xb1, | ||
13733 | 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe, | ||
13734 | 0xaf, 0x19, 0xfe, 0x98, | ||
13735 | 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c, | ||
13736 | 0x1a, 0x87, 0x8b, 0x0f, | ||
13737 | 0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, | ||
13738 | 0xfe, 0x32, 0x90, 0x04, | ||
13739 | 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a, | ||
13740 | 0x7c, 0x12, 0xfe, 0x0f, | ||
13741 | 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14, | ||
13742 | 0x31, 0x02, 0xc9, 0x2b, | ||
13743 | 0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, | ||
13744 | 0x6a, 0xfe, 0x19, 0xfe, | ||
13745 | 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee, | ||
13746 | 0x1b, 0xfe, 0x36, 0x14, | ||
13747 | 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, | ||
13748 | 0xfe, 0x80, 0xe7, 0x1a, | ||
13749 | 0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, | ||
13750 | 0x30, 0xfe, 0x12, 0x45, | ||
13751 | 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe, | ||
13752 | 0x39, 0xf0, 0x75, 0x26, | ||
13753 | 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03, | ||
13754 | 0xe3, 0x23, 0x07, 0xfe, | ||
13755 | 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, | ||
13756 | 0x56, 0xfe, 0x3c, 0x13, | ||
13757 | 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a, | ||
13758 | 0x01, 0x18, 0xcb, 0xfe, | ||
13759 | 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16, | ||
13760 | 0xfe, 0x00, 0xcc, 0xcb, | ||
13761 | 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, | ||
13762 | 0xfe, 0x80, 0x4c, 0x01, | ||
13763 | 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24, | ||
13764 | 0x12, 0xfe, 0x14, 0x56, | ||
13765 | 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7, | ||
13766 | 0x0d, 0x19, 0xfe, 0x15, | ||
13767 | 0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, | ||
13768 | 0x83, 0xfe, 0x18, 0x80, | ||
13769 | 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38, | ||
13770 | 0x90, 0xfe, 0xba, 0x90, | ||
13771 | 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02, | ||
13772 | 0x21, 0xb9, 0x88, 0x20, | ||
13773 | 0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, | ||
13774 | 0x18, 0xfe, 0x49, 0x44, | ||
13775 | 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09, | ||
13776 | 0x1a, 0xa4, 0x0a, 0x67, | ||
13777 | 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4, | ||
13778 | 0x1d, 0x7b, 0xfe, 0x52, | ||
13779 | 0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, | ||
13780 | 0x4e, 0xe4, 0xdd, 0x7b, | ||
13781 | 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10, | ||
13782 | 0xfe, 0x4e, 0xe4, 0xfe, | ||
13783 | 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24, | ||
13784 | 0xfe, 0x08, 0x10, 0x03, | ||
13785 | 0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, | ||
13786 | 0x68, 0x54, 0xfe, 0xf1, | ||
13787 | 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, | ||
13788 | 0xfe, 0x1a, 0xf4, 0xfe, | ||
13789 | 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02, | ||
13790 | 0x09, 0x92, 0xfe, 0x5a, | ||
13791 | 0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, | ||
13792 | 0x5a, 0xf0, 0xfe, 0xc8, | ||
13793 | 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe, | ||
13794 | 0x1a, 0x10, 0x09, 0x0d, | ||
13795 | 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02, | ||
13796 | 0x1f, 0x93, 0x01, 0x42, | ||
13797 | 0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, | ||
13798 | 0xfe, 0x14, 0xf0, 0x08, | ||
13799 | 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e, | ||
13800 | 0xfe, 0x82, 0xf0, 0xfe, | ||
13801 | 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e, | ||
13802 | 0x02, 0x0f, 0xfe, 0x18, | ||
13803 | 0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, | ||
13804 | 0x80, 0x04, 0xfe, 0x82, | ||
13805 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86, | ||
13806 | 0x83, 0x33, 0x0b, 0x0e, | ||
13807 | 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e, | ||
13808 | 0x02, 0x0f, 0xfe, 0x04, | ||
13809 | 0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, | ||
13810 | 0x80, 0x04, 0xfe, 0x80, | ||
13811 | 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04, | ||
13812 | 0xfe, 0x99, 0x83, 0xfe, | ||
13813 | 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86, | ||
13814 | 0x83, 0xfe, 0xce, 0x47, | ||
13815 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, | ||
13816 | 0x0b, 0x0e, 0x02, 0x0f, | ||
13817 | 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
13818 | 0xfe, 0x08, 0x90, 0x04, | ||
13819 | 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04, | ||
13820 | 0xfe, 0x8a, 0x93, 0x79, | ||
13821 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, | ||
13822 | 0x0b, 0x0e, 0x02, 0x0f, | ||
13823 | 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
13824 | 0xfe, 0x3c, 0x90, 0x04, | ||
13825 | 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80, | ||
13826 | 0x04, 0xfe, 0x83, 0x83, | ||
13827 | 0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00, | ||
13828 | }; | ||
13829 | 11874 | ||
13830 | static unsigned short _adv_asc38C1600_size = sizeof(_adv_asc38C1600_buf); /* 0x1673 */ | 11875 | return asc_dvc->err_code; |
13831 | static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian checksum. */ | 11876 | } |
13832 | 11877 | ||
13833 | /* a_init.c */ | ||
13834 | /* | 11878 | /* |
13835 | * EEPROM Configuration. | 11879 | * EEPROM Configuration. |
13836 | * | 11880 | * |
@@ -13847,7 +11891,7 @@ static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian | |||
13847 | * on big-endian platforms so char fields read as words are actually being | 11891 | * on big-endian platforms so char fields read as words are actually being |
13848 | * unswapped on big-endian platforms. | 11892 | * unswapped on big-endian platforms. |
13849 | */ | 11893 | */ |
13850 | static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __initdata = { | 11894 | static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __devinitdata = { |
13851 | ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */ | 11895 | ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */ |
13852 | 0x0000, /* cfg_msw */ | 11896 | 0x0000, /* cfg_msw */ |
13853 | 0xFFFF, /* disc_enable */ | 11897 | 0xFFFF, /* disc_enable */ |
@@ -13885,7 +11929,7 @@ static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __initdata = { | |||
13885 | 0 /* num_of_err */ | 11929 | 0 /* num_of_err */ |
13886 | }; | 11930 | }; |
13887 | 11931 | ||
13888 | static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __initdata = { | 11932 | static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __devinitdata = { |
13889 | 0, /* cfg_lsw */ | 11933 | 0, /* cfg_lsw */ |
13890 | 0, /* cfg_msw */ | 11934 | 0, /* cfg_msw */ |
13891 | 0, /* -disc_enable */ | 11935 | 0, /* -disc_enable */ |
@@ -13923,7 +11967,7 @@ static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __initdata = { | |||
13923 | 0 /* num_of_err */ | 11967 | 0 /* num_of_err */ |
13924 | }; | 11968 | }; |
13925 | 11969 | ||
13926 | static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __initdata = { | 11970 | static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __devinitdata = { |
13927 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ | 11971 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ |
13928 | 0x0000, /* 01 cfg_msw */ | 11972 | 0x0000, /* 01 cfg_msw */ |
13929 | 0xFFFF, /* 02 disc_enable */ | 11973 | 0xFFFF, /* 02 disc_enable */ |
@@ -13988,7 +12032,7 @@ static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __initdata = { | |||
13988 | 0 /* 63 reserved */ | 12032 | 0 /* 63 reserved */ |
13989 | }; | 12033 | }; |
13990 | 12034 | ||
13991 | static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __initdata = { | 12035 | static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __devinitdata = { |
13992 | 0, /* 00 cfg_lsw */ | 12036 | 0, /* 00 cfg_lsw */ |
13993 | 0, /* 01 cfg_msw */ | 12037 | 0, /* 01 cfg_msw */ |
13994 | 0, /* 02 disc_enable */ | 12038 | 0, /* 02 disc_enable */ |
@@ -14053,7 +12097,7 @@ static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __initdata = { | |||
14053 | 0 /* 63 reserved */ | 12097 | 0 /* 63 reserved */ |
14054 | }; | 12098 | }; |
14055 | 12099 | ||
14056 | static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __initdata = { | 12100 | static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __devinitdata = { |
14057 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ | 12101 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ |
14058 | 0x0000, /* 01 cfg_msw */ | 12102 | 0x0000, /* 01 cfg_msw */ |
14059 | 0xFFFF, /* 02 disc_enable */ | 12103 | 0xFFFF, /* 02 disc_enable */ |
@@ -14118,7 +12162,7 @@ static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __initdata = { | |||
14118 | 0 /* 63 reserved */ | 12162 | 0 /* 63 reserved */ |
14119 | }; | 12163 | }; |
14120 | 12164 | ||
14121 | static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __initdata = { | 12165 | static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __devinitdata = { |
14122 | 0, /* 00 cfg_lsw */ | 12166 | 0, /* 00 cfg_lsw */ |
14123 | 0, /* 01 cfg_msw */ | 12167 | 0, /* 01 cfg_msw */ |
14124 | 0, /* 02 disc_enable */ | 12168 | 0, /* 02 disc_enable */ |
@@ -14183,1944 +12227,365 @@ static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __initdata = { | |||
14183 | 0 /* 63 reserved */ | 12227 | 0 /* 63 reserved */ |
14184 | }; | 12228 | }; |
14185 | 12229 | ||
12230 | #ifdef CONFIG_PCI | ||
14186 | /* | 12231 | /* |
14187 | * Initialize the ADV_DVC_VAR structure. | 12232 | * Wait for EEPROM command to complete |
14188 | * | ||
14189 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. | ||
14190 | * | ||
14191 | * For a non-fatal error return a warning code. If there are no warnings | ||
14192 | * then 0 is returned. | ||
14193 | */ | 12233 | */ |
14194 | static int __init AdvInitGetConfig(ADV_DVC_VAR *asc_dvc) | 12234 | static void __devinit AdvWaitEEPCmd(AdvPortAddr iop_base) |
14195 | { | 12235 | { |
14196 | ushort warn_code; | 12236 | int eep_delay_ms; |
14197 | AdvPortAddr iop_base; | ||
14198 | uchar pci_cmd_reg; | ||
14199 | int status; | ||
14200 | |||
14201 | warn_code = 0; | ||
14202 | asc_dvc->err_code = 0; | ||
14203 | iop_base = asc_dvc->iop_base; | ||
14204 | |||
14205 | /* | ||
14206 | * PCI Command Register | ||
14207 | * | ||
14208 | * Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes | ||
14209 | * I/O Space Control, Memory Space Control and Bus Master Control bits. | ||
14210 | */ | ||
14211 | |||
14212 | if (((pci_cmd_reg = DvcAdvReadPCIConfigByte(asc_dvc, | ||
14213 | AscPCIConfigCommandRegister)) | ||
14214 | & AscPCICmdRegBits_BusMastering) | ||
14215 | != AscPCICmdRegBits_BusMastering) { | ||
14216 | pci_cmd_reg |= AscPCICmdRegBits_BusMastering; | ||
14217 | |||
14218 | DvcAdvWritePCIConfigByte(asc_dvc, | ||
14219 | AscPCIConfigCommandRegister, | ||
14220 | pci_cmd_reg); | ||
14221 | |||
14222 | if (((DvcAdvReadPCIConfigByte | ||
14223 | (asc_dvc, AscPCIConfigCommandRegister)) | ||
14224 | & AscPCICmdRegBits_BusMastering) | ||
14225 | != AscPCICmdRegBits_BusMastering) { | ||
14226 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
14227 | } | ||
14228 | } | ||
14229 | |||
14230 | /* | ||
14231 | * PCI Latency Timer | ||
14232 | * | ||
14233 | * If the "latency timer" register is 0x20 or above, then we don't need | ||
14234 | * to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it | ||
14235 | * comes up less than 0x20). | ||
14236 | */ | ||
14237 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20) { | ||
14238 | DvcAdvWritePCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer, | ||
14239 | 0x20); | ||
14240 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < | ||
14241 | 0x20) { | ||
14242 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
14243 | } | ||
14244 | } | ||
14245 | |||
14246 | /* | ||
14247 | * Save the state of the PCI Configuration Command Register | ||
14248 | * "Parity Error Response Control" Bit. If the bit is clear (0), | ||
14249 | * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore | ||
14250 | * DMA parity errors. | ||
14251 | */ | ||
14252 | asc_dvc->cfg->control_flag = 0; | ||
14253 | if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister) | ||
14254 | & AscPCICmdRegBits_ParErrRespCtrl)) == 0) { | ||
14255 | asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR; | ||
14256 | } | ||
14257 | |||
14258 | asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) | | ||
14259 | ADV_LIB_VERSION_MINOR; | ||
14260 | asc_dvc->cfg->chip_version = | ||
14261 | AdvGetChipVersion(iop_base, asc_dvc->bus_type); | ||
14262 | |||
14263 | ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n", | ||
14264 | (ushort)AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1), | ||
14265 | (ushort)ADV_CHIP_ID_BYTE); | ||
14266 | |||
14267 | ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n", | ||
14268 | (ushort)AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0), | ||
14269 | (ushort)ADV_CHIP_ID_WORD); | ||
14270 | |||
14271 | /* | ||
14272 | * Reset the chip to start and allow register writes. | ||
14273 | */ | ||
14274 | if (AdvFindSignature(iop_base) == 0) { | ||
14275 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
14276 | return ADV_ERROR; | ||
14277 | } else { | ||
14278 | /* | ||
14279 | * The caller must set 'chip_type' to a valid setting. | ||
14280 | */ | ||
14281 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550 && | ||
14282 | asc_dvc->chip_type != ADV_CHIP_ASC38C0800 && | ||
14283 | asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { | ||
14284 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | ||
14285 | return ADV_ERROR; | ||
14286 | } | ||
14287 | |||
14288 | /* | ||
14289 | * Reset Chip. | ||
14290 | */ | ||
14291 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
14292 | ADV_CTRL_REG_CMD_RESET); | ||
14293 | DvcSleepMilliSecond(100); | ||
14294 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
14295 | ADV_CTRL_REG_CMD_WR_IO_REG); | ||
14296 | 12237 | ||
14297 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | 12238 | for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) { |
14298 | if ((status = | 12239 | if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) & |
14299 | AdvInitFrom38C1600EEP(asc_dvc)) == ADV_ERROR) { | 12240 | ASC_EEP_CMD_DONE) { |
14300 | return ADV_ERROR; | 12241 | break; |
14301 | } | ||
14302 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
14303 | if ((status = | ||
14304 | AdvInitFrom38C0800EEP(asc_dvc)) == ADV_ERROR) { | ||
14305 | return ADV_ERROR; | ||
14306 | } | ||
14307 | } else { | ||
14308 | if ((status = AdvInitFrom3550EEP(asc_dvc)) == ADV_ERROR) { | ||
14309 | return ADV_ERROR; | ||
14310 | } | ||
14311 | } | 12242 | } |
14312 | warn_code |= status; | 12243 | mdelay(1); |
14313 | } | 12244 | } |
14314 | 12245 | if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) == | |
14315 | return warn_code; | 12246 | 0) |
12247 | BUG(); | ||
14316 | } | 12248 | } |
14317 | 12249 | ||
14318 | /* | 12250 | /* |
14319 | * Initialize the ASC-3550. | 12251 | * Read the EEPROM from specified location |
14320 | * | ||
14321 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. | ||
14322 | * | ||
14323 | * For a non-fatal error return a warning code. If there are no warnings | ||
14324 | * then 0 is returned. | ||
14325 | * | ||
14326 | * Needed after initialization for error recovery. | ||
14327 | */ | 12252 | */ |
14328 | static int AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc) | 12253 | static ushort __devinit AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr) |
14329 | { | 12254 | { |
14330 | AdvPortAddr iop_base; | 12255 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
14331 | ushort warn_code; | 12256 | ASC_EEP_CMD_READ | eep_word_addr); |
14332 | ADV_DCNT sum; | 12257 | AdvWaitEEPCmd(iop_base); |
14333 | int begin_addr; | 12258 | return AdvReadWordRegister(iop_base, IOPW_EE_DATA); |
14334 | int end_addr; | 12259 | } |
14335 | ushort code_sum; | ||
14336 | int word; | ||
14337 | int j; | ||
14338 | int adv_asc3550_expanded_size; | ||
14339 | ADV_CARR_T *carrp; | ||
14340 | ADV_DCNT contig_len; | ||
14341 | ADV_SDCNT buf_size; | ||
14342 | ADV_PADDR carr_paddr; | ||
14343 | int i; | ||
14344 | ushort scsi_cfg1; | ||
14345 | uchar tid; | ||
14346 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
14347 | ushort wdtr_able = 0, sdtr_able, tagqng_able; | ||
14348 | uchar max_cmd[ADV_MAX_TID + 1]; | ||
14349 | |||
14350 | /* If there is already an error, don't continue. */ | ||
14351 | if (asc_dvc->err_code != 0) { | ||
14352 | return ADV_ERROR; | ||
14353 | } | ||
14354 | 12260 | ||
14355 | /* | 12261 | /* |
14356 | * The caller must set 'chip_type' to ADV_CHIP_ASC3550. | 12262 | * Write the EEPROM from 'cfg_buf'. |
14357 | */ | 12263 | */ |
14358 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550) { | 12264 | void __devinit |
14359 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | 12265 | AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) |
14360 | return ADV_ERROR; | 12266 | { |
14361 | } | 12267 | ushort *wbuf; |
12268 | ushort addr, chksum; | ||
12269 | ushort *charfields; | ||
14362 | 12270 | ||
14363 | warn_code = 0; | 12271 | wbuf = (ushort *)cfg_buf; |
14364 | iop_base = asc_dvc->iop_base; | 12272 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; |
12273 | chksum = 0; | ||
14365 | 12274 | ||
14366 | /* | 12275 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
14367 | * Save the RISC memory BIOS region before writing the microcode. | 12276 | AdvWaitEEPCmd(iop_base); |
14368 | * The BIOS may already be loaded and using its RISC LRAM region | ||
14369 | * so its region must be saved and restored. | ||
14370 | * | ||
14371 | * Note: This code makes the assumption, which is currently true, | ||
14372 | * that a chip reset does not clear RISC LRAM. | ||
14373 | */ | ||
14374 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
14375 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
14376 | bios_mem[i]); | ||
14377 | } | ||
14378 | 12277 | ||
14379 | /* | 12278 | /* |
14380 | * Save current per TID negotiated values. | 12279 | * Write EEPROM from word 0 to word 20. |
14381 | */ | 12280 | */ |
14382 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == 0x55AA) { | 12281 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
14383 | ushort bios_version, major, minor; | 12282 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { |
14384 | 12283 | ushort word; | |
14385 | bios_version = | ||
14386 | bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM) / 2]; | ||
14387 | major = (bios_version >> 12) & 0xF; | ||
14388 | minor = (bios_version >> 8) & 0xF; | ||
14389 | if (major < 3 || (major == 3 && minor == 1)) { | ||
14390 | /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */ | ||
14391 | AdvReadWordLram(iop_base, 0x120, wdtr_able); | ||
14392 | } else { | ||
14393 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14394 | } | ||
14395 | } | ||
14396 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14397 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
14398 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14399 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14400 | max_cmd[tid]); | ||
14401 | } | ||
14402 | 12284 | ||
14403 | /* | 12285 | if (*charfields++) { |
14404 | * Load the Microcode | 12286 | word = cpu_to_le16(*wbuf); |
14405 | * | ||
14406 | * Write the microcode image to RISC memory starting at address 0. | ||
14407 | */ | ||
14408 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
14409 | /* Assume the following compressed format of the microcode buffer: | ||
14410 | * | ||
14411 | * 254 word (508 byte) table indexed by byte code followed | ||
14412 | * by the following byte codes: | ||
14413 | * | ||
14414 | * 1-Byte Code: | ||
14415 | * 00: Emit word 0 in table. | ||
14416 | * 01: Emit word 1 in table. | ||
14417 | * . | ||
14418 | * FD: Emit word 253 in table. | ||
14419 | * | ||
14420 | * Multi-Byte Code: | ||
14421 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
14422 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
14423 | */ | ||
14424 | word = 0; | ||
14425 | for (i = 253 * 2; i < _adv_asc3550_size; i++) { | ||
14426 | if (_adv_asc3550_buf[i] == 0xff) { | ||
14427 | for (j = 0; j < _adv_asc3550_buf[i + 1]; j++) { | ||
14428 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14429 | _adv_asc3550_buf | ||
14430 | [i + | ||
14431 | 3] << 8) | | ||
14432 | _adv_asc3550_buf | ||
14433 | [i + 2])); | ||
14434 | word++; | ||
14435 | } | ||
14436 | i += 3; | ||
14437 | } else if (_adv_asc3550_buf[i] == 0xfe) { | ||
14438 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14439 | _adv_asc3550_buf[i + | ||
14440 | 2] | ||
14441 | << 8) | | ||
14442 | _adv_asc3550_buf[i + | ||
14443 | 1])); | ||
14444 | i += 2; | ||
14445 | word++; | ||
14446 | } else { | 12287 | } else { |
14447 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | 12288 | word = *wbuf; |
14448 | _adv_asc3550_buf[(_adv_asc3550_buf[i] * 2) + 1] << 8) | _adv_asc3550_buf[_adv_asc3550_buf[i] * 2])); | ||
14449 | word++; | ||
14450 | } | 12289 | } |
12290 | chksum += *wbuf; /* Checksum is calculated from word values. */ | ||
12291 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
12292 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
12293 | ASC_EEP_CMD_WRITE | addr); | ||
12294 | AdvWaitEEPCmd(iop_base); | ||
12295 | mdelay(ADV_EEP_DELAY_MS); | ||
14451 | } | 12296 | } |
14452 | 12297 | ||
14453 | /* | 12298 | /* |
14454 | * Set 'word' for later use to clear the rest of memory and save | 12299 | * Write EEPROM checksum at word 21. |
14455 | * the expanded mcode size. | ||
14456 | */ | ||
14457 | word *= 2; | ||
14458 | adv_asc3550_expanded_size = word; | ||
14459 | |||
14460 | /* | ||
14461 | * Clear the rest of ASC-3550 Internal RAM (8KB). | ||
14462 | */ | ||
14463 | for (; word < ADV_3550_MEMSIZE; word += 2) { | ||
14464 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
14465 | } | ||
14466 | |||
14467 | /* | ||
14468 | * Verify the microcode checksum. | ||
14469 | */ | ||
14470 | sum = 0; | ||
14471 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
14472 | |||
14473 | for (word = 0; word < adv_asc3550_expanded_size; word += 2) { | ||
14474 | sum += AdvReadWordAutoIncLram(iop_base); | ||
14475 | } | ||
14476 | |||
14477 | if (sum != _adv_asc3550_chksum) { | ||
14478 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
14479 | return ADV_ERROR; | ||
14480 | } | ||
14481 | |||
14482 | /* | ||
14483 | * Restore the RISC memory BIOS region. | ||
14484 | */ | ||
14485 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
14486 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
14487 | bios_mem[i]); | ||
14488 | } | ||
14489 | |||
14490 | /* | ||
14491 | * Calculate and write the microcode code checksum to the microcode | ||
14492 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
14493 | */ | ||
14494 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
14495 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
14496 | code_sum = 0; | ||
14497 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
14498 | for (word = begin_addr; word < end_addr; word += 2) { | ||
14499 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
14500 | } | ||
14501 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
14502 | |||
14503 | /* | ||
14504 | * Read and save microcode version and date. | ||
14505 | */ | ||
14506 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
14507 | asc_dvc->cfg->mcode_date); | ||
14508 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
14509 | asc_dvc->cfg->mcode_version); | ||
14510 | |||
14511 | /* | ||
14512 | * Set the chip type to indicate the ASC3550. | ||
14513 | */ | ||
14514 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550); | ||
14515 | |||
14516 | /* | ||
14517 | * If the PCI Configuration Command Register "Parity Error Response | ||
14518 | * Control" Bit was clear (0), then set the microcode variable | ||
14519 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
14520 | * to ignore DMA parity errors. | ||
14521 | */ | ||
14522 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
14523 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14524 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
14525 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14526 | } | ||
14527 | |||
14528 | /* | ||
14529 | * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO | ||
14530 | * threshold of 128 bytes. This register is only accessible to the host. | ||
14531 | */ | 12300 | */ |
14532 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | 12301 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
14533 | START_CTL_EMFU | READ_CMD_MRM); | 12302 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); |
12303 | AdvWaitEEPCmd(iop_base); | ||
12304 | wbuf++; | ||
12305 | charfields++; | ||
14534 | 12306 | ||
14535 | /* | 12307 | /* |
14536 | * Microcode operating variables for WDTR, SDTR, and command tag | 12308 | * Write EEPROM OEM name at words 22 to 29. |
14537 | * queuing will be set in AdvInquiryHandling() based on what a | ||
14538 | * device reports it is capable of in Inquiry byte 7. | ||
14539 | * | ||
14540 | * If SCSI Bus Resets have been disabled, then directly set | ||
14541 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
14542 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
14543 | * the Inquiry caused by host and target mismatched DTR values. | ||
14544 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
14545 | * be assumed to be in Asynchronous, Narrow mode. | ||
14546 | */ | 12309 | */ |
14547 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | 12310 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
14548 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | 12311 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
14549 | asc_dvc->wdtr_able); | 12312 | ushort word; |
14550 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
14551 | asc_dvc->sdtr_able); | ||
14552 | } | ||
14553 | 12313 | ||
14554 | /* | 12314 | if (*charfields++) { |
14555 | * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2, | 12315 | word = cpu_to_le16(*wbuf); |
14556 | * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID | ||
14557 | * bitmask. These values determine the maximum SDTR speed negotiated | ||
14558 | * with a device. | ||
14559 | * | ||
14560 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
14561 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
14562 | * without determining here whether the device supports SDTR. | ||
14563 | * | ||
14564 | * 4-bit speed SDTR speed name | ||
14565 | * =========== =============== | ||
14566 | * 0000b (0x0) SDTR disabled | ||
14567 | * 0001b (0x1) 5 Mhz | ||
14568 | * 0010b (0x2) 10 Mhz | ||
14569 | * 0011b (0x3) 20 Mhz (Ultra) | ||
14570 | * 0100b (0x4) 40 Mhz (LVD/Ultra2) | ||
14571 | * 0101b (0x5) 80 Mhz (LVD2/Ultra3) | ||
14572 | * 0110b (0x6) Undefined | ||
14573 | * . | ||
14574 | * 1111b (0xF) Undefined | ||
14575 | */ | ||
14576 | word = 0; | ||
14577 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14578 | if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) { | ||
14579 | /* Set Ultra speed for TID 'tid'. */ | ||
14580 | word |= (0x3 << (4 * (tid % 4))); | ||
14581 | } else { | 12316 | } else { |
14582 | /* Set Fast speed for TID 'tid'. */ | 12317 | word = *wbuf; |
14583 | word |= (0x2 << (4 * (tid % 4))); | ||
14584 | } | ||
14585 | if (tid == 3) { /* Check if done with sdtr_speed1. */ | ||
14586 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word); | ||
14587 | word = 0; | ||
14588 | } else if (tid == 7) { /* Check if done with sdtr_speed2. */ | ||
14589 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word); | ||
14590 | word = 0; | ||
14591 | } else if (tid == 11) { /* Check if done with sdtr_speed3. */ | ||
14592 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word); | ||
14593 | word = 0; | ||
14594 | } else if (tid == 15) { /* Check if done with sdtr_speed4. */ | ||
14595 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word); | ||
14596 | /* End of loop. */ | ||
14597 | } | ||
14598 | } | ||
14599 | |||
14600 | /* | ||
14601 | * Set microcode operating variable for the disconnect per TID bitmask. | ||
14602 | */ | ||
14603 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | ||
14604 | asc_dvc->cfg->disc_enable); | ||
14605 | |||
14606 | /* | ||
14607 | * Set SCSI_CFG0 Microcode Default Value. | ||
14608 | * | ||
14609 | * The microcode will set the SCSI_CFG0 register using this value | ||
14610 | * after it is started below. | ||
14611 | */ | ||
14612 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
14613 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
14614 | asc_dvc->chip_scsi_id); | ||
14615 | |||
14616 | /* | ||
14617 | * Determine SCSI_CFG1 Microcode Default Value. | ||
14618 | * | ||
14619 | * The microcode will set the SCSI_CFG1 register using this value | ||
14620 | * after it is started below. | ||
14621 | */ | ||
14622 | |||
14623 | /* Read current SCSI_CFG1 Register value. */ | ||
14624 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
14625 | |||
14626 | /* | ||
14627 | * If all three connectors are in use, return an error. | ||
14628 | */ | ||
14629 | if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 || | ||
14630 | (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) { | ||
14631 | asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION; | ||
14632 | return ADV_ERROR; | ||
14633 | } | ||
14634 | |||
14635 | /* | ||
14636 | * If the internal narrow cable is reversed all of the SCSI_CTRL | ||
14637 | * register signals will be set. Check for and return an error if | ||
14638 | * this condition is found. | ||
14639 | */ | ||
14640 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
14641 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
14642 | return ADV_ERROR; | ||
14643 | } | ||
14644 | |||
14645 | /* | ||
14646 | * If this is a differential board and a single-ended device | ||
14647 | * is attached to one of the connectors, return an error. | ||
14648 | */ | ||
14649 | if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) { | ||
14650 | asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE; | ||
14651 | return ADV_ERROR; | ||
14652 | } | ||
14653 | |||
14654 | /* | ||
14655 | * If automatic termination control is enabled, then set the | ||
14656 | * termination value based on a table listed in a_condor.h. | ||
14657 | * | ||
14658 | * If manual termination was specified with an EEPROM setting | ||
14659 | * then 'termination' was set-up in AdvInitFrom3550EEPROM() and | ||
14660 | * is ready to be 'ored' into SCSI_CFG1. | ||
14661 | */ | ||
14662 | if (asc_dvc->cfg->termination == 0) { | ||
14663 | /* | ||
14664 | * The software always controls termination by setting TERM_CTL_SEL. | ||
14665 | * If TERM_CTL_SEL were set to 0, the hardware would set termination. | ||
14666 | */ | ||
14667 | asc_dvc->cfg->termination |= TERM_CTL_SEL; | ||
14668 | |||
14669 | switch (scsi_cfg1 & CABLE_DETECT) { | ||
14670 | /* TERM_CTL_H: on, TERM_CTL_L: on */ | ||
14671 | case 0x3: | ||
14672 | case 0x7: | ||
14673 | case 0xB: | ||
14674 | case 0xD: | ||
14675 | case 0xE: | ||
14676 | case 0xF: | ||
14677 | asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L); | ||
14678 | break; | ||
14679 | |||
14680 | /* TERM_CTL_H: on, TERM_CTL_L: off */ | ||
14681 | case 0x1: | ||
14682 | case 0x5: | ||
14683 | case 0x9: | ||
14684 | case 0xA: | ||
14685 | case 0xC: | ||
14686 | asc_dvc->cfg->termination |= TERM_CTL_H; | ||
14687 | break; | ||
14688 | |||
14689 | /* TERM_CTL_H: off, TERM_CTL_L: off */ | ||
14690 | case 0x2: | ||
14691 | case 0x6: | ||
14692 | break; | ||
14693 | } | 12318 | } |
12319 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
12320 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
12321 | ASC_EEP_CMD_WRITE | addr); | ||
12322 | AdvWaitEEPCmd(iop_base); | ||
14694 | } | 12323 | } |
12324 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
12325 | AdvWaitEEPCmd(iop_base); | ||
12326 | } | ||
14695 | 12327 | ||
14696 | /* | 12328 | /* |
14697 | * Clear any set TERM_CTL_H and TERM_CTL_L bits. | 12329 | * Write the EEPROM from 'cfg_buf'. |
14698 | */ | 12330 | */ |
14699 | scsi_cfg1 &= ~TERM_CTL; | 12331 | void __devinit |
14700 | 12332 | AdvSet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) | |
14701 | /* | 12333 | { |
14702 | * Invert the TERM_CTL_H and TERM_CTL_L bits and then | 12334 | ushort *wbuf; |
14703 | * set 'scsi_cfg1'. The TERM_POL bit does not need to be | 12335 | ushort *charfields; |
14704 | * referenced, because the hardware internally inverts | 12336 | ushort addr, chksum; |
14705 | * the Termination High and Low bits if TERM_POL is set. | ||
14706 | */ | ||
14707 | scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL)); | ||
14708 | |||
14709 | /* | ||
14710 | * Set SCSI_CFG1 Microcode Default Value | ||
14711 | * | ||
14712 | * Set filter value and possibly modified termination control | ||
14713 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
14714 | * | ||
14715 | * The microcode will set the SCSI_CFG1 register using this value | ||
14716 | * after it is started below. | ||
14717 | */ | ||
14718 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, | ||
14719 | FLTR_DISABLE | scsi_cfg1); | ||
14720 | 12337 | ||
14721 | /* | 12338 | wbuf = (ushort *)cfg_buf; |
14722 | * Set MEM_CFG Microcode Default Value | 12339 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; |
14723 | * | 12340 | chksum = 0; |
14724 | * The microcode will set the MEM_CFG register using this value | ||
14725 | * after it is started below. | ||
14726 | * | ||
14727 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
14728 | * are defined. | ||
14729 | * | ||
14730 | * ASC-3550 has 8KB internal memory. | ||
14731 | */ | ||
14732 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
14733 | BIOS_EN | RAM_SZ_8KB); | ||
14734 | 12341 | ||
14735 | /* | 12342 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
14736 | * Set SEL_MASK Microcode Default Value | 12343 | AdvWaitEEPCmd(iop_base); |
14737 | * | ||
14738 | * The microcode will set the SEL_MASK register using this value | ||
14739 | * after it is started below. | ||
14740 | */ | ||
14741 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
14742 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
14743 | 12344 | ||
14744 | /* | 12345 | /* |
14745 | * Build carrier freelist. | 12346 | * Write EEPROM from word 0 to word 20. |
14746 | * | ||
14747 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
14748 | */ | 12347 | */ |
14749 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | 12348 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
14750 | 12349 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { | |
14751 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | 12350 | ushort word; |
14752 | asc_dvc->carr_freelist = NULL; | ||
14753 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
14754 | buf_size = ADV_CARRIER_BUFSIZE; | ||
14755 | } else { | ||
14756 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
14757 | } | ||
14758 | |||
14759 | do { | ||
14760 | /* | ||
14761 | * Get physical address of the carrier 'carrp'. | ||
14762 | */ | ||
14763 | contig_len = sizeof(ADV_CARR_T); | ||
14764 | carr_paddr = | ||
14765 | cpu_to_le32(DvcGetPhyAddr | ||
14766 | (asc_dvc, NULL, (uchar *)carrp, | ||
14767 | (ADV_SDCNT *)&contig_len, | ||
14768 | ADV_IS_CARRIER_FLAG)); | ||
14769 | |||
14770 | buf_size -= sizeof(ADV_CARR_T); | ||
14771 | 12351 | ||
14772 | /* | 12352 | if (*charfields++) { |
14773 | * If the current carrier is not physically contiguous, then | 12353 | word = cpu_to_le16(*wbuf); |
14774 | * maybe there was a page crossing. Try the next carrier aligned | 12354 | } else { |
14775 | * start address. | 12355 | word = *wbuf; |
14776 | */ | ||
14777 | if (contig_len < sizeof(ADV_CARR_T)) { | ||
14778 | carrp++; | ||
14779 | continue; | ||
14780 | } | 12356 | } |
14781 | 12357 | chksum += *wbuf; /* Checksum is calculated from word values. */ | |
14782 | carrp->carr_pa = carr_paddr; | 12358 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); |
14783 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | 12359 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
14784 | 12360 | ASC_EEP_CMD_WRITE | addr); | |
14785 | /* | 12361 | AdvWaitEEPCmd(iop_base); |
14786 | * Insert the carrier at the beginning of the freelist. | 12362 | mdelay(ADV_EEP_DELAY_MS); |
14787 | */ | ||
14788 | carrp->next_vpa = | ||
14789 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
14790 | asc_dvc->carr_freelist = carrp; | ||
14791 | |||
14792 | carrp++; | ||
14793 | } | ||
14794 | while (buf_size > 0); | ||
14795 | |||
14796 | /* | ||
14797 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | ||
14798 | */ | ||
14799 | |||
14800 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { | ||
14801 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
14802 | return ADV_ERROR; | ||
14803 | } | ||
14804 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
14805 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | ||
14806 | |||
14807 | /* | ||
14808 | * The first command issued will be placed in the stopper carrier. | ||
14809 | */ | ||
14810 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
14811 | |||
14812 | /* | ||
14813 | * Set RISC ICQ physical address start value. | ||
14814 | */ | ||
14815 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
14816 | |||
14817 | /* | ||
14818 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
14819 | */ | ||
14820 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
14821 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
14822 | return ADV_ERROR; | ||
14823 | } | 12363 | } |
14824 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
14825 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
14826 | 12364 | ||
14827 | /* | 12365 | /* |
14828 | * The first command completed by the RISC will be placed in | 12366 | * Write EEPROM checksum at word 21. |
14829 | * the stopper. | ||
14830 | * | ||
14831 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
14832 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
14833 | */ | 12367 | */ |
14834 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 12368 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
12369 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
12370 | AdvWaitEEPCmd(iop_base); | ||
12371 | wbuf++; | ||
12372 | charfields++; | ||
14835 | 12373 | ||
14836 | /* | 12374 | /* |
14837 | * Set RISC IRQ physical address start value. | 12375 | * Write EEPROM OEM name at words 22 to 29. |
14838 | */ | 12376 | */ |
14839 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | 12377 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
14840 | asc_dvc->carr_pending_cnt = 0; | 12378 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
14841 | 12379 | ushort word; | |
14842 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
14843 | (ADV_INTR_ENABLE_HOST_INTR | | ||
14844 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
14845 | |||
14846 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
14847 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
14848 | |||
14849 | /* finally, finally, gentlemen, start your engine */ | ||
14850 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
14851 | 12380 | ||
14852 | /* | 12381 | if (*charfields++) { |
14853 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 12382 | word = cpu_to_le16(*wbuf); |
14854 | * Resets should be performed. The RISC has to be running | ||
14855 | * to issue a SCSI Bus Reset. | ||
14856 | */ | ||
14857 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
14858 | /* | ||
14859 | * If the BIOS Signature is present in memory, restore the | ||
14860 | * BIOS Handshake Configuration Table and do not perform | ||
14861 | * a SCSI Bus Reset. | ||
14862 | */ | ||
14863 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
14864 | 0x55AA) { | ||
14865 | /* | ||
14866 | * Restore per TID negotiated values. | ||
14867 | */ | ||
14868 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14869 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14870 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
14871 | tagqng_able); | ||
14872 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14873 | AdvWriteByteLram(iop_base, | ||
14874 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14875 | max_cmd[tid]); | ||
14876 | } | ||
14877 | } else { | 12383 | } else { |
14878 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | 12384 | word = *wbuf; |
14879 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
14880 | } | ||
14881 | } | 12385 | } |
12386 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
12387 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
12388 | ASC_EEP_CMD_WRITE | addr); | ||
12389 | AdvWaitEEPCmd(iop_base); | ||
14882 | } | 12390 | } |
14883 | 12391 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | |
14884 | return warn_code; | 12392 | AdvWaitEEPCmd(iop_base); |
14885 | } | 12393 | } |
14886 | 12394 | ||
14887 | /* | 12395 | /* |
14888 | * Initialize the ASC-38C0800. | 12396 | * Write the EEPROM from 'cfg_buf'. |
14889 | * | ||
14890 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. | ||
14891 | * | ||
14892 | * For a non-fatal error return a warning code. If there are no warnings | ||
14893 | * then 0 is returned. | ||
14894 | * | ||
14895 | * Needed after initialization for error recovery. | ||
14896 | */ | 12397 | */ |
14897 | static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc) | 12398 | void __devinit |
12399 | AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) | ||
14898 | { | 12400 | { |
14899 | AdvPortAddr iop_base; | 12401 | ushort *wbuf; |
14900 | ushort warn_code; | 12402 | ushort *charfields; |
14901 | ADV_DCNT sum; | 12403 | ushort addr, chksum; |
14902 | int begin_addr; | ||
14903 | int end_addr; | ||
14904 | ushort code_sum; | ||
14905 | int word; | ||
14906 | int j; | ||
14907 | int adv_asc38C0800_expanded_size; | ||
14908 | ADV_CARR_T *carrp; | ||
14909 | ADV_DCNT contig_len; | ||
14910 | ADV_SDCNT buf_size; | ||
14911 | ADV_PADDR carr_paddr; | ||
14912 | int i; | ||
14913 | ushort scsi_cfg1; | ||
14914 | uchar byte; | ||
14915 | uchar tid; | ||
14916 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
14917 | ushort wdtr_able, sdtr_able, tagqng_able; | ||
14918 | uchar max_cmd[ADV_MAX_TID + 1]; | ||
14919 | |||
14920 | /* If there is already an error, don't continue. */ | ||
14921 | if (asc_dvc->err_code != 0) { | ||
14922 | return ADV_ERROR; | ||
14923 | } | ||
14924 | |||
14925 | /* | ||
14926 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800. | ||
14927 | */ | ||
14928 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) { | ||
14929 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
14930 | return ADV_ERROR; | ||
14931 | } | ||
14932 | |||
14933 | warn_code = 0; | ||
14934 | iop_base = asc_dvc->iop_base; | ||
14935 | |||
14936 | /* | ||
14937 | * Save the RISC memory BIOS region before writing the microcode. | ||
14938 | * The BIOS may already be loaded and using its RISC LRAM region | ||
14939 | * so its region must be saved and restored. | ||
14940 | * | ||
14941 | * Note: This code makes the assumption, which is currently true, | ||
14942 | * that a chip reset does not clear RISC LRAM. | ||
14943 | */ | ||
14944 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
14945 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
14946 | bios_mem[i]); | ||
14947 | } | ||
14948 | |||
14949 | /* | ||
14950 | * Save current per TID negotiated values. | ||
14951 | */ | ||
14952 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14953 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14954 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
14955 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14956 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14957 | max_cmd[tid]); | ||
14958 | } | ||
14959 | |||
14960 | /* | ||
14961 | * RAM BIST (RAM Built-In Self Test) | ||
14962 | * | ||
14963 | * Address : I/O base + offset 0x38h register (byte). | ||
14964 | * Function: Bit 7-6(RW) : RAM mode | ||
14965 | * Normal Mode : 0x00 | ||
14966 | * Pre-test Mode : 0x40 | ||
14967 | * RAM Test Mode : 0x80 | ||
14968 | * Bit 5 : unused | ||
14969 | * Bit 4(RO) : Done bit | ||
14970 | * Bit 3-0(RO) : Status | ||
14971 | * Host Error : 0x08 | ||
14972 | * Int_RAM Error : 0x04 | ||
14973 | * RISC Error : 0x02 | ||
14974 | * SCSI Error : 0x01 | ||
14975 | * No Error : 0x00 | ||
14976 | * | ||
14977 | * Note: RAM BIST code should be put right here, before loading the | ||
14978 | * microcode and after saving the RISC memory BIOS region. | ||
14979 | */ | ||
14980 | |||
14981 | /* | ||
14982 | * LRAM Pre-test | ||
14983 | * | ||
14984 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
14985 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
14986 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
14987 | * to NORMAL_MODE, return an error too. | ||
14988 | */ | ||
14989 | for (i = 0; i < 2; i++) { | ||
14990 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
14991 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
14992 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
14993 | if ((byte & RAM_TEST_DONE) == 0 | ||
14994 | || (byte & 0x0F) != PRE_TEST_VALUE) { | ||
14995 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
14996 | return ADV_ERROR; | ||
14997 | } | ||
14998 | |||
14999 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15000 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15001 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
15002 | != NORMAL_VALUE) { | ||
15003 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15004 | return ADV_ERROR; | ||
15005 | } | ||
15006 | } | ||
15007 | |||
15008 | /* | ||
15009 | * LRAM Test - It takes about 1.5 ms to run through the test. | ||
15010 | * | ||
15011 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. | ||
15012 | * If Done bit not set or Status not 0, save register byte, set the | ||
15013 | * err_code, and return an error. | ||
15014 | */ | ||
15015 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); | ||
15016 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ | ||
15017 | 12404 | ||
15018 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | 12405 | wbuf = (ushort *)cfg_buf; |
15019 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { | 12406 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; |
15020 | /* Get here if Done bit not set or Status not 0. */ | 12407 | chksum = 0; |
15021 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ | ||
15022 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15023 | return ADV_ERROR; | ||
15024 | } | ||
15025 | 12408 | ||
15026 | /* We need to reset back to normal mode after LRAM test passes. */ | 12409 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
15027 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | 12410 | AdvWaitEEPCmd(iop_base); |
15028 | 12411 | ||
15029 | /* | 12412 | /* |
15030 | * Load the Microcode | 12413 | * Write EEPROM from word 0 to word 20. |
15031 | * | ||
15032 | * Write the microcode image to RISC memory starting at address 0. | ||
15033 | * | ||
15034 | */ | 12414 | */ |
15035 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | 12415 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
12416 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { | ||
12417 | ushort word; | ||
15036 | 12418 | ||
15037 | /* Assume the following compressed format of the microcode buffer: | 12419 | if (*charfields++) { |
15038 | * | 12420 | word = cpu_to_le16(*wbuf); |
15039 | * 254 word (508 byte) table indexed by byte code followed | ||
15040 | * by the following byte codes: | ||
15041 | * | ||
15042 | * 1-Byte Code: | ||
15043 | * 00: Emit word 0 in table. | ||
15044 | * 01: Emit word 1 in table. | ||
15045 | * . | ||
15046 | * FD: Emit word 253 in table. | ||
15047 | * | ||
15048 | * Multi-Byte Code: | ||
15049 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
15050 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
15051 | */ | ||
15052 | word = 0; | ||
15053 | for (i = 253 * 2; i < _adv_asc38C0800_size; i++) { | ||
15054 | if (_adv_asc38C0800_buf[i] == 0xff) { | ||
15055 | for (j = 0; j < _adv_asc38C0800_buf[i + 1]; j++) { | ||
15056 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15057 | _adv_asc38C0800_buf | ||
15058 | [i + | ||
15059 | 3] << 8) | | ||
15060 | _adv_asc38C0800_buf | ||
15061 | [i + 2])); | ||
15062 | word++; | ||
15063 | } | ||
15064 | i += 3; | ||
15065 | } else if (_adv_asc38C0800_buf[i] == 0xfe) { | ||
15066 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15067 | _adv_asc38C0800_buf | ||
15068 | [i + | ||
15069 | 2] << 8) | | ||
15070 | _adv_asc38C0800_buf[i | ||
15071 | + | ||
15072 | 1])); | ||
15073 | i += 2; | ||
15074 | word++; | ||
15075 | } else { | 12421 | } else { |
15076 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | 12422 | word = *wbuf; |
15077 | _adv_asc38C0800_buf[(_adv_asc38C0800_buf[i] * 2) + 1] << 8) | _adv_asc38C0800_buf[_adv_asc38C0800_buf[i] * 2])); | ||
15078 | word++; | ||
15079 | } | ||
15080 | } | ||
15081 | |||
15082 | /* | ||
15083 | * Set 'word' for later use to clear the rest of memory and save | ||
15084 | * the expanded mcode size. | ||
15085 | */ | ||
15086 | word *= 2; | ||
15087 | adv_asc38C0800_expanded_size = word; | ||
15088 | |||
15089 | /* | ||
15090 | * Clear the rest of ASC-38C0800 Internal RAM (16KB). | ||
15091 | */ | ||
15092 | for (; word < ADV_38C0800_MEMSIZE; word += 2) { | ||
15093 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
15094 | } | ||
15095 | |||
15096 | /* | ||
15097 | * Verify the microcode checksum. | ||
15098 | */ | ||
15099 | sum = 0; | ||
15100 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15101 | |||
15102 | for (word = 0; word < adv_asc38C0800_expanded_size; word += 2) { | ||
15103 | sum += AdvReadWordAutoIncLram(iop_base); | ||
15104 | } | ||
15105 | ASC_DBG2(1, "AdvInitAsc38C0800Driver: word %d, i %d\n", word, i); | ||
15106 | |||
15107 | ASC_DBG2(1, | ||
15108 | "AdvInitAsc38C0800Driver: sum 0x%lx, _adv_asc38C0800_chksum 0x%lx\n", | ||
15109 | (ulong)sum, (ulong)_adv_asc38C0800_chksum); | ||
15110 | |||
15111 | if (sum != _adv_asc38C0800_chksum) { | ||
15112 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
15113 | return ADV_ERROR; | ||
15114 | } | ||
15115 | |||
15116 | /* | ||
15117 | * Restore the RISC memory BIOS region. | ||
15118 | */ | ||
15119 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
15120 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
15121 | bios_mem[i]); | ||
15122 | } | ||
15123 | |||
15124 | /* | ||
15125 | * Calculate and write the microcode code checksum to the microcode | ||
15126 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
15127 | */ | ||
15128 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
15129 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
15130 | code_sum = 0; | ||
15131 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
15132 | for (word = begin_addr; word < end_addr; word += 2) { | ||
15133 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15134 | } | ||
15135 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15136 | |||
15137 | /* | ||
15138 | * Read microcode version and date. | ||
15139 | */ | ||
15140 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
15141 | asc_dvc->cfg->mcode_date); | ||
15142 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
15143 | asc_dvc->cfg->mcode_version); | ||
15144 | |||
15145 | /* | ||
15146 | * Set the chip type to indicate the ASC38C0800. | ||
15147 | */ | ||
15148 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800); | ||
15149 | |||
15150 | /* | ||
15151 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
15152 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
15153 | * cable detection and then we are able to read C_DET[3:0]. | ||
15154 | * | ||
15155 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
15156 | * Microcode Default Value' section below. | ||
15157 | */ | ||
15158 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15159 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
15160 | scsi_cfg1 | DIS_TERM_DRV); | ||
15161 | |||
15162 | /* | ||
15163 | * If the PCI Configuration Command Register "Parity Error Response | ||
15164 | * Control" Bit was clear (0), then set the microcode variable | ||
15165 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
15166 | * to ignore DMA parity errors. | ||
15167 | */ | ||
15168 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
15169 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15170 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
15171 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15172 | } | ||
15173 | |||
15174 | /* | ||
15175 | * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2] | ||
15176 | * bits for the default FIFO threshold. | ||
15177 | * | ||
15178 | * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes. | ||
15179 | * | ||
15180 | * For DMA Errata #4 set the BC_THRESH_ENB bit. | ||
15181 | */ | ||
15182 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
15183 | BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH | | ||
15184 | READ_CMD_MRM); | ||
15185 | |||
15186 | /* | ||
15187 | * Microcode operating variables for WDTR, SDTR, and command tag | ||
15188 | * queuing will be set in AdvInquiryHandling() based on what a | ||
15189 | * device reports it is capable of in Inquiry byte 7. | ||
15190 | * | ||
15191 | * If SCSI Bus Resets have been disabled, then directly set | ||
15192 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
15193 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
15194 | * the Inquiry caused by host and target mismatched DTR values. | ||
15195 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
15196 | * be assumed to be in Asynchronous, Narrow mode. | ||
15197 | */ | ||
15198 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
15199 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
15200 | asc_dvc->wdtr_able); | ||
15201 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
15202 | asc_dvc->sdtr_able); | ||
15203 | } | ||
15204 | |||
15205 | /* | ||
15206 | * Set microcode operating variables for DISC and SDTR_SPEED1, | ||
15207 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM | ||
15208 | * configuration values. | ||
15209 | * | ||
15210 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
15211 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
15212 | * without determining here whether the device supports SDTR. | ||
15213 | */ | ||
15214 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | ||
15215 | asc_dvc->cfg->disc_enable); | ||
15216 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
15217 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
15218 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
15219 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
15220 | |||
15221 | /* | ||
15222 | * Set SCSI_CFG0 Microcode Default Value. | ||
15223 | * | ||
15224 | * The microcode will set the SCSI_CFG0 register using this value | ||
15225 | * after it is started below. | ||
15226 | */ | ||
15227 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
15228 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
15229 | asc_dvc->chip_scsi_id); | ||
15230 | |||
15231 | /* | ||
15232 | * Determine SCSI_CFG1 Microcode Default Value. | ||
15233 | * | ||
15234 | * The microcode will set the SCSI_CFG1 register using this value | ||
15235 | * after it is started below. | ||
15236 | */ | ||
15237 | |||
15238 | /* Read current SCSI_CFG1 Register value. */ | ||
15239 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15240 | |||
15241 | /* | ||
15242 | * If the internal narrow cable is reversed all of the SCSI_CTRL | ||
15243 | * register signals will be set. Check for and return an error if | ||
15244 | * this condition is found. | ||
15245 | */ | ||
15246 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
15247 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
15248 | return ADV_ERROR; | ||
15249 | } | ||
15250 | |||
15251 | /* | ||
15252 | * All kind of combinations of devices attached to one of four connectors | ||
15253 | * are acceptable except HVD device attached. For example, LVD device can | ||
15254 | * be attached to SE connector while SE device attached to LVD connector. | ||
15255 | * If LVD device attached to SE connector, it only runs up to Ultra speed. | ||
15256 | * | ||
15257 | * If an HVD device is attached to one of LVD connectors, return an error. | ||
15258 | * However, there is no way to detect HVD device attached to SE connectors. | ||
15259 | */ | ||
15260 | if (scsi_cfg1 & HVD) { | ||
15261 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | ||
15262 | return ADV_ERROR; | ||
15263 | } | ||
15264 | |||
15265 | /* | ||
15266 | * If either SE or LVD automatic termination control is enabled, then | ||
15267 | * set the termination value based on a table listed in a_condor.h. | ||
15268 | * | ||
15269 | * If manual termination was specified with an EEPROM setting then | ||
15270 | * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready to | ||
15271 | * be 'ored' into SCSI_CFG1. | ||
15272 | */ | ||
15273 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
15274 | /* SE automatic termination control is enabled. */ | ||
15275 | switch (scsi_cfg1 & C_DET_SE) { | ||
15276 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
15277 | case 0x1: | ||
15278 | case 0x2: | ||
15279 | case 0x3: | ||
15280 | asc_dvc->cfg->termination |= TERM_SE; | ||
15281 | break; | ||
15282 | |||
15283 | /* TERM_SE_HI: on, TERM_SE_LO: off */ | ||
15284 | case 0x0: | ||
15285 | asc_dvc->cfg->termination |= TERM_SE_HI; | ||
15286 | break; | ||
15287 | } | ||
15288 | } | ||
15289 | |||
15290 | if ((asc_dvc->cfg->termination & TERM_LVD) == 0) { | ||
15291 | /* LVD automatic termination control is enabled. */ | ||
15292 | switch (scsi_cfg1 & C_DET_LVD) { | ||
15293 | /* TERM_LVD_HI: on, TERM_LVD_LO: on */ | ||
15294 | case 0x4: | ||
15295 | case 0x8: | ||
15296 | case 0xC: | ||
15297 | asc_dvc->cfg->termination |= TERM_LVD; | ||
15298 | break; | ||
15299 | |||
15300 | /* TERM_LVD_HI: off, TERM_LVD_LO: off */ | ||
15301 | case 0x0: | ||
15302 | break; | ||
15303 | } | ||
15304 | } | ||
15305 | |||
15306 | /* | ||
15307 | * Clear any set TERM_SE and TERM_LVD bits. | ||
15308 | */ | ||
15309 | scsi_cfg1 &= (~TERM_SE & ~TERM_LVD); | ||
15310 | |||
15311 | /* | ||
15312 | * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'. | ||
15313 | */ | ||
15314 | scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0); | ||
15315 | |||
15316 | /* | ||
15317 | * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE bits | ||
15318 | * and set possibly modified termination control bits in the Microcode | ||
15319 | * SCSI_CFG1 Register Value. | ||
15320 | */ | ||
15321 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE); | ||
15322 | |||
15323 | /* | ||
15324 | * Set SCSI_CFG1 Microcode Default Value | ||
15325 | * | ||
15326 | * Set possibly modified termination control and reset DIS_TERM_DRV | ||
15327 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
15328 | * | ||
15329 | * The microcode will set the SCSI_CFG1 register using this value | ||
15330 | * after it is started below. | ||
15331 | */ | ||
15332 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
15333 | |||
15334 | /* | ||
15335 | * Set MEM_CFG Microcode Default Value | ||
15336 | * | ||
15337 | * The microcode will set the MEM_CFG register using this value | ||
15338 | * after it is started below. | ||
15339 | * | ||
15340 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
15341 | * are defined. | ||
15342 | * | ||
15343 | * ASC-38C0800 has 16KB internal memory. | ||
15344 | */ | ||
15345 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15346 | BIOS_EN | RAM_SZ_16KB); | ||
15347 | |||
15348 | /* | ||
15349 | * Set SEL_MASK Microcode Default Value | ||
15350 | * | ||
15351 | * The microcode will set the SEL_MASK register using this value | ||
15352 | * after it is started below. | ||
15353 | */ | ||
15354 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
15355 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
15356 | |||
15357 | /* | ||
15358 | * Build the carrier freelist. | ||
15359 | * | ||
15360 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
15361 | */ | ||
15362 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | ||
15363 | |||
15364 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | ||
15365 | asc_dvc->carr_freelist = NULL; | ||
15366 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
15367 | buf_size = ADV_CARRIER_BUFSIZE; | ||
15368 | } else { | ||
15369 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
15370 | } | ||
15371 | |||
15372 | do { | ||
15373 | /* | ||
15374 | * Get physical address for the carrier 'carrp'. | ||
15375 | */ | ||
15376 | contig_len = sizeof(ADV_CARR_T); | ||
15377 | carr_paddr = | ||
15378 | cpu_to_le32(DvcGetPhyAddr | ||
15379 | (asc_dvc, NULL, (uchar *)carrp, | ||
15380 | (ADV_SDCNT *)&contig_len, | ||
15381 | ADV_IS_CARRIER_FLAG)); | ||
15382 | |||
15383 | buf_size -= sizeof(ADV_CARR_T); | ||
15384 | |||
15385 | /* | ||
15386 | * If the current carrier is not physically contiguous, then | ||
15387 | * maybe there was a page crossing. Try the next carrier aligned | ||
15388 | * start address. | ||
15389 | */ | ||
15390 | if (contig_len < sizeof(ADV_CARR_T)) { | ||
15391 | carrp++; | ||
15392 | continue; | ||
15393 | } | 12423 | } |
15394 | 12424 | chksum += *wbuf; /* Checksum is calculated from word values. */ | |
15395 | carrp->carr_pa = carr_paddr; | 12425 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); |
15396 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | 12426 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
15397 | 12427 | ASC_EEP_CMD_WRITE | addr); | |
15398 | /* | 12428 | AdvWaitEEPCmd(iop_base); |
15399 | * Insert the carrier at the beginning of the freelist. | 12429 | mdelay(ADV_EEP_DELAY_MS); |
15400 | */ | ||
15401 | carrp->next_vpa = | ||
15402 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
15403 | asc_dvc->carr_freelist = carrp; | ||
15404 | |||
15405 | carrp++; | ||
15406 | } | ||
15407 | while (buf_size > 0); | ||
15408 | |||
15409 | /* | ||
15410 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | ||
15411 | */ | ||
15412 | |||
15413 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { | ||
15414 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
15415 | return ADV_ERROR; | ||
15416 | } | ||
15417 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
15418 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | ||
15419 | |||
15420 | /* | ||
15421 | * The first command issued will be placed in the stopper carrier. | ||
15422 | */ | ||
15423 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
15424 | |||
15425 | /* | ||
15426 | * Set RISC ICQ physical address start value. | ||
15427 | * carr_pa is LE, must be native before write | ||
15428 | */ | ||
15429 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
15430 | |||
15431 | /* | ||
15432 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
15433 | */ | ||
15434 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
15435 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
15436 | return ADV_ERROR; | ||
15437 | } | 12430 | } |
15438 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
15439 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
15440 | 12431 | ||
15441 | /* | 12432 | /* |
15442 | * The first command completed by the RISC will be placed in | 12433 | * Write EEPROM checksum at word 21. |
15443 | * the stopper. | ||
15444 | * | ||
15445 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
15446 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
15447 | */ | 12434 | */ |
15448 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 12435 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
12436 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
12437 | AdvWaitEEPCmd(iop_base); | ||
12438 | wbuf++; | ||
12439 | charfields++; | ||
15449 | 12440 | ||
15450 | /* | 12441 | /* |
15451 | * Set RISC IRQ physical address start value. | 12442 | * Write EEPROM OEM name at words 22 to 29. |
15452 | * | ||
15453 | * carr_pa is LE, must be native before write * | ||
15454 | */ | 12443 | */ |
15455 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | 12444 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
15456 | asc_dvc->carr_pending_cnt = 0; | 12445 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
15457 | 12446 | ushort word; | |
15458 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
15459 | (ADV_INTR_ENABLE_HOST_INTR | | ||
15460 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
15461 | |||
15462 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
15463 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
15464 | |||
15465 | /* finally, finally, gentlemen, start your engine */ | ||
15466 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
15467 | 12447 | ||
15468 | /* | 12448 | if (*charfields++) { |
15469 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 12449 | word = cpu_to_le16(*wbuf); |
15470 | * Resets should be performed. The RISC has to be running | ||
15471 | * to issue a SCSI Bus Reset. | ||
15472 | */ | ||
15473 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
15474 | /* | ||
15475 | * If the BIOS Signature is present in memory, restore the | ||
15476 | * BIOS Handshake Configuration Table and do not perform | ||
15477 | * a SCSI Bus Reset. | ||
15478 | */ | ||
15479 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
15480 | 0x55AA) { | ||
15481 | /* | ||
15482 | * Restore per TID negotiated values. | ||
15483 | */ | ||
15484 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
15485 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
15486 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
15487 | tagqng_able); | ||
15488 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
15489 | AdvWriteByteLram(iop_base, | ||
15490 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
15491 | max_cmd[tid]); | ||
15492 | } | ||
15493 | } else { | 12450 | } else { |
15494 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | 12451 | word = *wbuf; |
15495 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
15496 | } | ||
15497 | } | 12452 | } |
12453 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
12454 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
12455 | ASC_EEP_CMD_WRITE | addr); | ||
12456 | AdvWaitEEPCmd(iop_base); | ||
15498 | } | 12457 | } |
15499 | 12458 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | |
15500 | return warn_code; | 12459 | AdvWaitEEPCmd(iop_base); |
15501 | } | 12460 | } |
15502 | 12461 | ||
15503 | /* | 12462 | /* |
15504 | * Initialize the ASC-38C1600. | 12463 | * Read EEPROM configuration into the specified buffer. |
15505 | * | ||
15506 | * On failure set the ASC_DVC_VAR field 'err_code' and return ADV_ERROR. | ||
15507 | * | ||
15508 | * For a non-fatal error return a warning code. If there are no warnings | ||
15509 | * then 0 is returned. | ||
15510 | * | 12464 | * |
15511 | * Needed after initialization for error recovery. | 12465 | * Return a checksum based on the EEPROM configuration read. |
15512 | */ | 12466 | */ |
15513 | static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) | 12467 | static ushort __devinit |
12468 | AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | ||
15514 | { | 12469 | { |
15515 | AdvPortAddr iop_base; | 12470 | ushort wval, chksum; |
15516 | ushort warn_code; | 12471 | ushort *wbuf; |
15517 | ADV_DCNT sum; | 12472 | int eep_addr; |
15518 | int begin_addr; | 12473 | ushort *charfields; |
15519 | int end_addr; | ||
15520 | ushort code_sum; | ||
15521 | long word; | ||
15522 | int j; | ||
15523 | int adv_asc38C1600_expanded_size; | ||
15524 | ADV_CARR_T *carrp; | ||
15525 | ADV_DCNT contig_len; | ||
15526 | ADV_SDCNT buf_size; | ||
15527 | ADV_PADDR carr_paddr; | ||
15528 | int i; | ||
15529 | ushort scsi_cfg1; | ||
15530 | uchar byte; | ||
15531 | uchar tid; | ||
15532 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ | ||
15533 | ushort wdtr_able, sdtr_able, ppr_able, tagqng_able; | ||
15534 | uchar max_cmd[ASC_MAX_TID + 1]; | ||
15535 | |||
15536 | /* If there is already an error, don't continue. */ | ||
15537 | if (asc_dvc->err_code != 0) { | ||
15538 | return ADV_ERROR; | ||
15539 | } | ||
15540 | |||
15541 | /* | ||
15542 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600. | ||
15543 | */ | ||
15544 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { | ||
15545 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
15546 | return ADV_ERROR; | ||
15547 | } | ||
15548 | |||
15549 | warn_code = 0; | ||
15550 | iop_base = asc_dvc->iop_base; | ||
15551 | |||
15552 | /* | ||
15553 | * Save the RISC memory BIOS region before writing the microcode. | ||
15554 | * The BIOS may already be loaded and using its RISC LRAM region | ||
15555 | * so its region must be saved and restored. | ||
15556 | * | ||
15557 | * Note: This code makes the assumption, which is currently true, | ||
15558 | * that a chip reset does not clear RISC LRAM. | ||
15559 | */ | ||
15560 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
15561 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
15562 | bios_mem[i]); | ||
15563 | } | ||
15564 | |||
15565 | /* | ||
15566 | * Save current per TID negotiated values. | ||
15567 | */ | ||
15568 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
15569 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
15570 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
15571 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
15572 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { | ||
15573 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
15574 | max_cmd[tid]); | ||
15575 | } | ||
15576 | |||
15577 | /* | ||
15578 | * RAM BIST (Built-In Self Test) | ||
15579 | * | ||
15580 | * Address : I/O base + offset 0x38h register (byte). | ||
15581 | * Function: Bit 7-6(RW) : RAM mode | ||
15582 | * Normal Mode : 0x00 | ||
15583 | * Pre-test Mode : 0x40 | ||
15584 | * RAM Test Mode : 0x80 | ||
15585 | * Bit 5 : unused | ||
15586 | * Bit 4(RO) : Done bit | ||
15587 | * Bit 3-0(RO) : Status | ||
15588 | * Host Error : 0x08 | ||
15589 | * Int_RAM Error : 0x04 | ||
15590 | * RISC Error : 0x02 | ||
15591 | * SCSI Error : 0x01 | ||
15592 | * No Error : 0x00 | ||
15593 | * | ||
15594 | * Note: RAM BIST code should be put right here, before loading the | ||
15595 | * microcode and after saving the RISC memory BIOS region. | ||
15596 | */ | ||
15597 | 12474 | ||
15598 | /* | 12475 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; |
15599 | * LRAM Pre-test | 12476 | wbuf = (ushort *)cfg_buf; |
15600 | * | 12477 | chksum = 0; |
15601 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
15602 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
15603 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
15604 | * to NORMAL_MODE, return an error too. | ||
15605 | */ | ||
15606 | for (i = 0; i < 2; i++) { | ||
15607 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
15608 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15609 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15610 | if ((byte & RAM_TEST_DONE) == 0 | ||
15611 | || (byte & 0x0F) != PRE_TEST_VALUE) { | ||
15612 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15613 | return ADV_ERROR; | ||
15614 | } | ||
15615 | 12478 | ||
15616 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | 12479 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
15617 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | 12480 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
15618 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | 12481 | wval = AdvReadEEPWord(iop_base, eep_addr); |
15619 | != NORMAL_VALUE) { | 12482 | chksum += wval; /* Checksum is calculated from word values. */ |
15620 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | 12483 | if (*charfields++) { |
15621 | return ADV_ERROR; | 12484 | *wbuf = le16_to_cpu(wval); |
12485 | } else { | ||
12486 | *wbuf = wval; | ||
15622 | } | 12487 | } |
15623 | } | 12488 | } |
12489 | /* Read checksum word. */ | ||
12490 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
12491 | wbuf++; | ||
12492 | charfields++; | ||
15624 | 12493 | ||
15625 | /* | 12494 | /* Read rest of EEPROM not covered by the checksum. */ |
15626 | * LRAM Test - It takes about 1.5 ms to run through the test. | 12495 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
15627 | * | 12496 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
15628 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. | 12497 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
15629 | * If Done bit not set or Status not 0, save register byte, set the | 12498 | if (*charfields++) { |
15630 | * err_code, and return an error. | 12499 | *wbuf = le16_to_cpu(*wbuf); |
15631 | */ | 12500 | } |
15632 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); | ||
15633 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ | ||
15634 | |||
15635 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15636 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { | ||
15637 | /* Get here if Done bit not set or Status not 0. */ | ||
15638 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ | ||
15639 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15640 | return ADV_ERROR; | ||
15641 | } | 12501 | } |
12502 | return chksum; | ||
12503 | } | ||
15642 | 12504 | ||
15643 | /* We need to reset back to normal mode after LRAM test passes. */ | 12505 | /* |
15644 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | 12506 | * Read EEPROM configuration into the specified buffer. |
12507 | * | ||
12508 | * Return a checksum based on the EEPROM configuration read. | ||
12509 | */ | ||
12510 | static ushort __devinit | ||
12511 | AdvGet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) | ||
12512 | { | ||
12513 | ushort wval, chksum; | ||
12514 | ushort *wbuf; | ||
12515 | int eep_addr; | ||
12516 | ushort *charfields; | ||
15645 | 12517 | ||
15646 | /* | 12518 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; |
15647 | * Load the Microcode | 12519 | wbuf = (ushort *)cfg_buf; |
15648 | * | 12520 | chksum = 0; |
15649 | * Write the microcode image to RISC memory starting at address 0. | ||
15650 | * | ||
15651 | */ | ||
15652 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15653 | 12521 | ||
15654 | /* | 12522 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
15655 | * Assume the following compressed format of the microcode buffer: | 12523 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
15656 | * | 12524 | wval = AdvReadEEPWord(iop_base, eep_addr); |
15657 | * 254 word (508 byte) table indexed by byte code followed | 12525 | chksum += wval; /* Checksum is calculated from word values. */ |
15658 | * by the following byte codes: | 12526 | if (*charfields++) { |
15659 | * | 12527 | *wbuf = le16_to_cpu(wval); |
15660 | * 1-Byte Code: | ||
15661 | * 00: Emit word 0 in table. | ||
15662 | * 01: Emit word 1 in table. | ||
15663 | * . | ||
15664 | * FD: Emit word 253 in table. | ||
15665 | * | ||
15666 | * Multi-Byte Code: | ||
15667 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
15668 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
15669 | */ | ||
15670 | word = 0; | ||
15671 | for (i = 253 * 2; i < _adv_asc38C1600_size; i++) { | ||
15672 | if (_adv_asc38C1600_buf[i] == 0xff) { | ||
15673 | for (j = 0; j < _adv_asc38C1600_buf[i + 1]; j++) { | ||
15674 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15675 | _adv_asc38C1600_buf | ||
15676 | [i + | ||
15677 | 3] << 8) | | ||
15678 | _adv_asc38C1600_buf | ||
15679 | [i + 2])); | ||
15680 | word++; | ||
15681 | } | ||
15682 | i += 3; | ||
15683 | } else if (_adv_asc38C1600_buf[i] == 0xfe) { | ||
15684 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15685 | _adv_asc38C1600_buf | ||
15686 | [i + | ||
15687 | 2] << 8) | | ||
15688 | _adv_asc38C1600_buf[i | ||
15689 | + | ||
15690 | 1])); | ||
15691 | i += 2; | ||
15692 | word++; | ||
15693 | } else { | 12528 | } else { |
15694 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | 12529 | *wbuf = wval; |
15695 | _adv_asc38C1600_buf[(_adv_asc38C1600_buf[i] * 2) + 1] << 8) | _adv_asc38C1600_buf[_adv_asc38C1600_buf[i] * 2])); | ||
15696 | word++; | ||
15697 | } | 12530 | } |
15698 | } | 12531 | } |
12532 | /* Read checksum word. */ | ||
12533 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
12534 | wbuf++; | ||
12535 | charfields++; | ||
15699 | 12536 | ||
15700 | /* | 12537 | /* Read rest of EEPROM not covered by the checksum. */ |
15701 | * Set 'word' for later use to clear the rest of memory and save | 12538 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
15702 | * the expanded mcode size. | 12539 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
15703 | */ | 12540 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
15704 | word *= 2; | 12541 | if (*charfields++) { |
15705 | adv_asc38C1600_expanded_size = word; | 12542 | *wbuf = le16_to_cpu(*wbuf); |
15706 | |||
15707 | /* | ||
15708 | * Clear the rest of ASC-38C1600 Internal RAM (32KB). | ||
15709 | */ | ||
15710 | for (; word < ADV_38C1600_MEMSIZE; word += 2) { | ||
15711 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
15712 | } | ||
15713 | |||
15714 | /* | ||
15715 | * Verify the microcode checksum. | ||
15716 | */ | ||
15717 | sum = 0; | ||
15718 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15719 | |||
15720 | for (word = 0; word < adv_asc38C1600_expanded_size; word += 2) { | ||
15721 | sum += AdvReadWordAutoIncLram(iop_base); | ||
15722 | } | ||
15723 | |||
15724 | if (sum != _adv_asc38C1600_chksum) { | ||
15725 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
15726 | return ADV_ERROR; | ||
15727 | } | ||
15728 | |||
15729 | /* | ||
15730 | * Restore the RISC memory BIOS region. | ||
15731 | */ | ||
15732 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
15733 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
15734 | bios_mem[i]); | ||
15735 | } | ||
15736 | |||
15737 | /* | ||
15738 | * Calculate and write the microcode code checksum to the microcode | ||
15739 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
15740 | */ | ||
15741 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
15742 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
15743 | code_sum = 0; | ||
15744 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
15745 | for (word = begin_addr; word < end_addr; word += 2) { | ||
15746 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15747 | } | ||
15748 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15749 | |||
15750 | /* | ||
15751 | * Read microcode version and date. | ||
15752 | */ | ||
15753 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
15754 | asc_dvc->cfg->mcode_date); | ||
15755 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
15756 | asc_dvc->cfg->mcode_version); | ||
15757 | |||
15758 | /* | ||
15759 | * Set the chip type to indicate the ASC38C1600. | ||
15760 | */ | ||
15761 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600); | ||
15762 | |||
15763 | /* | ||
15764 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
15765 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
15766 | * cable detection and then we are able to read C_DET[3:0]. | ||
15767 | * | ||
15768 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
15769 | * Microcode Default Value' section below. | ||
15770 | */ | ||
15771 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15772 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
15773 | scsi_cfg1 | DIS_TERM_DRV); | ||
15774 | |||
15775 | /* | ||
15776 | * If the PCI Configuration Command Register "Parity Error Response | ||
15777 | * Control" Bit was clear (0), then set the microcode variable | ||
15778 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
15779 | * to ignore DMA parity errors. | ||
15780 | */ | ||
15781 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
15782 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15783 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
15784 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15785 | } | ||
15786 | |||
15787 | /* | ||
15788 | * If the BIOS control flag AIPP (Asynchronous Information | ||
15789 | * Phase Protection) disable bit is not set, then set the firmware | ||
15790 | * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable | ||
15791 | * AIPP checking and encoding. | ||
15792 | */ | ||
15793 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) { | ||
15794 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15795 | word |= CONTROL_FLAG_ENABLE_AIPP; | ||
15796 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15797 | } | ||
15798 | |||
15799 | /* | ||
15800 | * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4], | ||
15801 | * and START_CTL_TH [3:2]. | ||
15802 | */ | ||
15803 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
15804 | FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM); | ||
15805 | |||
15806 | /* | ||
15807 | * Microcode operating variables for WDTR, SDTR, and command tag | ||
15808 | * queuing will be set in AdvInquiryHandling() based on what a | ||
15809 | * device reports it is capable of in Inquiry byte 7. | ||
15810 | * | ||
15811 | * If SCSI Bus Resets have been disabled, then directly set | ||
15812 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
15813 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
15814 | * the Inquiry caused by host and target mismatched DTR values. | ||
15815 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
15816 | * be assumed to be in Asynchronous, Narrow mode. | ||
15817 | */ | ||
15818 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
15819 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
15820 | asc_dvc->wdtr_able); | ||
15821 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
15822 | asc_dvc->sdtr_able); | ||
15823 | } | ||
15824 | |||
15825 | /* | ||
15826 | * Set microcode operating variables for DISC and SDTR_SPEED1, | ||
15827 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM | ||
15828 | * configuration values. | ||
15829 | * | ||
15830 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
15831 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
15832 | * without determining here whether the device supports SDTR. | ||
15833 | */ | ||
15834 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | ||
15835 | asc_dvc->cfg->disc_enable); | ||
15836 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
15837 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
15838 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
15839 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
15840 | |||
15841 | /* | ||
15842 | * Set SCSI_CFG0 Microcode Default Value. | ||
15843 | * | ||
15844 | * The microcode will set the SCSI_CFG0 register using this value | ||
15845 | * after it is started below. | ||
15846 | */ | ||
15847 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
15848 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
15849 | asc_dvc->chip_scsi_id); | ||
15850 | |||
15851 | /* | ||
15852 | * Calculate SCSI_CFG1 Microcode Default Value. | ||
15853 | * | ||
15854 | * The microcode will set the SCSI_CFG1 register using this value | ||
15855 | * after it is started below. | ||
15856 | * | ||
15857 | * Each ASC-38C1600 function has only two cable detect bits. | ||
15858 | * The bus mode override bits are in IOPB_SOFT_OVER_WR. | ||
15859 | */ | ||
15860 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15861 | |||
15862 | /* | ||
15863 | * If the cable is reversed all of the SCSI_CTRL register signals | ||
15864 | * will be set. Check for and return an error if this condition is | ||
15865 | * found. | ||
15866 | */ | ||
15867 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
15868 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
15869 | return ADV_ERROR; | ||
15870 | } | ||
15871 | |||
15872 | /* | ||
15873 | * Each ASC-38C1600 function has two connectors. Only an HVD device | ||
15874 | * can not be connected to either connector. An LVD device or SE device | ||
15875 | * may be connected to either connecor. If an SE device is connected, | ||
15876 | * then at most Ultra speed (20 Mhz) can be used on both connectors. | ||
15877 | * | ||
15878 | * If an HVD device is attached, return an error. | ||
15879 | */ | ||
15880 | if (scsi_cfg1 & HVD) { | ||
15881 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | ||
15882 | return ADV_ERROR; | ||
15883 | } | ||
15884 | |||
15885 | /* | ||
15886 | * Each function in the ASC-38C1600 uses only the SE cable detect and | ||
15887 | * termination because there are two connectors for each function. Each | ||
15888 | * function may use either LVD or SE mode. Corresponding the SE automatic | ||
15889 | * termination control EEPROM bits are used for each function. Each | ||
15890 | * function has its own EEPROM. If SE automatic control is enabled for | ||
15891 | * the function, then set the termination value based on a table listed | ||
15892 | * in a_condor.h. | ||
15893 | * | ||
15894 | * If manual termination is specified in the EEPROM for the function, | ||
15895 | * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is | ||
15896 | * ready to be 'ored' into SCSI_CFG1. | ||
15897 | */ | ||
15898 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
15899 | /* SE automatic termination control is enabled. */ | ||
15900 | switch (scsi_cfg1 & C_DET_SE) { | ||
15901 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
15902 | case 0x1: | ||
15903 | case 0x2: | ||
15904 | case 0x3: | ||
15905 | asc_dvc->cfg->termination |= TERM_SE; | ||
15906 | break; | ||
15907 | |||
15908 | case 0x0: | ||
15909 | if (ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) == 0) { | ||
15910 | /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */ | ||
15911 | } else { | ||
15912 | /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */ | ||
15913 | asc_dvc->cfg->termination |= TERM_SE_HI; | ||
15914 | } | ||
15915 | break; | ||
15916 | } | 12543 | } |
15917 | } | 12544 | } |
12545 | return chksum; | ||
12546 | } | ||
15918 | 12547 | ||
15919 | /* | 12548 | /* |
15920 | * Clear any set TERM_SE bits. | 12549 | * Read EEPROM configuration into the specified buffer. |
15921 | */ | 12550 | * |
15922 | scsi_cfg1 &= ~TERM_SE; | 12551 | * Return a checksum based on the EEPROM configuration read. |
15923 | 12552 | */ | |
15924 | /* | 12553 | static ushort __devinit |
15925 | * Invert the TERM_SE bits and then set 'scsi_cfg1'. | 12554 | AdvGet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) |
15926 | */ | 12555 | { |
15927 | scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE); | 12556 | ushort wval, chksum; |
15928 | 12557 | ushort *wbuf; | |
15929 | /* | 12558 | int eep_addr; |
15930 | * Clear Big Endian and Terminator Polarity bits and set possibly | 12559 | ushort *charfields; |
15931 | * modified termination control bits in the Microcode SCSI_CFG1 | ||
15932 | * Register Value. | ||
15933 | * | ||
15934 | * Big Endian bit is not used even on big endian machines. | ||
15935 | */ | ||
15936 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL); | ||
15937 | |||
15938 | /* | ||
15939 | * Set SCSI_CFG1 Microcode Default Value | ||
15940 | * | ||
15941 | * Set possibly modified termination control bits in the Microcode | ||
15942 | * SCSI_CFG1 Register Value. | ||
15943 | * | ||
15944 | * The microcode will set the SCSI_CFG1 register using this value | ||
15945 | * after it is started below. | ||
15946 | */ | ||
15947 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
15948 | |||
15949 | /* | ||
15950 | * Set MEM_CFG Microcode Default Value | ||
15951 | * | ||
15952 | * The microcode will set the MEM_CFG register using this value | ||
15953 | * after it is started below. | ||
15954 | * | ||
15955 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
15956 | * are defined. | ||
15957 | * | ||
15958 | * ASC-38C1600 has 32KB internal memory. | ||
15959 | * | ||
15960 | * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come | ||
15961 | * out a special 16K Adv Library and Microcode version. After the issue | ||
15962 | * resolved, we should turn back to the 32K support. Both a_condor.h and | ||
15963 | * mcode.sas files also need to be updated. | ||
15964 | * | ||
15965 | * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15966 | * BIOS_EN | RAM_SZ_32KB); | ||
15967 | */ | ||
15968 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15969 | BIOS_EN | RAM_SZ_16KB); | ||
15970 | |||
15971 | /* | ||
15972 | * Set SEL_MASK Microcode Default Value | ||
15973 | * | ||
15974 | * The microcode will set the SEL_MASK register using this value | ||
15975 | * after it is started below. | ||
15976 | */ | ||
15977 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
15978 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
15979 | |||
15980 | /* | ||
15981 | * Build the carrier freelist. | ||
15982 | * | ||
15983 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
15984 | */ | ||
15985 | |||
15986 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | ||
15987 | |||
15988 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | ||
15989 | asc_dvc->carr_freelist = NULL; | ||
15990 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
15991 | buf_size = ADV_CARRIER_BUFSIZE; | ||
15992 | } else { | ||
15993 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
15994 | } | ||
15995 | |||
15996 | do { | ||
15997 | /* | ||
15998 | * Get physical address for the carrier 'carrp'. | ||
15999 | */ | ||
16000 | contig_len = sizeof(ADV_CARR_T); | ||
16001 | carr_paddr = | ||
16002 | cpu_to_le32(DvcGetPhyAddr | ||
16003 | (asc_dvc, NULL, (uchar *)carrp, | ||
16004 | (ADV_SDCNT *)&contig_len, | ||
16005 | ADV_IS_CARRIER_FLAG)); | ||
16006 | 12560 | ||
16007 | buf_size -= sizeof(ADV_CARR_T); | 12561 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; |
12562 | wbuf = (ushort *)cfg_buf; | ||
12563 | chksum = 0; | ||
16008 | 12564 | ||
16009 | /* | 12565 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
16010 | * If the current carrier is not physically contiguous, then | 12566 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
16011 | * maybe there was a page crossing. Try the next carrier aligned | 12567 | wval = AdvReadEEPWord(iop_base, eep_addr); |
16012 | * start address. | 12568 | chksum += wval; /* Checksum is calculated from word values. */ |
16013 | */ | 12569 | if (*charfields++) { |
16014 | if (contig_len < sizeof(ADV_CARR_T)) { | 12570 | *wbuf = le16_to_cpu(wval); |
16015 | carrp++; | 12571 | } else { |
16016 | continue; | 12572 | *wbuf = wval; |
16017 | } | 12573 | } |
16018 | |||
16019 | carrp->carr_pa = carr_paddr; | ||
16020 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | ||
16021 | |||
16022 | /* | ||
16023 | * Insert the carrier at the beginning of the freelist. | ||
16024 | */ | ||
16025 | carrp->next_vpa = | ||
16026 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
16027 | asc_dvc->carr_freelist = carrp; | ||
16028 | |||
16029 | carrp++; | ||
16030 | } | ||
16031 | while (buf_size > 0); | ||
16032 | |||
16033 | /* | ||
16034 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | ||
16035 | */ | ||
16036 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { | ||
16037 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
16038 | return ADV_ERROR; | ||
16039 | } | 12574 | } |
16040 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 12575 | /* Read checksum word. */ |
16041 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | 12576 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
16042 | 12577 | wbuf++; | |
16043 | /* | 12578 | charfields++; |
16044 | * The first command issued will be placed in the stopper carrier. | ||
16045 | */ | ||
16046 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
16047 | |||
16048 | /* | ||
16049 | * Set RISC ICQ physical address start value. Initialize the | ||
16050 | * COMMA register to the same value otherwise the RISC will | ||
16051 | * prematurely detect a command is available. | ||
16052 | */ | ||
16053 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | ||
16054 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | ||
16055 | le32_to_cpu(asc_dvc->icq_sp->carr_pa)); | ||
16056 | |||
16057 | /* | ||
16058 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
16059 | */ | ||
16060 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { | ||
16061 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
16062 | return ADV_ERROR; | ||
16063 | } | ||
16064 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
16065 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
16066 | |||
16067 | /* | ||
16068 | * The first command completed by the RISC will be placed in | ||
16069 | * the stopper. | ||
16070 | * | ||
16071 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
16072 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
16073 | */ | ||
16074 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
16075 | |||
16076 | /* | ||
16077 | * Set RISC IRQ physical address start value. | ||
16078 | */ | ||
16079 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
16080 | asc_dvc->carr_pending_cnt = 0; | ||
16081 | |||
16082 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
16083 | (ADV_INTR_ENABLE_HOST_INTR | | ||
16084 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
16085 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
16086 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
16087 | |||
16088 | /* finally, finally, gentlemen, start your engine */ | ||
16089 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
16090 | 12579 | ||
16091 | /* | 12580 | /* Read rest of EEPROM not covered by the checksum. */ |
16092 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 12581 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
16093 | * Resets should be performed. The RISC has to be running | 12582 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
16094 | * to issue a SCSI Bus Reset. | 12583 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
16095 | */ | 12584 | if (*charfields++) { |
16096 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | 12585 | *wbuf = le16_to_cpu(*wbuf); |
16097 | /* | ||
16098 | * If the BIOS Signature is present in memory, restore the | ||
16099 | * per TID microcode operating variables. | ||
16100 | */ | ||
16101 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
16102 | 0x55AA) { | ||
16103 | /* | ||
16104 | * Restore per TID negotiated values. | ||
16105 | */ | ||
16106 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
16107 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
16108 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
16109 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
16110 | tagqng_able); | ||
16111 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { | ||
16112 | AdvWriteByteLram(iop_base, | ||
16113 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
16114 | max_cmd[tid]); | ||
16115 | } | ||
16116 | } else { | ||
16117 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
16118 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
16119 | } | ||
16120 | } | 12586 | } |
16121 | } | 12587 | } |
16122 | 12588 | return chksum; | |
16123 | return warn_code; | ||
16124 | } | 12589 | } |
16125 | 12590 | ||
16126 | /* | 12591 | /* |
@@ -16135,12 +12600,11 @@ static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) | |||
16135 | * | 12600 | * |
16136 | * Note: Chip is stopped on entry. | 12601 | * Note: Chip is stopped on entry. |
16137 | */ | 12602 | */ |
16138 | static int __init AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) | 12603 | static int __devinit AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) |
16139 | { | 12604 | { |
16140 | AdvPortAddr iop_base; | 12605 | AdvPortAddr iop_base; |
16141 | ushort warn_code; | 12606 | ushort warn_code; |
16142 | ADVEEP_3550_CONFIG eep_config; | 12607 | ADVEEP_3550_CONFIG eep_config; |
16143 | int i; | ||
16144 | 12608 | ||
16145 | iop_base = asc_dvc->iop_base; | 12609 | iop_base = asc_dvc->iop_base; |
16146 | 12610 | ||
@@ -16157,15 +12621,12 @@ static int __init AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) | |||
16157 | /* | 12621 | /* |
16158 | * Set EEPROM default values. | 12622 | * Set EEPROM default values. |
16159 | */ | 12623 | */ |
16160 | for (i = 0; i < sizeof(ADVEEP_3550_CONFIG); i++) { | 12624 | memcpy(&eep_config, &Default_3550_EEPROM_Config, |
16161 | *((uchar *)&eep_config + i) = | 12625 | sizeof(ADVEEP_3550_CONFIG)); |
16162 | *((uchar *)&Default_3550_EEPROM_Config + i); | ||
16163 | } | ||
16164 | 12626 | ||
16165 | /* | 12627 | /* |
16166 | * Assume the 6 byte board serial number that was read | 12628 | * Assume the 6 byte board serial number that was read from |
16167 | * from EEPROM is correct even if the EEPROM checksum | 12629 | * EEPROM is correct even if the EEPROM checksum failed. |
16168 | * failed. | ||
16169 | */ | 12630 | */ |
16170 | eep_config.serial_number_word3 = | 12631 | eep_config.serial_number_word3 = |
16171 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | 12632 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); |
@@ -16289,12 +12750,11 @@ static int __init AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) | |||
16289 | * | 12750 | * |
16290 | * Note: Chip is stopped on entry. | 12751 | * Note: Chip is stopped on entry. |
16291 | */ | 12752 | */ |
16292 | static int __init AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) | 12753 | static int __devinit AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) |
16293 | { | 12754 | { |
16294 | AdvPortAddr iop_base; | 12755 | AdvPortAddr iop_base; |
16295 | ushort warn_code; | 12756 | ushort warn_code; |
16296 | ADVEEP_38C0800_CONFIG eep_config; | 12757 | ADVEEP_38C0800_CONFIG eep_config; |
16297 | int i; | ||
16298 | uchar tid, termination; | 12758 | uchar tid, termination; |
16299 | ushort sdtr_speed = 0; | 12759 | ushort sdtr_speed = 0; |
16300 | 12760 | ||
@@ -16314,15 +12774,12 @@ static int __init AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) | |||
16314 | /* | 12774 | /* |
16315 | * Set EEPROM default values. | 12775 | * Set EEPROM default values. |
16316 | */ | 12776 | */ |
16317 | for (i = 0; i < sizeof(ADVEEP_38C0800_CONFIG); i++) { | 12777 | memcpy(&eep_config, &Default_38C0800_EEPROM_Config, |
16318 | *((uchar *)&eep_config + i) = | 12778 | sizeof(ADVEEP_38C0800_CONFIG)); |
16319 | *((uchar *)&Default_38C0800_EEPROM_Config + i); | ||
16320 | } | ||
16321 | 12779 | ||
16322 | /* | 12780 | /* |
16323 | * Assume the 6 byte board serial number that was read | 12781 | * Assume the 6 byte board serial number that was read from |
16324 | * from EEPROM is correct even if the EEPROM checksum | 12782 | * EEPROM is correct even if the EEPROM checksum failed. |
16325 | * failed. | ||
16326 | */ | 12783 | */ |
16327 | eep_config.serial_number_word3 = | 12784 | eep_config.serial_number_word3 = |
16328 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | 12785 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); |
@@ -16492,12 +12949,11 @@ static int __init AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) | |||
16492 | * | 12949 | * |
16493 | * Note: Chip is stopped on entry. | 12950 | * Note: Chip is stopped on entry. |
16494 | */ | 12951 | */ |
16495 | static int __init AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) | 12952 | static int __devinit AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) |
16496 | { | 12953 | { |
16497 | AdvPortAddr iop_base; | 12954 | AdvPortAddr iop_base; |
16498 | ushort warn_code; | 12955 | ushort warn_code; |
16499 | ADVEEP_38C1600_CONFIG eep_config; | 12956 | ADVEEP_38C1600_CONFIG eep_config; |
16500 | int i; | ||
16501 | uchar tid, termination; | 12957 | uchar tid, termination; |
16502 | ushort sdtr_speed = 0; | 12958 | ushort sdtr_speed = 0; |
16503 | 12959 | ||
@@ -16512,75 +12968,52 @@ static int __init AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) | |||
16512 | */ | 12968 | */ |
16513 | if (AdvGet38C1600EEPConfig(iop_base, &eep_config) != | 12969 | if (AdvGet38C1600EEPConfig(iop_base, &eep_config) != |
16514 | eep_config.check_sum) { | 12970 | eep_config.check_sum) { |
12971 | struct pci_dev *pdev = adv_dvc_to_pdev(asc_dvc); | ||
16515 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | 12972 | warn_code |= ASC_WARN_EEPROM_CHKSUM; |
16516 | 12973 | ||
16517 | /* | 12974 | /* |
16518 | * Set EEPROM default values. | 12975 | * Set EEPROM default values. |
16519 | */ | 12976 | */ |
16520 | for (i = 0; i < sizeof(ADVEEP_38C1600_CONFIG); i++) { | 12977 | memcpy(&eep_config, &Default_38C1600_EEPROM_Config, |
16521 | if (i == 1 | 12978 | sizeof(ADVEEP_38C1600_CONFIG)); |
16522 | && ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) != | ||
16523 | 0) { | ||
16524 | /* | ||
16525 | * Set Function 1 EEPROM Word 0 MSB | ||
16526 | * | ||
16527 | * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11) | ||
16528 | * EEPROM bits. | ||
16529 | * | ||
16530 | * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and | ||
16531 | * old Mac system booting problem. The Expansion ROM must | ||
16532 | * be disabled in Function 1 for these systems. | ||
16533 | * | ||
16534 | */ | ||
16535 | *((uchar *)&eep_config + i) = | ||
16536 | ((* | ||
16537 | ((uchar *)&Default_38C1600_EEPROM_Config | ||
16538 | + | ||
16539 | i)) & | ||
16540 | (~ | ||
16541 | (((ADV_EEPROM_BIOS_ENABLE | | ||
16542 | ADV_EEPROM_INTAB) >> 8) & 0xFF))); | ||
16543 | 12979 | ||
16544 | /* | 12980 | if (PCI_FUNC(pdev->devfn) != 0) { |
16545 | * Set the INTAB (bit 11) if the GPIO 0 input indicates | 12981 | u8 ints; |
16546 | * the Function 1 interrupt line is wired to INTA. | 12982 | /* |
16547 | * | 12983 | * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 |
16548 | * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input: | 12984 | * and old Mac system booting problem. The Expansion |
16549 | * 1 - Function 1 interrupt line wired to INT A. | 12985 | * ROM must be disabled in Function 1 for these systems |
16550 | * 0 - Function 1 interrupt line wired to INT B. | 12986 | */ |
16551 | * | 12987 | eep_config.cfg_lsw &= ~ADV_EEPROM_BIOS_ENABLE; |
16552 | * Note: Adapter boards always have Function 0 wired to INTA. | 12988 | /* |
16553 | * Put all 5 GPIO bits in input mode and then read | 12989 | * Clear the INTAB (bit 11) if the GPIO 0 input |
16554 | * their input values. | 12990 | * indicates the Function 1 interrupt line is wired |
16555 | */ | 12991 | * to INTB. |
16556 | AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, | 12992 | * |
16557 | 0); | 12993 | * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input: |
16558 | if (AdvReadByteRegister | 12994 | * 1 - Function 1 interrupt line wired to INT A. |
16559 | (iop_base, IOPB_GPIO_DATA) & 0x01) { | 12995 | * 0 - Function 1 interrupt line wired to INT B. |
16560 | /* Function 1 interrupt wired to INTA; Set EEPROM bit. */ | 12996 | * |
16561 | *((uchar *)&eep_config + i) |= | 12997 | * Note: Function 0 is always wired to INTA. |
16562 | ((ADV_EEPROM_INTAB >> 8) & 0xFF); | 12998 | * Put all 5 GPIO bits in input mode and then read |
16563 | } | 12999 | * their input values. |
16564 | } else { | 13000 | */ |
16565 | *((uchar *)&eep_config + i) = | 13001 | AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, 0); |
16566 | *((uchar *)&Default_38C1600_EEPROM_Config | 13002 | ints = AdvReadByteRegister(iop_base, IOPB_GPIO_DATA); |
16567 | + i); | 13003 | if ((ints & 0x01) == 0) |
16568 | } | 13004 | eep_config.cfg_lsw &= ~ADV_EEPROM_INTAB; |
16569 | } | 13005 | } |
16570 | 13006 | ||
16571 | /* | 13007 | /* |
16572 | * Assume the 6 byte board serial number that was read | 13008 | * Assume the 6 byte board serial number that was read from |
16573 | * from EEPROM is correct even if the EEPROM checksum | 13009 | * EEPROM is correct even if the EEPROM checksum failed. |
16574 | * failed. | ||
16575 | */ | 13010 | */ |
16576 | eep_config.serial_number_word3 = | 13011 | eep_config.serial_number_word3 = |
16577 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | 13012 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); |
16578 | |||
16579 | eep_config.serial_number_word2 = | 13013 | eep_config.serial_number_word2 = |
16580 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); | 13014 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); |
16581 | |||
16582 | eep_config.serial_number_word1 = | 13015 | eep_config.serial_number_word1 = |
16583 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); | 13016 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); |
16584 | 13017 | ||
16585 | AdvSet38C1600EEPConfig(iop_base, &eep_config); | 13018 | AdvSet38C1600EEPConfig(iop_base, &eep_config); |
16586 | } | 13019 | } |
@@ -16729,1176 +13162,281 @@ static int __init AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) | |||
16729 | } | 13162 | } |
16730 | 13163 | ||
16731 | /* | 13164 | /* |
16732 | * Read EEPROM configuration into the specified buffer. | 13165 | * Initialize the ADV_DVC_VAR structure. |
16733 | * | ||
16734 | * Return a checksum based on the EEPROM configuration read. | ||
16735 | */ | ||
16736 | static ushort __init | ||
16737 | AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | ||
16738 | { | ||
16739 | ushort wval, chksum; | ||
16740 | ushort *wbuf; | ||
16741 | int eep_addr; | ||
16742 | ushort *charfields; | ||
16743 | |||
16744 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; | ||
16745 | wbuf = (ushort *)cfg_buf; | ||
16746 | chksum = 0; | ||
16747 | |||
16748 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | ||
16749 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { | ||
16750 | wval = AdvReadEEPWord(iop_base, eep_addr); | ||
16751 | chksum += wval; /* Checksum is calculated from word values. */ | ||
16752 | if (*charfields++) { | ||
16753 | *wbuf = le16_to_cpu(wval); | ||
16754 | } else { | ||
16755 | *wbuf = wval; | ||
16756 | } | ||
16757 | } | ||
16758 | /* Read checksum word. */ | ||
16759 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16760 | wbuf++; | ||
16761 | charfields++; | ||
16762 | |||
16763 | /* Read rest of EEPROM not covered by the checksum. */ | ||
16764 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | ||
16765 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { | ||
16766 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16767 | if (*charfields++) { | ||
16768 | *wbuf = le16_to_cpu(*wbuf); | ||
16769 | } | ||
16770 | } | ||
16771 | return chksum; | ||
16772 | } | ||
16773 | |||
16774 | /* | ||
16775 | * Read EEPROM configuration into the specified buffer. | ||
16776 | * | 13166 | * |
16777 | * Return a checksum based on the EEPROM configuration read. | 13167 | * On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR. |
16778 | */ | ||
16779 | static ushort __init | ||
16780 | AdvGet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) | ||
16781 | { | ||
16782 | ushort wval, chksum; | ||
16783 | ushort *wbuf; | ||
16784 | int eep_addr; | ||
16785 | ushort *charfields; | ||
16786 | |||
16787 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; | ||
16788 | wbuf = (ushort *)cfg_buf; | ||
16789 | chksum = 0; | ||
16790 | |||
16791 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | ||
16792 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { | ||
16793 | wval = AdvReadEEPWord(iop_base, eep_addr); | ||
16794 | chksum += wval; /* Checksum is calculated from word values. */ | ||
16795 | if (*charfields++) { | ||
16796 | *wbuf = le16_to_cpu(wval); | ||
16797 | } else { | ||
16798 | *wbuf = wval; | ||
16799 | } | ||
16800 | } | ||
16801 | /* Read checksum word. */ | ||
16802 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16803 | wbuf++; | ||
16804 | charfields++; | ||
16805 | |||
16806 | /* Read rest of EEPROM not covered by the checksum. */ | ||
16807 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | ||
16808 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { | ||
16809 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16810 | if (*charfields++) { | ||
16811 | *wbuf = le16_to_cpu(*wbuf); | ||
16812 | } | ||
16813 | } | ||
16814 | return chksum; | ||
16815 | } | ||
16816 | |||
16817 | /* | ||
16818 | * Read EEPROM configuration into the specified buffer. | ||
16819 | * | 13168 | * |
16820 | * Return a checksum based on the EEPROM configuration read. | 13169 | * For a non-fatal error return a warning code. If there are no warnings |
16821 | */ | 13170 | * then 0 is returned. |
16822 | static ushort __init | ||
16823 | AdvGet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) | ||
16824 | { | ||
16825 | ushort wval, chksum; | ||
16826 | ushort *wbuf; | ||
16827 | int eep_addr; | ||
16828 | ushort *charfields; | ||
16829 | |||
16830 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; | ||
16831 | wbuf = (ushort *)cfg_buf; | ||
16832 | chksum = 0; | ||
16833 | |||
16834 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | ||
16835 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { | ||
16836 | wval = AdvReadEEPWord(iop_base, eep_addr); | ||
16837 | chksum += wval; /* Checksum is calculated from word values. */ | ||
16838 | if (*charfields++) { | ||
16839 | *wbuf = le16_to_cpu(wval); | ||
16840 | } else { | ||
16841 | *wbuf = wval; | ||
16842 | } | ||
16843 | } | ||
16844 | /* Read checksum word. */ | ||
16845 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16846 | wbuf++; | ||
16847 | charfields++; | ||
16848 | |||
16849 | /* Read rest of EEPROM not covered by the checksum. */ | ||
16850 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | ||
16851 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { | ||
16852 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | ||
16853 | if (*charfields++) { | ||
16854 | *wbuf = le16_to_cpu(*wbuf); | ||
16855 | } | ||
16856 | } | ||
16857 | return chksum; | ||
16858 | } | ||
16859 | |||
16860 | /* | ||
16861 | * Read the EEPROM from specified location | ||
16862 | */ | ||
16863 | static ushort __init AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr) | ||
16864 | { | ||
16865 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
16866 | ASC_EEP_CMD_READ | eep_word_addr); | ||
16867 | AdvWaitEEPCmd(iop_base); | ||
16868 | return AdvReadWordRegister(iop_base, IOPW_EE_DATA); | ||
16869 | } | ||
16870 | |||
16871 | /* | ||
16872 | * Wait for EEPROM command to complete | ||
16873 | */ | ||
16874 | static void __init AdvWaitEEPCmd(AdvPortAddr iop_base) | ||
16875 | { | ||
16876 | int eep_delay_ms; | ||
16877 | |||
16878 | for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) { | ||
16879 | if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) & | ||
16880 | ASC_EEP_CMD_DONE) { | ||
16881 | break; | ||
16882 | } | ||
16883 | DvcSleepMilliSecond(1); | ||
16884 | } | ||
16885 | if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) == | ||
16886 | 0) { | ||
16887 | ASC_ASSERT(0); | ||
16888 | } | ||
16889 | return; | ||
16890 | } | ||
16891 | |||
16892 | /* | ||
16893 | * Write the EEPROM from 'cfg_buf'. | ||
16894 | */ | 13171 | */ |
16895 | void __init | 13172 | static int __devinit |
16896 | AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | 13173 | AdvInitGetConfig(struct pci_dev *pdev, struct Scsi_Host *shost) |
16897 | { | 13174 | { |
16898 | ushort *wbuf; | 13175 | struct asc_board *board = shost_priv(shost); |
16899 | ushort addr, chksum; | 13176 | ADV_DVC_VAR *asc_dvc = &board->dvc_var.adv_dvc_var; |
16900 | ushort *charfields; | 13177 | unsigned short warn_code = 0; |
16901 | 13178 | AdvPortAddr iop_base = asc_dvc->iop_base; | |
16902 | wbuf = (ushort *)cfg_buf; | 13179 | u16 cmd; |
16903 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; | 13180 | int status; |
16904 | chksum = 0; | ||
16905 | |||
16906 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | ||
16907 | AdvWaitEEPCmd(iop_base); | ||
16908 | |||
16909 | /* | ||
16910 | * Write EEPROM from word 0 to word 20. | ||
16911 | */ | ||
16912 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | ||
16913 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { | ||
16914 | ushort word; | ||
16915 | |||
16916 | if (*charfields++) { | ||
16917 | word = cpu_to_le16(*wbuf); | ||
16918 | } else { | ||
16919 | word = *wbuf; | ||
16920 | } | ||
16921 | chksum += *wbuf; /* Checksum is calculated from word values. */ | ||
16922 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
16923 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
16924 | ASC_EEP_CMD_WRITE | addr); | ||
16925 | AdvWaitEEPCmd(iop_base); | ||
16926 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | ||
16927 | } | ||
16928 | 13181 | ||
16929 | /* | 13182 | asc_dvc->err_code = 0; |
16930 | * Write EEPROM checksum at word 21. | ||
16931 | */ | ||
16932 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
16933 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
16934 | AdvWaitEEPCmd(iop_base); | ||
16935 | wbuf++; | ||
16936 | charfields++; | ||
16937 | 13183 | ||
16938 | /* | 13184 | /* |
16939 | * Write EEPROM OEM name at words 22 to 29. | 13185 | * Save the state of the PCI Configuration Command Register |
13186 | * "Parity Error Response Control" Bit. If the bit is clear (0), | ||
13187 | * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore | ||
13188 | * DMA parity errors. | ||
16940 | */ | 13189 | */ |
16941 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | 13190 | asc_dvc->cfg->control_flag = 0; |
16942 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { | 13191 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); |
16943 | ushort word; | 13192 | if ((cmd & PCI_COMMAND_PARITY) == 0) |
16944 | 13193 | asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR; | |
16945 | if (*charfields++) { | ||
16946 | word = cpu_to_le16(*wbuf); | ||
16947 | } else { | ||
16948 | word = *wbuf; | ||
16949 | } | ||
16950 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
16951 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
16952 | ASC_EEP_CMD_WRITE | addr); | ||
16953 | AdvWaitEEPCmd(iop_base); | ||
16954 | } | ||
16955 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
16956 | AdvWaitEEPCmd(iop_base); | ||
16957 | return; | ||
16958 | } | ||
16959 | |||
16960 | /* | ||
16961 | * Write the EEPROM from 'cfg_buf'. | ||
16962 | */ | ||
16963 | void __init | ||
16964 | AdvSet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) | ||
16965 | { | ||
16966 | ushort *wbuf; | ||
16967 | ushort *charfields; | ||
16968 | ushort addr, chksum; | ||
16969 | |||
16970 | wbuf = (ushort *)cfg_buf; | ||
16971 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; | ||
16972 | chksum = 0; | ||
16973 | |||
16974 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | ||
16975 | AdvWaitEEPCmd(iop_base); | ||
16976 | 13194 | ||
16977 | /* | 13195 | asc_dvc->cfg->chip_version = |
16978 | * Write EEPROM from word 0 to word 20. | 13196 | AdvGetChipVersion(iop_base, asc_dvc->bus_type); |
16979 | */ | ||
16980 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | ||
16981 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { | ||
16982 | ushort word; | ||
16983 | 13197 | ||
16984 | if (*charfields++) { | 13198 | ASC_DBG(1, "iopb_chip_id_1: 0x%x 0x%x\n", |
16985 | word = cpu_to_le16(*wbuf); | 13199 | (ushort)AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1), |
16986 | } else { | 13200 | (ushort)ADV_CHIP_ID_BYTE); |
16987 | word = *wbuf; | ||
16988 | } | ||
16989 | chksum += *wbuf; /* Checksum is calculated from word values. */ | ||
16990 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
16991 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
16992 | ASC_EEP_CMD_WRITE | addr); | ||
16993 | AdvWaitEEPCmd(iop_base); | ||
16994 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | ||
16995 | } | ||
16996 | 13201 | ||
16997 | /* | 13202 | ASC_DBG(1, "iopw_chip_id_0: 0x%x 0x%x\n", |
16998 | * Write EEPROM checksum at word 21. | 13203 | (ushort)AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0), |
16999 | */ | 13204 | (ushort)ADV_CHIP_ID_WORD); |
17000 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
17001 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
17002 | AdvWaitEEPCmd(iop_base); | ||
17003 | wbuf++; | ||
17004 | charfields++; | ||
17005 | 13205 | ||
17006 | /* | 13206 | /* |
17007 | * Write EEPROM OEM name at words 22 to 29. | 13207 | * Reset the chip to start and allow register writes. |
17008 | */ | 13208 | */ |
17009 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | 13209 | if (AdvFindSignature(iop_base) == 0) { |
17010 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { | 13210 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
17011 | ushort word; | 13211 | return ADV_ERROR; |
17012 | 13212 | } else { | |
17013 | if (*charfields++) { | 13213 | /* |
17014 | word = cpu_to_le16(*wbuf); | 13214 | * The caller must set 'chip_type' to a valid setting. |
17015 | } else { | 13215 | */ |
17016 | word = *wbuf; | 13216 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550 && |
13217 | asc_dvc->chip_type != ADV_CHIP_ASC38C0800 && | ||
13218 | asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { | ||
13219 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | ||
13220 | return ADV_ERROR; | ||
17017 | } | 13221 | } |
17018 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
17019 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
17020 | ASC_EEP_CMD_WRITE | addr); | ||
17021 | AdvWaitEEPCmd(iop_base); | ||
17022 | } | ||
17023 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
17024 | AdvWaitEEPCmd(iop_base); | ||
17025 | return; | ||
17026 | } | ||
17027 | 13222 | ||
17028 | /* | 13223 | /* |
17029 | * Write the EEPROM from 'cfg_buf'. | 13224 | * Reset Chip. |
17030 | */ | 13225 | */ |
17031 | void __init | 13226 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, |
17032 | AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) | 13227 | ADV_CTRL_REG_CMD_RESET); |
17033 | { | 13228 | mdelay(100); |
17034 | ushort *wbuf; | 13229 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, |
17035 | ushort *charfields; | 13230 | ADV_CTRL_REG_CMD_WR_IO_REG); |
17036 | ushort addr, chksum; | ||
17037 | |||
17038 | wbuf = (ushort *)cfg_buf; | ||
17039 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; | ||
17040 | chksum = 0; | ||
17041 | |||
17042 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | ||
17043 | AdvWaitEEPCmd(iop_base); | ||
17044 | |||
17045 | /* | ||
17046 | * Write EEPROM from word 0 to word 20. | ||
17047 | */ | ||
17048 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | ||
17049 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { | ||
17050 | ushort word; | ||
17051 | 13231 | ||
17052 | if (*charfields++) { | 13232 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
17053 | word = cpu_to_le16(*wbuf); | 13233 | status = AdvInitFrom38C1600EEP(asc_dvc); |
13234 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
13235 | status = AdvInitFrom38C0800EEP(asc_dvc); | ||
17054 | } else { | 13236 | } else { |
17055 | word = *wbuf; | 13237 | status = AdvInitFrom3550EEP(asc_dvc); |
17056 | } | 13238 | } |
17057 | chksum += *wbuf; /* Checksum is calculated from word values. */ | 13239 | warn_code |= status; |
17058 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
17059 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
17060 | ASC_EEP_CMD_WRITE | addr); | ||
17061 | AdvWaitEEPCmd(iop_base); | ||
17062 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | ||
17063 | } | 13240 | } |
17064 | 13241 | ||
17065 | /* | 13242 | if (warn_code != 0) |
17066 | * Write EEPROM checksum at word 21. | 13243 | shost_printk(KERN_WARNING, shost, "warning: 0x%x\n", warn_code); |
17067 | */ | ||
17068 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
17069 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
17070 | AdvWaitEEPCmd(iop_base); | ||
17071 | wbuf++; | ||
17072 | charfields++; | ||
17073 | 13244 | ||
17074 | /* | 13245 | if (asc_dvc->err_code) |
17075 | * Write EEPROM OEM name at words 22 to 29. | 13246 | shost_printk(KERN_ERR, shost, "error code 0x%x\n", |
17076 | */ | 13247 | asc_dvc->err_code); |
17077 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | ||
17078 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { | ||
17079 | ushort word; | ||
17080 | 13248 | ||
17081 | if (*charfields++) { | 13249 | return asc_dvc->err_code; |
17082 | word = cpu_to_le16(*wbuf); | ||
17083 | } else { | ||
17084 | word = *wbuf; | ||
17085 | } | ||
17086 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
17087 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
17088 | ASC_EEP_CMD_WRITE | addr); | ||
17089 | AdvWaitEEPCmd(iop_base); | ||
17090 | } | ||
17091 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
17092 | AdvWaitEEPCmd(iop_base); | ||
17093 | return; | ||
17094 | } | 13250 | } |
13251 | #endif | ||
17095 | 13252 | ||
17096 | /* a_advlib.c */ | 13253 | static struct scsi_host_template advansys_template = { |
17097 | /* | 13254 | .proc_name = DRV_NAME, |
17098 | * AdvExeScsiQueue() - Send a request to the RISC microcode program. | 13255 | #ifdef CONFIG_PROC_FS |
17099 | * | 13256 | .proc_info = advansys_proc_info, |
17100 | * Allocate a carrier structure, point the carrier to the ADV_SCSI_REQ_Q, | 13257 | #endif |
17101 | * add the carrier to the ICQ (Initiator Command Queue), and tickle the | 13258 | .name = DRV_NAME, |
17102 | * RISC to notify it a new command is ready to be executed. | 13259 | .info = advansys_info, |
17103 | * | 13260 | .queuecommand = advansys_queuecommand, |
17104 | * If 'done_status' is not set to QD_DO_RETRY, then 'error_retry' will be | 13261 | .eh_bus_reset_handler = advansys_reset, |
17105 | * set to SCSI_MAX_RETRY. | 13262 | .bios_param = advansys_biosparam, |
17106 | * | 13263 | .slave_configure = advansys_slave_configure, |
17107 | * Multi-byte fields in the ASC_SCSI_REQ_Q that are used by the microcode | ||
17108 | * for DMA addresses or math operations are byte swapped to little-endian | ||
17109 | * order. | ||
17110 | * | ||
17111 | * Return: | ||
17112 | * ADV_SUCCESS(1) - The request was successfully queued. | ||
17113 | * ADV_BUSY(0) - Resource unavailable; Retry again after pending | ||
17114 | * request completes. | ||
17115 | * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure | ||
17116 | * host IC error. | ||
17117 | */ | ||
17118 | static int AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq) | ||
17119 | { | ||
17120 | ulong last_int_level; | ||
17121 | AdvPortAddr iop_base; | ||
17122 | ADV_DCNT req_size; | ||
17123 | ADV_PADDR req_paddr; | ||
17124 | ADV_CARR_T *new_carrp; | ||
17125 | |||
17126 | ASC_ASSERT(scsiq != NULL); /* 'scsiq' should never be NULL. */ | ||
17127 | |||
17128 | /* | ||
17129 | * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID. | ||
17130 | */ | ||
17131 | if (scsiq->target_id > ADV_MAX_TID) { | ||
17132 | scsiq->host_status = QHSTA_M_INVALID_DEVICE; | ||
17133 | scsiq->done_status = QD_WITH_ERROR; | ||
17134 | return ADV_ERROR; | ||
17135 | } | ||
17136 | |||
17137 | iop_base = asc_dvc->iop_base; | ||
17138 | |||
17139 | last_int_level = DvcEnterCritical(); | ||
17140 | |||
17141 | /* | ||
17142 | * Allocate a carrier ensuring at least one carrier always | ||
17143 | * remains on the freelist and initialize fields. | ||
17144 | */ | ||
17145 | if ((new_carrp = asc_dvc->carr_freelist) == NULL) { | ||
17146 | DvcLeaveCritical(last_int_level); | ||
17147 | return ADV_BUSY; | ||
17148 | } | ||
17149 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
17150 | ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa)); | ||
17151 | asc_dvc->carr_pending_cnt++; | ||
17152 | |||
17153 | /* | ||
17154 | * Set the carrier to be a stopper by setting 'next_vpa' | ||
17155 | * to the stopper value. The current stopper will be changed | ||
17156 | * below to point to the new stopper. | ||
17157 | */ | ||
17158 | new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
17159 | |||
17160 | /* | ||
17161 | * Clear the ADV_SCSI_REQ_Q done flag. | ||
17162 | */ | ||
17163 | scsiq->a_flag &= ~ADV_SCSIQ_DONE; | ||
17164 | |||
17165 | req_size = sizeof(ADV_SCSI_REQ_Q); | ||
17166 | req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *)scsiq, | ||
17167 | (ADV_SDCNT *)&req_size, ADV_IS_SCSIQ_FLAG); | ||
17168 | |||
17169 | ASC_ASSERT(ADV_32BALIGN(req_paddr) == req_paddr); | ||
17170 | ASC_ASSERT(req_size >= sizeof(ADV_SCSI_REQ_Q)); | ||
17171 | |||
17172 | /* Wait for assertion before making little-endian */ | ||
17173 | req_paddr = cpu_to_le32(req_paddr); | ||
17174 | |||
17175 | /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */ | ||
17176 | scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq)); | ||
17177 | scsiq->scsiq_rptr = req_paddr; | ||
17178 | |||
17179 | scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp)); | ||
17180 | /* | ||
17181 | * Every ADV_CARR_T.carr_pa is byte swapped to little-endian | ||
17182 | * order during initialization. | ||
17183 | */ | ||
17184 | scsiq->carr_pa = asc_dvc->icq_sp->carr_pa; | ||
17185 | |||
17186 | /* | ||
17187 | * Use the current stopper to send the ADV_SCSI_REQ_Q command to | ||
17188 | * the microcode. The newly allocated stopper will become the new | ||
17189 | * stopper. | ||
17190 | */ | ||
17191 | asc_dvc->icq_sp->areq_vpa = req_paddr; | ||
17192 | |||
17193 | /* | 13264 | /* |
17194 | * Set the 'next_vpa' pointer for the old stopper to be the | 13265 | * Because the driver may control an ISA adapter 'unchecked_isa_dma' |
17195 | * physical address of the new stopper. The RISC can only | 13266 | * must be set. The flag will be cleared in advansys_board_found |
17196 | * follow physical addresses. | 13267 | * for non-ISA adapters. |
17197 | */ | 13268 | */ |
17198 | asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa; | 13269 | .unchecked_isa_dma = 1, |
17199 | |||
17200 | /* | 13270 | /* |
17201 | * Set the host adapter stopper pointer to point to the new carrier. | 13271 | * All adapters controlled by this driver are capable of large |
13272 | * scatter-gather lists. According to the mid-level SCSI documentation | ||
13273 | * this obviates any performance gain provided by setting | ||
13274 | * 'use_clustering'. But empirically while CPU utilization is increased | ||
13275 | * by enabling clustering, I/O throughput increases as well. | ||
17202 | */ | 13276 | */ |
17203 | asc_dvc->icq_sp = new_carrp; | 13277 | .use_clustering = ENABLE_CLUSTERING, |
17204 | 13278 | }; | |
17205 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || | ||
17206 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
17207 | /* | ||
17208 | * Tickle the RISC to tell it to read its Command Queue Head pointer. | ||
17209 | */ | ||
17210 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A); | ||
17211 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
17212 | /* | ||
17213 | * Clear the tickle value. In the ASC-3550 the RISC flag | ||
17214 | * command 'clr_tickle_a' does not work unless the host | ||
17215 | * value is cleared. | ||
17216 | */ | ||
17217 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, | ||
17218 | ADV_TICKLE_NOP); | ||
17219 | } | ||
17220 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
17221 | /* | ||
17222 | * Notify the RISC a carrier is ready by writing the physical | ||
17223 | * address of the new carrier stopper to the COMMA register. | ||
17224 | */ | ||
17225 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | ||
17226 | le32_to_cpu(new_carrp->carr_pa)); | ||
17227 | } | ||
17228 | |||
17229 | DvcLeaveCritical(last_int_level); | ||
17230 | |||
17231 | return ADV_SUCCESS; | ||
17232 | } | ||
17233 | 13279 | ||
17234 | /* | 13280 | static int __devinit advansys_wide_init_chip(struct Scsi_Host *shost) |
17235 | * Reset SCSI Bus and purge all outstanding requests. | ||
17236 | * | ||
17237 | * Return Value: | ||
17238 | * ADV_TRUE(1) - All requests are purged and SCSI Bus is reset. | ||
17239 | * ADV_FALSE(0) - Microcode command failed. | ||
17240 | * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC | ||
17241 | * may be hung which requires driver recovery. | ||
17242 | */ | ||
17243 | static int AdvResetSB(ADV_DVC_VAR *asc_dvc) | ||
17244 | { | 13281 | { |
17245 | int status; | 13282 | struct asc_board *board = shost_priv(shost); |
13283 | struct adv_dvc_var *adv_dvc = &board->dvc_var.adv_dvc_var; | ||
13284 | int req_cnt = 0; | ||
13285 | adv_req_t *reqp = NULL; | ||
13286 | int sg_cnt = 0; | ||
13287 | adv_sgblk_t *sgp; | ||
13288 | int warn_code, err_code; | ||
17246 | 13289 | ||
17247 | /* | 13290 | /* |
17248 | * Send the SCSI Bus Reset idle start idle command which asserts | 13291 | * Allocate buffer carrier structures. The total size |
17249 | * the SCSI Bus Reset signal. | 13292 | * is about 4 KB, so allocate all at once. |
17250 | */ | 13293 | */ |
17251 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_START, 0L); | 13294 | adv_dvc->carrier_buf = kmalloc(ADV_CARRIER_BUFSIZE, GFP_KERNEL); |
17252 | if (status != ADV_TRUE) { | 13295 | ASC_DBG(1, "carrier_buf 0x%p\n", adv_dvc->carrier_buf); |
17253 | return status; | ||
17254 | } | ||
17255 | 13296 | ||
17256 | /* | 13297 | if (!adv_dvc->carrier_buf) |
17257 | * Delay for the specified SCSI Bus Reset hold time. | 13298 | goto kmalloc_failed; |
17258 | * | ||
17259 | * The hold time delay is done on the host because the RISC has no | ||
17260 | * microsecond accurate timer. | ||
17261 | */ | ||
17262 | DvcDelayMicroSecond(asc_dvc, (ushort)ASC_SCSI_RESET_HOLD_TIME_US); | ||
17263 | 13299 | ||
17264 | /* | 13300 | /* |
17265 | * Send the SCSI Bus Reset end idle command which de-asserts | 13301 | * Allocate up to 'max_host_qng' request structures for the Wide |
17266 | * the SCSI Bus Reset signal and purges any pending requests. | 13302 | * board. The total size is about 16 KB, so allocate all at once. |
13303 | * If the allocation fails decrement and try again. | ||
17267 | */ | 13304 | */ |
17268 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_END, 0L); | 13305 | for (req_cnt = adv_dvc->max_host_qng; req_cnt > 0; req_cnt--) { |
17269 | if (status != ADV_TRUE) { | 13306 | reqp = kmalloc(sizeof(adv_req_t) * req_cnt, GFP_KERNEL); |
17270 | return status; | ||
17271 | } | ||
17272 | |||
17273 | DvcSleepMilliSecond((ADV_DCNT)asc_dvc->scsi_reset_wait * 1000); | ||
17274 | |||
17275 | return status; | ||
17276 | } | ||
17277 | |||
17278 | /* | ||
17279 | * Reset chip and SCSI Bus. | ||
17280 | * | ||
17281 | * Return Value: | ||
17282 | * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful. | ||
17283 | * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure. | ||
17284 | */ | ||
17285 | static int AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc) | ||
17286 | { | ||
17287 | int status; | ||
17288 | ushort wdtr_able, sdtr_able, tagqng_able; | ||
17289 | ushort ppr_able = 0; | ||
17290 | uchar tid, max_cmd[ADV_MAX_TID + 1]; | ||
17291 | AdvPortAddr iop_base; | ||
17292 | ushort bios_sig; | ||
17293 | 13307 | ||
17294 | iop_base = asc_dvc->iop_base; | 13308 | ASC_DBG(1, "reqp 0x%p, req_cnt %d, bytes %lu\n", reqp, req_cnt, |
13309 | (ulong)sizeof(adv_req_t) * req_cnt); | ||
17295 | 13310 | ||
17296 | /* | 13311 | if (reqp) |
17297 | * Save current per TID negotiated values. | 13312 | break; |
17298 | */ | ||
17299 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
17300 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
17301 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
17302 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
17303 | } | ||
17304 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
17305 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
17306 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
17307 | max_cmd[tid]); | ||
17308 | } | 13313 | } |
17309 | 13314 | ||
17310 | /* | 13315 | if (!reqp) |
17311 | * Force the AdvInitAsc3550/38C0800Driver() function to | 13316 | goto kmalloc_failed; |
17312 | * perform a SCSI Bus Reset by clearing the BIOS signature word. | ||
17313 | * The initialization functions assumes a SCSI Bus Reset is not | ||
17314 | * needed if the BIOS signature word is present. | ||
17315 | */ | ||
17316 | AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); | ||
17317 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0); | ||
17318 | 13317 | ||
17319 | /* | 13318 | adv_dvc->orig_reqp = reqp; |
17320 | * Stop chip and reset it. | ||
17321 | */ | ||
17322 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP); | ||
17323 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET); | ||
17324 | DvcSleepMilliSecond(100); | ||
17325 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
17326 | ADV_CTRL_REG_CMD_WR_IO_REG); | ||
17327 | 13319 | ||
17328 | /* | 13320 | /* |
17329 | * Reset Adv Library error code, if any, and try | 13321 | * Allocate up to ADV_TOT_SG_BLOCK request structures for |
17330 | * re-initializing the chip. | 13322 | * the Wide board. Each structure is about 136 bytes. |
17331 | */ | 13323 | */ |
17332 | asc_dvc->err_code = 0; | 13324 | board->adv_sgblkp = NULL; |
17333 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | 13325 | for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) { |
17334 | status = AdvInitAsc38C1600Driver(asc_dvc); | 13326 | sgp = kmalloc(sizeof(adv_sgblk_t), GFP_KERNEL); |
17335 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
17336 | status = AdvInitAsc38C0800Driver(asc_dvc); | ||
17337 | } else { | ||
17338 | status = AdvInitAsc3550Driver(asc_dvc); | ||
17339 | } | ||
17340 | 13327 | ||
17341 | /* Translate initialization return value to status value. */ | 13328 | if (!sgp) |
17342 | if (status == 0) { | 13329 | break; |
17343 | status = ADV_TRUE; | ||
17344 | } else { | ||
17345 | status = ADV_FALSE; | ||
17346 | } | ||
17347 | 13330 | ||
17348 | /* | 13331 | sgp->next_sgblkp = board->adv_sgblkp; |
17349 | * Restore the BIOS signature word. | 13332 | board->adv_sgblkp = sgp; |
17350 | */ | ||
17351 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); | ||
17352 | 13333 | ||
17353 | /* | ||
17354 | * Restore per TID negotiated values. | ||
17355 | */ | ||
17356 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
17357 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
17358 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
17359 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
17360 | } | 13334 | } |
17361 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
17362 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
17363 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
17364 | max_cmd[tid]); | ||
17365 | } | ||
17366 | |||
17367 | return status; | ||
17368 | } | ||
17369 | |||
17370 | /* | ||
17371 | * Adv Library Interrupt Service Routine | ||
17372 | * | ||
17373 | * This function is called by a driver's interrupt service routine. | ||
17374 | * The function disables and re-enables interrupts. | ||
17375 | * | ||
17376 | * When a microcode idle command is completed, the ADV_DVC_VAR | ||
17377 | * 'idle_cmd_done' field is set to ADV_TRUE. | ||
17378 | * | ||
17379 | * Note: AdvISR() can be called when interrupts are disabled or even | ||
17380 | * when there is no hardware interrupt condition present. It will | ||
17381 | * always check for completed idle commands and microcode requests. | ||
17382 | * This is an important feature that shouldn't be changed because it | ||
17383 | * allows commands to be completed from polling mode loops. | ||
17384 | * | ||
17385 | * Return: | ||
17386 | * ADV_TRUE(1) - interrupt was pending | ||
17387 | * ADV_FALSE(0) - no interrupt was pending | ||
17388 | */ | ||
17389 | static int AdvISR(ADV_DVC_VAR *asc_dvc) | ||
17390 | { | ||
17391 | AdvPortAddr iop_base; | ||
17392 | uchar int_stat; | ||
17393 | ushort target_bit; | ||
17394 | ADV_CARR_T *free_carrp; | ||
17395 | ADV_VADDR irq_next_vpa; | ||
17396 | int flags; | ||
17397 | ADV_SCSI_REQ_Q *scsiq; | ||
17398 | |||
17399 | flags = DvcEnterCritical(); | ||
17400 | |||
17401 | iop_base = asc_dvc->iop_base; | ||
17402 | 13335 | ||
17403 | /* Reading the register clears the interrupt. */ | 13336 | ASC_DBG(1, "sg_cnt %d * %lu = %lu bytes\n", sg_cnt, sizeof(adv_sgblk_t), |
17404 | int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG); | 13337 | sizeof(adv_sgblk_t) * sg_cnt); |
17405 | 13338 | ||
17406 | if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB | | 13339 | if (!board->adv_sgblkp) |
17407 | ADV_INTR_STATUS_INTRC)) == 0) { | 13340 | goto kmalloc_failed; |
17408 | DvcLeaveCritical(flags); | ||
17409 | return ADV_FALSE; | ||
17410 | } | ||
17411 | 13341 | ||
17412 | /* | 13342 | /* |
17413 | * Notify the driver of an asynchronous microcode condition by | 13343 | * Point 'adv_reqp' to the request structures and |
17414 | * calling the ADV_DVC_VAR.async_callback function. The function | 13344 | * link them together. |
17415 | * is passed the microcode ASC_MC_INTRB_CODE byte value. | ||
17416 | */ | 13345 | */ |
17417 | if (int_stat & ADV_INTR_STATUS_INTRB) { | 13346 | req_cnt--; |
17418 | uchar intrb_code; | 13347 | reqp[req_cnt].next_reqp = NULL; |
17419 | 13348 | for (; req_cnt > 0; req_cnt--) { | |
17420 | AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code); | 13349 | reqp[req_cnt - 1].next_reqp = &reqp[req_cnt]; |
17421 | |||
17422 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || | ||
17423 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
17424 | if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE && | ||
17425 | asc_dvc->carr_pending_cnt != 0) { | ||
17426 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, | ||
17427 | ADV_TICKLE_A); | ||
17428 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
17429 | AdvWriteByteRegister(iop_base, | ||
17430 | IOPB_TICKLE, | ||
17431 | ADV_TICKLE_NOP); | ||
17432 | } | ||
17433 | } | ||
17434 | } | ||
17435 | |||
17436 | if (asc_dvc->async_callback != 0) { | ||
17437 | (*asc_dvc->async_callback) (asc_dvc, intrb_code); | ||
17438 | } | ||
17439 | } | 13350 | } |
13351 | board->adv_reqp = &reqp[0]; | ||
17440 | 13352 | ||
17441 | /* | 13353 | if (adv_dvc->chip_type == ADV_CHIP_ASC3550) { |
17442 | * Check if the IRQ stopper carrier contains a completed request. | 13354 | ASC_DBG(2, "AdvInitAsc3550Driver()\n"); |
17443 | */ | 13355 | warn_code = AdvInitAsc3550Driver(adv_dvc); |
17444 | while (((irq_next_vpa = | 13356 | } else if (adv_dvc->chip_type == ADV_CHIP_ASC38C0800) { |
17445 | le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) { | 13357 | ASC_DBG(2, "AdvInitAsc38C0800Driver()\n"); |
17446 | /* | 13358 | warn_code = AdvInitAsc38C0800Driver(adv_dvc); |
17447 | * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure. | 13359 | } else { |
17448 | * The RISC will have set 'areq_vpa' to a virtual address. | 13360 | ASC_DBG(2, "AdvInitAsc38C1600Driver()\n"); |
17449 | * | 13361 | warn_code = AdvInitAsc38C1600Driver(adv_dvc); |
17450 | * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr | ||
17451 | * field to the carrier ADV_CARR_T.areq_vpa field. The conversion | ||
17452 | * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr' | ||
17453 | * in AdvExeScsiQueue(). | ||
17454 | */ | ||
17455 | scsiq = (ADV_SCSI_REQ_Q *) | ||
17456 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa)); | ||
17457 | |||
17458 | /* | ||
17459 | * Request finished with good status and the queue was not | ||
17460 | * DMAed to host memory by the firmware. Set all status fields | ||
17461 | * to indicate good status. | ||
17462 | */ | ||
17463 | if ((irq_next_vpa & ASC_RQ_GOOD) != 0) { | ||
17464 | scsiq->done_status = QD_NO_ERROR; | ||
17465 | scsiq->host_status = scsiq->scsi_status = 0; | ||
17466 | scsiq->data_cnt = 0L; | ||
17467 | } | ||
17468 | |||
17469 | /* | ||
17470 | * Advance the stopper pointer to the next carrier | ||
17471 | * ignoring the lower four bits. Free the previous | ||
17472 | * stopper carrier. | ||
17473 | */ | ||
17474 | free_carrp = asc_dvc->irq_sp; | ||
17475 | asc_dvc->irq_sp = (ADV_CARR_T *) | ||
17476 | ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa)); | ||
17477 | |||
17478 | free_carrp->next_vpa = | ||
17479 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
17480 | asc_dvc->carr_freelist = free_carrp; | ||
17481 | asc_dvc->carr_pending_cnt--; | ||
17482 | |||
17483 | ASC_ASSERT(scsiq != NULL); | ||
17484 | target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id); | ||
17485 | |||
17486 | /* | ||
17487 | * Clear request microcode control flag. | ||
17488 | */ | ||
17489 | scsiq->cntl = 0; | ||
17490 | |||
17491 | /* | ||
17492 | * If the command that completed was a SCSI INQUIRY and | ||
17493 | * LUN 0 was sent the command, then process the INQUIRY | ||
17494 | * command information for the device. | ||
17495 | * | ||
17496 | * Note: If data returned were either VPD or CmdDt data, | ||
17497 | * don't process the INQUIRY command information for | ||
17498 | * the device, otherwise may erroneously set *_able bits. | ||
17499 | */ | ||
17500 | if (scsiq->done_status == QD_NO_ERROR && | ||
17501 | scsiq->cdb[0] == INQUIRY && | ||
17502 | scsiq->target_lun == 0 && | ||
17503 | (scsiq->cdb[1] & ADV_INQ_RTN_VPD_AND_CMDDT) | ||
17504 | == ADV_INQ_RTN_STD_INQUIRY_DATA) { | ||
17505 | AdvInquiryHandling(asc_dvc, scsiq); | ||
17506 | } | ||
17507 | |||
17508 | /* | ||
17509 | * Notify the driver of the completed request by passing | ||
17510 | * the ADV_SCSI_REQ_Q pointer to its callback function. | ||
17511 | */ | ||
17512 | scsiq->a_flag |= ADV_SCSIQ_DONE; | ||
17513 | (*asc_dvc->isr_callback) (asc_dvc, scsiq); | ||
17514 | /* | ||
17515 | * Note: After the driver callback function is called, 'scsiq' | ||
17516 | * can no longer be referenced. | ||
17517 | * | ||
17518 | * Fall through and continue processing other completed | ||
17519 | * requests... | ||
17520 | */ | ||
17521 | |||
17522 | /* | ||
17523 | * Disable interrupts again in case the driver inadvertently | ||
17524 | * enabled interrupts in its callback function. | ||
17525 | * | ||
17526 | * The DvcEnterCritical() return value is ignored, because | ||
17527 | * the 'flags' saved when AdvISR() was first entered will be | ||
17528 | * used to restore the interrupt flag on exit. | ||
17529 | */ | ||
17530 | (void)DvcEnterCritical(); | ||
17531 | } | 13362 | } |
17532 | DvcLeaveCritical(flags); | 13363 | err_code = adv_dvc->err_code; |
17533 | return ADV_TRUE; | ||
17534 | } | ||
17535 | 13364 | ||
17536 | /* | 13365 | if (warn_code || err_code) { |
17537 | * Send an idle command to the chip and wait for completion. | 13366 | shost_printk(KERN_WARNING, shost, "error: warn 0x%x, error " |
17538 | * | 13367 | "0x%x\n", warn_code, err_code); |
17539 | * Command completion is polled for once per microsecond. | ||
17540 | * | ||
17541 | * The function can be called from anywhere including an interrupt handler. | ||
17542 | * But the function is not re-entrant, so it uses the DvcEnter/LeaveCritical() | ||
17543 | * functions to prevent reentrancy. | ||
17544 | * | ||
17545 | * Return Values: | ||
17546 | * ADV_TRUE - command completed successfully | ||
17547 | * ADV_FALSE - command failed | ||
17548 | * ADV_ERROR - command timed out | ||
17549 | */ | ||
17550 | static int | ||
17551 | AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, | ||
17552 | ushort idle_cmd, ADV_DCNT idle_cmd_parameter) | ||
17553 | { | ||
17554 | ulong last_int_level; | ||
17555 | int result; | ||
17556 | ADV_DCNT i, j; | ||
17557 | AdvPortAddr iop_base; | ||
17558 | |||
17559 | last_int_level = DvcEnterCritical(); | ||
17560 | |||
17561 | iop_base = asc_dvc->iop_base; | ||
17562 | |||
17563 | /* | ||
17564 | * Clear the idle command status which is set by the microcode | ||
17565 | * to a non-zero value to indicate when the command is completed. | ||
17566 | * The non-zero result is one of the IDLE_CMD_STATUS_* values | ||
17567 | * defined in a_advlib.h. | ||
17568 | */ | ||
17569 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0); | ||
17570 | |||
17571 | /* | ||
17572 | * Write the idle command value after the idle command parameter | ||
17573 | * has been written to avoid a race condition. If the order is not | ||
17574 | * followed, the microcode may process the idle command before the | ||
17575 | * parameters have been written to LRAM. | ||
17576 | */ | ||
17577 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER, | ||
17578 | cpu_to_le32(idle_cmd_parameter)); | ||
17579 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd); | ||
17580 | |||
17581 | /* | ||
17582 | * Tickle the RISC to tell it to process the idle command. | ||
17583 | */ | ||
17584 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B); | ||
17585 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
17586 | /* | ||
17587 | * Clear the tickle value. In the ASC-3550 the RISC flag | ||
17588 | * command 'clr_tickle_b' does not work unless the host | ||
17589 | * value is cleared. | ||
17590 | */ | ||
17591 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); | ||
17592 | } | 13368 | } |
17593 | 13369 | ||
17594 | /* Wait for up to 100 millisecond for the idle command to timeout. */ | 13370 | goto exit; |
17595 | for (i = 0; i < SCSI_WAIT_100_MSEC; i++) { | ||
17596 | /* Poll once each microsecond for command completion. */ | ||
17597 | for (j = 0; j < SCSI_US_PER_MSEC; j++) { | ||
17598 | AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, | ||
17599 | result); | ||
17600 | if (result != 0) { | ||
17601 | DvcLeaveCritical(last_int_level); | ||
17602 | return result; | ||
17603 | } | ||
17604 | DvcDelayMicroSecond(asc_dvc, (ushort)1); | ||
17605 | } | ||
17606 | } | ||
17607 | 13371 | ||
17608 | ASC_ASSERT(0); /* The idle command should never timeout. */ | 13372 | kmalloc_failed: |
17609 | DvcLeaveCritical(last_int_level); | 13373 | shost_printk(KERN_ERR, shost, "error: kmalloc() failed\n"); |
17610 | return ADV_ERROR; | 13374 | err_code = ADV_ERROR; |
13375 | exit: | ||
13376 | return err_code; | ||
17611 | } | 13377 | } |
17612 | 13378 | ||
17613 | /* | 13379 | static void advansys_wide_free_mem(struct asc_board *board) |
17614 | * Inquiry Information Byte 7 Handling | ||
17615 | * | ||
17616 | * Handle SCSI Inquiry Command information for a device by setting | ||
17617 | * microcode operating variables that affect WDTR, SDTR, and Tag | ||
17618 | * Queuing. | ||
17619 | */ | ||
17620 | static void AdvInquiryHandling(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq) | ||
17621 | { | 13380 | { |
17622 | AdvPortAddr iop_base; | 13381 | struct adv_dvc_var *adv_dvc = &board->dvc_var.adv_dvc_var; |
17623 | uchar tid; | 13382 | kfree(adv_dvc->carrier_buf); |
17624 | ADV_SCSI_INQUIRY *inq; | 13383 | adv_dvc->carrier_buf = NULL; |
17625 | ushort tidmask; | 13384 | kfree(adv_dvc->orig_reqp); |
17626 | ushort cfg_word; | 13385 | adv_dvc->orig_reqp = board->adv_reqp = NULL; |
17627 | 13386 | while (board->adv_sgblkp) { | |
17628 | /* | 13387 | adv_sgblk_t *sgp = board->adv_sgblkp; |
17629 | * AdvInquiryHandling() requires up to INQUIRY information Byte 7 | 13388 | board->adv_sgblkp = sgp->next_sgblkp; |
17630 | * to be available. | 13389 | kfree(sgp); |
17631 | * | ||
17632 | * If less than 8 bytes of INQUIRY information were requested or less | ||
17633 | * than 8 bytes were transferred, then return. cdb[4] is the request | ||
17634 | * length and the ADV_SCSI_REQ_Q 'data_cnt' field is set by the | ||
17635 | * microcode to the transfer residual count. | ||
17636 | */ | ||
17637 | |||
17638 | if (scsiq->cdb[4] < 8 || | ||
17639 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) < 8) { | ||
17640 | return; | ||
17641 | } | ||
17642 | |||
17643 | iop_base = asc_dvc->iop_base; | ||
17644 | tid = scsiq->target_id; | ||
17645 | |||
17646 | inq = (ADV_SCSI_INQUIRY *) scsiq->vdata_addr; | ||
17647 | |||
17648 | /* | ||
17649 | * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices. | ||
17650 | */ | ||
17651 | if (ADV_INQ_RESPONSE_FMT(inq) < 2 && ADV_INQ_ANSI_VER(inq) < 2) { | ||
17652 | return; | ||
17653 | } else { | ||
17654 | /* | ||
17655 | * INQUIRY Byte 7 Handling | ||
17656 | * | ||
17657 | * Use a device's INQUIRY byte 7 to determine whether it | ||
17658 | * supports WDTR, SDTR, and Tag Queuing. If the feature | ||
17659 | * is enabled in the EEPROM and the device supports the | ||
17660 | * feature, then enable it in the microcode. | ||
17661 | */ | ||
17662 | |||
17663 | tidmask = ADV_TID_TO_TIDMASK(tid); | ||
17664 | |||
17665 | /* | ||
17666 | * Wide Transfers | ||
17667 | * | ||
17668 | * If the EEPROM enabled WDTR for the device and the device | ||
17669 | * supports wide bus (16 bit) transfers, then turn on the | ||
17670 | * device's 'wdtr_able' bit and write the new value to the | ||
17671 | * microcode. | ||
17672 | */ | ||
17673 | if ((asc_dvc->wdtr_able & tidmask) && ADV_INQ_WIDE16(inq)) { | ||
17674 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); | ||
17675 | if ((cfg_word & tidmask) == 0) { | ||
17676 | cfg_word |= tidmask; | ||
17677 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
17678 | cfg_word); | ||
17679 | |||
17680 | /* | ||
17681 | * Clear the microcode "SDTR negotiation" and "WDTR | ||
17682 | * negotiation" done indicators for the target to cause | ||
17683 | * it to negotiate with the new setting set above. | ||
17684 | * WDTR when accepted causes the target to enter | ||
17685 | * asynchronous mode, so SDTR must be negotiated. | ||
17686 | */ | ||
17687 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, | ||
17688 | cfg_word); | ||
17689 | cfg_word &= ~tidmask; | ||
17690 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, | ||
17691 | cfg_word); | ||
17692 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, | ||
17693 | cfg_word); | ||
17694 | cfg_word &= ~tidmask; | ||
17695 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, | ||
17696 | cfg_word); | ||
17697 | } | ||
17698 | } | ||
17699 | |||
17700 | /* | ||
17701 | * Synchronous Transfers | ||
17702 | * | ||
17703 | * If the EEPROM enabled SDTR for the device and the device | ||
17704 | * supports synchronous transfers, then turn on the device's | ||
17705 | * 'sdtr_able' bit. Write the new value to the microcode. | ||
17706 | */ | ||
17707 | if ((asc_dvc->sdtr_able & tidmask) && ADV_INQ_SYNC(inq)) { | ||
17708 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); | ||
17709 | if ((cfg_word & tidmask) == 0) { | ||
17710 | cfg_word |= tidmask; | ||
17711 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
17712 | cfg_word); | ||
17713 | |||
17714 | /* | ||
17715 | * Clear the microcode "SDTR negotiation" done indicator | ||
17716 | * for the target to cause it to negotiate with the new | ||
17717 | * setting set above. | ||
17718 | */ | ||
17719 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, | ||
17720 | cfg_word); | ||
17721 | cfg_word &= ~tidmask; | ||
17722 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, | ||
17723 | cfg_word); | ||
17724 | } | ||
17725 | } | ||
17726 | /* | ||
17727 | * If the Inquiry data included enough space for the SPI-3 | ||
17728 | * Clocking field, then check if DT mode is supported. | ||
17729 | */ | ||
17730 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600 && | ||
17731 | (scsiq->cdb[4] >= 57 || | ||
17732 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) >= 57)) { | ||
17733 | /* | ||
17734 | * PPR (Parallel Protocol Request) Capable | ||
17735 | * | ||
17736 | * If the device supports DT mode, then it must be PPR capable. | ||
17737 | * The PPR message will be used in place of the SDTR and WDTR | ||
17738 | * messages to negotiate synchronous speed and offset, transfer | ||
17739 | * width, and protocol options. | ||
17740 | */ | ||
17741 | if (ADV_INQ_CLOCKING(inq) & ADV_INQ_CLOCKING_DT_ONLY) { | ||
17742 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, | ||
17743 | asc_dvc->ppr_able); | ||
17744 | asc_dvc->ppr_able |= tidmask; | ||
17745 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, | ||
17746 | asc_dvc->ppr_able); | ||
17747 | } | ||
17748 | } | ||
17749 | |||
17750 | /* | ||
17751 | * If the EEPROM enabled Tag Queuing for the device and the | ||
17752 | * device supports Tag Queueing, then turn on the device's | ||
17753 | * 'tagqng_enable' bit in the microcode and set the microcode | ||
17754 | * maximum command count to the ADV_DVC_VAR 'max_dvc_qng' | ||
17755 | * value. | ||
17756 | * | ||
17757 | * Tag Queuing is disabled for the BIOS which runs in polled | ||
17758 | * mode and would see no benefit from Tag Queuing. Also by | ||
17759 | * disabling Tag Queuing in the BIOS devices with Tag Queuing | ||
17760 | * bugs will at least work with the BIOS. | ||
17761 | */ | ||
17762 | if ((asc_dvc->tagqng_able & tidmask) && ADV_INQ_CMD_QUEUE(inq)) { | ||
17763 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word); | ||
17764 | cfg_word |= tidmask; | ||
17765 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
17766 | cfg_word); | ||
17767 | |||
17768 | AdvWriteByteLram(iop_base, | ||
17769 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
17770 | asc_dvc->max_dvc_qng); | ||
17771 | } | ||
17772 | } | 13390 | } |
17773 | } | 13391 | } |
17774 | 13392 | ||
17775 | MODULE_LICENSE("Dual BSD/GPL"); | 13393 | static int __devinit advansys_board_found(struct Scsi_Host *shost, |
17776 | 13394 | unsigned int iop, int bus_type) | |
17777 | static struct Scsi_Host *__devinit | ||
17778 | advansys_board_found(int iop, struct device *dev, int bus_type) | ||
17779 | { | 13395 | { |
17780 | struct Scsi_Host *shost; | 13396 | struct pci_dev *pdev; |
17781 | struct pci_dev *pdev = bus_type == ASC_IS_PCI ? to_pci_dev(dev) : NULL; | 13397 | struct asc_board *boardp = shost_priv(shost); |
17782 | asc_board_t *boardp; | ||
17783 | ASC_DVC_VAR *asc_dvc_varp = NULL; | 13398 | ASC_DVC_VAR *asc_dvc_varp = NULL; |
17784 | ADV_DVC_VAR *adv_dvc_varp = NULL; | 13399 | ADV_DVC_VAR *adv_dvc_varp = NULL; |
17785 | adv_sgblk_t *sgp = NULL; | 13400 | int share_irq, warn_code, ret; |
17786 | int share_irq = FALSE; | ||
17787 | int iolen = 0; | ||
17788 | ADV_PADDR pci_memory_address; | ||
17789 | int warn_code, err_code; | ||
17790 | int ret; | ||
17791 | 13401 | ||
17792 | /* | 13402 | pdev = (bus_type == ASC_IS_PCI) ? to_pci_dev(boardp->dev) : NULL; |
17793 | * Adapter found. | ||
17794 | * | ||
17795 | * Register the adapter, get its configuration, and | ||
17796 | * initialize it. | ||
17797 | */ | ||
17798 | ASC_DBG(2, "advansys_board_found: scsi_register()\n"); | ||
17799 | shost = scsi_register(&driver_template, sizeof(asc_board_t)); | ||
17800 | |||
17801 | if (!shost) | ||
17802 | return NULL; | ||
17803 | |||
17804 | /* Save a pointer to the Scsi_Host of each board found. */ | ||
17805 | asc_host[asc_board_count++] = shost; | ||
17806 | |||
17807 | /* Initialize private per board data */ | ||
17808 | boardp = ASC_BOARDP(shost); | ||
17809 | memset(boardp, 0, sizeof(asc_board_t)); | ||
17810 | boardp->id = asc_board_count - 1; | ||
17811 | |||
17812 | /* Initialize spinlock. */ | ||
17813 | spin_lock_init(&boardp->lock); | ||
17814 | |||
17815 | /* | ||
17816 | * Handle both narrow and wide boards. | ||
17817 | * | ||
17818 | * If a Wide board was detected, set the board structure | ||
17819 | * wide board flag. Set-up the board structure based on | ||
17820 | * the board type. | ||
17821 | */ | ||
17822 | #ifdef CONFIG_PCI | ||
17823 | if (bus_type == ASC_IS_PCI && | ||
17824 | (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW || | ||
17825 | pdev->device == PCI_DEVICE_ID_38C0800_REV1 || | ||
17826 | pdev->device == PCI_DEVICE_ID_38C1600_REV1)) { | ||
17827 | boardp->flags |= ASC_IS_WIDE_BOARD; | ||
17828 | } | ||
17829 | #endif /* CONFIG_PCI */ | ||
17830 | 13403 | ||
17831 | if (ASC_NARROW_BOARD(boardp)) { | 13404 | if (ASC_NARROW_BOARD(boardp)) { |
17832 | ASC_DBG(1, "advansys_board_found: narrow board\n"); | 13405 | ASC_DBG(1, "narrow board\n"); |
17833 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 13406 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
17834 | asc_dvc_varp->bus_type = bus_type; | 13407 | asc_dvc_varp->bus_type = bus_type; |
17835 | asc_dvc_varp->drv_ptr = boardp; | 13408 | asc_dvc_varp->drv_ptr = boardp; |
17836 | asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg; | 13409 | asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg; |
17837 | asc_dvc_varp->cfg->overrun_buf = &overrun_buf[0]; | ||
17838 | asc_dvc_varp->iop_base = iop; | 13410 | asc_dvc_varp->iop_base = iop; |
17839 | asc_dvc_varp->isr_callback = asc_isr_callback; | ||
17840 | } else { | 13411 | } else { |
17841 | ASC_DBG(1, "advansys_board_found: wide board\n"); | 13412 | #ifdef CONFIG_PCI |
17842 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | 13413 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
17843 | adv_dvc_varp->drv_ptr = boardp; | 13414 | adv_dvc_varp->drv_ptr = boardp; |
17844 | adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg; | 13415 | adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg; |
17845 | adv_dvc_varp->isr_callback = adv_isr_callback; | ||
17846 | adv_dvc_varp->async_callback = adv_async_callback; | ||
17847 | #ifdef CONFIG_PCI | ||
17848 | if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW) { | 13416 | if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW) { |
17849 | ASC_DBG(1, "advansys_board_found: ASC-3550\n"); | 13417 | ASC_DBG(1, "wide board ASC-3550\n"); |
17850 | adv_dvc_varp->chip_type = ADV_CHIP_ASC3550; | 13418 | adv_dvc_varp->chip_type = ADV_CHIP_ASC3550; |
17851 | } else if (pdev->device == PCI_DEVICE_ID_38C0800_REV1) { | 13419 | } else if (pdev->device == PCI_DEVICE_ID_38C0800_REV1) { |
17852 | ASC_DBG(1, "advansys_board_found: ASC-38C0800\n"); | 13420 | ASC_DBG(1, "wide board ASC-38C0800\n"); |
17853 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800; | 13421 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800; |
17854 | } else { | 13422 | } else { |
17855 | ASC_DBG(1, "advansys_board_found: ASC-38C1600\n"); | 13423 | ASC_DBG(1, "wide board ASC-38C1600\n"); |
17856 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600; | 13424 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600; |
17857 | } | 13425 | } |
17858 | #endif /* CONFIG_PCI */ | ||
17859 | 13426 | ||
17860 | /* | 13427 | boardp->asc_n_io_port = pci_resource_len(pdev, 1); |
17861 | * Map the board's registers into virtual memory for | 13428 | boardp->ioremap_addr = ioremap(pci_resource_start(pdev, 1), |
17862 | * PCI slave access. Only memory accesses are used to | 13429 | boardp->asc_n_io_port); |
17863 | * access the board's registers. | 13430 | if (!boardp->ioremap_addr) { |
17864 | * | 13431 | shost_printk(KERN_ERR, shost, "ioremap(%lx, %d) " |
17865 | * Note: The PCI register base address is not always | 13432 | "returned NULL\n", |
17866 | * page aligned, but the address passed to ioremap() | 13433 | (long)pci_resource_start(pdev, 1), |
17867 | * must be page aligned. It is guaranteed that the | 13434 | boardp->asc_n_io_port); |
17868 | * PCI register base address will not cross a page | 13435 | ret = -ENODEV; |
17869 | * boundary. | 13436 | goto err_shost; |
17870 | */ | ||
17871 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
17872 | iolen = ADV_3550_IOLEN; | ||
17873 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
17874 | iolen = ADV_38C0800_IOLEN; | ||
17875 | } else { | ||
17876 | iolen = ADV_38C1600_IOLEN; | ||
17877 | } | ||
17878 | #ifdef CONFIG_PCI | ||
17879 | pci_memory_address = pci_resource_start(pdev, 1); | ||
17880 | ASC_DBG1(1, | ||
17881 | "advansys_board_found: pci_memory_address: 0x%lx\n", | ||
17882 | (ulong)pci_memory_address); | ||
17883 | if ((boardp->ioremap_addr = | ||
17884 | ioremap(pci_memory_address & PAGE_MASK, PAGE_SIZE)) == 0) { | ||
17885 | ASC_PRINT3 | ||
17886 | ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n", | ||
17887 | boardp->id, pci_memory_address, iolen); | ||
17888 | scsi_unregister(shost); | ||
17889 | asc_board_count--; | ||
17890 | return NULL; | ||
17891 | } | 13437 | } |
17892 | ASC_DBG1(1, | 13438 | adv_dvc_varp->iop_base = (AdvPortAddr)boardp->ioremap_addr; |
17893 | "advansys_board_found: ioremap_addr: 0x%lx\n", | 13439 | ASC_DBG(1, "iop_base: 0x%p\n", adv_dvc_varp->iop_base); |
17894 | (ulong)boardp->ioremap_addr); | ||
17895 | adv_dvc_varp->iop_base = (AdvPortAddr) | ||
17896 | (boardp->ioremap_addr + | ||
17897 | (pci_memory_address - (pci_memory_address & PAGE_MASK))); | ||
17898 | ASC_DBG1(1, | ||
17899 | "advansys_board_found: iop_base: 0x%lx\n", | ||
17900 | adv_dvc_varp->iop_base); | ||
17901 | #endif /* CONFIG_PCI */ | ||
17902 | 13440 | ||
17903 | /* | 13441 | /* |
17904 | * Even though it isn't used to access wide boards, other | 13442 | * Even though it isn't used to access wide boards, other |
@@ -17907,9 +13445,9 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
17907 | */ | 13445 | */ |
17908 | boardp->ioport = iop; | 13446 | boardp->ioport = iop; |
17909 | 13447 | ||
17910 | ASC_DBG2(1, | 13448 | ASC_DBG(1, "iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n", |
17911 | "advansys_board_found: iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n", | 13449 | (ushort)inp(iop + 1), (ushort)inpw(iop)); |
17912 | (ushort)inp(iop + 1), (ushort)inpw(iop)); | 13450 | #endif /* CONFIG_PCI */ |
17913 | } | 13451 | } |
17914 | 13452 | ||
17915 | #ifdef CONFIG_PROC_FS | 13453 | #ifdef CONFIG_PROC_FS |
@@ -17917,18 +13455,16 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
17917 | * Allocate buffer for printing information from | 13455 | * Allocate buffer for printing information from |
17918 | * /proc/scsi/advansys/[0...]. | 13456 | * /proc/scsi/advansys/[0...]. |
17919 | */ | 13457 | */ |
17920 | if ((boardp->prtbuf = kmalloc(ASC_PRTBUF_SIZE, GFP_ATOMIC)) == NULL) { | 13458 | boardp->prtbuf = kmalloc(ASC_PRTBUF_SIZE, GFP_KERNEL); |
17921 | ASC_PRINT3 | 13459 | if (!boardp->prtbuf) { |
17922 | ("advansys_board_found: board %d: kmalloc(%d, %d) returned NULL\n", | 13460 | shost_printk(KERN_ERR, shost, "kmalloc(%d) returned NULL\n", |
17923 | boardp->id, ASC_PRTBUF_SIZE, GFP_ATOMIC); | 13461 | ASC_PRTBUF_SIZE); |
17924 | scsi_unregister(shost); | 13462 | ret = -ENOMEM; |
17925 | asc_board_count--; | 13463 | goto err_unmap; |
17926 | return NULL; | ||
17927 | } | 13464 | } |
17928 | #endif /* CONFIG_PROC_FS */ | 13465 | #endif /* CONFIG_PROC_FS */ |
17929 | 13466 | ||
17930 | if (ASC_NARROW_BOARD(boardp)) { | 13467 | if (ASC_NARROW_BOARD(boardp)) { |
17931 | asc_dvc_varp->cfg->dev = dev; | ||
17932 | /* | 13468 | /* |
17933 | * Set the board bus type and PCI IRQ before | 13469 | * Set the board bus type and PCI IRQ before |
17934 | * calling AscInitGetConfig(). | 13470 | * calling AscInitGetConfig(). |
@@ -17937,127 +13473,56 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
17937 | #ifdef CONFIG_ISA | 13473 | #ifdef CONFIG_ISA |
17938 | case ASC_IS_ISA: | 13474 | case ASC_IS_ISA: |
17939 | shost->unchecked_isa_dma = TRUE; | 13475 | shost->unchecked_isa_dma = TRUE; |
17940 | share_irq = FALSE; | 13476 | share_irq = 0; |
17941 | break; | 13477 | break; |
17942 | case ASC_IS_VL: | 13478 | case ASC_IS_VL: |
17943 | shost->unchecked_isa_dma = FALSE; | 13479 | shost->unchecked_isa_dma = FALSE; |
17944 | share_irq = FALSE; | 13480 | share_irq = 0; |
17945 | break; | 13481 | break; |
17946 | case ASC_IS_EISA: | 13482 | case ASC_IS_EISA: |
17947 | shost->unchecked_isa_dma = FALSE; | 13483 | shost->unchecked_isa_dma = FALSE; |
17948 | share_irq = TRUE; | 13484 | share_irq = IRQF_SHARED; |
17949 | break; | 13485 | break; |
17950 | #endif /* CONFIG_ISA */ | 13486 | #endif /* CONFIG_ISA */ |
17951 | #ifdef CONFIG_PCI | 13487 | #ifdef CONFIG_PCI |
17952 | case ASC_IS_PCI: | 13488 | case ASC_IS_PCI: |
17953 | shost->irq = asc_dvc_varp->irq_no = pdev->irq; | ||
17954 | asc_dvc_varp->cfg->pci_slot_info = | ||
17955 | ASC_PCI_MKID(pdev->bus->number, | ||
17956 | PCI_SLOT(pdev->devfn), | ||
17957 | PCI_FUNC(pdev->devfn)); | ||
17958 | shost->unchecked_isa_dma = FALSE; | 13489 | shost->unchecked_isa_dma = FALSE; |
17959 | share_irq = TRUE; | 13490 | share_irq = IRQF_SHARED; |
17960 | break; | 13491 | break; |
17961 | #endif /* CONFIG_PCI */ | 13492 | #endif /* CONFIG_PCI */ |
17962 | default: | 13493 | default: |
17963 | ASC_PRINT2 | 13494 | shost_printk(KERN_ERR, shost, "unknown adapter type: " |
17964 | ("advansys_board_found: board %d: unknown adapter type: %d\n", | 13495 | "%d\n", asc_dvc_varp->bus_type); |
17965 | boardp->id, asc_dvc_varp->bus_type); | ||
17966 | shost->unchecked_isa_dma = TRUE; | 13496 | shost->unchecked_isa_dma = TRUE; |
17967 | share_irq = FALSE; | 13497 | share_irq = 0; |
17968 | break; | 13498 | break; |
17969 | } | 13499 | } |
17970 | } else { | ||
17971 | adv_dvc_varp->cfg->dev = dev; | ||
17972 | /* | ||
17973 | * For Wide boards set PCI information before calling | ||
17974 | * AdvInitGetConfig(). | ||
17975 | */ | ||
17976 | #ifdef CONFIG_PCI | ||
17977 | shost->irq = adv_dvc_varp->irq_no = pdev->irq; | ||
17978 | adv_dvc_varp->cfg->pci_slot_info = | ||
17979 | ASC_PCI_MKID(pdev->bus->number, | ||
17980 | PCI_SLOT(pdev->devfn), | ||
17981 | PCI_FUNC(pdev->devfn)); | ||
17982 | shost->unchecked_isa_dma = FALSE; | ||
17983 | share_irq = TRUE; | ||
17984 | #endif /* CONFIG_PCI */ | ||
17985 | } | ||
17986 | 13500 | ||
17987 | /* | ||
17988 | * Read the board configuration. | ||
17989 | */ | ||
17990 | if (ASC_NARROW_BOARD(boardp)) { | ||
17991 | /* | 13501 | /* |
17992 | * NOTE: AscInitGetConfig() may change the board's | 13502 | * NOTE: AscInitGetConfig() may change the board's |
17993 | * bus_type value. The bus_type value should no | 13503 | * bus_type value. The bus_type value should no |
17994 | * longer be used. If the bus_type field must be | 13504 | * longer be used. If the bus_type field must be |
17995 | * referenced only use the bit-wise AND operator "&". | 13505 | * referenced only use the bit-wise AND operator "&". |
17996 | */ | 13506 | */ |
17997 | ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n"); | 13507 | ASC_DBG(2, "AscInitGetConfig()\n"); |
17998 | switch (ret = AscInitGetConfig(asc_dvc_varp)) { | 13508 | ret = AscInitGetConfig(shost) ? -ENODEV : 0; |
17999 | case 0: /* No error */ | ||
18000 | break; | ||
18001 | case ASC_WARN_IO_PORT_ROTATE: | ||
18002 | ASC_PRINT1 | ||
18003 | ("AscInitGetConfig: board %d: I/O port address modified\n", | ||
18004 | boardp->id); | ||
18005 | break; | ||
18006 | case ASC_WARN_AUTO_CONFIG: | ||
18007 | ASC_PRINT1 | ||
18008 | ("AscInitGetConfig: board %d: I/O port increment switch enabled\n", | ||
18009 | boardp->id); | ||
18010 | break; | ||
18011 | case ASC_WARN_EEPROM_CHKSUM: | ||
18012 | ASC_PRINT1 | ||
18013 | ("AscInitGetConfig: board %d: EEPROM checksum error\n", | ||
18014 | boardp->id); | ||
18015 | break; | ||
18016 | case ASC_WARN_IRQ_MODIFIED: | ||
18017 | ASC_PRINT1 | ||
18018 | ("AscInitGetConfig: board %d: IRQ modified\n", | ||
18019 | boardp->id); | ||
18020 | break; | ||
18021 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
18022 | ASC_PRINT1 | ||
18023 | ("AscInitGetConfig: board %d: tag queuing enabled w/o disconnects\n", | ||
18024 | boardp->id); | ||
18025 | break; | ||
18026 | default: | ||
18027 | ASC_PRINT2 | ||
18028 | ("AscInitGetConfig: board %d: unknown warning: 0x%x\n", | ||
18029 | boardp->id, ret); | ||
18030 | break; | ||
18031 | } | ||
18032 | if ((err_code = asc_dvc_varp->err_code) != 0) { | ||
18033 | ASC_PRINT3 | ||
18034 | ("AscInitGetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
18035 | boardp->id, | ||
18036 | asc_dvc_varp->init_state, asc_dvc_varp->err_code); | ||
18037 | } | ||
18038 | } else { | 13509 | } else { |
18039 | ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n"); | 13510 | #ifdef CONFIG_PCI |
18040 | if ((ret = AdvInitGetConfig(adv_dvc_varp)) != 0) { | 13511 | /* |
18041 | ASC_PRINT2 | 13512 | * For Wide boards set PCI information before calling |
18042 | ("AdvInitGetConfig: board %d: warning: 0x%x\n", | 13513 | * AdvInitGetConfig(). |
18043 | boardp->id, ret); | 13514 | */ |
18044 | } | 13515 | shost->unchecked_isa_dma = FALSE; |
18045 | if ((err_code = adv_dvc_varp->err_code) != 0) { | 13516 | share_irq = IRQF_SHARED; |
18046 | ASC_PRINT2 | 13517 | ASC_DBG(2, "AdvInitGetConfig()\n"); |
18047 | ("AdvInitGetConfig: board %d error: err_code 0x%x\n", | ||
18048 | boardp->id, adv_dvc_varp->err_code); | ||
18049 | } | ||
18050 | } | ||
18051 | 13518 | ||
18052 | if (err_code != 0) { | 13519 | ret = AdvInitGetConfig(pdev, shost) ? -ENODEV : 0; |
18053 | #ifdef CONFIG_PROC_FS | 13520 | #endif /* CONFIG_PCI */ |
18054 | kfree(boardp->prtbuf); | ||
18055 | #endif /* CONFIG_PROC_FS */ | ||
18056 | scsi_unregister(shost); | ||
18057 | asc_board_count--; | ||
18058 | return NULL; | ||
18059 | } | 13521 | } |
18060 | 13522 | ||
13523 | if (ret) | ||
13524 | goto err_free_proc; | ||
13525 | |||
18061 | /* | 13526 | /* |
18062 | * Save the EEPROM configuration so that it can be displayed | 13527 | * Save the EEPROM configuration so that it can be displayed |
18063 | * from /proc/scsi/advansys/[0...]. | 13528 | * from /proc/scsi/advansys/[0...]. |
@@ -18098,61 +13563,10 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18098 | /* | 13563 | /* |
18099 | * Modify board configuration. | 13564 | * Modify board configuration. |
18100 | */ | 13565 | */ |
18101 | ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n"); | 13566 | ASC_DBG(2, "AscInitSetConfig()\n"); |
18102 | switch (ret = AscInitSetConfig(asc_dvc_varp)) { | 13567 | ret = AscInitSetConfig(pdev, shost) ? -ENODEV : 0; |
18103 | case 0: /* No error. */ | 13568 | if (ret) |
18104 | break; | 13569 | goto err_free_proc; |
18105 | case ASC_WARN_IO_PORT_ROTATE: | ||
18106 | ASC_PRINT1 | ||
18107 | ("AscInitSetConfig: board %d: I/O port address modified\n", | ||
18108 | boardp->id); | ||
18109 | break; | ||
18110 | case ASC_WARN_AUTO_CONFIG: | ||
18111 | ASC_PRINT1 | ||
18112 | ("AscInitSetConfig: board %d: I/O port increment switch enabled\n", | ||
18113 | boardp->id); | ||
18114 | break; | ||
18115 | case ASC_WARN_EEPROM_CHKSUM: | ||
18116 | ASC_PRINT1 | ||
18117 | ("AscInitSetConfig: board %d: EEPROM checksum error\n", | ||
18118 | boardp->id); | ||
18119 | break; | ||
18120 | case ASC_WARN_IRQ_MODIFIED: | ||
18121 | ASC_PRINT1 | ||
18122 | ("AscInitSetConfig: board %d: IRQ modified\n", | ||
18123 | boardp->id); | ||
18124 | break; | ||
18125 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
18126 | ASC_PRINT1 | ||
18127 | ("AscInitSetConfig: board %d: tag queuing w/o disconnects\n", | ||
18128 | boardp->id); | ||
18129 | break; | ||
18130 | default: | ||
18131 | ASC_PRINT2 | ||
18132 | ("AscInitSetConfig: board %d: unknown warning: 0x%x\n", | ||
18133 | boardp->id, ret); | ||
18134 | break; | ||
18135 | } | ||
18136 | if (asc_dvc_varp->err_code != 0) { | ||
18137 | ASC_PRINT3 | ||
18138 | ("AscInitSetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
18139 | boardp->id, | ||
18140 | asc_dvc_varp->init_state, asc_dvc_varp->err_code); | ||
18141 | #ifdef CONFIG_PROC_FS | ||
18142 | kfree(boardp->prtbuf); | ||
18143 | #endif /* CONFIG_PROC_FS */ | ||
18144 | scsi_unregister(shost); | ||
18145 | asc_board_count--; | ||
18146 | return NULL; | ||
18147 | } | ||
18148 | |||
18149 | /* | ||
18150 | * Finish initializing the 'Scsi_Host' structure. | ||
18151 | */ | ||
18152 | /* AscInitSetConfig() will set the IRQ for non-PCI boards. */ | ||
18153 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI) == 0) { | ||
18154 | shost->irq = asc_dvc_varp->irq_no; | ||
18155 | } | ||
18156 | } else { | 13570 | } else { |
18157 | ADVEEP_3550_CONFIG *ep_3550; | 13571 | ADVEEP_3550_CONFIG *ep_3550; |
18158 | ADVEEP_38C0800_CONFIG *ep_38C0800; | 13572 | ADVEEP_38C0800_CONFIG *ep_38C0800; |
@@ -18246,11 +13660,6 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18246 | */ | 13660 | */ |
18247 | boardp->init_tidmask |= | 13661 | boardp->init_tidmask |= |
18248 | ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id); | 13662 | ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id); |
18249 | |||
18250 | /* | ||
18251 | * Finish initializing the 'Scsi_Host' structure. | ||
18252 | */ | ||
18253 | shost->irq = adv_dvc_varp->irq_no; | ||
18254 | } | 13663 | } |
18255 | 13664 | ||
18256 | /* | 13665 | /* |
@@ -18262,6 +13671,7 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18262 | if (ASC_NARROW_BOARD(boardp)) { | 13671 | if (ASC_NARROW_BOARD(boardp)) { |
18263 | shost->max_id = ASC_MAX_TID + 1; | 13672 | shost->max_id = ASC_MAX_TID + 1; |
18264 | shost->max_lun = ASC_MAX_LUN + 1; | 13673 | shost->max_lun = ASC_MAX_LUN + 1; |
13674 | shost->max_cmd_len = ASC_MAX_CDB_LEN; | ||
18265 | 13675 | ||
18266 | shost->io_port = asc_dvc_varp->iop_base; | 13676 | shost->io_port = asc_dvc_varp->iop_base; |
18267 | boardp->asc_n_io_port = ASC_IOADR_GAP; | 13677 | boardp->asc_n_io_port = ASC_IOADR_GAP; |
@@ -18272,6 +13682,7 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18272 | } else { | 13682 | } else { |
18273 | shost->max_id = ADV_MAX_TID + 1; | 13683 | shost->max_id = ADV_MAX_TID + 1; |
18274 | shost->max_lun = ADV_MAX_LUN + 1; | 13684 | shost->max_lun = ADV_MAX_LUN + 1; |
13685 | shost->max_cmd_len = ADV_MAX_CDB_LEN; | ||
18275 | 13686 | ||
18276 | /* | 13687 | /* |
18277 | * Save the I/O Port address and length even though | 13688 | * Save the I/O Port address and length even though |
@@ -18280,7 +13691,6 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18280 | * PCI Memory Mapped I/O. | 13691 | * PCI Memory Mapped I/O. |
18281 | */ | 13692 | */ |
18282 | shost->io_port = iop; | 13693 | shost->io_port = iop; |
18283 | boardp->asc_n_io_port = iolen; | ||
18284 | 13694 | ||
18285 | shost->this_id = adv_dvc_varp->chip_scsi_id; | 13695 | shost->this_id = adv_dvc_varp->chip_scsi_id; |
18286 | 13696 | ||
@@ -18289,15 +13699,6 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18289 | } | 13699 | } |
18290 | 13700 | ||
18291 | /* | 13701 | /* |
18292 | * 'n_io_port' currently is one byte. | ||
18293 | * | ||
18294 | * Set a value to 'n_io_port', but never referenced it because | ||
18295 | * it may be truncated. | ||
18296 | */ | ||
18297 | shost->n_io_port = boardp->asc_n_io_port <= 255 ? | ||
18298 | boardp->asc_n_io_port : 255; | ||
18299 | |||
18300 | /* | ||
18301 | * Following v1.3.89, 'cmd_per_lun' is no longer needed | 13702 | * Following v1.3.89, 'cmd_per_lun' is no longer needed |
18302 | * and should be set to zero. | 13703 | * and should be set to zero. |
18303 | * | 13704 | * |
@@ -18343,14 +13744,12 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18343 | shost->sg_tablesize = SG_ALL; | 13744 | shost->sg_tablesize = SG_ALL; |
18344 | } | 13745 | } |
18345 | 13746 | ||
18346 | ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost->sg_tablesize); | 13747 | ASC_DBG(1, "sg_tablesize: %d\n", shost->sg_tablesize); |
18347 | 13748 | ||
18348 | /* BIOS start address. */ | 13749 | /* BIOS start address. */ |
18349 | if (ASC_NARROW_BOARD(boardp)) { | 13750 | if (ASC_NARROW_BOARD(boardp)) { |
18350 | shost->base = ((ulong) | 13751 | shost->base = AscGetChipBiosAddress(asc_dvc_varp->iop_base, |
18351 | AscGetChipBiosAddress(asc_dvc_varp-> | 13752 | asc_dvc_varp->bus_type); |
18352 | iop_base, | ||
18353 | asc_dvc_varp->bus_type)); | ||
18354 | } else { | 13753 | } else { |
18355 | /* | 13754 | /* |
18356 | * Fill-in BIOS board variables. The Wide BIOS saves | 13755 | * Fill-in BIOS board variables. The Wide BIOS saves |
@@ -18365,12 +13764,10 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18365 | AdvReadWordLram(adv_dvc_varp->iop_base, | 13764 | AdvReadWordLram(adv_dvc_varp->iop_base, |
18366 | BIOS_CODELEN, boardp->bios_codelen); | 13765 | BIOS_CODELEN, boardp->bios_codelen); |
18367 | 13766 | ||
18368 | ASC_DBG2(1, | 13767 | ASC_DBG(1, "bios_signature 0x%x, bios_version 0x%x\n", |
18369 | "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n", | ||
18370 | boardp->bios_signature, boardp->bios_version); | 13768 | boardp->bios_signature, boardp->bios_version); |
18371 | 13769 | ||
18372 | ASC_DBG2(1, | 13770 | ASC_DBG(1, "bios_codeseg 0x%x, bios_codelen 0x%x\n", |
18373 | "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n", | ||
18374 | boardp->bios_codeseg, boardp->bios_codelen); | 13771 | boardp->bios_codeseg, boardp->bios_codelen); |
18375 | 13772 | ||
18376 | /* | 13773 | /* |
@@ -18392,30 +13789,6 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18392 | * Register Board Resources - I/O Port, DMA, IRQ | 13789 | * Register Board Resources - I/O Port, DMA, IRQ |
18393 | */ | 13790 | */ |
18394 | 13791 | ||
18395 | /* | ||
18396 | * Register I/O port range. | ||
18397 | * | ||
18398 | * For Wide boards the I/O ports are not used to access | ||
18399 | * the board, but request the region anyway. | ||
18400 | * | ||
18401 | * 'shost->n_io_port' is not referenced, because it may be truncated. | ||
18402 | */ | ||
18403 | ASC_DBG2(2, | ||
18404 | "advansys_board_found: request_region port 0x%lx, len 0x%x\n", | ||
18405 | (ulong)shost->io_port, boardp->asc_n_io_port); | ||
18406 | if (request_region(shost->io_port, boardp->asc_n_io_port, | ||
18407 | "advansys") == NULL) { | ||
18408 | ASC_PRINT3 | ||
18409 | ("advansys_board_found: board %d: request_region() failed, port 0x%lx, len 0x%x\n", | ||
18410 | boardp->id, (ulong)shost->io_port, boardp->asc_n_io_port); | ||
18411 | #ifdef CONFIG_PROC_FS | ||
18412 | kfree(boardp->prtbuf); | ||
18413 | #endif /* CONFIG_PROC_FS */ | ||
18414 | scsi_unregister(shost); | ||
18415 | asc_board_count--; | ||
18416 | return NULL; | ||
18417 | } | ||
18418 | |||
18419 | /* Register DMA Channel for Narrow boards. */ | 13792 | /* Register DMA Channel for Narrow boards. */ |
18420 | shost->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */ | 13793 | shost->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */ |
18421 | #ifdef CONFIG_ISA | 13794 | #ifdef CONFIG_ISA |
@@ -18423,19 +13796,12 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18423 | /* Register DMA channel for ISA bus. */ | 13796 | /* Register DMA channel for ISA bus. */ |
18424 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | 13797 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { |
18425 | shost->dma_channel = asc_dvc_varp->cfg->isa_dma_channel; | 13798 | shost->dma_channel = asc_dvc_varp->cfg->isa_dma_channel; |
18426 | if ((ret = | 13799 | ret = request_dma(shost->dma_channel, DRV_NAME); |
18427 | request_dma(shost->dma_channel, "advansys")) != 0) { | 13800 | if (ret) { |
18428 | ASC_PRINT3 | 13801 | shost_printk(KERN_ERR, shost, "request_dma() " |
18429 | ("advansys_board_found: board %d: request_dma() %d failed %d\n", | 13802 | "%d failed %d\n", |
18430 | boardp->id, shost->dma_channel, ret); | 13803 | shost->dma_channel, ret); |
18431 | release_region(shost->io_port, | 13804 | goto err_free_proc; |
18432 | boardp->asc_n_io_port); | ||
18433 | #ifdef CONFIG_PROC_FS | ||
18434 | kfree(boardp->prtbuf); | ||
18435 | #endif /* CONFIG_PROC_FS */ | ||
18436 | scsi_unregister(shost); | ||
18437 | asc_board_count--; | ||
18438 | return NULL; | ||
18439 | } | 13805 | } |
18440 | AscEnableIsaDma(shost->dma_channel); | 13806 | AscEnableIsaDma(shost->dma_channel); |
18441 | } | 13807 | } |
@@ -18443,573 +13809,392 @@ advansys_board_found(int iop, struct device *dev, int bus_type) | |||
18443 | #endif /* CONFIG_ISA */ | 13809 | #endif /* CONFIG_ISA */ |
18444 | 13810 | ||
18445 | /* Register IRQ Number. */ | 13811 | /* Register IRQ Number. */ |
18446 | ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", shost->irq); | 13812 | ASC_DBG(2, "request_irq(%d, %p)\n", boardp->irq, shost); |
18447 | /* | 13813 | |
18448 | * If request_irq() fails with the IRQF_DISABLED flag set, | 13814 | ret = request_irq(boardp->irq, advansys_interrupt, share_irq, |
18449 | * then try again without the IRQF_DISABLED flag set. This | 13815 | DRV_NAME, shost); |
18450 | * allows IRQ sharing to work even with other drivers that | 13816 | |
18451 | * do not set the IRQF_DISABLED flag. | 13817 | if (ret) { |
18452 | * | ||
18453 | * If IRQF_DISABLED is not set, then interrupts are enabled | ||
18454 | * before the driver interrupt function is called. | ||
18455 | */ | ||
18456 | if (((ret = request_irq(shost->irq, advansys_interrupt, | ||
18457 | IRQF_DISABLED | (share_irq == | ||
18458 | TRUE ? | ||
18459 | IRQF_SHARED : | ||
18460 | 0), "advansys", boardp)) != 0) | ||
18461 | && | ||
18462 | ((ret = | ||
18463 | request_irq(shost->irq, advansys_interrupt, | ||
18464 | (share_irq == TRUE ? IRQF_SHARED : 0), | ||
18465 | "advansys", boardp)) != 0)) { | ||
18466 | if (ret == -EBUSY) { | 13818 | if (ret == -EBUSY) { |
18467 | ASC_PRINT2 | 13819 | shost_printk(KERN_ERR, shost, "request_irq(): IRQ 0x%x " |
18468 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n", | 13820 | "already in use\n", boardp->irq); |
18469 | boardp->id, shost->irq); | ||
18470 | } else if (ret == -EINVAL) { | 13821 | } else if (ret == -EINVAL) { |
18471 | ASC_PRINT2 | 13822 | shost_printk(KERN_ERR, shost, "request_irq(): IRQ 0x%x " |
18472 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n", | 13823 | "not valid\n", boardp->irq); |
18473 | boardp->id, shost->irq); | ||
18474 | } else { | 13824 | } else { |
18475 | ASC_PRINT3 | 13825 | shost_printk(KERN_ERR, shost, "request_irq(): IRQ 0x%x " |
18476 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n", | 13826 | "failed with %d\n", boardp->irq, ret); |
18477 | boardp->id, shost->irq, ret); | ||
18478 | } | 13827 | } |
18479 | release_region(shost->io_port, boardp->asc_n_io_port); | 13828 | goto err_free_dma; |
18480 | iounmap(boardp->ioremap_addr); | ||
18481 | if (shost->dma_channel != NO_ISA_DMA) { | ||
18482 | free_dma(shost->dma_channel); | ||
18483 | } | ||
18484 | #ifdef CONFIG_PROC_FS | ||
18485 | kfree(boardp->prtbuf); | ||
18486 | #endif /* CONFIG_PROC_FS */ | ||
18487 | scsi_unregister(shost); | ||
18488 | asc_board_count--; | ||
18489 | return NULL; | ||
18490 | } | 13829 | } |
18491 | 13830 | ||
18492 | /* | 13831 | /* |
18493 | * Initialize board RISC chip and enable interrupts. | 13832 | * Initialize board RISC chip and enable interrupts. |
18494 | */ | 13833 | */ |
18495 | if (ASC_NARROW_BOARD(boardp)) { | 13834 | if (ASC_NARROW_BOARD(boardp)) { |
18496 | ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n"); | 13835 | ASC_DBG(2, "AscInitAsc1000Driver()\n"); |
18497 | warn_code = AscInitAsc1000Driver(asc_dvc_varp); | 13836 | warn_code = AscInitAsc1000Driver(asc_dvc_varp); |
18498 | err_code = asc_dvc_varp->err_code; | ||
18499 | 13837 | ||
18500 | if (warn_code || err_code) { | 13838 | if (warn_code || asc_dvc_varp->err_code) { |
18501 | ASC_PRINT4 | 13839 | shost_printk(KERN_ERR, shost, "error: init_state 0x%x, " |
18502 | ("advansys_board_found: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n", | 13840 | "warn 0x%x, error 0x%x\n", |
18503 | boardp->id, | 13841 | asc_dvc_varp->init_state, warn_code, |
18504 | asc_dvc_varp->init_state, warn_code, err_code); | 13842 | asc_dvc_varp->err_code); |
13843 | if (asc_dvc_varp->err_code) | ||
13844 | ret = -ENODEV; | ||
18505 | } | 13845 | } |
18506 | } else { | 13846 | } else { |
18507 | ADV_CARR_T *carrp; | 13847 | if (advansys_wide_init_chip(shost)) |
18508 | int req_cnt = 0; | 13848 | ret = -ENODEV; |
18509 | adv_req_t *reqp = NULL; | 13849 | } |
18510 | int sg_cnt = 0; | ||
18511 | |||
18512 | /* | ||
18513 | * Allocate buffer carrier structures. The total size | ||
18514 | * is about 4 KB, so allocate all at once. | ||
18515 | */ | ||
18516 | carrp = (ADV_CARR_T *) kmalloc(ADV_CARRIER_BUFSIZE, GFP_ATOMIC); | ||
18517 | ASC_DBG1(1, "advansys_board_found: carrp 0x%lx\n", (ulong)carrp); | ||
18518 | |||
18519 | if (carrp == NULL) { | ||
18520 | goto kmalloc_error; | ||
18521 | } | ||
18522 | 13850 | ||
18523 | /* | 13851 | if (ret) |
18524 | * Allocate up to 'max_host_qng' request structures for | 13852 | goto err_free_wide_mem; |
18525 | * the Wide board. The total size is about 16 KB, so | ||
18526 | * allocate all at once. If the allocation fails decrement | ||
18527 | * and try again. | ||
18528 | */ | ||
18529 | for (req_cnt = adv_dvc_varp->max_host_qng; | ||
18530 | req_cnt > 0; req_cnt--) { | ||
18531 | 13853 | ||
18532 | reqp = (adv_req_t *) | 13854 | ASC_DBG_PRT_SCSI_HOST(2, shost); |
18533 | kmalloc(sizeof(adv_req_t) * req_cnt, GFP_ATOMIC); | ||
18534 | 13855 | ||
18535 | ASC_DBG3(1, | 13856 | ret = scsi_add_host(shost, boardp->dev); |
18536 | "advansys_board_found: reqp 0x%lx, req_cnt %d, bytes %lu\n", | 13857 | if (ret) |
18537 | (ulong)reqp, req_cnt, | 13858 | goto err_free_wide_mem; |
18538 | (ulong)sizeof(adv_req_t) * req_cnt); | ||
18539 | 13859 | ||
18540 | if (reqp != NULL) { | 13860 | scsi_scan_host(shost); |
18541 | break; | 13861 | return 0; |
18542 | } | ||
18543 | } | ||
18544 | if (reqp == NULL) { | ||
18545 | goto kmalloc_error; | ||
18546 | } | ||
18547 | 13862 | ||
18548 | /* | 13863 | err_free_wide_mem: |
18549 | * Allocate up to ADV_TOT_SG_BLOCK request structures for | 13864 | advansys_wide_free_mem(boardp); |
18550 | * the Wide board. Each structure is about 136 bytes. | 13865 | free_irq(boardp->irq, shost); |
18551 | */ | 13866 | err_free_dma: |
18552 | boardp->adv_sgblkp = NULL; | 13867 | if (shost->dma_channel != NO_ISA_DMA) |
18553 | for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) { | 13868 | free_dma(shost->dma_channel); |
13869 | err_free_proc: | ||
13870 | kfree(boardp->prtbuf); | ||
13871 | err_unmap: | ||
13872 | if (boardp->ioremap_addr) | ||
13873 | iounmap(boardp->ioremap_addr); | ||
13874 | err_shost: | ||
13875 | return ret; | ||
13876 | } | ||
18554 | 13877 | ||
18555 | sgp = (adv_sgblk_t *) | 13878 | /* |
18556 | kmalloc(sizeof(adv_sgblk_t), GFP_ATOMIC); | 13879 | * advansys_release() |
13880 | * | ||
13881 | * Release resources allocated for a single AdvanSys adapter. | ||
13882 | */ | ||
13883 | static int advansys_release(struct Scsi_Host *shost) | ||
13884 | { | ||
13885 | struct asc_board *board = shost_priv(shost); | ||
13886 | ASC_DBG(1, "begin\n"); | ||
13887 | scsi_remove_host(shost); | ||
13888 | free_irq(board->irq, shost); | ||
13889 | if (shost->dma_channel != NO_ISA_DMA) { | ||
13890 | ASC_DBG(1, "free_dma()\n"); | ||
13891 | free_dma(shost->dma_channel); | ||
13892 | } | ||
13893 | if (ASC_NARROW_BOARD(board)) { | ||
13894 | dma_unmap_single(board->dev, | ||
13895 | board->dvc_var.asc_dvc_var.overrun_dma, | ||
13896 | ASC_OVERRUN_BSIZE, DMA_FROM_DEVICE); | ||
13897 | } else { | ||
13898 | iounmap(board->ioremap_addr); | ||
13899 | advansys_wide_free_mem(board); | ||
13900 | } | ||
13901 | kfree(board->prtbuf); | ||
13902 | scsi_host_put(shost); | ||
13903 | ASC_DBG(1, "end\n"); | ||
13904 | return 0; | ||
13905 | } | ||
18557 | 13906 | ||
18558 | if (sgp == NULL) { | 13907 | #define ASC_IOADR_TABLE_MAX_IX 11 |
18559 | break; | ||
18560 | } | ||
18561 | 13908 | ||
18562 | sgp->next_sgblkp = boardp->adv_sgblkp; | 13909 | static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __devinitdata = { |
18563 | boardp->adv_sgblkp = sgp; | 13910 | 0x100, 0x0110, 0x120, 0x0130, 0x140, 0x0150, 0x0190, |
13911 | 0x0210, 0x0230, 0x0250, 0x0330 | ||
13912 | }; | ||
18564 | 13913 | ||
18565 | } | 13914 | /* |
18566 | ASC_DBG3(1, | 13915 | * The ISA IRQ number is found in bits 2 and 3 of the CfgLsw. It decodes as: |
18567 | "advansys_board_found: sg_cnt %d * %u = %u bytes\n", | 13916 | * 00: 10 |
18568 | sg_cnt, sizeof(adv_sgblk_t), | 13917 | * 01: 11 |
18569 | (unsigned)(sizeof(adv_sgblk_t) * sg_cnt)); | 13918 | * 10: 12 |
13919 | * 11: 15 | ||
13920 | */ | ||
13921 | static unsigned int __devinit advansys_isa_irq_no(PortAddr iop_base) | ||
13922 | { | ||
13923 | unsigned short cfg_lsw = AscGetChipCfgLsw(iop_base); | ||
13924 | unsigned int chip_irq = ((cfg_lsw >> 2) & 0x03) + 10; | ||
13925 | if (chip_irq == 13) | ||
13926 | chip_irq = 15; | ||
13927 | return chip_irq; | ||
13928 | } | ||
18570 | 13929 | ||
18571 | /* | 13930 | static int __devinit advansys_isa_probe(struct device *dev, unsigned int id) |
18572 | * If no request structures or scatter-gather structures could | 13931 | { |
18573 | * be allocated, then return an error. Otherwise continue with | 13932 | int err = -ENODEV; |
18574 | * initialization. | 13933 | PortAddr iop_base = _asc_def_iop_base[id]; |
18575 | */ | 13934 | struct Scsi_Host *shost; |
18576 | kmalloc_error: | 13935 | struct asc_board *board; |
18577 | if (carrp == NULL) { | ||
18578 | ASC_PRINT1 | ||
18579 | ("advansys_board_found: board %d error: failed to kmalloc() carrier buffer.\n", | ||
18580 | boardp->id); | ||
18581 | err_code = ADV_ERROR; | ||
18582 | } else if (reqp == NULL) { | ||
18583 | kfree(carrp); | ||
18584 | ASC_PRINT1 | ||
18585 | ("advansys_board_found: board %d error: failed to kmalloc() adv_req_t buffer.\n", | ||
18586 | boardp->id); | ||
18587 | err_code = ADV_ERROR; | ||
18588 | } else if (boardp->adv_sgblkp == NULL) { | ||
18589 | kfree(carrp); | ||
18590 | kfree(reqp); | ||
18591 | ASC_PRINT1 | ||
18592 | ("advansys_board_found: board %d error: failed to kmalloc() adv_sgblk_t buffers.\n", | ||
18593 | boardp->id); | ||
18594 | err_code = ADV_ERROR; | ||
18595 | } else { | ||
18596 | 13936 | ||
18597 | /* Save carrier buffer pointer. */ | 13937 | if (!request_region(iop_base, ASC_IOADR_GAP, DRV_NAME)) { |
18598 | boardp->orig_carrp = carrp; | 13938 | ASC_DBG(1, "I/O port 0x%x busy\n", iop_base); |
13939 | return -ENODEV; | ||
13940 | } | ||
13941 | ASC_DBG(1, "probing I/O port 0x%x\n", iop_base); | ||
13942 | if (!AscFindSignature(iop_base)) | ||
13943 | goto release_region; | ||
13944 | if (!(AscGetChipVersion(iop_base, ASC_IS_ISA) & ASC_CHIP_VER_ISA_BIT)) | ||
13945 | goto release_region; | ||
18599 | 13946 | ||
18600 | /* | 13947 | err = -ENOMEM; |
18601 | * Save original pointer for kfree() in case the | 13948 | shost = scsi_host_alloc(&advansys_template, sizeof(*board)); |
18602 | * driver is built as a module and can be unloaded. | 13949 | if (!shost) |
18603 | */ | 13950 | goto release_region; |
18604 | boardp->orig_reqp = reqp; | ||
18605 | 13951 | ||
18606 | adv_dvc_varp->carrier_buf = carrp; | 13952 | board = shost_priv(shost); |
13953 | board->irq = advansys_isa_irq_no(iop_base); | ||
13954 | board->dev = dev; | ||
18607 | 13955 | ||
18608 | /* | 13956 | err = advansys_board_found(shost, iop_base, ASC_IS_ISA); |
18609 | * Point 'adv_reqp' to the request structures and | 13957 | if (err) |
18610 | * link them together. | 13958 | goto free_host; |
18611 | */ | ||
18612 | req_cnt--; | ||
18613 | reqp[req_cnt].next_reqp = NULL; | ||
18614 | for (; req_cnt > 0; req_cnt--) { | ||
18615 | reqp[req_cnt - 1].next_reqp = &reqp[req_cnt]; | ||
18616 | } | ||
18617 | boardp->adv_reqp = &reqp[0]; | ||
18618 | |||
18619 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
18620 | ASC_DBG(2, | ||
18621 | "advansys_board_found: AdvInitAsc3550Driver()\n"); | ||
18622 | warn_code = AdvInitAsc3550Driver(adv_dvc_varp); | ||
18623 | } else if (adv_dvc_varp->chip_type == | ||
18624 | ADV_CHIP_ASC38C0800) { | ||
18625 | ASC_DBG(2, | ||
18626 | "advansys_board_found: AdvInitAsc38C0800Driver()\n"); | ||
18627 | warn_code = | ||
18628 | AdvInitAsc38C0800Driver(adv_dvc_varp); | ||
18629 | } else { | ||
18630 | ASC_DBG(2, | ||
18631 | "advansys_board_found: AdvInitAsc38C1600Driver()\n"); | ||
18632 | warn_code = | ||
18633 | AdvInitAsc38C1600Driver(adv_dvc_varp); | ||
18634 | } | ||
18635 | err_code = adv_dvc_varp->err_code; | ||
18636 | 13959 | ||
18637 | if (warn_code || err_code) { | 13960 | dev_set_drvdata(dev, shost); |
18638 | ASC_PRINT3 | 13961 | return 0; |
18639 | ("advansys_board_found: board %d error: warn 0x%x, error 0x%x\n", | ||
18640 | boardp->id, warn_code, err_code); | ||
18641 | } | ||
18642 | } | ||
18643 | } | ||
18644 | 13962 | ||
18645 | if (err_code != 0) { | 13963 | free_host: |
18646 | release_region(shost->io_port, boardp->asc_n_io_port); | 13964 | scsi_host_put(shost); |
18647 | if (ASC_WIDE_BOARD(boardp)) { | 13965 | release_region: |
18648 | iounmap(boardp->ioremap_addr); | 13966 | release_region(iop_base, ASC_IOADR_GAP); |
18649 | kfree(boardp->orig_carrp); | 13967 | return err; |
18650 | boardp->orig_carrp = NULL; | 13968 | } |
18651 | if (boardp->orig_reqp) { | ||
18652 | kfree(boardp->orig_reqp); | ||
18653 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
18654 | } | ||
18655 | while ((sgp = boardp->adv_sgblkp) != NULL) { | ||
18656 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
18657 | kfree(sgp); | ||
18658 | } | ||
18659 | } | ||
18660 | if (shost->dma_channel != NO_ISA_DMA) { | ||
18661 | free_dma(shost->dma_channel); | ||
18662 | } | ||
18663 | #ifdef CONFIG_PROC_FS | ||
18664 | kfree(boardp->prtbuf); | ||
18665 | #endif /* CONFIG_PROC_FS */ | ||
18666 | free_irq(shost->irq, boardp); | ||
18667 | scsi_unregister(shost); | ||
18668 | asc_board_count--; | ||
18669 | return NULL; | ||
18670 | } | ||
18671 | ASC_DBG_PRT_SCSI_HOST(2, shost); | ||
18672 | 13969 | ||
18673 | return shost; | 13970 | static int __devexit advansys_isa_remove(struct device *dev, unsigned int id) |
13971 | { | ||
13972 | int ioport = _asc_def_iop_base[id]; | ||
13973 | advansys_release(dev_get_drvdata(dev)); | ||
13974 | release_region(ioport, ASC_IOADR_GAP); | ||
13975 | return 0; | ||
18674 | } | 13976 | } |
18675 | 13977 | ||
13978 | static struct isa_driver advansys_isa_driver = { | ||
13979 | .probe = advansys_isa_probe, | ||
13980 | .remove = __devexit_p(advansys_isa_remove), | ||
13981 | .driver = { | ||
13982 | .owner = THIS_MODULE, | ||
13983 | .name = DRV_NAME, | ||
13984 | }, | ||
13985 | }; | ||
13986 | |||
18676 | /* | 13987 | /* |
18677 | * advansys_detect() | 13988 | * The VLB IRQ number is found in bits 2 to 4 of the CfgLsw. It decodes as: |
18678 | * | 13989 | * 000: invalid |
18679 | * Detect function for AdvanSys adapters. | 13990 | * 001: 10 |
18680 | * | 13991 | * 010: 11 |
18681 | * Argument is a pointer to the host driver's scsi_hosts entry. | 13992 | * 011: 12 |
18682 | * | 13993 | * 100: invalid |
18683 | * Return number of adapters found. | 13994 | * 101: 14 |
18684 | * | 13995 | * 110: 15 |
18685 | * Note: Because this function is called during system initialization | 13996 | * 111: invalid |
18686 | * it must not call SCSI mid-level functions including scsi_malloc() | ||
18687 | * and scsi_free(). | ||
18688 | */ | 13997 | */ |
18689 | static int __init advansys_detect(struct scsi_host_template *tpnt) | 13998 | static unsigned int __devinit advansys_vlb_irq_no(PortAddr iop_base) |
18690 | { | 13999 | { |
18691 | static int detect_called = ASC_FALSE; | 14000 | unsigned short cfg_lsw = AscGetChipCfgLsw(iop_base); |
18692 | int iop; | 14001 | unsigned int chip_irq = ((cfg_lsw >> 2) & 0x07) + 9; |
18693 | int bus; | 14002 | if ((chip_irq < 10) || (chip_irq == 13) || (chip_irq > 15)) |
18694 | int ioport = 0; | ||
18695 | struct device *dev = NULL; | ||
18696 | #ifdef CONFIG_PCI | ||
18697 | int pci_init_search = 0; | ||
18698 | struct pci_dev *pci_devicep[ASC_NUM_BOARD_SUPPORTED]; | ||
18699 | int pci_card_cnt_max = 0; | ||
18700 | int pci_card_cnt = 0; | ||
18701 | struct pci_dev *pdev = NULL; | ||
18702 | int pci_device_id_cnt = 0; | ||
18703 | unsigned int pci_device_id[ASC_PCI_DEVICE_ID_CNT] = { | ||
18704 | PCI_DEVICE_ID_ASP_1200A, | ||
18705 | PCI_DEVICE_ID_ASP_ABP940, | ||
18706 | PCI_DEVICE_ID_ASP_ABP940U, | ||
18707 | PCI_DEVICE_ID_ASP_ABP940UW, | ||
18708 | PCI_DEVICE_ID_38C0800_REV1, | ||
18709 | PCI_DEVICE_ID_38C1600_REV1 | ||
18710 | }; | ||
18711 | #endif /* CONFIG_PCI */ | ||
18712 | |||
18713 | if (detect_called == ASC_FALSE) { | ||
18714 | detect_called = ASC_TRUE; | ||
18715 | } else { | ||
18716 | printk | ||
18717 | ("AdvanSys SCSI: advansys_detect() multiple calls ignored\n"); | ||
18718 | return 0; | 14003 | return 0; |
18719 | } | 14004 | return chip_irq; |
18720 | 14005 | } | |
18721 | ASC_DBG(1, "advansys_detect: begin\n"); | ||
18722 | 14006 | ||
18723 | asc_board_count = 0; | 14007 | static int __devinit advansys_vlb_probe(struct device *dev, unsigned int id) |
14008 | { | ||
14009 | int err = -ENODEV; | ||
14010 | PortAddr iop_base = _asc_def_iop_base[id]; | ||
14011 | struct Scsi_Host *shost; | ||
14012 | struct asc_board *board; | ||
18724 | 14013 | ||
14014 | if (!request_region(iop_base, ASC_IOADR_GAP, DRV_NAME)) { | ||
14015 | ASC_DBG(1, "I/O port 0x%x busy\n", iop_base); | ||
14016 | return -ENODEV; | ||
14017 | } | ||
14018 | ASC_DBG(1, "probing I/O port 0x%x\n", iop_base); | ||
14019 | if (!AscFindSignature(iop_base)) | ||
14020 | goto release_region; | ||
18725 | /* | 14021 | /* |
18726 | * If I/O port probing has been modified, then verify and | 14022 | * I don't think this condition can actually happen, but the old |
18727 | * clean-up the 'asc_ioport' list. | 14023 | * driver did it, and the chances of finding a VLB setup in 2007 |
14024 | * to do testing with is slight to none. | ||
18728 | */ | 14025 | */ |
18729 | if (asc_iopflag == ASC_TRUE) { | 14026 | if (AscGetChipVersion(iop_base, ASC_IS_VL) > ASC_CHIP_MAX_VER_VL) |
18730 | for (ioport = 0; ioport < ASC_NUM_IOPORT_PROBE; ioport++) { | 14027 | goto release_region; |
18731 | ASC_DBG2(1, "advansys_detect: asc_ioport[%d] 0x%x\n", | ||
18732 | ioport, asc_ioport[ioport]); | ||
18733 | if (asc_ioport[ioport] != 0) { | ||
18734 | for (iop = 0; iop < ASC_IOADR_TABLE_MAX_IX; | ||
18735 | iop++) { | ||
18736 | if (_asc_def_iop_base[iop] == | ||
18737 | asc_ioport[ioport]) { | ||
18738 | break; | ||
18739 | } | ||
18740 | } | ||
18741 | if (iop == ASC_IOADR_TABLE_MAX_IX) { | ||
18742 | printk | ||
18743 | ("AdvanSys SCSI: specified I/O Port 0x%X is invalid\n", | ||
18744 | asc_ioport[ioport]); | ||
18745 | asc_ioport[ioport] = 0; | ||
18746 | } | ||
18747 | } | ||
18748 | } | ||
18749 | ioport = 0; | ||
18750 | } | ||
18751 | 14028 | ||
18752 | for (bus = 0; bus < ASC_NUM_BUS; bus++) { | 14029 | err = -ENOMEM; |
14030 | shost = scsi_host_alloc(&advansys_template, sizeof(*board)); | ||
14031 | if (!shost) | ||
14032 | goto release_region; | ||
18753 | 14033 | ||
18754 | ASC_DBG2(1, "advansys_detect: bus search type %d (%s)\n", | 14034 | board = shost_priv(shost); |
18755 | bus, asc_bus_name[bus]); | 14035 | board->irq = advansys_vlb_irq_no(iop_base); |
18756 | iop = 0; | 14036 | board->dev = dev; |
18757 | 14037 | ||
18758 | while (asc_board_count < ASC_NUM_BOARD_SUPPORTED) { | 14038 | err = advansys_board_found(shost, iop_base, ASC_IS_VL); |
14039 | if (err) | ||
14040 | goto free_host; | ||
18759 | 14041 | ||
18760 | ASC_DBG1(2, "advansys_detect: asc_board_count %d\n", | 14042 | dev_set_drvdata(dev, shost); |
18761 | asc_board_count); | 14043 | return 0; |
18762 | 14044 | ||
18763 | switch (asc_bus[bus]) { | 14045 | free_host: |
18764 | case ASC_IS_ISA: | 14046 | scsi_host_put(shost); |
18765 | case ASC_IS_VL: | 14047 | release_region: |
18766 | #ifdef CONFIG_ISA | 14048 | release_region(iop_base, ASC_IOADR_GAP); |
18767 | if (asc_iopflag == ASC_FALSE) { | 14049 | return -ENODEV; |
18768 | iop = | 14050 | } |
18769 | AscSearchIOPortAddr(iop, | ||
18770 | asc_bus[bus]); | ||
18771 | } else { | ||
18772 | /* | ||
18773 | * ISA and VL I/O port scanning has either been | ||
18774 | * eliminated or limited to selected ports on | ||
18775 | * the LILO command line, /etc/lilo.conf, or | ||
18776 | * by setting variables when the module was loaded. | ||
18777 | */ | ||
18778 | ASC_DBG(1, | ||
18779 | "advansys_detect: I/O port scanning modified\n"); | ||
18780 | ioport_try_again: | ||
18781 | iop = 0; | ||
18782 | for (; ioport < ASC_NUM_IOPORT_PROBE; | ||
18783 | ioport++) { | ||
18784 | if ((iop = | ||
18785 | asc_ioport[ioport]) != 0) { | ||
18786 | break; | ||
18787 | } | ||
18788 | } | ||
18789 | if (iop) { | ||
18790 | ASC_DBG1(1, | ||
18791 | "advansys_detect: probing I/O port 0x%x...\n", | ||
18792 | iop); | ||
18793 | if (!request_region | ||
18794 | (iop, ASC_IOADR_GAP, | ||
18795 | "advansys")) { | ||
18796 | printk | ||
18797 | ("AdvanSys SCSI: specified I/O Port 0x%X is busy\n", | ||
18798 | iop); | ||
18799 | /* Don't try this I/O port twice. */ | ||
18800 | asc_ioport[ioport] = 0; | ||
18801 | goto ioport_try_again; | ||
18802 | } else if (AscFindSignature(iop) | ||
18803 | == ASC_FALSE) { | ||
18804 | printk | ||
18805 | ("AdvanSys SCSI: specified I/O Port 0x%X has no adapter\n", | ||
18806 | iop); | ||
18807 | /* Don't try this I/O port twice. */ | ||
18808 | release_region(iop, | ||
18809 | ASC_IOADR_GAP); | ||
18810 | asc_ioport[ioport] = 0; | ||
18811 | goto ioport_try_again; | ||
18812 | } else { | ||
18813 | /* | ||
18814 | * If this isn't an ISA board, then it must be | ||
18815 | * a VL board. If currently looking an ISA | ||
18816 | * board is being looked for then try for | ||
18817 | * another ISA board in 'asc_ioport'. | ||
18818 | */ | ||
18819 | if (asc_bus[bus] == | ||
18820 | ASC_IS_ISA | ||
18821 | && | ||
18822 | (AscGetChipVersion | ||
18823 | (iop, | ||
18824 | ASC_IS_ISA) & | ||
18825 | ASC_CHIP_VER_ISA_BIT) | ||
18826 | == 0) { | ||
18827 | /* | ||
18828 | * Don't clear 'asc_ioport[ioport]'. Try | ||
18829 | * this board again for VL. Increment | ||
18830 | * 'ioport' past this board. | ||
18831 | */ | ||
18832 | ioport++; | ||
18833 | release_region | ||
18834 | (iop, | ||
18835 | ASC_IOADR_GAP); | ||
18836 | goto ioport_try_again; | ||
18837 | } | ||
18838 | } | ||
18839 | /* | ||
18840 | * This board appears good, don't try the I/O port | ||
18841 | * again by clearing its value. Increment 'ioport' | ||
18842 | * for the next iteration. | ||
18843 | */ | ||
18844 | asc_ioport[ioport++] = 0; | ||
18845 | } | ||
18846 | } | ||
18847 | #endif /* CONFIG_ISA */ | ||
18848 | break; | ||
18849 | 14051 | ||
18850 | case ASC_IS_EISA: | 14052 | static struct isa_driver advansys_vlb_driver = { |
18851 | #ifdef CONFIG_ISA | 14053 | .probe = advansys_vlb_probe, |
18852 | iop = AscSearchIOPortAddr(iop, asc_bus[bus]); | 14054 | .remove = __devexit_p(advansys_isa_remove), |
18853 | #endif /* CONFIG_ISA */ | 14055 | .driver = { |
18854 | break; | 14056 | .owner = THIS_MODULE, |
14057 | .name = "advansys_vlb", | ||
14058 | }, | ||
14059 | }; | ||
18855 | 14060 | ||
18856 | case ASC_IS_PCI: | 14061 | static struct eisa_device_id advansys_eisa_table[] __devinitdata = { |
18857 | #ifdef CONFIG_PCI | 14062 | { "ABP7401" }, |
18858 | if (pci_init_search == 0) { | 14063 | { "ABP7501" }, |
18859 | int i, j; | 14064 | { "" } |
18860 | 14065 | }; | |
18861 | pci_init_search = 1; | ||
18862 | |||
18863 | /* Find all PCI cards. */ | ||
18864 | while (pci_device_id_cnt < | ||
18865 | ASC_PCI_DEVICE_ID_CNT) { | ||
18866 | if ((pdev = | ||
18867 | pci_find_device | ||
18868 | (PCI_VENDOR_ID_ASP, | ||
18869 | pci_device_id | ||
18870 | [pci_device_id_cnt], | ||
18871 | pdev)) == NULL) { | ||
18872 | pci_device_id_cnt++; | ||
18873 | } else { | ||
18874 | if (pci_enable_device | ||
18875 | (pdev) == 0) { | ||
18876 | pci_devicep | ||
18877 | [pci_card_cnt_max++] | ||
18878 | = pdev; | ||
18879 | } | ||
18880 | } | ||
18881 | } | ||
18882 | 14066 | ||
18883 | /* | 14067 | MODULE_DEVICE_TABLE(eisa, advansys_eisa_table); |
18884 | * Sort PCI cards in ascending order by PCI Bus, Slot, | ||
18885 | * and Device Number. | ||
18886 | */ | ||
18887 | for (i = 0; i < pci_card_cnt_max - 1; | ||
18888 | i++) { | ||
18889 | for (j = i + 1; | ||
18890 | j < pci_card_cnt_max; | ||
18891 | j++) { | ||
18892 | if ((pci_devicep[j]-> | ||
18893 | bus->number < | ||
18894 | pci_devicep[i]-> | ||
18895 | bus->number) | ||
18896 | || | ||
18897 | ((pci_devicep[j]-> | ||
18898 | bus->number == | ||
18899 | pci_devicep[i]-> | ||
18900 | bus->number) | ||
18901 | && | ||
18902 | (pci_devicep[j]-> | ||
18903 | devfn < | ||
18904 | pci_devicep[i]-> | ||
18905 | devfn))) { | ||
18906 | pdev = | ||
18907 | pci_devicep | ||
18908 | [i]; | ||
18909 | pci_devicep[i] = | ||
18910 | pci_devicep | ||
18911 | [j]; | ||
18912 | pci_devicep[j] = | ||
18913 | pdev; | ||
18914 | } | ||
18915 | } | ||
18916 | } | ||
18917 | 14068 | ||
18918 | pci_card_cnt = 0; | 14069 | /* |
18919 | } else { | 14070 | * EISA is a little more tricky than PCI; each EISA device may have two |
18920 | pci_card_cnt++; | 14071 | * channels, and this driver is written to make each channel its own Scsi_Host |
18921 | } | 14072 | */ |
14073 | struct eisa_scsi_data { | ||
14074 | struct Scsi_Host *host[2]; | ||
14075 | }; | ||
18922 | 14076 | ||
18923 | if (pci_card_cnt == pci_card_cnt_max) { | 14077 | /* |
18924 | iop = 0; | 14078 | * The EISA IRQ number is found in bits 8 to 10 of the CfgLsw. It decodes as: |
18925 | } else { | 14079 | * 000: 10 |
18926 | pdev = pci_devicep[pci_card_cnt]; | 14080 | * 001: 11 |
18927 | 14081 | * 010: 12 | |
18928 | ASC_DBG2(2, | 14082 | * 011: invalid |
18929 | "advansys_detect: devfn %d, bus number %d\n", | 14083 | * 100: 14 |
18930 | pdev->devfn, | 14084 | * 101: 15 |
18931 | pdev->bus->number); | 14085 | * 110: invalid |
18932 | iop = pci_resource_start(pdev, 0); | 14086 | * 111: invalid |
18933 | ASC_DBG2(1, | 14087 | */ |
18934 | "advansys_detect: vendorID %X, deviceID %X\n", | 14088 | static unsigned int __devinit advansys_eisa_irq_no(struct eisa_device *edev) |
18935 | pdev->vendor, | 14089 | { |
18936 | pdev->device); | 14090 | unsigned short cfg_lsw = inw(edev->base_addr + 0xc86); |
18937 | ASC_DBG2(2, | 14091 | unsigned int chip_irq = ((cfg_lsw >> 8) & 0x07) + 10; |
18938 | "advansys_detect: iop %X, irqLine %d\n", | 14092 | if ((chip_irq == 13) || (chip_irq > 15)) |
18939 | iop, pdev->irq); | 14093 | return 0; |
18940 | } | 14094 | return chip_irq; |
18941 | if (pdev) | 14095 | } |
18942 | dev = &pdev->dev; | ||
18943 | 14096 | ||
18944 | #endif /* CONFIG_PCI */ | 14097 | static int __devinit advansys_eisa_probe(struct device *dev) |
18945 | break; | 14098 | { |
14099 | int i, ioport, irq = 0; | ||
14100 | int err; | ||
14101 | struct eisa_device *edev = to_eisa_device(dev); | ||
14102 | struct eisa_scsi_data *data; | ||
18946 | 14103 | ||
18947 | default: | 14104 | err = -ENOMEM; |
18948 | ASC_PRINT1 | 14105 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
18949 | ("advansys_detect: unknown bus type: %d\n", | 14106 | if (!data) |
18950 | asc_bus[bus]); | 14107 | goto fail; |
18951 | break; | 14108 | ioport = edev->base_addr + 0xc30; |
18952 | } | ||
18953 | ASC_DBG1(1, "advansys_detect: iop 0x%x\n", iop); | ||
18954 | 14109 | ||
18955 | /* | 14110 | err = -ENODEV; |
18956 | * Adapter not found, try next bus type. | 14111 | for (i = 0; i < 2; i++, ioport += 0x20) { |
18957 | */ | 14112 | struct asc_board *board; |
18958 | if (iop == 0) { | 14113 | struct Scsi_Host *shost; |
18959 | break; | 14114 | if (!request_region(ioport, ASC_IOADR_GAP, DRV_NAME)) { |
18960 | } | 14115 | printk(KERN_WARNING "Region %x-%x busy\n", ioport, |
14116 | ioport + ASC_IOADR_GAP - 1); | ||
14117 | continue; | ||
14118 | } | ||
14119 | if (!AscFindSignature(ioport)) { | ||
14120 | release_region(ioport, ASC_IOADR_GAP); | ||
14121 | continue; | ||
14122 | } | ||
18961 | 14123 | ||
18962 | advansys_board_found(iop, dev, asc_bus[bus]); | 14124 | /* |
14125 | * I don't know why we need to do this for EISA chips, but | ||
14126 | * not for any others. It looks to be equivalent to | ||
14127 | * AscGetChipCfgMsw, but I may have overlooked something, | ||
14128 | * so I'm not converting it until I get an EISA board to | ||
14129 | * test with. | ||
14130 | */ | ||
14131 | inw(ioport + 4); | ||
14132 | |||
14133 | if (!irq) | ||
14134 | irq = advansys_eisa_irq_no(edev); | ||
14135 | |||
14136 | err = -ENOMEM; | ||
14137 | shost = scsi_host_alloc(&advansys_template, sizeof(*board)); | ||
14138 | if (!shost) | ||
14139 | goto release_region; | ||
14140 | |||
14141 | board = shost_priv(shost); | ||
14142 | board->irq = irq; | ||
14143 | board->dev = dev; | ||
14144 | |||
14145 | err = advansys_board_found(shost, ioport, ASC_IS_EISA); | ||
14146 | if (!err) { | ||
14147 | data->host[i] = shost; | ||
14148 | continue; | ||
18963 | } | 14149 | } |
14150 | |||
14151 | scsi_host_put(shost); | ||
14152 | release_region: | ||
14153 | release_region(ioport, ASC_IOADR_GAP); | ||
14154 | break; | ||
18964 | } | 14155 | } |
18965 | 14156 | ||
18966 | ASC_DBG1(1, "advansys_detect: done: asc_board_count %d\n", | 14157 | if (err) |
18967 | asc_board_count); | 14158 | goto free_data; |
18968 | return asc_board_count; | 14159 | dev_set_drvdata(dev, data); |
14160 | return 0; | ||
14161 | |||
14162 | free_data: | ||
14163 | kfree(data->host[0]); | ||
14164 | kfree(data->host[1]); | ||
14165 | kfree(data); | ||
14166 | fail: | ||
14167 | return err; | ||
18969 | } | 14168 | } |
18970 | 14169 | ||
18971 | /* | 14170 | static __devexit int advansys_eisa_remove(struct device *dev) |
18972 | * advansys_release() | ||
18973 | * | ||
18974 | * Release resources allocated for a single AdvanSys adapter. | ||
18975 | */ | ||
18976 | static int advansys_release(struct Scsi_Host *shost) | ||
18977 | { | 14171 | { |
18978 | asc_board_t *boardp; | 14172 | int i; |
14173 | struct eisa_scsi_data *data = dev_get_drvdata(dev); | ||
18979 | 14174 | ||
18980 | ASC_DBG(1, "advansys_release: begin\n"); | 14175 | for (i = 0; i < 2; i++) { |
18981 | boardp = ASC_BOARDP(shost); | 14176 | int ioport; |
18982 | free_irq(shost->irq, boardp); | 14177 | struct Scsi_Host *shost = data->host[i]; |
18983 | if (shost->dma_channel != NO_ISA_DMA) { | 14178 | if (!shost) |
18984 | ASC_DBG(1, "advansys_release: free_dma()\n"); | 14179 | continue; |
18985 | free_dma(shost->dma_channel); | 14180 | ioport = shost->io_port; |
14181 | advansys_release(shost); | ||
14182 | release_region(ioport, ASC_IOADR_GAP); | ||
18986 | } | 14183 | } |
18987 | release_region(shost->io_port, boardp->asc_n_io_port); | ||
18988 | if (ASC_WIDE_BOARD(boardp)) { | ||
18989 | adv_sgblk_t *sgp = NULL; | ||
18990 | 14184 | ||
18991 | iounmap(boardp->ioremap_addr); | 14185 | kfree(data); |
18992 | kfree(boardp->orig_carrp); | ||
18993 | boardp->orig_carrp = NULL; | ||
18994 | if (boardp->orig_reqp) { | ||
18995 | kfree(boardp->orig_reqp); | ||
18996 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
18997 | } | ||
18998 | while ((sgp = boardp->adv_sgblkp) != NULL) { | ||
18999 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
19000 | kfree(sgp); | ||
19001 | } | ||
19002 | } | ||
19003 | #ifdef CONFIG_PROC_FS | ||
19004 | ASC_ASSERT(boardp->prtbuf != NULL); | ||
19005 | kfree(boardp->prtbuf); | ||
19006 | #endif /* CONFIG_PROC_FS */ | ||
19007 | scsi_unregister(shost); | ||
19008 | ASC_DBG(1, "advansys_release: end\n"); | ||
19009 | return 0; | 14186 | return 0; |
19010 | } | 14187 | } |
19011 | 14188 | ||
19012 | #ifdef CONFIG_PCI | 14189 | static struct eisa_driver advansys_eisa_driver = { |
14190 | .id_table = advansys_eisa_table, | ||
14191 | .driver = { | ||
14192 | .name = DRV_NAME, | ||
14193 | .probe = advansys_eisa_probe, | ||
14194 | .remove = __devexit_p(advansys_eisa_remove), | ||
14195 | } | ||
14196 | }; | ||
14197 | |||
19013 | /* PCI Devices supported by this driver */ | 14198 | /* PCI Devices supported by this driver */ |
19014 | static struct pci_device_id advansys_pci_tbl[] __devinitdata = { | 14199 | static struct pci_device_id advansys_pci_tbl[] __devinitdata = { |
19015 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A, | 14200 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A, |
@@ -19028,4 +14213,131 @@ static struct pci_device_id advansys_pci_tbl[] __devinitdata = { | |||
19028 | }; | 14213 | }; |
19029 | 14214 | ||
19030 | MODULE_DEVICE_TABLE(pci, advansys_pci_tbl); | 14215 | MODULE_DEVICE_TABLE(pci, advansys_pci_tbl); |
19031 | #endif /* CONFIG_PCI */ | 14216 | |
14217 | static void __devinit advansys_set_latency(struct pci_dev *pdev) | ||
14218 | { | ||
14219 | if ((pdev->device == PCI_DEVICE_ID_ASP_1200A) || | ||
14220 | (pdev->device == PCI_DEVICE_ID_ASP_ABP940)) { | ||
14221 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0); | ||
14222 | } else { | ||
14223 | u8 latency; | ||
14224 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency); | ||
14225 | if (latency < 0x20) | ||
14226 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20); | ||
14227 | } | ||
14228 | } | ||
14229 | |||
14230 | static int __devinit | ||
14231 | advansys_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
14232 | { | ||
14233 | int err, ioport; | ||
14234 | struct Scsi_Host *shost; | ||
14235 | struct asc_board *board; | ||
14236 | |||
14237 | err = pci_enable_device(pdev); | ||
14238 | if (err) | ||
14239 | goto fail; | ||
14240 | err = pci_request_regions(pdev, DRV_NAME); | ||
14241 | if (err) | ||
14242 | goto disable_device; | ||
14243 | pci_set_master(pdev); | ||
14244 | advansys_set_latency(pdev); | ||
14245 | |||
14246 | err = -ENODEV; | ||
14247 | if (pci_resource_len(pdev, 0) == 0) | ||
14248 | goto release_region; | ||
14249 | |||
14250 | ioport = pci_resource_start(pdev, 0); | ||
14251 | |||
14252 | err = -ENOMEM; | ||
14253 | shost = scsi_host_alloc(&advansys_template, sizeof(*board)); | ||
14254 | if (!shost) | ||
14255 | goto release_region; | ||
14256 | |||
14257 | board = shost_priv(shost); | ||
14258 | board->irq = pdev->irq; | ||
14259 | board->dev = &pdev->dev; | ||
14260 | |||
14261 | if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW || | ||
14262 | pdev->device == PCI_DEVICE_ID_38C0800_REV1 || | ||
14263 | pdev->device == PCI_DEVICE_ID_38C1600_REV1) { | ||
14264 | board->flags |= ASC_IS_WIDE_BOARD; | ||
14265 | } | ||
14266 | |||
14267 | err = advansys_board_found(shost, ioport, ASC_IS_PCI); | ||
14268 | if (err) | ||
14269 | goto free_host; | ||
14270 | |||
14271 | pci_set_drvdata(pdev, shost); | ||
14272 | return 0; | ||
14273 | |||
14274 | free_host: | ||
14275 | scsi_host_put(shost); | ||
14276 | release_region: | ||
14277 | pci_release_regions(pdev); | ||
14278 | disable_device: | ||
14279 | pci_disable_device(pdev); | ||
14280 | fail: | ||
14281 | return err; | ||
14282 | } | ||
14283 | |||
14284 | static void __devexit advansys_pci_remove(struct pci_dev *pdev) | ||
14285 | { | ||
14286 | advansys_release(pci_get_drvdata(pdev)); | ||
14287 | pci_release_regions(pdev); | ||
14288 | pci_disable_device(pdev); | ||
14289 | } | ||
14290 | |||
14291 | static struct pci_driver advansys_pci_driver = { | ||
14292 | .name = DRV_NAME, | ||
14293 | .id_table = advansys_pci_tbl, | ||
14294 | .probe = advansys_pci_probe, | ||
14295 | .remove = __devexit_p(advansys_pci_remove), | ||
14296 | }; | ||
14297 | |||
14298 | static int __init advansys_init(void) | ||
14299 | { | ||
14300 | int error; | ||
14301 | |||
14302 | error = isa_register_driver(&advansys_isa_driver, | ||
14303 | ASC_IOADR_TABLE_MAX_IX); | ||
14304 | if (error) | ||
14305 | goto fail; | ||
14306 | |||
14307 | error = isa_register_driver(&advansys_vlb_driver, | ||
14308 | ASC_IOADR_TABLE_MAX_IX); | ||
14309 | if (error) | ||
14310 | goto unregister_isa; | ||
14311 | |||
14312 | error = eisa_driver_register(&advansys_eisa_driver); | ||
14313 | if (error) | ||
14314 | goto unregister_vlb; | ||
14315 | |||
14316 | error = pci_register_driver(&advansys_pci_driver); | ||
14317 | if (error) | ||
14318 | goto unregister_eisa; | ||
14319 | |||
14320 | return 0; | ||
14321 | |||
14322 | unregister_eisa: | ||
14323 | eisa_driver_unregister(&advansys_eisa_driver); | ||
14324 | unregister_vlb: | ||
14325 | isa_unregister_driver(&advansys_vlb_driver); | ||
14326 | unregister_isa: | ||
14327 | isa_unregister_driver(&advansys_isa_driver); | ||
14328 | fail: | ||
14329 | return error; | ||
14330 | } | ||
14331 | |||
14332 | static void __exit advansys_exit(void) | ||
14333 | { | ||
14334 | pci_unregister_driver(&advansys_pci_driver); | ||
14335 | eisa_driver_unregister(&advansys_eisa_driver); | ||
14336 | isa_unregister_driver(&advansys_vlb_driver); | ||
14337 | isa_unregister_driver(&advansys_isa_driver); | ||
14338 | } | ||
14339 | |||
14340 | module_init(advansys_init); | ||
14341 | module_exit(advansys_exit); | ||
14342 | |||
14343 | MODULE_LICENSE("GPL"); | ||