aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/FlashPoint.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/FlashPoint.c')
-rw-r--r--drivers/scsi/FlashPoint.c83
1 files changed, 40 insertions, 43 deletions
diff --git a/drivers/scsi/FlashPoint.c b/drivers/scsi/FlashPoint.c
index a7f916c0c9cd..1c9078191d9e 100644
--- a/drivers/scsi/FlashPoint.c
+++ b/drivers/scsi/FlashPoint.c
@@ -25,9 +25,6 @@
25 25
26#define FAILURE 0xFFFFFFFFL 26#define FAILURE 0xFFFFFFFFL
27 27
28#define BIT(x) ((unsigned char)(1<<(x))) /* single-bit mask in bit position x */
29#define BITW(x) ((unsigned short)(1<<(x))) /* single-bit mask in bit position x */
30
31struct sccb; 28struct sccb;
32typedef void (*CALL_BK_FN) (struct sccb *); 29typedef void (*CALL_BK_FN) (struct sccb *);
33 30
@@ -374,9 +371,9 @@ typedef struct SCCBscam_info {
374#define SCAM_ENABLED BIT(2) 371#define SCAM_ENABLED BIT(2)
375#define SCAM_LEVEL2 BIT(3) 372#define SCAM_LEVEL2 BIT(3)
376 373
377#define RENEGO_ENA BITW(10) 374#define RENEGO_ENA BIT(10)
378#define CONNIO_ENA BITW(11) 375#define CONNIO_ENA BIT(11)
379#define GREEN_PC_ENA BITW(12) 376#define GREEN_PC_ENA BIT(12)
380 377
381#define AUTO_RATE_00 00 378#define AUTO_RATE_00 00
382#define AUTO_RATE_05 01 379#define AUTO_RATE_05 01
@@ -511,23 +508,23 @@ typedef struct SCCBscam_info {
511 508
512#define hp_intena 0x40 509#define hp_intena 0x40
513 510
514#define RESET BITW(7) 511#define RESET BIT(7)
515#define PROG_HLT BITW(6) 512#define PROG_HLT BIT(6)
516#define PARITY BITW(5) 513#define PARITY BIT(5)
517#define FIFO BITW(4) 514#define FIFO BIT(4)
518#define SEL BITW(3) 515#define SEL BIT(3)
519#define SCAM_SEL BITW(2) 516#define SCAM_SEL BIT(2)
520#define RSEL BITW(1) 517#define RSEL BIT(1)
521#define TIMEOUT BITW(0) 518#define TIMEOUT BIT(0)
522#define BUS_FREE BITW(15) 519#define BUS_FREE BIT(15)
523#define XFER_CNT_0 BITW(14) 520#define XFER_CNT_0 BIT(14)
524#define PHASE BITW(13) 521#define PHASE BIT(13)
525#define IUNKWN BITW(12) 522#define IUNKWN BIT(12)
526#define ICMD_COMP BITW(11) 523#define ICMD_COMP BIT(11)
527#define ITICKLE BITW(10) 524#define ITICKLE BIT(10)
528#define IDO_STRT BITW(9) 525#define IDO_STRT BIT(9)
529#define ITAR_DISC BITW(8) 526#define ITAR_DISC BIT(8)
530#define AUTO_INT (BITW(12)+BITW(11)+BITW(10)+BITW(9)+BITW(8)) 527#define AUTO_INT (BIT(12)+BIT(11)+BIT(10)+BIT(9)+BIT(8))
531#define CLR_ALL_INT 0xFFFF 528#define CLR_ALL_INT 0xFFFF
532#define CLR_ALL_INT_1 0xFF00 529#define CLR_ALL_INT_1 0xFF00
533 530
@@ -674,37 +671,37 @@ typedef struct SCCBscam_info {
674#define BIOS_DATA_OFFSET 0x60 671#define BIOS_DATA_OFFSET 0x60
675#define BIOS_RELATIVE_CARD 0x64 672#define BIOS_RELATIVE_CARD 0x64
676 673
677#define AR3 (BITW(9) + BITW(8)) 674#define AR3 (BIT(9) + BIT(8))
678#define SDATA BITW(10) 675#define SDATA BIT(10)
679 676
680#define CRD_OP BITW(11) /* Cmp Reg. w/ Data */ 677#define CRD_OP BIT(11) /* Cmp Reg. w/ Data */
681 678
682#define CRR_OP BITW(12) /* Cmp Reg. w. Reg. */ 679#define CRR_OP BIT(12) /* Cmp Reg. w. Reg. */
683 680
684#define CPE_OP (BITW(14)+BITW(11)) /* Cmp SCSI phs & Branch EQ */ 681#define CPE_OP (BIT(14)+BIT(11)) /* Cmp SCSI phs & Branch EQ */
685 682
686#define CPN_OP (BITW(14)+BITW(12)) /* Cmp SCSI phs & Branch NOT EQ */ 683#define CPN_OP (BIT(14)+BIT(12)) /* Cmp SCSI phs & Branch NOT EQ */
687 684
688#define ADATA_OUT 0x00 685#define ADATA_OUT 0x00
689#define ADATA_IN BITW(8) 686#define ADATA_IN BIT(8)
690#define ACOMMAND BITW(10) 687#define ACOMMAND BIT(10)
691#define ASTATUS (BITW(10)+BITW(8)) 688#define ASTATUS (BIT(10)+BIT(8))
692#define AMSG_OUT (BITW(10)+BITW(9)) 689#define AMSG_OUT (BIT(10)+BIT(9))
693#define AMSG_IN (BITW(10)+BITW(9)+BITW(8)) 690#define AMSG_IN (BIT(10)+BIT(9)+BIT(8))
694 691
695#define BRH_OP BITW(13) /* Branch */ 692#define BRH_OP BIT(13) /* Branch */
696 693
697#define ALWAYS 0x00 694#define ALWAYS 0x00
698#define EQUAL BITW(8) 695#define EQUAL BIT(8)
699#define NOT_EQ BITW(9) 696#define NOT_EQ BIT(9)
700 697
701#define TCB_OP (BITW(13)+BITW(11)) /* Test condition & branch */ 698#define TCB_OP (BIT(13)+BIT(11)) /* Test condition & branch */
702 699
703#define FIFO_0 BITW(10) 700#define FIFO_0 BIT(10)
704 701
705#define MPM_OP BITW(15) /* Match phase and move data */ 702#define MPM_OP BIT(15) /* Match phase and move data */
706 703
707#define MRR_OP BITW(14) /* Move DReg. to Reg. */ 704#define MRR_OP BIT(14) /* Move DReg. to Reg. */
708 705
709#define S_IDREG (BIT(2)+BIT(1)+BIT(0)) 706#define S_IDREG (BIT(2)+BIT(1)+BIT(0))
710 707
@@ -712,9 +709,9 @@ typedef struct SCCBscam_info {
712#define D_AR1 BIT(0) 709#define D_AR1 BIT(0)
713#define D_BUCKET (BIT(2) + BIT(1) + BIT(0)) 710#define D_BUCKET (BIT(2) + BIT(1) + BIT(0))
714 711
715#define RAT_OP (BITW(14)+BITW(13)+BITW(11)) 712#define RAT_OP (BIT(14)+BIT(13)+BIT(11))
716 713
717#define SSI_OP (BITW(15)+BITW(11)) 714#define SSI_OP (BIT(15)+BIT(11))
718 715
719#define SSI_ITAR_DISC (ITAR_DISC >> 8) 716#define SSI_ITAR_DISC (ITAR_DISC >> 8)
720#define SSI_IDO_STRT (IDO_STRT >> 8) 717#define SSI_IDO_STRT (IDO_STRT >> 8)