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-rw-r--r--drivers/scsi/FlashPoint.c9811
1 files changed, 4613 insertions, 5198 deletions
diff --git a/drivers/scsi/FlashPoint.c b/drivers/scsi/FlashPoint.c
index 8d64f0bed628..8e3d949b7118 100644
--- a/drivers/scsi/FlashPoint.c
+++ b/drivers/scsi/FlashPoint.c
@@ -15,116 +15,46 @@
15 15
16*/ 16*/
17 17
18
19#include <linux/config.h> 18#include <linux/config.h>
20 19
21
22#ifndef CONFIG_SCSI_OMIT_FLASHPOINT 20#ifndef CONFIG_SCSI_OMIT_FLASHPOINT
23 21
24
25#define MAX_CARDS 8 22#define MAX_CARDS 8
26#undef BUSTYPE_PCI 23#undef BUSTYPE_PCI
27 24
28
29#define OS_InPortByte(port) inb(port)
30#define OS_InPortWord(port) inw(port)
31#define OS_InPortLong(port) inl(port)
32#define OS_OutPortByte(port, value) outb(value, port)
33#define OS_OutPortWord(port, value) outw(value, port)
34#define OS_OutPortLong(port, value) outl(value, port)
35
36
37/*
38 Define name replacements for compatibility with the Linux BusLogic Driver.
39*/
40
41#define SccbMgr_sense_adapter FlashPoint_ProbeHostAdapter
42#define SccbMgr_config_adapter FlashPoint_HardwareResetHostAdapter
43#define SccbMgr_unload_card FlashPoint_ReleaseHostAdapter
44#define SccbMgr_start_sccb FlashPoint_StartCCB
45#define SccbMgr_abort_sccb FlashPoint_AbortCCB
46#define SccbMgr_my_int FlashPoint_InterruptPending
47#define SccbMgr_isr FlashPoint_HandleInterrupt
48
49
50#define MAX_CDBLEN 12
51
52#define SCAM_LEV_2 1
53
54#define CRCMASK 0xA001 25#define CRCMASK 0xA001
55 26
56#define BL_VENDOR_ID 0x104B
57#define FP_DEVICE_ID 0x8130
58#define MM_DEVICE_ID 0x1040
59
60
61#define FAILURE 0xFFFFFFFFL 27#define FAILURE 0xFFFFFFFFL
62 28
63 29#define BIT(x) ((unsigned char)(1<<(x))) /* single-bit mask in bit position x */
64typedef unsigned char UCHAR; 30#define BITW(x) ((unsigned short)(1<<(x))) /* single-bit mask in bit position x */
65typedef unsigned short USHORT; 31
66typedef unsigned int UINT; 32struct sccb;
67typedef unsigned long ULONG; 33typedef void (*CALL_BK_FN) (struct sccb *);
68typedef unsigned char * PUCHAR; 34
69typedef unsigned short* PUSHORT; 35struct sccb_mgr_info {
70typedef unsigned long * PULONG; 36 unsigned long si_baseaddr;
71typedef void * PVOID; 37 unsigned char si_present;
72 38 unsigned char si_intvect;
73 39 unsigned char si_id;
74typedef unsigned char * uchar_ptr; 40 unsigned char si_lun;
75typedef unsigned short * ushort_ptr; 41 unsigned short si_fw_revision;
76typedef unsigned long * ulong_ptr; 42 unsigned short si_per_targ_init_sync;
77 43 unsigned short si_per_targ_fast_nego;
78 44 unsigned short si_per_targ_ultra_nego;
79#define s08bits char 45 unsigned short si_per_targ_no_disc;
80#define s16bits short 46 unsigned short si_per_targ_wide_nego;
81#define s32bits long 47 unsigned short si_flags;
82 48 unsigned char si_card_family;
83#define u08bits unsigned s08bits 49 unsigned char si_bustype;
84#define u16bits unsigned s16bits 50 unsigned char si_card_model[3];
85#define u32bits unsigned s32bits 51 unsigned char si_relative_cardnum;
86 52 unsigned char si_reserved[4];
87typedef u08bits * pu08bits; 53 unsigned long si_OS_reserved;
88typedef u16bits * pu16bits; 54 unsigned char si_XlatInfo[4];
89typedef u32bits * pu32bits; 55 unsigned long si_reserved2[5];
90 56 unsigned long si_secondary_range;
91 57};
92#define BIT(x) ((UCHAR)(1<<(x))) /* single-bit mask in bit position x */
93#define BITW(x) ((USHORT)(1<<(x))) /* single-bit mask in bit position x */
94
95
96
97
98typedef struct _SCCB *PSCCB;
99typedef void (*CALL_BK_FN)(PSCCB);
100
101
102typedef struct SCCBMgr_info {
103 ULONG si_baseaddr;
104 UCHAR si_present;
105 UCHAR si_intvect;
106 UCHAR si_id;
107 UCHAR si_lun;
108 USHORT si_fw_revision;
109 USHORT si_per_targ_init_sync;
110 USHORT si_per_targ_fast_nego;
111 USHORT si_per_targ_ultra_nego;
112 USHORT si_per_targ_no_disc;
113 USHORT si_per_targ_wide_nego;
114 USHORT si_flags;
115 UCHAR si_card_family;
116 UCHAR si_bustype;
117 UCHAR si_card_model[3];
118 UCHAR si_relative_cardnum;
119 UCHAR si_reserved[4];
120 ULONG si_OS_reserved;
121 UCHAR si_XlatInfo[4];
122 ULONG si_reserved2[5];
123 ULONG si_secondary_range;
124} SCCBMGR_INFO;
125
126typedef SCCBMGR_INFO * PSCCBMGR_INFO;
127
128 58
129#define SCSI_PARITY_ENA 0x0001 59#define SCSI_PARITY_ENA 0x0001
130#define LOW_BYTE_TERM 0x0010 60#define LOW_BYTE_TERM 0x0010
@@ -138,107 +68,81 @@ typedef SCCBMGR_INFO * PSCCBMGR_INFO;
138#define FLAG_SCAM_ENABLED 0x0080 68#define FLAG_SCAM_ENABLED 0x0080
139#define FLAG_SCAM_LEVEL2 0x0100 69#define FLAG_SCAM_LEVEL2 0x0100
140 70
141
142
143
144#define HARPOON_FAMILY 0x02 71#define HARPOON_FAMILY 0x02
145 72
146
147#define ISA_BUS_CARD 0x01
148#define EISA_BUS_CARD 0x02
149#define PCI_BUS_CARD 0x03
150#define VESA_BUS_CARD 0x04
151
152/* SCCB struct used for both SCCB and UCB manager compiles! 73/* SCCB struct used for both SCCB and UCB manager compiles!
153 * The UCB Manager treats the SCCB as it's 'native hardware structure' 74 * The UCB Manager treats the SCCB as it's 'native hardware structure'
154 */ 75 */
155 76
156
157#pragma pack(1) 77#pragma pack(1)
158typedef struct _SCCB { 78struct sccb {
159 UCHAR OperationCode; 79 unsigned char OperationCode;
160 UCHAR ControlByte; 80 unsigned char ControlByte;
161 UCHAR CdbLength; 81 unsigned char CdbLength;
162 UCHAR RequestSenseLength; 82 unsigned char RequestSenseLength;
163 ULONG DataLength; 83 unsigned long DataLength;
164 ULONG DataPointer; 84 unsigned long DataPointer;
165 UCHAR CcbRes[2]; 85 unsigned char CcbRes[2];
166 UCHAR HostStatus; 86 unsigned char HostStatus;
167 UCHAR TargetStatus; 87 unsigned char TargetStatus;
168 UCHAR TargID; 88 unsigned char TargID;
169 UCHAR Lun; 89 unsigned char Lun;
170 UCHAR Cdb[12]; 90 unsigned char Cdb[12];
171 UCHAR CcbRes1; 91 unsigned char CcbRes1;
172 UCHAR Reserved1; 92 unsigned char Reserved1;
173 ULONG Reserved2; 93 unsigned long Reserved2;
174 ULONG SensePointer; 94 unsigned long SensePointer;
175 95
176 96 CALL_BK_FN SccbCallback; /* VOID (*SccbCallback)(); */
177 CALL_BK_FN SccbCallback; /* VOID (*SccbCallback)(); */ 97 unsigned long SccbIOPort; /* Identifies board base port */
178 ULONG SccbIOPort; /* Identifies board base port */ 98 unsigned char SccbStatus;
179 UCHAR SccbStatus; 99 unsigned char SCCBRes2;
180 UCHAR SCCBRes2; 100 unsigned short SccbOSFlags;
181 USHORT SccbOSFlags; 101
182 102 unsigned long Sccb_XferCnt; /* actual transfer count */
183 103 unsigned long Sccb_ATC;
184 ULONG Sccb_XferCnt; /* actual transfer count */ 104 unsigned long SccbVirtDataPtr; /* virtual addr for OS/2 */
185 ULONG Sccb_ATC; 105 unsigned long Sccb_res1;
186 ULONG SccbVirtDataPtr; /* virtual addr for OS/2 */ 106 unsigned short Sccb_MGRFlags;
187 ULONG Sccb_res1; 107 unsigned short Sccb_sgseg;
188 USHORT Sccb_MGRFlags; 108 unsigned char Sccb_scsimsg; /* identify msg for selection */
189 USHORT Sccb_sgseg; 109 unsigned char Sccb_tag;
190 UCHAR Sccb_scsimsg; /* identify msg for selection */ 110 unsigned char Sccb_scsistat;
191 UCHAR Sccb_tag; 111 unsigned char Sccb_idmsg; /* image of last msg in */
192 UCHAR Sccb_scsistat; 112 struct sccb *Sccb_forwardlink;
193 UCHAR Sccb_idmsg; /* image of last msg in */ 113 struct sccb *Sccb_backlink;
194 PSCCB Sccb_forwardlink; 114 unsigned long Sccb_savedATC;
195 PSCCB Sccb_backlink; 115 unsigned char Save_Cdb[6];
196 ULONG Sccb_savedATC; 116 unsigned char Save_CdbLen;
197 UCHAR Save_Cdb[6]; 117 unsigned char Sccb_XferState;
198 UCHAR Save_CdbLen; 118 unsigned long Sccb_SGoffset;
199 UCHAR Sccb_XferState; 119};
200 ULONG Sccb_SGoffset;
201 } SCCB;
202
203#define SCCB_SIZE sizeof(SCCB)
204 120
205#pragma pack() 121#pragma pack()
206 122
207
208
209#define SCSI_INITIATOR_COMMAND 0x00
210#define TARGET_MODE_COMMAND 0x01
211#define SCATTER_GATHER_COMMAND 0x02 123#define SCATTER_GATHER_COMMAND 0x02
212#define RESIDUAL_COMMAND 0x03 124#define RESIDUAL_COMMAND 0x03
213#define RESIDUAL_SG_COMMAND 0x04 125#define RESIDUAL_SG_COMMAND 0x04
214#define RESET_COMMAND 0x81 126#define RESET_COMMAND 0x81
215 127
128#define F_USE_CMD_Q 0x20 /*Inidcates TAGGED command. */
129#define TAG_TYPE_MASK 0xC0 /*Type of tag msg to send. */
130#define SCCB_DATA_XFER_OUT 0x10 /* Write */
131#define SCCB_DATA_XFER_IN 0x08 /* Read */
216 132
217#define F_USE_CMD_Q 0x20 /*Inidcates TAGGED command. */ 133#define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */
218#define TAG_TYPE_MASK 0xC0 /*Type of tag msg to send. */
219#define TAG_Q_MASK 0xE0
220#define SCCB_DATA_XFER_OUT 0x10 /* Write */
221#define SCCB_DATA_XFER_IN 0x08 /* Read */
222 134
223 135#define BUS_FREE_ST 0
224#define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */
225#define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */
226
227
228#define BUS_FREE_ST 0
229#define SELECT_ST 1 136#define SELECT_ST 1
230#define SELECT_BDR_ST 2 /* Select w\ Bus Device Reset */ 137#define SELECT_BDR_ST 2 /* Select w\ Bus Device Reset */
231#define SELECT_SN_ST 3 /* Select w\ Sync Nego */ 138#define SELECT_SN_ST 3 /* Select w\ Sync Nego */
232#define SELECT_WN_ST 4 /* Select w\ Wide Data Nego */ 139#define SELECT_WN_ST 4 /* Select w\ Wide Data Nego */
233#define SELECT_Q_ST 5 /* Select w\ Tagged Q'ing */ 140#define SELECT_Q_ST 5 /* Select w\ Tagged Q'ing */
234#define COMMAND_ST 6 141#define COMMAND_ST 6
235#define DATA_OUT_ST 7 142#define DATA_OUT_ST 7
236#define DATA_IN_ST 8 143#define DATA_IN_ST 8
237#define DISCONNECT_ST 9 144#define DISCONNECT_ST 9
238#define STATUS_ST 10
239#define ABORT_ST 11 145#define ABORT_ST 11
240#define MESSAGE_ST 12
241
242 146
243#define F_HOST_XFER_DIR 0x01 147#define F_HOST_XFER_DIR 0x01
244#define F_ALL_XFERRED 0x02 148#define F_ALL_XFERRED 0x02
@@ -247,163 +151,115 @@ typedef struct _SCCB {
247#define F_ODD_BALL_CNT 0x10 151#define F_ODD_BALL_CNT 0x10
248#define F_NO_DATA_YET 0x80 152#define F_NO_DATA_YET 0x80
249 153
250
251#define F_STATUSLOADED 0x01 154#define F_STATUSLOADED 0x01
252#define F_MSGLOADED 0x02
253#define F_DEV_SELECTED 0x04 155#define F_DEV_SELECTED 0x04
254 156
255 157#define SCCB_COMPLETE 0x00 /* SCCB completed without error */
256#define SCCB_COMPLETE 0x00 /* SCCB completed without error */
257#define SCCB_DATA_UNDER_RUN 0x0C 158#define SCCB_DATA_UNDER_RUN 0x0C
258#define SCCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */ 159#define SCCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */
259#define SCCB_DATA_OVER_RUN 0x12 160#define SCCB_DATA_OVER_RUN 0x12
260#define SCCB_UNEXPECTED_BUS_FREE 0x13 /* Target dropped SCSI BSY */ 161#define SCCB_PHASE_SEQUENCE_FAIL 0x14 /* Target bus phase sequence failure */
261#define SCCB_PHASE_SEQUENCE_FAIL 0x14 /* Target bus phase sequence failure */
262
263#define SCCB_INVALID_OP_CODE 0x16 /* SCCB invalid operation code */
264#define SCCB_INVALID_SCCB 0x1A /* Invalid SCCB - bad parameter */
265#define SCCB_GROSS_FW_ERR 0x27 /* Major problem! */
266#define SCCB_BM_ERR 0x30 /* BusMaster error. */
267#define SCCB_PARITY_ERR 0x34 /* SCSI parity error */
268
269
270
271#define SCCB_INVALID_DIRECTION 0x18 /* Invalid target direction */
272#define SCCB_DUPLICATE_SCCB 0x19 /* Duplicate SCCB */
273#define SCCB_SCSI_RST 0x35 /* SCSI RESET detected. */
274 162
163#define SCCB_GROSS_FW_ERR 0x27 /* Major problem! */
164#define SCCB_BM_ERR 0x30 /* BusMaster error. */
165#define SCCB_PARITY_ERR 0x34 /* SCSI parity error */
275 166
276#define SCCB_IN_PROCESS 0x00 167#define SCCB_IN_PROCESS 0x00
277#define SCCB_SUCCESS 0x01 168#define SCCB_SUCCESS 0x01
278#define SCCB_ABORT 0x02 169#define SCCB_ABORT 0x02
279#define SCCB_NOT_FOUND 0x03
280#define SCCB_ERROR 0x04 170#define SCCB_ERROR 0x04
281#define SCCB_INVALID 0x05
282
283#define SCCB_SIZE sizeof(SCCB)
284
285 171
286#define ORION_FW_REV 3110 172#define ORION_FW_REV 3110
287 173
288#define HARP_REVD 1 174#define QUEUE_DEPTH 254+1 /*1 for Normal disconnect 32 for Q'ing. */
289
290
291#define QUEUE_DEPTH 254+1 /*1 for Normal disconnect 32 for Q'ing. */
292 175
293#define MAX_MB_CARDS 4 /* Max. no of cards suppoerted on Mother Board */ 176#define MAX_MB_CARDS 4 /* Max. no of cards suppoerted on Mother Board */
294
295#define WIDE_SCSI 1
296 177
297#define MAX_SCSI_TAR 16 178#define MAX_SCSI_TAR 16
298#define MAX_LUN 32 179#define MAX_LUN 32
299#define LUN_MASK 0x1f 180#define LUN_MASK 0x1f
300 181
301#if defined(HARP_REVA) 182#define SG_BUF_CNT 16 /*Number of prefetched elements. */
302#define SG_BUF_CNT 15 /*Number of prefetched elements. */
303#else
304#define SG_BUF_CNT 16 /*Number of prefetched elements. */
305#endif
306
307#define SG_ELEMENT_SIZE 8 /*Eight byte per element. */
308#define SG_LOCAL_MASK 0x00000000L
309#define SG_ELEMENT_MASK 0xFFFFFFFFL
310
311 183
312#define RD_HARPOON(ioport) OS_InPortByte((u32bits)ioport) 184#define SG_ELEMENT_SIZE 8 /*Eight byte per element. */
313#define RDW_HARPOON(ioport) OS_InPortWord((u32bits)ioport)
314#define RD_HARP32(ioport,offset,data) (data = OS_InPortLong((u32bits)(ioport + offset)))
315#define WR_HARPOON(ioport,val) OS_OutPortByte((u32bits)ioport,(u08bits) val)
316#define WRW_HARPOON(ioport,val) OS_OutPortWord((u32bits)ioport,(u16bits)val)
317#define WR_HARP32(ioport,offset,data) OS_OutPortLong((u32bits)(ioport + offset), data)
318 185
186#define RD_HARPOON(ioport) inb((u32)ioport)
187#define RDW_HARPOON(ioport) inw((u32)ioport)
188#define RD_HARP32(ioport,offset,data) (data = inl((u32)(ioport + offset)))
189#define WR_HARPOON(ioport,val) outb((u8) val, (u32)ioport)
190#define WRW_HARPOON(ioport,val) outw((u16)val, (u32)ioport)
191#define WR_HARP32(ioport,offset,data) outl(data, (u32)(ioport + offset))
319 192
320#define TAR_SYNC_MASK (BIT(7)+BIT(6)) 193#define TAR_SYNC_MASK (BIT(7)+BIT(6))
321#define SYNC_UNKNOWN 0x00
322#define SYNC_TRYING BIT(6) 194#define SYNC_TRYING BIT(6)
323#define SYNC_SUPPORTED (BIT(7)+BIT(6)) 195#define SYNC_SUPPORTED (BIT(7)+BIT(6))
324 196
325#define TAR_WIDE_MASK (BIT(5)+BIT(4)) 197#define TAR_WIDE_MASK (BIT(5)+BIT(4))
326#define WIDE_DISABLED 0x00
327#define WIDE_ENABLED BIT(4) 198#define WIDE_ENABLED BIT(4)
328#define WIDE_NEGOCIATED BIT(5) 199#define WIDE_NEGOCIATED BIT(5)
329 200
330#define TAR_TAG_Q_MASK (BIT(3)+BIT(2)) 201#define TAR_TAG_Q_MASK (BIT(3)+BIT(2))
331#define TAG_Q_UNKNOWN 0x00
332#define TAG_Q_TRYING BIT(2) 202#define TAG_Q_TRYING BIT(2)
333#define TAG_Q_REJECT BIT(3) 203#define TAG_Q_REJECT BIT(3)
334#define TAG_Q_SUPPORTED (BIT(3)+BIT(2))
335 204
336#define TAR_ALLOW_DISC BIT(0) 205#define TAR_ALLOW_DISC BIT(0)
337 206
338
339#define EE_SYNC_MASK (BIT(0)+BIT(1)) 207#define EE_SYNC_MASK (BIT(0)+BIT(1))
340#define EE_SYNC_ASYNC 0x00
341#define EE_SYNC_5MB BIT(0) 208#define EE_SYNC_5MB BIT(0)
342#define EE_SYNC_10MB BIT(1) 209#define EE_SYNC_10MB BIT(1)
343#define EE_SYNC_20MB (BIT(0)+BIT(1)) 210#define EE_SYNC_20MB (BIT(0)+BIT(1))
344 211
345#define EE_ALLOW_DISC BIT(6)
346#define EE_WIDE_SCSI BIT(7) 212#define EE_WIDE_SCSI BIT(7)
347 213
348 214struct sccb_mgr_tar_info {
349typedef struct SCCBMgr_tar_info *PSCCBMgr_tar_info; 215
350 216 struct sccb *TarSelQ_Head;
351 217 struct sccb *TarSelQ_Tail;
352typedef struct SCCBMgr_tar_info { 218 unsigned char TarLUN_CA; /*Contingent Allgiance */
353 219 unsigned char TarTagQ_Cnt;
354 PSCCB TarSelQ_Head; 220 unsigned char TarSelQ_Cnt;
355 PSCCB TarSelQ_Tail; 221 unsigned char TarStatus;
356 UCHAR TarLUN_CA; /*Contingent Allgiance */ 222 unsigned char TarEEValue;
357 UCHAR TarTagQ_Cnt; 223 unsigned char TarSyncCtrl;
358 UCHAR TarSelQ_Cnt; 224 unsigned char TarReserved[2]; /* for alignment */
359 UCHAR TarStatus; 225 unsigned char LunDiscQ_Idx[MAX_LUN];
360 UCHAR TarEEValue; 226 unsigned char TarLUNBusy[MAX_LUN];
361 UCHAR TarSyncCtrl; 227};
362 UCHAR TarReserved[2]; /* for alignment */ 228
363 UCHAR LunDiscQ_Idx[MAX_LUN]; 229struct nvram_info {
364 UCHAR TarLUNBusy[MAX_LUN]; 230 unsigned char niModel; /* Model No. of card */
365} SCCBMGR_TAR_INFO; 231 unsigned char niCardNo; /* Card no. */
366 232 unsigned long niBaseAddr; /* Port Address of card */
367typedef struct NVRAMInfo { 233 unsigned char niSysConf; /* Adapter Configuration byte - Byte 16 of eeprom map */
368 UCHAR niModel; /* Model No. of card */ 234 unsigned char niScsiConf; /* SCSI Configuration byte - Byte 17 of eeprom map */
369 UCHAR niCardNo; /* Card no. */ 235 unsigned char niScamConf; /* SCAM Configuration byte - Byte 20 of eeprom map */
370 ULONG niBaseAddr; /* Port Address of card */ 236 unsigned char niAdapId; /* Host Adapter ID - Byte 24 of eerpom map */
371 UCHAR niSysConf; /* Adapter Configuration byte - Byte 16 of eeprom map */ 237 unsigned char niSyncTbl[MAX_SCSI_TAR / 2]; /* Sync/Wide byte of targets */
372 UCHAR niScsiConf; /* SCSI Configuration byte - Byte 17 of eeprom map */ 238 unsigned char niScamTbl[MAX_SCSI_TAR][4]; /* Compressed Scam name string of Targets */
373 UCHAR niScamConf; /* SCAM Configuration byte - Byte 20 of eeprom map */ 239};
374 UCHAR niAdapId; /* Host Adapter ID - Byte 24 of eerpom map */
375 UCHAR niSyncTbl[MAX_SCSI_TAR / 2]; /* Sync/Wide byte of targets */
376 UCHAR niScamTbl[MAX_SCSI_TAR][4]; /* Compressed Scam name string of Targets */
377}NVRAMINFO;
378
379typedef NVRAMINFO *PNVRamInfo;
380 240
381#define MODEL_LT 1 241#define MODEL_LT 1
382#define MODEL_DL 2 242#define MODEL_DL 2
383#define MODEL_LW 3 243#define MODEL_LW 3
384#define MODEL_DW 4 244#define MODEL_DW 4
385 245
246struct sccb_card {
247 struct sccb *currentSCCB;
248 struct sccb_mgr_info *cardInfo;
386 249
387typedef struct SCCBcard { 250 unsigned long ioPort;
388 PSCCB currentSCCB;
389 PSCCBMGR_INFO cardInfo;
390
391 ULONG ioPort;
392
393 USHORT cmdCounter;
394 UCHAR discQCount;
395 UCHAR tagQ_Lst;
396 UCHAR cardIndex;
397 UCHAR scanIndex;
398 UCHAR globalFlags;
399 UCHAR ourId;
400 PNVRamInfo pNvRamInfo;
401 PSCCB discQ_Tbl[QUEUE_DEPTH];
402
403}SCCBCARD;
404 251
405typedef struct SCCBcard *PSCCBcard; 252 unsigned short cmdCounter;
253 unsigned char discQCount;
254 unsigned char tagQ_Lst;
255 unsigned char cardIndex;
256 unsigned char scanIndex;
257 unsigned char globalFlags;
258 unsigned char ourId;
259 struct nvram_info *pNvRamInfo;
260 struct sccb *discQ_Tbl[QUEUE_DEPTH];
406 261
262};
407 263
408#define F_TAG_STARTED 0x01 264#define F_TAG_STARTED 0x01
409#define F_CONLUN_IO 0x02 265#define F_CONLUN_IO 0x02
@@ -414,13 +270,10 @@ typedef struct SCCBcard *PSCCBcard;
414#define F_NEW_SCCB_CMD 0x40 270#define F_NEW_SCCB_CMD 0x40
415#define F_UPDATE_EEPROM 0x80 271#define F_UPDATE_EEPROM 0x80
416 272
417
418#define ID_STRING_LENGTH 32 273#define ID_STRING_LENGTH 32
419#define TYPE_CODE0 0x63 /*Level2 Mstr (bits 7-6), */ 274#define TYPE_CODE0 0x63 /*Level2 Mstr (bits 7-6), */
420
421#define TYPE_CODE1 00 /*No ID yet */
422 275
423#define SLV_TYPE_CODE0 0xA3 /*Priority Bit set (bits 7-6), */ 276#define SLV_TYPE_CODE0 0xA3 /*Priority Bit set (bits 7-6), */
424 277
425#define ASSIGN_ID 0x00 278#define ASSIGN_ID 0x00
426#define SET_P_FLAG 0x01 279#define SET_P_FLAG 0x01
@@ -430,97 +283,42 @@ typedef struct SCCBcard *PSCCBcard;
430 283
431#define ID_0_7 0x18 284#define ID_0_7 0x18
432#define ID_8_F 0x11 285#define ID_8_F 0x11
433#define ID_10_17 0x12
434#define ID_18_1F 0x0B
435#define MISC_CODE 0x14 286#define MISC_CODE 0x14
436#define CLR_P_FLAG 0x18 287#define CLR_P_FLAG 0x18
437#define LOCATE_ON 0x12
438#define LOCATE_OFF 0x0B
439
440#define LVL_1_MST 0x00
441#define LVL_2_MST 0x40
442#define DOM_LVL_2 0xC0
443
444 288
445#define INIT_SELTD 0x01 289#define INIT_SELTD 0x01
446#define LEVEL2_TAR 0x02 290#define LEVEL2_TAR 0x02
447 291
448 292enum scam_id_st { ID0, ID1, ID2, ID3, ID4, ID5, ID6, ID7, ID8, ID9, ID10, ID11,
449enum scam_id_st { ID0,ID1,ID2,ID3,ID4,ID5,ID6,ID7,ID8,ID9,ID10,ID11,ID12, 293 ID12,
450 ID13,ID14,ID15,ID_UNUSED,ID_UNASSIGNED,ID_ASSIGNED,LEGACY, 294 ID13, ID14, ID15, ID_UNUSED, ID_UNASSIGNED, ID_ASSIGNED, LEGACY,
451 CLR_PRIORITY,NO_ID_AVAIL }; 295 CLR_PRIORITY, NO_ID_AVAIL
296};
452 297
453typedef struct SCCBscam_info { 298typedef struct SCCBscam_info {
454 299
455 UCHAR id_string[ID_STRING_LENGTH]; 300 unsigned char id_string[ID_STRING_LENGTH];
456 enum scam_id_st state; 301 enum scam_id_st state;
457
458} SCCBSCAM_INFO, *PSCCBSCAM_INFO;
459 302
303} SCCBSCAM_INFO;
460 304
461#define SCSI_TEST_UNIT_READY 0x00
462#define SCSI_REZERO_UNIT 0x01
463#define SCSI_REQUEST_SENSE 0x03 305#define SCSI_REQUEST_SENSE 0x03
464#define SCSI_FORMAT_UNIT 0x04
465#define SCSI_REASSIGN 0x07
466#define SCSI_READ 0x08 306#define SCSI_READ 0x08
467#define SCSI_WRITE 0x0A 307#define SCSI_WRITE 0x0A
468#define SCSI_SEEK 0x0B
469#define SCSI_INQUIRY 0x12
470#define SCSI_MODE_SELECT 0x15
471#define SCSI_RESERVE_UNIT 0x16
472#define SCSI_RELEASE_UNIT 0x17
473#define SCSI_MODE_SENSE 0x1A
474#define SCSI_START_STOP_UNIT 0x1B 308#define SCSI_START_STOP_UNIT 0x1B
475#define SCSI_SEND_DIAGNOSTIC 0x1D
476#define SCSI_READ_CAPACITY 0x25
477#define SCSI_READ_EXTENDED 0x28 309#define SCSI_READ_EXTENDED 0x28
478#define SCSI_WRITE_EXTENDED 0x2A 310#define SCSI_WRITE_EXTENDED 0x2A
479#define SCSI_SEEK_EXTENDED 0x2B
480#define SCSI_WRITE_AND_VERIFY 0x2E 311#define SCSI_WRITE_AND_VERIFY 0x2E
481#define SCSI_VERIFY 0x2F
482#define SCSI_READ_DEFECT_DATA 0x37
483#define SCSI_WRITE_BUFFER 0x3B
484#define SCSI_READ_BUFFER 0x3C
485#define SCSI_RECV_DIAGNOSTIC 0x1C
486#define SCSI_READ_LONG 0x3E
487#define SCSI_WRITE_LONG 0x3F
488#define SCSI_LAST_SCSI_CMND SCSI_WRITE_LONG
489#define SCSI_INVALID_CMND 0xFF
490
491
492 312
493#define SSGOOD 0x00 313#define SSGOOD 0x00
494#define SSCHECK 0x02 314#define SSCHECK 0x02
495#define SSCOND_MET 0x04
496#define SSBUSY 0x08
497#define SSRESERVATION_CONFLICT 0x18
498#define SSCMD_TERM 0x22
499#define SSQ_FULL 0x28 315#define SSQ_FULL 0x28
500 316
501
502#define SKNO_SEN 0x00
503#define SKRECOV_ERR 0x01
504#define SKNOT_RDY 0x02
505#define SKMED_ERR 0x03
506#define SKHW_ERR 0x04
507#define SKILL_REQ 0x05
508#define SKUNIT_ATTN 0x06
509#define SKDATA_PROTECT 0x07
510#define SKBLNK_CHK 0x08
511#define SKCPY_ABORT 0x0A
512#define SKABORT_CMD 0x0B
513#define SKEQUAL 0x0C
514#define SKVOL_OVF 0x0D
515#define SKMIS_CMP 0x0E
516
517
518#define SMCMD_COMP 0x00 317#define SMCMD_COMP 0x00
519#define SMEXT 0x01 318#define SMEXT 0x01
520#define SMSAVE_DATA_PTR 0x02 319#define SMSAVE_DATA_PTR 0x02
521#define SMREST_DATA_PTR 0x03 320#define SMREST_DATA_PTR 0x03
522#define SMDISC 0x04 321#define SMDISC 0x04
523#define SMINIT_DETEC_ERR 0x05
524#define SMABORT 0x06 322#define SMABORT 0x06
525#define SMREJECT 0x07 323#define SMREJECT 0x07
526#define SMNO_OP 0x08 324#define SMNO_OP 0x08
@@ -533,62 +331,31 @@ typedef struct SCCBscam_info {
533#define SMIDENT 0x80 331#define SMIDENT 0x80
534#define DISC_PRIV 0x40 332#define DISC_PRIV 0x40
535 333
536
537#define SMSYNC 0x01 334#define SMSYNC 0x01
538#define SM10MBS 0x19 /* 100ns */
539#define SM5MBS 0x32 /* 200ns */
540#define SMOFFSET 0x0F /* Maxoffset value */
541#define SMWDTR 0x03 335#define SMWDTR 0x03
542#define SM8BIT 0x00 336#define SM8BIT 0x00
543#define SM16BIT 0x01 337#define SM16BIT 0x01
544#define SM32BIT 0x02 338#define SMIGNORWR 0x23 /* Ignore Wide Residue */
545#define SMIGNORWR 0x23 /* Ignore Wide Residue */
546
547
548#define ARBITRATION_DELAY 0x01 /* 2.4us using a 40Mhz clock */
549#define BUS_SETTLE_DELAY 0x01 /* 400ns */
550#define BUS_CLEAR_DELAY 0x01 /* 800ns */
551
552
553
554#define SPHASE_TO 0x0A /* 10 second timeout waiting for */
555#define SCMD_TO 0x0F /* Overall command timeout */
556
557
558 339
559#define SIX_BYTE_CMD 0x06 340#define SIX_BYTE_CMD 0x06
560#define TEN_BYTE_CMD 0x0A
561#define TWELVE_BYTE_CMD 0x0C 341#define TWELVE_BYTE_CMD 0x0C
562 342
563#define ASYNC 0x00 343#define ASYNC 0x00
564#define PERI25NS 0x06 /* 25/4ns to next clock for xbow. */ 344#define MAX_OFFSET 0x0F /* Maxbyteoffset for Sync Xfers */
565#define SYNC10MBS 0x19
566#define SYNC5MBS 0x32
567#define MAX_OFFSET 0x0F /* Maxbyteoffset for Sync Xfers */
568
569 345
570#define EEPROM_WD_CNT 256 346#define EEPROM_WD_CNT 256
571 347
572#define EEPROM_CHECK_SUM 0 348#define EEPROM_CHECK_SUM 0
573#define FW_SIGNATURE 2 349#define FW_SIGNATURE 2
574#define MODEL_NUMB_0 4 350#define MODEL_NUMB_0 4
575#define MODEL_NUMB_1 5
576#define MODEL_NUMB_2 6 351#define MODEL_NUMB_2 6
577#define MODEL_NUMB_3 7
578#define MODEL_NUMB_4 8 352#define MODEL_NUMB_4 8
579#define MODEL_NUMB_5 9
580#define IO_BASE_ADDR 10
581#define IRQ_NUMBER 12
582#define PCI_INT_PIN 13
583#define BUS_DELAY 14 /*On time in byte 14 off delay in 15 */
584#define SYSTEM_CONFIG 16 353#define SYSTEM_CONFIG 16
585#define SCSI_CONFIG 17 354#define SCSI_CONFIG 17
586#define BIOS_CONFIG 18 355#define BIOS_CONFIG 18
587#define SPIN_UP_DELAY 19
588#define SCAM_CONFIG 20 356#define SCAM_CONFIG 20
589#define ADAPTER_SCSI_ID 24 357#define ADAPTER_SCSI_ID 24
590 358
591
592#define IGNORE_B_SCAN 32 359#define IGNORE_B_SCAN 32
593#define SEND_START_ENA 34 360#define SEND_START_ENA 34
594#define DEVICE_ENABLE 36 361#define DEVICE_ENABLE 36
@@ -603,717 +370,405 @@ typedef struct SCCBscam_info {
603#define SYNC_RATE_TBLcd 50 370#define SYNC_RATE_TBLcd 50
604#define SYNC_RATE_TBLef 52 371#define SYNC_RATE_TBLef 52
605 372
373#define EE_SCAMBASE 256
606 374
375#define SCAM_ENABLED BIT(2)
376#define SCAM_LEVEL2 BIT(3)
607 377
608#define EE_SCAMBASE 256 378#define RENEGO_ENA BITW(10)
609 379#define CONNIO_ENA BITW(11)
610 380#define GREEN_PC_ENA BITW(12)
611
612 #define DOM_MASTER (BIT(0) + BIT(1))
613 #define SCAM_ENABLED BIT(2)
614 #define SCAM_LEVEL2 BIT(3)
615
616 381
617 #define RENEGO_ENA BITW(10) 382#define AUTO_RATE_00 00
618 #define CONNIO_ENA BITW(11) 383#define AUTO_RATE_05 01
619 #define GREEN_PC_ENA BITW(12) 384#define AUTO_RATE_10 02
385#define AUTO_RATE_20 03
620 386
387#define WIDE_NEGO_BIT BIT(7)
388#define DISC_ENABLE_BIT BIT(6)
621 389
622 #define AUTO_RATE_00 00 390#define hp_vendor_id_0 0x00 /* LSB */
623 #define AUTO_RATE_05 01 391#define ORION_VEND_0 0x4B
624 #define AUTO_RATE_10 02
625 #define AUTO_RATE_20 03
626 392
627 #define WIDE_NEGO_BIT BIT(7) 393#define hp_vendor_id_1 0x01 /* MSB */
628 #define DISC_ENABLE_BIT BIT(6) 394#define ORION_VEND_1 0x10
629 395
396#define hp_device_id_0 0x02 /* LSB */
397#define ORION_DEV_0 0x30
630 398
631 399#define hp_device_id_1 0x03 /* MSB */
632 #define hp_vendor_id_0 0x00 /* LSB */ 400#define ORION_DEV_1 0x81
633 #define ORION_VEND_0 0x4B
634
635 #define hp_vendor_id_1 0x01 /* MSB */
636 #define ORION_VEND_1 0x10
637
638 #define hp_device_id_0 0x02 /* LSB */
639 #define ORION_DEV_0 0x30
640
641 #define hp_device_id_1 0x03 /* MSB */
642 #define ORION_DEV_1 0x81
643 401
644 /* Sub Vendor ID and Sub Device ID only available in 402 /* Sub Vendor ID and Sub Device ID only available in
645 Harpoon Version 2 and higher */ 403 Harpoon Version 2 and higher */
646
647 #define hp_sub_vendor_id_0 0x04 /* LSB */
648 #define hp_sub_vendor_id_1 0x05 /* MSB */
649 #define hp_sub_device_id_0 0x06 /* LSB */
650 #define hp_sub_device_id_1 0x07 /* MSB */
651
652
653 #define hp_dual_addr_lo 0x08
654 #define hp_dual_addr_lmi 0x09
655 #define hp_dual_addr_hmi 0x0A
656 #define hp_dual_addr_hi 0x0B
657
658 #define hp_semaphore 0x0C
659 #define SCCB_MGR_ACTIVE BIT(0)
660 #define TICKLE_ME BIT(1)
661 #define SCCB_MGR_PRESENT BIT(3)
662 #define BIOS_IN_USE BIT(4)
663
664 #define hp_user_defined_D 0x0D
665
666 #define hp_reserved_E 0x0E
667
668 #define hp_sys_ctrl 0x0F
669
670 #define STOP_CLK BIT(0) /*Turn off BusMaster Clock */
671 #define DRVR_RST BIT(1) /*Firmware Reset to 80C15 chip */
672 #define HALT_MACH BIT(3) /*Halt State Machine */
673 #define HARD_ABORT BIT(4) /*Hard Abort */
674 #define DIAG_MODE BIT(5) /*Diagnostic Mode */
675
676 #define BM_ABORT_TMOUT 0x50 /*Halt State machine time out */
677
678 #define hp_sys_cfg 0x10
679
680 #define DONT_RST_FIFO BIT(7) /*Don't reset FIFO */
681
682
683 #define hp_host_ctrl0 0x11
684
685 #define DUAL_ADDR_MODE BIT(0) /*Enable 64-bit addresses */
686 #define IO_MEM_SPACE BIT(1) /*I/O Memory Space */
687 #define RESOURCE_LOCK BIT(2) /*Enable Resource Lock */
688 #define IGNOR_ACCESS_ERR BIT(3) /*Ignore Access Error */
689 #define HOST_INT_EDGE BIT(4) /*Host interrupt level/edge mode sel */
690 #define SIX_CLOCKS BIT(5) /*6 Clocks between Strobe */
691 #define DMA_EVEN_PARITY BIT(6) /*Enable DMA Enen Parity */
692
693/*
694 #define BURST_MODE BIT(0)
695*/
696
697 #define hp_reserved_12 0x12
698
699 #define hp_host_blk_cnt 0x13
700
701 #define XFER_BLK1 0x00 /* 0 0 0 1 byte per block*/
702 #define XFER_BLK2 0x01 /* 0 0 1 2 byte per block*/
703 #define XFER_BLK4 0x02 /* 0 1 0 4 byte per block*/
704 #define XFER_BLK8 0x03 /* 0 1 1 8 byte per block*/
705 #define XFER_BLK16 0x04 /* 1 0 0 16 byte per block*/
706 #define XFER_BLK32 0x05 /* 1 0 1 32 byte per block*/
707 #define XFER_BLK64 0x06 /* 1 1 0 64 byte per block*/
708
709 #define BM_THRESHOLD 0x40 /* PCI mode can only xfer 16 bytes*/
710 404
405#define hp_sub_device_id_0 0x06 /* LSB */
711 406
712 #define hp_reserved_14 0x14 407#define hp_semaphore 0x0C
713 #define hp_reserved_15 0x15 408#define SCCB_MGR_ACTIVE BIT(0)
714 #define hp_reserved_16 0x16 409#define TICKLE_ME BIT(1)
410#define SCCB_MGR_PRESENT BIT(3)
411#define BIOS_IN_USE BIT(4)
715 412
716 #define hp_int_mask 0x17 413#define hp_sys_ctrl 0x0F
717 414
718 #define INT_CMD_COMPL BIT(0) /* DMA command complete */ 415#define STOP_CLK BIT(0) /*Turn off BusMaster Clock */
719 #define INT_EXT_STATUS BIT(1) /* Extended Status Set */ 416#define DRVR_RST BIT(1) /*Firmware Reset to 80C15 chip */
720 #define INT_SCSI BIT(2) /* Scsi block interrupt */ 417#define HALT_MACH BIT(3) /*Halt State Machine */
721 #define INT_FIFO_RDY BIT(4) /* FIFO data ready */ 418#define HARD_ABORT BIT(4) /*Hard Abort */
722 419
420#define hp_host_blk_cnt 0x13
723 421
724 #define hp_xfer_cnt_lo 0x18 422#define XFER_BLK64 0x06 /* 1 1 0 64 byte per block */
725 #define hp_xfer_cnt_mi 0x19
726 #define hp_xfer_cnt_hi 0x1A
727 #define hp_xfer_cmd 0x1B
728 423
729 #define XFER_HOST_DMA 0x00 /* 0 0 0 Transfer Host -> DMA */ 424#define BM_THRESHOLD 0x40 /* PCI mode can only xfer 16 bytes */
730 #define XFER_DMA_HOST 0x01 /* 0 0 1 Transfer DMA -> Host */
731 #define XFER_HOST_MPU 0x02 /* 0 1 0 Transfer Host -> MPU */
732 #define XFER_MPU_HOST 0x03 /* 0 1 1 Transfer MPU -> Host */
733 #define XFER_DMA_MPU 0x04 /* 1 0 0 Transfer DMA -> MPU */
734 #define XFER_MPU_DMA 0x05 /* 1 0 1 Transfer MPU -> DMA */
735 #define SET_SEMAPHORE 0x06 /* 1 1 0 Set Semaphore */
736 #define XFER_NOP 0x07 /* 1 1 1 Transfer NOP */
737 #define XFER_MB_MPU 0x06 /* 1 1 0 Transfer MB -> MPU */
738 #define XFER_MB_DMA 0x07 /* 1 1 1 Transfer MB -> DMA */
739 425
426#define hp_int_mask 0x17
740 427
741 #define XFER_HOST_AUTO 0x00 /* 0 0 Auto Transfer Size */ 428#define INT_CMD_COMPL BIT(0) /* DMA command complete */
742 #define XFER_HOST_8BIT 0x08 /* 0 1 8 BIT Transfer Size */ 429#define INT_EXT_STATUS BIT(1) /* Extended Status Set */
743 #define XFER_HOST_16BIT 0x10 /* 1 0 16 BIT Transfer Size */
744 #define XFER_HOST_32BIT 0x18 /* 1 1 32 BIT Transfer Size */
745 430
746 #define XFER_DMA_8BIT 0x20 /* 0 1 8 BIT Transfer Size */ 431#define hp_xfer_cnt_lo 0x18
747 #define XFER_DMA_16BIT 0x40 /* 1 0 16 BIT Transfer Size */ 432#define hp_xfer_cnt_hi 0x1A
433#define hp_xfer_cmd 0x1B
748 434
749 #define DISABLE_INT BIT(7) /*Do not interrupt at end of cmd. */ 435#define XFER_HOST_DMA 0x00 /* 0 0 0 Transfer Host -> DMA */
436#define XFER_DMA_HOST 0x01 /* 0 0 1 Transfer DMA -> Host */
750 437
751 #define HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_8BIT)) 438#define XFER_HOST_AUTO 0x00 /* 0 0 Auto Transfer Size */
752 #define HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_8BIT))
753 #define WIDE_HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_16BIT))
754 #define WIDE_HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_16BIT))
755 439
756 #define hp_host_addr_lo 0x1C 440#define XFER_DMA_8BIT 0x20 /* 0 1 8 BIT Transfer Size */
757 #define hp_host_addr_lmi 0x1D
758 #define hp_host_addr_hmi 0x1E
759 #define hp_host_addr_hi 0x1F
760 441
761 #define hp_pio_data 0x20 442#define DISABLE_INT BIT(7) /*Do not interrupt at end of cmd. */
762 #define hp_reserved_21 0x21
763 #define hp_ee_ctrl 0x22
764 443
765 #define EXT_ARB_ACK BIT(7) 444#define HOST_WRT_CMD ((DISABLE_INT + XFER_HOST_DMA + XFER_HOST_AUTO + XFER_DMA_8BIT))
766 #define SCSI_TERM_ENA_H BIT(6) /* SCSI high byte terminator */ 445#define HOST_RD_CMD ((DISABLE_INT + XFER_DMA_HOST + XFER_HOST_AUTO + XFER_DMA_8BIT))
767 #define SEE_MS BIT(5)
768 #define SEE_CS BIT(3)
769 #define SEE_CLK BIT(2)
770 #define SEE_DO BIT(1)
771 #define SEE_DI BIT(0)
772 446
773 #define EE_READ 0x06 447#define hp_host_addr_lo 0x1C
774 #define EE_WRITE 0x05 448#define hp_host_addr_hmi 0x1E
775 #define EWEN 0x04
776 #define EWEN_ADDR 0x03C0
777 #define EWDS 0x04
778 #define EWDS_ADDR 0x0000
779 449
780 #define hp_brdctl 0x23 450#define hp_ee_ctrl 0x22
781 451
782 #define DAT_7 BIT(7) 452#define EXT_ARB_ACK BIT(7)
783 #define DAT_6 BIT(6) 453#define SCSI_TERM_ENA_H BIT(6) /* SCSI high byte terminator */
784 #define DAT_5 BIT(5) 454#define SEE_MS BIT(5)
785 #define BRD_STB BIT(4) 455#define SEE_CS BIT(3)
786 #define BRD_CS BIT(3) 456#define SEE_CLK BIT(2)
787 #define BRD_WR BIT(2) 457#define SEE_DO BIT(1)
458#define SEE_DI BIT(0)
788 459
789 #define hp_reserved_24 0x24 460#define EE_READ 0x06
790 #define hp_reserved_25 0x25 461#define EE_WRITE 0x05
462#define EWEN 0x04
463#define EWEN_ADDR 0x03C0
464#define EWDS 0x04
465#define EWDS_ADDR 0x0000
791 466
467#define hp_bm_ctrl 0x26
792 468
469#define SCSI_TERM_ENA_L BIT(0) /*Enable/Disable external terminators */
470#define FLUSH_XFER_CNTR BIT(1) /*Flush transfer counter */
471#define FORCE1_XFER BIT(5) /*Always xfer one byte in byte mode */
472#define FAST_SINGLE BIT(6) /*?? */
793 473
474#define BMCTRL_DEFAULT (FORCE1_XFER|FAST_SINGLE|SCSI_TERM_ENA_L)
794 475
795 #define hp_bm_ctrl 0x26 476#define hp_sg_addr 0x28
477#define hp_page_ctrl 0x29
796 478
797 #define SCSI_TERM_ENA_L BIT(0) /*Enable/Disable external terminators */ 479#define SCATTER_EN BIT(0)
798 #define FLUSH_XFER_CNTR BIT(1) /*Flush transfer counter */ 480#define SGRAM_ARAM BIT(1)
799 #define BM_XFER_MIN_8 BIT(2) /*Enable bus master transfer of 9 */ 481#define G_INT_DISABLE BIT(3) /* Enable/Disable all Interrupts */
800 #define BIOS_ENA BIT(3) /*Enable BIOS/FLASH Enable */ 482#define NARROW_SCSI_CARD BIT(4) /* NARROW/WIDE SCSI config pin */
801 #define FORCE1_XFER BIT(5) /*Always xfer one byte in byte mode */
802 #define FAST_SINGLE BIT(6) /*?? */
803 483
804 #define BMCTRL_DEFAULT (FORCE1_XFER|FAST_SINGLE|SCSI_TERM_ENA_L) 484#define hp_pci_stat_cfg 0x2D
805 485
806 #define hp_reserved_27 0x27 486#define REC_MASTER_ABORT BIT(5) /*received Master abort */
807 487
808 #define hp_sg_addr 0x28 488#define hp_rev_num 0x33
809 #define hp_page_ctrl 0x29
810 489
811 #define SCATTER_EN BIT(0) 490#define hp_stack_data 0x34
812 #define SGRAM_ARAM BIT(1) 491#define hp_stack_addr 0x35
813 #define BIOS_SHADOW BIT(2)
814 #define G_INT_DISABLE BIT(3) /* Enable/Disable all Interrupts */
815 #define NARROW_SCSI_CARD BIT(4) /* NARROW/WIDE SCSI config pin */
816 492
817 #define hp_reserved_2A 0x2A 493#define hp_ext_status 0x36
818 #define hp_pci_cmd_cfg 0x2B
819 494
820 #define IO_SPACE_ENA BIT(0) /*enable I/O space */ 495#define BM_FORCE_OFF BIT(0) /*Bus Master is forced to get off */
821 #define MEM_SPACE_ENA BIT(1) /*enable memory space */ 496#define PCI_TGT_ABORT BIT(0) /*PCI bus master transaction aborted */
822 #define BUS_MSTR_ENA BIT(2) /*enable bus master operation */ 497#define PCI_DEV_TMOUT BIT(1) /*PCI Device Time out */
823 #define MEM_WI_ENA BIT(4) /*enable Write and Invalidate */ 498#define CMD_ABORTED BIT(4) /*Command aborted */
824 #define PAR_ERR_RESP BIT(6) /*enable parity error responce. */ 499#define BM_PARITY_ERR BIT(5) /*parity error on data received */
825 500#define PIO_OVERRUN BIT(6) /*Slave data overrun */
826 #define hp_reserved_2C 0x2C 501#define BM_CMD_BUSY BIT(7) /*Bus master transfer command busy */
827 502#define BAD_EXT_STATUS (BM_FORCE_OFF | PCI_DEV_TMOUT | CMD_ABORTED | \
828 #define hp_pci_stat_cfg 0x2D
829
830 #define DATA_PARITY_ERR BIT(0)
831 #define REC_TARGET_ABORT BIT(4) /*received Target abort */
832 #define REC_MASTER_ABORT BIT(5) /*received Master abort */
833 #define SIG_SYSTEM_ERR BIT(6)
834 #define DETECTED_PAR_ERR BIT(7)
835
836 #define hp_reserved_2E 0x2E
837
838 #define hp_sys_status 0x2F
839
840 #define SLV_DATA_RDY BIT(0) /*Slave data ready */
841 #define XFER_CNT_ZERO BIT(1) /*Transfer counter = 0 */
842 #define BM_FIFO_EMPTY BIT(2) /*FIFO empty */
843 #define BM_FIFO_FULL BIT(3) /*FIFO full */
844 #define HOST_OP_DONE BIT(4) /*host operation done */
845 #define DMA_OP_DONE BIT(5) /*DMA operation done */
846 #define SLV_OP_DONE BIT(6) /*Slave operation done */
847 #define PWR_ON_FLAG BIT(7) /*Power on flag */
848
849 #define hp_reserved_30 0x30
850
851 #define hp_host_status0 0x31
852
853 #define HOST_TERM BIT(5) /*Host Terminal Count */
854 #define HOST_TRSHLD BIT(6) /*Host Threshold */
855 #define CONNECTED_2_HOST BIT(7) /*Connected to Host */
856
857 #define hp_reserved_32 0x32
858
859 #define hp_rev_num 0x33
860
861 #define REV_A_CONST 0x0E
862 #define REV_B_CONST 0x0E
863
864 #define hp_stack_data 0x34
865 #define hp_stack_addr 0x35
866
867 #define hp_ext_status 0x36
868
869 #define BM_FORCE_OFF BIT(0) /*Bus Master is forced to get off */
870 #define PCI_TGT_ABORT BIT(0) /*PCI bus master transaction aborted */
871 #define PCI_DEV_TMOUT BIT(1) /*PCI Device Time out */
872 #define FIFO_TC_NOT_ZERO BIT(2) /*FIFO or transfer counter not zero */
873 #define CHIP_RST_OCCUR BIT(3) /*Chip reset occurs */
874 #define CMD_ABORTED BIT(4) /*Command aborted */
875 #define BM_PARITY_ERR BIT(5) /*parity error on data received */
876 #define PIO_OVERRUN BIT(6) /*Slave data overrun */
877 #define BM_CMD_BUSY BIT(7) /*Bus master transfer command busy */
878 #define BAD_EXT_STATUS (BM_FORCE_OFF | PCI_DEV_TMOUT | CMD_ABORTED | \
879 BM_PARITY_ERR | PIO_OVERRUN) 503 BM_PARITY_ERR | PIO_OVERRUN)
880 504
881 #define hp_int_status 0x37 505#define hp_int_status 0x37
882 506
883 #define BM_CMD_CMPL BIT(0) /*Bus Master command complete */ 507#define EXT_STATUS_ON BIT(1) /*Extended status is valid */
884 #define EXT_STATUS_ON BIT(1) /*Extended status is valid */ 508#define SCSI_INTERRUPT BIT(2) /*Global indication of a SCSI int. */
885 #define SCSI_INTERRUPT BIT(2) /*Global indication of a SCSI int. */ 509#define INT_ASSERTED BIT(5) /* */
886 #define BM_FIFO_RDY BIT(4) 510
887 #define INT_ASSERTED BIT(5) /* */ 511#define hp_fifo_cnt 0x38
888 #define SRAM_BUSY BIT(6) /*Scatter/Gather RAM busy */ 512
889 #define CMD_REG_BUSY BIT(7) 513#define hp_intena 0x40
890 514
891 515#define RESET BITW(7)
892 #define hp_fifo_cnt 0x38 516#define PROG_HLT BITW(6)
893 #define hp_curr_host_cnt 0x39 517#define PARITY BITW(5)
894 #define hp_reserved_3A 0x3A 518#define FIFO BITW(4)
895 #define hp_fifo_in_addr 0x3B 519#define SEL BITW(3)
896 520#define SCAM_SEL BITW(2)
897 #define hp_fifo_out_addr 0x3C 521#define RSEL BITW(1)
898 #define hp_reserved_3D 0x3D 522#define TIMEOUT BITW(0)
899 #define hp_reserved_3E 0x3E 523#define BUS_FREE BITW(15)
900 #define hp_reserved_3F 0x3F 524#define XFER_CNT_0 BITW(14)
901 525#define PHASE BITW(13)
902 526#define IUNKWN BITW(12)
903 527#define ICMD_COMP BITW(11)
904 #define hp_intena 0x40 528#define ITICKLE BITW(10)
905 529#define IDO_STRT BITW(9)
906 #define RESET BITW(7) 530#define ITAR_DISC BITW(8)
907 #define PROG_HLT BITW(6) 531#define AUTO_INT (BITW(12)+BITW(11)+BITW(10)+BITW(9)+BITW(8))
908 #define PARITY BITW(5) 532#define CLR_ALL_INT 0xFFFF
909 #define FIFO BITW(4) 533#define CLR_ALL_INT_1 0xFF00
910 #define SEL BITW(3) 534
911 #define SCAM_SEL BITW(2) 535#define hp_intstat 0x42
912 #define RSEL BITW(1) 536
913 #define TIMEOUT BITW(0) 537#define hp_scsisig 0x44
914 #define BUS_FREE BITW(15) 538
915 #define XFER_CNT_0 BITW(14) 539#define SCSI_SEL BIT(7)
916 #define PHASE BITW(13) 540#define SCSI_BSY BIT(6)
917 #define IUNKWN BITW(12) 541#define SCSI_REQ BIT(5)
918 #define ICMD_COMP BITW(11) 542#define SCSI_ACK BIT(4)
919 #define ITICKLE BITW(10) 543#define SCSI_ATN BIT(3)
920 #define IDO_STRT BITW(9) 544#define SCSI_CD BIT(2)
921 #define ITAR_DISC BITW(8) 545#define SCSI_MSG BIT(1)
922 #define AUTO_INT (BITW(12)+BITW(11)+BITW(10)+BITW(9)+BITW(8)) 546#define SCSI_IOBIT BIT(0)
923 #define CLR_ALL_INT 0xFFFF 547
924 #define CLR_ALL_INT_1 0xFF00 548#define S_SCSI_PHZ (BIT(2)+BIT(1)+BIT(0))
925 549#define S_MSGO_PH (BIT(2)+BIT(1) )
926 #define hp_intstat 0x42 550#define S_MSGI_PH (BIT(2)+BIT(1)+BIT(0))
927 551#define S_DATAI_PH ( BIT(0))
928 #define hp_scsisig 0x44 552#define S_DATAO_PH 0x00
929 553#define S_ILL_PH ( BIT(1) )
930 #define SCSI_SEL BIT(7) 554
931 #define SCSI_BSY BIT(6) 555#define hp_scsictrl_0 0x45
932 #define SCSI_REQ BIT(5) 556
933 #define SCSI_ACK BIT(4) 557#define SEL_TAR BIT(6)
934 #define SCSI_ATN BIT(3) 558#define ENA_ATN BIT(4)
935 #define SCSI_CD BIT(2) 559#define ENA_RESEL BIT(2)
936 #define SCSI_MSG BIT(1) 560#define SCSI_RST BIT(1)
937 #define SCSI_IOBIT BIT(0) 561#define ENA_SCAM_SEL BIT(0)
938
939 #define S_SCSI_PHZ (BIT(2)+BIT(1)+BIT(0))
940 #define S_CMD_PH (BIT(2) )
941 #define S_MSGO_PH (BIT(2)+BIT(1) )
942 #define S_STAT_PH (BIT(2) +BIT(0))
943 #define S_MSGI_PH (BIT(2)+BIT(1)+BIT(0))
944 #define S_DATAI_PH ( BIT(0))
945 #define S_DATAO_PH 0x00
946 #define S_ILL_PH ( BIT(1) )
947
948 #define hp_scsictrl_0 0x45
949
950 #define NO_ARB BIT(7)
951 #define SEL_TAR BIT(6)
952 #define ENA_ATN BIT(4)
953 #define ENA_RESEL BIT(2)
954 #define SCSI_RST BIT(1)
955 #define ENA_SCAM_SEL BIT(0)
956
957
958
959 #define hp_portctrl_0 0x46
960
961 #define SCSI_PORT BIT(7)
962 #define SCSI_INBIT BIT(6)
963 #define DMA_PORT BIT(5)
964 #define DMA_RD BIT(4)
965 #define HOST_PORT BIT(3)
966 #define HOST_WRT BIT(2)
967 #define SCSI_BUS_EN BIT(1)
968 #define START_TO BIT(0)
969
970 #define hp_scsireset 0x47
971
972 #define SCSI_TAR BIT(7)
973 #define SCSI_INI BIT(6)
974 #define SCAM_EN BIT(5)
975 #define ACK_HOLD BIT(4)
976 #define DMA_RESET BIT(3)
977 #define HPSCSI_RESET BIT(2)
978 #define PROG_RESET BIT(1)
979 #define FIFO_CLR BIT(0)
980
981 #define hp_xfercnt_0 0x48
982 #define hp_xfercnt_1 0x49
983 #define hp_xfercnt_2 0x4A
984 #define hp_xfercnt_3 0x4B
985
986 #define hp_fifodata_0 0x4C
987 #define hp_fifodata_1 0x4D
988 #define hp_addstat 0x4E
989
990 #define SCAM_TIMER BIT(7)
991 #define AUTO_RUNNING BIT(6)
992 #define FAST_SYNC BIT(5)
993 #define SCSI_MODE8 BIT(3)
994 #define SCSI_PAR_ERR BIT(0)
995
996 #define hp_prgmcnt_0 0x4F
997
998 #define AUTO_PC_MASK 0x3F
999
1000 #define hp_selfid_0 0x50
1001 #define hp_selfid_1 0x51
1002 #define hp_arb_id 0x52
1003
1004 #define ARB_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1005
1006 #define hp_select_id 0x53
1007
1008 #define RESEL_ID (BIT(7) + BIT(6) + BIT(5) + BIT(4))
1009 #define SELECT_ID (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1010
1011 #define hp_synctarg_base 0x54
1012 #define hp_synctarg_12 0x54
1013 #define hp_synctarg_13 0x55
1014 #define hp_synctarg_14 0x56
1015 #define hp_synctarg_15 0x57
1016
1017 #define hp_synctarg_8 0x58
1018 #define hp_synctarg_9 0x59
1019 #define hp_synctarg_10 0x5A
1020 #define hp_synctarg_11 0x5B
1021
1022 #define hp_synctarg_4 0x5C
1023 #define hp_synctarg_5 0x5D
1024 #define hp_synctarg_6 0x5E
1025 #define hp_synctarg_7 0x5F
1026
1027 #define hp_synctarg_0 0x60
1028 #define hp_synctarg_1 0x61
1029 #define hp_synctarg_2 0x62
1030 #define hp_synctarg_3 0x63
1031
1032 #define RATE_20MB 0x00
1033 #define RATE_10MB ( BIT(5))
1034 #define RATE_6_6MB ( BIT(6) )
1035 #define RATE_5MB ( BIT(6)+BIT(5))
1036 #define RATE_4MB (BIT(7) )
1037 #define RATE_3_33MB (BIT(7) +BIT(5))
1038 #define RATE_2_85MB (BIT(7)+BIT(6) )
1039 #define RATE_2_5MB (BIT(7)+BIT(5)+BIT(6))
1040 #define NEXT_CLK BIT(5)
1041 #define SLOWEST_SYNC (BIT(7)+BIT(6)+BIT(5))
1042 #define NARROW_SCSI BIT(4)
1043 #define SYNC_OFFSET (BIT(3) + BIT(2) + BIT(1) + BIT(0))
1044 #define DEFAULT_ASYNC 0x00
1045 #define DEFAULT_OFFSET 0x0F
1046
1047 #define hp_autostart_0 0x64
1048 #define hp_autostart_1 0x65
1049 #define hp_autostart_2 0x66
1050 #define hp_autostart_3 0x67
1051
1052
1053
1054 #define DISABLE 0x00
1055 #define AUTO_IMMED BIT(5)
1056 #define SELECT BIT(6)
1057 #define RESELECT (BIT(6)+BIT(5))
1058 #define BUSFREE BIT(7)
1059 #define XFER_0 (BIT(7)+BIT(5))
1060 #define END_DATA (BIT(7)+BIT(6))
1061 #define MSG_PHZ (BIT(7)+BIT(6)+BIT(5))
1062
1063 #define hp_gp_reg_0 0x68
1064 #define hp_gp_reg_1 0x69
1065 #define hp_gp_reg_2 0x6A
1066 #define hp_gp_reg_3 0x6B
1067
1068 #define hp_seltimeout 0x6C
1069
1070 562
1071 #define TO_2ms 0x54 /* 2.0503ms */ 563#define hp_portctrl_0 0x46
1072 #define TO_4ms 0x67 /* 3.9959ms */
1073 564
1074 #define TO_5ms 0x03 /* 4.9152ms */ 565#define SCSI_PORT BIT(7)
1075 #define TO_10ms 0x07 /* 11.xxxms */ 566#define SCSI_INBIT BIT(6)
1076 #define TO_250ms 0x99 /* 250.68ms */ 567#define DMA_PORT BIT(5)
1077 #define TO_290ms 0xB1 /* 289.99ms */ 568#define DMA_RD BIT(4)
1078 #define TO_350ms 0xD6 /* 350.62ms */ 569#define HOST_PORT BIT(3)
1079 #define TO_417ms 0xFF /* 417.79ms */ 570#define HOST_WRT BIT(2)
571#define SCSI_BUS_EN BIT(1)
572#define START_TO BIT(0)
1080 573
1081 #define hp_clkctrl_0 0x6D 574#define hp_scsireset 0x47
1082 575
1083 #define PWR_DWN BIT(6) 576#define SCSI_INI BIT(6)
1084 #define ACTdeassert BIT(4) 577#define SCAM_EN BIT(5)
1085 #define ATNonErr BIT(3) 578#define DMA_RESET BIT(3)
1086 #define CLK_30MHZ BIT(1) 579#define HPSCSI_RESET BIT(2)
1087 #define CLK_40MHZ (BIT(1) + BIT(0)) 580#define PROG_RESET BIT(1)
1088 #define CLK_50MHZ BIT(2) 581#define FIFO_CLR BIT(0)
1089 582
1090 #define CLKCTRL_DEFAULT (ACTdeassert | CLK_40MHZ) 583#define hp_xfercnt_0 0x48
584#define hp_xfercnt_2 0x4A
1091 585
1092 #define hp_fiforead 0x6E 586#define hp_fifodata_0 0x4C
1093 #define hp_fifowrite 0x6F 587#define hp_addstat 0x4E
1094 588
1095 #define hp_offsetctr 0x70 589#define SCAM_TIMER BIT(7)
1096 #define hp_xferstat 0x71 590#define SCSI_MODE8 BIT(3)
591#define SCSI_PAR_ERR BIT(0)
1097 592
1098 #define FIFO_FULL BIT(7) 593#define hp_prgmcnt_0 0x4F
1099 #define FIFO_EMPTY BIT(6)
1100 #define FIFO_MASK 0x3F /* Mask for the FIFO count value. */
1101 #define FIFO_LEN 0x20
1102 594
1103 #define hp_portctrl_1 0x72 595#define hp_selfid_0 0x50
596#define hp_selfid_1 0x51
597#define hp_arb_id 0x52
1104 598
1105 #define EVEN_HOST_P BIT(5) 599#define hp_select_id 0x53
1106 #define INVT_SCSI BIT(4)
1107 #define CHK_SCSI_P BIT(3)
1108 #define HOST_MODE8 BIT(0)
1109 #define HOST_MODE16 0x00
1110 600
1111 #define hp_xfer_pad 0x73 601#define hp_synctarg_base 0x54
602#define hp_synctarg_12 0x54
603#define hp_synctarg_13 0x55
604#define hp_synctarg_14 0x56
605#define hp_synctarg_15 0x57
1112 606
1113 #define ID_UNLOCK BIT(3) 607#define hp_synctarg_8 0x58
1114 #define XFER_PAD BIT(2) 608#define hp_synctarg_9 0x59
609#define hp_synctarg_10 0x5A
610#define hp_synctarg_11 0x5B
1115 611
1116 #define hp_scsidata_0 0x74 612#define hp_synctarg_4 0x5C
1117 #define hp_scsidata_1 0x75 613#define hp_synctarg_5 0x5D
1118 #define hp_timer_0 0x76 614#define hp_synctarg_6 0x5E
1119 #define hp_timer_1 0x77 615#define hp_synctarg_7 0x5F
1120 616
1121 #define hp_reserved_78 0x78 617#define hp_synctarg_0 0x60
1122 #define hp_reserved_79 0x79 618#define hp_synctarg_1 0x61
1123 #define hp_reserved_7A 0x7A 619#define hp_synctarg_2 0x62
1124 #define hp_reserved_7B 0x7B 620#define hp_synctarg_3 0x63
1125 621
1126 #define hp_reserved_7C 0x7C 622#define NARROW_SCSI BIT(4)
1127 #define hp_reserved_7D 0x7D 623#define DEFAULT_OFFSET 0x0F
1128 #define hp_reserved_7E 0x7E
1129 #define hp_reserved_7F 0x7F
1130 624
1131 #define hp_aramBase 0x80 625#define hp_autostart_0 0x64
1132 #define BIOS_DATA_OFFSET 0x60 626#define hp_autostart_1 0x65
1133 #define BIOS_RELATIVE_CARD 0x64 627#define hp_autostart_3 0x67
1134 628
629#define AUTO_IMMED BIT(5)
630#define SELECT BIT(6)
631#define END_DATA (BIT(7)+BIT(6))
1135 632
633#define hp_gp_reg_0 0x68
634#define hp_gp_reg_1 0x69
635#define hp_gp_reg_3 0x6B
1136 636
637#define hp_seltimeout 0x6C
1137 638
1138 #define AUTO_LEN 0x80 639#define TO_4ms 0x67 /* 3.9959ms */
1139 #define AR0 0x00
1140 #define AR1 BITW(8)
1141 #define AR2 BITW(9)
1142 #define AR3 (BITW(9) + BITW(8))
1143 #define SDATA BITW(10)
1144 640
1145 #define NOP_OP 0x00 /* Nop command */ 641#define TO_5ms 0x03 /* 4.9152ms */
642#define TO_10ms 0x07 /* 11.xxxms */
643#define TO_250ms 0x99 /* 250.68ms */
644#define TO_290ms 0xB1 /* 289.99ms */
1146 645
1147 #define CRD_OP BITW(11) /* Cmp Reg. w/ Data */ 646#define hp_clkctrl_0 0x6D
1148 647
1149 #define CRR_OP BITW(12) /* Cmp Reg. w. Reg. */ 648#define PWR_DWN BIT(6)
649#define ACTdeassert BIT(4)
650#define CLK_40MHZ (BIT(1) + BIT(0))
1150 651
1151 #define CBE_OP (BITW(14)+BITW(12)+BITW(11)) /* Cmp SCSI cmd class & Branch EQ */ 652#define CLKCTRL_DEFAULT (ACTdeassert | CLK_40MHZ)
1152
1153 #define CBN_OP (BITW(14)+BITW(13)) /* Cmp SCSI cmd class & Branch NOT EQ */
1154
1155 #define CPE_OP (BITW(14)+BITW(11)) /* Cmp SCSI phs & Branch EQ */
1156 653
1157 #define CPN_OP (BITW(14)+BITW(12)) /* Cmp SCSI phs & Branch NOT EQ */ 654#define hp_fiforead 0x6E
655#define hp_fifowrite 0x6F
1158 656
657#define hp_offsetctr 0x70
658#define hp_xferstat 0x71
1159 659
1160 #define ADATA_OUT 0x00 660#define FIFO_EMPTY BIT(6)
1161 #define ADATA_IN BITW(8)
1162 #define ACOMMAND BITW(10)
1163 #define ASTATUS (BITW(10)+BITW(8))
1164 #define AMSG_OUT (BITW(10)+BITW(9))
1165 #define AMSG_IN (BITW(10)+BITW(9)+BITW(8))
1166 #define AILLEGAL (BITW(9)+BITW(8))
1167 661
662#define hp_portctrl_1 0x72
1168 663
1169 #define BRH_OP BITW(13) /* Branch */ 664#define CHK_SCSI_P BIT(3)
665#define HOST_MODE8 BIT(0)
1170 666
1171 667#define hp_xfer_pad 0x73
1172 #define ALWAYS 0x00
1173 #define EQUAL BITW(8)
1174 #define NOT_EQ BITW(9)
1175 668
1176 #define TCB_OP (BITW(13)+BITW(11)) /* Test condition & branch */ 669#define ID_UNLOCK BIT(3)
1177 670
1178 671#define hp_scsidata_0 0x74
1179 #define ATN_SET BITW(8) 672#define hp_scsidata_1 0x75
1180 #define ATN_RESET BITW(9)
1181 #define XFER_CNT (BITW(9)+BITW(8))
1182 #define FIFO_0 BITW(10)
1183 #define FIFO_NOT0 (BITW(10)+BITW(8))
1184 #define T_USE_SYNC0 (BITW(10)+BITW(9))
1185 673
674#define hp_aramBase 0x80
675#define BIOS_DATA_OFFSET 0x60
676#define BIOS_RELATIVE_CARD 0x64
1186 677
1187 #define MPM_OP BITW(15) /* Match phase and move data */ 678#define AR3 (BITW(9) + BITW(8))
679#define SDATA BITW(10)
1188 680
1189 #define MDR_OP (BITW(12)+BITW(11)) /* Move data to Reg. */ 681#define CRD_OP BITW(11) /* Cmp Reg. w/ Data */
1190 682
1191 #define MRR_OP BITW(14) /* Move DReg. to Reg. */ 683#define CRR_OP BITW(12) /* Cmp Reg. w. Reg. */
1192 684
685#define CPE_OP (BITW(14)+BITW(11)) /* Cmp SCSI phs & Branch EQ */
1193 686
1194 #define S_IDREG (BIT(2)+BIT(1)+BIT(0)) 687#define CPN_OP (BITW(14)+BITW(12)) /* Cmp SCSI phs & Branch NOT EQ */
1195 688
689#define ADATA_OUT 0x00
690#define ADATA_IN BITW(8)
691#define ACOMMAND BITW(10)
692#define ASTATUS (BITW(10)+BITW(8))
693#define AMSG_OUT (BITW(10)+BITW(9))
694#define AMSG_IN (BITW(10)+BITW(9)+BITW(8))
1196 695
1197 #define D_AR0 0x00 696#define BRH_OP BITW(13) /* Branch */
1198 #define D_AR1 BIT(0)
1199 #define D_AR2 BIT(1)
1200 #define D_AR3 (BIT(1) + BIT(0))
1201 #define D_SDATA BIT(2)
1202 #define D_BUCKET (BIT(2) + BIT(1) + BIT(0))
1203 697
698#define ALWAYS 0x00
699#define EQUAL BITW(8)
700#define NOT_EQ BITW(9)
1204 701
1205 #define ADR_OP (BITW(13)+BITW(12)) /* Logical AND Reg. w. Data */ 702#define TCB_OP (BITW(13)+BITW(11)) /* Test condition & branch */
1206 703
1207 #define ADS_OP (BITW(14)+BITW(13)+BITW(12)) 704#define FIFO_0 BITW(10)
1208 705
1209 #define ODR_OP (BITW(13)+BITW(12)+BITW(11)) 706#define MPM_OP BITW(15) /* Match phase and move data */
1210 707
1211 #define ODS_OP (BITW(14)+BITW(13)+BITW(12)+BITW(11)) 708#define MRR_OP BITW(14) /* Move DReg. to Reg. */
1212 709
1213 #define STR_OP (BITW(15)+BITW(14)) /* Store to A_Reg. */ 710#define S_IDREG (BIT(2)+BIT(1)+BIT(0))
1214 711
1215 #define AINT_ENA1 0x00 712#define D_AR0 0x00
1216 #define AINT_STAT1 BITW(8) 713#define D_AR1 BIT(0)
1217 #define ASCSI_SIG BITW(9) 714#define D_BUCKET (BIT(2) + BIT(1) + BIT(0))
1218 #define ASCSI_CNTL (BITW(9)+BITW(8))
1219 #define APORT_CNTL BITW(10)
1220 #define ARST_CNTL (BITW(10)+BITW(8))
1221 #define AXFERCNT0 (BITW(10)+BITW(9))
1222 #define AXFERCNT1 (BITW(10)+BITW(9)+BITW(8))
1223 #define AXFERCNT2 BITW(11)
1224 #define AFIFO_DATA (BITW(11)+BITW(8))
1225 #define ASCSISELID (BITW(11)+BITW(9))
1226 #define ASCSISYNC0 (BITW(11)+BITW(9)+BITW(8))
1227 715
716#define RAT_OP (BITW(14)+BITW(13)+BITW(11))
1228 717
1229 #define RAT_OP (BITW(14)+BITW(13)+BITW(11)) 718#define SSI_OP (BITW(15)+BITW(11))
1230 719
1231 #define SSI_OP (BITW(15)+BITW(11)) 720#define SSI_ITAR_DISC (ITAR_DISC >> 8)
721#define SSI_IDO_STRT (IDO_STRT >> 8)
1232 722
723#define SSI_ICMD_COMP (ICMD_COMP >> 8)
724#define SSI_ITICKLE (ITICKLE >> 8)
1233 725
1234 #define SSI_ITAR_DISC (ITAR_DISC >> 8) 726#define SSI_IUNKWN (IUNKWN >> 8)
1235 #define SSI_IDO_STRT (IDO_STRT >> 8) 727#define SSI_INO_CC (IUNKWN >> 8)
1236 #define SSI_IDI_STRT (IDO_STRT >> 8) 728#define SSI_IRFAIL (IUNKWN >> 8)
1237 729
1238 #define SSI_ICMD_COMP (ICMD_COMP >> 8) 730#define NP 0x10 /*Next Phase */
1239 #define SSI_ITICKLE (ITICKLE >> 8) 731#define NTCMD 0x02 /*Non- Tagged Command start */
732#define CMDPZ 0x04 /*Command phase */
733#define DINT 0x12 /*Data Out/In interrupt */
734#define DI 0x13 /*Data Out */
735#define DC 0x19 /*Disconnect Message */
736#define ST 0x1D /*Status Phase */
737#define UNKNWN 0x24 /*Unknown bus action */
738#define CC 0x25 /*Command Completion failure */
739#define TICK 0x26 /*New target reselected us. */
740#define SELCHK 0x28 /*Select & Check SCSI ID latch reg */
1240 741
1241 #define SSI_IUNKWN (IUNKWN >> 8) 742#define ID_MSG_STRT hp_aramBase + 0x00
1242 #define SSI_INO_CC (IUNKWN >> 8) 743#define NON_TAG_ID_MSG hp_aramBase + 0x06
1243 #define SSI_IRFAIL (IUNKWN >> 8) 744#define CMD_STRT hp_aramBase + 0x08
745#define SYNC_MSGS hp_aramBase + 0x08
1244 746
1245 747#define TAG_STRT 0x00
1246 #define NP 0x10 /*Next Phase */ 748#define DISCONNECT_START 0x10/2
1247 #define NTCMD 0x02 /*Non- Tagged Command start */ 749#define END_DATA_START 0x14/2
1248 #define CMDPZ 0x04 /*Command phase */ 750#define CMD_ONLY_STRT CMDPZ/2
1249 #define DINT 0x12 /*Data Out/In interrupt */ 751#define SELCHK_STRT SELCHK/2
1250 #define DI 0x13 /*Data Out */
1251 #define MI 0x14 /*Message In */
1252 #define DC 0x19 /*Disconnect Message */
1253 #define ST 0x1D /*Status Phase */
1254 #define UNKNWN 0x24 /*Unknown bus action */
1255 #define CC 0x25 /*Command Completion failure */
1256 #define TICK 0x26 /*New target reselected us. */
1257 #define RFAIL 0x27 /*Reselection failed */
1258 #define SELCHK 0x28 /*Select & Check SCSI ID latch reg */
1259
1260
1261 #define ID_MSG_STRT hp_aramBase + 0x00
1262 #define NON_TAG_ID_MSG hp_aramBase + 0x06
1263 #define CMD_STRT hp_aramBase + 0x08
1264 #define SYNC_MSGS hp_aramBase + 0x08
1265
1266
1267
1268
1269
1270 #define TAG_STRT 0x00
1271 #define SELECTION_START 0x00
1272 #define DISCONNECT_START 0x10/2
1273 #define END_DATA_START 0x14/2
1274 #define NONTAG_STRT 0x02/2
1275 #define CMD_ONLY_STRT CMDPZ/2
1276 #define TICKLE_STRT TICK/2
1277 #define SELCHK_STRT SELCHK/2
1278
1279
1280
1281
1282#define mEEPROM_CLK_DELAY(port) (RD_HARPOON(port+hp_intstat_1))
1283
1284#define mWAIT_10MS(port) (RD_HARPOON(port+hp_intstat_1))
1285
1286
1287#define CLR_XFER_CNT(port) (WR_HARPOON(port+hp_xfercnt_0, 0x00))
1288
1289#define SET_XFER_CNT(port, data) (WR_HARP32(port,hp_xfercnt_0,data))
1290 752
1291#define GET_XFER_CNT(port, xfercnt) {RD_HARP32(port,hp_xfercnt_0,xfercnt); xfercnt &= 0xFFFFFF;} 753#define GET_XFER_CNT(port, xfercnt) {RD_HARP32(port,hp_xfercnt_0,xfercnt); xfercnt &= 0xFFFFFF;}
1292/* #define GET_XFER_CNT(port, xfercnt) (xfercnt = RD_HARPOON(port+hp_xfercnt_2), \ 754/* #define GET_XFER_CNT(port, xfercnt) (xfercnt = RD_HARPOON(port+hp_xfercnt_2), \
1293 xfercnt <<= 16,\ 755 xfercnt <<= 16,\
1294 xfercnt |= RDW_HARPOON((USHORT)(port+hp_xfercnt_0))) 756 xfercnt |= RDW_HARPOON((unsigned short)(port+hp_xfercnt_0)))
1295 */ 757 */
1296#define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((port+hp_host_addr_lo), (USHORT)(addr & 0x0000FFFFL)),\ 758#define HP_SETUP_ADDR_CNT(port,addr,count) (WRW_HARPOON((port+hp_host_addr_lo), (unsigned short)(addr & 0x0000FFFFL)),\
1297 addr >>= 16,\ 759 addr >>= 16,\
1298 WRW_HARPOON((port+hp_host_addr_hmi), (USHORT)(addr & 0x0000FFFFL)),\ 760 WRW_HARPOON((port+hp_host_addr_hmi), (unsigned short)(addr & 0x0000FFFFL)),\
1299 WR_HARP32(port,hp_xfercnt_0,count),\ 761 WR_HARP32(port,hp_xfercnt_0,count),\
1300 WRW_HARPOON((port+hp_xfer_cnt_lo), (USHORT)(count & 0x0000FFFFL)),\ 762 WRW_HARPOON((port+hp_xfer_cnt_lo), (unsigned short)(count & 0x0000FFFFL)),\
1301 count >>= 16,\ 763 count >>= 16,\
1302 WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF))) 764 WR_HARPOON(port+hp_xfer_cnt_hi, (count & 0xFF)))
1303 765
1304#define ACCEPT_MSG(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\ 766#define ACCEPT_MSG(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1305 WR_HARPOON(port+hp_scsisig, S_ILL_PH);} 767 WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
1306 768
1307
1308#define ACCEPT_MSG_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\ 769#define ACCEPT_MSG_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1309 WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));} 770 WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
1310 771
1311#define ACCEPT_STAT(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1312 WR_HARPOON(port+hp_scsisig, S_ILL_PH);}
1313
1314#define ACCEPT_STAT_ATN(port) {while(RD_HARPOON(port+hp_scsisig) & SCSI_REQ){}\
1315 WR_HARPOON(port+hp_scsisig, (S_ILL_PH|SCSI_ATN));}
1316
1317#define DISABLE_AUTO(port) (WR_HARPOON(port+hp_scsireset, PROG_RESET),\ 772#define DISABLE_AUTO(port) (WR_HARPOON(port+hp_scsireset, PROG_RESET),\
1318 WR_HARPOON(port+hp_scsireset, 0x00)) 773 WR_HARPOON(port+hp_scsireset, 0x00))
1319 774
@@ -1329,1194 +784,1220 @@ typedef struct SCCBscam_info {
1329#define MENABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \ 784#define MENABLE_INT(p_port) (WR_HARPOON(p_port+hp_page_ctrl, \
1330 (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE))) 785 (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)))
1331 786
1332 787static unsigned char FPT_sisyncn(unsigned long port, unsigned char p_card,
1333 788 unsigned char syncFlag);
1334 789static void FPT_ssel(unsigned long port, unsigned char p_card);
1335void scsiStartAuto(ULONG port); 790static void FPT_sres(unsigned long port, unsigned char p_card,
1336static UCHAR FPT_sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag); 791 struct sccb_card *pCurrCard);
1337static void FPT_ssel(ULONG port, UCHAR p_card); 792static void FPT_shandem(unsigned long port, unsigned char p_card,
1338static void FPT_sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard); 793 struct sccb *pCurrSCCB);
1339static void FPT_shandem(ULONG port, UCHAR p_card,PSCCB pCurrSCCB); 794static void FPT_stsyncn(unsigned long port, unsigned char p_card);
1340static void FPT_stsyncn(ULONG port, UCHAR p_card); 795static void FPT_sisyncr(unsigned long port, unsigned char sync_pulse,
1341static void FPT_sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset); 796 unsigned char offset);
1342static void FPT_sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value, 797static void FPT_sssyncv(unsigned long p_port, unsigned char p_id,
1343 PSCCBMgr_tar_info currTar_Info); 798 unsigned char p_sync_value,
1344static void FPT_sresb(ULONG port, UCHAR p_card); 799 struct sccb_mgr_tar_info *currTar_Info);
1345static void FPT_sxfrp(ULONG p_port, UCHAR p_card); 800static void FPT_sresb(unsigned long port, unsigned char p_card);
1346static void FPT_schkdd(ULONG port, UCHAR p_card); 801static void FPT_sxfrp(unsigned long p_port, unsigned char p_card);
1347static UCHAR FPT_RdStack(ULONG port, UCHAR index); 802static void FPT_schkdd(unsigned long port, unsigned char p_card);
1348static void FPT_WrStack(ULONG portBase, UCHAR index, UCHAR data); 803static unsigned char FPT_RdStack(unsigned long port, unsigned char index);
1349static UCHAR FPT_ChkIfChipInitialized(ULONG ioPort); 804static void FPT_WrStack(unsigned long portBase, unsigned char index,
1350 805 unsigned char data);
1351static void FPT_SendMsg(ULONG port, UCHAR message); 806static unsigned char FPT_ChkIfChipInitialized(unsigned long ioPort);
1352static void FPT_queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, 807
1353 UCHAR error_code); 808static void FPT_SendMsg(unsigned long port, unsigned char message);
1354 809static void FPT_queueFlushTargSccb(unsigned char p_card, unsigned char thisTarg,
1355static void FPT_sinits(PSCCB p_sccb, UCHAR p_card); 810 unsigned char error_code);
1356static void FPT_RNVRamData(PNVRamInfo pNvRamInfo); 811
1357 812static void FPT_sinits(struct sccb *p_sccb, unsigned char p_card);
1358static UCHAR FPT_siwidn(ULONG port, UCHAR p_card); 813static void FPT_RNVRamData(struct nvram_info *pNvRamInfo);
1359static void FPT_stwidn(ULONG port, UCHAR p_card); 814
1360static void FPT_siwidr(ULONG port, UCHAR width); 815static unsigned char FPT_siwidn(unsigned long port, unsigned char p_card);
1361 816static void FPT_stwidn(unsigned long port, unsigned char p_card);
1362 817static void FPT_siwidr(unsigned long port, unsigned char width);
1363static void FPT_queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card); 818
1364static void FPT_queueDisconnect(PSCCB p_SCCB, UCHAR p_card); 819static void FPT_queueSelectFail(struct sccb_card *pCurrCard,
1365static void FPT_queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_SCCB, 820 unsigned char p_card);
1366 UCHAR p_card); 821static void FPT_queueDisconnect(struct sccb *p_SCCB, unsigned char p_card);
1367static void FPT_queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card); 822static void FPT_queueCmdComplete(struct sccb_card *pCurrCard,
1368static void FPT_queueFlushSccb(UCHAR p_card, UCHAR error_code); 823 struct sccb *p_SCCB, unsigned char p_card);
1369static void FPT_queueAddSccb(PSCCB p_SCCB, UCHAR card); 824static void FPT_queueSearchSelect(struct sccb_card *pCurrCard,
1370static UCHAR FPT_queueFindSccb(PSCCB p_SCCB, UCHAR p_card); 825 unsigned char p_card);
1371static void FPT_utilUpdateResidual(PSCCB p_SCCB); 826static void FPT_queueFlushSccb(unsigned char p_card, unsigned char error_code);
1372static USHORT FPT_CalcCrc16(UCHAR buffer[]); 827static void FPT_queueAddSccb(struct sccb *p_SCCB, unsigned char card);
1373static UCHAR FPT_CalcLrc(UCHAR buffer[]); 828static unsigned char FPT_queueFindSccb(struct sccb *p_SCCB,
1374 829 unsigned char p_card);
1375 830static void FPT_utilUpdateResidual(struct sccb *p_SCCB);
1376static void FPT_Wait1Second(ULONG p_port); 831static unsigned short FPT_CalcCrc16(unsigned char buffer[]);
1377static void FPT_Wait(ULONG p_port, UCHAR p_delay); 832static unsigned char FPT_CalcLrc(unsigned char buffer[]);
1378static void FPT_utilEEWriteOnOff(ULONG p_port,UCHAR p_mode); 833
1379static void FPT_utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr); 834static void FPT_Wait1Second(unsigned long p_port);
1380static USHORT FPT_utilEERead(ULONG p_port, USHORT ee_addr); 835static void FPT_Wait(unsigned long p_port, unsigned char p_delay);
1381static USHORT FPT_utilEEReadOrg(ULONG p_port, USHORT ee_addr); 836static void FPT_utilEEWriteOnOff(unsigned long p_port, unsigned char p_mode);
1382static void FPT_utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr); 837static void FPT_utilEEWrite(unsigned long p_port, unsigned short ee_data,
1383 838 unsigned short ee_addr);
1384 839static unsigned short FPT_utilEERead(unsigned long p_port,
1385 840 unsigned short ee_addr);
1386static void FPT_phaseDataOut(ULONG port, UCHAR p_card); 841static unsigned short FPT_utilEEReadOrg(unsigned long p_port,
1387static void FPT_phaseDataIn(ULONG port, UCHAR p_card); 842 unsigned short ee_addr);
1388static void FPT_phaseCommand(ULONG port, UCHAR p_card); 843static void FPT_utilEESendCmdAddr(unsigned long p_port, unsigned char ee_cmd,
1389static void FPT_phaseStatus(ULONG port, UCHAR p_card); 844 unsigned short ee_addr);
1390static void FPT_phaseMsgOut(ULONG port, UCHAR p_card); 845
1391static void FPT_phaseMsgIn(ULONG port, UCHAR p_card); 846static void FPT_phaseDataOut(unsigned long port, unsigned char p_card);
1392static void FPT_phaseIllegal(ULONG port, UCHAR p_card); 847static void FPT_phaseDataIn(unsigned long port, unsigned char p_card);
1393 848static void FPT_phaseCommand(unsigned long port, unsigned char p_card);
1394static void FPT_phaseDecode(ULONG port, UCHAR p_card); 849static void FPT_phaseStatus(unsigned long port, unsigned char p_card);
1395static void FPT_phaseChkFifo(ULONG port, UCHAR p_card); 850static void FPT_phaseMsgOut(unsigned long port, unsigned char p_card);
1396static void FPT_phaseBusFree(ULONG p_port, UCHAR p_card); 851static void FPT_phaseMsgIn(unsigned long port, unsigned char p_card);
1397 852static void FPT_phaseIllegal(unsigned long port, unsigned char p_card);
1398 853
1399 854static void FPT_phaseDecode(unsigned long port, unsigned char p_card);
1400 855static void FPT_phaseChkFifo(unsigned long port, unsigned char p_card);
1401static void FPT_XbowInit(ULONG port, UCHAR scamFlg); 856static void FPT_phaseBusFree(unsigned long p_port, unsigned char p_card);
1402static void FPT_BusMasterInit(ULONG p_port); 857
1403static void FPT_DiagEEPROM(ULONG p_port); 858static void FPT_XbowInit(unsigned long port, unsigned char scamFlg);
1404 859static void FPT_BusMasterInit(unsigned long p_port);
1405 860static void FPT_DiagEEPROM(unsigned long p_port);
1406 861
1407 862static void FPT_dataXferProcessor(unsigned long port,
1408void busMstrAbort(ULONG port); 863 struct sccb_card *pCurrCard);
1409static void FPT_dataXferProcessor(ULONG port, PSCCBcard pCurrCard); 864static void FPT_busMstrSGDataXferStart(unsigned long port,
1410static void FPT_busMstrSGDataXferStart(ULONG port, PSCCB pCurrSCCB); 865 struct sccb *pCurrSCCB);
1411static void FPT_busMstrDataXferStart(ULONG port, PSCCB pCurrSCCB); 866static void FPT_busMstrDataXferStart(unsigned long port,
1412static void FPT_hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB); 867 struct sccb *pCurrSCCB);
1413static void FPT_hostDataXferRestart(PSCCB currSCCB); 868static void FPT_hostDataXferAbort(unsigned long port, unsigned char p_card,
1414 869 struct sccb *pCurrSCCB);
1415 870static void FPT_hostDataXferRestart(struct sccb *currSCCB);
1416static UCHAR FPT_SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, 871
1417 PSCCBcard pCurrCard, USHORT p_int); 872static unsigned char FPT_SccbMgr_bad_isr(unsigned long p_port,
1418 873 unsigned char p_card,
1419static void FPT_SccbMgrTableInitAll(void); 874 struct sccb_card *pCurrCard,
1420static void FPT_SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card); 875 unsigned short p_int);
1421static void FPT_SccbMgrTableInitTarget(UCHAR p_card, UCHAR target); 876
1422 877static void FPT_SccbMgrTableInitAll(void);
1423 878static void FPT_SccbMgrTableInitCard(struct sccb_card *pCurrCard,
1424 879 unsigned char p_card);
1425static void FPT_scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up); 880static void FPT_SccbMgrTableInitTarget(unsigned char p_card,
1426 881 unsigned char target);
1427static int FPT_scarb(ULONG p_port, UCHAR p_sel_type); 882
1428static void FPT_scbusf(ULONG p_port); 883static void FPT_scini(unsigned char p_card, unsigned char p_our_id,
1429static void FPT_scsel(ULONG p_port); 884 unsigned char p_power_up);
1430static void FPT_scasid(UCHAR p_card, ULONG p_port); 885
1431static UCHAR FPT_scxferc(ULONG p_port, UCHAR p_data); 886static int FPT_scarb(unsigned long p_port, unsigned char p_sel_type);
1432static UCHAR FPT_scsendi(ULONG p_port, UCHAR p_id_string[]); 887static void FPT_scbusf(unsigned long p_port);
1433static UCHAR FPT_sciso(ULONG p_port, UCHAR p_id_string[]); 888static void FPT_scsel(unsigned long p_port);
1434static void FPT_scwirod(ULONG p_port, UCHAR p_data_bit); 889static void FPT_scasid(unsigned char p_card, unsigned long p_port);
1435static void FPT_scwiros(ULONG p_port, UCHAR p_data_bit); 890static unsigned char FPT_scxferc(unsigned long p_port, unsigned char p_data);
1436static UCHAR FPT_scvalq(UCHAR p_quintet); 891static unsigned char FPT_scsendi(unsigned long p_port,
1437static UCHAR FPT_scsell(ULONG p_port, UCHAR targ_id); 892 unsigned char p_id_string[]);
1438static void FPT_scwtsel(ULONG p_port); 893static unsigned char FPT_sciso(unsigned long p_port,
1439static void FPT_inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id); 894 unsigned char p_id_string[]);
1440static void FPT_scsavdi(UCHAR p_card, ULONG p_port); 895static void FPT_scwirod(unsigned long p_port, unsigned char p_data_bit);
1441static UCHAR FPT_scmachid(UCHAR p_card, UCHAR p_id_string[]); 896static void FPT_scwiros(unsigned long p_port, unsigned char p_data_bit);
1442 897static unsigned char FPT_scvalq(unsigned char p_quintet);
1443 898static unsigned char FPT_scsell(unsigned long p_port, unsigned char targ_id);
1444static void FPT_autoCmdCmplt(ULONG p_port, UCHAR p_card); 899static void FPT_scwtsel(unsigned long p_port);
1445static void FPT_autoLoadDefaultMap(ULONG p_port); 900static void FPT_inisci(unsigned char p_card, unsigned long p_port,
1446 901 unsigned char p_our_id);
1447 902static void FPT_scsavdi(unsigned char p_card, unsigned long p_port);
1448 903static unsigned char FPT_scmachid(unsigned char p_card,
1449void OS_start_timer(unsigned long ioport, unsigned long timeout); 904 unsigned char p_id_string[]);
1450void OS_stop_timer(unsigned long ioport, unsigned long timeout); 905
1451void OS_disable_int(unsigned char intvec); 906static void FPT_autoCmdCmplt(unsigned long p_port, unsigned char p_card);
1452void OS_enable_int(unsigned char intvec); 907static void FPT_autoLoadDefaultMap(unsigned long p_port);
1453void OS_delay(unsigned long count); 908
1454int OS_VirtToPhys(u32bits CardHandle, u32bits *physaddr, u32bits *virtaddr); 909static struct sccb_mgr_tar_info FPT_sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR] =
1455 910 { {{0}} };
1456static SCCBMGR_TAR_INFO FPT_sccbMgrTbl[MAX_CARDS][MAX_SCSI_TAR] = { { { 0 } } }; 911static struct sccb_card FPT_BL_Card[MAX_CARDS] = { {0} };
1457static SCCBCARD FPT_BL_Card[MAX_CARDS] = { { 0 } }; 912static SCCBSCAM_INFO FPT_scamInfo[MAX_SCSI_TAR] = { {{0}} };
1458static SCCBSCAM_INFO FPT_scamInfo[MAX_SCSI_TAR] = { { { 0 } } }; 913static struct nvram_info FPT_nvRamInfo[MAX_MB_CARDS] = { {0} };
1459static NVRAMINFO FPT_nvRamInfo[MAX_MB_CARDS] = { { 0 } }; 914
1460 915static unsigned char FPT_mbCards = 0;
1461 916static unsigned char FPT_scamHAString[] =
1462static UCHAR FPT_mbCards = 0; 917 { 0x63, 0x07, 'B', 'U', 'S', 'L', 'O', 'G', 'I', 'C',
1463static UCHAR FPT_scamHAString[] = {0x63, 0x07, 'B', 'U', 'S', 'L', 'O', 'G', 'I', 'C', \ 918 ' ', 'B', 'T', '-', '9', '3', '0',
1464 ' ', 'B', 'T', '-', '9', '3', '0', \ 919 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
1465 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, \ 920 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
1466 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20}; 921};
1467 922
1468static USHORT FPT_default_intena = 0; 923static unsigned short FPT_default_intena = 0;
1469 924
1470 925static void (*FPT_s_PhaseTbl[8]) (unsigned long, unsigned char) = {
1471static void (*FPT_s_PhaseTbl[8]) (ULONG, UCHAR)= { 0 }; 9260};
1472
1473 927
1474/*--------------------------------------------------------------------- 928/*---------------------------------------------------------------------
1475 * 929 *
1476 * Function: SccbMgr_sense_adapter 930 * Function: FlashPoint_ProbeHostAdapter
1477 * 931 *
1478 * Description: Setup and/or Search for cards and return info to caller. 932 * Description: Setup and/or Search for cards and return info to caller.
1479 * 933 *
1480 *---------------------------------------------------------------------*/ 934 *---------------------------------------------------------------------*/
1481 935
1482static int SccbMgr_sense_adapter(PSCCBMGR_INFO pCardInfo) 936static int FlashPoint_ProbeHostAdapter(struct sccb_mgr_info *pCardInfo)
1483{ 937{
1484 static UCHAR first_time = 1; 938 static unsigned char first_time = 1;
1485
1486 UCHAR i,j,id,ScamFlg;
1487 USHORT temp,temp2,temp3,temp4,temp5,temp6;
1488 ULONG ioport;
1489 PNVRamInfo pCurrNvRam;
1490 939
1491 ioport = pCardInfo->si_baseaddr; 940 unsigned char i, j, id, ScamFlg;
941 unsigned short temp, temp2, temp3, temp4, temp5, temp6;
942 unsigned long ioport;
943 struct nvram_info *pCurrNvRam;
1492 944
945 ioport = pCardInfo->si_baseaddr;
1493 946
1494 if (RD_HARPOON(ioport+hp_vendor_id_0) != ORION_VEND_0) 947 if (RD_HARPOON(ioport + hp_vendor_id_0) != ORION_VEND_0)
1495 return((int)FAILURE); 948 return (int)FAILURE;
1496 949
1497 if ((RD_HARPOON(ioport+hp_vendor_id_1) != ORION_VEND_1)) 950 if ((RD_HARPOON(ioport + hp_vendor_id_1) != ORION_VEND_1))
1498 return((int)FAILURE); 951 return (int)FAILURE;
1499 952
1500 if ((RD_HARPOON(ioport+hp_device_id_0) != ORION_DEV_0)) 953 if ((RD_HARPOON(ioport + hp_device_id_0) != ORION_DEV_0))
1501 return((int)FAILURE); 954 return (int)FAILURE;
1502 955
1503 if ((RD_HARPOON(ioport+hp_device_id_1) != ORION_DEV_1)) 956 if ((RD_HARPOON(ioport + hp_device_id_1) != ORION_DEV_1))
1504 return((int)FAILURE); 957 return (int)FAILURE;
1505 958
1506 959 if (RD_HARPOON(ioport + hp_rev_num) != 0x0f) {
1507 if (RD_HARPOON(ioport+hp_rev_num) != 0x0f){
1508 960
1509/* For new Harpoon then check for sub_device ID LSB 961/* For new Harpoon then check for sub_device ID LSB
1510 the bits(0-3) must be all ZERO for compatible with 962 the bits(0-3) must be all ZERO for compatible with
1511 current version of SCCBMgr, else skip this Harpoon 963 current version of SCCBMgr, else skip this Harpoon
1512 device. */ 964 device. */
1513 965
1514 if (RD_HARPOON(ioport+hp_sub_device_id_0) & 0x0f) 966 if (RD_HARPOON(ioport + hp_sub_device_id_0) & 0x0f)
1515 return((int)FAILURE); 967 return (int)FAILURE;
1516 } 968 }
1517 969
1518 if (first_time) 970 if (first_time) {
1519 { 971 FPT_SccbMgrTableInitAll();
1520 FPT_SccbMgrTableInitAll(); 972 first_time = 0;
1521 first_time = 0;
1522 FPT_mbCards = 0; 973 FPT_mbCards = 0;
1523 } 974 }
1524 975
1525 if(FPT_RdStack(ioport, 0) != 0x00) { 976 if (FPT_RdStack(ioport, 0) != 0x00) {
1526 if(FPT_ChkIfChipInitialized(ioport) == 0) 977 if (FPT_ChkIfChipInitialized(ioport) == 0) {
1527 {
1528 pCurrNvRam = NULL; 978 pCurrNvRam = NULL;
1529 WR_HARPOON(ioport+hp_semaphore, 0x00); 979 WR_HARPOON(ioport + hp_semaphore, 0x00);
1530 FPT_XbowInit(ioport, 0); /*Must Init the SCSI before attempting */ 980 FPT_XbowInit(ioport, 0); /*Must Init the SCSI before attempting */
1531 FPT_DiagEEPROM(ioport); 981 FPT_DiagEEPROM(ioport);
1532 } 982 } else {
1533 else 983 if (FPT_mbCards < MAX_MB_CARDS) {
1534 {
1535 if(FPT_mbCards < MAX_MB_CARDS) {
1536 pCurrNvRam = &FPT_nvRamInfo[FPT_mbCards]; 984 pCurrNvRam = &FPT_nvRamInfo[FPT_mbCards];
1537 FPT_mbCards++; 985 FPT_mbCards++;
1538 pCurrNvRam->niBaseAddr = ioport; 986 pCurrNvRam->niBaseAddr = ioport;
1539 FPT_RNVRamData(pCurrNvRam); 987 FPT_RNVRamData(pCurrNvRam);
1540 }else 988 } else
1541 return((int) FAILURE); 989 return (int)FAILURE;
1542 } 990 }
1543 }else 991 } else
1544 pCurrNvRam = NULL; 992 pCurrNvRam = NULL;
1545 993
1546 WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT); 994 WR_HARPOON(ioport + hp_clkctrl_0, CLKCTRL_DEFAULT);
1547 WR_HARPOON(ioport+hp_sys_ctrl, 0x00); 995 WR_HARPOON(ioport + hp_sys_ctrl, 0x00);
1548 996
1549 if(pCurrNvRam) 997 if (pCurrNvRam)
1550 pCardInfo->si_id = pCurrNvRam->niAdapId; 998 pCardInfo->si_id = pCurrNvRam->niAdapId;
1551 else 999 else
1552 pCardInfo->si_id = (UCHAR)(FPT_utilEERead(ioport, (ADAPTER_SCSI_ID/2)) & 1000 pCardInfo->si_id =
1553 (UCHAR)0x0FF); 1001 (unsigned
1002 char)(FPT_utilEERead(ioport,
1003 (ADAPTER_SCSI_ID /
1004 2)) & (unsigned char)0x0FF);
1005
1006 pCardInfo->si_lun = 0x00;
1007 pCardInfo->si_fw_revision = ORION_FW_REV;
1008 temp2 = 0x0000;
1009 temp3 = 0x0000;
1010 temp4 = 0x0000;
1011 temp5 = 0x0000;
1012 temp6 = 0x0000;
1013
1014 for (id = 0; id < (16 / 2); id++) {
1015
1016 if (pCurrNvRam) {
1017 temp = (unsigned short)pCurrNvRam->niSyncTbl[id];
1018 temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
1019 (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
1020 } else
1021 temp =
1022 FPT_utilEERead(ioport,
1023 (unsigned short)((SYNC_RATE_TBL / 2)
1024 + id));
1025
1026 for (i = 0; i < 2; temp >>= 8, i++) {
1027
1028 temp2 >>= 1;
1029 temp3 >>= 1;
1030 temp4 >>= 1;
1031 temp5 >>= 1;
1032 temp6 >>= 1;
1033 switch (temp & 0x3) {
1034 case AUTO_RATE_20: /* Synchronous, 20 mega-transfers/second */
1035 temp6 |= 0x8000; /* Fall through */
1036 case AUTO_RATE_10: /* Synchronous, 10 mega-transfers/second */
1037 temp5 |= 0x8000; /* Fall through */
1038 case AUTO_RATE_05: /* Synchronous, 5 mega-transfers/second */
1039 temp2 |= 0x8000; /* Fall through */
1040 case AUTO_RATE_00: /* Asynchronous */
1041 break;
1042 }
1554 1043
1555 pCardInfo->si_lun = 0x00; 1044 if (temp & DISC_ENABLE_BIT)
1556 pCardInfo->si_fw_revision = ORION_FW_REV; 1045 temp3 |= 0x8000;
1557 temp2 = 0x0000;
1558 temp3 = 0x0000;
1559 temp4 = 0x0000;
1560 temp5 = 0x0000;
1561 temp6 = 0x0000;
1562 1046
1563 for (id = 0; id < (16/2); id++) { 1047 if (temp & WIDE_NEGO_BIT)
1048 temp4 |= 0x8000;
1564 1049
1565 if(pCurrNvRam){ 1050 }
1566 temp = (USHORT) pCurrNvRam->niSyncTbl[id]; 1051 }
1567 temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
1568 (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
1569 }else
1570 temp = FPT_utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id));
1571
1572 for (i = 0; i < 2; temp >>=8,i++) {
1573
1574 temp2 >>= 1;
1575 temp3 >>= 1;
1576 temp4 >>= 1;
1577 temp5 >>= 1;
1578 temp6 >>= 1;
1579 switch (temp & 0x3)
1580 {
1581 case AUTO_RATE_20: /* Synchronous, 20 mega-transfers/second */
1582 temp6 |= 0x8000; /* Fall through */
1583 case AUTO_RATE_10: /* Synchronous, 10 mega-transfers/second */
1584 temp5 |= 0x8000; /* Fall through */
1585 case AUTO_RATE_05: /* Synchronous, 5 mega-transfers/second */
1586 temp2 |= 0x8000; /* Fall through */
1587 case AUTO_RATE_00: /* Asynchronous */
1588 break;
1589 }
1590
1591 if (temp & DISC_ENABLE_BIT)
1592 temp3 |= 0x8000;
1593
1594 if (temp & WIDE_NEGO_BIT)
1595 temp4 |= 0x8000;
1596
1597 }
1598 }
1599 1052
1600 pCardInfo->si_per_targ_init_sync = temp2; 1053 pCardInfo->si_per_targ_init_sync = temp2;
1601 pCardInfo->si_per_targ_no_disc = temp3; 1054 pCardInfo->si_per_targ_no_disc = temp3;
1602 pCardInfo->si_per_targ_wide_nego = temp4; 1055 pCardInfo->si_per_targ_wide_nego = temp4;
1603 pCardInfo->si_per_targ_fast_nego = temp5; 1056 pCardInfo->si_per_targ_fast_nego = temp5;
1604 pCardInfo->si_per_targ_ultra_nego = temp6; 1057 pCardInfo->si_per_targ_ultra_nego = temp6;
1605 1058
1606 if(pCurrNvRam) 1059 if (pCurrNvRam)
1607 i = pCurrNvRam->niSysConf; 1060 i = pCurrNvRam->niSysConf;
1608 else 1061 else
1609 i = (UCHAR)(FPT_utilEERead(ioport, (SYSTEM_CONFIG/2))); 1062 i = (unsigned
1063 char)(FPT_utilEERead(ioport, (SYSTEM_CONFIG / 2)));
1610 1064
1611 if(pCurrNvRam) 1065 if (pCurrNvRam)
1612 ScamFlg = pCurrNvRam->niScamConf; 1066 ScamFlg = pCurrNvRam->niScamConf;
1613 else 1067 else
1614 ScamFlg = (UCHAR) FPT_utilEERead(ioport, SCAM_CONFIG/2); 1068 ScamFlg =
1069 (unsigned char)FPT_utilEERead(ioport, SCAM_CONFIG / 2);
1615 1070
1616 pCardInfo->si_flags = 0x0000; 1071 pCardInfo->si_flags = 0x0000;
1617 1072
1618 if (i & 0x01) 1073 if (i & 0x01)
1619 pCardInfo->si_flags |= SCSI_PARITY_ENA; 1074 pCardInfo->si_flags |= SCSI_PARITY_ENA;
1620 1075
1621 if (!(i & 0x02)) 1076 if (!(i & 0x02))
1622 pCardInfo->si_flags |= SOFT_RESET; 1077 pCardInfo->si_flags |= SOFT_RESET;
1623 1078
1624 if (i & 0x10) 1079 if (i & 0x10)
1625 pCardInfo->si_flags |= EXTENDED_TRANSLATION; 1080 pCardInfo->si_flags |= EXTENDED_TRANSLATION;
1626 1081
1627 if (ScamFlg & SCAM_ENABLED) 1082 if (ScamFlg & SCAM_ENABLED)
1628 pCardInfo->si_flags |= FLAG_SCAM_ENABLED; 1083 pCardInfo->si_flags |= FLAG_SCAM_ENABLED;
1629 1084
1630 if (ScamFlg & SCAM_LEVEL2) 1085 if (ScamFlg & SCAM_LEVEL2)
1631 pCardInfo->si_flags |= FLAG_SCAM_LEVEL2; 1086 pCardInfo->si_flags |= FLAG_SCAM_LEVEL2;
1632 1087
1633 j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L); 1088 j = (RD_HARPOON(ioport + hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
1634 if (i & 0x04) { 1089 if (i & 0x04) {
1635 j |= SCSI_TERM_ENA_L; 1090 j |= SCSI_TERM_ENA_L;
1636 } 1091 }
1637 WR_HARPOON(ioport+hp_bm_ctrl, j ); 1092 WR_HARPOON(ioport + hp_bm_ctrl, j);
1638 1093
1639 j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H); 1094 j = (RD_HARPOON(ioport + hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
1640 if (i & 0x08) { 1095 if (i & 0x08) {
1641 j |= SCSI_TERM_ENA_H; 1096 j |= SCSI_TERM_ENA_H;
1642 } 1097 }
1643 WR_HARPOON(ioport+hp_ee_ctrl, j ); 1098 WR_HARPOON(ioport + hp_ee_ctrl, j);
1099
1100 if (!(RD_HARPOON(ioport + hp_page_ctrl) & NARROW_SCSI_CARD))
1101
1102 pCardInfo->si_flags |= SUPPORT_16TAR_32LUN;
1103
1104 pCardInfo->si_card_family = HARPOON_FAMILY;
1105 pCardInfo->si_bustype = BUSTYPE_PCI;
1106
1107 if (pCurrNvRam) {
1108 pCardInfo->si_card_model[0] = '9';
1109 switch (pCurrNvRam->niModel & 0x0f) {
1110 case MODEL_LT:
1111 pCardInfo->si_card_model[1] = '3';
1112 pCardInfo->si_card_model[2] = '0';
1113 break;
1114 case MODEL_LW:
1115 pCardInfo->si_card_model[1] = '5';
1116 pCardInfo->si_card_model[2] = '0';
1117 break;
1118 case MODEL_DL:
1119 pCardInfo->si_card_model[1] = '3';
1120 pCardInfo->si_card_model[2] = '2';
1121 break;
1122 case MODEL_DW:
1123 pCardInfo->si_card_model[1] = '5';
1124 pCardInfo->si_card_model[2] = '2';
1125 break;
1126 }
1127 } else {
1128 temp = FPT_utilEERead(ioport, (MODEL_NUMB_0 / 2));
1129 pCardInfo->si_card_model[0] = (unsigned char)(temp >> 8);
1130 temp = FPT_utilEERead(ioport, (MODEL_NUMB_2 / 2));
1644 1131
1645 if (!(RD_HARPOON(ioport+hp_page_ctrl) & NARROW_SCSI_CARD)) 1132 pCardInfo->si_card_model[1] = (unsigned char)(temp & 0x00FF);
1133 pCardInfo->si_card_model[2] = (unsigned char)(temp >> 8);
1134 }
1646 1135
1647 pCardInfo->si_flags |= SUPPORT_16TAR_32LUN; 1136 if (pCardInfo->si_card_model[1] == '3') {
1137 if (RD_HARPOON(ioport + hp_ee_ctrl) & BIT(7))
1138 pCardInfo->si_flags |= LOW_BYTE_TERM;
1139 } else if (pCardInfo->si_card_model[2] == '0') {
1140 temp = RD_HARPOON(ioport + hp_xfer_pad);
1141 WR_HARPOON(ioport + hp_xfer_pad, (temp & ~BIT(4)));
1142 if (RD_HARPOON(ioport + hp_ee_ctrl) & BIT(7))
1143 pCardInfo->si_flags |= LOW_BYTE_TERM;
1144 WR_HARPOON(ioport + hp_xfer_pad, (temp | BIT(4)));
1145 if (RD_HARPOON(ioport + hp_ee_ctrl) & BIT(7))
1146 pCardInfo->si_flags |= HIGH_BYTE_TERM;
1147 WR_HARPOON(ioport + hp_xfer_pad, temp);
1148 } else {
1149 temp = RD_HARPOON(ioport + hp_ee_ctrl);
1150 temp2 = RD_HARPOON(ioport + hp_xfer_pad);
1151 WR_HARPOON(ioport + hp_ee_ctrl, (temp | SEE_CS));
1152 WR_HARPOON(ioport + hp_xfer_pad, (temp2 | BIT(4)));
1153 temp3 = 0;
1154 for (i = 0; i < 8; i++) {
1155 temp3 <<= 1;
1156 if (!(RD_HARPOON(ioport + hp_ee_ctrl) & BIT(7)))
1157 temp3 |= 1;
1158 WR_HARPOON(ioport + hp_xfer_pad, (temp2 & ~BIT(4)));
1159 WR_HARPOON(ioport + hp_xfer_pad, (temp2 | BIT(4)));
1160 }
1161 WR_HARPOON(ioport + hp_ee_ctrl, temp);
1162 WR_HARPOON(ioport + hp_xfer_pad, temp2);
1163 if (!(temp3 & BIT(7)))
1164 pCardInfo->si_flags |= LOW_BYTE_TERM;
1165 if (!(temp3 & BIT(6)))
1166 pCardInfo->si_flags |= HIGH_BYTE_TERM;
1167 }
1648 1168
1649 pCardInfo->si_card_family = HARPOON_FAMILY; 1169 ARAM_ACCESS(ioport);
1650 pCardInfo->si_bustype = BUSTYPE_PCI;
1651 1170
1652 if(pCurrNvRam){ 1171 for (i = 0; i < 4; i++) {
1653 pCardInfo->si_card_model[0] = '9'; 1172
1654 switch(pCurrNvRam->niModel & 0x0f){ 1173 pCardInfo->si_XlatInfo[i] =
1655 case MODEL_LT: 1174 RD_HARPOON(ioport + hp_aramBase + BIOS_DATA_OFFSET + i);
1656 pCardInfo->si_card_model[1] = '3'; 1175 }
1657 pCardInfo->si_card_model[2] = '0';
1658 break;
1659 case MODEL_LW:
1660 pCardInfo->si_card_model[1] = '5';
1661 pCardInfo->si_card_model[2] = '0';
1662 break;
1663 case MODEL_DL:
1664 pCardInfo->si_card_model[1] = '3';
1665 pCardInfo->si_card_model[2] = '2';
1666 break;
1667 case MODEL_DW:
1668 pCardInfo->si_card_model[1] = '5';
1669 pCardInfo->si_card_model[2] = '2';
1670 break;
1671 }
1672 }else{
1673 temp = FPT_utilEERead(ioport, (MODEL_NUMB_0/2));
1674 pCardInfo->si_card_model[0] = (UCHAR)(temp >> 8);
1675 temp = FPT_utilEERead(ioport, (MODEL_NUMB_2/2));
1676
1677 pCardInfo->si_card_model[1] = (UCHAR)(temp & 0x00FF);
1678 pCardInfo->si_card_model[2] = (UCHAR)(temp >> 8);
1679 }
1680
1681 if (pCardInfo->si_card_model[1] == '3')
1682 {
1683 if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
1684 pCardInfo->si_flags |= LOW_BYTE_TERM;
1685 }
1686 else if (pCardInfo->si_card_model[2] == '0')
1687 {
1688 temp = RD_HARPOON(ioport+hp_xfer_pad);
1689 WR_HARPOON(ioport+hp_xfer_pad, (temp & ~BIT(4)));
1690 if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
1691 pCardInfo->si_flags |= LOW_BYTE_TERM;
1692 WR_HARPOON(ioport+hp_xfer_pad, (temp | BIT(4)));
1693 if (RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7))
1694 pCardInfo->si_flags |= HIGH_BYTE_TERM;
1695 WR_HARPOON(ioport+hp_xfer_pad, temp);
1696 }
1697 else
1698 {
1699 temp = RD_HARPOON(ioport+hp_ee_ctrl);
1700 temp2 = RD_HARPOON(ioport+hp_xfer_pad);
1701 WR_HARPOON(ioport+hp_ee_ctrl, (temp | SEE_CS));
1702 WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
1703 temp3 = 0;
1704 for (i = 0; i < 8; i++)
1705 {
1706 temp3 <<= 1;
1707 if (!(RD_HARPOON(ioport+hp_ee_ctrl) & BIT(7)))
1708 temp3 |= 1;
1709 WR_HARPOON(ioport+hp_xfer_pad, (temp2 & ~BIT(4)));
1710 WR_HARPOON(ioport+hp_xfer_pad, (temp2 | BIT(4)));
1711 }
1712 WR_HARPOON(ioport+hp_ee_ctrl, temp);
1713 WR_HARPOON(ioport+hp_xfer_pad, temp2);
1714 if (!(temp3 & BIT(7)))
1715 pCardInfo->si_flags |= LOW_BYTE_TERM;
1716 if (!(temp3 & BIT(6)))
1717 pCardInfo->si_flags |= HIGH_BYTE_TERM;
1718 }
1719
1720
1721 ARAM_ACCESS(ioport);
1722
1723 for ( i = 0; i < 4; i++ ) {
1724
1725 pCardInfo->si_XlatInfo[i] =
1726 RD_HARPOON(ioport+hp_aramBase+BIOS_DATA_OFFSET+i);
1727 }
1728 1176
1729 /* return with -1 if no sort, else return with 1177 /* return with -1 if no sort, else return with
1730 logical card number sorted by BIOS (zero-based) */ 1178 logical card number sorted by BIOS (zero-based) */
1731 1179
1732 pCardInfo->si_relative_cardnum = 1180 pCardInfo->si_relative_cardnum =
1733 (UCHAR)(RD_HARPOON(ioport+hp_aramBase+BIOS_RELATIVE_CARD)-1); 1181 (unsigned
1182 char)(RD_HARPOON(ioport + hp_aramBase + BIOS_RELATIVE_CARD) - 1);
1734 1183
1735 SGRAM_ACCESS(ioport); 1184 SGRAM_ACCESS(ioport);
1736 1185
1737 FPT_s_PhaseTbl[0] = FPT_phaseDataOut; 1186 FPT_s_PhaseTbl[0] = FPT_phaseDataOut;
1738 FPT_s_PhaseTbl[1] = FPT_phaseDataIn; 1187 FPT_s_PhaseTbl[1] = FPT_phaseDataIn;
1739 FPT_s_PhaseTbl[2] = FPT_phaseIllegal; 1188 FPT_s_PhaseTbl[2] = FPT_phaseIllegal;
1740 FPT_s_PhaseTbl[3] = FPT_phaseIllegal; 1189 FPT_s_PhaseTbl[3] = FPT_phaseIllegal;
1741 FPT_s_PhaseTbl[4] = FPT_phaseCommand; 1190 FPT_s_PhaseTbl[4] = FPT_phaseCommand;
1742 FPT_s_PhaseTbl[5] = FPT_phaseStatus; 1191 FPT_s_PhaseTbl[5] = FPT_phaseStatus;
1743 FPT_s_PhaseTbl[6] = FPT_phaseMsgOut; 1192 FPT_s_PhaseTbl[6] = FPT_phaseMsgOut;
1744 FPT_s_PhaseTbl[7] = FPT_phaseMsgIn; 1193 FPT_s_PhaseTbl[7] = FPT_phaseMsgIn;
1745 1194
1746 pCardInfo->si_present = 0x01; 1195 pCardInfo->si_present = 0x01;
1747 1196
1748 return(0); 1197 return 0;
1749} 1198}
1750 1199
1751
1752/*--------------------------------------------------------------------- 1200/*---------------------------------------------------------------------
1753 * 1201 *
1754 * Function: SccbMgr_config_adapter 1202 * Function: FlashPoint_HardwareResetHostAdapter
1755 * 1203 *
1756 * Description: Setup adapter for normal operation (hard reset). 1204 * Description: Setup adapter for normal operation (hard reset).
1757 * 1205 *
1758 *---------------------------------------------------------------------*/ 1206 *---------------------------------------------------------------------*/
1759 1207
1760static ULONG SccbMgr_config_adapter(PSCCBMGR_INFO pCardInfo) 1208static unsigned long FlashPoint_HardwareResetHostAdapter(struct sccb_mgr_info
1209 *pCardInfo)
1761{ 1210{
1762 PSCCBcard CurrCard = NULL; 1211 struct sccb_card *CurrCard = NULL;
1763 PNVRamInfo pCurrNvRam; 1212 struct nvram_info *pCurrNvRam;
1764 UCHAR i,j,thisCard, ScamFlg; 1213 unsigned char i, j, thisCard, ScamFlg;
1765 USHORT temp,sync_bit_map,id; 1214 unsigned short temp, sync_bit_map, id;
1766 ULONG ioport; 1215 unsigned long ioport;
1767 1216
1768 ioport = pCardInfo->si_baseaddr; 1217 ioport = pCardInfo->si_baseaddr;
1769 1218
1770 for(thisCard =0; thisCard <= MAX_CARDS; thisCard++) { 1219 for (thisCard = 0; thisCard <= MAX_CARDS; thisCard++) {
1771 1220
1772 if (thisCard == MAX_CARDS) { 1221 if (thisCard == MAX_CARDS) {
1773 1222
1774 return(FAILURE); 1223 return FAILURE;
1775 } 1224 }
1776 1225
1777 if (FPT_BL_Card[thisCard].ioPort == ioport) { 1226 if (FPT_BL_Card[thisCard].ioPort == ioport) {
1778 1227
1779 CurrCard = &FPT_BL_Card[thisCard]; 1228 CurrCard = &FPT_BL_Card[thisCard];
1780 FPT_SccbMgrTableInitCard(CurrCard,thisCard); 1229 FPT_SccbMgrTableInitCard(CurrCard, thisCard);
1781 break; 1230 break;
1782 } 1231 }
1783 1232
1784 else if (FPT_BL_Card[thisCard].ioPort == 0x00) { 1233 else if (FPT_BL_Card[thisCard].ioPort == 0x00) {
1785 1234
1786 FPT_BL_Card[thisCard].ioPort = ioport; 1235 FPT_BL_Card[thisCard].ioPort = ioport;
1787 CurrCard = &FPT_BL_Card[thisCard]; 1236 CurrCard = &FPT_BL_Card[thisCard];
1788 1237
1789 if(FPT_mbCards) 1238 if (FPT_mbCards)
1790 for(i = 0; i < FPT_mbCards; i++){ 1239 for (i = 0; i < FPT_mbCards; i++) {
1791 if(CurrCard->ioPort == FPT_nvRamInfo[i].niBaseAddr) 1240 if (CurrCard->ioPort ==
1792 CurrCard->pNvRamInfo = &FPT_nvRamInfo[i]; 1241 FPT_nvRamInfo[i].niBaseAddr)
1242 CurrCard->pNvRamInfo =
1243 &FPT_nvRamInfo[i];
1793 } 1244 }
1794 FPT_SccbMgrTableInitCard(CurrCard,thisCard); 1245 FPT_SccbMgrTableInitCard(CurrCard, thisCard);
1795 CurrCard->cardIndex = thisCard; 1246 CurrCard->cardIndex = thisCard;
1796 CurrCard->cardInfo = pCardInfo; 1247 CurrCard->cardInfo = pCardInfo;
1797 1248
1798 break; 1249 break;
1799 } 1250 }
1800 } 1251 }
1801 1252
1802 pCurrNvRam = CurrCard->pNvRamInfo; 1253 pCurrNvRam = CurrCard->pNvRamInfo;
1803 1254
1804 if(pCurrNvRam){ 1255 if (pCurrNvRam) {
1805 ScamFlg = pCurrNvRam->niScamConf; 1256 ScamFlg = pCurrNvRam->niScamConf;
1806 } 1257 } else {
1807 else{ 1258 ScamFlg =
1808 ScamFlg = (UCHAR) FPT_utilEERead(ioport, SCAM_CONFIG/2); 1259 (unsigned char)FPT_utilEERead(ioport, SCAM_CONFIG / 2);
1809 } 1260 }
1810 1261
1262 FPT_BusMasterInit(ioport);
1263 FPT_XbowInit(ioport, ScamFlg);
1811 1264
1812 FPT_BusMasterInit(ioport); 1265 FPT_autoLoadDefaultMap(ioport);
1813 FPT_XbowInit(ioport, ScamFlg);
1814 1266
1815 FPT_autoLoadDefaultMap(ioport); 1267 for (i = 0, id = 0x01; i != pCardInfo->si_id; i++, id <<= 1) {
1816 1268 }
1817
1818 for (i = 0,id = 0x01; i != pCardInfo->si_id; i++,id <<= 1){}
1819
1820 WR_HARPOON(ioport+hp_selfid_0, id);
1821 WR_HARPOON(ioport+hp_selfid_1, 0x00);
1822 WR_HARPOON(ioport+hp_arb_id, pCardInfo->si_id);
1823 CurrCard->ourId = pCardInfo->si_id;
1824
1825 i = (UCHAR) pCardInfo->si_flags;
1826 if (i & SCSI_PARITY_ENA)
1827 WR_HARPOON(ioport+hp_portctrl_1,(HOST_MODE8 | CHK_SCSI_P));
1828 1269
1829 j = (RD_HARPOON(ioport+hp_bm_ctrl) & ~SCSI_TERM_ENA_L); 1270 WR_HARPOON(ioport + hp_selfid_0, id);
1830 if (i & LOW_BYTE_TERM) 1271 WR_HARPOON(ioport + hp_selfid_1, 0x00);
1831 j |= SCSI_TERM_ENA_L; 1272 WR_HARPOON(ioport + hp_arb_id, pCardInfo->si_id);
1832 WR_HARPOON(ioport+hp_bm_ctrl, j); 1273 CurrCard->ourId = pCardInfo->si_id;
1833 1274
1834 j = (RD_HARPOON(ioport+hp_ee_ctrl) & ~SCSI_TERM_ENA_H); 1275 i = (unsigned char)pCardInfo->si_flags;
1835 if (i & HIGH_BYTE_TERM) 1276 if (i & SCSI_PARITY_ENA)
1836 j |= SCSI_TERM_ENA_H; 1277 WR_HARPOON(ioport + hp_portctrl_1, (HOST_MODE8 | CHK_SCSI_P));
1837 WR_HARPOON(ioport+hp_ee_ctrl, j );
1838 1278
1279 j = (RD_HARPOON(ioport + hp_bm_ctrl) & ~SCSI_TERM_ENA_L);
1280 if (i & LOW_BYTE_TERM)
1281 j |= SCSI_TERM_ENA_L;
1282 WR_HARPOON(ioport + hp_bm_ctrl, j);
1839 1283
1840 if (!(pCardInfo->si_flags & SOFT_RESET)) { 1284 j = (RD_HARPOON(ioport + hp_ee_ctrl) & ~SCSI_TERM_ENA_H);
1285 if (i & HIGH_BYTE_TERM)
1286 j |= SCSI_TERM_ENA_H;
1287 WR_HARPOON(ioport + hp_ee_ctrl, j);
1841 1288
1842 FPT_sresb(ioport,thisCard); 1289 if (!(pCardInfo->si_flags & SOFT_RESET)) {
1843
1844 FPT_scini(thisCard, pCardInfo->si_id, 0);
1845 }
1846 1290
1291 FPT_sresb(ioport, thisCard);
1847 1292
1293 FPT_scini(thisCard, pCardInfo->si_id, 0);
1294 }
1848 1295
1849 if (pCardInfo->si_flags & POST_ALL_UNDERRRUNS) 1296 if (pCardInfo->si_flags & POST_ALL_UNDERRRUNS)
1850 CurrCard->globalFlags |= F_NO_FILTER; 1297 CurrCard->globalFlags |= F_NO_FILTER;
1851 1298
1852 if(pCurrNvRam){ 1299 if (pCurrNvRam) {
1853 if(pCurrNvRam->niSysConf & 0x10) 1300 if (pCurrNvRam->niSysConf & 0x10)
1301 CurrCard->globalFlags |= F_GREEN_PC;
1302 } else {
1303 if (FPT_utilEERead(ioport, (SYSTEM_CONFIG / 2)) & GREEN_PC_ENA)
1854 CurrCard->globalFlags |= F_GREEN_PC; 1304 CurrCard->globalFlags |= F_GREEN_PC;
1855 }
1856 else{
1857 if (FPT_utilEERead(ioport, (SYSTEM_CONFIG/2)) & GREEN_PC_ENA)
1858 CurrCard->globalFlags |= F_GREEN_PC;
1859 } 1305 }
1860 1306
1861 /* Set global flag to indicate Re-Negotiation to be done on all 1307 /* Set global flag to indicate Re-Negotiation to be done on all
1862 ckeck condition */ 1308 ckeck condition */
1863 if(pCurrNvRam){ 1309 if (pCurrNvRam) {
1864 if(pCurrNvRam->niScsiConf & 0x04) 1310 if (pCurrNvRam->niScsiConf & 0x04)
1311 CurrCard->globalFlags |= F_DO_RENEGO;
1312 } else {
1313 if (FPT_utilEERead(ioport, (SCSI_CONFIG / 2)) & RENEGO_ENA)
1865 CurrCard->globalFlags |= F_DO_RENEGO; 1314 CurrCard->globalFlags |= F_DO_RENEGO;
1866 }
1867 else{
1868 if (FPT_utilEERead(ioport, (SCSI_CONFIG/2)) & RENEGO_ENA)
1869 CurrCard->globalFlags |= F_DO_RENEGO;
1870 } 1315 }
1871 1316
1872 if(pCurrNvRam){ 1317 if (pCurrNvRam) {
1873 if(pCurrNvRam->niScsiConf & 0x08) 1318 if (pCurrNvRam->niScsiConf & 0x08)
1319 CurrCard->globalFlags |= F_CONLUN_IO;
1320 } else {
1321 if (FPT_utilEERead(ioport, (SCSI_CONFIG / 2)) & CONNIO_ENA)
1874 CurrCard->globalFlags |= F_CONLUN_IO; 1322 CurrCard->globalFlags |= F_CONLUN_IO;
1875 }
1876 else{
1877 if (FPT_utilEERead(ioport, (SCSI_CONFIG/2)) & CONNIO_ENA)
1878 CurrCard->globalFlags |= F_CONLUN_IO;
1879 } 1323 }
1880 1324
1325 temp = pCardInfo->si_per_targ_no_disc;
1881 1326
1882 temp = pCardInfo->si_per_targ_no_disc; 1327 for (i = 0, id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) {
1883 1328
1884 for (i = 0,id = 1; i < MAX_SCSI_TAR; i++, id <<= 1) { 1329 if (temp & id)
1885 1330 FPT_sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
1886 if (temp & id) 1331 }
1887 FPT_sccbMgrTbl[thisCard][i].TarStatus |= TAR_ALLOW_DISC;
1888 }
1889 1332
1890 sync_bit_map = 0x0001; 1333 sync_bit_map = 0x0001;
1891 1334
1892 for (id = 0; id < (MAX_SCSI_TAR/2); id++) { 1335 for (id = 0; id < (MAX_SCSI_TAR / 2); id++) {
1893 1336
1894 if(pCurrNvRam){ 1337 if (pCurrNvRam) {
1895 temp = (USHORT) pCurrNvRam->niSyncTbl[id]; 1338 temp = (unsigned short)pCurrNvRam->niSyncTbl[id];
1896 temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) + 1339 temp = ((temp & 0x03) + ((temp << 4) & 0xc0)) +
1897 (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000)); 1340 (((temp << 4) & 0x0300) + ((temp << 8) & 0xc000));
1898 }else 1341 } else
1899 temp = FPT_utilEERead(ioport, (USHORT)((SYNC_RATE_TBL/2)+id)); 1342 temp =
1343 FPT_utilEERead(ioport,
1344 (unsigned short)((SYNC_RATE_TBL / 2)
1345 + id));
1900 1346
1901 for (i = 0; i < 2; temp >>=8,i++) { 1347 for (i = 0; i < 2; temp >>= 8, i++) {
1902 1348
1903 if (pCardInfo->si_per_targ_init_sync & sync_bit_map) { 1349 if (pCardInfo->si_per_targ_init_sync & sync_bit_map) {
1904 1350
1905 FPT_sccbMgrTbl[thisCard][id*2+i].TarEEValue = (UCHAR)temp; 1351 FPT_sccbMgrTbl[thisCard][id * 2 +
1906 } 1352 i].TarEEValue =
1353 (unsigned char)temp;
1354 }
1907 1355
1908 else { 1356 else {
1909 FPT_sccbMgrTbl[thisCard][id*2+i].TarStatus |= SYNC_SUPPORTED; 1357 FPT_sccbMgrTbl[thisCard][id * 2 +
1910 FPT_sccbMgrTbl[thisCard][id*2+i].TarEEValue = 1358 i].TarStatus |=
1911 (UCHAR)(temp & ~EE_SYNC_MASK); 1359 SYNC_SUPPORTED;
1912 } 1360 FPT_sccbMgrTbl[thisCard][id * 2 +
1361 i].TarEEValue =
1362 (unsigned char)(temp & ~EE_SYNC_MASK);
1363 }
1913 1364
1914/* if ((pCardInfo->si_per_targ_wide_nego & sync_bit_map) || 1365/* if ((pCardInfo->si_per_targ_wide_nego & sync_bit_map) ||
1915 (id*2+i >= 8)){ 1366 (id*2+i >= 8)){
1916*/ 1367*/
1917 if (pCardInfo->si_per_targ_wide_nego & sync_bit_map){ 1368 if (pCardInfo->si_per_targ_wide_nego & sync_bit_map) {
1918
1919 FPT_sccbMgrTbl[thisCard][id*2+i].TarEEValue |= EE_WIDE_SCSI;
1920
1921 }
1922
1923 else { /* NARROW SCSI */
1924 FPT_sccbMgrTbl[thisCard][id*2+i].TarStatus |= WIDE_NEGOCIATED;
1925 }
1926 1369
1370 FPT_sccbMgrTbl[thisCard][id * 2 +
1371 i].TarEEValue |=
1372 EE_WIDE_SCSI;
1927 1373
1928 sync_bit_map <<= 1; 1374 }
1929 1375
1376 else { /* NARROW SCSI */
1377 FPT_sccbMgrTbl[thisCard][id * 2 +
1378 i].TarStatus |=
1379 WIDE_NEGOCIATED;
1380 }
1930 1381
1382 sync_bit_map <<= 1;
1931 1383
1932 } 1384 }
1933 } 1385 }
1934 1386
1935 WR_HARPOON((ioport+hp_semaphore), 1387 WR_HARPOON((ioport + hp_semaphore),
1936 (UCHAR)(RD_HARPOON((ioport+hp_semaphore)) | SCCB_MGR_PRESENT)); 1388 (unsigned char)(RD_HARPOON((ioport + hp_semaphore)) |
1389 SCCB_MGR_PRESENT));
1937 1390
1938 return((ULONG)CurrCard); 1391 return (unsigned long)CurrCard;
1939} 1392}
1940 1393
1941static void SccbMgr_unload_card(ULONG pCurrCard) 1394static void FlashPoint_ReleaseHostAdapter(unsigned long pCurrCard)
1942{ 1395{
1943 UCHAR i; 1396 unsigned char i;
1944 ULONG portBase; 1397 unsigned long portBase;
1945 ULONG regOffset; 1398 unsigned long regOffset;
1946 ULONG scamData; 1399 unsigned long scamData;
1947 ULONG *pScamTbl; 1400 unsigned long *pScamTbl;
1948 PNVRamInfo pCurrNvRam; 1401 struct nvram_info *pCurrNvRam;
1949 1402
1950 pCurrNvRam = ((PSCCBcard)pCurrCard)->pNvRamInfo; 1403 pCurrNvRam = ((struct sccb_card *)pCurrCard)->pNvRamInfo;
1951 1404
1952 if(pCurrNvRam){ 1405 if (pCurrNvRam) {
1953 FPT_WrStack(pCurrNvRam->niBaseAddr, 0, pCurrNvRam->niModel); 1406 FPT_WrStack(pCurrNvRam->niBaseAddr, 0, pCurrNvRam->niModel);
1954 FPT_WrStack(pCurrNvRam->niBaseAddr, 1, pCurrNvRam->niSysConf); 1407 FPT_WrStack(pCurrNvRam->niBaseAddr, 1, pCurrNvRam->niSysConf);
1955 FPT_WrStack(pCurrNvRam->niBaseAddr, 2, pCurrNvRam->niScsiConf); 1408 FPT_WrStack(pCurrNvRam->niBaseAddr, 2, pCurrNvRam->niScsiConf);
1956 FPT_WrStack(pCurrNvRam->niBaseAddr, 3, pCurrNvRam->niScamConf); 1409 FPT_WrStack(pCurrNvRam->niBaseAddr, 3, pCurrNvRam->niScamConf);
1957 FPT_WrStack(pCurrNvRam->niBaseAddr, 4, pCurrNvRam->niAdapId); 1410 FPT_WrStack(pCurrNvRam->niBaseAddr, 4, pCurrNvRam->niAdapId);
1958 1411
1959 for(i = 0; i < MAX_SCSI_TAR / 2; i++) 1412 for (i = 0; i < MAX_SCSI_TAR / 2; i++)
1960 FPT_WrStack(pCurrNvRam->niBaseAddr, (UCHAR)(i+5), pCurrNvRam->niSyncTbl[i]); 1413 FPT_WrStack(pCurrNvRam->niBaseAddr,
1414 (unsigned char)(i + 5),
1415 pCurrNvRam->niSyncTbl[i]);
1961 1416
1962 portBase = pCurrNvRam->niBaseAddr; 1417 portBase = pCurrNvRam->niBaseAddr;
1963 1418
1964 for(i = 0; i < MAX_SCSI_TAR; i++){ 1419 for (i = 0; i < MAX_SCSI_TAR; i++) {
1965 regOffset = hp_aramBase + 64 + i*4; 1420 regOffset = hp_aramBase + 64 + i * 4;
1966 pScamTbl = (ULONG *) &pCurrNvRam->niScamTbl[i]; 1421 pScamTbl = (unsigned long *)&pCurrNvRam->niScamTbl[i];
1967 scamData = *pScamTbl; 1422 scamData = *pScamTbl;
1968 WR_HARP32(portBase, regOffset, scamData); 1423 WR_HARP32(portBase, regOffset, scamData);
1969 } 1424 }
1970 1425
1971 }else{ 1426 } else {
1972 FPT_WrStack(((PSCCBcard)pCurrCard)->ioPort, 0, 0); 1427 FPT_WrStack(((struct sccb_card *)pCurrCard)->ioPort, 0, 0);
1973 } 1428 }
1974} 1429}
1975 1430
1976 1431static void FPT_RNVRamData(struct nvram_info *pNvRamInfo)
1977static void FPT_RNVRamData(PNVRamInfo pNvRamInfo)
1978{ 1432{
1979 UCHAR i; 1433 unsigned char i;
1980 ULONG portBase; 1434 unsigned long portBase;
1981 ULONG regOffset; 1435 unsigned long regOffset;
1982 ULONG scamData; 1436 unsigned long scamData;
1983 ULONG *pScamTbl; 1437 unsigned long *pScamTbl;
1984 1438
1985 pNvRamInfo->niModel = FPT_RdStack(pNvRamInfo->niBaseAddr, 0); 1439 pNvRamInfo->niModel = FPT_RdStack(pNvRamInfo->niBaseAddr, 0);
1986 pNvRamInfo->niSysConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 1); 1440 pNvRamInfo->niSysConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 1);
1987 pNvRamInfo->niScsiConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 2); 1441 pNvRamInfo->niScsiConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 2);
1988 pNvRamInfo->niScamConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 3); 1442 pNvRamInfo->niScamConf = FPT_RdStack(pNvRamInfo->niBaseAddr, 3);
1989 pNvRamInfo->niAdapId = FPT_RdStack(pNvRamInfo->niBaseAddr, 4); 1443 pNvRamInfo->niAdapId = FPT_RdStack(pNvRamInfo->niBaseAddr, 4);
1990 1444
1991 for(i = 0; i < MAX_SCSI_TAR / 2; i++) 1445 for (i = 0; i < MAX_SCSI_TAR / 2; i++)
1992 pNvRamInfo->niSyncTbl[i] = FPT_RdStack(pNvRamInfo->niBaseAddr, (UCHAR)(i+5)); 1446 pNvRamInfo->niSyncTbl[i] =
1447 FPT_RdStack(pNvRamInfo->niBaseAddr, (unsigned char)(i + 5));
1993 1448
1994 portBase = pNvRamInfo->niBaseAddr; 1449 portBase = pNvRamInfo->niBaseAddr;
1995 1450
1996 for(i = 0; i < MAX_SCSI_TAR; i++){ 1451 for (i = 0; i < MAX_SCSI_TAR; i++) {
1997 regOffset = hp_aramBase + 64 + i*4; 1452 regOffset = hp_aramBase + 64 + i * 4;
1998 RD_HARP32(portBase, regOffset, scamData); 1453 RD_HARP32(portBase, regOffset, scamData);
1999 pScamTbl = (ULONG *) &pNvRamInfo->niScamTbl[i]; 1454 pScamTbl = (unsigned long *)&pNvRamInfo->niScamTbl[i];
2000 *pScamTbl = scamData; 1455 *pScamTbl = scamData;
2001 } 1456 }
2002 1457
2003} 1458}
2004 1459
2005static UCHAR FPT_RdStack(ULONG portBase, UCHAR index) 1460static unsigned char FPT_RdStack(unsigned long portBase, unsigned char index)
2006{ 1461{
2007 WR_HARPOON(portBase + hp_stack_addr, index); 1462 WR_HARPOON(portBase + hp_stack_addr, index);
2008 return(RD_HARPOON(portBase + hp_stack_data)); 1463 return RD_HARPOON(portBase + hp_stack_data);
2009} 1464}
2010 1465
2011static void FPT_WrStack(ULONG portBase, UCHAR index, UCHAR data) 1466static void FPT_WrStack(unsigned long portBase, unsigned char index,
1467 unsigned char data)
2012{ 1468{
2013 WR_HARPOON(portBase + hp_stack_addr, index); 1469 WR_HARPOON(portBase + hp_stack_addr, index);
2014 WR_HARPOON(portBase + hp_stack_data, data); 1470 WR_HARPOON(portBase + hp_stack_data, data);
2015} 1471}
2016 1472
2017 1473static unsigned char FPT_ChkIfChipInitialized(unsigned long ioPort)
2018static UCHAR FPT_ChkIfChipInitialized(ULONG ioPort)
2019{ 1474{
2020 if((RD_HARPOON(ioPort + hp_arb_id) & 0x0f) != FPT_RdStack(ioPort, 4)) 1475 if ((RD_HARPOON(ioPort + hp_arb_id) & 0x0f) != FPT_RdStack(ioPort, 4))
2021 return(0); 1476 return 0;
2022 if((RD_HARPOON(ioPort + hp_clkctrl_0) & CLKCTRL_DEFAULT) 1477 if ((RD_HARPOON(ioPort + hp_clkctrl_0) & CLKCTRL_DEFAULT)
2023 != CLKCTRL_DEFAULT) 1478 != CLKCTRL_DEFAULT)
2024 return(0); 1479 return 0;
2025 if((RD_HARPOON(ioPort + hp_seltimeout) == TO_250ms) || 1480 if ((RD_HARPOON(ioPort + hp_seltimeout) == TO_250ms) ||
2026 (RD_HARPOON(ioPort + hp_seltimeout) == TO_290ms)) 1481 (RD_HARPOON(ioPort + hp_seltimeout) == TO_290ms))
2027 return(1); 1482 return 1;
2028 return(0); 1483 return 0;
2029 1484
2030} 1485}
1486
2031/*--------------------------------------------------------------------- 1487/*---------------------------------------------------------------------
2032 * 1488 *
2033 * Function: SccbMgr_start_sccb 1489 * Function: FlashPoint_StartCCB
2034 * 1490 *
2035 * Description: Start a command pointed to by p_Sccb. When the 1491 * Description: Start a command pointed to by p_Sccb. When the
2036 * command is completed it will be returned via the 1492 * command is completed it will be returned via the
2037 * callback function. 1493 * callback function.
2038 * 1494 *
2039 *---------------------------------------------------------------------*/ 1495 *---------------------------------------------------------------------*/
2040static void SccbMgr_start_sccb(ULONG pCurrCard, PSCCB p_Sccb) 1496static void FlashPoint_StartCCB(unsigned long pCurrCard, struct sccb *p_Sccb)
2041{ 1497{
2042 ULONG ioport; 1498 unsigned long ioport;
2043 UCHAR thisCard, lun; 1499 unsigned char thisCard, lun;
2044 PSCCB pSaveSccb; 1500 struct sccb *pSaveSccb;
2045 CALL_BK_FN callback; 1501 CALL_BK_FN callback;
2046 1502
2047 thisCard = ((PSCCBcard) pCurrCard)->cardIndex; 1503 thisCard = ((struct sccb_card *)pCurrCard)->cardIndex;
2048 ioport = ((PSCCBcard) pCurrCard)->ioPort; 1504 ioport = ((struct sccb_card *)pCurrCard)->ioPort;
2049 1505
2050 if((p_Sccb->TargID > MAX_SCSI_TAR) || (p_Sccb->Lun > MAX_LUN)) 1506 if ((p_Sccb->TargID > MAX_SCSI_TAR) || (p_Sccb->Lun > MAX_LUN)) {
2051 {
2052 1507
2053 p_Sccb->HostStatus = SCCB_COMPLETE; 1508 p_Sccb->HostStatus = SCCB_COMPLETE;
2054 p_Sccb->SccbStatus = SCCB_ERROR; 1509 p_Sccb->SccbStatus = SCCB_ERROR;
2055 callback = (CALL_BK_FN)p_Sccb->SccbCallback; 1510 callback = (CALL_BK_FN) p_Sccb->SccbCallback;
2056 if (callback) 1511 if (callback)
2057 callback(p_Sccb); 1512 callback(p_Sccb);
2058 1513
2059 return; 1514 return;
2060 } 1515 }
2061 1516
2062 FPT_sinits(p_Sccb,thisCard); 1517 FPT_sinits(p_Sccb, thisCard);
2063 1518
1519 if (!((struct sccb_card *)pCurrCard)->cmdCounter) {
1520 WR_HARPOON(ioport + hp_semaphore,
1521 (RD_HARPOON(ioport + hp_semaphore)
1522 | SCCB_MGR_ACTIVE));
2064 1523
2065 if (!((PSCCBcard) pCurrCard)->cmdCounter) 1524 if (((struct sccb_card *)pCurrCard)->globalFlags & F_GREEN_PC) {
2066 { 1525 WR_HARPOON(ioport + hp_clkctrl_0, CLKCTRL_DEFAULT);
2067 WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore) 1526 WR_HARPOON(ioport + hp_sys_ctrl, 0x00);
2068 | SCCB_MGR_ACTIVE)); 1527 }
2069 1528 }
2070 if (((PSCCBcard) pCurrCard)->globalFlags & F_GREEN_PC)
2071 {
2072 WR_HARPOON(ioport+hp_clkctrl_0, CLKCTRL_DEFAULT);
2073 WR_HARPOON(ioport+hp_sys_ctrl, 0x00);
2074 }
2075 }
2076
2077 ((PSCCBcard)pCurrCard)->cmdCounter++;
2078
2079 if (RD_HARPOON(ioport+hp_semaphore) & BIOS_IN_USE) {
2080
2081 WR_HARPOON(ioport+hp_semaphore, (RD_HARPOON(ioport+hp_semaphore)
2082 | TICKLE_ME));
2083 if(p_Sccb->OperationCode == RESET_COMMAND)
2084 {
2085 pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
2086 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
2087 FPT_queueSelectFail(&FPT_BL_Card[thisCard], thisCard);
2088 ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
2089 }
2090 else
2091 {
2092 FPT_queueAddSccb(p_Sccb,thisCard);
2093 }
2094 }
2095 1529
2096 else if ((RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)) { 1530 ((struct sccb_card *)pCurrCard)->cmdCounter++;
1531
1532 if (RD_HARPOON(ioport + hp_semaphore) & BIOS_IN_USE) {
1533
1534 WR_HARPOON(ioport + hp_semaphore,
1535 (RD_HARPOON(ioport + hp_semaphore)
1536 | TICKLE_ME));
1537 if (p_Sccb->OperationCode == RESET_COMMAND) {
1538 pSaveSccb =
1539 ((struct sccb_card *)pCurrCard)->currentSCCB;
1540 ((struct sccb_card *)pCurrCard)->currentSCCB = p_Sccb;
1541 FPT_queueSelectFail(&FPT_BL_Card[thisCard], thisCard);
1542 ((struct sccb_card *)pCurrCard)->currentSCCB =
1543 pSaveSccb;
1544 } else {
1545 FPT_queueAddSccb(p_Sccb, thisCard);
1546 }
1547 }
2097 1548
2098 if(p_Sccb->OperationCode == RESET_COMMAND) 1549 else if ((RD_HARPOON(ioport + hp_page_ctrl) & G_INT_DISABLE)) {
2099 { 1550
2100 pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB; 1551 if (p_Sccb->OperationCode == RESET_COMMAND) {
2101 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb; 1552 pSaveSccb =
2102 FPT_queueSelectFail(&FPT_BL_Card[thisCard], thisCard); 1553 ((struct sccb_card *)pCurrCard)->currentSCCB;
2103 ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb; 1554 ((struct sccb_card *)pCurrCard)->currentSCCB = p_Sccb;
2104 } 1555 FPT_queueSelectFail(&FPT_BL_Card[thisCard], thisCard);
2105 else 1556 ((struct sccb_card *)pCurrCard)->currentSCCB =
2106 { 1557 pSaveSccb;
2107 FPT_queueAddSccb(p_Sccb,thisCard); 1558 } else {
2108 } 1559 FPT_queueAddSccb(p_Sccb, thisCard);
2109 } 1560 }
1561 }
2110 1562
2111 else { 1563 else {
2112 1564
2113 MDISABLE_INT(ioport); 1565 MDISABLE_INT(ioport);
2114 1566
2115 if((((PSCCBcard) pCurrCard)->globalFlags & F_CONLUN_IO) && 1567 if ((((struct sccb_card *)pCurrCard)->globalFlags & F_CONLUN_IO)
2116 ((FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 1568 &&
1569 ((FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].
1570 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
2117 lun = p_Sccb->Lun; 1571 lun = p_Sccb->Lun;
2118 else 1572 else
2119 lun = 0; 1573 lun = 0;
2120 if ((((PSCCBcard) pCurrCard)->currentSCCB == NULL) && 1574 if ((((struct sccb_card *)pCurrCard)->currentSCCB == NULL) &&
2121 (FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].TarSelQ_Cnt == 0) && 1575 (FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].TarSelQ_Cnt == 0)
2122 (FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].TarLUNBusy[lun] 1576 && (FPT_sccbMgrTbl[thisCard][p_Sccb->TargID].TarLUNBusy[lun]
2123 == 0)) { 1577 == 0)) {
2124
2125 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
2126 FPT_ssel(p_Sccb->SccbIOPort,thisCard);
2127 }
2128 1578
2129 else { 1579 ((struct sccb_card *)pCurrCard)->currentSCCB = p_Sccb;
2130 1580 FPT_ssel(p_Sccb->SccbIOPort, thisCard);
2131 if(p_Sccb->OperationCode == RESET_COMMAND) 1581 }
2132 {
2133 pSaveSccb = ((PSCCBcard) pCurrCard)->currentSCCB;
2134 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb;
2135 FPT_queueSelectFail(&FPT_BL_Card[thisCard], thisCard);
2136 ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSccb;
2137 }
2138 else
2139 {
2140 FPT_queueAddSccb(p_Sccb,thisCard);
2141 }
2142 }
2143 1582
1583 else {
1584
1585 if (p_Sccb->OperationCode == RESET_COMMAND) {
1586 pSaveSccb =
1587 ((struct sccb_card *)pCurrCard)->
1588 currentSCCB;
1589 ((struct sccb_card *)pCurrCard)->currentSCCB =
1590 p_Sccb;
1591 FPT_queueSelectFail(&FPT_BL_Card[thisCard],
1592 thisCard);
1593 ((struct sccb_card *)pCurrCard)->currentSCCB =
1594 pSaveSccb;
1595 } else {
1596 FPT_queueAddSccb(p_Sccb, thisCard);
1597 }
1598 }
2144 1599
2145 MENABLE_INT(ioport); 1600 MENABLE_INT(ioport);
2146 } 1601 }
2147 1602
2148} 1603}
2149 1604
2150
2151/*--------------------------------------------------------------------- 1605/*---------------------------------------------------------------------
2152 * 1606 *
2153 * Function: SccbMgr_abort_sccb 1607 * Function: FlashPoint_AbortCCB
2154 * 1608 *
2155 * Description: Abort the command pointed to by p_Sccb. When the 1609 * Description: Abort the command pointed to by p_Sccb. When the
2156 * command is completed it will be returned via the 1610 * command is completed it will be returned via the
2157 * callback function. 1611 * callback function.
2158 * 1612 *
2159 *---------------------------------------------------------------------*/ 1613 *---------------------------------------------------------------------*/
2160static int SccbMgr_abort_sccb(ULONG pCurrCard, PSCCB p_Sccb) 1614static int FlashPoint_AbortCCB(unsigned long pCurrCard, struct sccb *p_Sccb)
2161{ 1615{
2162 ULONG ioport; 1616 unsigned long ioport;
2163 1617
2164 UCHAR thisCard; 1618 unsigned char thisCard;
2165 CALL_BK_FN callback; 1619 CALL_BK_FN callback;
2166 UCHAR TID; 1620 unsigned char TID;
2167 PSCCB pSaveSCCB; 1621 struct sccb *pSaveSCCB;
2168 PSCCBMgr_tar_info currTar_Info; 1622 struct sccb_mgr_tar_info *currTar_Info;
2169
2170 1623
2171 ioport = ((PSCCBcard) pCurrCard)->ioPort; 1624 ioport = ((struct sccb_card *)pCurrCard)->ioPort;
2172 1625
2173 thisCard = ((PSCCBcard)pCurrCard)->cardIndex; 1626 thisCard = ((struct sccb_card *)pCurrCard)->cardIndex;
2174 1627
2175 if (!(RD_HARPOON(ioport+hp_page_ctrl) & G_INT_DISABLE)) 1628 if (!(RD_HARPOON(ioport + hp_page_ctrl) & G_INT_DISABLE)) {
2176 {
2177 1629
2178 if (FPT_queueFindSccb(p_Sccb,thisCard)) 1630 if (FPT_queueFindSccb(p_Sccb, thisCard)) {
2179 {
2180 1631
2181 ((PSCCBcard)pCurrCard)->cmdCounter--; 1632 ((struct sccb_card *)pCurrCard)->cmdCounter--;
2182 1633
2183 if (!((PSCCBcard)pCurrCard)->cmdCounter) 1634 if (!((struct sccb_card *)pCurrCard)->cmdCounter)
2184 WR_HARPOON(ioport+hp_semaphore,(RD_HARPOON(ioport+hp_semaphore) 1635 WR_HARPOON(ioport + hp_semaphore,
2185 & (UCHAR)(~(SCCB_MGR_ACTIVE | TICKLE_ME)) )); 1636 (RD_HARPOON(ioport + hp_semaphore)
1637 & (unsigned
1638 char)(~(SCCB_MGR_ACTIVE |
1639 TICKLE_ME))));
2186 1640
2187 p_Sccb->SccbStatus = SCCB_ABORT; 1641 p_Sccb->SccbStatus = SCCB_ABORT;
2188 callback = p_Sccb->SccbCallback; 1642 callback = p_Sccb->SccbCallback;
2189 callback(p_Sccb); 1643 callback(p_Sccb);
2190 1644
2191 return(0); 1645 return 0;
2192 } 1646 }
2193 1647
2194 else 1648 else {
2195 { 1649 if (((struct sccb_card *)pCurrCard)->currentSCCB ==
2196 if (((PSCCBcard)pCurrCard)->currentSCCB == p_Sccb) 1650 p_Sccb) {
2197 {
2198 p_Sccb->SccbStatus = SCCB_ABORT; 1651 p_Sccb->SccbStatus = SCCB_ABORT;
2199 return(0); 1652 return 0;
2200 1653
2201 } 1654 }
2202 1655
2203 else 1656 else {
2204 {
2205 1657
2206 TID = p_Sccb->TargID; 1658 TID = p_Sccb->TargID;
2207 1659
2208 1660 if (p_Sccb->Sccb_tag) {
2209 if(p_Sccb->Sccb_tag)
2210 {
2211 MDISABLE_INT(ioport); 1661 MDISABLE_INT(ioport);
2212 if (((PSCCBcard) pCurrCard)->discQ_Tbl[p_Sccb->Sccb_tag]==p_Sccb) 1662 if (((struct sccb_card *)pCurrCard)->
2213 { 1663 discQ_Tbl[p_Sccb->Sccb_tag] ==
1664 p_Sccb) {
2214 p_Sccb->SccbStatus = SCCB_ABORT; 1665 p_Sccb->SccbStatus = SCCB_ABORT;
2215 p_Sccb->Sccb_scsistat = ABORT_ST; 1666 p_Sccb->Sccb_scsistat =
2216 p_Sccb->Sccb_scsimsg = SMABORT_TAG; 1667 ABORT_ST;
2217 1668 p_Sccb->Sccb_scsimsg =
2218 if(((PSCCBcard) pCurrCard)->currentSCCB == NULL) 1669 SMABORT_TAG;
2219 { 1670
2220 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb; 1671 if (((struct sccb_card *)
2221 FPT_ssel(ioport, thisCard); 1672 pCurrCard)->currentSCCB ==
2222 } 1673 NULL) {
2223 else 1674 ((struct sccb_card *)
2224 { 1675 pCurrCard)->
2225 pSaveSCCB = ((PSCCBcard) pCurrCard)->currentSCCB; 1676 currentSCCB = p_Sccb;
2226 ((PSCCBcard) pCurrCard)->currentSCCB = p_Sccb; 1677 FPT_ssel(ioport,
2227 FPT_queueSelectFail((PSCCBcard) pCurrCard, thisCard); 1678 thisCard);
2228 ((PSCCBcard) pCurrCard)->currentSCCB = pSaveSCCB; 1679 } else {
1680 pSaveSCCB =
1681 ((struct sccb_card
1682 *)pCurrCard)->
1683 currentSCCB;
1684 ((struct sccb_card *)
1685 pCurrCard)->
1686 currentSCCB = p_Sccb;
1687 FPT_queueSelectFail((struct sccb_card *)pCurrCard, thisCard);
1688 ((struct sccb_card *)
1689 pCurrCard)->
1690 currentSCCB = pSaveSCCB;
2229 } 1691 }
2230 } 1692 }
2231 MENABLE_INT(ioport); 1693 MENABLE_INT(ioport);
2232 return(0); 1694 return 0;
2233 } 1695 } else {
2234 else 1696 currTar_Info =
2235 { 1697 &FPT_sccbMgrTbl[thisCard][p_Sccb->
2236 currTar_Info = &FPT_sccbMgrTbl[thisCard][p_Sccb->TargID]; 1698 TargID];
2237 1699
2238 if(FPT_BL_Card[thisCard].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_Sccb->Lun]] 1700 if (FPT_BL_Card[thisCard].
2239 == p_Sccb) 1701 discQ_Tbl[currTar_Info->
2240 { 1702 LunDiscQ_Idx[p_Sccb->Lun]]
1703 == p_Sccb) {
2241 p_Sccb->SccbStatus = SCCB_ABORT; 1704 p_Sccb->SccbStatus = SCCB_ABORT;
2242 return(0); 1705 return 0;
2243 } 1706 }
2244 } 1707 }
2245 } 1708 }
2246 } 1709 }
2247 } 1710 }
2248 return(-1); 1711 return -1;
2249} 1712}
2250 1713
2251
2252/*--------------------------------------------------------------------- 1714/*---------------------------------------------------------------------
2253 * 1715 *
2254 * Function: SccbMgr_my_int 1716 * Function: FlashPoint_InterruptPending
2255 * 1717 *
2256 * Description: Do a quick check to determine if there is a pending 1718 * Description: Do a quick check to determine if there is a pending
2257 * interrupt for this card and disable the IRQ Pin if so. 1719 * interrupt for this card and disable the IRQ Pin if so.
2258 * 1720 *
2259 *---------------------------------------------------------------------*/ 1721 *---------------------------------------------------------------------*/
2260static UCHAR SccbMgr_my_int(ULONG pCurrCard) 1722static unsigned char FlashPoint_InterruptPending(unsigned long pCurrCard)
2261{ 1723{
2262 ULONG ioport; 1724 unsigned long ioport;
2263 1725
2264 ioport = ((PSCCBcard)pCurrCard)->ioPort; 1726 ioport = ((struct sccb_card *)pCurrCard)->ioPort;
2265 1727
2266 if (RD_HARPOON(ioport+hp_int_status) & INT_ASSERTED) 1728 if (RD_HARPOON(ioport + hp_int_status) & INT_ASSERTED) {
2267 { 1729 return 1;
2268 return(1); 1730 }
2269 }
2270 1731
2271 else 1732 else
2272 1733
2273 return(0); 1734 return 0;
2274} 1735}
2275 1736
2276
2277
2278/*--------------------------------------------------------------------- 1737/*---------------------------------------------------------------------
2279 * 1738 *
2280 * Function: SccbMgr_isr 1739 * Function: FlashPoint_HandleInterrupt
2281 * 1740 *
2282 * Description: This is our entry point when an interrupt is generated 1741 * Description: This is our entry point when an interrupt is generated
2283 * by the card and the upper level driver passes it on to 1742 * by the card and the upper level driver passes it on to
2284 * us. 1743 * us.
2285 * 1744 *
2286 *---------------------------------------------------------------------*/ 1745 *---------------------------------------------------------------------*/
2287static int SccbMgr_isr(ULONG pCurrCard) 1746static int FlashPoint_HandleInterrupt(unsigned long pCurrCard)
2288{ 1747{
2289 PSCCB currSCCB; 1748 struct sccb *currSCCB;
2290 UCHAR thisCard,result,bm_status, bm_int_st; 1749 unsigned char thisCard, result, bm_status, bm_int_st;
2291 USHORT hp_int; 1750 unsigned short hp_int;
2292 UCHAR i, target; 1751 unsigned char i, target;
2293 ULONG ioport; 1752 unsigned long ioport;
2294 1753
2295 thisCard = ((PSCCBcard)pCurrCard)->cardIndex; 1754 thisCard = ((struct sccb_card *)pCurrCard)->cardIndex;
2296 ioport = ((PSCCBcard)pCurrCard)->ioPort; 1755 ioport = ((struct sccb_card *)pCurrCard)->ioPort;
2297
2298 MDISABLE_INT(ioport);
2299
2300 if ((bm_int_st=RD_HARPOON(ioport+hp_int_status)) & EXT_STATUS_ON)
2301 bm_status = RD_HARPOON(ioport+hp_ext_status) & (UCHAR)BAD_EXT_STATUS;
2302 else
2303 bm_status = 0;
2304 1756
2305 WR_HARPOON(ioport+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT)); 1757 MDISABLE_INT(ioport);
2306 1758
2307 while ((hp_int = RDW_HARPOON((ioport+hp_intstat)) & FPT_default_intena) | 1759 if ((bm_int_st = RD_HARPOON(ioport + hp_int_status)) & EXT_STATUS_ON)
2308 bm_status) 1760 bm_status =
2309 { 1761 RD_HARPOON(ioport +
1762 hp_ext_status) & (unsigned char)BAD_EXT_STATUS;
1763 else
1764 bm_status = 0;
2310 1765
2311 currSCCB = ((PSCCBcard)pCurrCard)->currentSCCB; 1766 WR_HARPOON(ioport + hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
2312 1767
2313 if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) { 1768 while ((hp_int =
2314 result = FPT_SccbMgr_bad_isr(ioport,thisCard,((PSCCBcard)pCurrCard),hp_int); 1769 RDW_HARPOON((ioport +
2315 WRW_HARPOON((ioport+hp_intstat), (FIFO | TIMEOUT | RESET | SCAM_SEL)); 1770 hp_intstat)) & FPT_default_intena) | bm_status) {
2316 bm_status = 0;
2317 1771
2318 if (result) { 1772 currSCCB = ((struct sccb_card *)pCurrCard)->currentSCCB;
2319 1773
2320 MENABLE_INT(ioport); 1774 if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) {
2321 return(result); 1775 result =
2322 } 1776 FPT_SccbMgr_bad_isr(ioport, thisCard,
2323 } 1777 ((struct sccb_card *)pCurrCard),
1778 hp_int);
1779 WRW_HARPOON((ioport + hp_intstat),
1780 (FIFO | TIMEOUT | RESET | SCAM_SEL));
1781 bm_status = 0;
2324 1782
1783 if (result) {
2325 1784
2326 else if (hp_int & ICMD_COMP) { 1785 MENABLE_INT(ioport);
1786 return result;
1787 }
1788 }
2327 1789
2328 if ( !(hp_int & BUS_FREE) ) { 1790 else if (hp_int & ICMD_COMP) {
2329 /* Wait for the BusFree before starting a new command. We 1791
2330 must also check for being reselected since the BusFree 1792 if (!(hp_int & BUS_FREE)) {
2331 may not show up if another device reselects us in 1.5us or 1793 /* Wait for the BusFree before starting a new command. We
2332 less. SRR Wednesday, 3/8/1995. 1794 must also check for being reselected since the BusFree
2333 */ 1795 may not show up if another device reselects us in 1.5us or
2334 while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL))) ; 1796 less. SRR Wednesday, 3/8/1995.
2335 } 1797 */
1798 while (!
1799 (RDW_HARPOON((ioport + hp_intstat)) &
1800 (BUS_FREE | RSEL))) ;
1801 }
2336 1802
2337 if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) 1803 if (((struct sccb_card *)pCurrCard)->
1804 globalFlags & F_HOST_XFER_ACT)
2338 1805
2339 FPT_phaseChkFifo(ioport, thisCard); 1806 FPT_phaseChkFifo(ioport, thisCard);
2340 1807
2341/* WRW_HARPOON((ioport+hp_intstat), 1808/* WRW_HARPOON((ioport+hp_intstat),
2342 (BUS_FREE | ICMD_COMP | ITAR_DISC | XFER_CNT_0)); 1809 (BUS_FREE | ICMD_COMP | ITAR_DISC | XFER_CNT_0));
2343 */ 1810 */
2344 1811
2345 WRW_HARPOON((ioport+hp_intstat), CLR_ALL_INT_1); 1812 WRW_HARPOON((ioport + hp_intstat), CLR_ALL_INT_1);
2346
2347 FPT_autoCmdCmplt(ioport,thisCard);
2348 1813
2349 } 1814 FPT_autoCmdCmplt(ioport, thisCard);
2350 1815
1816 }
2351 1817
2352 else if (hp_int & ITAR_DISC) 1818 else if (hp_int & ITAR_DISC) {
2353 {
2354
2355 if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) {
2356
2357 FPT_phaseChkFifo(ioport, thisCard);
2358
2359 }
2360
2361 if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR) {
2362
2363 WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
2364 currSCCB->Sccb_XferState |= F_NO_DATA_YET;
2365
2366 currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
2367 }
2368
2369 currSCCB->Sccb_scsistat = DISCONNECT_ST;
2370 FPT_queueDisconnect(currSCCB,thisCard);
2371
2372 /* Wait for the BusFree before starting a new command. We
2373 must also check for being reselected since the BusFree
2374 may not show up if another device reselects us in 1.5us or
2375 less. SRR Wednesday, 3/8/1995.
2376 */
2377 while (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)) &&
2378 !((RDW_HARPOON((ioport+hp_intstat)) & PHASE) &&
2379 RD_HARPOON((ioport+hp_scsisig)) ==
2380 (SCSI_BSY | SCSI_REQ | SCSI_CD | SCSI_MSG | SCSI_IOBIT))) ;
2381 1819
2382 /* 1820 if (((struct sccb_card *)pCurrCard)->
2383 The additional loop exit condition above detects a timing problem 1821 globalFlags & F_HOST_XFER_ACT) {
2384 with the revision D/E harpoon chips. The caller should reset the
2385 host adapter to recover when 0xFE is returned.
2386 */
2387 if (!(RDW_HARPOON((ioport+hp_intstat)) & (BUS_FREE | RSEL)))
2388 {
2389 MENABLE_INT(ioport);
2390 return 0xFE;
2391 }
2392 1822
2393 WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC)); 1823 FPT_phaseChkFifo(ioport, thisCard);
2394 1824
1825 }
2395 1826
2396 ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD; 1827 if (RD_HARPOON(ioport + hp_gp_reg_1) == SMSAVE_DATA_PTR) {
2397 1828
2398 } 1829 WR_HARPOON(ioport + hp_gp_reg_1, 0x00);
1830 currSCCB->Sccb_XferState |= F_NO_DATA_YET;
2399 1831
1832 currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
1833 }
2400 1834
2401 else if (hp_int & RSEL) { 1835 currSCCB->Sccb_scsistat = DISCONNECT_ST;
1836 FPT_queueDisconnect(currSCCB, thisCard);
1837
1838 /* Wait for the BusFree before starting a new command. We
1839 must also check for being reselected since the BusFree
1840 may not show up if another device reselects us in 1.5us or
1841 less. SRR Wednesday, 3/8/1995.
1842 */
1843 while (!
1844 (RDW_HARPOON((ioport + hp_intstat)) &
1845 (BUS_FREE | RSEL))
1846 && !((RDW_HARPOON((ioport + hp_intstat)) & PHASE)
1847 && RD_HARPOON((ioport + hp_scsisig)) ==
1848 (SCSI_BSY | SCSI_REQ | SCSI_CD | SCSI_MSG |
1849 SCSI_IOBIT))) ;
1850
1851 /*
1852 The additional loop exit condition above detects a timing problem
1853 with the revision D/E harpoon chips. The caller should reset the
1854 host adapter to recover when 0xFE is returned.
1855 */
1856 if (!
1857 (RDW_HARPOON((ioport + hp_intstat)) &
1858 (BUS_FREE | RSEL))) {
1859 MENABLE_INT(ioport);
1860 return 0xFE;
1861 }
2402 1862
2403 WRW_HARPOON((ioport+hp_intstat), (PROG_HLT | RSEL | PHASE | BUS_FREE)); 1863 WRW_HARPOON((ioport + hp_intstat),
1864 (BUS_FREE | ITAR_DISC));
2404 1865
2405 if (RDW_HARPOON((ioport+hp_intstat)) & ITAR_DISC) 1866 ((struct sccb_card *)pCurrCard)->globalFlags |=
2406 { 1867 F_NEW_SCCB_CMD;
2407 if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT)
2408 {
2409 FPT_phaseChkFifo(ioport, thisCard);
2410 }
2411 1868
2412 if (RD_HARPOON(ioport+hp_gp_reg_1) == SMSAVE_DATA_PTR) 1869 }
2413 {
2414 WR_HARPOON(ioport+hp_gp_reg_1, 0x00);
2415 currSCCB->Sccb_XferState |= F_NO_DATA_YET;
2416 currSCCB->Sccb_savedATC = currSCCB->Sccb_ATC;
2417 }
2418 1870
2419 WRW_HARPOON((ioport+hp_intstat), (BUS_FREE | ITAR_DISC)); 1871 else if (hp_int & RSEL) {
2420 currSCCB->Sccb_scsistat = DISCONNECT_ST;
2421 FPT_queueDisconnect(currSCCB,thisCard);
2422 }
2423 1872
2424 FPT_sres(ioport,thisCard,((PSCCBcard)pCurrCard)); 1873 WRW_HARPOON((ioport + hp_intstat),
2425 FPT_phaseDecode(ioport,thisCard); 1874 (PROG_HLT | RSEL | PHASE | BUS_FREE));
2426 1875
2427 } 1876 if (RDW_HARPOON((ioport + hp_intstat)) & ITAR_DISC) {
1877 if (((struct sccb_card *)pCurrCard)->
1878 globalFlags & F_HOST_XFER_ACT) {
1879 FPT_phaseChkFifo(ioport, thisCard);
1880 }
2428 1881
1882 if (RD_HARPOON(ioport + hp_gp_reg_1) ==
1883 SMSAVE_DATA_PTR) {
1884 WR_HARPOON(ioport + hp_gp_reg_1, 0x00);
1885 currSCCB->Sccb_XferState |=
1886 F_NO_DATA_YET;
1887 currSCCB->Sccb_savedATC =
1888 currSCCB->Sccb_ATC;
1889 }
2429 1890
2430 else if ((hp_int & IDO_STRT) && (!(hp_int & BUS_FREE))) 1891 WRW_HARPOON((ioport + hp_intstat),
2431 { 1892 (BUS_FREE | ITAR_DISC));
1893 currSCCB->Sccb_scsistat = DISCONNECT_ST;
1894 FPT_queueDisconnect(currSCCB, thisCard);
1895 }
2432 1896
2433 WRW_HARPOON((ioport+hp_intstat), (IDO_STRT | XFER_CNT_0)); 1897 FPT_sres(ioport, thisCard,
2434 FPT_phaseDecode(ioport,thisCard); 1898 ((struct sccb_card *)pCurrCard));
1899 FPT_phaseDecode(ioport, thisCard);
2435 1900
2436 } 1901 }
2437 1902
1903 else if ((hp_int & IDO_STRT) && (!(hp_int & BUS_FREE))) {
2438 1904
2439 else if ( (hp_int & IUNKWN) || (hp_int & PROG_HLT) ) 1905 WRW_HARPOON((ioport + hp_intstat),
2440 { 1906 (IDO_STRT | XFER_CNT_0));
2441 WRW_HARPOON((ioport+hp_intstat), (PHASE | IUNKWN | PROG_HLT)); 1907 FPT_phaseDecode(ioport, thisCard);
2442 if ((RD_HARPOON(ioport+hp_prgmcnt_0) & (UCHAR)0x3f)< (UCHAR)SELCHK)
2443 {
2444 FPT_phaseDecode(ioport,thisCard);
2445 }
2446 else
2447 {
2448 /* Harpoon problem some SCSI target device respond to selection
2449 with short BUSY pulse (<400ns) this will make the Harpoon is not able
2450 to latch the correct Target ID into reg. x53.
2451 The work around require to correct this reg. But when write to this
2452 reg. (0x53) also increment the FIFO write addr reg (0x6f), thus we
2453 need to read this reg first then restore it later. After update to 0x53 */
2454 1908
2455 i = (UCHAR)(RD_HARPOON(ioport+hp_fifowrite)); 1909 }
2456 target = (UCHAR)(RD_HARPOON(ioport+hp_gp_reg_3));
2457 WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) ID_UNLOCK);
2458 WR_HARPOON(ioport+hp_select_id, (UCHAR)(target | target<<4));
2459 WR_HARPOON(ioport+hp_xfer_pad, (UCHAR) 0x00);
2460 WR_HARPOON(ioport+hp_fifowrite, i);
2461 WR_HARPOON(ioport+hp_autostart_3, (AUTO_IMMED+TAG_STRT));
2462 }
2463 }
2464 1910
2465 else if (hp_int & XFER_CNT_0) { 1911 else if ((hp_int & IUNKWN) || (hp_int & PROG_HLT)) {
1912 WRW_HARPOON((ioport + hp_intstat),
1913 (PHASE | IUNKWN | PROG_HLT));
1914 if ((RD_HARPOON(ioport + hp_prgmcnt_0) & (unsigned char)
1915 0x3f) < (unsigned char)SELCHK) {
1916 FPT_phaseDecode(ioport, thisCard);
1917 } else {
1918 /* Harpoon problem some SCSI target device respond to selection
1919 with short BUSY pulse (<400ns) this will make the Harpoon is not able
1920 to latch the correct Target ID into reg. x53.
1921 The work around require to correct this reg. But when write to this
1922 reg. (0x53) also increment the FIFO write addr reg (0x6f), thus we
1923 need to read this reg first then restore it later. After update to 0x53 */
1924
1925 i = (unsigned
1926 char)(RD_HARPOON(ioport + hp_fifowrite));
1927 target =
1928 (unsigned
1929 char)(RD_HARPOON(ioport + hp_gp_reg_3));
1930 WR_HARPOON(ioport + hp_xfer_pad,
1931 (unsigned char)ID_UNLOCK);
1932 WR_HARPOON(ioport + hp_select_id,
1933 (unsigned char)(target | target <<
1934 4));
1935 WR_HARPOON(ioport + hp_xfer_pad,
1936 (unsigned char)0x00);
1937 WR_HARPOON(ioport + hp_fifowrite, i);
1938 WR_HARPOON(ioport + hp_autostart_3,
1939 (AUTO_IMMED + TAG_STRT));
1940 }
1941 }
2466 1942
2467 WRW_HARPOON((ioport+hp_intstat), XFER_CNT_0); 1943 else if (hp_int & XFER_CNT_0) {
2468 1944
2469 FPT_schkdd(ioport,thisCard); 1945 WRW_HARPOON((ioport + hp_intstat), XFER_CNT_0);
2470 1946
2471 } 1947 FPT_schkdd(ioport, thisCard);
2472 1948
1949 }
2473 1950
2474 else if (hp_int & BUS_FREE) { 1951 else if (hp_int & BUS_FREE) {
2475 1952
2476 WRW_HARPOON((ioport+hp_intstat), BUS_FREE); 1953 WRW_HARPOON((ioport + hp_intstat), BUS_FREE);
2477 1954
2478 if (((PSCCBcard)pCurrCard)->globalFlags & F_HOST_XFER_ACT) { 1955 if (((struct sccb_card *)pCurrCard)->
1956 globalFlags & F_HOST_XFER_ACT) {
2479 1957
2480 FPT_hostDataXferAbort(ioport,thisCard,currSCCB); 1958 FPT_hostDataXferAbort(ioport, thisCard,
2481 } 1959 currSCCB);
2482
2483 FPT_phaseBusFree(ioport,thisCard);
2484 } 1960 }
2485 1961
1962 FPT_phaseBusFree(ioport, thisCard);
1963 }
2486 1964
2487 else if (hp_int & ITICKLE) { 1965 else if (hp_int & ITICKLE) {
2488
2489 WRW_HARPOON((ioport+hp_intstat), ITICKLE);
2490 ((PSCCBcard)pCurrCard)->globalFlags |= F_NEW_SCCB_CMD;
2491 }
2492
2493
2494
2495 if (((PSCCBcard)pCurrCard)->globalFlags & F_NEW_SCCB_CMD) {
2496 1966
1967 WRW_HARPOON((ioport + hp_intstat), ITICKLE);
1968 ((struct sccb_card *)pCurrCard)->globalFlags |=
1969 F_NEW_SCCB_CMD;
1970 }
2497 1971
2498 ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD; 1972 if (((struct sccb_card *)pCurrCard)->
1973 globalFlags & F_NEW_SCCB_CMD) {
2499 1974
1975 ((struct sccb_card *)pCurrCard)->globalFlags &=
1976 ~F_NEW_SCCB_CMD;
2500 1977
2501 if (((PSCCBcard)pCurrCard)->currentSCCB == NULL) { 1978 if (((struct sccb_card *)pCurrCard)->currentSCCB ==
1979 NULL) {
2502 1980
2503 FPT_queueSearchSelect(((PSCCBcard)pCurrCard),thisCard); 1981 FPT_queueSearchSelect(((struct sccb_card *)
2504 } 1982 pCurrCard), thisCard);
1983 }
2505 1984
2506 if (((PSCCBcard)pCurrCard)->currentSCCB != NULL) { 1985 if (((struct sccb_card *)pCurrCard)->currentSCCB !=
2507 ((PSCCBcard)pCurrCard)->globalFlags &= ~F_NEW_SCCB_CMD; 1986 NULL) {
2508 FPT_ssel(ioport,thisCard); 1987 ((struct sccb_card *)pCurrCard)->globalFlags &=
2509 } 1988 ~F_NEW_SCCB_CMD;
1989 FPT_ssel(ioport, thisCard);
1990 }
2510 1991
2511 break; 1992 break;
2512 1993
2513 } 1994 }
2514 1995
2515 } /*end while */ 1996 } /*end while */
2516 1997
2517 MENABLE_INT(ioport); 1998 MENABLE_INT(ioport);
2518 1999
2519 return(0); 2000 return 0;
2520} 2001}
2521 2002
2522/*--------------------------------------------------------------------- 2003/*---------------------------------------------------------------------
@@ -2529,150 +2010,149 @@ static int SccbMgr_isr(ULONG pCurrCard)
2529 * processing time. 2010 * processing time.
2530 * 2011 *
2531 *---------------------------------------------------------------------*/ 2012 *---------------------------------------------------------------------*/
2532static UCHAR FPT_SccbMgr_bad_isr(ULONG p_port, UCHAR p_card, 2013static unsigned char FPT_SccbMgr_bad_isr(unsigned long p_port,
2533 PSCCBcard pCurrCard, USHORT p_int) 2014 unsigned char p_card,
2015 struct sccb_card *pCurrCard,
2016 unsigned short p_int)
2534{ 2017{
2535 UCHAR temp, ScamFlg; 2018 unsigned char temp, ScamFlg;
2536 PSCCBMgr_tar_info currTar_Info; 2019 struct sccb_mgr_tar_info *currTar_Info;
2537 PNVRamInfo pCurrNvRam; 2020 struct nvram_info *pCurrNvRam;
2538
2539 2021
2540 if (RD_HARPOON(p_port+hp_ext_status) & 2022 if (RD_HARPOON(p_port + hp_ext_status) &
2541 (BM_FORCE_OFF | PCI_DEV_TMOUT | BM_PARITY_ERR | PIO_OVERRUN) ) 2023 (BM_FORCE_OFF | PCI_DEV_TMOUT | BM_PARITY_ERR | PIO_OVERRUN)) {
2542 {
2543 2024
2544 if (pCurrCard->globalFlags & F_HOST_XFER_ACT) 2025 if (pCurrCard->globalFlags & F_HOST_XFER_ACT) {
2545 {
2546 2026
2547 FPT_hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB); 2027 FPT_hostDataXferAbort(p_port, p_card,
2548 } 2028 pCurrCard->currentSCCB);
2549 2029 }
2550 if (RD_HARPOON(p_port+hp_pci_stat_cfg) & REC_MASTER_ABORT)
2551
2552 {
2553 WR_HARPOON(p_port+hp_pci_stat_cfg,
2554 (RD_HARPOON(p_port+hp_pci_stat_cfg) & ~REC_MASTER_ABORT));
2555
2556 WR_HARPOON(p_port+hp_host_blk_cnt, 0x00);
2557
2558 }
2559
2560 if (pCurrCard->currentSCCB != NULL)
2561 {
2562 2030
2563 if (!pCurrCard->currentSCCB->HostStatus) 2031 if (RD_HARPOON(p_port + hp_pci_stat_cfg) & REC_MASTER_ABORT)
2564 pCurrCard->currentSCCB->HostStatus = SCCB_BM_ERR; 2032 {
2033 WR_HARPOON(p_port + hp_pci_stat_cfg,
2034 (RD_HARPOON(p_port + hp_pci_stat_cfg) &
2035 ~REC_MASTER_ABORT));
2565 2036
2566 FPT_sxfrp(p_port,p_card); 2037 WR_HARPOON(p_port + hp_host_blk_cnt, 0x00);
2567 2038
2568 temp = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) & 2039 }
2569 (EXT_ARB_ACK | SCSI_TERM_ENA_H));
2570 WR_HARPOON(p_port+hp_ee_ctrl, ((UCHAR)temp | SEE_MS | SEE_CS));
2571 WR_HARPOON(p_port+hp_ee_ctrl, temp);
2572 2040
2573 if (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET))) 2041 if (pCurrCard->currentSCCB != NULL) {
2574 {
2575 FPT_phaseDecode(p_port,p_card);
2576 }
2577 }
2578 }
2579 2042
2043 if (!pCurrCard->currentSCCB->HostStatus)
2044 pCurrCard->currentSCCB->HostStatus =
2045 SCCB_BM_ERR;
2580 2046
2581 else if (p_int & RESET) 2047 FPT_sxfrp(p_port, p_card);
2582 {
2583 2048
2584 WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT); 2049 temp = (unsigned char)(RD_HARPOON(p_port + hp_ee_ctrl) &
2585 WR_HARPOON(p_port+hp_sys_ctrl, 0x00); 2050 (EXT_ARB_ACK | SCSI_TERM_ENA_H));
2586 if (pCurrCard->currentSCCB != NULL) { 2051 WR_HARPOON(p_port + hp_ee_ctrl,
2052 ((unsigned char)temp | SEE_MS | SEE_CS));
2053 WR_HARPOON(p_port + hp_ee_ctrl, temp);
2587 2054
2588 if (pCurrCard->globalFlags & F_HOST_XFER_ACT) 2055 if (!
2056 (RDW_HARPOON((p_port + hp_intstat)) &
2057 (BUS_FREE | RESET))) {
2058 FPT_phaseDecode(p_port, p_card);
2059 }
2060 }
2061 }
2589 2062
2590 FPT_hostDataXferAbort(p_port,p_card, pCurrCard->currentSCCB); 2063 else if (p_int & RESET) {
2591 }
2592 2064
2065 WR_HARPOON(p_port + hp_clkctrl_0, CLKCTRL_DEFAULT);
2066 WR_HARPOON(p_port + hp_sys_ctrl, 0x00);
2067 if (pCurrCard->currentSCCB != NULL) {
2593 2068
2594 DISABLE_AUTO(p_port); 2069 if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
2595 2070
2596 FPT_sresb(p_port,p_card); 2071 FPT_hostDataXferAbort(p_port, p_card,
2072 pCurrCard->currentSCCB);
2073 }
2597 2074
2598 while(RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST) {} 2075 DISABLE_AUTO(p_port);
2599 2076
2600 pCurrNvRam = pCurrCard->pNvRamInfo; 2077 FPT_sresb(p_port, p_card);
2601 if(pCurrNvRam){
2602 ScamFlg = pCurrNvRam->niScamConf;
2603 }
2604 else{
2605 ScamFlg = (UCHAR) FPT_utilEERead(p_port, SCAM_CONFIG/2);
2606 }
2607 2078
2608 FPT_XbowInit(p_port, ScamFlg); 2079 while (RD_HARPOON(p_port + hp_scsictrl_0) & SCSI_RST) {
2080 }
2609 2081
2610 FPT_scini(p_card, pCurrCard->ourId, 0); 2082 pCurrNvRam = pCurrCard->pNvRamInfo;
2083 if (pCurrNvRam) {
2084 ScamFlg = pCurrNvRam->niScamConf;
2085 } else {
2086 ScamFlg =
2087 (unsigned char)FPT_utilEERead(p_port,
2088 SCAM_CONFIG / 2);
2089 }
2611 2090
2612 return(0xFF); 2091 FPT_XbowInit(p_port, ScamFlg);
2613 }
2614 2092
2093 FPT_scini(p_card, pCurrCard->ourId, 0);
2615 2094
2616 else if (p_int & FIFO) { 2095 return 0xFF;
2096 }
2617 2097
2618 WRW_HARPOON((p_port+hp_intstat), FIFO); 2098 else if (p_int & FIFO) {
2619 2099
2620 if (pCurrCard->currentSCCB != NULL) 2100 WRW_HARPOON((p_port + hp_intstat), FIFO);
2621 FPT_sxfrp(p_port,p_card);
2622 }
2623 2101
2624 else if (p_int & TIMEOUT) 2102 if (pCurrCard->currentSCCB != NULL)
2625 { 2103 FPT_sxfrp(p_port, p_card);
2104 }
2626 2105
2627 DISABLE_AUTO(p_port); 2106 else if (p_int & TIMEOUT) {
2628 2107
2629 WRW_HARPOON((p_port+hp_intstat), 2108 DISABLE_AUTO(p_port);
2630 (PROG_HLT | TIMEOUT | SEL |BUS_FREE | PHASE | IUNKWN));
2631 2109
2632 pCurrCard->currentSCCB->HostStatus = SCCB_SELECTION_TIMEOUT; 2110 WRW_HARPOON((p_port + hp_intstat),
2111 (PROG_HLT | TIMEOUT | SEL | BUS_FREE | PHASE |
2112 IUNKWN));
2633 2113
2114 pCurrCard->currentSCCB->HostStatus = SCCB_SELECTION_TIMEOUT;
2634 2115
2635 currTar_Info = &FPT_sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID]; 2116 currTar_Info =
2636 if((pCurrCard->globalFlags & F_CONLUN_IO) && 2117 &FPT_sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
2637 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 2118 if ((pCurrCard->globalFlags & F_CONLUN_IO)
2638 currTar_Info->TarLUNBusy[pCurrCard->currentSCCB->Lun] = 0; 2119 && ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) !=
2120 TAG_Q_TRYING))
2121 currTar_Info->TarLUNBusy[pCurrCard->currentSCCB->Lun] =
2122 0;
2639 else 2123 else
2640 currTar_Info->TarLUNBusy[0] = 0; 2124 currTar_Info->TarLUNBusy[0] = 0;
2641 2125
2126 if (currTar_Info->TarEEValue & EE_SYNC_MASK) {
2127 currTar_Info->TarSyncCtrl = 0;
2128 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
2129 }
2642 2130
2643 if (currTar_Info->TarEEValue & EE_SYNC_MASK) 2131 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) {
2644 { 2132 currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
2645 currTar_Info->TarSyncCtrl = 0; 2133 }
2646 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
2647 }
2648
2649 if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
2650 {
2651 currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
2652 }
2653 2134
2654 FPT_sssyncv(p_port, pCurrCard->currentSCCB->TargID, NARROW_SCSI,currTar_Info); 2135 FPT_sssyncv(p_port, pCurrCard->currentSCCB->TargID, NARROW_SCSI,
2136 currTar_Info);
2655 2137
2656 FPT_queueCmdComplete(pCurrCard, pCurrCard->currentSCCB, p_card); 2138 FPT_queueCmdComplete(pCurrCard, pCurrCard->currentSCCB, p_card);
2657 2139
2658 } 2140 }
2659 2141
2660 else if (p_int & SCAM_SEL) 2142 else if (p_int & SCAM_SEL) {
2661 {
2662 2143
2663 FPT_scarb(p_port,LEVEL2_TAR); 2144 FPT_scarb(p_port, LEVEL2_TAR);
2664 FPT_scsel(p_port); 2145 FPT_scsel(p_port);
2665 FPT_scasid(p_card, p_port); 2146 FPT_scasid(p_card, p_port);
2666 2147
2667 FPT_scbusf(p_port); 2148 FPT_scbusf(p_port);
2668 2149
2669 WRW_HARPOON((p_port+hp_intstat), SCAM_SEL); 2150 WRW_HARPOON((p_port + hp_intstat), SCAM_SEL);
2670 } 2151 }
2671 2152
2672 return(0x00); 2153 return 0x00;
2673} 2154}
2674 2155
2675
2676/*--------------------------------------------------------------------- 2156/*---------------------------------------------------------------------
2677 * 2157 *
2678 * Function: SccbMgrTableInit 2158 * Function: SccbMgrTableInit
@@ -2683,21 +2163,19 @@ static UCHAR FPT_SccbMgr_bad_isr(ULONG p_port, UCHAR p_card,
2683 2163
2684static void FPT_SccbMgrTableInitAll() 2164static void FPT_SccbMgrTableInitAll()
2685{ 2165{
2686 UCHAR thisCard; 2166 unsigned char thisCard;
2687 2167
2688 for (thisCard = 0; thisCard < MAX_CARDS; thisCard++) 2168 for (thisCard = 0; thisCard < MAX_CARDS; thisCard++) {
2689 { 2169 FPT_SccbMgrTableInitCard(&FPT_BL_Card[thisCard], thisCard);
2690 FPT_SccbMgrTableInitCard(&FPT_BL_Card[thisCard],thisCard);
2691 2170
2692 FPT_BL_Card[thisCard].ioPort = 0x00; 2171 FPT_BL_Card[thisCard].ioPort = 0x00;
2693 FPT_BL_Card[thisCard].cardInfo = NULL; 2172 FPT_BL_Card[thisCard].cardInfo = NULL;
2694 FPT_BL_Card[thisCard].cardIndex = 0xFF; 2173 FPT_BL_Card[thisCard].cardIndex = 0xFF;
2695 FPT_BL_Card[thisCard].ourId = 0x00; 2174 FPT_BL_Card[thisCard].ourId = 0x00;
2696 FPT_BL_Card[thisCard].pNvRamInfo = NULL; 2175 FPT_BL_Card[thisCard].pNvRamInfo = NULL;
2697 } 2176 }
2698} 2177}
2699 2178
2700
2701/*--------------------------------------------------------------------- 2179/*---------------------------------------------------------------------
2702 * 2180 *
2703 * Function: SccbMgrTableInit 2181 * Function: SccbMgrTableInit
@@ -2706,33 +2184,30 @@ static void FPT_SccbMgrTableInitAll()
2706 * 2184 *
2707 *---------------------------------------------------------------------*/ 2185 *---------------------------------------------------------------------*/
2708 2186
2709static void FPT_SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card) 2187static void FPT_SccbMgrTableInitCard(struct sccb_card *pCurrCard,
2188 unsigned char p_card)
2710{ 2189{
2711 UCHAR scsiID, qtag; 2190 unsigned char scsiID, qtag;
2712 2191
2713 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) 2192 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) {
2714 {
2715 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL; 2193 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL;
2716 } 2194 }
2717 2195
2718 for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++) 2196 for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++) {
2719 { 2197 FPT_sccbMgrTbl[p_card][scsiID].TarStatus = 0;
2720 FPT_sccbMgrTbl[p_card][scsiID].TarStatus = 0; 2198 FPT_sccbMgrTbl[p_card][scsiID].TarEEValue = 0;
2721 FPT_sccbMgrTbl[p_card][scsiID].TarEEValue = 0; 2199 FPT_SccbMgrTableInitTarget(p_card, scsiID);
2722 FPT_SccbMgrTableInitTarget(p_card, scsiID); 2200 }
2723 }
2724 2201
2725 pCurrCard->scanIndex = 0x00; 2202 pCurrCard->scanIndex = 0x00;
2726 pCurrCard->currentSCCB = NULL; 2203 pCurrCard->currentSCCB = NULL;
2727 pCurrCard->globalFlags = 0x00; 2204 pCurrCard->globalFlags = 0x00;
2728 pCurrCard->cmdCounter = 0x00; 2205 pCurrCard->cmdCounter = 0x00;
2729 pCurrCard->tagQ_Lst = 0x01; 2206 pCurrCard->tagQ_Lst = 0x01;
2730 pCurrCard->discQCount = 0; 2207 pCurrCard->discQCount = 0;
2731
2732 2208
2733} 2209}
2734 2210
2735
2736/*--------------------------------------------------------------------- 2211/*---------------------------------------------------------------------
2737 * 2212 *
2738 * Function: SccbMgrTableInit 2213 * Function: SccbMgrTableInit
@@ -2741,11 +2216,12 @@ static void FPT_SccbMgrTableInitCard(PSCCBcard pCurrCard, UCHAR p_card)
2741 * 2216 *
2742 *---------------------------------------------------------------------*/ 2217 *---------------------------------------------------------------------*/
2743 2218
2744static void FPT_SccbMgrTableInitTarget(UCHAR p_card, UCHAR target) 2219static void FPT_SccbMgrTableInitTarget(unsigned char p_card,
2220 unsigned char target)
2745{ 2221{
2746 2222
2747 UCHAR lun, qtag; 2223 unsigned char lun, qtag;
2748 PSCCBMgr_tar_info currTar_Info; 2224 struct sccb_mgr_tar_info *currTar_Info;
2749 2225
2750 currTar_Info = &FPT_sccbMgrTbl[p_card][target]; 2226 currTar_Info = &FPT_sccbMgrTbl[p_card][target];
2751 2227
@@ -2757,19 +2233,15 @@ static void FPT_SccbMgrTableInitTarget(UCHAR p_card, UCHAR target)
2757 currTar_Info->TarTagQ_Cnt = 0; 2233 currTar_Info->TarTagQ_Cnt = 0;
2758 currTar_Info->TarLUN_CA = 0; 2234 currTar_Info->TarLUN_CA = 0;
2759 2235
2760 2236 for (lun = 0; lun < MAX_LUN; lun++) {
2761 for (lun = 0; lun < MAX_LUN; lun++)
2762 {
2763 currTar_Info->TarLUNBusy[lun] = 0; 2237 currTar_Info->TarLUNBusy[lun] = 0;
2764 currTar_Info->LunDiscQ_Idx[lun] = 0; 2238 currTar_Info->LunDiscQ_Idx[lun] = 0;
2765 } 2239 }
2766 2240
2767 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) 2241 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) {
2768 { 2242 if (FPT_BL_Card[p_card].discQ_Tbl[qtag] != NULL) {
2769 if(FPT_BL_Card[p_card].discQ_Tbl[qtag] != NULL) 2243 if (FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID ==
2770 { 2244 target) {
2771 if(FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID == target)
2772 {
2773 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL; 2245 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL;
2774 FPT_BL_Card[p_card].discQCount--; 2246 FPT_BL_Card[p_card].discQCount--;
2775 } 2247 }
@@ -2777,7 +2249,6 @@ static void FPT_SccbMgrTableInitTarget(UCHAR p_card, UCHAR target)
2777 } 2249 }
2778} 2250}
2779 2251
2780
2781/*--------------------------------------------------------------------- 2252/*---------------------------------------------------------------------
2782 * 2253 *
2783 * Function: sfetm 2254 * Function: sfetm
@@ -2787,71 +2258,66 @@ static void FPT_SccbMgrTableInitTarget(UCHAR p_card, UCHAR target)
2787 * 2258 *
2788 *---------------------------------------------------------------------*/ 2259 *---------------------------------------------------------------------*/
2789 2260
2790static UCHAR FPT_sfm(ULONG port, PSCCB pCurrSCCB) 2261static unsigned char FPT_sfm(unsigned long port, struct sccb *pCurrSCCB)
2791{ 2262{
2792 UCHAR message; 2263 unsigned char message;
2793 USHORT TimeOutLoop; 2264 unsigned short TimeOutLoop;
2794 2265
2795 TimeOutLoop = 0; 2266 TimeOutLoop = 0;
2796 while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) && 2267 while ((!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) &&
2797 (TimeOutLoop++ < 20000) ){} 2268 (TimeOutLoop++ < 20000)) {
2798 2269 }
2799
2800 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT);
2801 2270
2802 message = RD_HARPOON(port+hp_scsidata_0); 2271 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
2803 2272
2804 WR_HARPOON(port+hp_scsisig, SCSI_ACK + S_MSGI_PH); 2273 message = RD_HARPOON(port + hp_scsidata_0);
2805 2274
2275 WR_HARPOON(port + hp_scsisig, SCSI_ACK + S_MSGI_PH);
2806 2276
2807 if (TimeOutLoop > 20000) 2277 if (TimeOutLoop > 20000)
2808 message = 0x00; /* force message byte = 0 if Time Out on Req */ 2278 message = 0x00; /* force message byte = 0 if Time Out on Req */
2809 2279
2810 if ((RDW_HARPOON((port+hp_intstat)) & PARITY) && 2280 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) &&
2811 (RD_HARPOON(port+hp_addstat) & SCSI_PAR_ERR)) 2281 (RD_HARPOON(port + hp_addstat) & SCSI_PAR_ERR)) {
2812 { 2282 WR_HARPOON(port + hp_scsisig, (SCSI_ACK + S_ILL_PH));
2813 WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH)); 2283 WR_HARPOON(port + hp_xferstat, 0);
2814 WR_HARPOON(port+hp_xferstat, 0); 2284 WR_HARPOON(port + hp_fiforead, 0);
2815 WR_HARPOON(port+hp_fiforead, 0); 2285 WR_HARPOON(port + hp_fifowrite, 0);
2816 WR_HARPOON(port+hp_fifowrite, 0); 2286 if (pCurrSCCB != NULL) {
2817 if (pCurrSCCB != NULL)
2818 {
2819 pCurrSCCB->Sccb_scsimsg = SMPARITY; 2287 pCurrSCCB->Sccb_scsimsg = SMPARITY;
2820 } 2288 }
2821 message = 0x00; 2289 message = 0x00;
2822 do 2290 do {
2823 {
2824 ACCEPT_MSG_ATN(port); 2291 ACCEPT_MSG_ATN(port);
2825 TimeOutLoop = 0; 2292 TimeOutLoop = 0;
2826 while( (!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) && 2293 while ((!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) &&
2827 (TimeOutLoop++ < 20000) ){} 2294 (TimeOutLoop++ < 20000)) {
2828 if (TimeOutLoop > 20000)
2829 {
2830 WRW_HARPOON((port+hp_intstat), PARITY);
2831 return(message);
2832 } 2295 }
2833 if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) != S_MSGI_PH) 2296 if (TimeOutLoop > 20000) {
2834 { 2297 WRW_HARPOON((port + hp_intstat), PARITY);
2835 WRW_HARPOON((port+hp_intstat), PARITY); 2298 return message;
2836 return(message);
2837 } 2299 }
2838 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 2300 if ((RD_HARPOON(port + hp_scsisig) & S_SCSI_PHZ) !=
2301 S_MSGI_PH) {
2302 WRW_HARPOON((port + hp_intstat), PARITY);
2303 return message;
2304 }
2305 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
2839 2306
2840 RD_HARPOON(port+hp_scsidata_0); 2307 RD_HARPOON(port + hp_scsidata_0);
2841 2308
2842 WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH)); 2309 WR_HARPOON(port + hp_scsisig, (SCSI_ACK + S_ILL_PH));
2843 2310
2844 }while(1); 2311 } while (1);
2845 2312
2846 } 2313 }
2847 WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH)); 2314 WR_HARPOON(port + hp_scsisig, (SCSI_ACK + S_ILL_PH));
2848 WR_HARPOON(port+hp_xferstat, 0); 2315 WR_HARPOON(port + hp_xferstat, 0);
2849 WR_HARPOON(port+hp_fiforead, 0); 2316 WR_HARPOON(port + hp_fiforead, 0);
2850 WR_HARPOON(port+hp_fifowrite, 0); 2317 WR_HARPOON(port + hp_fifowrite, 0);
2851 return(message); 2318 return message;
2852} 2319}
2853 2320
2854
2855/*--------------------------------------------------------------------- 2321/*---------------------------------------------------------------------
2856 * 2322 *
2857 * Function: FPT_ssel 2323 * Function: FPT_ssel
@@ -2860,102 +2326,90 @@ static UCHAR FPT_sfm(ULONG port, PSCCB pCurrSCCB)
2860 * 2326 *
2861 *---------------------------------------------------------------------*/ 2327 *---------------------------------------------------------------------*/
2862 2328
2863static void FPT_ssel(ULONG port, UCHAR p_card) 2329static void FPT_ssel(unsigned long port, unsigned char p_card)
2864{ 2330{
2865 2331
2866 UCHAR auto_loaded, i, target, *theCCB; 2332 unsigned char auto_loaded, i, target, *theCCB;
2867
2868 ULONG cdb_reg;
2869 PSCCBcard CurrCard;
2870 PSCCB currSCCB;
2871 PSCCBMgr_tar_info currTar_Info;
2872 UCHAR lastTag, lun;
2873 2333
2874 CurrCard = &FPT_BL_Card[p_card]; 2334 unsigned long cdb_reg;
2875 currSCCB = CurrCard->currentSCCB; 2335 struct sccb_card *CurrCard;
2876 target = currSCCB->TargID; 2336 struct sccb *currSCCB;
2877 currTar_Info = &FPT_sccbMgrTbl[p_card][target]; 2337 struct sccb_mgr_tar_info *currTar_Info;
2878 lastTag = CurrCard->tagQ_Lst; 2338 unsigned char lastTag, lun;
2879 2339
2880 ARAM_ACCESS(port); 2340 CurrCard = &FPT_BL_Card[p_card];
2341 currSCCB = CurrCard->currentSCCB;
2342 target = currSCCB->TargID;
2343 currTar_Info = &FPT_sccbMgrTbl[p_card][target];
2344 lastTag = CurrCard->tagQ_Lst;
2881 2345
2346 ARAM_ACCESS(port);
2882 2347
2883 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT) 2348 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
2884 currSCCB->ControlByte &= ~F_USE_CMD_Q; 2349 currSCCB->ControlByte &= ~F_USE_CMD_Q;
2885 2350
2886 if(((CurrCard->globalFlags & F_CONLUN_IO) && 2351 if (((CurrCard->globalFlags & F_CONLUN_IO) &&
2887 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 2352 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
2888 2353
2889 lun = currSCCB->Lun; 2354 lun = currSCCB->Lun;
2890 else 2355 else
2891 lun = 0; 2356 lun = 0;
2892 2357
2358 if (CurrCard->globalFlags & F_TAG_STARTED) {
2359 if (!(currSCCB->ControlByte & F_USE_CMD_Q)) {
2360 if ((currTar_Info->TarLUN_CA == 0)
2361 && ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
2362 == TAG_Q_TRYING)) {
2363
2364 if (currTar_Info->TarTagQ_Cnt != 0) {
2365 currTar_Info->TarLUNBusy[lun] = 1;
2366 FPT_queueSelectFail(CurrCard, p_card);
2367 SGRAM_ACCESS(port);
2368 return;
2369 }
2893 2370
2894 if (CurrCard->globalFlags & F_TAG_STARTED) 2371 else {
2895 { 2372 currTar_Info->TarLUNBusy[lun] = 1;
2896 if (!(currSCCB->ControlByte & F_USE_CMD_Q)) 2373 }
2897 {
2898 if ((currTar_Info->TarLUN_CA == 0)
2899 && ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
2900 == TAG_Q_TRYING))
2901 {
2902
2903 if (currTar_Info->TarTagQ_Cnt !=0)
2904 {
2905 currTar_Info->TarLUNBusy[lun] = 1;
2906 FPT_queueSelectFail(CurrCard,p_card);
2907 SGRAM_ACCESS(port);
2908 return;
2909 }
2910
2911 else {
2912 currTar_Info->TarLUNBusy[lun] = 1;
2913 }
2914
2915 } /*End non-tagged */
2916
2917 else {
2918 currTar_Info->TarLUNBusy[lun] = 1;
2919 }
2920
2921 } /*!Use cmd Q Tagged */
2922
2923 else {
2924 if (currTar_Info->TarLUN_CA == 1)
2925 {
2926 FPT_queueSelectFail(CurrCard,p_card);
2927 SGRAM_ACCESS(port);
2928 return;
2929 }
2930
2931 currTar_Info->TarLUNBusy[lun] = 1;
2932 2374
2933 } /*else use cmd Q tagged */ 2375 }
2376 /*End non-tagged */
2377 else {
2378 currTar_Info->TarLUNBusy[lun] = 1;
2379 }
2934 2380
2935 } /*if glob tagged started */ 2381 }
2382 /*!Use cmd Q Tagged */
2383 else {
2384 if (currTar_Info->TarLUN_CA == 1) {
2385 FPT_queueSelectFail(CurrCard, p_card);
2386 SGRAM_ACCESS(port);
2387 return;
2388 }
2936 2389
2937 else { 2390 currTar_Info->TarLUNBusy[lun] = 1;
2938 currTar_Info->TarLUNBusy[lun] = 1;
2939 }
2940 2391
2392 } /*else use cmd Q tagged */
2941 2393
2394 }
2395 /*if glob tagged started */
2396 else {
2397 currTar_Info->TarLUNBusy[lun] = 1;
2398 }
2942 2399
2943 if((((CurrCard->globalFlags & F_CONLUN_IO) && 2400 if ((((CurrCard->globalFlags & F_CONLUN_IO) &&
2944 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 2401 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
2945 || (!(currSCCB->ControlByte & F_USE_CMD_Q)))) 2402 || (!(currSCCB->ControlByte & F_USE_CMD_Q)))) {
2946 { 2403 if (CurrCard->discQCount >= QUEUE_DEPTH) {
2947 if(CurrCard->discQCount >= QUEUE_DEPTH)
2948 {
2949 currTar_Info->TarLUNBusy[lun] = 1; 2404 currTar_Info->TarLUNBusy[lun] = 1;
2950 FPT_queueSelectFail(CurrCard,p_card); 2405 FPT_queueSelectFail(CurrCard, p_card);
2951 SGRAM_ACCESS(port); 2406 SGRAM_ACCESS(port);
2952 return; 2407 return;
2953 } 2408 }
2954 for (i = 1; i < QUEUE_DEPTH; i++) 2409 for (i = 1; i < QUEUE_DEPTH; i++) {
2955 { 2410 if (++lastTag >= QUEUE_DEPTH)
2956 if (++lastTag >= QUEUE_DEPTH) lastTag = 1; 2411 lastTag = 1;
2957 if (CurrCard->discQ_Tbl[lastTag] == NULL) 2412 if (CurrCard->discQ_Tbl[lastTag] == NULL) {
2958 {
2959 CurrCard->tagQ_Lst = lastTag; 2413 CurrCard->tagQ_Lst = lastTag;
2960 currTar_Info->LunDiscQ_Idx[lun] = lastTag; 2414 currTar_Info->LunDiscQ_Idx[lun] = lastTag;
2961 CurrCard->discQ_Tbl[lastTag] = currSCCB; 2415 CurrCard->discQ_Tbl[lastTag] = currSCCB;
@@ -2963,206 +2417,206 @@ static void FPT_ssel(ULONG port, UCHAR p_card)
2963 break; 2417 break;
2964 } 2418 }
2965 } 2419 }
2966 if(i == QUEUE_DEPTH) 2420 if (i == QUEUE_DEPTH) {
2967 {
2968 currTar_Info->TarLUNBusy[lun] = 1; 2421 currTar_Info->TarLUNBusy[lun] = 1;
2969 FPT_queueSelectFail(CurrCard,p_card); 2422 FPT_queueSelectFail(CurrCard, p_card);
2970 SGRAM_ACCESS(port); 2423 SGRAM_ACCESS(port);
2971 return; 2424 return;
2972 } 2425 }
2973 } 2426 }
2974 2427
2428 auto_loaded = 0;
2975 2429
2430 WR_HARPOON(port + hp_select_id, target);
2431 WR_HARPOON(port + hp_gp_reg_3, target); /* Use by new automation logic */
2976 2432
2977 auto_loaded = 0; 2433 if (currSCCB->OperationCode == RESET_COMMAND) {
2978 2434 WRW_HARPOON((port + ID_MSG_STRT), (MPM_OP + AMSG_OUT +
2979 WR_HARPOON(port+hp_select_id, target); 2435 (currSCCB->
2980 WR_HARPOON(port+hp_gp_reg_3, target); /* Use by new automation logic */ 2436 Sccb_idmsg & ~DISC_PRIV)));
2981 2437
2982 if (currSCCB->OperationCode == RESET_COMMAND) { 2438 WRW_HARPOON((port + ID_MSG_STRT + 2), BRH_OP + ALWAYS + NP);
2983 WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+
2984 (currSCCB->Sccb_idmsg & ~DISC_PRIV)));
2985 2439
2986 WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+NP); 2440 currSCCB->Sccb_scsimsg = SMDEV_RESET;
2987 2441
2988 currSCCB->Sccb_scsimsg = SMDEV_RESET; 2442 WR_HARPOON(port + hp_autostart_3, (SELECT + SELCHK_STRT));
2443 auto_loaded = 1;
2444 currSCCB->Sccb_scsistat = SELECT_BDR_ST;
2989 2445
2990 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT)); 2446 if (currTar_Info->TarEEValue & EE_SYNC_MASK) {
2991 auto_loaded = 1; 2447 currTar_Info->TarSyncCtrl = 0;
2992 currSCCB->Sccb_scsistat = SELECT_BDR_ST; 2448 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
2993 2449 }
2994 if (currTar_Info->TarEEValue & EE_SYNC_MASK)
2995 {
2996 currTar_Info->TarSyncCtrl = 0;
2997 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
2998 }
2999 2450
3000 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) 2451 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) {
3001 { 2452 currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
3002 currTar_Info->TarStatus &= ~TAR_WIDE_MASK; 2453 }
3003 }
3004 2454
3005 FPT_sssyncv(port, target, NARROW_SCSI,currTar_Info); 2455 FPT_sssyncv(port, target, NARROW_SCSI, currTar_Info);
3006 FPT_SccbMgrTableInitTarget(p_card, target); 2456 FPT_SccbMgrTableInitTarget(p_card, target);
3007 2457
3008 } 2458 }
3009 2459
3010 else if(currSCCB->Sccb_scsistat == ABORT_ST) 2460 else if (currSCCB->Sccb_scsistat == ABORT_ST) {
3011 { 2461 WRW_HARPOON((port + ID_MSG_STRT), (MPM_OP + AMSG_OUT +
3012 WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+ 2462 (currSCCB->
3013 (currSCCB->Sccb_idmsg & ~DISC_PRIV))); 2463 Sccb_idmsg & ~DISC_PRIV)));
3014 2464
3015 WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ); 2465 WRW_HARPOON((port + ID_MSG_STRT + 2), BRH_OP + ALWAYS + CMDPZ);
3016 2466
3017 WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+ 2467 WRW_HARPOON((port + SYNC_MSGS + 0), (MPM_OP + AMSG_OUT +
3018 (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK) 2468 (((unsigned
3019 >> 6) | (UCHAR)0x20))); 2469 char)(currSCCB->
3020 WRW_HARPOON((port+SYNC_MSGS+2), 2470 ControlByte &
3021 (MPM_OP+AMSG_OUT+currSCCB->Sccb_tag)); 2471 TAG_TYPE_MASK)
3022 WRW_HARPOON((port+SYNC_MSGS+4), (BRH_OP+ALWAYS+NP )); 2472 >> 6) | (unsigned char)
2473 0x20)));
2474 WRW_HARPOON((port + SYNC_MSGS + 2),
2475 (MPM_OP + AMSG_OUT + currSCCB->Sccb_tag));
2476 WRW_HARPOON((port + SYNC_MSGS + 4), (BRH_OP + ALWAYS + NP));
3023 2477
3024 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT)); 2478 WR_HARPOON(port + hp_autostart_3, (SELECT + SELCHK_STRT));
3025 auto_loaded = 1; 2479 auto_loaded = 1;
3026
3027 }
3028
3029 else if (!(currTar_Info->TarStatus & WIDE_NEGOCIATED)) {
3030 auto_loaded = FPT_siwidn(port,p_card);
3031 currSCCB->Sccb_scsistat = SELECT_WN_ST;
3032 }
3033
3034 else if (!((currTar_Info->TarStatus & TAR_SYNC_MASK)
3035 == SYNC_SUPPORTED)) {
3036 auto_loaded = FPT_sisyncn(port,p_card, 0);
3037 currSCCB->Sccb_scsistat = SELECT_SN_ST;
3038 }
3039 2480
2481 }
3040 2482
3041 if (!auto_loaded) 2483 else if (!(currTar_Info->TarStatus & WIDE_NEGOCIATED)) {
3042 { 2484 auto_loaded = FPT_siwidn(port, p_card);
2485 currSCCB->Sccb_scsistat = SELECT_WN_ST;
2486 }
3043 2487
3044 if (currSCCB->ControlByte & F_USE_CMD_Q) 2488 else if (!((currTar_Info->TarStatus & TAR_SYNC_MASK)
3045 { 2489 == SYNC_SUPPORTED)) {
2490 auto_loaded = FPT_sisyncn(port, p_card, 0);
2491 currSCCB->Sccb_scsistat = SELECT_SN_ST;
2492 }
3046 2493
3047 CurrCard->globalFlags |= F_TAG_STARTED; 2494 if (!auto_loaded) {
3048 2495
3049 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) 2496 if (currSCCB->ControlByte & F_USE_CMD_Q) {
3050 == TAG_Q_REJECT)
3051 {
3052 currSCCB->ControlByte &= ~F_USE_CMD_Q;
3053 2497
3054 /* Fix up the start instruction with a jump to 2498 CurrCard->globalFlags |= F_TAG_STARTED;
3055 Non-Tag-CMD handling */
3056 WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD);
3057 2499
3058 WRW_HARPOON((port+NON_TAG_ID_MSG), 2500 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK)
3059 (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg)); 2501 == TAG_Q_REJECT) {
2502 currSCCB->ControlByte &= ~F_USE_CMD_Q;
3060 2503
3061 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT)); 2504 /* Fix up the start instruction with a jump to
2505 Non-Tag-CMD handling */
2506 WRW_HARPOON((port + ID_MSG_STRT),
2507 BRH_OP + ALWAYS + NTCMD);
3062 2508
3063 /* Setup our STATE so we know what happend when 2509 WRW_HARPOON((port + NON_TAG_ID_MSG),
3064 the wheels fall off. */ 2510 (MPM_OP + AMSG_OUT +
3065 currSCCB->Sccb_scsistat = SELECT_ST; 2511 currSCCB->Sccb_idmsg));
3066 2512
3067 currTar_Info->TarLUNBusy[lun] = 1; 2513 WR_HARPOON(port + hp_autostart_3,
3068 } 2514 (SELECT + SELCHK_STRT));
3069 2515
3070 else 2516 /* Setup our STATE so we know what happend when
3071 { 2517 the wheels fall off. */
3072 WRW_HARPOON((port+ID_MSG_STRT), (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg)); 2518 currSCCB->Sccb_scsistat = SELECT_ST;
3073 2519
3074 WRW_HARPOON((port+ID_MSG_STRT+2), (MPM_OP+AMSG_OUT+ 2520 currTar_Info->TarLUNBusy[lun] = 1;
3075 (((UCHAR)(currSCCB->ControlByte & TAG_TYPE_MASK) 2521 }
3076 >> 6) | (UCHAR)0x20)));
3077 2522
3078 for (i = 1; i < QUEUE_DEPTH; i++) 2523 else {
3079 { 2524 WRW_HARPOON((port + ID_MSG_STRT),
3080 if (++lastTag >= QUEUE_DEPTH) lastTag = 1; 2525 (MPM_OP + AMSG_OUT +
3081 if (CurrCard->discQ_Tbl[lastTag] == NULL) 2526 currSCCB->Sccb_idmsg));
3082 { 2527
3083 WRW_HARPOON((port+ID_MSG_STRT+6), 2528 WRW_HARPOON((port + ID_MSG_STRT + 2),
3084 (MPM_OP+AMSG_OUT+lastTag)); 2529 (MPM_OP + AMSG_OUT +
2530 (((unsigned char)(currSCCB->
2531 ControlByte &
2532 TAG_TYPE_MASK)
2533 >> 6) | (unsigned char)0x20)));
2534
2535 for (i = 1; i < QUEUE_DEPTH; i++) {
2536 if (++lastTag >= QUEUE_DEPTH)
2537 lastTag = 1;
2538 if (CurrCard->discQ_Tbl[lastTag] ==
2539 NULL) {
2540 WRW_HARPOON((port +
2541 ID_MSG_STRT + 6),
2542 (MPM_OP + AMSG_OUT +
2543 lastTag));
3085 CurrCard->tagQ_Lst = lastTag; 2544 CurrCard->tagQ_Lst = lastTag;
3086 currSCCB->Sccb_tag = lastTag; 2545 currSCCB->Sccb_tag = lastTag;
3087 CurrCard->discQ_Tbl[lastTag] = currSCCB; 2546 CurrCard->discQ_Tbl[lastTag] =
2547 currSCCB;
3088 CurrCard->discQCount++; 2548 CurrCard->discQCount++;
3089 break; 2549 break;
3090 } 2550 }
3091 } 2551 }
3092 2552
2553 if (i == QUEUE_DEPTH) {
2554 currTar_Info->TarLUNBusy[lun] = 1;
2555 FPT_queueSelectFail(CurrCard, p_card);
2556 SGRAM_ACCESS(port);
2557 return;
2558 }
3093 2559
3094 if ( i == QUEUE_DEPTH ) 2560 currSCCB->Sccb_scsistat = SELECT_Q_ST;
3095 {
3096 currTar_Info->TarLUNBusy[lun] = 1;
3097 FPT_queueSelectFail(CurrCard,p_card);
3098 SGRAM_ACCESS(port);
3099 return;
3100 }
3101
3102 currSCCB->Sccb_scsistat = SELECT_Q_ST;
3103
3104 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
3105 }
3106 }
3107
3108 else
3109 {
3110 2561
3111 WRW_HARPOON((port+ID_MSG_STRT),BRH_OP+ALWAYS+NTCMD); 2562 WR_HARPOON(port + hp_autostart_3,
2563 (SELECT + SELCHK_STRT));
2564 }
2565 }
3112 2566
3113 WRW_HARPOON((port+NON_TAG_ID_MSG), 2567 else {
3114 (MPM_OP+AMSG_OUT+currSCCB->Sccb_idmsg));
3115 2568
3116 currSCCB->Sccb_scsistat = SELECT_ST; 2569 WRW_HARPOON((port + ID_MSG_STRT),
2570 BRH_OP + ALWAYS + NTCMD);
3117 2571
3118 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT)); 2572 WRW_HARPOON((port + NON_TAG_ID_MSG),
3119 } 2573 (MPM_OP + AMSG_OUT + currSCCB->Sccb_idmsg));
3120 2574
2575 currSCCB->Sccb_scsistat = SELECT_ST;
3121 2576
3122 theCCB = (UCHAR *)&currSCCB->Cdb[0]; 2577 WR_HARPOON(port + hp_autostart_3,
2578 (SELECT + SELCHK_STRT));
2579 }
3123 2580
3124 cdb_reg = port + CMD_STRT; 2581 theCCB = (unsigned char *)&currSCCB->Cdb[0];
3125 2582
3126 for (i=0; i < currSCCB->CdbLength; i++) 2583 cdb_reg = port + CMD_STRT;
3127 {
3128 WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + *theCCB));
3129 cdb_reg +=2;
3130 theCCB++;
3131 }
3132 2584
3133 if (currSCCB->CdbLength != TWELVE_BYTE_CMD) 2585 for (i = 0; i < currSCCB->CdbLength; i++) {
3134 WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP)); 2586 WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + *theCCB));
2587 cdb_reg += 2;
2588 theCCB++;
2589 }
3135 2590
3136 } /* auto_loaded */ 2591 if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
2592 WRW_HARPOON(cdb_reg, (BRH_OP + ALWAYS + NP));
3137 2593
3138 WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00); 2594 }
3139 WR_HARPOON(port+hp_xferstat, 0x00); 2595 /* auto_loaded */
2596 WRW_HARPOON((port + hp_fiforead), (unsigned short)0x00);
2597 WR_HARPOON(port + hp_xferstat, 0x00);
3140 2598
3141 WRW_HARPOON((port+hp_intstat), (PROG_HLT | TIMEOUT | SEL | BUS_FREE)); 2599 WRW_HARPOON((port + hp_intstat), (PROG_HLT | TIMEOUT | SEL | BUS_FREE));
3142 2600
3143 WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT)); 2601 WR_HARPOON(port + hp_portctrl_0, (SCSI_PORT));
3144 2602
2603 if (!(currSCCB->Sccb_MGRFlags & F_DEV_SELECTED)) {
2604 WR_HARPOON(port + hp_scsictrl_0,
2605 (SEL_TAR | ENA_ATN | ENA_RESEL | ENA_SCAM_SEL));
2606 } else {
3145 2607
3146 if (!(currSCCB->Sccb_MGRFlags & F_DEV_SELECTED)) 2608/* auto_loaded = (RD_HARPOON(port+hp_autostart_3) & (unsigned char)0x1F);
3147 {
3148 WR_HARPOON(port+hp_scsictrl_0, (SEL_TAR | ENA_ATN | ENA_RESEL | ENA_SCAM_SEL));
3149 }
3150 else
3151 {
3152
3153/* auto_loaded = (RD_HARPOON(port+hp_autostart_3) & (UCHAR)0x1F);
3154 auto_loaded |= AUTO_IMMED; */ 2609 auto_loaded |= AUTO_IMMED; */
3155 auto_loaded = AUTO_IMMED; 2610 auto_loaded = AUTO_IMMED;
3156 2611
3157 DISABLE_AUTO(port); 2612 DISABLE_AUTO(port);
3158 2613
3159 WR_HARPOON(port+hp_autostart_3, auto_loaded); 2614 WR_HARPOON(port + hp_autostart_3, auto_loaded);
3160 } 2615 }
3161 2616
3162 SGRAM_ACCESS(port); 2617 SGRAM_ACCESS(port);
3163} 2618}
3164 2619
3165
3166/*--------------------------------------------------------------------- 2620/*---------------------------------------------------------------------
3167 * 2621 *
3168 * Function: FPT_sres 2622 * Function: FPT_sres
@@ -3171,303 +2625,276 @@ static void FPT_ssel(ULONG port, UCHAR p_card)
3171 * 2625 *
3172 *---------------------------------------------------------------------*/ 2626 *---------------------------------------------------------------------*/
3173 2627
3174static void FPT_sres(ULONG port, UCHAR p_card, PSCCBcard pCurrCard) 2628static void FPT_sres(unsigned long port, unsigned char p_card,
2629 struct sccb_card *pCurrCard)
3175{ 2630{
3176 2631
3177 UCHAR our_target, message, lun = 0, tag, msgRetryCount; 2632 unsigned char our_target, message, lun = 0, tag, msgRetryCount;
3178
3179 2633
3180 PSCCBMgr_tar_info currTar_Info; 2634 struct sccb_mgr_tar_info *currTar_Info;
3181 PSCCB currSCCB; 2635 struct sccb *currSCCB;
3182 2636
3183 2637 if (pCurrCard->currentSCCB != NULL) {
3184 2638 currTar_Info =
3185 2639 &FPT_sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
3186 if(pCurrCard->currentSCCB != NULL)
3187 {
3188 currTar_Info = &FPT_sccbMgrTbl[p_card][pCurrCard->currentSCCB->TargID];
3189 DISABLE_AUTO(port); 2640 DISABLE_AUTO(port);
3190 2641
3191 2642 WR_HARPOON((port + hp_scsictrl_0), (ENA_RESEL | ENA_SCAM_SEL));
3192 WR_HARPOON((port+hp_scsictrl_0),(ENA_RESEL | ENA_SCAM_SEL));
3193
3194 2643
3195 currSCCB = pCurrCard->currentSCCB; 2644 currSCCB = pCurrCard->currentSCCB;
3196 if(currSCCB->Sccb_scsistat == SELECT_WN_ST) 2645 if (currSCCB->Sccb_scsistat == SELECT_WN_ST) {
3197 {
3198 currTar_Info->TarStatus &= ~TAR_WIDE_MASK; 2646 currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
3199 currSCCB->Sccb_scsistat = BUS_FREE_ST; 2647 currSCCB->Sccb_scsistat = BUS_FREE_ST;
3200 } 2648 }
3201 if(currSCCB->Sccb_scsistat == SELECT_SN_ST) 2649 if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
3202 {
3203 currTar_Info->TarStatus &= ~TAR_SYNC_MASK; 2650 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
3204 currSCCB->Sccb_scsistat = BUS_FREE_ST; 2651 currSCCB->Sccb_scsistat = BUS_FREE_ST;
3205 } 2652 }
3206 if(((pCurrCard->globalFlags & F_CONLUN_IO) && 2653 if (((pCurrCard->globalFlags & F_CONLUN_IO) &&
3207 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 2654 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) !=
3208 { 2655 TAG_Q_TRYING))) {
3209 currTar_Info->TarLUNBusy[currSCCB->Lun] = 0; 2656 currTar_Info->TarLUNBusy[currSCCB->Lun] = 0;
3210 if(currSCCB->Sccb_scsistat != ABORT_ST) 2657 if (currSCCB->Sccb_scsistat != ABORT_ST) {
3211 {
3212 pCurrCard->discQCount--; 2658 pCurrCard->discQCount--;
3213 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[currSCCB->Lun]] 2659 pCurrCard->discQ_Tbl[currTar_Info->
3214 = NULL; 2660 LunDiscQ_Idx[currSCCB->
2661 Lun]]
2662 = NULL;
3215 } 2663 }
3216 } 2664 } else {
3217 else 2665 currTar_Info->TarLUNBusy[0] = 0;
3218 { 2666 if (currSCCB->Sccb_tag) {
3219 currTar_Info->TarLUNBusy[0] = 0; 2667 if (currSCCB->Sccb_scsistat != ABORT_ST) {
3220 if(currSCCB->Sccb_tag)
3221 {
3222 if(currSCCB->Sccb_scsistat != ABORT_ST)
3223 {
3224 pCurrCard->discQCount--; 2668 pCurrCard->discQCount--;
3225 pCurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL; 2669 pCurrCard->discQ_Tbl[currSCCB->
2670 Sccb_tag] = NULL;
3226 } 2671 }
3227 }else 2672 } else {
3228 { 2673 if (currSCCB->Sccb_scsistat != ABORT_ST) {
3229 if(currSCCB->Sccb_scsistat != ABORT_ST)
3230 {
3231 pCurrCard->discQCount--; 2674 pCurrCard->discQCount--;
3232 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL; 2675 pCurrCard->discQ_Tbl[currTar_Info->
2676 LunDiscQ_Idx[0]] =
2677 NULL;
3233 } 2678 }
3234 } 2679 }
3235 } 2680 }
3236 2681
3237 FPT_queueSelectFail(&FPT_BL_Card[p_card],p_card); 2682 FPT_queueSelectFail(&FPT_BL_Card[p_card], p_card);
3238 } 2683 }
3239 2684
3240 WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00); 2685 WRW_HARPOON((port + hp_fiforead), (unsigned short)0x00);
3241
3242 2686
3243 our_target = (UCHAR)(RD_HARPOON(port+hp_select_id) >> 4); 2687 our_target = (unsigned char)(RD_HARPOON(port + hp_select_id) >> 4);
3244 currTar_Info = &FPT_sccbMgrTbl[p_card][our_target]; 2688 currTar_Info = &FPT_sccbMgrTbl[p_card][our_target];
3245 2689
3246
3247 msgRetryCount = 0; 2690 msgRetryCount = 0;
3248 do 2691 do {
3249 {
3250 2692
3251 currTar_Info = &FPT_sccbMgrTbl[p_card][our_target]; 2693 currTar_Info = &FPT_sccbMgrTbl[p_card][our_target];
3252 tag = 0; 2694 tag = 0;
3253 2695
2696 while (!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) {
2697 if (!(RD_HARPOON(port + hp_scsisig) & SCSI_BSY)) {
3254 2698
3255 while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) 2699 WRW_HARPOON((port + hp_intstat), PHASE);
3256 {
3257 if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
3258 {
3259
3260 WRW_HARPOON((port+hp_intstat), PHASE);
3261 return; 2700 return;
3262 } 2701 }
3263 } 2702 }
3264 2703
3265 WRW_HARPOON((port+hp_intstat), PHASE); 2704 WRW_HARPOON((port + hp_intstat), PHASE);
3266 if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH) 2705 if ((RD_HARPOON(port + hp_scsisig) & S_SCSI_PHZ) == S_MSGI_PH) {
3267 { 2706
3268 2707 message = FPT_sfm(port, pCurrCard->currentSCCB);
3269 message = FPT_sfm(port,pCurrCard->currentSCCB); 2708 if (message) {
3270 if (message) 2709
3271 { 2710 if (message <= (0x80 | LUN_MASK)) {
3272 2711 lun = message & (unsigned char)LUN_MASK;
3273 if (message <= (0x80 | LUN_MASK)) 2712
3274 { 2713 if ((currTar_Info->
3275 lun = message & (UCHAR)LUN_MASK; 2714 TarStatus & TAR_TAG_Q_MASK) ==
3276 2715 TAG_Q_TRYING) {
3277 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING) 2716 if (currTar_Info->TarTagQ_Cnt !=
3278 { 2717 0) {
3279 if (currTar_Info->TarTagQ_Cnt != 0) 2718
3280 { 2719 if (!
3281 2720 (currTar_Info->
3282 if (!(currTar_Info->TarLUN_CA)) 2721 TarLUN_CA)) {
3283 { 2722 ACCEPT_MSG(port); /*Release the ACK for ID msg. */
3284 ACCEPT_MSG(port); /*Release the ACK for ID msg. */ 2723
3285 2724 message =
3286 2725 FPT_sfm
3287 message = FPT_sfm(port,pCurrCard->currentSCCB); 2726 (port,
3288 if (message) 2727 pCurrCard->
3289 { 2728 currentSCCB);
3290 ACCEPT_MSG(port); 2729 if (message) {
2730 ACCEPT_MSG
2731 (port);
3291 } 2732 }
3292 2733
3293 else 2734 else
3294 message = 0; 2735 message
3295 2736 = 0;
3296 if(message != 0) 2737
3297 { 2738 if (message !=
3298 tag = FPT_sfm(port,pCurrCard->currentSCCB); 2739 0) {
3299 2740 tag =
3300 if (!(tag)) 2741 FPT_sfm
3301 message = 0; 2742 (port,
2743 pCurrCard->
2744 currentSCCB);
2745
2746 if (!
2747 (tag))
2748 message
2749 =
2750 0;
3302 } 2751 }
3303 2752
3304 } /*C.A. exists! */ 2753 }
3305 2754 /*C.A. exists! */
3306 } /*End Q cnt != 0 */ 2755 }
3307 2756 /*End Q cnt != 0 */
3308 } /*End Tag cmds supported! */ 2757 }
3309 2758 /*End Tag cmds supported! */
3310 } /*End valid ID message. */ 2759 }
3311 2760 /*End valid ID message. */
3312 else 2761 else {
3313 {
3314 2762
3315 ACCEPT_MSG_ATN(port); 2763 ACCEPT_MSG_ATN(port);
3316 } 2764 }
3317 2765
3318 } /* End good id message. */ 2766 }
3319 2767 /* End good id message. */
3320 else 2768 else {
3321 {
3322 2769
3323 message = 0; 2770 message = 0;
3324 } 2771 }
3325 } 2772 } else {
3326 else
3327 {
3328 ACCEPT_MSG_ATN(port); 2773 ACCEPT_MSG_ATN(port);
3329 2774
3330 while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) && 2775 while (!
3331 !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) && 2776 (RDW_HARPOON((port + hp_intstat)) &
3332 (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ; 2777 (PHASE | RESET))
2778 && !(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)
2779 && (RD_HARPOON(port + hp_scsisig) & SCSI_BSY)) ;
3333 2780
3334 return; 2781 return;
3335 } 2782 }
3336 2783
3337 if(message == 0) 2784 if (message == 0) {
3338 {
3339 msgRetryCount++; 2785 msgRetryCount++;
3340 if(msgRetryCount == 1) 2786 if (msgRetryCount == 1) {
3341 {
3342 FPT_SendMsg(port, SMPARITY); 2787 FPT_SendMsg(port, SMPARITY);
3343 } 2788 } else {
3344 else
3345 {
3346 FPT_SendMsg(port, SMDEV_RESET); 2789 FPT_SendMsg(port, SMDEV_RESET);
3347 2790
3348 FPT_sssyncv(port, our_target, NARROW_SCSI,currTar_Info); 2791 FPT_sssyncv(port, our_target, NARROW_SCSI,
2792 currTar_Info);
3349 2793
3350 if (FPT_sccbMgrTbl[p_card][our_target].TarEEValue & EE_SYNC_MASK) 2794 if (FPT_sccbMgrTbl[p_card][our_target].
3351 { 2795 TarEEValue & EE_SYNC_MASK) {
3352 2796
3353 FPT_sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_SYNC_MASK; 2797 FPT_sccbMgrTbl[p_card][our_target].
2798 TarStatus &= ~TAR_SYNC_MASK;
3354 2799
3355 } 2800 }
3356 2801
3357 if (FPT_sccbMgrTbl[p_card][our_target].TarEEValue & EE_WIDE_SCSI) 2802 if (FPT_sccbMgrTbl[p_card][our_target].
3358 { 2803 TarEEValue & EE_WIDE_SCSI) {
3359 2804
3360 FPT_sccbMgrTbl[p_card][our_target].TarStatus &= ~TAR_WIDE_MASK; 2805 FPT_sccbMgrTbl[p_card][our_target].
2806 TarStatus &= ~TAR_WIDE_MASK;
3361 } 2807 }
3362 2808
3363 2809 FPT_queueFlushTargSccb(p_card, our_target,
3364 FPT_queueFlushTargSccb(p_card, our_target, SCCB_COMPLETE); 2810 SCCB_COMPLETE);
3365 FPT_SccbMgrTableInitTarget(p_card,our_target); 2811 FPT_SccbMgrTableInitTarget(p_card, our_target);
3366 return; 2812 return;
3367 } 2813 }
3368 } 2814 }
3369 }while(message == 0); 2815 } while (message == 0);
3370 2816
3371 2817 if (((pCurrCard->globalFlags & F_CONLUN_IO) &&
3372 2818 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) {
3373 if(((pCurrCard->globalFlags & F_CONLUN_IO) &&
3374 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)))
3375 {
3376 currTar_Info->TarLUNBusy[lun] = 1; 2819 currTar_Info->TarLUNBusy[lun] = 1;
3377 pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[lun]]; 2820 pCurrCard->currentSCCB =
3378 if(pCurrCard->currentSCCB != NULL) 2821 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[lun]];
3379 { 2822 if (pCurrCard->currentSCCB != NULL) {
3380 ACCEPT_MSG(port); 2823 ACCEPT_MSG(port);
3381 } 2824 } else {
3382 else
3383 {
3384 ACCEPT_MSG_ATN(port); 2825 ACCEPT_MSG_ATN(port);
3385 } 2826 }
3386 } 2827 } else {
3387 else
3388 {
3389 currTar_Info->TarLUNBusy[0] = 1; 2828 currTar_Info->TarLUNBusy[0] = 1;
3390 2829
3391 2830 if (tag) {
3392 if (tag) 2831 if (pCurrCard->discQ_Tbl[tag] != NULL) {
3393 { 2832 pCurrCard->currentSCCB =
3394 if (pCurrCard->discQ_Tbl[tag] != NULL) 2833 pCurrCard->discQ_Tbl[tag];
3395 { 2834 currTar_Info->TarTagQ_Cnt--;
3396 pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[tag];
3397 currTar_Info->TarTagQ_Cnt--;
3398 ACCEPT_MSG(port); 2835 ACCEPT_MSG(port);
2836 } else {
2837 ACCEPT_MSG_ATN(port);
3399 } 2838 }
3400 else 2839 } else {
3401 { 2840 pCurrCard->currentSCCB =
3402 ACCEPT_MSG_ATN(port); 2841 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]];
3403 } 2842 if (pCurrCard->currentSCCB != NULL) {
3404 }else
3405 {
3406 pCurrCard->currentSCCB = pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]];
3407 if(pCurrCard->currentSCCB != NULL)
3408 {
3409 ACCEPT_MSG(port); 2843 ACCEPT_MSG(port);
3410 } 2844 } else {
3411 else
3412 {
3413 ACCEPT_MSG_ATN(port); 2845 ACCEPT_MSG_ATN(port);
3414 } 2846 }
3415 } 2847 }
3416 } 2848 }
3417 2849
3418 if(pCurrCard->currentSCCB != NULL) 2850 if (pCurrCard->currentSCCB != NULL) {
3419 { 2851 if (pCurrCard->currentSCCB->Sccb_scsistat == ABORT_ST) {
3420 if(pCurrCard->currentSCCB->Sccb_scsistat == ABORT_ST) 2852 /* During Abort Tag command, the target could have got re-selected
3421 { 2853 and completed the command. Check the select Q and remove the CCB
3422 /* During Abort Tag command, the target could have got re-selected 2854 if it is in the Select Q */
3423 and completed the command. Check the select Q and remove the CCB
3424 if it is in the Select Q */
3425 FPT_queueFindSccb(pCurrCard->currentSCCB, p_card); 2855 FPT_queueFindSccb(pCurrCard->currentSCCB, p_card);
3426 } 2856 }
3427 } 2857 }
3428 2858
3429 2859 while (!(RDW_HARPOON((port + hp_intstat)) & (PHASE | RESET)) &&
3430 while (!(RDW_HARPOON((port+hp_intstat)) & (PHASE | RESET)) && 2860 !(RD_HARPOON(port + hp_scsisig) & SCSI_REQ) &&
3431 !(RD_HARPOON(port+hp_scsisig) & SCSI_REQ) && 2861 (RD_HARPOON(port + hp_scsisig) & SCSI_BSY)) ;
3432 (RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ;
3433} 2862}
3434 2863
3435static void FPT_SendMsg(ULONG port, UCHAR message) 2864static void FPT_SendMsg(unsigned long port, unsigned char message)
3436{ 2865{
3437 while(!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) 2866 while (!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) {
3438 { 2867 if (!(RD_HARPOON(port + hp_scsisig) & SCSI_BSY)) {
3439 if (! (RD_HARPOON(port+hp_scsisig) & SCSI_BSY))
3440 {
3441 2868
3442 WRW_HARPOON((port+hp_intstat), PHASE); 2869 WRW_HARPOON((port + hp_intstat), PHASE);
3443 return; 2870 return;
3444 } 2871 }
3445 } 2872 }
3446 2873
3447 WRW_HARPOON((port+hp_intstat), PHASE); 2874 WRW_HARPOON((port + hp_intstat), PHASE);
3448 if ((RD_HARPOON(port+hp_scsisig) & S_SCSI_PHZ) == S_MSGO_PH) 2875 if ((RD_HARPOON(port + hp_scsisig) & S_SCSI_PHZ) == S_MSGO_PH) {
3449 { 2876 WRW_HARPOON((port + hp_intstat),
3450 WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0)); 2877 (BUS_FREE | PHASE | XFER_CNT_0));
3451
3452 2878
3453 WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN); 2879 WR_HARPOON(port + hp_portctrl_0, SCSI_BUS_EN);
3454 2880
3455 WR_HARPOON(port+hp_scsidata_0,message); 2881 WR_HARPOON(port + hp_scsidata_0, message);
3456 2882
3457 WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH)); 2883 WR_HARPOON(port + hp_scsisig, (SCSI_ACK + S_ILL_PH));
3458 2884
3459 ACCEPT_MSG(port); 2885 ACCEPT_MSG(port);
3460 2886
3461 WR_HARPOON(port+hp_portctrl_0, 0x00); 2887 WR_HARPOON(port + hp_portctrl_0, 0x00);
3462 2888
3463 if ((message == SMABORT) || (message == SMDEV_RESET) || 2889 if ((message == SMABORT) || (message == SMDEV_RESET) ||
3464 (message == SMABORT_TAG) ) 2890 (message == SMABORT_TAG)) {
3465 { 2891 while (!
3466 while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {} 2892 (RDW_HARPOON((port + hp_intstat)) &
2893 (BUS_FREE | PHASE))) {
2894 }
3467 2895
3468 if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) 2896 if (RDW_HARPOON((port + hp_intstat)) & BUS_FREE) {
3469 { 2897 WRW_HARPOON((port + hp_intstat), BUS_FREE);
3470 WRW_HARPOON((port+hp_intstat), BUS_FREE);
3471 } 2898 }
3472 } 2899 }
3473 } 2900 }
@@ -3481,178 +2908,180 @@ static void FPT_SendMsg(ULONG port, UCHAR message)
3481 * target device. 2908 * target device.
3482 * 2909 *
3483 *---------------------------------------------------------------------*/ 2910 *---------------------------------------------------------------------*/
3484static void FPT_sdecm(UCHAR message, ULONG port, UCHAR p_card) 2911static void FPT_sdecm(unsigned char message, unsigned long port,
2912 unsigned char p_card)
3485{ 2913{
3486 PSCCB currSCCB; 2914 struct sccb *currSCCB;
3487 PSCCBcard CurrCard; 2915 struct sccb_card *CurrCard;
3488 PSCCBMgr_tar_info currTar_Info; 2916 struct sccb_mgr_tar_info *currTar_Info;
3489 2917
3490 CurrCard = &FPT_BL_Card[p_card]; 2918 CurrCard = &FPT_BL_Card[p_card];
3491 currSCCB = CurrCard->currentSCCB; 2919 currSCCB = CurrCard->currentSCCB;
3492 2920
3493 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID]; 2921 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3494 2922
3495 if (message == SMREST_DATA_PTR) 2923 if (message == SMREST_DATA_PTR) {
3496 { 2924 if (!(currSCCB->Sccb_XferState & F_NO_DATA_YET)) {
3497 if (!(currSCCB->Sccb_XferState & F_NO_DATA_YET))
3498 {
3499 currSCCB->Sccb_ATC = currSCCB->Sccb_savedATC; 2925 currSCCB->Sccb_ATC = currSCCB->Sccb_savedATC;
3500 2926
3501 FPT_hostDataXferRestart(currSCCB); 2927 FPT_hostDataXferRestart(currSCCB);
3502 } 2928 }
3503 2929
3504 ACCEPT_MSG(port); 2930 ACCEPT_MSG(port);
3505 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 2931 WR_HARPOON(port + hp_autostart_1,
2932 (AUTO_IMMED + DISCONNECT_START));
3506 } 2933 }
3507 2934
3508 else if (message == SMCMD_COMP) 2935 else if (message == SMCMD_COMP) {
3509 {
3510 2936
3511 2937 if (currSCCB->Sccb_scsistat == SELECT_Q_ST) {
3512 if (currSCCB->Sccb_scsistat == SELECT_Q_ST) 2938 currTar_Info->TarStatus &=
3513 { 2939 ~(unsigned char)TAR_TAG_Q_MASK;
3514 currTar_Info->TarStatus &= ~(UCHAR)TAR_TAG_Q_MASK; 2940 currTar_Info->TarStatus |= (unsigned char)TAG_Q_REJECT;
3515 currTar_Info->TarStatus |= (UCHAR)TAG_Q_REJECT;
3516 } 2941 }
3517 2942
3518 ACCEPT_MSG(port); 2943 ACCEPT_MSG(port);
3519 2944
3520 } 2945 }
3521 2946
3522 else if ((message == SMNO_OP) || (message >= SMIDENT) 2947 else if ((message == SMNO_OP) || (message >= SMIDENT)
3523 || (message == SMINIT_RECOVERY) || (message == SMREL_RECOVERY)) 2948 || (message == SMINIT_RECOVERY) || (message == SMREL_RECOVERY)) {
3524 {
3525 2949
3526 ACCEPT_MSG(port); 2950 ACCEPT_MSG(port);
3527 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 2951 WR_HARPOON(port + hp_autostart_1,
2952 (AUTO_IMMED + DISCONNECT_START));
3528 } 2953 }
3529 2954
3530 else if (message == SMREJECT) 2955 else if (message == SMREJECT) {
3531 {
3532 2956
3533 if ((currSCCB->Sccb_scsistat == SELECT_SN_ST) || 2957 if ((currSCCB->Sccb_scsistat == SELECT_SN_ST) ||
3534 (currSCCB->Sccb_scsistat == SELECT_WN_ST) || 2958 (currSCCB->Sccb_scsistat == SELECT_WN_ST) ||
3535 ((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING ) || 2959 ((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING)
3536 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING ) ) 2960 || ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) ==
3537 2961 TAG_Q_TRYING))
3538 { 2962 {
3539 WRW_HARPOON((port+hp_intstat), BUS_FREE); 2963 WRW_HARPOON((port + hp_intstat), BUS_FREE);
3540 2964
3541 ACCEPT_MSG(port); 2965 ACCEPT_MSG(port);
3542 2966
3543 2967 while ((!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) &&
3544 while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) && 2968 (!(RDW_HARPOON((port + hp_intstat)) & BUS_FREE)))
3545 (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {}
3546
3547 if(currSCCB->Lun == 0x00)
3548 { 2969 {
3549 if ((currSCCB->Sccb_scsistat == SELECT_SN_ST)) 2970 }
3550 {
3551 2971
3552 currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED; 2972 if (currSCCB->Lun == 0x00) {
2973 if ((currSCCB->Sccb_scsistat == SELECT_SN_ST)) {
3553 2974
3554 currTar_Info->TarEEValue &= ~EE_SYNC_MASK; 2975 currTar_Info->TarStatus |=
3555 } 2976 (unsigned char)SYNC_SUPPORTED;
3556 2977
3557 else if ((currSCCB->Sccb_scsistat == SELECT_WN_ST)) 2978 currTar_Info->TarEEValue &=
3558 { 2979 ~EE_SYNC_MASK;
2980 }
3559 2981
2982 else if ((currSCCB->Sccb_scsistat ==
2983 SELECT_WN_ST)) {
3560 2984
3561 currTar_Info->TarStatus = (currTar_Info->TarStatus & 2985 currTar_Info->TarStatus =
3562 ~WIDE_ENABLED) | WIDE_NEGOCIATED; 2986 (currTar_Info->
2987 TarStatus & ~WIDE_ENABLED) |
2988 WIDE_NEGOCIATED;
3563 2989
3564 currTar_Info->TarEEValue &= ~EE_WIDE_SCSI; 2990 currTar_Info->TarEEValue &=
2991 ~EE_WIDE_SCSI;
3565 2992
3566 } 2993 }
3567 2994
3568 else if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_TRYING ) 2995 else if ((currTar_Info->
3569 { 2996 TarStatus & TAR_TAG_Q_MASK) ==
3570 currTar_Info->TarStatus = (currTar_Info->TarStatus & 2997 TAG_Q_TRYING) {
3571 ~(UCHAR)TAR_TAG_Q_MASK) | TAG_Q_REJECT; 2998 currTar_Info->TarStatus =
3572 2999 (currTar_Info->
3000 TarStatus & ~(unsigned char)
3001 TAR_TAG_Q_MASK) | TAG_Q_REJECT;
3573 3002
3574 currSCCB->ControlByte &= ~F_USE_CMD_Q; 3003 currSCCB->ControlByte &= ~F_USE_CMD_Q;
3575 CurrCard->discQCount--; 3004 CurrCard->discQCount--;
3576 CurrCard->discQ_Tbl[currSCCB->Sccb_tag] = NULL; 3005 CurrCard->discQ_Tbl[currSCCB->
3006 Sccb_tag] = NULL;
3577 currSCCB->Sccb_tag = 0x00; 3007 currSCCB->Sccb_tag = 0x00;
3578 3008
3579 } 3009 }
3580 } 3010 }
3581 3011
3582 if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) 3012 if (RDW_HARPOON((port + hp_intstat)) & BUS_FREE) {
3583 {
3584
3585 3013
3586 if(currSCCB->Lun == 0x00) 3014 if (currSCCB->Lun == 0x00) {
3587 { 3015 WRW_HARPOON((port + hp_intstat),
3588 WRW_HARPOON((port+hp_intstat), BUS_FREE); 3016 BUS_FREE);
3589 CurrCard->globalFlags |= F_NEW_SCCB_CMD; 3017 CurrCard->globalFlags |= F_NEW_SCCB_CMD;
3590 } 3018 }
3591 } 3019 }
3592 3020
3593 else 3021 else {
3594 {
3595 3022
3596 if((CurrCard->globalFlags & F_CONLUN_IO) && 3023 if ((CurrCard->globalFlags & F_CONLUN_IO) &&
3597 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 3024 ((currTar_Info->
3598 currTar_Info->TarLUNBusy[currSCCB->Lun] = 1; 3025 TarStatus & TAR_TAG_Q_MASK) !=
3026 TAG_Q_TRYING))
3027 currTar_Info->TarLUNBusy[currSCCB->
3028 Lun] = 1;
3599 else 3029 else
3600 currTar_Info->TarLUNBusy[0] = 1; 3030 currTar_Info->TarLUNBusy[0] = 1;
3601 3031
3032 currSCCB->ControlByte &=
3033 ~(unsigned char)F_USE_CMD_Q;
3602 3034
3603 currSCCB->ControlByte &= ~(UCHAR)F_USE_CMD_Q; 3035 WR_HARPOON(port + hp_autostart_1,
3604 3036 (AUTO_IMMED + DISCONNECT_START));
3605 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START));
3606 3037
3607 } 3038 }
3608 } 3039 }
3609 3040
3610 else 3041 else {
3611 {
3612 ACCEPT_MSG(port); 3042 ACCEPT_MSG(port);
3613 3043
3614 while ((!(RD_HARPOON(port+hp_scsisig) & SCSI_REQ)) && 3044 while ((!(RD_HARPOON(port + hp_scsisig) & SCSI_REQ)) &&
3615 (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))) {} 3045 (!(RDW_HARPOON((port + hp_intstat)) & BUS_FREE)))
3616
3617 if (!(RDW_HARPOON((port+hp_intstat)) & BUS_FREE))
3618 { 3046 {
3619 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3047 }
3048
3049 if (!(RDW_HARPOON((port + hp_intstat)) & BUS_FREE)) {
3050 WR_HARPOON(port + hp_autostart_1,
3051 (AUTO_IMMED + DISCONNECT_START));
3620 } 3052 }
3621 } 3053 }
3622 } 3054 }
3623 3055
3624 else if (message == SMEXT) 3056 else if (message == SMEXT) {
3625 {
3626 3057
3627 ACCEPT_MSG(port); 3058 ACCEPT_MSG(port);
3628 FPT_shandem(port,p_card,currSCCB); 3059 FPT_shandem(port, p_card, currSCCB);
3629 } 3060 }
3630 3061
3631 else if (message == SMIGNORWR) 3062 else if (message == SMIGNORWR) {
3632 {
3633 3063
3634 ACCEPT_MSG(port); /* ACK the RESIDUE MSG */ 3064 ACCEPT_MSG(port); /* ACK the RESIDUE MSG */
3635 3065
3636 message = FPT_sfm(port,currSCCB); 3066 message = FPT_sfm(port, currSCCB);
3637 3067
3638 if(currSCCB->Sccb_scsimsg != SMPARITY) 3068 if (currSCCB->Sccb_scsimsg != SMPARITY)
3639 ACCEPT_MSG(port); 3069 ACCEPT_MSG(port);
3640 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3070 WR_HARPOON(port + hp_autostart_1,
3071 (AUTO_IMMED + DISCONNECT_START));
3641 } 3072 }
3642 3073
3643 3074 else {
3644 else
3645 {
3646 3075
3647 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL; 3076 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
3648 currSCCB->Sccb_scsimsg = SMREJECT; 3077 currSCCB->Sccb_scsimsg = SMREJECT;
3649 3078
3650 ACCEPT_MSG_ATN(port); 3079 ACCEPT_MSG_ATN(port);
3651 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3080 WR_HARPOON(port + hp_autostart_1,
3081 (AUTO_IMMED + DISCONNECT_START));
3652 } 3082 }
3653} 3083}
3654 3084
3655
3656/*--------------------------------------------------------------------- 3085/*---------------------------------------------------------------------
3657 * 3086 *
3658 * Function: FPT_shandem 3087 * Function: FPT_shandem
@@ -3660,76 +3089,65 @@ static void FPT_sdecm(UCHAR message, ULONG port, UCHAR p_card)
3660 * Description: Decide what to do with the extended message. 3089 * Description: Decide what to do with the extended message.
3661 * 3090 *
3662 *---------------------------------------------------------------------*/ 3091 *---------------------------------------------------------------------*/
3663static void FPT_shandem(ULONG port, UCHAR p_card, PSCCB pCurrSCCB) 3092static void FPT_shandem(unsigned long port, unsigned char p_card,
3093 struct sccb *pCurrSCCB)
3664{ 3094{
3665 UCHAR length,message; 3095 unsigned char length, message;
3666 3096
3667 length = FPT_sfm(port,pCurrSCCB); 3097 length = FPT_sfm(port, pCurrSCCB);
3668 if (length) 3098 if (length) {
3669 {
3670 3099
3671 ACCEPT_MSG(port); 3100 ACCEPT_MSG(port);
3672 message = FPT_sfm(port,pCurrSCCB); 3101 message = FPT_sfm(port, pCurrSCCB);
3673 if (message) 3102 if (message) {
3674 {
3675 3103
3676 if (message == SMSYNC) 3104 if (message == SMSYNC) {
3677 {
3678 3105
3679 if (length == 0x03) 3106 if (length == 0x03) {
3680 {
3681 3107
3682 ACCEPT_MSG(port); 3108 ACCEPT_MSG(port);
3683 FPT_stsyncn(port,p_card); 3109 FPT_stsyncn(port, p_card);
3684 } 3110 } else {
3685 else
3686 {
3687 3111
3688 pCurrSCCB->Sccb_scsimsg = SMREJECT; 3112 pCurrSCCB->Sccb_scsimsg = SMREJECT;
3689 ACCEPT_MSG_ATN(port); 3113 ACCEPT_MSG_ATN(port);
3690 } 3114 }
3691 } 3115 } else if (message == SMWDTR) {
3692 else if (message == SMWDTR)
3693 {
3694 3116
3695 if (length == 0x02) 3117 if (length == 0x02) {
3696 {
3697 3118
3698 ACCEPT_MSG(port); 3119 ACCEPT_MSG(port);
3699 FPT_stwidn(port,p_card); 3120 FPT_stwidn(port, p_card);
3700 } 3121 } else {
3701 else
3702 {
3703 3122
3704 pCurrSCCB->Sccb_scsimsg = SMREJECT; 3123 pCurrSCCB->Sccb_scsimsg = SMREJECT;
3705 ACCEPT_MSG_ATN(port); 3124 ACCEPT_MSG_ATN(port);
3706 3125
3707 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3126 WR_HARPOON(port + hp_autostart_1,
3127 (AUTO_IMMED +
3128 DISCONNECT_START));
3708 } 3129 }
3709 } 3130 } else {
3710 else
3711 {
3712 3131
3713 pCurrSCCB->Sccb_scsimsg = SMREJECT; 3132 pCurrSCCB->Sccb_scsimsg = SMREJECT;
3714 ACCEPT_MSG_ATN(port); 3133 ACCEPT_MSG_ATN(port);
3715 3134
3716 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3135 WR_HARPOON(port + hp_autostart_1,
3136 (AUTO_IMMED + DISCONNECT_START));
3717 } 3137 }
3718 } 3138 } else {
3719 else 3139 if (pCurrSCCB->Sccb_scsimsg != SMPARITY)
3720 {
3721 if(pCurrSCCB->Sccb_scsimsg != SMPARITY)
3722 ACCEPT_MSG(port); 3140 ACCEPT_MSG(port);
3723 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3141 WR_HARPOON(port + hp_autostart_1,
3142 (AUTO_IMMED + DISCONNECT_START));
3724 } 3143 }
3725 }else 3144 } else {
3726 { 3145 if (pCurrSCCB->Sccb_scsimsg == SMPARITY)
3727 if(pCurrSCCB->Sccb_scsimsg == SMPARITY) 3146 WR_HARPOON(port + hp_autostart_1,
3728 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3147 (AUTO_IMMED + DISCONNECT_START));
3729 } 3148 }
3730} 3149}
3731 3150
3732
3733/*--------------------------------------------------------------------- 3151/*---------------------------------------------------------------------
3734 * 3152 *
3735 * Function: FPT_sisyncn 3153 * Function: FPT_sisyncn
@@ -3739,73 +3157,79 @@ static void FPT_shandem(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
3739 * 3157 *
3740 *---------------------------------------------------------------------*/ 3158 *---------------------------------------------------------------------*/
3741 3159
3742static UCHAR FPT_sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag) 3160static unsigned char FPT_sisyncn(unsigned long port, unsigned char p_card,
3161 unsigned char syncFlag)
3743{ 3162{
3744 PSCCB currSCCB; 3163 struct sccb *currSCCB;
3745 PSCCBMgr_tar_info currTar_Info; 3164 struct sccb_mgr_tar_info *currTar_Info;
3746
3747 currSCCB = FPT_BL_Card[p_card].currentSCCB;
3748 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3749
3750 if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING)) {
3751
3752
3753 WRW_HARPOON((port+ID_MSG_STRT),
3754 (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
3755
3756 WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ);
3757
3758 WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT ));
3759 WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 ));
3760 WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC));
3761 3165
3166 currSCCB = FPT_BL_Card[p_card].currentSCCB;
3167 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3762 3168
3763 if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB) 3169 if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_TRYING)) {
3764 3170
3765 WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 12)); 3171 WRW_HARPOON((port + ID_MSG_STRT),
3172 (MPM_OP + AMSG_OUT +
3173 (currSCCB->
3174 Sccb_idmsg & ~(unsigned char)DISC_PRIV)));
3766 3175
3767 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB) 3176 WRW_HARPOON((port + ID_MSG_STRT + 2), BRH_OP + ALWAYS + CMDPZ);
3768 3177
3769 WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 25)); 3178 WRW_HARPOON((port + SYNC_MSGS + 0),
3179 (MPM_OP + AMSG_OUT + SMEXT));
3180 WRW_HARPOON((port + SYNC_MSGS + 2), (MPM_OP + AMSG_OUT + 0x03));
3181 WRW_HARPOON((port + SYNC_MSGS + 4),
3182 (MPM_OP + AMSG_OUT + SMSYNC));
3770 3183
3771 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB) 3184 if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
3772 3185
3773 WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 50)); 3186 WRW_HARPOON((port + SYNC_MSGS + 6),
3187 (MPM_OP + AMSG_OUT + 12));
3774 3188
3775 else 3189 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) ==
3776 WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+ 00)); 3190 EE_SYNC_10MB)
3777 3191
3192 WRW_HARPOON((port + SYNC_MSGS + 6),
3193 (MPM_OP + AMSG_OUT + 25));
3778 3194
3779 WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP )); 3195 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) ==
3780 WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+DEFAULT_OFFSET)); 3196 EE_SYNC_5MB)
3781 WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP ));
3782 3197
3198 WRW_HARPOON((port + SYNC_MSGS + 6),
3199 (MPM_OP + AMSG_OUT + 50));
3783 3200
3784 if(syncFlag == 0)
3785 {
3786 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT));
3787 currTar_Info->TarStatus = ((currTar_Info->TarStatus &
3788 ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_TRYING);
3789 }
3790 else 3201 else
3791 { 3202 WRW_HARPOON((port + SYNC_MSGS + 6),
3792 WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED + CMD_ONLY_STRT)); 3203 (MPM_OP + AMSG_OUT + 00));
3204
3205 WRW_HARPOON((port + SYNC_MSGS + 8), (RAT_OP));
3206 WRW_HARPOON((port + SYNC_MSGS + 10),
3207 (MPM_OP + AMSG_OUT + DEFAULT_OFFSET));
3208 WRW_HARPOON((port + SYNC_MSGS + 12), (BRH_OP + ALWAYS + NP));
3209
3210 if (syncFlag == 0) {
3211 WR_HARPOON(port + hp_autostart_3,
3212 (SELECT + SELCHK_STRT));
3213 currTar_Info->TarStatus =
3214 ((currTar_Info->
3215 TarStatus & ~(unsigned char)TAR_SYNC_MASK) |
3216 (unsigned char)SYNC_TRYING);
3217 } else {
3218 WR_HARPOON(port + hp_autostart_3,
3219 (AUTO_IMMED + CMD_ONLY_STRT));
3793 } 3220 }
3794 3221
3222 return 1;
3223 }
3795 3224
3796 return(1); 3225 else {
3797 }
3798
3799 else {
3800 3226
3801 currTar_Info->TarStatus |= (UCHAR)SYNC_SUPPORTED; 3227 currTar_Info->TarStatus |= (unsigned char)SYNC_SUPPORTED;
3802 currTar_Info->TarEEValue &= ~EE_SYNC_MASK; 3228 currTar_Info->TarEEValue &= ~EE_SYNC_MASK;
3803 return(0); 3229 return 0;
3804 } 3230 }
3805} 3231}
3806 3232
3807
3808
3809/*--------------------------------------------------------------------- 3233/*---------------------------------------------------------------------
3810 * 3234 *
3811 * Function: FPT_stsyncn 3235 * Function: FPT_stsyncn
@@ -3814,131 +3238,128 @@ static UCHAR FPT_sisyncn(ULONG port, UCHAR p_card, UCHAR syncFlag)
3814 * necessary. 3238 * necessary.
3815 * 3239 *
3816 *---------------------------------------------------------------------*/ 3240 *---------------------------------------------------------------------*/
3817static void FPT_stsyncn(ULONG port, UCHAR p_card) 3241static void FPT_stsyncn(unsigned long port, unsigned char p_card)
3818{ 3242{
3819 UCHAR sync_msg,offset,sync_reg,our_sync_msg; 3243 unsigned char sync_msg, offset, sync_reg, our_sync_msg;
3820 PSCCB currSCCB; 3244 struct sccb *currSCCB;
3821 PSCCBMgr_tar_info currTar_Info; 3245 struct sccb_mgr_tar_info *currTar_Info;
3822 3246
3823 currSCCB = FPT_BL_Card[p_card].currentSCCB; 3247 currSCCB = FPT_BL_Card[p_card].currentSCCB;
3824 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID]; 3248 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3825 3249
3826 sync_msg = FPT_sfm(port,currSCCB); 3250 sync_msg = FPT_sfm(port, currSCCB);
3827 3251
3828 if((sync_msg == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) 3252 if ((sync_msg == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) {
3829 { 3253 WR_HARPOON(port + hp_autostart_1,
3830 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3254 (AUTO_IMMED + DISCONNECT_START));
3831 return; 3255 return;
3832 } 3256 }
3833 3257
3834 ACCEPT_MSG(port); 3258 ACCEPT_MSG(port);
3835
3836 3259
3837 offset = FPT_sfm(port,currSCCB); 3260 offset = FPT_sfm(port, currSCCB);
3838 3261
3839 if((offset == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) 3262 if ((offset == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) {
3840 { 3263 WR_HARPOON(port + hp_autostart_1,
3841 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3264 (AUTO_IMMED + DISCONNECT_START));
3842 return; 3265 return;
3843 } 3266 }
3844 3267
3845 if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB) 3268 if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_20MB)
3846
3847 our_sync_msg = 12; /* Setup our Message to 20mb/s */
3848 3269
3849 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB) 3270 our_sync_msg = 12; /* Setup our Message to 20mb/s */
3850 3271
3851 our_sync_msg = 25; /* Setup our Message to 10mb/s */ 3272 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_10MB)
3852 3273
3853 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB) 3274 our_sync_msg = 25; /* Setup our Message to 10mb/s */
3854 3275
3855 our_sync_msg = 50; /* Setup our Message to 5mb/s */ 3276 else if ((currTar_Info->TarEEValue & EE_SYNC_MASK) == EE_SYNC_5MB)
3856 else
3857 3277
3858 our_sync_msg = 0; /* Message = Async */ 3278 our_sync_msg = 50; /* Setup our Message to 5mb/s */
3859 3279 else
3860 if (sync_msg < our_sync_msg) {
3861 sync_msg = our_sync_msg; /*if faster, then set to max. */
3862 }
3863
3864 if (offset == ASYNC)
3865 sync_msg = ASYNC;
3866
3867 if (offset > MAX_OFFSET)
3868 offset = MAX_OFFSET;
3869 3280
3870 sync_reg = 0x00; 3281 our_sync_msg = 0; /* Message = Async */
3871 3282
3872 if (sync_msg > 12) 3283 if (sync_msg < our_sync_msg) {
3284 sync_msg = our_sync_msg; /*if faster, then set to max. */
3285 }
3873 3286
3874 sync_reg = 0x20; /* Use 10MB/s */ 3287 if (offset == ASYNC)
3288 sync_msg = ASYNC;
3875 3289
3876 if (sync_msg > 25) 3290 if (offset > MAX_OFFSET)
3291 offset = MAX_OFFSET;
3877 3292
3878 sync_reg = 0x40; /* Use 6.6MB/s */ 3293 sync_reg = 0x00;
3879 3294
3880 if (sync_msg > 38) 3295 if (sync_msg > 12)
3881 3296
3882 sync_reg = 0x60; /* Use 5MB/s */ 3297 sync_reg = 0x20; /* Use 10MB/s */
3883 3298
3884 if (sync_msg > 50) 3299 if (sync_msg > 25)
3885 3300
3886 sync_reg = 0x80; /* Use 4MB/s */ 3301 sync_reg = 0x40; /* Use 6.6MB/s */
3887 3302
3888 if (sync_msg > 62) 3303 if (sync_msg > 38)
3889 3304
3890 sync_reg = 0xA0; /* Use 3.33MB/s */ 3305 sync_reg = 0x60; /* Use 5MB/s */
3891 3306
3892 if (sync_msg > 75) 3307 if (sync_msg > 50)
3893 3308
3894 sync_reg = 0xC0; /* Use 2.85MB/s */ 3309 sync_reg = 0x80; /* Use 4MB/s */
3895 3310
3896 if (sync_msg > 87) 3311 if (sync_msg > 62)
3897 3312
3898 sync_reg = 0xE0; /* Use 2.5MB/s */ 3313 sync_reg = 0xA0; /* Use 3.33MB/s */
3899 3314
3900 if (sync_msg > 100) { 3315 if (sync_msg > 75)
3901 3316
3902 sync_reg = 0x00; /* Use ASYNC */ 3317 sync_reg = 0xC0; /* Use 2.85MB/s */
3903 offset = 0x00;
3904 }
3905 3318
3319 if (sync_msg > 87)
3906 3320
3907 if (currTar_Info->TarStatus & WIDE_ENABLED) 3321 sync_reg = 0xE0; /* Use 2.5MB/s */
3908 3322
3909 sync_reg |= offset; 3323 if (sync_msg > 100) {
3910 3324
3911 else 3325 sync_reg = 0x00; /* Use ASYNC */
3326 offset = 0x00;
3327 }
3912 3328
3913 sync_reg |= (offset | NARROW_SCSI); 3329 if (currTar_Info->TarStatus & WIDE_ENABLED)
3914 3330
3915 FPT_sssyncv(port,currSCCB->TargID,sync_reg,currTar_Info); 3331 sync_reg |= offset;
3916 3332
3333 else
3917 3334
3918 if (currSCCB->Sccb_scsistat == SELECT_SN_ST) { 3335 sync_reg |= (offset | NARROW_SCSI);
3919 3336
3337 FPT_sssyncv(port, currSCCB->TargID, sync_reg, currTar_Info);
3920 3338
3921 ACCEPT_MSG(port); 3339 if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
3922 3340
3923 currTar_Info->TarStatus = ((currTar_Info->TarStatus & 3341 ACCEPT_MSG(port);
3924 ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED);
3925 3342
3926 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3343 currTar_Info->TarStatus = ((currTar_Info->TarStatus &
3927 } 3344 ~(unsigned char)TAR_SYNC_MASK) |
3345 (unsigned char)SYNC_SUPPORTED);
3928 3346
3929 else { 3347 WR_HARPOON(port + hp_autostart_1,
3348 (AUTO_IMMED + DISCONNECT_START));
3349 }
3930 3350
3351 else {
3931 3352
3932 ACCEPT_MSG_ATN(port); 3353 ACCEPT_MSG_ATN(port);
3933 3354
3934 FPT_sisyncr(port,sync_msg,offset); 3355 FPT_sisyncr(port, sync_msg, offset);
3935 3356
3936 currTar_Info->TarStatus = ((currTar_Info->TarStatus & 3357 currTar_Info->TarStatus = ((currTar_Info->TarStatus &
3937 ~(UCHAR)TAR_SYNC_MASK) | (UCHAR)SYNC_SUPPORTED); 3358 ~(unsigned char)TAR_SYNC_MASK) |
3938 } 3359 (unsigned char)SYNC_SUPPORTED);
3360 }
3939} 3361}
3940 3362
3941
3942/*--------------------------------------------------------------------- 3363/*---------------------------------------------------------------------
3943 * 3364 *
3944 * Function: FPT_sisyncr 3365 * Function: FPT_sisyncr
@@ -3946,28 +3367,28 @@ static void FPT_stsyncn(ULONG port, UCHAR p_card)
3946 * Description: Answer the targets sync message. 3367 * Description: Answer the targets sync message.
3947 * 3368 *
3948 *---------------------------------------------------------------------*/ 3369 *---------------------------------------------------------------------*/
3949static void FPT_sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset) 3370static void FPT_sisyncr(unsigned long port, unsigned char sync_pulse,
3371 unsigned char offset)
3950{ 3372{
3951 ARAM_ACCESS(port); 3373 ARAM_ACCESS(port);
3952 WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT )); 3374 WRW_HARPOON((port + SYNC_MSGS + 0), (MPM_OP + AMSG_OUT + SMEXT));
3953 WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x03 )); 3375 WRW_HARPOON((port + SYNC_MSGS + 2), (MPM_OP + AMSG_OUT + 0x03));
3954 WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMSYNC)); 3376 WRW_HARPOON((port + SYNC_MSGS + 4), (MPM_OP + AMSG_OUT + SMSYNC));
3955 WRW_HARPOON((port+SYNC_MSGS+6), (MPM_OP+AMSG_OUT+sync_pulse)); 3377 WRW_HARPOON((port + SYNC_MSGS + 6), (MPM_OP + AMSG_OUT + sync_pulse));
3956 WRW_HARPOON((port+SYNC_MSGS+8), (RAT_OP )); 3378 WRW_HARPOON((port + SYNC_MSGS + 8), (RAT_OP));
3957 WRW_HARPOON((port+SYNC_MSGS+10),(MPM_OP+AMSG_OUT+offset)); 3379 WRW_HARPOON((port + SYNC_MSGS + 10), (MPM_OP + AMSG_OUT + offset));
3958 WRW_HARPOON((port+SYNC_MSGS+12),(BRH_OP+ALWAYS+NP )); 3380 WRW_HARPOON((port + SYNC_MSGS + 12), (BRH_OP + ALWAYS + NP));
3959 SGRAM_ACCESS(port); 3381 SGRAM_ACCESS(port);
3960 3382
3961 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 3383 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
3962 WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1); 3384 WRW_HARPOON((port + hp_intstat), CLR_ALL_INT_1);
3963 3385
3964 WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT)); 3386 WR_HARPOON(port + hp_autostart_3, (AUTO_IMMED + CMD_ONLY_STRT));
3965 3387
3966 while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {} 3388 while (!(RDW_HARPOON((port + hp_intstat)) & (BUS_FREE | AUTO_INT))) {
3389 }
3967} 3390}
3968 3391
3969
3970
3971/*--------------------------------------------------------------------- 3392/*---------------------------------------------------------------------
3972 * 3393 *
3973 * Function: FPT_siwidn 3394 * Function: FPT_siwidn
@@ -3977,50 +3398,53 @@ static void FPT_sisyncr(ULONG port,UCHAR sync_pulse, UCHAR offset)
3977 * 3398 *
3978 *---------------------------------------------------------------------*/ 3399 *---------------------------------------------------------------------*/
3979 3400
3980static UCHAR FPT_siwidn(ULONG port, UCHAR p_card) 3401static unsigned char FPT_siwidn(unsigned long port, unsigned char p_card)
3981{ 3402{
3982 PSCCB currSCCB; 3403 struct sccb *currSCCB;
3983 PSCCBMgr_tar_info currTar_Info; 3404 struct sccb_mgr_tar_info *currTar_Info;
3984
3985 currSCCB = FPT_BL_Card[p_card].currentSCCB;
3986 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3987
3988 if (!((currTar_Info->TarStatus & TAR_WIDE_MASK) == WIDE_NEGOCIATED)) {
3989 3405
3406 currSCCB = FPT_BL_Card[p_card].currentSCCB;
3407 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
3990 3408
3991 WRW_HARPOON((port+ID_MSG_STRT), 3409 if (!((currTar_Info->TarStatus & TAR_WIDE_MASK) == WIDE_NEGOCIATED)) {
3992 (MPM_OP+AMSG_OUT+(currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV)));
3993 3410
3994 WRW_HARPOON((port+ID_MSG_STRT+2),BRH_OP+ALWAYS+CMDPZ); 3411 WRW_HARPOON((port + ID_MSG_STRT),
3412 (MPM_OP + AMSG_OUT +
3413 (currSCCB->
3414 Sccb_idmsg & ~(unsigned char)DISC_PRIV)));
3995 3415
3996 WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT )); 3416 WRW_HARPOON((port + ID_MSG_STRT + 2), BRH_OP + ALWAYS + CMDPZ);
3997 WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 ));
3998 WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR));
3999 WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP ));
4000 WRW_HARPOON((port+SYNC_MSGS+8), (MPM_OP+AMSG_OUT+ SM16BIT));
4001 WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP ));
4002 3417
4003 WR_HARPOON(port+hp_autostart_3, (SELECT+SELCHK_STRT)); 3418 WRW_HARPOON((port + SYNC_MSGS + 0),
3419 (MPM_OP + AMSG_OUT + SMEXT));
3420 WRW_HARPOON((port + SYNC_MSGS + 2), (MPM_OP + AMSG_OUT + 0x02));
3421 WRW_HARPOON((port + SYNC_MSGS + 4),
3422 (MPM_OP + AMSG_OUT + SMWDTR));
3423 WRW_HARPOON((port + SYNC_MSGS + 6), (RAT_OP));
3424 WRW_HARPOON((port + SYNC_MSGS + 8),
3425 (MPM_OP + AMSG_OUT + SM16BIT));
3426 WRW_HARPOON((port + SYNC_MSGS + 10), (BRH_OP + ALWAYS + NP));
4004 3427
3428 WR_HARPOON(port + hp_autostart_3, (SELECT + SELCHK_STRT));
4005 3429
4006 currTar_Info->TarStatus = ((currTar_Info->TarStatus & 3430 currTar_Info->TarStatus = ((currTar_Info->TarStatus &
4007 ~(UCHAR)TAR_WIDE_MASK) | (UCHAR)WIDE_ENABLED); 3431 ~(unsigned char)TAR_WIDE_MASK) |
3432 (unsigned char)WIDE_ENABLED);
4008 3433
4009 return(1); 3434 return 1;
4010 } 3435 }
4011 3436
4012 else { 3437 else {
4013 3438
4014 currTar_Info->TarStatus = ((currTar_Info->TarStatus & 3439 currTar_Info->TarStatus = ((currTar_Info->TarStatus &
4015 ~(UCHAR)TAR_WIDE_MASK) | WIDE_NEGOCIATED); 3440 ~(unsigned char)TAR_WIDE_MASK) |
3441 WIDE_NEGOCIATED);
4016 3442
4017 currTar_Info->TarEEValue &= ~EE_WIDE_SCSI; 3443 currTar_Info->TarEEValue &= ~EE_WIDE_SCSI;
4018 return(0); 3444 return 0;
4019 } 3445 }
4020} 3446}
4021 3447
4022
4023
4024/*--------------------------------------------------------------------- 3448/*---------------------------------------------------------------------
4025 * 3449 *
4026 * Function: FPT_stwidn 3450 * Function: FPT_stwidn
@@ -4029,79 +3453,70 @@ static UCHAR FPT_siwidn(ULONG port, UCHAR p_card)
4029 * necessary. 3453 * necessary.
4030 * 3454 *
4031 *---------------------------------------------------------------------*/ 3455 *---------------------------------------------------------------------*/
4032static void FPT_stwidn(ULONG port, UCHAR p_card) 3456static void FPT_stwidn(unsigned long port, unsigned char p_card)
4033{ 3457{
4034 UCHAR width; 3458 unsigned char width;
4035 PSCCB currSCCB; 3459 struct sccb *currSCCB;
4036 PSCCBMgr_tar_info currTar_Info; 3460 struct sccb_mgr_tar_info *currTar_Info;
4037 3461
4038 currSCCB = FPT_BL_Card[p_card].currentSCCB; 3462 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4039 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID]; 3463 currTar_Info = &FPT_sccbMgrTbl[p_card][currSCCB->TargID];
4040 3464
4041 width = FPT_sfm(port,currSCCB); 3465 width = FPT_sfm(port, currSCCB);
4042 3466
4043 if((width == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) 3467 if ((width == 0x00) && (currSCCB->Sccb_scsimsg == SMPARITY)) {
4044 { 3468 WR_HARPOON(port + hp_autostart_1,
4045 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3469 (AUTO_IMMED + DISCONNECT_START));
4046 return; 3470 return;
4047 } 3471 }
4048 3472
3473 if (!(currTar_Info->TarEEValue & EE_WIDE_SCSI))
3474 width = 0;
4049 3475
4050 if (!(currTar_Info->TarEEValue & EE_WIDE_SCSI)) 3476 if (width) {
4051 width = 0; 3477 currTar_Info->TarStatus |= WIDE_ENABLED;
4052 3478 width = 0;
4053 if (width) { 3479 } else {
4054 currTar_Info->TarStatus |= WIDE_ENABLED; 3480 width = NARROW_SCSI;
4055 width = 0; 3481 currTar_Info->TarStatus &= ~WIDE_ENABLED;
4056 } 3482 }
4057 else {
4058 width = NARROW_SCSI;
4059 currTar_Info->TarStatus &= ~WIDE_ENABLED;
4060 }
4061
4062
4063 FPT_sssyncv(port,currSCCB->TargID,width,currTar_Info);
4064
4065
4066 if (currSCCB->Sccb_scsistat == SELECT_WN_ST)
4067 {
4068 3483
3484 FPT_sssyncv(port, currSCCB->TargID, width, currTar_Info);
4069 3485
3486 if (currSCCB->Sccb_scsistat == SELECT_WN_ST) {
4070 3487
4071 currTar_Info->TarStatus |= WIDE_NEGOCIATED; 3488 currTar_Info->TarStatus |= WIDE_NEGOCIATED;
4072 3489
4073 if (!((currTar_Info->TarStatus & TAR_SYNC_MASK) == SYNC_SUPPORTED)) 3490 if (!
4074 { 3491 ((currTar_Info->TarStatus & TAR_SYNC_MASK) ==
4075 ACCEPT_MSG_ATN(port); 3492 SYNC_SUPPORTED)) {
4076 ARAM_ACCESS(port); 3493 ACCEPT_MSG_ATN(port);
4077 FPT_sisyncn(port,p_card, 1); 3494 ARAM_ACCESS(port);
4078 currSCCB->Sccb_scsistat = SELECT_SN_ST; 3495 FPT_sisyncn(port, p_card, 1);
4079 SGRAM_ACCESS(port); 3496 currSCCB->Sccb_scsistat = SELECT_SN_ST;
4080 } 3497 SGRAM_ACCESS(port);
4081 else 3498 } else {
4082 { 3499 ACCEPT_MSG(port);
4083 ACCEPT_MSG(port); 3500 WR_HARPOON(port + hp_autostart_1,
4084 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 3501 (AUTO_IMMED + DISCONNECT_START));
4085 } 3502 }
4086 } 3503 }
4087
4088 else {
4089 3504
3505 else {
4090 3506
4091 ACCEPT_MSG_ATN(port); 3507 ACCEPT_MSG_ATN(port);
4092 3508
4093 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) 3509 if (currTar_Info->TarEEValue & EE_WIDE_SCSI)
4094 width = SM16BIT; 3510 width = SM16BIT;
4095 else 3511 else
4096 width = SM8BIT; 3512 width = SM8BIT;
4097 3513
4098 FPT_siwidr(port,width); 3514 FPT_siwidr(port, width);
4099 3515
4100 currTar_Info->TarStatus |= (WIDE_NEGOCIATED | WIDE_ENABLED); 3516 currTar_Info->TarStatus |= (WIDE_NEGOCIATED | WIDE_ENABLED);
4101 } 3517 }
4102} 3518}
4103 3519
4104
4105/*--------------------------------------------------------------------- 3520/*---------------------------------------------------------------------
4106 * 3521 *
4107 * Function: FPT_siwidr 3522 * Function: FPT_siwidr
@@ -4109,27 +3524,26 @@ static void FPT_stwidn(ULONG port, UCHAR p_card)
4109 * Description: Answer the targets Wide nego message. 3524 * Description: Answer the targets Wide nego message.
4110 * 3525 *
4111 *---------------------------------------------------------------------*/ 3526 *---------------------------------------------------------------------*/
4112static void FPT_siwidr(ULONG port, UCHAR width) 3527static void FPT_siwidr(unsigned long port, unsigned char width)
4113{ 3528{
4114 ARAM_ACCESS(port); 3529 ARAM_ACCESS(port);
4115 WRW_HARPOON((port+SYNC_MSGS+0), (MPM_OP+AMSG_OUT+SMEXT )); 3530 WRW_HARPOON((port + SYNC_MSGS + 0), (MPM_OP + AMSG_OUT + SMEXT));
4116 WRW_HARPOON((port+SYNC_MSGS+2), (MPM_OP+AMSG_OUT+0x02 )); 3531 WRW_HARPOON((port + SYNC_MSGS + 2), (MPM_OP + AMSG_OUT + 0x02));
4117 WRW_HARPOON((port+SYNC_MSGS+4), (MPM_OP+AMSG_OUT+SMWDTR)); 3532 WRW_HARPOON((port + SYNC_MSGS + 4), (MPM_OP + AMSG_OUT + SMWDTR));
4118 WRW_HARPOON((port+SYNC_MSGS+6), (RAT_OP )); 3533 WRW_HARPOON((port + SYNC_MSGS + 6), (RAT_OP));
4119 WRW_HARPOON((port+SYNC_MSGS+8),(MPM_OP+AMSG_OUT+width)); 3534 WRW_HARPOON((port + SYNC_MSGS + 8), (MPM_OP + AMSG_OUT + width));
4120 WRW_HARPOON((port+SYNC_MSGS+10),(BRH_OP+ALWAYS+NP )); 3535 WRW_HARPOON((port + SYNC_MSGS + 10), (BRH_OP + ALWAYS + NP));
4121 SGRAM_ACCESS(port); 3536 SGRAM_ACCESS(port);
4122 3537
4123 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 3538 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
4124 WRW_HARPOON((port+hp_intstat), CLR_ALL_INT_1); 3539 WRW_HARPOON((port + hp_intstat), CLR_ALL_INT_1);
4125 3540
4126 WR_HARPOON(port+hp_autostart_3, (AUTO_IMMED+CMD_ONLY_STRT)); 3541 WR_HARPOON(port + hp_autostart_3, (AUTO_IMMED + CMD_ONLY_STRT));
4127 3542
4128 while (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | AUTO_INT))) {} 3543 while (!(RDW_HARPOON((port + hp_intstat)) & (BUS_FREE | AUTO_INT))) {
3544 }
4129} 3545}
4130 3546
4131
4132
4133/*--------------------------------------------------------------------- 3547/*---------------------------------------------------------------------
4134 * 3548 *
4135 * Function: FPT_sssyncv 3549 * Function: FPT_sssyncv
@@ -4138,71 +3552,71 @@ static void FPT_siwidr(ULONG port, UCHAR width)
4138 * ID specified. 3552 * ID specified.
4139 * 3553 *
4140 *---------------------------------------------------------------------*/ 3554 *---------------------------------------------------------------------*/
4141static void FPT_sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value, 3555static void FPT_sssyncv(unsigned long p_port, unsigned char p_id,
4142 PSCCBMgr_tar_info currTar_Info) 3556 unsigned char p_sync_value,
3557 struct sccb_mgr_tar_info *currTar_Info)
4143{ 3558{
4144 UCHAR index; 3559 unsigned char index;
4145 3560
4146 index = p_id; 3561 index = p_id;
4147 3562
4148 switch (index) { 3563 switch (index) {
4149 3564
4150 case 0: 3565 case 0:
4151 index = 12; /* hp_synctarg_0 */ 3566 index = 12; /* hp_synctarg_0 */
4152 break; 3567 break;
4153 case 1: 3568 case 1:
4154 index = 13; /* hp_synctarg_1 */ 3569 index = 13; /* hp_synctarg_1 */
4155 break; 3570 break;
4156 case 2: 3571 case 2:
4157 index = 14; /* hp_synctarg_2 */ 3572 index = 14; /* hp_synctarg_2 */
4158 break; 3573 break;
4159 case 3: 3574 case 3:
4160 index = 15; /* hp_synctarg_3 */ 3575 index = 15; /* hp_synctarg_3 */
4161 break; 3576 break;
4162 case 4: 3577 case 4:
4163 index = 8; /* hp_synctarg_4 */ 3578 index = 8; /* hp_synctarg_4 */
4164 break; 3579 break;
4165 case 5: 3580 case 5:
4166 index = 9; /* hp_synctarg_5 */ 3581 index = 9; /* hp_synctarg_5 */
4167 break; 3582 break;
4168 case 6: 3583 case 6:
4169 index = 10; /* hp_synctarg_6 */ 3584 index = 10; /* hp_synctarg_6 */
4170 break; 3585 break;
4171 case 7: 3586 case 7:
4172 index = 11; /* hp_synctarg_7 */ 3587 index = 11; /* hp_synctarg_7 */
4173 break; 3588 break;
4174 case 8: 3589 case 8:
4175 index = 4; /* hp_synctarg_8 */ 3590 index = 4; /* hp_synctarg_8 */
4176 break; 3591 break;
4177 case 9: 3592 case 9:
4178 index = 5; /* hp_synctarg_9 */ 3593 index = 5; /* hp_synctarg_9 */
4179 break; 3594 break;
4180 case 10: 3595 case 10:
4181 index = 6; /* hp_synctarg_10 */ 3596 index = 6; /* hp_synctarg_10 */
4182 break; 3597 break;
4183 case 11: 3598 case 11:
4184 index = 7; /* hp_synctarg_11 */ 3599 index = 7; /* hp_synctarg_11 */
4185 break; 3600 break;
4186 case 12: 3601 case 12:
4187 index = 0; /* hp_synctarg_12 */ 3602 index = 0; /* hp_synctarg_12 */
4188 break; 3603 break;
4189 case 13: 3604 case 13:
4190 index = 1; /* hp_synctarg_13 */ 3605 index = 1; /* hp_synctarg_13 */
4191 break; 3606 break;
4192 case 14: 3607 case 14:
4193 index = 2; /* hp_synctarg_14 */ 3608 index = 2; /* hp_synctarg_14 */
4194 break; 3609 break;
4195 case 15: 3610 case 15:
4196 index = 3; /* hp_synctarg_15 */ 3611 index = 3; /* hp_synctarg_15 */
4197 3612
4198 } 3613 }
4199 3614
4200 WR_HARPOON(p_port+hp_synctarg_base+index, p_sync_value); 3615 WR_HARPOON(p_port + hp_synctarg_base + index, p_sync_value);
4201 3616
4202 currTar_Info->TarSyncCtrl = p_sync_value; 3617 currTar_Info->TarSyncCtrl = p_sync_value;
4203} 3618}
4204 3619
4205
4206/*--------------------------------------------------------------------- 3620/*---------------------------------------------------------------------
4207 * 3621 *
4208 * Function: FPT_sresb 3622 * Function: FPT_sresb
@@ -4210,69 +3624,67 @@ static void FPT_sssyncv(ULONG p_port, UCHAR p_id, UCHAR p_sync_value,
4210 * Description: Reset the desired card's SCSI bus. 3624 * Description: Reset the desired card's SCSI bus.
4211 * 3625 *
4212 *---------------------------------------------------------------------*/ 3626 *---------------------------------------------------------------------*/
4213static void FPT_sresb(ULONG port, UCHAR p_card) 3627static void FPT_sresb(unsigned long port, unsigned char p_card)
4214{ 3628{
4215 UCHAR scsiID, i; 3629 unsigned char scsiID, i;
4216 3630
4217 PSCCBMgr_tar_info currTar_Info; 3631 struct sccb_mgr_tar_info *currTar_Info;
4218 3632
4219 WR_HARPOON(port+hp_page_ctrl, 3633 WR_HARPOON(port + hp_page_ctrl,
4220 (RD_HARPOON(port+hp_page_ctrl) | G_INT_DISABLE)); 3634 (RD_HARPOON(port + hp_page_ctrl) | G_INT_DISABLE));
4221 WRW_HARPOON((port+hp_intstat), CLR_ALL_INT); 3635 WRW_HARPOON((port + hp_intstat), CLR_ALL_INT);
4222 3636
4223 WR_HARPOON(port+hp_scsictrl_0, SCSI_RST); 3637 WR_HARPOON(port + hp_scsictrl_0, SCSI_RST);
4224 3638
4225 scsiID = RD_HARPOON(port+hp_seltimeout); 3639 scsiID = RD_HARPOON(port + hp_seltimeout);
4226 WR_HARPOON(port+hp_seltimeout,TO_5ms); 3640 WR_HARPOON(port + hp_seltimeout, TO_5ms);
4227 WRW_HARPOON((port+hp_intstat), TIMEOUT); 3641 WRW_HARPOON((port + hp_intstat), TIMEOUT);
4228 3642
4229 WR_HARPOON(port+hp_portctrl_0,(SCSI_PORT | START_TO)); 3643 WR_HARPOON(port + hp_portctrl_0, (SCSI_PORT | START_TO));
4230 3644
4231 while (!(RDW_HARPOON((port+hp_intstat)) & TIMEOUT)) {} 3645 while (!(RDW_HARPOON((port + hp_intstat)) & TIMEOUT)) {
3646 }
4232 3647
4233 WR_HARPOON(port+hp_seltimeout,scsiID); 3648 WR_HARPOON(port + hp_seltimeout, scsiID);
4234 3649
4235 WR_HARPOON(port+hp_scsictrl_0, ENA_SCAM_SEL); 3650 WR_HARPOON(port + hp_scsictrl_0, ENA_SCAM_SEL);
4236 3651
4237 FPT_Wait(port, TO_5ms); 3652 FPT_Wait(port, TO_5ms);
4238 3653
4239 WRW_HARPOON((port+hp_intstat), CLR_ALL_INT); 3654 WRW_HARPOON((port + hp_intstat), CLR_ALL_INT);
4240 3655
4241 WR_HARPOON(port+hp_int_mask, (RD_HARPOON(port+hp_int_mask) | 0x00)); 3656 WR_HARPOON(port + hp_int_mask, (RD_HARPOON(port + hp_int_mask) | 0x00));
4242 3657
4243 for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++) 3658 for (scsiID = 0; scsiID < MAX_SCSI_TAR; scsiID++) {
4244 { 3659 currTar_Info = &FPT_sccbMgrTbl[p_card][scsiID];
4245 currTar_Info = &FPT_sccbMgrTbl[p_card][scsiID];
4246 3660
4247 if (currTar_Info->TarEEValue & EE_SYNC_MASK) 3661 if (currTar_Info->TarEEValue & EE_SYNC_MASK) {
4248 { 3662 currTar_Info->TarSyncCtrl = 0;
4249 currTar_Info->TarSyncCtrl = 0; 3663 currTar_Info->TarStatus &= ~TAR_SYNC_MASK;
4250 currTar_Info->TarStatus &= ~TAR_SYNC_MASK; 3664 }
4251 }
4252 3665
4253 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) 3666 if (currTar_Info->TarEEValue & EE_WIDE_SCSI) {
4254 { 3667 currTar_Info->TarStatus &= ~TAR_WIDE_MASK;
4255 currTar_Info->TarStatus &= ~TAR_WIDE_MASK; 3668 }
4256 }
4257 3669
4258 FPT_sssyncv(port, scsiID, NARROW_SCSI,currTar_Info); 3670 FPT_sssyncv(port, scsiID, NARROW_SCSI, currTar_Info);
4259 3671
4260 FPT_SccbMgrTableInitTarget(p_card, scsiID); 3672 FPT_SccbMgrTableInitTarget(p_card, scsiID);
4261 } 3673 }
4262 3674
4263 FPT_BL_Card[p_card].scanIndex = 0x00; 3675 FPT_BL_Card[p_card].scanIndex = 0x00;
4264 FPT_BL_Card[p_card].currentSCCB = NULL; 3676 FPT_BL_Card[p_card].currentSCCB = NULL;
4265 FPT_BL_Card[p_card].globalFlags &= ~(F_TAG_STARTED | F_HOST_XFER_ACT 3677 FPT_BL_Card[p_card].globalFlags &= ~(F_TAG_STARTED | F_HOST_XFER_ACT
4266 | F_NEW_SCCB_CMD); 3678 | F_NEW_SCCB_CMD);
4267 FPT_BL_Card[p_card].cmdCounter = 0x00; 3679 FPT_BL_Card[p_card].cmdCounter = 0x00;
4268 FPT_BL_Card[p_card].discQCount = 0x00; 3680 FPT_BL_Card[p_card].discQCount = 0x00;
4269 FPT_BL_Card[p_card].tagQ_Lst = 0x01; 3681 FPT_BL_Card[p_card].tagQ_Lst = 0x01;
4270 3682
4271 for(i = 0; i < QUEUE_DEPTH; i++) 3683 for (i = 0; i < QUEUE_DEPTH; i++)
4272 FPT_BL_Card[p_card].discQ_Tbl[i] = NULL; 3684 FPT_BL_Card[p_card].discQ_Tbl[i] = NULL;
4273 3685
4274 WR_HARPOON(port+hp_page_ctrl, 3686 WR_HARPOON(port + hp_page_ctrl,
4275 (RD_HARPOON(port+hp_page_ctrl) & ~G_INT_DISABLE)); 3687 (RD_HARPOON(port + hp_page_ctrl) & ~G_INT_DISABLE));
4276 3688
4277} 3689}
4278 3690
@@ -4283,46 +3695,43 @@ static void FPT_sresb(ULONG port, UCHAR p_card)
4283 * Description: Setup for the Auto Sense command. 3695 * Description: Setup for the Auto Sense command.
4284 * 3696 *
4285 *---------------------------------------------------------------------*/ 3697 *---------------------------------------------------------------------*/
4286static void FPT_ssenss(PSCCBcard pCurrCard) 3698static void FPT_ssenss(struct sccb_card *pCurrCard)
4287{ 3699{
4288 UCHAR i; 3700 unsigned char i;
4289 PSCCB currSCCB; 3701 struct sccb *currSCCB;
4290 3702
4291 currSCCB = pCurrCard->currentSCCB; 3703 currSCCB = pCurrCard->currentSCCB;
4292 3704
3705 currSCCB->Save_CdbLen = currSCCB->CdbLength;
4293 3706
4294 currSCCB->Save_CdbLen = currSCCB->CdbLength; 3707 for (i = 0; i < 6; i++) {
4295 3708
4296 for (i = 0; i < 6; i++) { 3709 currSCCB->Save_Cdb[i] = currSCCB->Cdb[i];
4297 3710 }
4298 currSCCB->Save_Cdb[i] = currSCCB->Cdb[i];
4299 }
4300 3711
4301 currSCCB->CdbLength = SIX_BYTE_CMD; 3712 currSCCB->CdbLength = SIX_BYTE_CMD;
4302 currSCCB->Cdb[0] = SCSI_REQUEST_SENSE; 3713 currSCCB->Cdb[0] = SCSI_REQUEST_SENSE;
4303 currSCCB->Cdb[1] = currSCCB->Cdb[1] & (UCHAR)0xE0; /*Keep LUN. */ 3714 currSCCB->Cdb[1] = currSCCB->Cdb[1] & (unsigned char)0xE0; /*Keep LUN. */
4304 currSCCB->Cdb[2] = 0x00; 3715 currSCCB->Cdb[2] = 0x00;
4305 currSCCB->Cdb[3] = 0x00; 3716 currSCCB->Cdb[3] = 0x00;
4306 currSCCB->Cdb[4] = currSCCB->RequestSenseLength; 3717 currSCCB->Cdb[4] = currSCCB->RequestSenseLength;
4307 currSCCB->Cdb[5] = 0x00; 3718 currSCCB->Cdb[5] = 0x00;
4308 3719
4309 currSCCB->Sccb_XferCnt = (unsigned long)currSCCB->RequestSenseLength; 3720 currSCCB->Sccb_XferCnt = (unsigned long)currSCCB->RequestSenseLength;
4310 3721
4311 currSCCB->Sccb_ATC = 0x00; 3722 currSCCB->Sccb_ATC = 0x00;
4312 3723
4313 currSCCB->Sccb_XferState |= F_AUTO_SENSE; 3724 currSCCB->Sccb_XferState |= F_AUTO_SENSE;
4314 3725
4315 currSCCB->Sccb_XferState &= ~F_SG_XFER; 3726 currSCCB->Sccb_XferState &= ~F_SG_XFER;
4316 3727
4317 currSCCB->Sccb_idmsg = currSCCB->Sccb_idmsg & ~(UCHAR)DISC_PRIV; 3728 currSCCB->Sccb_idmsg = currSCCB->Sccb_idmsg & ~(unsigned char)DISC_PRIV;
4318 3729
4319 currSCCB->ControlByte = 0x00; 3730 currSCCB->ControlByte = 0x00;
4320 3731
4321 currSCCB->Sccb_MGRFlags &= F_STATUSLOADED; 3732 currSCCB->Sccb_MGRFlags &= F_STATUSLOADED;
4322} 3733}
4323 3734
4324
4325
4326/*--------------------------------------------------------------------- 3735/*---------------------------------------------------------------------
4327 * 3736 *
4328 * Function: FPT_sxfrp 3737 * Function: FPT_sxfrp
@@ -4332,79 +3741,79 @@ static void FPT_ssenss(PSCCBcard pCurrCard)
4332 * 3741 *
4333 *---------------------------------------------------------------------*/ 3742 *---------------------------------------------------------------------*/
4334 3743
4335static void FPT_sxfrp(ULONG p_port, UCHAR p_card) 3744static void FPT_sxfrp(unsigned long p_port, unsigned char p_card)
4336{ 3745{
4337 UCHAR curr_phz; 3746 unsigned char curr_phz;
4338 3747
3748 DISABLE_AUTO(p_port);
4339 3749
4340 DISABLE_AUTO(p_port); 3750 if (FPT_BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) {
4341 3751
4342 if (FPT_BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) { 3752 FPT_hostDataXferAbort(p_port, p_card,
3753 FPT_BL_Card[p_card].currentSCCB);
4343 3754
4344 FPT_hostDataXferAbort(p_port,p_card,FPT_BL_Card[p_card].currentSCCB); 3755 }
4345 3756
4346 } 3757 /* If the Automation handled the end of the transfer then do not
3758 match the phase or we will get out of sync with the ISR. */
3759
3760 if (RDW_HARPOON((p_port + hp_intstat)) &
3761 (BUS_FREE | XFER_CNT_0 | AUTO_INT))
3762 return;
3763
3764 WR_HARPOON(p_port + hp_xfercnt_0, 0x00);
3765
3766 curr_phz = RD_HARPOON(p_port + hp_scsisig) & (unsigned char)S_SCSI_PHZ;
4347 3767
4348 /* If the Automation handled the end of the transfer then do not 3768 WRW_HARPOON((p_port + hp_intstat), XFER_CNT_0);
4349 match the phase or we will get out of sync with the ISR. */
4350 3769
4351 if (RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | XFER_CNT_0 | AUTO_INT)) 3770 WR_HARPOON(p_port + hp_scsisig, curr_phz);
4352 return;
4353 3771
4354 WR_HARPOON(p_port+hp_xfercnt_0, 0x00); 3772 while (!(RDW_HARPOON((p_port + hp_intstat)) & (BUS_FREE | RESET)) &&
3773 (curr_phz ==
3774 (RD_HARPOON(p_port + hp_scsisig) & (unsigned char)S_SCSI_PHZ)))
3775 {
3776 if (curr_phz & (unsigned char)SCSI_IOBIT) {
3777 WR_HARPOON(p_port + hp_portctrl_0,
3778 (SCSI_PORT | HOST_PORT | SCSI_INBIT));
4355 3779
4356 curr_phz = RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ; 3780 if (!(RD_HARPOON(p_port + hp_xferstat) & FIFO_EMPTY)) {
3781 RD_HARPOON(p_port + hp_fifodata_0);
3782 }
3783 } else {
3784 WR_HARPOON(p_port + hp_portctrl_0,
3785 (SCSI_PORT | HOST_PORT | HOST_WRT));
3786 if (RD_HARPOON(p_port + hp_xferstat) & FIFO_EMPTY) {
3787 WR_HARPOON(p_port + hp_fifodata_0, 0xFA);
3788 }
3789 }
3790 } /* End of While loop for padding data I/O phase */
4357 3791
4358 WRW_HARPOON((p_port+hp_intstat), XFER_CNT_0); 3792 while (!(RDW_HARPOON((p_port + hp_intstat)) & (BUS_FREE | RESET))) {
3793 if (RD_HARPOON(p_port + hp_scsisig) & SCSI_REQ)
3794 break;
3795 }
4359 3796
3797 WR_HARPOON(p_port + hp_portctrl_0,
3798 (SCSI_PORT | HOST_PORT | SCSI_INBIT));
3799 while (!(RD_HARPOON(p_port + hp_xferstat) & FIFO_EMPTY)) {
3800 RD_HARPOON(p_port + hp_fifodata_0);
3801 }
4360 3802
4361 WR_HARPOON(p_port+hp_scsisig, curr_phz); 3803 if (!(RDW_HARPOON((p_port + hp_intstat)) & (BUS_FREE | RESET))) {
3804 WR_HARPOON(p_port + hp_autostart_0,
3805 (AUTO_IMMED + DISCONNECT_START));
3806 while (!(RDW_HARPOON((p_port + hp_intstat)) & AUTO_INT)) {
3807 }
4362 3808
4363 while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)) && 3809 if (RDW_HARPOON((p_port + hp_intstat)) &
4364 (curr_phz == (RD_HARPOON(p_port+hp_scsisig) & (UCHAR)S_SCSI_PHZ)) ) 3810 (ICMD_COMP | ITAR_DISC))
4365 { 3811 while (!
4366 if (curr_phz & (UCHAR)SCSI_IOBIT) 3812 (RDW_HARPOON((p_port + hp_intstat)) &
4367 { 3813 (BUS_FREE | RSEL))) ;
4368 WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT)); 3814 }
4369
4370 if (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
4371 {
4372 RD_HARPOON(p_port+hp_fifodata_0);
4373 }
4374 }
4375 else
4376 {
4377 WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | HOST_WRT));
4378 if (RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY)
4379 {
4380 WR_HARPOON(p_port+hp_fifodata_0,0xFA);
4381 }
4382 }
4383 } /* End of While loop for padding data I/O phase */
4384
4385 while ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
4386 {
4387 if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ)
4388 break;
4389 }
4390
4391 WR_HARPOON(p_port+hp_portctrl_0, (SCSI_PORT | HOST_PORT | SCSI_INBIT));
4392 while (!(RD_HARPOON(p_port+hp_xferstat) & FIFO_EMPTY))
4393 {
4394 RD_HARPOON(p_port+hp_fifodata_0);
4395 }
4396
4397 if ( !(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RESET)))
4398 {
4399 WR_HARPOON(p_port+hp_autostart_0, (AUTO_IMMED+DISCONNECT_START));
4400 while (!(RDW_HARPOON((p_port+hp_intstat)) & AUTO_INT)) {}
4401
4402 if (RDW_HARPOON((p_port+hp_intstat)) & (ICMD_COMP | ITAR_DISC))
4403 while (!(RDW_HARPOON((p_port+hp_intstat)) & (BUS_FREE | RSEL))) ;
4404 }
4405} 3815}
4406 3816
4407
4408/*--------------------------------------------------------------------- 3817/*---------------------------------------------------------------------
4409 * 3818 *
4410 * Function: FPT_schkdd 3819 * Function: FPT_schkdd
@@ -4414,111 +3823,99 @@ static void FPT_sxfrp(ULONG p_port, UCHAR p_card)
4414 * 3823 *
4415 *---------------------------------------------------------------------*/ 3824 *---------------------------------------------------------------------*/
4416 3825
4417static void FPT_schkdd(ULONG port, UCHAR p_card) 3826static void FPT_schkdd(unsigned long port, unsigned char p_card)
4418{ 3827{
4419 USHORT TimeOutLoop; 3828 unsigned short TimeOutLoop;
4420 UCHAR sPhase; 3829 unsigned char sPhase;
4421
4422 PSCCB currSCCB;
4423 3830
4424 currSCCB = FPT_BL_Card[p_card].currentSCCB; 3831 struct sccb *currSCCB;
4425 3832
3833 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4426 3834
4427 if ((currSCCB->Sccb_scsistat != DATA_OUT_ST) && 3835 if ((currSCCB->Sccb_scsistat != DATA_OUT_ST) &&
4428 (currSCCB->Sccb_scsistat != DATA_IN_ST)) { 3836 (currSCCB->Sccb_scsistat != DATA_IN_ST)) {
4429 return; 3837 return;
4430 } 3838 }
4431
4432 3839
3840 if (currSCCB->Sccb_XferState & F_ODD_BALL_CNT) {
4433 3841
4434 if (currSCCB->Sccb_XferState & F_ODD_BALL_CNT) 3842 currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt - 1);
4435 {
4436 3843
4437 currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt-1); 3844 currSCCB->Sccb_XferCnt = 1;
4438 3845
4439 currSCCB->Sccb_XferCnt = 1; 3846 currSCCB->Sccb_XferState &= ~F_ODD_BALL_CNT;
3847 WRW_HARPOON((port + hp_fiforead), (unsigned short)0x00);
3848 WR_HARPOON(port + hp_xferstat, 0x00);
3849 }
4440 3850
4441 currSCCB->Sccb_XferState &= ~F_ODD_BALL_CNT; 3851 else {
4442 WRW_HARPOON((port+hp_fiforead), (USHORT) 0x00);
4443 WR_HARPOON(port+hp_xferstat, 0x00);
4444 }
4445 3852
4446 else 3853 currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
4447 {
4448 3854
4449 currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt; 3855 currSCCB->Sccb_XferCnt = 0;
3856 }
4450 3857
4451 currSCCB->Sccb_XferCnt = 0; 3858 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) &&
4452 } 3859 (currSCCB->HostStatus == SCCB_COMPLETE)) {
4453 3860
4454 if ((RDW_HARPOON((port+hp_intstat)) & PARITY) && 3861 currSCCB->HostStatus = SCCB_PARITY_ERR;
4455 (currSCCB->HostStatus == SCCB_COMPLETE)) { 3862 WRW_HARPOON((port + hp_intstat), PARITY);
3863 }
4456 3864
4457 currSCCB->HostStatus = SCCB_PARITY_ERR; 3865 FPT_hostDataXferAbort(port, p_card, currSCCB);
4458 WRW_HARPOON((port+hp_intstat), PARITY);
4459 }
4460 3866
3867 while (RD_HARPOON(port + hp_scsisig) & SCSI_ACK) {
3868 }
4461 3869
4462 FPT_hostDataXferAbort(port,p_card,currSCCB); 3870 TimeOutLoop = 0;
4463 3871
3872 while (RD_HARPOON(port + hp_xferstat) & FIFO_EMPTY) {
3873 if (RDW_HARPOON((port + hp_intstat)) & BUS_FREE) {
3874 return;
3875 }
3876 if (RD_HARPOON(port + hp_offsetctr) & (unsigned char)0x1F) {
3877 break;
3878 }
3879 if (RDW_HARPOON((port + hp_intstat)) & RESET) {
3880 return;
3881 }
3882 if ((RD_HARPOON(port + hp_scsisig) & SCSI_REQ)
3883 || (TimeOutLoop++ > 0x3000))
3884 break;
3885 }
4464 3886
4465 while (RD_HARPOON(port+hp_scsisig) & SCSI_ACK) {} 3887 sPhase = RD_HARPOON(port + hp_scsisig) & (SCSI_BSY | S_SCSI_PHZ);
3888 if ((!(RD_HARPOON(port + hp_xferstat) & FIFO_EMPTY)) ||
3889 (RD_HARPOON(port + hp_offsetctr) & (unsigned char)0x1F) ||
3890 (sPhase == (SCSI_BSY | S_DATAO_PH)) ||
3891 (sPhase == (SCSI_BSY | S_DATAI_PH))) {
4466 3892
4467 TimeOutLoop = 0; 3893 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
4468 3894
4469 while(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY) 3895 if (!(currSCCB->Sccb_XferState & F_ALL_XFERRED)) {
4470 { 3896 if (currSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
4471 if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) { 3897 FPT_phaseDataIn(port, p_card);
4472 return; 3898 }
4473 }
4474 if (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) {
4475 break;
4476 }
4477 if (RDW_HARPOON((port+hp_intstat)) & RESET) {
4478 return;
4479 }
4480 if ((RD_HARPOON(port+hp_scsisig) & SCSI_REQ) || (TimeOutLoop++>0x3000) )
4481 break;
4482 }
4483
4484 sPhase = RD_HARPOON(port+hp_scsisig) & (SCSI_BSY | S_SCSI_PHZ);
4485 if ((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) ||
4486 (RD_HARPOON(port+hp_offsetctr) & (UCHAR)0x1F) ||
4487 (sPhase == (SCSI_BSY | S_DATAO_PH)) ||
4488 (sPhase == (SCSI_BSY | S_DATAI_PH)))
4489 {
4490 3899
4491 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 3900 else {
3901 FPT_phaseDataOut(port, p_card);
3902 }
3903 } else {
3904 FPT_sxfrp(port, p_card);
3905 if (!(RDW_HARPOON((port + hp_intstat)) &
3906 (BUS_FREE | ICMD_COMP | ITAR_DISC | RESET))) {
3907 WRW_HARPOON((port + hp_intstat), AUTO_INT);
3908 FPT_phaseDecode(port, p_card);
3909 }
3910 }
4492 3911
4493 if (!(currSCCB->Sccb_XferState & F_ALL_XFERRED)) 3912 }
4494 {
4495 if (currSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
4496 FPT_phaseDataIn(port,p_card);
4497 }
4498 3913
4499 else { 3914 else {
4500 FPT_phaseDataOut(port,p_card); 3915 WR_HARPOON(port + hp_portctrl_0, 0x00);
4501 } 3916 }
4502 }
4503 else
4504 {
4505 FPT_sxfrp(port,p_card);
4506 if (!(RDW_HARPOON((port+hp_intstat)) &
4507 (BUS_FREE | ICMD_COMP | ITAR_DISC | RESET)))
4508 {
4509 WRW_HARPOON((port+hp_intstat), AUTO_INT);
4510 FPT_phaseDecode(port,p_card);
4511 }
4512 }
4513
4514 }
4515
4516 else {
4517 WR_HARPOON(port+hp_portctrl_0, 0x00);
4518 }
4519} 3917}
4520 3918
4521
4522/*--------------------------------------------------------------------- 3919/*---------------------------------------------------------------------
4523 * 3920 *
4524 * Function: FPT_sinits 3921 * Function: FPT_sinits
@@ -4527,39 +3924,37 @@ static void FPT_schkdd(ULONG port, UCHAR p_card)
4527 * 3924 *
4528 *---------------------------------------------------------------------*/ 3925 *---------------------------------------------------------------------*/
4529 3926
4530static void FPT_sinits(PSCCB p_sccb, UCHAR p_card) 3927static void FPT_sinits(struct sccb *p_sccb, unsigned char p_card)
4531{ 3928{
4532 PSCCBMgr_tar_info currTar_Info; 3929 struct sccb_mgr_tar_info *currTar_Info;
4533 3930
4534 if((p_sccb->TargID > MAX_SCSI_TAR) || (p_sccb->Lun > MAX_LUN)) 3931 if ((p_sccb->TargID > MAX_SCSI_TAR) || (p_sccb->Lun > MAX_LUN)) {
4535 {
4536 return; 3932 return;
4537 } 3933 }
4538 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID]; 3934 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID];
4539 3935
4540 p_sccb->Sccb_XferState = 0x00; 3936 p_sccb->Sccb_XferState = 0x00;
4541 p_sccb->Sccb_XferCnt = p_sccb->DataLength; 3937 p_sccb->Sccb_XferCnt = p_sccb->DataLength;
4542 3938
4543 if ((p_sccb->OperationCode == SCATTER_GATHER_COMMAND) || 3939 if ((p_sccb->OperationCode == SCATTER_GATHER_COMMAND) ||
4544 (p_sccb->OperationCode == RESIDUAL_SG_COMMAND)) { 3940 (p_sccb->OperationCode == RESIDUAL_SG_COMMAND)) {
4545 3941
4546 p_sccb->Sccb_SGoffset = 0; 3942 p_sccb->Sccb_SGoffset = 0;
4547 p_sccb->Sccb_XferState = F_SG_XFER; 3943 p_sccb->Sccb_XferState = F_SG_XFER;
4548 p_sccb->Sccb_XferCnt = 0x00; 3944 p_sccb->Sccb_XferCnt = 0x00;
4549 } 3945 }
4550 3946
4551 if (p_sccb->DataLength == 0x00) 3947 if (p_sccb->DataLength == 0x00)
4552 3948
4553 p_sccb->Sccb_XferState |= F_ALL_XFERRED; 3949 p_sccb->Sccb_XferState |= F_ALL_XFERRED;
4554 3950
4555 if (p_sccb->ControlByte & F_USE_CMD_Q) 3951 if (p_sccb->ControlByte & F_USE_CMD_Q) {
4556 { 3952 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT)
4557 if ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) == TAG_Q_REJECT) 3953 p_sccb->ControlByte &= ~F_USE_CMD_Q;
4558 p_sccb->ControlByte &= ~F_USE_CMD_Q;
4559 3954
4560 else 3955 else
4561 currTar_Info->TarStatus |= TAG_Q_TRYING; 3956 currTar_Info->TarStatus |= TAG_Q_TRYING;
4562 } 3957 }
4563 3958
4564/* For !single SCSI device in system & device allow Disconnect 3959/* For !single SCSI device in system & device allow Disconnect
4565 or command is tag_q type then send Cmd with Disconnect Enable 3960 or command is tag_q type then send Cmd with Disconnect Enable
@@ -4570,35 +3965,35 @@ static void FPT_sinits(PSCCB p_sccb, UCHAR p_card)
4570 (currTar_Info->TarStatus & TAR_ALLOW_DISC)) || 3965 (currTar_Info->TarStatus & TAR_ALLOW_DISC)) ||
4571 (currTar_Info->TarStatus & TAG_Q_TRYING)) { 3966 (currTar_Info->TarStatus & TAG_Q_TRYING)) {
4572*/ 3967*/
4573 if ((currTar_Info->TarStatus & TAR_ALLOW_DISC) || 3968 if ((currTar_Info->TarStatus & TAR_ALLOW_DISC) ||
4574 (currTar_Info->TarStatus & TAG_Q_TRYING)) { 3969 (currTar_Info->TarStatus & TAG_Q_TRYING)) {
4575 p_sccb->Sccb_idmsg = (UCHAR)(SMIDENT | DISC_PRIV) | p_sccb->Lun; 3970 p_sccb->Sccb_idmsg =
4576 } 3971 (unsigned char)(SMIDENT | DISC_PRIV) | p_sccb->Lun;
3972 }
4577 3973
4578 else { 3974 else {
4579 3975
4580 p_sccb->Sccb_idmsg = (UCHAR)SMIDENT | p_sccb->Lun; 3976 p_sccb->Sccb_idmsg = (unsigned char)SMIDENT | p_sccb->Lun;
4581 } 3977 }
4582 3978
4583 p_sccb->HostStatus = 0x00; 3979 p_sccb->HostStatus = 0x00;
4584 p_sccb->TargetStatus = 0x00; 3980 p_sccb->TargetStatus = 0x00;
4585 p_sccb->Sccb_tag = 0x00; 3981 p_sccb->Sccb_tag = 0x00;
4586 p_sccb->Sccb_MGRFlags = 0x00; 3982 p_sccb->Sccb_MGRFlags = 0x00;
4587 p_sccb->Sccb_sgseg = 0x00; 3983 p_sccb->Sccb_sgseg = 0x00;
4588 p_sccb->Sccb_ATC = 0x00; 3984 p_sccb->Sccb_ATC = 0x00;
4589 p_sccb->Sccb_savedATC = 0x00; 3985 p_sccb->Sccb_savedATC = 0x00;
4590/* 3986/*
4591 p_sccb->SccbVirtDataPtr = 0x00; 3987 p_sccb->SccbVirtDataPtr = 0x00;
4592 p_sccb->Sccb_forwardlink = NULL; 3988 p_sccb->Sccb_forwardlink = NULL;
4593 p_sccb->Sccb_backlink = NULL; 3989 p_sccb->Sccb_backlink = NULL;
4594 */ 3990 */
4595 p_sccb->Sccb_scsistat = BUS_FREE_ST; 3991 p_sccb->Sccb_scsistat = BUS_FREE_ST;
4596 p_sccb->SccbStatus = SCCB_IN_PROCESS; 3992 p_sccb->SccbStatus = SCCB_IN_PROCESS;
4597 p_sccb->Sccb_scsimsg = SMNO_OP; 3993 p_sccb->Sccb_scsimsg = SMNO_OP;
4598 3994
4599} 3995}
4600 3996
4601
4602/*--------------------------------------------------------------------- 3997/*---------------------------------------------------------------------
4603 * 3998 *
4604 * Function: Phase Decode 3999 * Function: Phase Decode
@@ -4607,23 +4002,21 @@ static void FPT_sinits(PSCCB p_sccb, UCHAR p_card)
4607 * 4002 *
4608 *---------------------------------------------------------------------*/ 4003 *---------------------------------------------------------------------*/
4609 4004
4610static void FPT_phaseDecode(ULONG p_port, UCHAR p_card) 4005static void FPT_phaseDecode(unsigned long p_port, unsigned char p_card)
4611{ 4006{
4612 unsigned char phase_ref; 4007 unsigned char phase_ref;
4613 void (*phase) (ULONG, UCHAR); 4008 void (*phase) (unsigned long, unsigned char);
4614
4615 4009
4616 DISABLE_AUTO(p_port); 4010 DISABLE_AUTO(p_port);
4617 4011
4618 phase_ref = (UCHAR) (RD_HARPOON(p_port+hp_scsisig) & S_SCSI_PHZ); 4012 phase_ref =
4013 (unsigned char)(RD_HARPOON(p_port + hp_scsisig) & S_SCSI_PHZ);
4619 4014
4620 phase = FPT_s_PhaseTbl[phase_ref]; 4015 phase = FPT_s_PhaseTbl[phase_ref];
4621 4016
4622 (*phase)(p_port, p_card); /* Call the correct phase func */ 4017 (*phase) (p_port, p_card); /* Call the correct phase func */
4623} 4018}
4624 4019
4625
4626
4627/*--------------------------------------------------------------------- 4020/*---------------------------------------------------------------------
4628 * 4021 *
4629 * Function: Data Out Phase 4022 * Function: Data Out Phase
@@ -4632,42 +4025,39 @@ static void FPT_phaseDecode(ULONG p_port, UCHAR p_card)
4632 * 4025 *
4633 *---------------------------------------------------------------------*/ 4026 *---------------------------------------------------------------------*/
4634 4027
4635static void FPT_phaseDataOut(ULONG port, UCHAR p_card) 4028static void FPT_phaseDataOut(unsigned long port, unsigned char p_card)
4636{ 4029{
4637 4030
4638 PSCCB currSCCB; 4031 struct sccb *currSCCB;
4639
4640 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4641 if (currSCCB == NULL)
4642 {
4643 return; /* Exit if No SCCB record */
4644 }
4645 4032
4646 currSCCB->Sccb_scsistat = DATA_OUT_ST; 4033 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4647 currSCCB->Sccb_XferState &= ~(F_HOST_XFER_DIR | F_NO_DATA_YET); 4034 if (currSCCB == NULL) {
4035 return; /* Exit if No SCCB record */
4036 }
4648 4037
4649 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 4038 currSCCB->Sccb_scsistat = DATA_OUT_ST;
4039 currSCCB->Sccb_XferState &= ~(F_HOST_XFER_DIR | F_NO_DATA_YET);
4650 4040
4651 WRW_HARPOON((port+hp_intstat), XFER_CNT_0); 4041 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
4652 4042
4653 WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START)); 4043 WRW_HARPOON((port + hp_intstat), XFER_CNT_0);
4654 4044
4655 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]); 4045 WR_HARPOON(port + hp_autostart_0, (END_DATA + END_DATA_START));
4656 4046
4657 if (currSCCB->Sccb_XferCnt == 0) { 4047 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]);
4658 4048
4049 if (currSCCB->Sccb_XferCnt == 0) {
4659 4050
4660 if ((currSCCB->ControlByte & SCCB_DATA_XFER_OUT) && 4051 if ((currSCCB->ControlByte & SCCB_DATA_XFER_OUT) &&
4661 (currSCCB->HostStatus == SCCB_COMPLETE)) 4052 (currSCCB->HostStatus == SCCB_COMPLETE))
4662 currSCCB->HostStatus = SCCB_DATA_OVER_RUN; 4053 currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
4663 4054
4664 FPT_sxfrp(port,p_card); 4055 FPT_sxfrp(port, p_card);
4665 if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET))) 4056 if (!(RDW_HARPOON((port + hp_intstat)) & (BUS_FREE | RESET)))
4666 FPT_phaseDecode(port,p_card); 4057 FPT_phaseDecode(port, p_card);
4667 } 4058 }
4668} 4059}
4669 4060
4670
4671/*--------------------------------------------------------------------- 4061/*---------------------------------------------------------------------
4672 * 4062 *
4673 * Function: Data In Phase 4063 * Function: Data In Phase
@@ -4676,43 +4066,40 @@ static void FPT_phaseDataOut(ULONG port, UCHAR p_card)
4676 * 4066 *
4677 *---------------------------------------------------------------------*/ 4067 *---------------------------------------------------------------------*/
4678 4068
4679static void FPT_phaseDataIn(ULONG port, UCHAR p_card) 4069static void FPT_phaseDataIn(unsigned long port, unsigned char p_card)
4680{ 4070{
4681 4071
4682 PSCCB currSCCB; 4072 struct sccb *currSCCB;
4683
4684 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4685
4686 if (currSCCB == NULL)
4687 {
4688 return; /* Exit if No SCCB record */
4689 }
4690 4073
4074 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4691 4075
4692 currSCCB->Sccb_scsistat = DATA_IN_ST; 4076 if (currSCCB == NULL) {
4693 currSCCB->Sccb_XferState |= F_HOST_XFER_DIR; 4077 return; /* Exit if No SCCB record */
4694 currSCCB->Sccb_XferState &= ~F_NO_DATA_YET; 4078 }
4695 4079
4696 WR_HARPOON(port+hp_portctrl_0, SCSI_PORT); 4080 currSCCB->Sccb_scsistat = DATA_IN_ST;
4081 currSCCB->Sccb_XferState |= F_HOST_XFER_DIR;
4082 currSCCB->Sccb_XferState &= ~F_NO_DATA_YET;
4697 4083
4698 WRW_HARPOON((port+hp_intstat), XFER_CNT_0); 4084 WR_HARPOON(port + hp_portctrl_0, SCSI_PORT);
4699 4085
4700 WR_HARPOON(port+hp_autostart_0, (END_DATA+END_DATA_START)); 4086 WRW_HARPOON((port + hp_intstat), XFER_CNT_0);
4701 4087
4702 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]); 4088 WR_HARPOON(port + hp_autostart_0, (END_DATA + END_DATA_START));
4703 4089
4704 if (currSCCB->Sccb_XferCnt == 0) { 4090 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]);
4705 4091
4092 if (currSCCB->Sccb_XferCnt == 0) {
4706 4093
4707 if ((currSCCB->ControlByte & SCCB_DATA_XFER_IN) && 4094 if ((currSCCB->ControlByte & SCCB_DATA_XFER_IN) &&
4708 (currSCCB->HostStatus == SCCB_COMPLETE)) 4095 (currSCCB->HostStatus == SCCB_COMPLETE))
4709 currSCCB->HostStatus = SCCB_DATA_OVER_RUN; 4096 currSCCB->HostStatus = SCCB_DATA_OVER_RUN;
4710 4097
4711 FPT_sxfrp(port,p_card); 4098 FPT_sxfrp(port, p_card);
4712 if (!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | RESET))) 4099 if (!(RDW_HARPOON((port + hp_intstat)) & (BUS_FREE | RESET)))
4713 FPT_phaseDecode(port,p_card); 4100 FPT_phaseDecode(port, p_card);
4714 4101
4715 } 4102 }
4716} 4103}
4717 4104
4718/*--------------------------------------------------------------------- 4105/*---------------------------------------------------------------------
@@ -4723,50 +4110,49 @@ static void FPT_phaseDataIn(ULONG port, UCHAR p_card)
4723 * 4110 *
4724 *---------------------------------------------------------------------*/ 4111 *---------------------------------------------------------------------*/
4725 4112
4726static void FPT_phaseCommand(ULONG p_port, UCHAR p_card) 4113static void FPT_phaseCommand(unsigned long p_port, unsigned char p_card)
4727{ 4114{
4728 PSCCB currSCCB; 4115 struct sccb *currSCCB;
4729 ULONG cdb_reg; 4116 unsigned long cdb_reg;
4730 UCHAR i; 4117 unsigned char i;
4731 4118
4732 currSCCB = FPT_BL_Card[p_card].currentSCCB; 4119 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4733
4734 if (currSCCB->OperationCode == RESET_COMMAND) {
4735 4120
4736 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL; 4121 if (currSCCB->OperationCode == RESET_COMMAND) {
4737 currSCCB->CdbLength = SIX_BYTE_CMD;
4738 }
4739 4122
4740 WR_HARPOON(p_port+hp_scsisig, 0x00); 4123 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
4124 currSCCB->CdbLength = SIX_BYTE_CMD;
4125 }
4741 4126
4742 ARAM_ACCESS(p_port); 4127 WR_HARPOON(p_port + hp_scsisig, 0x00);
4743 4128
4129 ARAM_ACCESS(p_port);
4744 4130
4745 cdb_reg = p_port + CMD_STRT; 4131 cdb_reg = p_port + CMD_STRT;
4746 4132
4747 for (i=0; i < currSCCB->CdbLength; i++) { 4133 for (i = 0; i < currSCCB->CdbLength; i++) {
4748 4134
4749 if (currSCCB->OperationCode == RESET_COMMAND) 4135 if (currSCCB->OperationCode == RESET_COMMAND)
4750 4136
4751 WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + 0x00)); 4137 WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + 0x00));
4752 4138
4753 else 4139 else
4754 WRW_HARPOON(cdb_reg, (MPM_OP + ACOMMAND + currSCCB->Cdb[i])); 4140 WRW_HARPOON(cdb_reg,
4755 cdb_reg +=2; 4141 (MPM_OP + ACOMMAND + currSCCB->Cdb[i]));
4756 } 4142 cdb_reg += 2;
4143 }
4757 4144
4758 if (currSCCB->CdbLength != TWELVE_BYTE_CMD) 4145 if (currSCCB->CdbLength != TWELVE_BYTE_CMD)
4759 WRW_HARPOON(cdb_reg, (BRH_OP+ALWAYS+ NP)); 4146 WRW_HARPOON(cdb_reg, (BRH_OP + ALWAYS + NP));
4760 4147
4761 WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT)); 4148 WR_HARPOON(p_port + hp_portctrl_0, (SCSI_PORT));
4762 4149
4763 currSCCB->Sccb_scsistat = COMMAND_ST; 4150 currSCCB->Sccb_scsistat = COMMAND_ST;
4764 4151
4765 WR_HARPOON(p_port+hp_autostart_3, (AUTO_IMMED | CMD_ONLY_STRT)); 4152 WR_HARPOON(p_port + hp_autostart_3, (AUTO_IMMED | CMD_ONLY_STRT));
4766 SGRAM_ACCESS(p_port); 4153 SGRAM_ACCESS(p_port);
4767} 4154}
4768 4155
4769
4770/*--------------------------------------------------------------------- 4156/*---------------------------------------------------------------------
4771 * 4157 *
4772 * Function: Status phase 4158 * Function: Status phase
@@ -4775,19 +4161,18 @@ static void FPT_phaseCommand(ULONG p_port, UCHAR p_card)
4775 * 4161 *
4776 *---------------------------------------------------------------------*/ 4162 *---------------------------------------------------------------------*/
4777 4163
4778static void FPT_phaseStatus(ULONG port, UCHAR p_card) 4164static void FPT_phaseStatus(unsigned long port, unsigned char p_card)
4779{ 4165{
4780 /* Start-up the automation to finish off this command and let the 4166 /* Start-up the automation to finish off this command and let the
4781 isr handle the interrupt for command complete when it comes in. 4167 isr handle the interrupt for command complete when it comes in.
4782 We could wait here for the interrupt to be generated? 4168 We could wait here for the interrupt to be generated?
4783 */ 4169 */
4784 4170
4785 WR_HARPOON(port+hp_scsisig, 0x00); 4171 WR_HARPOON(port + hp_scsisig, 0x00);
4786 4172
4787 WR_HARPOON(port+hp_autostart_0, (AUTO_IMMED+END_DATA_START)); 4173 WR_HARPOON(port + hp_autostart_0, (AUTO_IMMED + END_DATA_START));
4788} 4174}
4789 4175
4790
4791/*--------------------------------------------------------------------- 4176/*---------------------------------------------------------------------
4792 * 4177 *
4793 * Function: Phase Message Out 4178 * Function: Phase Message Out
@@ -4797,11 +4182,11 @@ static void FPT_phaseStatus(ULONG port, UCHAR p_card)
4797 * 4182 *
4798 *---------------------------------------------------------------------*/ 4183 *---------------------------------------------------------------------*/
4799 4184
4800static void FPT_phaseMsgOut(ULONG port, UCHAR p_card) 4185static void FPT_phaseMsgOut(unsigned long port, unsigned char p_card)
4801{ 4186{
4802 UCHAR message,scsiID; 4187 unsigned char message, scsiID;
4803 PSCCB currSCCB; 4188 struct sccb *currSCCB;
4804 PSCCBMgr_tar_info currTar_Info; 4189 struct sccb_mgr_tar_info *currTar_Info;
4805 4190
4806 currSCCB = FPT_BL_Card[p_card].currentSCCB; 4191 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4807 4192
@@ -4810,133 +4195,124 @@ static void FPT_phaseMsgOut(ULONG port, UCHAR p_card)
4810 message = currSCCB->Sccb_scsimsg; 4195 message = currSCCB->Sccb_scsimsg;
4811 scsiID = currSCCB->TargID; 4196 scsiID = currSCCB->TargID;
4812 4197
4813 if (message == SMDEV_RESET) 4198 if (message == SMDEV_RESET) {
4814 {
4815
4816 4199
4817 currTar_Info = &FPT_sccbMgrTbl[p_card][scsiID]; 4200 currTar_Info = &FPT_sccbMgrTbl[p_card][scsiID];
4818 currTar_Info->TarSyncCtrl = 0; 4201 currTar_Info->TarSyncCtrl = 0;
4819 FPT_sssyncv(port, scsiID, NARROW_SCSI,currTar_Info); 4202 FPT_sssyncv(port, scsiID, NARROW_SCSI, currTar_Info);
4820 4203
4821 if (FPT_sccbMgrTbl[p_card][scsiID].TarEEValue & EE_SYNC_MASK) 4204 if (FPT_sccbMgrTbl[p_card][scsiID].
4822 { 4205 TarEEValue & EE_SYNC_MASK) {
4823 4206
4824 FPT_sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_SYNC_MASK; 4207 FPT_sccbMgrTbl[p_card][scsiID].TarStatus &=
4208 ~TAR_SYNC_MASK;
4825 4209
4826 } 4210 }
4827 4211
4828 if (FPT_sccbMgrTbl[p_card][scsiID].TarEEValue & EE_WIDE_SCSI) 4212 if (FPT_sccbMgrTbl[p_card][scsiID].
4829 { 4213 TarEEValue & EE_WIDE_SCSI) {
4830 4214
4831 FPT_sccbMgrTbl[p_card][scsiID].TarStatus &= ~TAR_WIDE_MASK; 4215 FPT_sccbMgrTbl[p_card][scsiID].TarStatus &=
4216 ~TAR_WIDE_MASK;
4832 } 4217 }
4833 4218
4834 4219 FPT_queueFlushSccb(p_card, SCCB_COMPLETE);
4835 FPT_queueFlushSccb(p_card,SCCB_COMPLETE); 4220 FPT_SccbMgrTableInitTarget(p_card, scsiID);
4836 FPT_SccbMgrTableInitTarget(p_card,scsiID); 4221 } else if (currSCCB->Sccb_scsistat == ABORT_ST) {
4837 }
4838 else if (currSCCB->Sccb_scsistat == ABORT_ST)
4839 {
4840 currSCCB->HostStatus = SCCB_COMPLETE; 4222 currSCCB->HostStatus = SCCB_COMPLETE;
4841 if(FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] != NULL) 4223 if (FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] !=
4842 { 4224 NULL) {
4843 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL; 4225 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->
4226 Sccb_tag] = NULL;
4844 FPT_sccbMgrTbl[p_card][scsiID].TarTagQ_Cnt--; 4227 FPT_sccbMgrTbl[p_card][scsiID].TarTagQ_Cnt--;
4845 } 4228 }
4846
4847 }
4848 4229
4849 else if (currSCCB->Sccb_scsistat < COMMAND_ST) 4230 }
4850 {
4851 4231
4232 else if (currSCCB->Sccb_scsistat < COMMAND_ST) {
4852 4233
4853 if(message == SMNO_OP) 4234 if (message == SMNO_OP) {
4854 {
4855 currSCCB->Sccb_MGRFlags |= F_DEV_SELECTED; 4235 currSCCB->Sccb_MGRFlags |= F_DEV_SELECTED;
4856 4236
4857 FPT_ssel(port,p_card); 4237 FPT_ssel(port, p_card);
4858 return; 4238 return;
4859 } 4239 }
4860 } 4240 } else {
4861 else
4862 {
4863
4864 4241
4865 if (message == SMABORT) 4242 if (message == SMABORT)
4866 4243
4867 FPT_queueFlushSccb(p_card,SCCB_COMPLETE); 4244 FPT_queueFlushSccb(p_card, SCCB_COMPLETE);
4868 } 4245 }
4869 4246
4870 } 4247 } else {
4871 else
4872 {
4873 message = SMABORT; 4248 message = SMABORT;
4874 } 4249 }
4875 4250
4876 WRW_HARPOON((port+hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0)); 4251 WRW_HARPOON((port + hp_intstat), (BUS_FREE | PHASE | XFER_CNT_0));
4877 4252
4253 WR_HARPOON(port + hp_portctrl_0, SCSI_BUS_EN);
4878 4254
4879 WR_HARPOON(port+hp_portctrl_0, SCSI_BUS_EN); 4255 WR_HARPOON(port + hp_scsidata_0, message);
4880 4256
4881 WR_HARPOON(port+hp_scsidata_0,message); 4257 WR_HARPOON(port + hp_scsisig, (SCSI_ACK + S_ILL_PH));
4882
4883 WR_HARPOON(port+hp_scsisig, (SCSI_ACK + S_ILL_PH));
4884 4258
4885 ACCEPT_MSG(port); 4259 ACCEPT_MSG(port);
4886 4260
4887 WR_HARPOON(port+hp_portctrl_0, 0x00); 4261 WR_HARPOON(port + hp_portctrl_0, 0x00);
4888 4262
4889 if ((message == SMABORT) || (message == SMDEV_RESET) || 4263 if ((message == SMABORT) || (message == SMDEV_RESET) ||
4890 (message == SMABORT_TAG) ) 4264 (message == SMABORT_TAG)) {
4891 {
4892 4265
4893 while(!(RDW_HARPOON((port+hp_intstat)) & (BUS_FREE | PHASE))) {} 4266 while (!(RDW_HARPOON((port + hp_intstat)) & (BUS_FREE | PHASE))) {
4267 }
4894 4268
4895 if (RDW_HARPOON((port+hp_intstat)) & BUS_FREE) 4269 if (RDW_HARPOON((port + hp_intstat)) & BUS_FREE) {
4896 { 4270 WRW_HARPOON((port + hp_intstat), BUS_FREE);
4897 WRW_HARPOON((port+hp_intstat), BUS_FREE);
4898 4271
4899 if (currSCCB != NULL) 4272 if (currSCCB != NULL) {
4900 {
4901 4273
4902 if((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4274 if ((FPT_BL_Card[p_card].
4903 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 4275 globalFlags & F_CONLUN_IO)
4904 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 0; 4276 &&
4277 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4278 TarStatus & TAR_TAG_Q_MASK) !=
4279 TAG_Q_TRYING))
4280 FPT_sccbMgrTbl[p_card][currSCCB->
4281 TargID].
4282 TarLUNBusy[currSCCB->Lun] = 0;
4905 else 4283 else
4906 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 0; 4284 FPT_sccbMgrTbl[p_card][currSCCB->
4285 TargID].
4286 TarLUNBusy[0] = 0;
4907 4287
4908 FPT_queueCmdComplete(&FPT_BL_Card[p_card],currSCCB, p_card); 4288 FPT_queueCmdComplete(&FPT_BL_Card[p_card],
4289 currSCCB, p_card);
4909 } 4290 }
4910 4291
4911 else 4292 else {
4912 { 4293 FPT_BL_Card[p_card].globalFlags |=
4913 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD; 4294 F_NEW_SCCB_CMD;
4914 } 4295 }
4915 } 4296 }
4916 4297
4917 else 4298 else {
4918 {
4919 4299
4920 FPT_sxfrp(port,p_card); 4300 FPT_sxfrp(port, p_card);
4921 } 4301 }
4922 } 4302 }
4923 4303
4924 else 4304 else {
4925 {
4926 4305
4927 if(message == SMPARITY) 4306 if (message == SMPARITY) {
4928 {
4929 currSCCB->Sccb_scsimsg = SMNO_OP; 4307 currSCCB->Sccb_scsimsg = SMNO_OP;
4930 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 4308 WR_HARPOON(port + hp_autostart_1,
4931 } 4309 (AUTO_IMMED + DISCONNECT_START));
4932 else 4310 } else {
4933 { 4311 FPT_sxfrp(port, p_card);
4934 FPT_sxfrp(port,p_card);
4935 } 4312 }
4936 } 4313 }
4937} 4314}
4938 4315
4939
4940/*--------------------------------------------------------------------- 4316/*---------------------------------------------------------------------
4941 * 4317 *
4942 * Function: Message In phase 4318 * Function: Message In phase
@@ -4945,49 +4321,43 @@ static void FPT_phaseMsgOut(ULONG port, UCHAR p_card)
4945 * 4321 *
4946 *---------------------------------------------------------------------*/ 4322 *---------------------------------------------------------------------*/
4947 4323
4948static void FPT_phaseMsgIn(ULONG port, UCHAR p_card) 4324static void FPT_phaseMsgIn(unsigned long port, unsigned char p_card)
4949{ 4325{
4950 UCHAR message; 4326 unsigned char message;
4951 PSCCB currSCCB; 4327 struct sccb *currSCCB;
4952 4328
4953 currSCCB = FPT_BL_Card[p_card].currentSCCB; 4329 currSCCB = FPT_BL_Card[p_card].currentSCCB;
4954 4330
4955 if (FPT_BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) 4331 if (FPT_BL_Card[p_card].globalFlags & F_HOST_XFER_ACT) {
4956 {
4957 4332
4958 FPT_phaseChkFifo(port, p_card); 4333 FPT_phaseChkFifo(port, p_card);
4959 } 4334 }
4960 4335
4961 message = RD_HARPOON(port+hp_scsidata_0); 4336 message = RD_HARPOON(port + hp_scsidata_0);
4962 if ((message == SMDISC) || (message == SMSAVE_DATA_PTR)) 4337 if ((message == SMDISC) || (message == SMSAVE_DATA_PTR)) {
4963 {
4964 4338
4965 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+END_DATA_START)); 4339 WR_HARPOON(port + hp_autostart_1,
4340 (AUTO_IMMED + END_DATA_START));
4966 4341
4967 } 4342 }
4968 4343
4969 else 4344 else {
4970 {
4971
4972 message = FPT_sfm(port,currSCCB);
4973 if (message)
4974 {
4975 4345
4346 message = FPT_sfm(port, currSCCB);
4347 if (message) {
4976 4348
4977 FPT_sdecm(message,port,p_card); 4349 FPT_sdecm(message, port, p_card);
4978 4350
4979 } 4351 } else {
4980 else 4352 if (currSCCB->Sccb_scsimsg != SMPARITY)
4981 {
4982 if(currSCCB->Sccb_scsimsg != SMPARITY)
4983 ACCEPT_MSG(port); 4353 ACCEPT_MSG(port);
4984 WR_HARPOON(port+hp_autostart_1, (AUTO_IMMED+DISCONNECT_START)); 4354 WR_HARPOON(port + hp_autostart_1,
4355 (AUTO_IMMED + DISCONNECT_START));
4985 } 4356 }
4986 } 4357 }
4987 4358
4988} 4359}
4989 4360
4990
4991/*--------------------------------------------------------------------- 4361/*---------------------------------------------------------------------
4992 * 4362 *
4993 * Function: Illegal phase 4363 * Function: Illegal phase
@@ -4998,25 +4368,23 @@ static void FPT_phaseMsgIn(ULONG port, UCHAR p_card)
4998 * 4368 *
4999 *---------------------------------------------------------------------*/ 4369 *---------------------------------------------------------------------*/
5000 4370
5001static void FPT_phaseIllegal(ULONG port, UCHAR p_card) 4371static void FPT_phaseIllegal(unsigned long port, unsigned char p_card)
5002{ 4372{
5003 PSCCB currSCCB; 4373 struct sccb *currSCCB;
5004 4374
5005 currSCCB = FPT_BL_Card[p_card].currentSCCB; 4375 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5006 4376
5007 WR_HARPOON(port+hp_scsisig, RD_HARPOON(port+hp_scsisig)); 4377 WR_HARPOON(port + hp_scsisig, RD_HARPOON(port + hp_scsisig));
5008 if (currSCCB != NULL) { 4378 if (currSCCB != NULL) {
5009 4379
5010 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL; 4380 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
5011 currSCCB->Sccb_scsistat = ABORT_ST; 4381 currSCCB->Sccb_scsistat = ABORT_ST;
5012 currSCCB->Sccb_scsimsg = SMABORT; 4382 currSCCB->Sccb_scsimsg = SMABORT;
5013 } 4383 }
5014 4384
5015 ACCEPT_MSG_ATN(port); 4385 ACCEPT_MSG_ATN(port);
5016} 4386}
5017 4387
5018
5019
5020/*--------------------------------------------------------------------- 4388/*---------------------------------------------------------------------
5021 * 4389 *
5022 * Function: Phase Check FIFO 4390 * Function: Phase Check FIFO
@@ -5026,76 +4394,69 @@ static void FPT_phaseIllegal(ULONG port, UCHAR p_card)
5026 * 4394 *
5027 *---------------------------------------------------------------------*/ 4395 *---------------------------------------------------------------------*/
5028 4396
5029static void FPT_phaseChkFifo(ULONG port, UCHAR p_card) 4397static void FPT_phaseChkFifo(unsigned long port, unsigned char p_card)
5030{ 4398{
5031 ULONG xfercnt; 4399 unsigned long xfercnt;
5032 PSCCB currSCCB; 4400 struct sccb *currSCCB;
5033
5034 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5035
5036 if (currSCCB->Sccb_scsistat == DATA_IN_ST)
5037 {
5038
5039 while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) &&
5040 (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {}
5041 4401
4402 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5042 4403
5043 if (!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) 4404 if (currSCCB->Sccb_scsistat == DATA_IN_ST) {
5044 {
5045 currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
5046
5047 currSCCB->Sccb_XferCnt = 0;
5048
5049 if ((RDW_HARPOON((port+hp_intstat)) & PARITY) &&
5050 (currSCCB->HostStatus == SCCB_COMPLETE))
5051 {
5052 currSCCB->HostStatus = SCCB_PARITY_ERR;
5053 WRW_HARPOON((port+hp_intstat), PARITY);
5054 }
5055
5056 FPT_hostDataXferAbort(port,p_card,currSCCB);
5057
5058 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]);
5059 4405
5060 while((!(RD_HARPOON(port+hp_xferstat) & FIFO_EMPTY)) && 4406 while ((!(RD_HARPOON(port + hp_xferstat) & FIFO_EMPTY)) &&
5061 (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY)) {} 4407 (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY)) {
4408 }
5062 4409
5063 } 4410 if (!(RD_HARPOON(port + hp_xferstat) & FIFO_EMPTY)) {
5064 } /*End Data In specific code. */ 4411 currSCCB->Sccb_ATC += currSCCB->Sccb_XferCnt;
5065 4412
4413 currSCCB->Sccb_XferCnt = 0;
5066 4414
4415 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) &&
4416 (currSCCB->HostStatus == SCCB_COMPLETE)) {
4417 currSCCB->HostStatus = SCCB_PARITY_ERR;
4418 WRW_HARPOON((port + hp_intstat), PARITY);
4419 }
5067 4420
5068 GET_XFER_CNT(port,xfercnt); 4421 FPT_hostDataXferAbort(port, p_card, currSCCB);
5069 4422
4423 FPT_dataXferProcessor(port, &FPT_BL_Card[p_card]);
5070 4424
5071 WR_HARPOON(port+hp_xfercnt_0, 0x00); 4425 while ((!(RD_HARPOON(port + hp_xferstat) & FIFO_EMPTY))
4426 && (RD_HARPOON(port + hp_ext_status) &
4427 BM_CMD_BUSY)) {
4428 }
5072 4429
4430 }
4431 }
5073 4432
5074 WR_HARPOON(port+hp_portctrl_0, 0x00); 4433 /*End Data In specific code. */
4434 GET_XFER_CNT(port, xfercnt);
5075 4435
5076 currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt - xfercnt); 4436 WR_HARPOON(port + hp_xfercnt_0, 0x00);
5077 4437
5078 currSCCB->Sccb_XferCnt = xfercnt; 4438 WR_HARPOON(port + hp_portctrl_0, 0x00);
5079 4439
5080 if ((RDW_HARPOON((port+hp_intstat)) & PARITY) && 4440 currSCCB->Sccb_ATC += (currSCCB->Sccb_XferCnt - xfercnt);
5081 (currSCCB->HostStatus == SCCB_COMPLETE)) {
5082 4441
5083 currSCCB->HostStatus = SCCB_PARITY_ERR; 4442 currSCCB->Sccb_XferCnt = xfercnt;
5084 WRW_HARPOON((port+hp_intstat), PARITY);
5085 }
5086 4443
4444 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) &&
4445 (currSCCB->HostStatus == SCCB_COMPLETE)) {
5087 4446
5088 FPT_hostDataXferAbort(port,p_card,currSCCB); 4447 currSCCB->HostStatus = SCCB_PARITY_ERR;
4448 WRW_HARPOON((port + hp_intstat), PARITY);
4449 }
5089 4450
4451 FPT_hostDataXferAbort(port, p_card, currSCCB);
5090 4452
5091 WR_HARPOON(port+hp_fifowrite, 0x00); 4453 WR_HARPOON(port + hp_fifowrite, 0x00);
5092 WR_HARPOON(port+hp_fiforead, 0x00); 4454 WR_HARPOON(port + hp_fiforead, 0x00);
5093 WR_HARPOON(port+hp_xferstat, 0x00); 4455 WR_HARPOON(port + hp_xferstat, 0x00);
5094 4456
5095 WRW_HARPOON((port+hp_intstat), XFER_CNT_0); 4457 WRW_HARPOON((port + hp_intstat), XFER_CNT_0);
5096} 4458}
5097 4459
5098
5099/*--------------------------------------------------------------------- 4460/*---------------------------------------------------------------------
5100 * 4461 *
5101 * Function: Phase Bus Free 4462 * Function: Phase Bus Free
@@ -5104,96 +4465,94 @@ static void FPT_phaseChkFifo(ULONG port, UCHAR p_card)
5104 * because of command complete or from a disconnect. 4465 * because of command complete or from a disconnect.
5105 * 4466 *
5106 *---------------------------------------------------------------------*/ 4467 *---------------------------------------------------------------------*/
5107static void FPT_phaseBusFree(ULONG port, UCHAR p_card) 4468static void FPT_phaseBusFree(unsigned long port, unsigned char p_card)
5108{ 4469{
5109 PSCCB currSCCB; 4470 struct sccb *currSCCB;
5110
5111 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5112 4471
5113 if (currSCCB != NULL) 4472 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5114 {
5115 4473
5116 DISABLE_AUTO(port); 4474 if (currSCCB != NULL) {
5117 4475
4476 DISABLE_AUTO(port);
5118 4477
5119 if (currSCCB->OperationCode == RESET_COMMAND) 4478 if (currSCCB->OperationCode == RESET_COMMAND) {
5120 {
5121 4479
5122 if((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4480 if ((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5123 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 4481 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5124 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 0; 4482 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
5125 else 4483 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5126 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 0; 4484 TarLUNBusy[currSCCB->Lun] = 0;
5127
5128 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB, p_card);
5129
5130 FPT_queueSearchSelect(&FPT_BL_Card[p_card],p_card);
5131
5132 }
5133
5134 else if(currSCCB->Sccb_scsistat == SELECT_SN_ST)
5135 {
5136 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
5137 (UCHAR)SYNC_SUPPORTED;
5138 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK;
5139 }
5140
5141 else if(currSCCB->Sccb_scsistat == SELECT_WN_ST)
5142 {
5143 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
5144 (FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5145 TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
5146
5147 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI;
5148 }
5149
5150 else if(currSCCB->Sccb_scsistat == SELECT_Q_ST)
5151 {
5152 /* Make sure this is not a phony BUS_FREE. If we were
5153 reselected or if BUSY is NOT on then this is a
5154 valid BUS FREE. SRR Wednesday, 5/10/1995. */
5155
5156 if ((!(RD_HARPOON(port+hp_scsisig) & SCSI_BSY)) ||
5157 (RDW_HARPOON((port+hp_intstat)) & RSEL))
5158 {
5159 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_TAG_Q_MASK;
5160 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |= TAG_Q_REJECT;
5161 }
5162
5163 else
5164 {
5165 return;
5166 }
5167 }
5168
5169 else
5170 {
5171
5172 currSCCB->Sccb_scsistat = BUS_FREE_ST;
5173
5174 if (!currSCCB->HostStatus)
5175 {
5176 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
5177 }
5178
5179 if((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5180 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
5181 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 0;
5182 else 4485 else
5183 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 0; 4486 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4487 TarLUNBusy[0] = 0;
5184 4488
5185 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB, p_card); 4489 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB,
5186 return; 4490 p_card);
5187 }
5188 4491
4492 FPT_queueSearchSelect(&FPT_BL_Card[p_card], p_card);
5189 4493
5190 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD; 4494 }
5191 4495
5192 } /*end if !=null */ 4496 else if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
5193} 4497 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
4498 (unsigned char)SYNC_SUPPORTED;
4499 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &=
4500 ~EE_SYNC_MASK;
4501 }
5194 4502
4503 else if (currSCCB->Sccb_scsistat == SELECT_WN_ST) {
4504 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
4505 (FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4506 TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
5195 4507
4508 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &=
4509 ~EE_WIDE_SCSI;
4510 }
5196 4511
4512 else if (currSCCB->Sccb_scsistat == SELECT_Q_ST) {
4513 /* Make sure this is not a phony BUS_FREE. If we were
4514 reselected or if BUSY is NOT on then this is a
4515 valid BUS FREE. SRR Wednesday, 5/10/1995. */
4516
4517 if ((!(RD_HARPOON(port + hp_scsisig) & SCSI_BSY)) ||
4518 (RDW_HARPOON((port + hp_intstat)) & RSEL)) {
4519 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4520 TarStatus &= ~TAR_TAG_Q_MASK;
4521 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4522 TarStatus |= TAG_Q_REJECT;
4523 }
4524
4525 else {
4526 return;
4527 }
4528 }
4529
4530 else {
4531
4532 currSCCB->Sccb_scsistat = BUS_FREE_ST;
4533
4534 if (!currSCCB->HostStatus) {
4535 currSCCB->HostStatus = SCCB_PHASE_SEQUENCE_FAIL;
4536 }
4537
4538 if ((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
4539 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4540 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
4541 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4542 TarLUNBusy[currSCCB->Lun] = 0;
4543 else
4544 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
4545 TarLUNBusy[0] = 0;
4546
4547 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB,
4548 p_card);
4549 return;
4550 }
4551
4552 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
4553
4554 } /*end if !=null */
4555}
5197 4556
5198/*--------------------------------------------------------------------- 4557/*---------------------------------------------------------------------
5199 * 4558 *
@@ -5202,103 +4561,101 @@ static void FPT_phaseBusFree(ULONG port, UCHAR p_card)
5202 * Description: Load the Automation RAM with the defualt map values. 4561 * Description: Load the Automation RAM with the defualt map values.
5203 * 4562 *
5204 *---------------------------------------------------------------------*/ 4563 *---------------------------------------------------------------------*/
5205static void FPT_autoLoadDefaultMap(ULONG p_port) 4564static void FPT_autoLoadDefaultMap(unsigned long p_port)
5206{ 4565{
5207 ULONG map_addr; 4566 unsigned long map_addr;
5208 4567
5209 ARAM_ACCESS(p_port); 4568 ARAM_ACCESS(p_port);
5210 map_addr = p_port + hp_aramBase; 4569 map_addr = p_port + hp_aramBase;
5211 4570
5212 WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0xC0)); /*ID MESSAGE */ 4571 WRW_HARPOON(map_addr, (MPM_OP + AMSG_OUT + 0xC0)); /*ID MESSAGE */
5213 map_addr +=2; 4572 map_addr += 2;
5214 WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x20)); /*SIMPLE TAG QUEUEING MSG */ 4573 WRW_HARPOON(map_addr, (MPM_OP + AMSG_OUT + 0x20)); /*SIMPLE TAG QUEUEING MSG */
5215 map_addr +=2; 4574 map_addr += 2;
5216 WRW_HARPOON(map_addr, RAT_OP); /*RESET ATTENTION */ 4575 WRW_HARPOON(map_addr, RAT_OP); /*RESET ATTENTION */
5217 map_addr +=2; 4576 map_addr += 2;
5218 WRW_HARPOON(map_addr, (MPM_OP+AMSG_OUT+ 0x00)); /*TAG ID MSG */ 4577 WRW_HARPOON(map_addr, (MPM_OP + AMSG_OUT + 0x00)); /*TAG ID MSG */
5219 map_addr +=2; 4578 map_addr += 2;
5220 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 0 */ 4579 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 0 */
5221 map_addr +=2; 4580 map_addr += 2;
5222 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 1 */ 4581 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 1 */
5223 map_addr +=2; 4582 map_addr += 2;
5224 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 2 */ 4583 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 2 */
5225 map_addr +=2; 4584 map_addr += 2;
5226 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 3 */ 4585 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 3 */
5227 map_addr +=2; 4586 map_addr += 2;
5228 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 4 */ 4587 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 4 */
5229 map_addr +=2; 4588 map_addr += 2;
5230 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 5 */ 4589 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 5 */
5231 map_addr +=2; 4590 map_addr += 2;
5232 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 6 */ 4591 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 6 */
5233 map_addr +=2; 4592 map_addr += 2;
5234 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 7 */ 4593 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 7 */
5235 map_addr +=2; 4594 map_addr += 2;
5236 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 8 */ 4595 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 8 */
5237 map_addr +=2; 4596 map_addr += 2;
5238 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 9 */ 4597 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 9 */
5239 map_addr +=2; 4598 map_addr += 2;
5240 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 10 */ 4599 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 10 */
5241 map_addr +=2; 4600 map_addr += 2;
5242 WRW_HARPOON(map_addr, (MPM_OP+ACOMMAND+ 0x00)); /*CDB BYTE 11 */ 4601 WRW_HARPOON(map_addr, (MPM_OP + ACOMMAND + 0x00)); /*CDB BYTE 11 */
5243 map_addr +=2; 4602 map_addr += 2;
5244 WRW_HARPOON(map_addr, (CPE_OP+ADATA_OUT+ DINT)); /*JUMP IF DATA OUT */ 4603 WRW_HARPOON(map_addr, (CPE_OP + ADATA_OUT + DINT)); /*JUMP IF DATA OUT */
5245 map_addr +=2; 4604 map_addr += 2;
5246 WRW_HARPOON(map_addr, (TCB_OP+FIFO_0+ DI)); /*JUMP IF NO DATA IN FIFO */ 4605 WRW_HARPOON(map_addr, (TCB_OP + FIFO_0 + DI)); /*JUMP IF NO DATA IN FIFO */
5247 map_addr +=2; /*This means AYNC DATA IN */ 4606 map_addr += 2; /*This means AYNC DATA IN */
5248 WRW_HARPOON(map_addr, (SSI_OP+ SSI_IDO_STRT)); /*STOP AND INTERRUPT */ 4607 WRW_HARPOON(map_addr, (SSI_OP + SSI_IDO_STRT)); /*STOP AND INTERRUPT */
5249 map_addr +=2; 4608 map_addr += 2;
5250 WRW_HARPOON(map_addr, (CPE_OP+ADATA_IN+DINT)); /*JUMP IF NOT DATA IN PHZ */ 4609 WRW_HARPOON(map_addr, (CPE_OP + ADATA_IN + DINT)); /*JUMP IF NOT DATA IN PHZ */
5251 map_addr +=2; 4610 map_addr += 2;
5252 WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK 4 DATA IN */ 4611 WRW_HARPOON(map_addr, (CPN_OP + AMSG_IN + ST)); /*IF NOT MSG IN CHECK 4 DATA IN */
5253 map_addr +=2; 4612 map_addr += 2;
5254 WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x02)); /*SAVE DATA PTR MSG? */ 4613 WRW_HARPOON(map_addr, (CRD_OP + SDATA + 0x02)); /*SAVE DATA PTR MSG? */
5255 map_addr +=2; 4614 map_addr += 2;
5256 WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ DC)); /*GO CHECK FOR DISCONNECT MSG */ 4615 WRW_HARPOON(map_addr, (BRH_OP + NOT_EQ + DC)); /*GO CHECK FOR DISCONNECT MSG */
5257 map_addr +=2; 4616 map_addr += 2;
5258 WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR1)); /*SAVE DATA PTRS MSG */ 4617 WRW_HARPOON(map_addr, (MRR_OP + SDATA + D_AR1)); /*SAVE DATA PTRS MSG */
5259 map_addr +=2; 4618 map_addr += 2;
5260 WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ ST)); /*IF NOT MSG IN CHECK DATA IN */ 4619 WRW_HARPOON(map_addr, (CPN_OP + AMSG_IN + ST)); /*IF NOT MSG IN CHECK DATA IN */
5261 map_addr +=2; 4620 map_addr += 2;
5262 WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x04)); /*DISCONNECT MSG? */ 4621 WRW_HARPOON(map_addr, (CRD_OP + SDATA + 0x04)); /*DISCONNECT MSG? */
5263 map_addr +=2; 4622 map_addr += 2;
5264 WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ UNKNWN));/*UKNKNOWN MSG */ 4623 WRW_HARPOON(map_addr, (BRH_OP + NOT_EQ + UNKNWN)); /*UKNKNOWN MSG */
5265 map_addr +=2; 4624 map_addr += 2;
5266 WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*XFER DISCONNECT MSG */ 4625 WRW_HARPOON(map_addr, (MRR_OP + SDATA + D_BUCKET)); /*XFER DISCONNECT MSG */
5267 map_addr +=2; 4626 map_addr += 2;
5268 WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITAR_DISC));/*STOP AND INTERRUPT */ 4627 WRW_HARPOON(map_addr, (SSI_OP + SSI_ITAR_DISC)); /*STOP AND INTERRUPT */
5269 map_addr +=2; 4628 map_addr += 2;
5270 WRW_HARPOON(map_addr, (CPN_OP+ASTATUS+ UNKNWN));/*JUMP IF NOT STATUS PHZ. */ 4629 WRW_HARPOON(map_addr, (CPN_OP + ASTATUS + UNKNWN)); /*JUMP IF NOT STATUS PHZ. */
5271 map_addr +=2; 4630 map_addr += 2;
5272 WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_AR0)); /*GET STATUS BYTE */ 4631 WRW_HARPOON(map_addr, (MRR_OP + SDATA + D_AR0)); /*GET STATUS BYTE */
5273 map_addr +=2; 4632 map_addr += 2;
5274 WRW_HARPOON(map_addr, (CPN_OP+AMSG_IN+ CC)); /*ERROR IF NOT MSG IN PHZ */ 4633 WRW_HARPOON(map_addr, (CPN_OP + AMSG_IN + CC)); /*ERROR IF NOT MSG IN PHZ */
5275 map_addr +=2; 4634 map_addr += 2;
5276 WRW_HARPOON(map_addr, (CRD_OP+SDATA+ 0x00)); /*CHECK FOR CMD COMPLETE MSG. */ 4635 WRW_HARPOON(map_addr, (CRD_OP + SDATA + 0x00)); /*CHECK FOR CMD COMPLETE MSG. */
5277 map_addr +=2; 4636 map_addr += 2;
5278 WRW_HARPOON(map_addr, (BRH_OP+NOT_EQ+ CC)); /*ERROR IF NOT CMD COMPLETE MSG. */ 4637 WRW_HARPOON(map_addr, (BRH_OP + NOT_EQ + CC)); /*ERROR IF NOT CMD COMPLETE MSG. */
5279 map_addr +=2; 4638 map_addr += 2;
5280 WRW_HARPOON(map_addr, (MRR_OP+SDATA+ D_BUCKET));/*GET CMD COMPLETE MSG */ 4639 WRW_HARPOON(map_addr, (MRR_OP + SDATA + D_BUCKET)); /*GET CMD COMPLETE MSG */
5281 map_addr +=2; 4640 map_addr += 2;
5282 WRW_HARPOON(map_addr, (SSI_OP+ SSI_ICMD_COMP));/*END OF COMMAND */ 4641 WRW_HARPOON(map_addr, (SSI_OP + SSI_ICMD_COMP)); /*END OF COMMAND */
5283 map_addr +=2; 4642 map_addr += 2;
5284 4643
5285 WRW_HARPOON(map_addr, (SSI_OP+ SSI_IUNKWN)); /*RECEIVED UNKNOWN MSG BYTE */ 4644 WRW_HARPOON(map_addr, (SSI_OP + SSI_IUNKWN)); /*RECEIVED UNKNOWN MSG BYTE */
5286 map_addr +=2; 4645 map_addr += 2;
5287 WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */ 4646 WRW_HARPOON(map_addr, (SSI_OP + SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
5288 map_addr +=2; 4647 map_addr += 2;
5289 WRW_HARPOON(map_addr, (SSI_OP+ SSI_ITICKLE)); /*BIOS Tickled the Mgr */ 4648 WRW_HARPOON(map_addr, (SSI_OP + SSI_ITICKLE)); /*BIOS Tickled the Mgr */
5290 map_addr +=2; 4649 map_addr += 2;
5291 WRW_HARPOON(map_addr, (SSI_OP+ SSI_IRFAIL)); /*EXPECTED ID/TAG MESSAGES AND */ 4650 WRW_HARPOON(map_addr, (SSI_OP + SSI_IRFAIL)); /*EXPECTED ID/TAG MESSAGES AND */
5292 map_addr +=2; /* DIDN'T GET ONE */ 4651 map_addr += 2; /* DIDN'T GET ONE */
5293 WRW_HARPOON(map_addr, (CRR_OP+AR3+ S_IDREG)); /* comp SCSI SEL ID & AR3*/ 4652 WRW_HARPOON(map_addr, (CRR_OP + AR3 + S_IDREG)); /* comp SCSI SEL ID & AR3 */
5294 map_addr +=2; 4653 map_addr += 2;
5295 WRW_HARPOON(map_addr, (BRH_OP+EQUAL+ 0x00)); /*SEL ID OK then Conti. */ 4654 WRW_HARPOON(map_addr, (BRH_OP + EQUAL + 0x00)); /*SEL ID OK then Conti. */
5296 map_addr +=2; 4655 map_addr += 2;
5297 WRW_HARPOON(map_addr, (SSI_OP+ SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */ 4656 WRW_HARPOON(map_addr, (SSI_OP + SSI_INO_CC)); /*NO COMMAND COMPLETE AFTER STATUS */
5298 4657
5299 4658 SGRAM_ACCESS(p_port);
5300
5301 SGRAM_ACCESS(p_port);
5302} 4659}
5303 4660
5304/*--------------------------------------------------------------------- 4661/*---------------------------------------------------------------------
@@ -5310,203 +4667,261 @@ static void FPT_autoLoadDefaultMap(ULONG p_port)
5310 * 4667 *
5311 *---------------------------------------------------------------------*/ 4668 *---------------------------------------------------------------------*/
5312 4669
5313static void FPT_autoCmdCmplt(ULONG p_port, UCHAR p_card) 4670static void FPT_autoCmdCmplt(unsigned long p_port, unsigned char p_card)
5314{ 4671{
5315 PSCCB currSCCB; 4672 struct sccb *currSCCB;
5316 UCHAR status_byte; 4673 unsigned char status_byte;
5317
5318 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5319 4674
5320 status_byte = RD_HARPOON(p_port+hp_gp_reg_0); 4675 currSCCB = FPT_BL_Card[p_card].currentSCCB;
5321 4676
5322 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA = 0; 4677 status_byte = RD_HARPOON(p_port + hp_gp_reg_0);
5323 4678
5324 if (status_byte != SSGOOD) { 4679 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA = 0;
5325 4680
5326 if (status_byte == SSQ_FULL) { 4681 if (status_byte != SSGOOD) {
5327 4682
4683 if (status_byte == SSQ_FULL) {
5328 4684
5329 if(((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4685 if (((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5330 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 4686 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5331 { 4687 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) {
5332 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 1; 4688 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5333 if(FPT_BL_Card[p_card].discQCount != 0) 4689 TarLUNBusy[currSCCB->Lun] = 1;
4690 if (FPT_BL_Card[p_card].discQCount != 0)
5334 FPT_BL_Card[p_card].discQCount--; 4691 FPT_BL_Card[p_card].discQCount--;
5335 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL; 4692 FPT_BL_Card[p_card].
5336 } 4693 discQ_Tbl[FPT_sccbMgrTbl[p_card]
5337 else 4694 [currSCCB->TargID].
5338 { 4695 LunDiscQ_Idx[currSCCB->Lun]] =
5339 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 1; 4696 NULL;
5340 if(currSCCB->Sccb_tag) 4697 } else {
5341 { 4698 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5342 if(FPT_BL_Card[p_card].discQCount != 0) 4699 TarLUNBusy[0] = 1;
5343 FPT_BL_Card[p_card].discQCount--; 4700 if (currSCCB->Sccb_tag) {
5344 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL; 4701 if (FPT_BL_Card[p_card].discQCount != 0)
5345 }else 4702 FPT_BL_Card[p_card].
5346 { 4703 discQCount--;
5347 if(FPT_BL_Card[p_card].discQCount != 0) 4704 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->
5348 FPT_BL_Card[p_card].discQCount--; 4705 Sccb_tag]
5349 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL; 4706 = NULL;
4707 } else {
4708 if (FPT_BL_Card[p_card].discQCount != 0)
4709 FPT_BL_Card[p_card].
4710 discQCount--;
4711 FPT_BL_Card[p_card].
4712 discQ_Tbl[FPT_sccbMgrTbl[p_card]
4713 [currSCCB->TargID].
4714 LunDiscQ_Idx[0]] = NULL;
5350 } 4715 }
5351 } 4716 }
5352 4717
5353 currSCCB->Sccb_MGRFlags |= F_STATUSLOADED; 4718 currSCCB->Sccb_MGRFlags |= F_STATUSLOADED;
5354 4719
5355 FPT_queueSelectFail(&FPT_BL_Card[p_card],p_card); 4720 FPT_queueSelectFail(&FPT_BL_Card[p_card], p_card);
5356 4721
5357 return; 4722 return;
5358 } 4723 }
5359 4724
5360 if(currSCCB->Sccb_scsistat == SELECT_SN_ST) 4725 if (currSCCB->Sccb_scsistat == SELECT_SN_ST) {
5361 { 4726 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |=
5362 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus |= 4727 (unsigned char)SYNC_SUPPORTED;
5363 (UCHAR)SYNC_SUPPORTED;
5364 4728
5365 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_SYNC_MASK; 4729 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &=
5366 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD; 4730 ~EE_SYNC_MASK;
4731 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
5367 4732
5368 if(((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4733 if (((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5369 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 4734 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5370 { 4735 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) {
5371 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 1; 4736 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5372 if(FPT_BL_Card[p_card].discQCount != 0) 4737 TarLUNBusy[currSCCB->Lun] = 1;
4738 if (FPT_BL_Card[p_card].discQCount != 0)
5373 FPT_BL_Card[p_card].discQCount--; 4739 FPT_BL_Card[p_card].discQCount--;
5374 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL; 4740 FPT_BL_Card[p_card].
5375 } 4741 discQ_Tbl[FPT_sccbMgrTbl[p_card]
5376 else 4742 [currSCCB->TargID].
5377 { 4743 LunDiscQ_Idx[currSCCB->Lun]] =
5378 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 1; 4744 NULL;
5379 if(currSCCB->Sccb_tag) 4745 } else {
5380 { 4746 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5381 if(FPT_BL_Card[p_card].discQCount != 0) 4747 TarLUNBusy[0] = 1;
5382 FPT_BL_Card[p_card].discQCount--; 4748 if (currSCCB->Sccb_tag) {
5383 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL; 4749 if (FPT_BL_Card[p_card].discQCount != 0)
5384 }else 4750 FPT_BL_Card[p_card].
5385 { 4751 discQCount--;
5386 if(FPT_BL_Card[p_card].discQCount != 0) 4752 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->
5387 FPT_BL_Card[p_card].discQCount--; 4753 Sccb_tag]
5388 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL; 4754 = NULL;
4755 } else {
4756 if (FPT_BL_Card[p_card].discQCount != 0)
4757 FPT_BL_Card[p_card].
4758 discQCount--;
4759 FPT_BL_Card[p_card].
4760 discQ_Tbl[FPT_sccbMgrTbl[p_card]
4761 [currSCCB->TargID].
4762 LunDiscQ_Idx[0]] = NULL;
5389 } 4763 }
5390 } 4764 }
5391 return; 4765 return;
5392 4766
5393 } 4767 }
5394 4768
5395 if(currSCCB->Sccb_scsistat == SELECT_WN_ST) 4769 if (currSCCB->Sccb_scsistat == SELECT_WN_ST) {
5396 {
5397 4770
5398 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus = 4771 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus =
5399 (FPT_sccbMgrTbl[p_card][currSCCB->TargID]. 4772 (FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5400 TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED; 4773 TarStatus & ~WIDE_ENABLED) | WIDE_NEGOCIATED;
5401 4774
5402 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &= ~EE_WIDE_SCSI; 4775 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue &=
5403 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD; 4776 ~EE_WIDE_SCSI;
4777 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD;
5404 4778
5405 if(((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4779 if (((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5406 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 4780 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5407 { 4781 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) {
5408 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 1; 4782 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5409 if(FPT_BL_Card[p_card].discQCount != 0) 4783 TarLUNBusy[currSCCB->Lun] = 1;
4784 if (FPT_BL_Card[p_card].discQCount != 0)
5410 FPT_BL_Card[p_card].discQCount--; 4785 FPT_BL_Card[p_card].discQCount--;
5411 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL; 4786 FPT_BL_Card[p_card].
5412 } 4787 discQ_Tbl[FPT_sccbMgrTbl[p_card]
5413 else 4788 [currSCCB->TargID].
5414 { 4789 LunDiscQ_Idx[currSCCB->Lun]] =
5415 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 1; 4790 NULL;
5416 if(currSCCB->Sccb_tag) 4791 } else {
5417 { 4792 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5418 if(FPT_BL_Card[p_card].discQCount != 0) 4793 TarLUNBusy[0] = 1;
5419 FPT_BL_Card[p_card].discQCount--; 4794 if (currSCCB->Sccb_tag) {
5420 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL; 4795 if (FPT_BL_Card[p_card].discQCount != 0)
5421 }else 4796 FPT_BL_Card[p_card].
5422 { 4797 discQCount--;
5423 if(FPT_BL_Card[p_card].discQCount != 0) 4798 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->
5424 FPT_BL_Card[p_card].discQCount--; 4799 Sccb_tag]
5425 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL; 4800 = NULL;
4801 } else {
4802 if (FPT_BL_Card[p_card].discQCount != 0)
4803 FPT_BL_Card[p_card].
4804 discQCount--;
4805 FPT_BL_Card[p_card].
4806 discQ_Tbl[FPT_sccbMgrTbl[p_card]
4807 [currSCCB->TargID].
4808 LunDiscQ_Idx[0]] = NULL;
5426 } 4809 }
5427 } 4810 }
5428 return; 4811 return;
5429 4812
5430 } 4813 }
5431 4814
5432 if (status_byte == SSCHECK) 4815 if (status_byte == SSCHECK) {
5433 { 4816 if (FPT_BL_Card[p_card].globalFlags & F_DO_RENEGO) {
5434 if(FPT_BL_Card[p_card].globalFlags & F_DO_RENEGO) 4817 if (FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5435 { 4818 TarEEValue & EE_SYNC_MASK) {
5436 if (FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_SYNC_MASK) 4819 FPT_sccbMgrTbl[p_card][currSCCB->
5437 { 4820 TargID].
5438 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_SYNC_MASK; 4821 TarStatus &= ~TAR_SYNC_MASK;
5439 } 4822 }
5440 if (FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarEEValue & EE_WIDE_SCSI) 4823 if (FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5441 { 4824 TarEEValue & EE_WIDE_SCSI) {
5442 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus &= ~TAR_WIDE_MASK; 4825 FPT_sccbMgrTbl[p_card][currSCCB->
4826 TargID].
4827 TarStatus &= ~TAR_WIDE_MASK;
5443 } 4828 }
5444 } 4829 }
5445 } 4830 }
5446 4831
5447 if (!(currSCCB->Sccb_XferState & F_AUTO_SENSE)) { 4832 if (!(currSCCB->Sccb_XferState & F_AUTO_SENSE)) {
5448 4833
5449 currSCCB->SccbStatus = SCCB_ERROR; 4834 currSCCB->SccbStatus = SCCB_ERROR;
5450 currSCCB->TargetStatus = status_byte; 4835 currSCCB->TargetStatus = status_byte;
5451 4836
5452 if (status_byte == SSCHECK) { 4837 if (status_byte == SSCHECK) {
5453 4838
5454 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUN_CA 4839 FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5455 = 1; 4840 TarLUN_CA = 1;
5456 4841
5457 4842 if (currSCCB->RequestSenseLength !=
5458 if (currSCCB->RequestSenseLength != NO_AUTO_REQUEST_SENSE) { 4843 NO_AUTO_REQUEST_SENSE) {
5459 4844
5460 if (currSCCB->RequestSenseLength == 0) 4845 if (currSCCB->RequestSenseLength == 0)
5461 currSCCB->RequestSenseLength = 14; 4846 currSCCB->RequestSenseLength =
5462 4847 14;
5463 FPT_ssenss(&FPT_BL_Card[p_card]); 4848
5464 FPT_BL_Card[p_card].globalFlags |= F_NEW_SCCB_CMD; 4849 FPT_ssenss(&FPT_BL_Card[p_card]);
5465 4850 FPT_BL_Card[p_card].globalFlags |=
5466 if(((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4851 F_NEW_SCCB_CMD;
5467 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 4852
5468 { 4853 if (((FPT_BL_Card[p_card].
5469 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 1; 4854 globalFlags & F_CONLUN_IO)
5470 if(FPT_BL_Card[p_card].discQCount != 0) 4855 &&
5471 FPT_BL_Card[p_card].discQCount--; 4856 ((FPT_sccbMgrTbl[p_card]
5472 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[currSCCB->Lun]] = NULL; 4857 [currSCCB->TargID].
5473 } 4858 TarStatus & TAR_TAG_Q_MASK) !=
5474 else 4859 TAG_Q_TRYING))) {
5475 { 4860 FPT_sccbMgrTbl[p_card]
5476 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 1; 4861 [currSCCB->TargID].
5477 if(currSCCB->Sccb_tag) 4862 TarLUNBusy[currSCCB->Lun] =
5478 { 4863 1;
5479 if(FPT_BL_Card[p_card].discQCount != 0) 4864 if (FPT_BL_Card[p_card].
5480 FPT_BL_Card[p_card].discQCount--; 4865 discQCount != 0)
5481 FPT_BL_Card[p_card].discQ_Tbl[currSCCB->Sccb_tag] = NULL; 4866 FPT_BL_Card[p_card].
5482 }else 4867 discQCount--;
5483 { 4868 FPT_BL_Card[p_card].
5484 if(FPT_BL_Card[p_card].discQCount != 0) 4869 discQ_Tbl[FPT_sccbMgrTbl
5485 FPT_BL_Card[p_card].discQCount--; 4870 [p_card]
5486 FPT_BL_Card[p_card].discQ_Tbl[FPT_sccbMgrTbl[p_card][currSCCB->TargID].LunDiscQ_Idx[0]] = NULL; 4871 [currSCCB->
4872 TargID].
4873 LunDiscQ_Idx
4874 [currSCCB->Lun]] =
4875 NULL;
4876 } else {
4877 FPT_sccbMgrTbl[p_card]
4878 [currSCCB->TargID].
4879 TarLUNBusy[0] = 1;
4880 if (currSCCB->Sccb_tag) {
4881 if (FPT_BL_Card[p_card].
4882 discQCount != 0)
4883 FPT_BL_Card
4884 [p_card].
4885 discQCount--;
4886 FPT_BL_Card[p_card].
4887 discQ_Tbl[currSCCB->
4888 Sccb_tag]
4889 = NULL;
4890 } else {
4891 if (FPT_BL_Card[p_card].
4892 discQCount != 0)
4893 FPT_BL_Card
4894 [p_card].
4895 discQCount--;
4896 FPT_BL_Card[p_card].
4897 discQ_Tbl
4898 [FPT_sccbMgrTbl
4899 [p_card][currSCCB->
4900 TargID].
4901 LunDiscQ_Idx[0]] =
4902 NULL;
5487 } 4903 }
5488 } 4904 }
5489 return; 4905 return;
5490 } 4906 }
5491 } 4907 }
5492 } 4908 }
5493 } 4909 }
5494
5495 4910
5496 if((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 4911 if ((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
5497 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 4912 ((FPT_sccbMgrTbl[p_card][currSCCB->TargID].
5498 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->Lun] = 0; 4913 TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))
4914 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[currSCCB->
4915 Lun] = 0;
5499 else 4916 else
5500 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 0; 4917 FPT_sccbMgrTbl[p_card][currSCCB->TargID].TarLUNBusy[0] = 0;
5501
5502 4918
5503 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB, p_card); 4919 FPT_queueCmdComplete(&FPT_BL_Card[p_card], currSCCB, p_card);
5504} 4920}
5505 4921
5506#define SHORT_WAIT 0x0000000F 4922#define SHORT_WAIT 0x0000000F
5507#define LONG_WAIT 0x0000FFFFL 4923#define LONG_WAIT 0x0000FFFFL
5508 4924
5509
5510/*--------------------------------------------------------------------- 4925/*---------------------------------------------------------------------
5511 * 4926 *
5512 * Function: Data Transfer Processor 4927 * Function: Data Transfer Processor
@@ -5525,37 +4940,33 @@ static void FPT_autoCmdCmplt(ULONG p_port, UCHAR p_card)
5525 * 4940 *
5526 *---------------------------------------------------------------------*/ 4941 *---------------------------------------------------------------------*/
5527 4942
5528static void FPT_dataXferProcessor(ULONG port, PSCCBcard pCurrCard) 4943static void FPT_dataXferProcessor(unsigned long port,
4944 struct sccb_card *pCurrCard)
5529{ 4945{
5530 PSCCB currSCCB; 4946 struct sccb *currSCCB;
5531 4947
5532 currSCCB = pCurrCard->currentSCCB; 4948 currSCCB = pCurrCard->currentSCCB;
5533 4949
5534 if (currSCCB->Sccb_XferState & F_SG_XFER) 4950 if (currSCCB->Sccb_XferState & F_SG_XFER) {
5535 { 4951 if (pCurrCard->globalFlags & F_HOST_XFER_ACT)
5536 if (pCurrCard->globalFlags & F_HOST_XFER_ACT) 4952 {
4953 currSCCB->Sccb_sgseg += (unsigned char)SG_BUF_CNT;
4954 currSCCB->Sccb_SGoffset = 0x00;
4955 }
4956 pCurrCard->globalFlags |= F_HOST_XFER_ACT;
5537 4957
5538 { 4958 FPT_busMstrSGDataXferStart(port, currSCCB);
5539 currSCCB->Sccb_sgseg += (UCHAR)SG_BUF_CNT; 4959 }
5540 currSCCB->Sccb_SGoffset = 0x00; 4960
5541 } 4961 else {
4962 if (!(pCurrCard->globalFlags & F_HOST_XFER_ACT)) {
5542 pCurrCard->globalFlags |= F_HOST_XFER_ACT; 4963 pCurrCard->globalFlags |= F_HOST_XFER_ACT;
5543
5544 FPT_busMstrSGDataXferStart(port, currSCCB);
5545 }
5546 4964
5547 else 4965 FPT_busMstrDataXferStart(port, currSCCB);
5548 { 4966 }
5549 if (!(pCurrCard->globalFlags & F_HOST_XFER_ACT)) 4967 }
5550 {
5551 pCurrCard->globalFlags |= F_HOST_XFER_ACT;
5552
5553 FPT_busMstrDataXferStart(port, currSCCB);
5554 }
5555 }
5556} 4968}
5557 4969
5558
5559/*--------------------------------------------------------------------- 4970/*---------------------------------------------------------------------
5560 * 4971 *
5561 * Function: BusMaster Scatter Gather Data Transfer Start 4972 * Function: BusMaster Scatter Gather Data Transfer Start
@@ -5563,104 +4974,101 @@ static void FPT_dataXferProcessor(ULONG port, PSCCBcard pCurrCard)
5563 * Description: 4974 * Description:
5564 * 4975 *
5565 *---------------------------------------------------------------------*/ 4976 *---------------------------------------------------------------------*/
5566static void FPT_busMstrSGDataXferStart(ULONG p_port, PSCCB pcurrSCCB) 4977static void FPT_busMstrSGDataXferStart(unsigned long p_port,
4978 struct sccb *pcurrSCCB)
5567{ 4979{
5568 ULONG count,addr,tmpSGCnt; 4980 unsigned long count, addr, tmpSGCnt;
5569 UINT sg_index; 4981 unsigned int sg_index;
5570 UCHAR sg_count, i; 4982 unsigned char sg_count, i;
5571 ULONG reg_offset; 4983 unsigned long reg_offset;
5572
5573 4984
5574 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) { 4985 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
5575 4986
5576 count = ((ULONG) HOST_RD_CMD)<<24; 4987 count = ((unsigned long)HOST_RD_CMD) << 24;
5577 } 4988 }
5578
5579 else {
5580 count = ((ULONG) HOST_WRT_CMD)<<24;
5581 }
5582
5583 sg_count = 0;
5584 tmpSGCnt = 0;
5585 sg_index = pcurrSCCB->Sccb_sgseg;
5586 reg_offset = hp_aramBase;
5587
5588
5589 i = (UCHAR) (RD_HARPOON(p_port+hp_page_ctrl) & ~(SGRAM_ARAM|SCATTER_EN));
5590
5591
5592 WR_HARPOON(p_port+hp_page_ctrl, i);
5593 4989
5594 while ((sg_count < (UCHAR)SG_BUF_CNT) && 4990 else {
5595 ((ULONG)(sg_index * (UINT)SG_ELEMENT_SIZE) < pcurrSCCB->DataLength) ) { 4991 count = ((unsigned long)HOST_WRT_CMD) << 24;
4992 }
5596 4993
5597 tmpSGCnt += *(((ULONG *)pcurrSCCB->DataPointer)+ 4994 sg_count = 0;
5598 (sg_index * 2)); 4995 tmpSGCnt = 0;
4996 sg_index = pcurrSCCB->Sccb_sgseg;
4997 reg_offset = hp_aramBase;
5599 4998
5600 count |= *(((ULONG *)pcurrSCCB->DataPointer)+ 4999 i = (unsigned char)(RD_HARPOON(p_port + hp_page_ctrl) &
5601 (sg_index * 2)); 5000 ~(SGRAM_ARAM | SCATTER_EN));
5602 5001
5603 addr = *(((ULONG *)pcurrSCCB->DataPointer)+ 5002 WR_HARPOON(p_port + hp_page_ctrl, i);
5604 ((sg_index * 2) + 1));
5605 5003
5004 while ((sg_count < (unsigned char)SG_BUF_CNT) &&
5005 ((unsigned long)(sg_index * (unsigned int)SG_ELEMENT_SIZE) <
5006 pcurrSCCB->DataLength)) {
5606 5007
5607 if ((!sg_count) && (pcurrSCCB->Sccb_SGoffset)) { 5008 tmpSGCnt += *(((unsigned long *)pcurrSCCB->DataPointer) +
5009 (sg_index * 2));
5608 5010
5609 addr += ((count & 0x00FFFFFFL) - pcurrSCCB->Sccb_SGoffset); 5011 count |= *(((unsigned long *)pcurrSCCB->DataPointer) +
5610 count = (count & 0xFF000000L) | pcurrSCCB->Sccb_SGoffset; 5012 (sg_index * 2));
5611 5013
5612 tmpSGCnt = count & 0x00FFFFFFL; 5014 addr = *(((unsigned long *)pcurrSCCB->DataPointer) +
5613 } 5015 ((sg_index * 2) + 1));
5614 5016
5615 WR_HARP32(p_port,reg_offset,addr); 5017 if ((!sg_count) && (pcurrSCCB->Sccb_SGoffset)) {
5616 reg_offset +=4;
5617 5018
5618 WR_HARP32(p_port,reg_offset,count); 5019 addr +=
5619 reg_offset +=4; 5020 ((count & 0x00FFFFFFL) - pcurrSCCB->Sccb_SGoffset);
5021 count =
5022 (count & 0xFF000000L) | pcurrSCCB->Sccb_SGoffset;
5620 5023
5621 count &= 0xFF000000L; 5024 tmpSGCnt = count & 0x00FFFFFFL;
5622 sg_index++; 5025 }
5623 sg_count++;
5624 5026
5625 } /*End While */ 5027 WR_HARP32(p_port, reg_offset, addr);
5028 reg_offset += 4;
5626 5029
5627 pcurrSCCB->Sccb_XferCnt = tmpSGCnt; 5030 WR_HARP32(p_port, reg_offset, count);
5031 reg_offset += 4;
5628 5032
5629 WR_HARPOON(p_port+hp_sg_addr,(sg_count<<4)); 5033 count &= 0xFF000000L;
5034 sg_index++;
5035 sg_count++;
5630 5036
5631 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) { 5037 } /*End While */
5632 5038
5633 WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt); 5039 pcurrSCCB->Sccb_XferCnt = tmpSGCnt;
5634 5040
5041 WR_HARPOON(p_port + hp_sg_addr, (sg_count << 4));
5635 5042
5636 WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT)); 5043 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
5637 WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH);
5638 }
5639 5044
5640 else { 5045 WR_HARP32(p_port, hp_xfercnt_0, tmpSGCnt);
5641 5046
5047 WR_HARPOON(p_port + hp_portctrl_0,
5048 (DMA_PORT | SCSI_PORT | SCSI_INBIT));
5049 WR_HARPOON(p_port + hp_scsisig, S_DATAI_PH);
5050 }
5642 5051
5643 if ((!(RD_HARPOON(p_port+hp_synctarg_0) & NARROW_SCSI)) && 5052 else {
5644 (tmpSGCnt & 0x000000001))
5645 {
5646
5647 pcurrSCCB->Sccb_XferState |= F_ODD_BALL_CNT;
5648 tmpSGCnt--;
5649 }
5650 5053
5054 if ((!(RD_HARPOON(p_port + hp_synctarg_0) & NARROW_SCSI)) &&
5055 (tmpSGCnt & 0x000000001)) {
5651 5056
5652 WR_HARP32(p_port,hp_xfercnt_0,tmpSGCnt); 5057 pcurrSCCB->Sccb_XferState |= F_ODD_BALL_CNT;
5058 tmpSGCnt--;
5059 }
5653 5060
5654 WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD)); 5061 WR_HARP32(p_port, hp_xfercnt_0, tmpSGCnt);
5655 WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH);
5656 }
5657 5062
5063 WR_HARPOON(p_port + hp_portctrl_0,
5064 (SCSI_PORT | DMA_PORT | DMA_RD));
5065 WR_HARPOON(p_port + hp_scsisig, S_DATAO_PH);
5066 }
5658 5067
5659 WR_HARPOON(p_port+hp_page_ctrl, (UCHAR) (i | SCATTER_EN)); 5068 WR_HARPOON(p_port + hp_page_ctrl, (unsigned char)(i | SCATTER_EN));
5660 5069
5661} 5070}
5662 5071
5663
5664/*--------------------------------------------------------------------- 5072/*---------------------------------------------------------------------
5665 * 5073 *
5666 * Function: BusMaster Data Transfer Start 5074 * Function: BusMaster Data Transfer Start
@@ -5668,47 +5076,49 @@ static void FPT_busMstrSGDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
5668 * Description: 5076 * Description:
5669 * 5077 *
5670 *---------------------------------------------------------------------*/ 5078 *---------------------------------------------------------------------*/
5671static void FPT_busMstrDataXferStart(ULONG p_port, PSCCB pcurrSCCB) 5079static void FPT_busMstrDataXferStart(unsigned long p_port,
5080 struct sccb *pcurrSCCB)
5672{ 5081{
5673 ULONG addr,count; 5082 unsigned long addr, count;
5674 5083
5675 if (!(pcurrSCCB->Sccb_XferState & F_AUTO_SENSE)) { 5084 if (!(pcurrSCCB->Sccb_XferState & F_AUTO_SENSE)) {
5676 5085
5677 count = pcurrSCCB->Sccb_XferCnt; 5086 count = pcurrSCCB->Sccb_XferCnt;
5678 5087
5679 addr = (ULONG) pcurrSCCB->DataPointer + pcurrSCCB->Sccb_ATC; 5088 addr =
5680 } 5089 (unsigned long)pcurrSCCB->DataPointer + pcurrSCCB->Sccb_ATC;
5090 }
5681 5091
5682 else { 5092 else {
5683 addr = pcurrSCCB->SensePointer; 5093 addr = pcurrSCCB->SensePointer;
5684 count = pcurrSCCB->RequestSenseLength; 5094 count = pcurrSCCB->RequestSenseLength;
5685 5095
5686 } 5096 }
5687
5688 HP_SETUP_ADDR_CNT(p_port,addr,count);
5689 5097
5098 HP_SETUP_ADDR_CNT(p_port, addr, count);
5690 5099
5691 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) { 5100 if (pcurrSCCB->Sccb_XferState & F_HOST_XFER_DIR) {
5692 5101
5693 WR_HARPOON(p_port+hp_portctrl_0,(DMA_PORT | SCSI_PORT | SCSI_INBIT)); 5102 WR_HARPOON(p_port + hp_portctrl_0,
5694 WR_HARPOON(p_port+hp_scsisig, S_DATAI_PH); 5103 (DMA_PORT | SCSI_PORT | SCSI_INBIT));
5104 WR_HARPOON(p_port + hp_scsisig, S_DATAI_PH);
5695 5105
5696 WR_HARPOON(p_port+hp_xfer_cmd, 5106 WR_HARPOON(p_port + hp_xfer_cmd,
5697 (XFER_DMA_HOST | XFER_HOST_AUTO | XFER_DMA_8BIT)); 5107 (XFER_DMA_HOST | XFER_HOST_AUTO | XFER_DMA_8BIT));
5698 } 5108 }
5699 5109
5700 else { 5110 else {
5701 5111
5702 WR_HARPOON(p_port+hp_portctrl_0,(SCSI_PORT | DMA_PORT | DMA_RD)); 5112 WR_HARPOON(p_port + hp_portctrl_0,
5703 WR_HARPOON(p_port+hp_scsisig, S_DATAO_PH); 5113 (SCSI_PORT | DMA_PORT | DMA_RD));
5114 WR_HARPOON(p_port + hp_scsisig, S_DATAO_PH);
5704 5115
5705 WR_HARPOON(p_port+hp_xfer_cmd, 5116 WR_HARPOON(p_port + hp_xfer_cmd,
5706 (XFER_HOST_DMA | XFER_HOST_AUTO | XFER_DMA_8BIT)); 5117 (XFER_HOST_DMA | XFER_HOST_AUTO | XFER_DMA_8BIT));
5707 5118
5708 } 5119 }
5709} 5120}
5710 5121
5711
5712/*--------------------------------------------------------------------- 5122/*---------------------------------------------------------------------
5713 * 5123 *
5714 * Function: BusMaster Timeout Handler 5124 * Function: BusMaster Timeout Handler
@@ -5721,37 +5131,38 @@ static void FPT_busMstrDataXferStart(ULONG p_port, PSCCB pcurrSCCB)
5721 * command busy is also time out, it'll just give up. 5131 * command busy is also time out, it'll just give up.
5722 * 5132 *
5723 *---------------------------------------------------------------------*/ 5133 *---------------------------------------------------------------------*/
5724static UCHAR FPT_busMstrTimeOut(ULONG p_port) 5134static unsigned char FPT_busMstrTimeOut(unsigned long p_port)
5725{ 5135{
5726 ULONG timeout; 5136 unsigned long timeout;
5727 5137
5728 timeout = LONG_WAIT; 5138 timeout = LONG_WAIT;
5729 5139
5730 WR_HARPOON(p_port+hp_sys_ctrl, HALT_MACH); 5140 WR_HARPOON(p_port + hp_sys_ctrl, HALT_MACH);
5731 5141
5732 while ((!(RD_HARPOON(p_port+hp_ext_status) & CMD_ABORTED)) && timeout--) {} 5142 while ((!(RD_HARPOON(p_port + hp_ext_status) & CMD_ABORTED))
5143 && timeout--) {
5144 }
5733 5145
5734 5146 if (RD_HARPOON(p_port + hp_ext_status) & BM_CMD_BUSY) {
5735 5147 WR_HARPOON(p_port + hp_sys_ctrl, HARD_ABORT);
5736 if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) {
5737 WR_HARPOON(p_port+hp_sys_ctrl, HARD_ABORT);
5738 5148
5739 timeout = LONG_WAIT; 5149 timeout = LONG_WAIT;
5740 while ((RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {} 5150 while ((RD_HARPOON(p_port + hp_ext_status) & BM_CMD_BUSY)
5741 } 5151 && timeout--) {
5152 }
5153 }
5742 5154
5743 RD_HARPOON(p_port+hp_int_status); /*Clear command complete */ 5155 RD_HARPOON(p_port + hp_int_status); /*Clear command complete */
5744 5156
5745 if (RD_HARPOON(p_port+hp_ext_status) & BM_CMD_BUSY) { 5157 if (RD_HARPOON(p_port + hp_ext_status) & BM_CMD_BUSY) {
5746 return(1); 5158 return 1;
5747 } 5159 }
5748 5160
5749 else { 5161 else {
5750 return(0); 5162 return 0;
5751 } 5163 }
5752} 5164}
5753 5165
5754
5755/*--------------------------------------------------------------------- 5166/*---------------------------------------------------------------------
5756 * 5167 *
5757 * Function: Host Data Transfer Abort 5168 * Function: Host Data Transfer Abort
@@ -5759,256 +5170,282 @@ static UCHAR FPT_busMstrTimeOut(ULONG p_port)
5759 * Description: Abort any in progress transfer. 5170 * Description: Abort any in progress transfer.
5760 * 5171 *
5761 *---------------------------------------------------------------------*/ 5172 *---------------------------------------------------------------------*/
5762static void FPT_hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB) 5173static void FPT_hostDataXferAbort(unsigned long port, unsigned char p_card,
5174 struct sccb *pCurrSCCB)
5763{ 5175{
5764 5176
5765 ULONG timeout; 5177 unsigned long timeout;
5766 ULONG remain_cnt; 5178 unsigned long remain_cnt;
5767 UINT sg_ptr; 5179 unsigned int sg_ptr;
5768
5769 FPT_BL_Card[p_card].globalFlags &= ~F_HOST_XFER_ACT;
5770
5771 if (pCurrSCCB->Sccb_XferState & F_AUTO_SENSE) {
5772
5773
5774 if (!(RD_HARPOON(port+hp_int_status) & INT_CMD_COMPL)) {
5775
5776 WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) | FLUSH_XFER_CNTR));
5777 timeout = LONG_WAIT;
5778
5779 while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {}
5780
5781 WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) & ~FLUSH_XFER_CNTR));
5782
5783 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) {
5784 5180
5785 if (FPT_busMstrTimeOut(port)) { 5181 FPT_BL_Card[p_card].globalFlags &= ~F_HOST_XFER_ACT;
5786 5182
5787 if (pCurrSCCB->HostStatus == 0x00) 5183 if (pCurrSCCB->Sccb_XferState & F_AUTO_SENSE) {
5788 5184
5789 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5185 if (!(RD_HARPOON(port + hp_int_status) & INT_CMD_COMPL)) {
5790 5186
5791 } 5187 WR_HARPOON(port + hp_bm_ctrl,
5188 (RD_HARPOON(port + hp_bm_ctrl) |
5189 FLUSH_XFER_CNTR));
5190 timeout = LONG_WAIT;
5792 5191
5793 if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) 5192 while ((RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY)
5794 5193 && timeout--) {
5795 if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) 5194 }
5796
5797 if (pCurrSCCB->HostStatus == 0x00)
5798
5799 {
5800 pCurrSCCB->HostStatus = SCCB_BM_ERR;
5801 }
5802 }
5803 }
5804 }
5805
5806 else if (pCurrSCCB->Sccb_XferCnt) {
5807
5808 if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
5809
5810
5811 WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) &
5812 ~SCATTER_EN));
5813 5195
5814 WR_HARPOON(port+hp_sg_addr,0x00); 5196 WR_HARPOON(port + hp_bm_ctrl,
5197 (RD_HARPOON(port + hp_bm_ctrl) &
5198 ~FLUSH_XFER_CNTR));
5815 5199
5816 sg_ptr = pCurrSCCB->Sccb_sgseg + SG_BUF_CNT; 5200 if (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY) {
5817 5201
5818 if (sg_ptr > (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE)) { 5202 if (FPT_busMstrTimeOut(port)) {
5819 5203
5820 sg_ptr = (UINT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE); 5204 if (pCurrSCCB->HostStatus == 0x00)
5821 }
5822 5205
5823 remain_cnt = pCurrSCCB->Sccb_XferCnt; 5206 pCurrSCCB->HostStatus =
5207 SCCB_BM_ERR;
5824 5208
5825 while (remain_cnt < 0x01000000L) { 5209 }
5826 5210
5827 sg_ptr--; 5211 if (RD_HARPOON(port + hp_int_status) &
5212 INT_EXT_STATUS)
5828 5213
5829 if (remain_cnt > (ULONG)(*(((ULONG *)pCurrSCCB-> 5214 if (RD_HARPOON(port + hp_ext_status) &
5830 DataPointer) + (sg_ptr * 2)))) { 5215 BAD_EXT_STATUS)
5831 5216
5832 remain_cnt -= (ULONG)(*(((ULONG *)pCurrSCCB-> 5217 if (pCurrSCCB->HostStatus ==
5833 DataPointer) + (sg_ptr * 2))); 5218 0x00)
5834 } 5219 {
5220 pCurrSCCB->HostStatus =
5221 SCCB_BM_ERR;
5222 }
5223 }
5224 }
5225 }
5835 5226
5836 else { 5227 else if (pCurrSCCB->Sccb_XferCnt) {
5837 5228
5838 break; 5229 if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
5839 }
5840 }
5841 5230
5231 WR_HARPOON(port + hp_page_ctrl,
5232 (RD_HARPOON(port + hp_page_ctrl) &
5233 ~SCATTER_EN));
5842 5234
5235 WR_HARPOON(port + hp_sg_addr, 0x00);
5843 5236
5844 if (remain_cnt < 0x01000000L) { 5237 sg_ptr = pCurrSCCB->Sccb_sgseg + SG_BUF_CNT;
5845 5238
5239 if (sg_ptr >
5240 (unsigned int)(pCurrSCCB->DataLength /
5241 SG_ELEMENT_SIZE)) {
5846 5242
5847 pCurrSCCB->Sccb_SGoffset = remain_cnt; 5243 sg_ptr =
5244 (unsigned int)(pCurrSCCB->DataLength /
5245 SG_ELEMENT_SIZE);
5246 }
5848 5247
5849 pCurrSCCB->Sccb_sgseg = (USHORT)sg_ptr; 5248 remain_cnt = pCurrSCCB->Sccb_XferCnt;
5850 5249
5250 while (remain_cnt < 0x01000000L) {
5851 5251
5852 if ((ULONG)(sg_ptr * SG_ELEMENT_SIZE) == pCurrSCCB->DataLength 5252 sg_ptr--;
5853 && (remain_cnt == 0))
5854 5253
5855 pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED; 5254 if (remain_cnt >
5856 } 5255 (unsigned
5256 long)(*(((unsigned long *)pCurrSCCB->
5257 DataPointer) + (sg_ptr * 2)))) {
5857 5258
5858 else { 5259 remain_cnt -=
5260 (unsigned
5261 long)(*(((unsigned long *)
5262 pCurrSCCB->DataPointer) +
5263 (sg_ptr * 2)));
5264 }
5859 5265
5266 else {
5860 5267
5861 if (pCurrSCCB->HostStatus == 0x00) { 5268 break;
5269 }
5270 }
5862 5271
5863 pCurrSCCB->HostStatus = SCCB_GROSS_FW_ERR; 5272 if (remain_cnt < 0x01000000L) {
5864 }
5865 }
5866 }
5867 5273
5274 pCurrSCCB->Sccb_SGoffset = remain_cnt;
5868 5275
5869 if (!(pCurrSCCB->Sccb_XferState & F_HOST_XFER_DIR)) { 5276 pCurrSCCB->Sccb_sgseg = (unsigned short)sg_ptr;
5870 5277
5278 if ((unsigned long)(sg_ptr * SG_ELEMENT_SIZE) ==
5279 pCurrSCCB->DataLength && (remain_cnt == 0))
5871 5280
5872 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) { 5281 pCurrSCCB->Sccb_XferState |=
5282 F_ALL_XFERRED;
5283 }
5873 5284
5874 FPT_busMstrTimeOut(port); 5285 else {
5875 }
5876 5286
5877 else { 5287 if (pCurrSCCB->HostStatus == 0x00) {
5878 5288
5879 if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) { 5289 pCurrSCCB->HostStatus =
5290 SCCB_GROSS_FW_ERR;
5291 }
5292 }
5293 }
5880 5294
5881 if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) { 5295 if (!(pCurrSCCB->Sccb_XferState & F_HOST_XFER_DIR)) {
5882 5296
5883 if (pCurrSCCB->HostStatus == 0x00) { 5297 if (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY) {
5884 5298
5885 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5299 FPT_busMstrTimeOut(port);
5886 } 5300 }
5887 }
5888 }
5889 5301
5890 } 5302 else {
5891 }
5892 5303
5893 else { 5304 if (RD_HARPOON(port + hp_int_status) &
5305 INT_EXT_STATUS) {
5894 5306
5307 if (RD_HARPOON(port + hp_ext_status) &
5308 BAD_EXT_STATUS) {
5895 5309
5896 if ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) { 5310 if (pCurrSCCB->HostStatus ==
5311 0x00) {
5897 5312
5898 timeout = SHORT_WAIT; 5313 pCurrSCCB->HostStatus =
5314 SCCB_BM_ERR;
5315 }
5316 }
5317 }
5899 5318
5900 while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && 5319 }
5901 ((RD_HARPOON(port+hp_fifo_cnt)) >= BM_THRESHOLD) && 5320 }
5902 timeout--) {}
5903 }
5904 5321
5905 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) { 5322 else {
5906 5323
5907 WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) | 5324 if ((RD_HARPOON(port + hp_fifo_cnt)) >= BM_THRESHOLD) {
5908 FLUSH_XFER_CNTR));
5909 5325
5910 timeout = LONG_WAIT; 5326 timeout = SHORT_WAIT;
5911 5327
5912 while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && 5328 while ((RD_HARPOON(port + hp_ext_status) &
5913 timeout--) {} 5329 BM_CMD_BUSY)
5330 && ((RD_HARPOON(port + hp_fifo_cnt)) >=
5331 BM_THRESHOLD) && timeout--) {
5332 }
5333 }
5914 5334
5915 WR_HARPOON(port+hp_bm_ctrl, (RD_HARPOON(port+hp_bm_ctrl) & 5335 if (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY) {
5916 ~FLUSH_XFER_CNTR));
5917 5336
5337 WR_HARPOON(port + hp_bm_ctrl,
5338 (RD_HARPOON(port + hp_bm_ctrl) |
5339 FLUSH_XFER_CNTR));
5918 5340
5919 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) { 5341 timeout = LONG_WAIT;
5920 5342
5921 if (pCurrSCCB->HostStatus == 0x00) { 5343 while ((RD_HARPOON(port + hp_ext_status) &
5344 BM_CMD_BUSY) && timeout--) {
5345 }
5922 5346
5923 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5347 WR_HARPOON(port + hp_bm_ctrl,
5924 } 5348 (RD_HARPOON(port + hp_bm_ctrl) &
5349 ~FLUSH_XFER_CNTR));
5925 5350
5926 FPT_busMstrTimeOut(port); 5351 if (RD_HARPOON(port + hp_ext_status) &
5927 } 5352 BM_CMD_BUSY) {
5928 }
5929 5353
5930 if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) { 5354 if (pCurrSCCB->HostStatus == 0x00) {
5931 5355
5932 if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) { 5356 pCurrSCCB->HostStatus =
5357 SCCB_BM_ERR;
5358 }
5933 5359
5934 if (pCurrSCCB->HostStatus == 0x00) { 5360 FPT_busMstrTimeOut(port);
5361 }
5362 }
5935 5363
5936 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5364 if (RD_HARPOON(port + hp_int_status) & INT_EXT_STATUS) {
5937 }
5938 }
5939 }
5940 }
5941 5365
5942 } 5366 if (RD_HARPOON(port + hp_ext_status) &
5367 BAD_EXT_STATUS) {
5943 5368
5944 else { 5369 if (pCurrSCCB->HostStatus == 0x00) {
5945 5370
5371 pCurrSCCB->HostStatus =
5372 SCCB_BM_ERR;
5373 }
5374 }
5375 }
5376 }
5946 5377
5947 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) { 5378 }
5948 5379
5949 timeout = LONG_WAIT; 5380 else {
5950 5381
5951 while ((RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) && timeout--) {} 5382 if (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY) {
5952 5383
5953 if (RD_HARPOON(port+hp_ext_status) & BM_CMD_BUSY) { 5384 timeout = LONG_WAIT;
5954 5385
5955 if (pCurrSCCB->HostStatus == 0x00) { 5386 while ((RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY)
5387 && timeout--) {
5388 }
5956 5389
5957 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5390 if (RD_HARPOON(port + hp_ext_status) & BM_CMD_BUSY) {
5958 }
5959 5391
5960 FPT_busMstrTimeOut(port); 5392 if (pCurrSCCB->HostStatus == 0x00) {
5961 }
5962 }
5963 5393
5394 pCurrSCCB->HostStatus = SCCB_BM_ERR;
5395 }
5964 5396
5965 if (RD_HARPOON(port+hp_int_status) & INT_EXT_STATUS) { 5397 FPT_busMstrTimeOut(port);
5398 }
5399 }
5966 5400
5967 if (RD_HARPOON(port+hp_ext_status) & BAD_EXT_STATUS) { 5401 if (RD_HARPOON(port + hp_int_status) & INT_EXT_STATUS) {
5968 5402
5969 if (pCurrSCCB->HostStatus == 0x00) { 5403 if (RD_HARPOON(port + hp_ext_status) & BAD_EXT_STATUS) {
5970 5404
5971 pCurrSCCB->HostStatus = SCCB_BM_ERR; 5405 if (pCurrSCCB->HostStatus == 0x00) {
5972 }
5973 }
5974 5406
5975 } 5407 pCurrSCCB->HostStatus = SCCB_BM_ERR;
5408 }
5409 }
5976 5410
5977 if (pCurrSCCB->Sccb_XferState & F_SG_XFER) { 5411 }
5978 5412
5979 WR_HARPOON(port+hp_page_ctrl, (RD_HARPOON(port+hp_page_ctrl) & 5413 if (pCurrSCCB->Sccb_XferState & F_SG_XFER) {
5980 ~SCATTER_EN));
5981 5414
5982 WR_HARPOON(port+hp_sg_addr,0x00); 5415 WR_HARPOON(port + hp_page_ctrl,
5416 (RD_HARPOON(port + hp_page_ctrl) &
5417 ~SCATTER_EN));
5983 5418
5984 pCurrSCCB->Sccb_sgseg += SG_BUF_CNT; 5419 WR_HARPOON(port + hp_sg_addr, 0x00);
5985 5420
5986 pCurrSCCB->Sccb_SGoffset = 0x00; 5421 pCurrSCCB->Sccb_sgseg += SG_BUF_CNT;
5987 5422
5423 pCurrSCCB->Sccb_SGoffset = 0x00;
5988 5424
5989 if ((ULONG)(pCurrSCCB->Sccb_sgseg * SG_ELEMENT_SIZE) >= 5425 if ((unsigned long)(pCurrSCCB->Sccb_sgseg *
5990 pCurrSCCB->DataLength) { 5426 SG_ELEMENT_SIZE) >=
5427 pCurrSCCB->DataLength) {
5991 5428
5992 pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED; 5429 pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
5993 5430
5994 pCurrSCCB->Sccb_sgseg = (USHORT)(pCurrSCCB->DataLength / SG_ELEMENT_SIZE); 5431 pCurrSCCB->Sccb_sgseg =
5432 (unsigned short)(pCurrSCCB->DataLength /
5433 SG_ELEMENT_SIZE);
5995 5434
5996 } 5435 }
5997 } 5436 }
5998 5437
5999 else { 5438 else {
6000 5439
6001 if (!(pCurrSCCB->Sccb_XferState & F_AUTO_SENSE)) 5440 if (!(pCurrSCCB->Sccb_XferState & F_AUTO_SENSE))
6002 5441
6003 pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED; 5442 pCurrSCCB->Sccb_XferState |= F_ALL_XFERRED;
6004 } 5443 }
6005 } 5444 }
6006 5445
6007 WR_HARPOON(port+hp_int_mask,(INT_CMD_COMPL | SCSI_INTERRUPT)); 5446 WR_HARPOON(port + hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
6008} 5447}
6009 5448
6010
6011
6012/*--------------------------------------------------------------------- 5449/*---------------------------------------------------------------------
6013 * 5450 *
6014 * Function: Host Data Transfer Restart 5451 * Function: Host Data Transfer Restart
@@ -6017,47 +5454,47 @@ static void FPT_hostDataXferAbort(ULONG port, UCHAR p_card, PSCCB pCurrSCCB)
6017 * pointers message. 5454 * pointers message.
6018 * 5455 *
6019 *---------------------------------------------------------------------*/ 5456 *---------------------------------------------------------------------*/
6020static void FPT_hostDataXferRestart(PSCCB currSCCB) 5457static void FPT_hostDataXferRestart(struct sccb *currSCCB)
6021{ 5458{
6022 ULONG data_count; 5459 unsigned long data_count;
6023 UINT sg_index; 5460 unsigned int sg_index;
6024 ULONG *sg_ptr; 5461 unsigned long *sg_ptr;
6025 5462
6026 if (currSCCB->Sccb_XferState & F_SG_XFER) { 5463 if (currSCCB->Sccb_XferState & F_SG_XFER) {
6027 5464
6028 currSCCB->Sccb_XferCnt = 0; 5465 currSCCB->Sccb_XferCnt = 0;
6029 5466
6030 sg_index = 0xffff; /*Index by long words into sg list. */ 5467 sg_index = 0xffff; /*Index by long words into sg list. */
6031 data_count = 0; /*Running count of SG xfer counts. */ 5468 data_count = 0; /*Running count of SG xfer counts. */
6032 5469
6033 sg_ptr = (ULONG *)currSCCB->DataPointer; 5470 sg_ptr = (unsigned long *)currSCCB->DataPointer;
6034 5471
6035 while (data_count < currSCCB->Sccb_ATC) { 5472 while (data_count < currSCCB->Sccb_ATC) {
6036 5473
6037 sg_index++; 5474 sg_index++;
6038 data_count += *(sg_ptr+(sg_index * 2)); 5475 data_count += *(sg_ptr + (sg_index * 2));
6039 } 5476 }
6040 5477
6041 if (data_count == currSCCB->Sccb_ATC) { 5478 if (data_count == currSCCB->Sccb_ATC) {
6042 5479
6043 currSCCB->Sccb_SGoffset = 0; 5480 currSCCB->Sccb_SGoffset = 0;
6044 sg_index++; 5481 sg_index++;
6045 } 5482 }
6046 5483
6047 else { 5484 else {
6048 currSCCB->Sccb_SGoffset = data_count - currSCCB->Sccb_ATC; 5485 currSCCB->Sccb_SGoffset =
6049 } 5486 data_count - currSCCB->Sccb_ATC;
5487 }
6050 5488
6051 currSCCB->Sccb_sgseg = (USHORT)sg_index; 5489 currSCCB->Sccb_sgseg = (unsigned short)sg_index;
6052 } 5490 }
6053 5491
6054 else { 5492 else {
6055 currSCCB->Sccb_XferCnt = currSCCB->DataLength - currSCCB->Sccb_ATC; 5493 currSCCB->Sccb_XferCnt =
6056 } 5494 currSCCB->DataLength - currSCCB->Sccb_ATC;
5495 }
6057} 5496}
6058 5497
6059
6060
6061/*--------------------------------------------------------------------- 5498/*---------------------------------------------------------------------
6062 * 5499 *
6063 * Function: FPT_scini 5500 * Function: FPT_scini
@@ -6066,177 +5503,192 @@ static void FPT_hostDataXferRestart(PSCCB currSCCB)
6066 * 5503 *
6067 *---------------------------------------------------------------------*/ 5504 *---------------------------------------------------------------------*/
6068 5505
6069static void FPT_scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up) 5506static void FPT_scini(unsigned char p_card, unsigned char p_our_id,
5507 unsigned char p_power_up)
6070{ 5508{
6071 5509
6072 UCHAR loser,assigned_id; 5510 unsigned char loser, assigned_id;
6073 ULONG p_port; 5511 unsigned long p_port;
6074 5512
6075 UCHAR i,k,ScamFlg ; 5513 unsigned char i, k, ScamFlg;
6076 PSCCBcard currCard; 5514 struct sccb_card *currCard;
6077 PNVRamInfo pCurrNvRam; 5515 struct nvram_info *pCurrNvRam;
6078 5516
6079 currCard = &FPT_BL_Card[p_card]; 5517 currCard = &FPT_BL_Card[p_card];
6080 p_port = currCard->ioPort; 5518 p_port = currCard->ioPort;
6081 pCurrNvRam = currCard->pNvRamInfo; 5519 pCurrNvRam = currCard->pNvRamInfo;
6082 5520
6083 5521 if (pCurrNvRam) {
6084 if(pCurrNvRam){
6085 ScamFlg = pCurrNvRam->niScamConf; 5522 ScamFlg = pCurrNvRam->niScamConf;
6086 i = pCurrNvRam->niSysConf; 5523 i = pCurrNvRam->niSysConf;
5524 } else {
5525 ScamFlg =
5526 (unsigned char)FPT_utilEERead(p_port, SCAM_CONFIG / 2);
5527 i = (unsigned
5528 char)(FPT_utilEERead(p_port, (SYSTEM_CONFIG / 2)));
6087 } 5529 }
6088 else{ 5530 if (!(i & 0x02)) /* check if reset bus in AutoSCSI parameter set */
6089 ScamFlg = (UCHAR) FPT_utilEERead(p_port, SCAM_CONFIG/2);
6090 i = (UCHAR)(FPT_utilEERead(p_port, (SYSTEM_CONFIG/2)));
6091 }
6092 if(!(i & 0x02)) /* check if reset bus in AutoSCSI parameter set */
6093 return; 5531 return;
6094 5532
6095 FPT_inisci(p_card,p_port, p_our_id); 5533 FPT_inisci(p_card, p_port, p_our_id);
6096
6097 /* Force to wait 1 sec after SCSI bus reset. Some SCAM device FW
6098 too slow to return to SCAM selection */
6099 5534
6100 /* if (p_power_up) 5535 /* Force to wait 1 sec after SCSI bus reset. Some SCAM device FW
6101 FPT_Wait1Second(p_port); 5536 too slow to return to SCAM selection */
6102 else
6103 FPT_Wait(p_port, TO_250ms); */
6104 5537
6105 FPT_Wait1Second(p_port); 5538 /* if (p_power_up)
5539 FPT_Wait1Second(p_port);
5540 else
5541 FPT_Wait(p_port, TO_250ms); */
6106 5542
6107 if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2)) 5543 FPT_Wait1Second(p_port);
6108 {
6109 while (!(FPT_scarb(p_port,INIT_SELTD))) {}
6110 5544
6111 FPT_scsel(p_port); 5545 if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2)) {
5546 while (!(FPT_scarb(p_port, INIT_SELTD))) {
5547 }
6112 5548
6113 do { 5549 FPT_scsel(p_port);
6114 FPT_scxferc(p_port,SYNC_PTRN);
6115 FPT_scxferc(p_port,DOM_MSTR);
6116 loser = FPT_scsendi(p_port,&FPT_scamInfo[p_our_id].id_string[0]);
6117 } while ( loser == 0xFF );
6118 5550
6119 FPT_scbusf(p_port); 5551 do {
5552 FPT_scxferc(p_port, SYNC_PTRN);
5553 FPT_scxferc(p_port, DOM_MSTR);
5554 loser =
5555 FPT_scsendi(p_port,
5556 &FPT_scamInfo[p_our_id].id_string[0]);
5557 } while (loser == 0xFF);
6120 5558
6121 if ((p_power_up) && (!loser)) 5559 FPT_scbusf(p_port);
6122 {
6123 FPT_sresb(p_port,p_card);
6124 FPT_Wait(p_port, TO_250ms);
6125 5560
6126 while (!(FPT_scarb(p_port,INIT_SELTD))) {} 5561 if ((p_power_up) && (!loser)) {
5562 FPT_sresb(p_port, p_card);
5563 FPT_Wait(p_port, TO_250ms);
6127 5564
6128 FPT_scsel(p_port); 5565 while (!(FPT_scarb(p_port, INIT_SELTD))) {
5566 }
6129 5567
6130 do { 5568 FPT_scsel(p_port);
6131 FPT_scxferc(p_port, SYNC_PTRN);
6132 FPT_scxferc(p_port, DOM_MSTR);
6133 loser = FPT_scsendi(p_port,&FPT_scamInfo[p_our_id].
6134 id_string[0]);
6135 } while ( loser == 0xFF );
6136 5569
6137 FPT_scbusf(p_port); 5570 do {
6138 } 5571 FPT_scxferc(p_port, SYNC_PTRN);
6139 } 5572 FPT_scxferc(p_port, DOM_MSTR);
5573 loser =
5574 FPT_scsendi(p_port,
5575 &FPT_scamInfo[p_our_id].
5576 id_string[0]);
5577 } while (loser == 0xFF);
6140 5578
6141 else 5579 FPT_scbusf(p_port);
6142 { 5580 }
6143 loser = 0; 5581 }
6144 }
6145 5582
5583 else {
5584 loser = 0;
5585 }
6146 5586
6147 if (!loser) 5587 if (!loser) {
6148 { 5588
5589 FPT_scamInfo[p_our_id].state = ID_ASSIGNED;
5590
5591 if (ScamFlg & SCAM_ENABLED) {
5592
5593 for (i = 0; i < MAX_SCSI_TAR; i++) {
5594 if ((FPT_scamInfo[i].state == ID_UNASSIGNED) ||
5595 (FPT_scamInfo[i].state == ID_UNUSED)) {
5596 if (FPT_scsell(p_port, i)) {
5597 FPT_scamInfo[i].state = LEGACY;
5598 if ((FPT_scamInfo[i].
5599 id_string[0] != 0xFF)
5600 || (FPT_scamInfo[i].
5601 id_string[1] != 0xFA)) {
5602
5603 FPT_scamInfo[i].
5604 id_string[0] = 0xFF;
5605 FPT_scamInfo[i].
5606 id_string[1] = 0xFA;
5607 if (pCurrNvRam == NULL)
5608 currCard->
5609 globalFlags
5610 |=
5611 F_UPDATE_EEPROM;
5612 }
5613 }
5614 }
5615 }
6149 5616
6150 FPT_scamInfo[p_our_id].state = ID_ASSIGNED; 5617 FPT_sresb(p_port, p_card);
5618 FPT_Wait1Second(p_port);
5619 while (!(FPT_scarb(p_port, INIT_SELTD))) {
5620 }
5621 FPT_scsel(p_port);
5622 FPT_scasid(p_card, p_port);
5623 }
6151 5624
5625 }
6152 5626
6153 if (ScamFlg & SCAM_ENABLED) 5627 else if ((loser) && (ScamFlg & SCAM_ENABLED)) {
6154 { 5628 FPT_scamInfo[p_our_id].id_string[0] = SLV_TYPE_CODE0;
5629 assigned_id = 0;
5630 FPT_scwtsel(p_port);
6155 5631
6156 for (i=0; i < MAX_SCSI_TAR; i++) 5632 do {
6157 { 5633 while (FPT_scxferc(p_port, 0x00) != SYNC_PTRN) {
6158 if ((FPT_scamInfo[i].state == ID_UNASSIGNED) || 5634 }
6159 (FPT_scamInfo[i].state == ID_UNUSED))
6160 {
6161 if (FPT_scsell(p_port,i))
6162 {
6163 FPT_scamInfo[i].state = LEGACY;
6164 if ((FPT_scamInfo[i].id_string[0] != 0xFF) ||
6165 (FPT_scamInfo[i].id_string[1] != 0xFA))
6166 {
6167
6168 FPT_scamInfo[i].id_string[0] = 0xFF;
6169 FPT_scamInfo[i].id_string[1] = 0xFA;
6170 if(pCurrNvRam == NULL)
6171 currCard->globalFlags |= F_UPDATE_EEPROM;
6172 }
6173 }
6174 }
6175 }
6176
6177 FPT_sresb(p_port,p_card);
6178 FPT_Wait1Second(p_port);
6179 while (!(FPT_scarb(p_port,INIT_SELTD))) {}
6180 FPT_scsel(p_port);
6181 FPT_scasid(p_card, p_port);
6182 }
6183 5635
6184 } 5636 i = FPT_scxferc(p_port, 0x00);
5637 if (i == ASSIGN_ID) {
5638 if (!
5639 (FPT_scsendi
5640 (p_port,
5641 &FPT_scamInfo[p_our_id].id_string[0]))) {
5642 i = FPT_scxferc(p_port, 0x00);
5643 if (FPT_scvalq(i)) {
5644 k = FPT_scxferc(p_port, 0x00);
5645
5646 if (FPT_scvalq(k)) {
5647 currCard->ourId =
5648 ((unsigned char)(i
5649 <<
5650 3)
5651 +
5652 (k &
5653 (unsigned char)7))
5654 & (unsigned char)
5655 0x3F;
5656 FPT_inisci(p_card,
5657 p_port,
5658 p_our_id);
5659 FPT_scamInfo[currCard->
5660 ourId].
5661 state = ID_ASSIGNED;
5662 FPT_scamInfo[currCard->
5663 ourId].
5664 id_string[0]
5665 = SLV_TYPE_CODE0;
5666 assigned_id = 1;
5667 }
5668 }
5669 }
5670 }
6185 5671
6186 else if ((loser) && (ScamFlg & SCAM_ENABLED)) 5672 else if (i == SET_P_FLAG) {
6187 { 5673 if (!(FPT_scsendi(p_port,
6188 FPT_scamInfo[p_our_id].id_string[0] = SLV_TYPE_CODE0; 5674 &FPT_scamInfo[p_our_id].
6189 assigned_id = 0; 5675 id_string[0])))
6190 FPT_scwtsel(p_port); 5676 FPT_scamInfo[p_our_id].id_string[0] |=
6191 5677 0x80;
6192 do { 5678 }
6193 while (FPT_scxferc(p_port,0x00) != SYNC_PTRN) {} 5679 } while (!assigned_id);
6194
6195 i = FPT_scxferc(p_port,0x00);
6196 if (i == ASSIGN_ID)
6197 {
6198 if (!(FPT_scsendi(p_port,&FPT_scamInfo[p_our_id].id_string[0])))
6199 {
6200 i = FPT_scxferc(p_port,0x00);
6201 if (FPT_scvalq(i))
6202 {
6203 k = FPT_scxferc(p_port,0x00);
6204
6205 if (FPT_scvalq(k))
6206 {
6207 currCard->ourId =
6208 ((UCHAR)(i<<3)+(k & (UCHAR)7)) & (UCHAR) 0x3F;
6209 FPT_inisci(p_card, p_port, p_our_id);
6210 FPT_scamInfo[currCard->ourId].state = ID_ASSIGNED;
6211 FPT_scamInfo[currCard->ourId].id_string[0]
6212 = SLV_TYPE_CODE0;
6213 assigned_id = 1;
6214 }
6215 }
6216 }
6217 }
6218
6219 else if (i == SET_P_FLAG)
6220 {
6221 if (!(FPT_scsendi(p_port,
6222 &FPT_scamInfo[p_our_id].id_string[0])))
6223 FPT_scamInfo[p_our_id].id_string[0] |= 0x80;
6224 }
6225 }while (!assigned_id);
6226
6227 while (FPT_scxferc(p_port,0x00) != CFG_CMPLT) {}
6228 }
6229 5680
6230 if (ScamFlg & SCAM_ENABLED) 5681 while (FPT_scxferc(p_port, 0x00) != CFG_CMPLT) {
6231 { 5682 }
6232 FPT_scbusf(p_port); 5683 }
6233 if (currCard->globalFlags & F_UPDATE_EEPROM)
6234 {
6235 FPT_scsavdi(p_card, p_port);
6236 currCard->globalFlags &= ~F_UPDATE_EEPROM;
6237 }
6238 }
6239 5684
5685 if (ScamFlg & SCAM_ENABLED) {
5686 FPT_scbusf(p_port);
5687 if (currCard->globalFlags & F_UPDATE_EEPROM) {
5688 FPT_scsavdi(p_card, p_port);
5689 currCard->globalFlags &= ~F_UPDATE_EEPROM;
5690 }
5691 }
6240 5692
6241/* 5693/*
6242 for (i=0,k=0; i < MAX_SCSI_TAR; i++) 5694 for (i=0,k=0; i < MAX_SCSI_TAR; i++)
@@ -6253,7 +5705,6 @@ static void FPT_scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up)
6253*/ 5705*/
6254} 5706}
6255 5707
6256
6257/*--------------------------------------------------------------------- 5708/*---------------------------------------------------------------------
6258 * 5709 *
6259 * Function: FPT_scarb 5710 * Function: FPT_scarb
@@ -6262,59 +5713,60 @@ static void FPT_scini(UCHAR p_card, UCHAR p_our_id, UCHAR p_power_up)
6262 * 5713 *
6263 *---------------------------------------------------------------------*/ 5714 *---------------------------------------------------------------------*/
6264 5715
6265static int FPT_scarb(ULONG p_port, UCHAR p_sel_type) 5716static int FPT_scarb(unsigned long p_port, unsigned char p_sel_type)
6266{ 5717{
6267 if (p_sel_type == INIT_SELTD) 5718 if (p_sel_type == INIT_SELTD) {
6268 {
6269 5719
6270 while (RD_HARPOON(p_port+hp_scsisig) & (SCSI_SEL | SCSI_BSY)) {} 5720 while (RD_HARPOON(p_port + hp_scsisig) & (SCSI_SEL | SCSI_BSY)) {
6271 5721 }
6272
6273 if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL)
6274 return(0);
6275
6276 if (RD_HARPOON(p_port+hp_scsidata_0) != 00)
6277 return(0);
6278 5722
6279 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_BSY)); 5723 if (RD_HARPOON(p_port + hp_scsisig) & SCSI_SEL)
5724 return 0;
6280 5725
6281 if (RD_HARPOON(p_port+hp_scsisig) & SCSI_SEL) { 5726 if (RD_HARPOON(p_port + hp_scsidata_0) != 00)
5727 return 0;
6282 5728
6283 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) & 5729 WR_HARPOON(p_port + hp_scsisig,
6284 ~SCSI_BSY)); 5730 (RD_HARPOON(p_port + hp_scsisig) | SCSI_BSY));
6285 return(0);
6286 }
6287 5731
5732 if (RD_HARPOON(p_port + hp_scsisig) & SCSI_SEL) {
6288 5733
6289 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_SEL)); 5734 WR_HARPOON(p_port + hp_scsisig,
5735 (RD_HARPOON(p_port + hp_scsisig) &
5736 ~SCSI_BSY));
5737 return 0;
5738 }
6290 5739
6291 if (RD_HARPOON(p_port+hp_scsidata_0) != 00) { 5740 WR_HARPOON(p_port + hp_scsisig,
5741 (RD_HARPOON(p_port + hp_scsisig) | SCSI_SEL));
6292 5742
6293 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) & 5743 if (RD_HARPOON(p_port + hp_scsidata_0) != 00) {
6294 ~(SCSI_BSY | SCSI_SEL)));
6295 return(0);
6296 }
6297 }
6298 5744
5745 WR_HARPOON(p_port + hp_scsisig,
5746 (RD_HARPOON(p_port + hp_scsisig) &
5747 ~(SCSI_BSY | SCSI_SEL)));
5748 return 0;
5749 }
5750 }
6299 5751
6300 WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0) 5752 WR_HARPOON(p_port + hp_clkctrl_0, (RD_HARPOON(p_port + hp_clkctrl_0)
6301 & ~ACTdeassert)); 5753 & ~ACTdeassert));
6302 WR_HARPOON(p_port+hp_scsireset, SCAM_EN); 5754 WR_HARPOON(p_port + hp_scsireset, SCAM_EN);
6303 WR_HARPOON(p_port+hp_scsidata_0, 0x00); 5755 WR_HARPOON(p_port + hp_scsidata_0, 0x00);
6304 WR_HARPOON(p_port+hp_scsidata_1, 0x00); 5756 WR_HARPOON(p_port + hp_scsidata_1, 0x00);
6305 WR_HARPOON(p_port+hp_portctrl_0, SCSI_BUS_EN); 5757 WR_HARPOON(p_port + hp_portctrl_0, SCSI_BUS_EN);
6306 5758
6307 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) | SCSI_MSG)); 5759 WR_HARPOON(p_port + hp_scsisig,
5760 (RD_HARPOON(p_port + hp_scsisig) | SCSI_MSG));
6308 5761
6309 WR_HARPOON(p_port+hp_scsisig, (RD_HARPOON(p_port+hp_scsisig) 5762 WR_HARPOON(p_port + hp_scsisig, (RD_HARPOON(p_port + hp_scsisig)
6310 & ~SCSI_BSY)); 5763 & ~SCSI_BSY));
6311 5764
6312 FPT_Wait(p_port,TO_250ms); 5765 FPT_Wait(p_port, TO_250ms);
6313 5766
6314 return(1); 5767 return 1;
6315} 5768}
6316 5769
6317
6318/*--------------------------------------------------------------------- 5770/*---------------------------------------------------------------------
6319 * 5771 *
6320 * Function: FPT_scbusf 5772 * Function: FPT_scbusf
@@ -6323,34 +5775,30 @@ static int FPT_scarb(ULONG p_port, UCHAR p_sel_type)
6323 * 5775 *
6324 *---------------------------------------------------------------------*/ 5776 *---------------------------------------------------------------------*/
6325 5777
6326static void FPT_scbusf(ULONG p_port) 5778static void FPT_scbusf(unsigned long p_port)
6327{ 5779{
6328 WR_HARPOON(p_port+hp_page_ctrl, 5780 WR_HARPOON(p_port + hp_page_ctrl,
6329 (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE)); 5781 (RD_HARPOON(p_port + hp_page_ctrl) | G_INT_DISABLE));
6330
6331
6332 WR_HARPOON(p_port+hp_scsidata_0, 0x00);
6333 5782
6334 WR_HARPOON(p_port+hp_portctrl_0, (RD_HARPOON(p_port+hp_portctrl_0) 5783 WR_HARPOON(p_port + hp_scsidata_0, 0x00);
6335 & ~SCSI_BUS_EN));
6336 5784
6337 WR_HARPOON(p_port+hp_scsisig, 0x00); 5785 WR_HARPOON(p_port + hp_portctrl_0, (RD_HARPOON(p_port + hp_portctrl_0)
5786 & ~SCSI_BUS_EN));
6338 5787
5788 WR_HARPOON(p_port + hp_scsisig, 0x00);
6339 5789
6340 WR_HARPOON(p_port+hp_scsireset, (RD_HARPOON(p_port+hp_scsireset) 5790 WR_HARPOON(p_port + hp_scsireset, (RD_HARPOON(p_port + hp_scsireset)
6341 & ~SCAM_EN)); 5791 & ~SCAM_EN));
6342 5792
6343 WR_HARPOON(p_port+hp_clkctrl_0, (RD_HARPOON(p_port+hp_clkctrl_0) 5793 WR_HARPOON(p_port + hp_clkctrl_0, (RD_HARPOON(p_port + hp_clkctrl_0)
6344 | ACTdeassert)); 5794 | ACTdeassert));
6345 5795
6346 WRW_HARPOON((p_port+hp_intstat), (BUS_FREE | AUTO_INT | SCAM_SEL)); 5796 WRW_HARPOON((p_port + hp_intstat), (BUS_FREE | AUTO_INT | SCAM_SEL));
6347 5797
6348 WR_HARPOON(p_port+hp_page_ctrl, 5798 WR_HARPOON(p_port + hp_page_ctrl,
6349 (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)); 5799 (RD_HARPOON(p_port + hp_page_ctrl) & ~G_INT_DISABLE));
6350} 5800}
6351 5801
6352
6353
6354/*--------------------------------------------------------------------- 5802/*---------------------------------------------------------------------
6355 * 5803 *
6356 * Function: FPT_scasid 5804 * Function: FPT_scasid
@@ -6359,86 +5807,75 @@ static void FPT_scbusf(ULONG p_port)
6359 * 5807 *
6360 *---------------------------------------------------------------------*/ 5808 *---------------------------------------------------------------------*/
6361 5809
6362static void FPT_scasid(UCHAR p_card, ULONG p_port) 5810static void FPT_scasid(unsigned char p_card, unsigned long p_port)
6363{ 5811{
6364 UCHAR temp_id_string[ID_STRING_LENGTH]; 5812 unsigned char temp_id_string[ID_STRING_LENGTH];
6365 5813
6366 UCHAR i,k,scam_id; 5814 unsigned char i, k, scam_id;
6367 UCHAR crcBytes[3]; 5815 unsigned char crcBytes[3];
6368 PNVRamInfo pCurrNvRam; 5816 struct nvram_info *pCurrNvRam;
6369 ushort_ptr pCrcBytes; 5817 unsigned short *pCrcBytes;
6370 5818
6371 pCurrNvRam = FPT_BL_Card[p_card].pNvRamInfo; 5819 pCurrNvRam = FPT_BL_Card[p_card].pNvRamInfo;
6372 5820
6373 i=0; 5821 i = 0;
6374 5822
6375 while (!i) 5823 while (!i) {
6376 {
6377 5824
6378 for (k=0; k < ID_STRING_LENGTH; k++) 5825 for (k = 0; k < ID_STRING_LENGTH; k++) {
6379 { 5826 temp_id_string[k] = (unsigned char)0x00;
6380 temp_id_string[k] = (UCHAR) 0x00; 5827 }
6381 }
6382 5828
6383 FPT_scxferc(p_port,SYNC_PTRN); 5829 FPT_scxferc(p_port, SYNC_PTRN);
6384 FPT_scxferc(p_port,ASSIGN_ID); 5830 FPT_scxferc(p_port, ASSIGN_ID);
6385 5831
6386 if (!(FPT_sciso(p_port,&temp_id_string[0]))) 5832 if (!(FPT_sciso(p_port, &temp_id_string[0]))) {
6387 { 5833 if (pCurrNvRam) {
6388 if(pCurrNvRam){ 5834 pCrcBytes = (unsigned short *)&crcBytes[0];
6389 pCrcBytes = (ushort_ptr)&crcBytes[0];
6390 *pCrcBytes = FPT_CalcCrc16(&temp_id_string[0]); 5835 *pCrcBytes = FPT_CalcCrc16(&temp_id_string[0]);
6391 crcBytes[2] = FPT_CalcLrc(&temp_id_string[0]); 5836 crcBytes[2] = FPT_CalcLrc(&temp_id_string[0]);
6392 temp_id_string[1] = crcBytes[2]; 5837 temp_id_string[1] = crcBytes[2];
6393 temp_id_string[2] = crcBytes[0]; 5838 temp_id_string[2] = crcBytes[0];
6394 temp_id_string[3] = crcBytes[1]; 5839 temp_id_string[3] = crcBytes[1];
6395 for(k = 4; k < ID_STRING_LENGTH; k++) 5840 for (k = 4; k < ID_STRING_LENGTH; k++)
6396 temp_id_string[k] = (UCHAR) 0x00; 5841 temp_id_string[k] = (unsigned char)0x00;
6397 } 5842 }
6398 i = FPT_scmachid(p_card,temp_id_string); 5843 i = FPT_scmachid(p_card, temp_id_string);
6399 5844
6400 if (i == CLR_PRIORITY) 5845 if (i == CLR_PRIORITY) {
6401 { 5846 FPT_scxferc(p_port, MISC_CODE);
6402 FPT_scxferc(p_port,MISC_CODE); 5847 FPT_scxferc(p_port, CLR_P_FLAG);
6403 FPT_scxferc(p_port,CLR_P_FLAG); 5848 i = 0; /*Not the last ID yet. */
6404 i = 0; /*Not the last ID yet. */ 5849 }
6405 }
6406
6407 else if (i != NO_ID_AVAIL)
6408 {
6409 if (i < 8 )
6410 FPT_scxferc(p_port,ID_0_7);
6411 else
6412 FPT_scxferc(p_port,ID_8_F);
6413 5850
6414 scam_id = (i & (UCHAR) 0x07); 5851 else if (i != NO_ID_AVAIL) {
5852 if (i < 8)
5853 FPT_scxferc(p_port, ID_0_7);
5854 else
5855 FPT_scxferc(p_port, ID_8_F);
6415 5856
5857 scam_id = (i & (unsigned char)0x07);
6416 5858
6417 for (k=1; k < 0x08; k <<= 1) 5859 for (k = 1; k < 0x08; k <<= 1)
6418 if (!( k & i )) 5860 if (!(k & i))
6419 scam_id += 0x08; /*Count number of zeros in DB0-3. */ 5861 scam_id += 0x08; /*Count number of zeros in DB0-3. */
6420 5862
6421 FPT_scxferc(p_port,scam_id); 5863 FPT_scxferc(p_port, scam_id);
6422 5864
6423 i = 0; /*Not the last ID yet. */ 5865 i = 0; /*Not the last ID yet. */
6424 } 5866 }
6425 } 5867 }
6426 5868
6427 else 5869 else {
6428 { 5870 i = 1;
6429 i = 1; 5871 }
6430 }
6431 5872
6432 } /*End while */ 5873 } /*End while */
6433 5874
6434 FPT_scxferc(p_port,SYNC_PTRN); 5875 FPT_scxferc(p_port, SYNC_PTRN);
6435 FPT_scxferc(p_port,CFG_CMPLT); 5876 FPT_scxferc(p_port, CFG_CMPLT);
6436} 5877}
6437 5878
6438
6439
6440
6441
6442/*--------------------------------------------------------------------- 5879/*---------------------------------------------------------------------
6443 * 5880 *
6444 * Function: FPT_scsel 5881 * Function: FPT_scsel
@@ -6447,32 +5884,32 @@ static void FPT_scasid(UCHAR p_card, ULONG p_port)
6447 * 5884 *
6448 *---------------------------------------------------------------------*/ 5885 *---------------------------------------------------------------------*/
6449 5886
6450static void FPT_scsel(ULONG p_port) 5887static void FPT_scsel(unsigned long p_port)
6451{ 5888{
6452 5889
6453 WR_HARPOON(p_port+hp_scsisig, SCSI_SEL); 5890 WR_HARPOON(p_port + hp_scsisig, SCSI_SEL);
6454 FPT_scwiros(p_port, SCSI_MSG); 5891 FPT_scwiros(p_port, SCSI_MSG);
6455
6456 WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY));
6457
6458 5892
6459 WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD)); 5893 WR_HARPOON(p_port + hp_scsisig, (SCSI_SEL | SCSI_BSY));
6460 WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) |
6461 (UCHAR)(BIT(7)+BIT(6))));
6462 5894
5895 WR_HARPOON(p_port + hp_scsisig,
5896 (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
5897 WR_HARPOON(p_port + hp_scsidata_0,
5898 (unsigned char)(RD_HARPOON(p_port + hp_scsidata_0) |
5899 (unsigned char)(BIT(7) + BIT(6))));
6463 5900
6464 WR_HARPOON(p_port+hp_scsisig, (SCSI_BSY | SCSI_IOBIT | SCSI_CD)); 5901 WR_HARPOON(p_port + hp_scsisig, (SCSI_BSY | SCSI_IOBIT | SCSI_CD));
6465 FPT_scwiros(p_port, SCSI_SEL); 5902 FPT_scwiros(p_port, SCSI_SEL);
6466 5903
6467 WR_HARPOON(p_port+hp_scsidata_0, (UCHAR)(RD_HARPOON(p_port+hp_scsidata_0) & 5904 WR_HARPOON(p_port + hp_scsidata_0,
6468 ~(UCHAR)BIT(6))); 5905 (unsigned char)(RD_HARPOON(p_port + hp_scsidata_0) &
6469 FPT_scwirod(p_port, BIT(6)); 5906 ~(unsigned char)BIT(6)));
5907 FPT_scwirod(p_port, BIT(6));
6470 5908
6471 WR_HARPOON(p_port+hp_scsisig, (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD)); 5909 WR_HARPOON(p_port + hp_scsisig,
5910 (SCSI_SEL | SCSI_BSY | SCSI_IOBIT | SCSI_CD));
6472} 5911}
6473 5912
6474
6475
6476/*--------------------------------------------------------------------- 5913/*---------------------------------------------------------------------
6477 * 5914 *
6478 * Function: FPT_scxferc 5915 * Function: FPT_scxferc
@@ -6481,48 +5918,47 @@ static void FPT_scsel(ULONG p_port)
6481 * 5918 *
6482 *---------------------------------------------------------------------*/ 5919 *---------------------------------------------------------------------*/
6483 5920
6484static UCHAR FPT_scxferc(ULONG p_port, UCHAR p_data) 5921static unsigned char FPT_scxferc(unsigned long p_port, unsigned char p_data)
6485{ 5922{
6486 UCHAR curr_data, ret_data; 5923 unsigned char curr_data, ret_data;
6487 5924
6488 curr_data = p_data | BIT(7) | BIT(5); /*Start with DB7 & DB5 asserted. */ 5925 curr_data = p_data | BIT(7) | BIT(5); /*Start with DB7 & DB5 asserted. */
6489 5926
6490 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5927 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6491 5928
6492 curr_data &= ~BIT(7); 5929 curr_data &= ~BIT(7);
6493 5930
6494 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5931 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6495 5932
6496 FPT_scwirod(p_port,BIT(7)); /*Wait for DB7 to be released. */ 5933 FPT_scwirod(p_port, BIT(7)); /*Wait for DB7 to be released. */
6497 while (!(RD_HARPOON(p_port+hp_scsidata_0) & BIT(5))); 5934 while (!(RD_HARPOON(p_port + hp_scsidata_0) & BIT(5))) ;
6498 5935
6499 ret_data = (RD_HARPOON(p_port+hp_scsidata_0) & (UCHAR) 0x1F); 5936 ret_data = (RD_HARPOON(p_port + hp_scsidata_0) & (unsigned char)0x1F);
6500 5937
6501 curr_data |= BIT(6); 5938 curr_data |= BIT(6);
6502 5939
6503 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5940 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6504 5941
6505 curr_data &= ~BIT(5); 5942 curr_data &= ~BIT(5);
6506 5943
6507 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5944 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6508 5945
6509 FPT_scwirod(p_port,BIT(5)); /*Wait for DB5 to be released. */ 5946 FPT_scwirod(p_port, BIT(5)); /*Wait for DB5 to be released. */
6510 5947
6511 curr_data &= ~(BIT(4)|BIT(3)|BIT(2)|BIT(1)|BIT(0)); /*Release data bits */ 5948 curr_data &= ~(BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0)); /*Release data bits */
6512 curr_data |= BIT(7); 5949 curr_data |= BIT(7);
6513 5950
6514 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5951 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6515 5952
6516 curr_data &= ~BIT(6); 5953 curr_data &= ~BIT(6);
6517 5954
6518 WR_HARPOON(p_port+hp_scsidata_0, curr_data); 5955 WR_HARPOON(p_port + hp_scsidata_0, curr_data);
6519 5956
6520 FPT_scwirod(p_port,BIT(6)); /*Wait for DB6 to be released. */ 5957 FPT_scwirod(p_port, BIT(6)); /*Wait for DB6 to be released. */
6521 5958
6522 return(ret_data); 5959 return ret_data;
6523} 5960}
6524 5961
6525
6526/*--------------------------------------------------------------------- 5962/*---------------------------------------------------------------------
6527 * 5963 *
6528 * Function: FPT_scsendi 5964 * Function: FPT_scsendi
@@ -6532,51 +5968,50 @@ static UCHAR FPT_scxferc(ULONG p_port, UCHAR p_data)
6532 * 5968 *
6533 *---------------------------------------------------------------------*/ 5969 *---------------------------------------------------------------------*/
6534 5970
6535static UCHAR FPT_scsendi(ULONG p_port, UCHAR p_id_string[]) 5971static unsigned char FPT_scsendi(unsigned long p_port,
5972 unsigned char p_id_string[])
6536{ 5973{
6537 UCHAR ret_data,byte_cnt,bit_cnt,defer; 5974 unsigned char ret_data, byte_cnt, bit_cnt, defer;
6538 5975
6539 defer = 0; 5976 defer = 0;
6540 5977
6541 for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) { 5978 for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
6542 5979
6543 for (bit_cnt = 0x80; bit_cnt != 0 ; bit_cnt >>= 1) { 5980 for (bit_cnt = 0x80; bit_cnt != 0; bit_cnt >>= 1) {
6544 5981
6545 if (defer) 5982 if (defer)
6546 ret_data = FPT_scxferc(p_port,00); 5983 ret_data = FPT_scxferc(p_port, 00);
6547 5984
6548 else if (p_id_string[byte_cnt] & bit_cnt) 5985 else if (p_id_string[byte_cnt] & bit_cnt)
6549 5986
6550 ret_data = FPT_scxferc(p_port,02); 5987 ret_data = FPT_scxferc(p_port, 02);
6551 5988
6552 else { 5989 else {
6553 5990
6554 ret_data = FPT_scxferc(p_port,01); 5991 ret_data = FPT_scxferc(p_port, 01);
6555 if (ret_data & 02) 5992 if (ret_data & 02)
6556 defer = 1; 5993 defer = 1;
6557 } 5994 }
6558 5995
6559 if ((ret_data & 0x1C) == 0x10) 5996 if ((ret_data & 0x1C) == 0x10)
6560 return(0x00); /*End of isolation stage, we won! */ 5997 return 0x00; /*End of isolation stage, we won! */
6561 5998
6562 if (ret_data & 0x1C) 5999 if (ret_data & 0x1C)
6563 return(0xFF); 6000 return 0xFF;
6564 6001
6565 if ((defer) && (!(ret_data & 0x1F))) 6002 if ((defer) && (!(ret_data & 0x1F)))
6566 return(0x01); /*End of isolation stage, we lost. */ 6003 return 0x01; /*End of isolation stage, we lost. */
6567 6004
6568 } /*bit loop */ 6005 } /*bit loop */
6569 6006
6570 } /*byte loop */ 6007 } /*byte loop */
6571 6008
6572 if (defer) 6009 if (defer)
6573 return(0x01); /*We lost */ 6010 return 0x01; /*We lost */
6574 else 6011 else
6575 return(0); /*We WON! Yeeessss! */ 6012 return 0; /*We WON! Yeeessss! */
6576} 6013}
6577 6014
6578
6579
6580/*--------------------------------------------------------------------- 6015/*---------------------------------------------------------------------
6581 * 6016 *
6582 * Function: FPT_sciso 6017 * Function: FPT_sciso
@@ -6585,31 +6020,31 @@ static UCHAR FPT_scsendi(ULONG p_port, UCHAR p_id_string[])
6585 * 6020 *
6586 *---------------------------------------------------------------------*/ 6021 *---------------------------------------------------------------------*/
6587 6022
6588static UCHAR FPT_sciso(ULONG p_port, UCHAR p_id_string[]) 6023static unsigned char FPT_sciso(unsigned long p_port,
6024 unsigned char p_id_string[])
6589{ 6025{
6590 UCHAR ret_data,the_data,byte_cnt,bit_cnt; 6026 unsigned char ret_data, the_data, byte_cnt, bit_cnt;
6591 6027
6592 the_data = 0; 6028 the_data = 0;
6593 6029
6594 for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) { 6030 for (byte_cnt = 0; byte_cnt < ID_STRING_LENGTH; byte_cnt++) {
6595 6031
6596 for (bit_cnt = 0; bit_cnt < 8; bit_cnt++) { 6032 for (bit_cnt = 0; bit_cnt < 8; bit_cnt++) {
6597 6033
6598 ret_data = FPT_scxferc(p_port,0); 6034 ret_data = FPT_scxferc(p_port, 0);
6599 6035
6600 if (ret_data & 0xFC) 6036 if (ret_data & 0xFC)
6601 return(0xFF); 6037 return 0xFF;
6602 6038
6603 else { 6039 else {
6604 6040
6605 the_data <<= 1; 6041 the_data <<= 1;
6606 if (ret_data & BIT(1)) { 6042 if (ret_data & BIT(1)) {
6607 the_data |= 1; 6043 the_data |= 1;
6608 } 6044 }
6609 } 6045 }
6610 6046
6611 if ((ret_data & 0x1F) == 0) 6047 if ((ret_data & 0x1F) == 0) {
6612 {
6613/* 6048/*
6614 if(bit_cnt != 0 || bit_cnt != 8) 6049 if(bit_cnt != 0 || bit_cnt != 8)
6615 { 6050 {
@@ -6620,23 +6055,21 @@ static UCHAR FPT_sciso(ULONG p_port, UCHAR p_id_string[])
6620 continue; 6055 continue;
6621 } 6056 }
6622*/ 6057*/
6623 if (byte_cnt) 6058 if (byte_cnt)
6624 return(0x00); 6059 return 0x00;
6625 else 6060 else
6626 return(0xFF); 6061 return 0xFF;
6627 } 6062 }
6628 6063
6629 } /*bit loop */ 6064 } /*bit loop */
6630 6065
6631 p_id_string[byte_cnt] = the_data; 6066 p_id_string[byte_cnt] = the_data;
6632 6067
6633 } /*byte loop */ 6068 } /*byte loop */
6634 6069
6635 return(0); 6070 return 0;
6636} 6071}
6637 6072
6638
6639
6640/*--------------------------------------------------------------------- 6073/*---------------------------------------------------------------------
6641 * 6074 *
6642 * Function: FPT_scwirod 6075 * Function: FPT_scwirod
@@ -6646,26 +6079,24 @@ static UCHAR FPT_sciso(ULONG p_port, UCHAR p_id_string[])
6646 * 6079 *
6647 *---------------------------------------------------------------------*/ 6080 *---------------------------------------------------------------------*/
6648 6081
6649static void FPT_scwirod(ULONG p_port, UCHAR p_data_bit) 6082static void FPT_scwirod(unsigned long p_port, unsigned char p_data_bit)
6650{ 6083{
6651 UCHAR i; 6084 unsigned char i;
6652 6085
6653 i = 0; 6086 i = 0;
6654 while ( i < MAX_SCSI_TAR ) { 6087 while (i < MAX_SCSI_TAR) {
6655 6088
6656 if (RD_HARPOON(p_port+hp_scsidata_0) & p_data_bit) 6089 if (RD_HARPOON(p_port + hp_scsidata_0) & p_data_bit)
6657 6090
6658 i = 0; 6091 i = 0;
6659 6092
6660 else 6093 else
6661 6094
6662 i++; 6095 i++;
6663 6096
6664 } 6097 }
6665} 6098}
6666 6099
6667
6668
6669/*--------------------------------------------------------------------- 6100/*---------------------------------------------------------------------
6670 * 6101 *
6671 * Function: FPT_scwiros 6102 * Function: FPT_scwiros
@@ -6675,25 +6106,24 @@ static void FPT_scwirod(ULONG p_port, UCHAR p_data_bit)
6675 * 6106 *
6676 *---------------------------------------------------------------------*/ 6107 *---------------------------------------------------------------------*/
6677 6108
6678static void FPT_scwiros(ULONG p_port, UCHAR p_data_bit) 6109static void FPT_scwiros(unsigned long p_port, unsigned char p_data_bit)
6679{ 6110{
6680 UCHAR i; 6111 unsigned char i;
6681 6112
6682 i = 0; 6113 i = 0;
6683 while ( i < MAX_SCSI_TAR ) { 6114 while (i < MAX_SCSI_TAR) {
6684 6115
6685 if (RD_HARPOON(p_port+hp_scsisig) & p_data_bit) 6116 if (RD_HARPOON(p_port + hp_scsisig) & p_data_bit)
6686 6117
6687 i = 0; 6118 i = 0;
6688 6119
6689 else 6120 else
6690 6121
6691 i++; 6122 i++;
6692 6123
6693 } 6124 }
6694} 6125}
6695 6126
6696
6697/*--------------------------------------------------------------------- 6127/*---------------------------------------------------------------------
6698 * 6128 *
6699 * Function: FPT_scvalq 6129 * Function: FPT_scvalq
@@ -6702,23 +6132,22 @@ static void FPT_scwiros(ULONG p_port, UCHAR p_data_bit)
6702 * 6132 *
6703 *---------------------------------------------------------------------*/ 6133 *---------------------------------------------------------------------*/
6704 6134
6705static UCHAR FPT_scvalq(UCHAR p_quintet) 6135static unsigned char FPT_scvalq(unsigned char p_quintet)
6706{ 6136{
6707 UCHAR count; 6137 unsigned char count;
6708 6138
6709 for (count=1; count < 0x08; count<<=1) { 6139 for (count = 1; count < 0x08; count <<= 1) {
6710 if (!(p_quintet & count)) 6140 if (!(p_quintet & count))
6711 p_quintet -= 0x80; 6141 p_quintet -= 0x80;
6712 } 6142 }
6713 6143
6714 if (p_quintet & 0x18) 6144 if (p_quintet & 0x18)
6715 return(0); 6145 return 0;
6716 6146
6717 else 6147 else
6718 return(1); 6148 return 1;
6719} 6149}
6720 6150
6721
6722/*--------------------------------------------------------------------- 6151/*---------------------------------------------------------------------
6723 * 6152 *
6724 * Function: FPT_scsell 6153 * Function: FPT_scsell
@@ -6729,75 +6158,78 @@ static UCHAR FPT_scvalq(UCHAR p_quintet)
6729 * 6158 *
6730 *---------------------------------------------------------------------*/ 6159 *---------------------------------------------------------------------*/
6731 6160
6732static UCHAR FPT_scsell(ULONG p_port, UCHAR targ_id) 6161static unsigned char FPT_scsell(unsigned long p_port, unsigned char targ_id)
6733{ 6162{
6734 ULONG i; 6163 unsigned long i;
6735
6736 WR_HARPOON(p_port+hp_page_ctrl,
6737 (RD_HARPOON(p_port+hp_page_ctrl) | G_INT_DISABLE));
6738 6164
6739 ARAM_ACCESS(p_port); 6165 WR_HARPOON(p_port + hp_page_ctrl,
6166 (RD_HARPOON(p_port + hp_page_ctrl) | G_INT_DISABLE));
6740 6167
6741 WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) | SCAM_TIMER)); 6168 ARAM_ACCESS(p_port);
6742 WR_HARPOON(p_port+hp_seltimeout,TO_4ms);
6743 6169
6170 WR_HARPOON(p_port + hp_addstat,
6171 (RD_HARPOON(p_port + hp_addstat) | SCAM_TIMER));
6172 WR_HARPOON(p_port + hp_seltimeout, TO_4ms);
6744 6173
6745 for (i = p_port+CMD_STRT; i < p_port+CMD_STRT+12; i+=2) { 6174 for (i = p_port + CMD_STRT; i < p_port + CMD_STRT + 12; i += 2) {
6746 WRW_HARPOON(i, (MPM_OP+ACOMMAND)); 6175 WRW_HARPOON(i, (MPM_OP + ACOMMAND));
6747 } 6176 }
6748 WRW_HARPOON(i, (BRH_OP+ALWAYS+ NP)); 6177 WRW_HARPOON(i, (BRH_OP + ALWAYS + NP));
6749
6750 WRW_HARPOON((p_port+hp_intstat),
6751 (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
6752 6178
6753 WR_HARPOON(p_port+hp_select_id, targ_id); 6179 WRW_HARPOON((p_port + hp_intstat),
6180 (RESET | TIMEOUT | SEL | BUS_FREE | AUTO_INT));
6754 6181
6755 WR_HARPOON(p_port+hp_portctrl_0, SCSI_PORT); 6182 WR_HARPOON(p_port + hp_select_id, targ_id);
6756 WR_HARPOON(p_port+hp_autostart_3, (SELECT | CMD_ONLY_STRT));
6757 WR_HARPOON(p_port+hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
6758 6183
6184 WR_HARPOON(p_port + hp_portctrl_0, SCSI_PORT);
6185 WR_HARPOON(p_port + hp_autostart_3, (SELECT | CMD_ONLY_STRT));
6186 WR_HARPOON(p_port + hp_scsictrl_0, (SEL_TAR | ENA_RESEL));
6759 6187
6760 while (!(RDW_HARPOON((p_port+hp_intstat)) & 6188 while (!(RDW_HARPOON((p_port + hp_intstat)) &
6761 (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {} 6189 (RESET | PROG_HLT | TIMEOUT | AUTO_INT))) {
6190 }
6762 6191
6763 if (RDW_HARPOON((p_port+hp_intstat)) & RESET) 6192 if (RDW_HARPOON((p_port + hp_intstat)) & RESET)
6764 FPT_Wait(p_port, TO_250ms); 6193 FPT_Wait(p_port, TO_250ms);
6765 6194
6766 DISABLE_AUTO(p_port); 6195 DISABLE_AUTO(p_port);
6767 6196
6768 WR_HARPOON(p_port+hp_addstat,(RD_HARPOON(p_port+hp_addstat) & ~SCAM_TIMER)); 6197 WR_HARPOON(p_port + hp_addstat,
6769 WR_HARPOON(p_port+hp_seltimeout,TO_290ms); 6198 (RD_HARPOON(p_port + hp_addstat) & ~SCAM_TIMER));
6199 WR_HARPOON(p_port + hp_seltimeout, TO_290ms);
6770 6200
6771 SGRAM_ACCESS(p_port); 6201 SGRAM_ACCESS(p_port);
6772 6202
6773 if (RDW_HARPOON((p_port+hp_intstat)) & (RESET | TIMEOUT) ) { 6203 if (RDW_HARPOON((p_port + hp_intstat)) & (RESET | TIMEOUT)) {
6774 6204
6775 WRW_HARPOON((p_port+hp_intstat), 6205 WRW_HARPOON((p_port + hp_intstat),
6776 (RESET | TIMEOUT | SEL | BUS_FREE | PHASE)); 6206 (RESET | TIMEOUT | SEL | BUS_FREE | PHASE));
6777 6207
6778 WR_HARPOON(p_port+hp_page_ctrl, 6208 WR_HARPOON(p_port + hp_page_ctrl,
6779 (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)); 6209 (RD_HARPOON(p_port + hp_page_ctrl) &
6210 ~G_INT_DISABLE));
6780 6211
6781 return(0); /*No legacy device */ 6212 return 0; /*No legacy device */
6782 } 6213 }
6783 6214
6784 else { 6215 else {
6785 6216
6786 while(!(RDW_HARPOON((p_port+hp_intstat)) & BUS_FREE)) { 6217 while (!(RDW_HARPOON((p_port + hp_intstat)) & BUS_FREE)) {
6787 if (RD_HARPOON(p_port+hp_scsisig) & SCSI_REQ) 6218 if (RD_HARPOON(p_port + hp_scsisig) & SCSI_REQ) {
6788 { 6219 WR_HARPOON(p_port + hp_scsisig,
6789 WR_HARPOON(p_port+hp_scsisig, (SCSI_ACK + S_ILL_PH)); 6220 (SCSI_ACK + S_ILL_PH));
6790 ACCEPT_MSG(p_port); 6221 ACCEPT_MSG(p_port);
6791 } 6222 }
6792 } 6223 }
6793 6224
6794 WRW_HARPOON((p_port+hp_intstat), CLR_ALL_INT_1); 6225 WRW_HARPOON((p_port + hp_intstat), CLR_ALL_INT_1);
6795 6226
6796 WR_HARPOON(p_port+hp_page_ctrl, 6227 WR_HARPOON(p_port + hp_page_ctrl,
6797 (RD_HARPOON(p_port+hp_page_ctrl) & ~G_INT_DISABLE)); 6228 (RD_HARPOON(p_port + hp_page_ctrl) &
6229 ~G_INT_DISABLE));
6798 6230
6799 return(1); /*Found one of them oldies! */ 6231 return 1; /*Found one of them oldies! */
6800 } 6232 }
6801} 6233}
6802 6234
6803/*--------------------------------------------------------------------- 6235/*---------------------------------------------------------------------
@@ -6808,12 +6240,12 @@ static UCHAR FPT_scsell(ULONG p_port, UCHAR targ_id)
6808 * 6240 *
6809 *---------------------------------------------------------------------*/ 6241 *---------------------------------------------------------------------*/
6810 6242
6811static void FPT_scwtsel(ULONG p_port) 6243static void FPT_scwtsel(unsigned long p_port)
6812{ 6244{
6813 while(!(RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL)) {} 6245 while (!(RDW_HARPOON((p_port + hp_intstat)) & SCAM_SEL)) {
6246 }
6814} 6247}
6815 6248
6816
6817/*--------------------------------------------------------------------- 6249/*---------------------------------------------------------------------
6818 * 6250 *
6819 * Function: FPT_inisci 6251 * Function: FPT_inisci
@@ -6822,57 +6254,64 @@ static void FPT_scwtsel(ULONG p_port)
6822 * 6254 *
6823 *---------------------------------------------------------------------*/ 6255 *---------------------------------------------------------------------*/
6824 6256
6825static void FPT_inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id) 6257static void FPT_inisci(unsigned char p_card, unsigned long p_port,
6258 unsigned char p_our_id)
6826{ 6259{
6827 UCHAR i,k,max_id; 6260 unsigned char i, k, max_id;
6828 USHORT ee_data; 6261 unsigned short ee_data;
6829 PNVRamInfo pCurrNvRam; 6262 struct nvram_info *pCurrNvRam;
6830 6263
6831 pCurrNvRam = FPT_BL_Card[p_card].pNvRamInfo; 6264 pCurrNvRam = FPT_BL_Card[p_card].pNvRamInfo;
6832 6265
6833 if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD) 6266 if (RD_HARPOON(p_port + hp_page_ctrl) & NARROW_SCSI_CARD)
6834 max_id = 0x08; 6267 max_id = 0x08;
6835 6268
6836 else 6269 else
6837 max_id = 0x10; 6270 max_id = 0x10;
6838 6271
6839 if(pCurrNvRam){ 6272 if (pCurrNvRam) {
6840 for(i = 0; i < max_id; i++){ 6273 for (i = 0; i < max_id; i++) {
6841 6274
6842 for(k = 0; k < 4; k++) 6275 for (k = 0; k < 4; k++)
6843 FPT_scamInfo[i].id_string[k] = pCurrNvRam->niScamTbl[i][k]; 6276 FPT_scamInfo[i].id_string[k] =
6844 for(k = 4; k < ID_STRING_LENGTH; k++) 6277 pCurrNvRam->niScamTbl[i][k];
6845 FPT_scamInfo[i].id_string[k] = (UCHAR) 0x00; 6278 for (k = 4; k < ID_STRING_LENGTH; k++)
6279 FPT_scamInfo[i].id_string[k] =
6280 (unsigned char)0x00;
6846 6281
6847 if(FPT_scamInfo[i].id_string[0] == 0x00) 6282 if (FPT_scamInfo[i].id_string[0] == 0x00)
6848 FPT_scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */ 6283 FPT_scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
6849 else 6284 else
6850 FPT_scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */ 6285 FPT_scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
6851 6286
6852 } 6287 }
6853 }else { 6288 } else {
6854 for (i=0; i < max_id; i++) 6289 for (i = 0; i < max_id; i++) {
6855 { 6290 for (k = 0; k < ID_STRING_LENGTH; k += 2) {
6856 for (k=0; k < ID_STRING_LENGTH; k+=2) 6291 ee_data =
6857 { 6292 FPT_utilEERead(p_port,
6858 ee_data = FPT_utilEERead(p_port, (USHORT)((EE_SCAMBASE/2) + 6293 (unsigned
6859 (USHORT) (i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2))); 6294 short)((EE_SCAMBASE / 2) +
6860 FPT_scamInfo[i].id_string[k] = (UCHAR) ee_data; 6295 (unsigned short)(i *
6861 ee_data >>= 8; 6296 ((unsigned short)ID_STRING_LENGTH / 2)) + (unsigned short)(k / 2)));
6862 FPT_scamInfo[i].id_string[k+1] = (UCHAR) ee_data; 6297 FPT_scamInfo[i].id_string[k] =
6863 } 6298 (unsigned char)ee_data;
6299 ee_data >>= 8;
6300 FPT_scamInfo[i].id_string[k + 1] =
6301 (unsigned char)ee_data;
6302 }
6864 6303
6865 if ((FPT_scamInfo[i].id_string[0] == 0x00) || 6304 if ((FPT_scamInfo[i].id_string[0] == 0x00) ||
6866 (FPT_scamInfo[i].id_string[0] == 0xFF)) 6305 (FPT_scamInfo[i].id_string[0] == 0xFF))
6867 6306
6868 FPT_scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */ 6307 FPT_scamInfo[i].state = ID_UNUSED; /*Default to unused ID. */
6869 6308
6870 else 6309 else
6871 FPT_scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */ 6310 FPT_scamInfo[i].state = ID_UNASSIGNED; /*Default to unassigned ID. */
6872 6311
6873 } 6312 }
6874 } 6313 }
6875 for(k = 0; k < ID_STRING_LENGTH; k++) 6314 for (k = 0; k < ID_STRING_LENGTH; k++)
6876 FPT_scamInfo[p_our_id].id_string[k] = FPT_scamHAString[k]; 6315 FPT_scamInfo[p_our_id].id_string[k] = FPT_scamHAString[k];
6877 6316
6878} 6317}
@@ -6886,127 +6325,114 @@ static void FPT_inisci(UCHAR p_card, ULONG p_port, UCHAR p_our_id)
6886 * 6325 *
6887 *---------------------------------------------------------------------*/ 6326 *---------------------------------------------------------------------*/
6888 6327
6889static UCHAR FPT_scmachid(UCHAR p_card, UCHAR p_id_string[]) 6328static unsigned char FPT_scmachid(unsigned char p_card,
6329 unsigned char p_id_string[])
6890{ 6330{
6891 6331
6892 UCHAR i,k,match; 6332 unsigned char i, k, match;
6893
6894 6333
6895 for (i=0; i < MAX_SCSI_TAR; i++) { 6334 for (i = 0; i < MAX_SCSI_TAR; i++) {
6896 6335
6897 match = 1; 6336 match = 1;
6898
6899 for (k=0; k < ID_STRING_LENGTH; k++)
6900 {
6901 if (p_id_string[k] != FPT_scamInfo[i].id_string[k])
6902 match = 0;
6903 }
6904
6905 if (match)
6906 {
6907 FPT_scamInfo[i].state = ID_ASSIGNED;
6908 return(i);
6909 }
6910
6911 }
6912 6337
6338 for (k = 0; k < ID_STRING_LENGTH; k++) {
6339 if (p_id_string[k] != FPT_scamInfo[i].id_string[k])
6340 match = 0;
6341 }
6913 6342
6343 if (match) {
6344 FPT_scamInfo[i].state = ID_ASSIGNED;
6345 return i;
6346 }
6914 6347
6915 if (p_id_string[0] & BIT(5)) 6348 }
6916 i = 8;
6917 else
6918 i = MAX_SCSI_TAR;
6919 6349
6920 if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04)) 6350 if (p_id_string[0] & BIT(5))
6921 match = p_id_string[1] & (UCHAR) 0x1F; 6351 i = 8;
6922 else 6352 else
6923 match = 7; 6353 i = MAX_SCSI_TAR;
6924 6354
6925 while (i > 0) 6355 if (((p_id_string[0] & 0x06) == 0x02)
6926 { 6356 || ((p_id_string[0] & 0x06) == 0x04))
6927 i--; 6357 match = p_id_string[1] & (unsigned char)0x1F;
6358 else
6359 match = 7;
6928 6360
6929 if (FPT_scamInfo[match].state == ID_UNUSED) 6361 while (i > 0) {
6930 { 6362 i--;
6931 for (k=0; k < ID_STRING_LENGTH; k++)
6932 {
6933 FPT_scamInfo[match].id_string[k] = p_id_string[k];
6934 }
6935 6363
6936 FPT_scamInfo[match].state = ID_ASSIGNED; 6364 if (FPT_scamInfo[match].state == ID_UNUSED) {
6365 for (k = 0; k < ID_STRING_LENGTH; k++) {
6366 FPT_scamInfo[match].id_string[k] =
6367 p_id_string[k];
6368 }
6937 6369
6938 if(FPT_BL_Card[p_card].pNvRamInfo == NULL) 6370 FPT_scamInfo[match].state = ID_ASSIGNED;
6939 FPT_BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM;
6940 return(match);
6941 6371
6942 } 6372 if (FPT_BL_Card[p_card].pNvRamInfo == NULL)
6373 FPT_BL_Card[p_card].globalFlags |=
6374 F_UPDATE_EEPROM;
6375 return match;
6943 6376
6377 }
6944 6378
6945 match--; 6379 match--;
6946 6380
6947 if (match == 0xFF) 6381 if (match == 0xFF) {
6948 { 6382 if (p_id_string[0] & BIT(5))
6949 if (p_id_string[0] & BIT(5)) 6383 match = 7;
6950 match = 7; 6384 else
6951 else 6385 match = MAX_SCSI_TAR - 1;
6952 match = MAX_SCSI_TAR-1; 6386 }
6953 } 6387 }
6954 }
6955
6956 6388
6389 if (p_id_string[0] & BIT(7)) {
6390 return CLR_PRIORITY;
6391 }
6957 6392
6958 if (p_id_string[0] & BIT(7)) 6393 if (p_id_string[0] & BIT(5))
6959 { 6394 i = 8;
6960 return(CLR_PRIORITY); 6395 else
6961 } 6396 i = MAX_SCSI_TAR;
6962
6963
6964 if (p_id_string[0] & BIT(5))
6965 i = 8;
6966 else
6967 i = MAX_SCSI_TAR;
6968
6969 if (((p_id_string[0] & 0x06) == 0x02) || ((p_id_string[0] & 0x06) == 0x04))
6970 match = p_id_string[1] & (UCHAR) 0x1F;
6971 else
6972 match = 7;
6973 6397
6974 while (i > 0) 6398 if (((p_id_string[0] & 0x06) == 0x02)
6975 { 6399 || ((p_id_string[0] & 0x06) == 0x04))
6400 match = p_id_string[1] & (unsigned char)0x1F;
6401 else
6402 match = 7;
6976 6403
6977 i--; 6404 while (i > 0) {
6978 6405
6979 if (FPT_scamInfo[match].state == ID_UNASSIGNED) 6406 i--;
6980 {
6981 for (k=0; k < ID_STRING_LENGTH; k++)
6982 {
6983 FPT_scamInfo[match].id_string[k] = p_id_string[k];
6984 }
6985 6407
6986 FPT_scamInfo[match].id_string[0] |= BIT(7); 6408 if (FPT_scamInfo[match].state == ID_UNASSIGNED) {
6987 FPT_scamInfo[match].state = ID_ASSIGNED; 6409 for (k = 0; k < ID_STRING_LENGTH; k++) {
6988 if(FPT_BL_Card[p_card].pNvRamInfo == NULL) 6410 FPT_scamInfo[match].id_string[k] =
6989 FPT_BL_Card[p_card].globalFlags |= F_UPDATE_EEPROM; 6411 p_id_string[k];
6990 return(match); 6412 }
6991 6413
6992 } 6414 FPT_scamInfo[match].id_string[0] |= BIT(7);
6415 FPT_scamInfo[match].state = ID_ASSIGNED;
6416 if (FPT_BL_Card[p_card].pNvRamInfo == NULL)
6417 FPT_BL_Card[p_card].globalFlags |=
6418 F_UPDATE_EEPROM;
6419 return match;
6993 6420
6421 }
6994 6422
6995 match--; 6423 match--;
6996 6424
6997 if (match == 0xFF) 6425 if (match == 0xFF) {
6998 { 6426 if (p_id_string[0] & BIT(5))
6999 if (p_id_string[0] & BIT(5)) 6427 match = 7;
7000 match = 7; 6428 else
7001 else 6429 match = MAX_SCSI_TAR - 1;
7002 match = MAX_SCSI_TAR-1; 6430 }
7003 } 6431 }
7004 }
7005 6432
7006 return(NO_ID_AVAIL); 6433 return NO_ID_AVAIL;
7007} 6434}
7008 6435
7009
7010/*--------------------------------------------------------------------- 6436/*---------------------------------------------------------------------
7011 * 6437 *
7012 * Function: FPT_scsavdi 6438 * Function: FPT_scsavdi
@@ -7015,45 +6441,41 @@ static UCHAR FPT_scmachid(UCHAR p_card, UCHAR p_id_string[])
7015 * 6441 *
7016 *---------------------------------------------------------------------*/ 6442 *---------------------------------------------------------------------*/
7017 6443
7018static void FPT_scsavdi(UCHAR p_card, ULONG p_port) 6444static void FPT_scsavdi(unsigned char p_card, unsigned long p_port)
7019{ 6445{
7020 UCHAR i,k,max_id; 6446 unsigned char i, k, max_id;
7021 USHORT ee_data,sum_data; 6447 unsigned short ee_data, sum_data;
7022
7023 6448
7024 sum_data = 0x0000; 6449 sum_data = 0x0000;
7025 6450
7026 for (i = 1; i < EE_SCAMBASE/2; i++) 6451 for (i = 1; i < EE_SCAMBASE / 2; i++) {
7027 { 6452 sum_data += FPT_utilEERead(p_port, i);
7028 sum_data += FPT_utilEERead(p_port, i); 6453 }
7029 }
7030
7031
7032 FPT_utilEEWriteOnOff(p_port,1); /* Enable write access to the EEPROM */
7033
7034 if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD)
7035 max_id = 0x08;
7036
7037 else
7038 max_id = 0x10;
7039 6454
7040 for (i=0; i < max_id; i++) 6455 FPT_utilEEWriteOnOff(p_port, 1); /* Enable write access to the EEPROM */
7041 {
7042 6456
7043 for (k=0; k < ID_STRING_LENGTH; k+=2) 6457 if (RD_HARPOON(p_port + hp_page_ctrl) & NARROW_SCSI_CARD)
7044 { 6458 max_id = 0x08;
7045 ee_data = FPT_scamInfo[i].id_string[k+1];
7046 ee_data <<= 8;
7047 ee_data |= FPT_scamInfo[i].id_string[k];
7048 sum_data += ee_data;
7049 FPT_utilEEWrite(p_port, ee_data, (USHORT)((EE_SCAMBASE/2) +
7050 (USHORT)(i*((USHORT)ID_STRING_LENGTH/2)) + (USHORT)(k/2)));
7051 }
7052 }
7053 6459
6460 else
6461 max_id = 0x10;
6462
6463 for (i = 0; i < max_id; i++) {
6464
6465 for (k = 0; k < ID_STRING_LENGTH; k += 2) {
6466 ee_data = FPT_scamInfo[i].id_string[k + 1];
6467 ee_data <<= 8;
6468 ee_data |= FPT_scamInfo[i].id_string[k];
6469 sum_data += ee_data;
6470 FPT_utilEEWrite(p_port, ee_data,
6471 (unsigned short)((EE_SCAMBASE / 2) +
6472 (unsigned short)(i *
6473 ((unsigned short)ID_STRING_LENGTH / 2)) + (unsigned short)(k / 2)));
6474 }
6475 }
7054 6476
7055 FPT_utilEEWrite(p_port, sum_data, EEPROM_CHECK_SUM/2); 6477 FPT_utilEEWrite(p_port, sum_data, EEPROM_CHECK_SUM / 2);
7056 FPT_utilEEWriteOnOff(p_port,0); /* Turn off write access */ 6478 FPT_utilEEWriteOnOff(p_port, 0); /* Turn off write access */
7057} 6479}
7058 6480
7059/*--------------------------------------------------------------------- 6481/*---------------------------------------------------------------------
@@ -7064,48 +6486,47 @@ static void FPT_scsavdi(UCHAR p_card, ULONG p_port)
7064 * 6486 *
7065 *---------------------------------------------------------------------*/ 6487 *---------------------------------------------------------------------*/
7066 6488
7067static void FPT_XbowInit(ULONG port, UCHAR ScamFlg) 6489static void FPT_XbowInit(unsigned long port, unsigned char ScamFlg)
7068{ 6490{
7069UCHAR i; 6491 unsigned char i;
7070 6492
7071 i = RD_HARPOON(port+hp_page_ctrl); 6493 i = RD_HARPOON(port + hp_page_ctrl);
7072 WR_HARPOON(port+hp_page_ctrl, (UCHAR) (i | G_INT_DISABLE)); 6494 WR_HARPOON(port + hp_page_ctrl, (unsigned char)(i | G_INT_DISABLE));
7073 6495
7074 WR_HARPOON(port+hp_scsireset,0x00); 6496 WR_HARPOON(port + hp_scsireset, 0x00);
7075 WR_HARPOON(port+hp_portctrl_1,HOST_MODE8); 6497 WR_HARPOON(port + hp_portctrl_1, HOST_MODE8);
7076 6498
7077 WR_HARPOON(port+hp_scsireset,(DMA_RESET | HPSCSI_RESET | PROG_RESET | \ 6499 WR_HARPOON(port + hp_scsireset, (DMA_RESET | HPSCSI_RESET | PROG_RESET |
7078 FIFO_CLR)); 6500 FIFO_CLR));
7079 6501
7080 WR_HARPOON(port+hp_scsireset,SCSI_INI); 6502 WR_HARPOON(port + hp_scsireset, SCSI_INI);
7081 6503
7082 WR_HARPOON(port+hp_clkctrl_0,CLKCTRL_DEFAULT); 6504 WR_HARPOON(port + hp_clkctrl_0, CLKCTRL_DEFAULT);
7083 6505
7084 WR_HARPOON(port+hp_scsisig,0x00); /* Clear any signals we might */ 6506 WR_HARPOON(port + hp_scsisig, 0x00); /* Clear any signals we might */
7085 WR_HARPOON(port+hp_scsictrl_0,ENA_SCAM_SEL); 6507 WR_HARPOON(port + hp_scsictrl_0, ENA_SCAM_SEL);
7086 6508
7087 WRW_HARPOON((port+hp_intstat), CLR_ALL_INT); 6509 WRW_HARPOON((port + hp_intstat), CLR_ALL_INT);
7088 6510
7089 FPT_default_intena = RESET | RSEL | PROG_HLT | TIMEOUT | 6511 FPT_default_intena = RESET | RSEL | PROG_HLT | TIMEOUT |
7090 BUS_FREE | XFER_CNT_0 | AUTO_INT; 6512 BUS_FREE | XFER_CNT_0 | AUTO_INT;
7091 6513
7092 if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2)) 6514 if ((ScamFlg & SCAM_ENABLED) && (ScamFlg & SCAM_LEVEL2))
7093 FPT_default_intena |= SCAM_SEL; 6515 FPT_default_intena |= SCAM_SEL;
7094 6516
7095 WRW_HARPOON((port+hp_intena), FPT_default_intena); 6517 WRW_HARPOON((port + hp_intena), FPT_default_intena);
7096 6518
7097 WR_HARPOON(port+hp_seltimeout,TO_290ms); 6519 WR_HARPOON(port + hp_seltimeout, TO_290ms);
7098 6520
7099 /* Turn on SCSI_MODE8 for narrow cards to fix the 6521 /* Turn on SCSI_MODE8 for narrow cards to fix the
7100 strapping issue with the DUAL CHANNEL card */ 6522 strapping issue with the DUAL CHANNEL card */
7101 if (RD_HARPOON(port+hp_page_ctrl) & NARROW_SCSI_CARD) 6523 if (RD_HARPOON(port + hp_page_ctrl) & NARROW_SCSI_CARD)
7102 WR_HARPOON(port+hp_addstat,SCSI_MODE8); 6524 WR_HARPOON(port + hp_addstat, SCSI_MODE8);
7103 6525
7104 WR_HARPOON(port+hp_page_ctrl, i); 6526 WR_HARPOON(port + hp_page_ctrl, i);
7105 6527
7106} 6528}
7107 6529
7108
7109/*--------------------------------------------------------------------- 6530/*---------------------------------------------------------------------
7110 * 6531 *
7111 * Function: FPT_BusMasterInit 6532 * Function: FPT_BusMasterInit
@@ -7114,28 +6535,24 @@ UCHAR i;
7114 * 6535 *
7115 *---------------------------------------------------------------------*/ 6536 *---------------------------------------------------------------------*/
7116 6537
7117static void FPT_BusMasterInit(ULONG p_port) 6538static void FPT_BusMasterInit(unsigned long p_port)
7118{ 6539{
7119 6540
6541 WR_HARPOON(p_port + hp_sys_ctrl, DRVR_RST);
6542 WR_HARPOON(p_port + hp_sys_ctrl, 0x00);
7120 6543
7121 WR_HARPOON(p_port+hp_sys_ctrl, DRVR_RST); 6544 WR_HARPOON(p_port + hp_host_blk_cnt, XFER_BLK64);
7122 WR_HARPOON(p_port+hp_sys_ctrl, 0x00);
7123
7124 WR_HARPOON(p_port+hp_host_blk_cnt, XFER_BLK64);
7125 6545
6546 WR_HARPOON(p_port + hp_bm_ctrl, (BMCTRL_DEFAULT));
7126 6547
7127 WR_HARPOON(p_port+hp_bm_ctrl, (BMCTRL_DEFAULT)); 6548 WR_HARPOON(p_port + hp_ee_ctrl, (SCSI_TERM_ENA_H));
7128 6549
7129 WR_HARPOON(p_port+hp_ee_ctrl, (SCSI_TERM_ENA_H)); 6550 RD_HARPOON(p_port + hp_int_status); /*Clear interrupts. */
7130 6551 WR_HARPOON(p_port + hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
7131 6552 WR_HARPOON(p_port + hp_page_ctrl, (RD_HARPOON(p_port + hp_page_ctrl) &
7132 RD_HARPOON(p_port+hp_int_status); /*Clear interrupts. */ 6553 ~SCATTER_EN));
7133 WR_HARPOON(p_port+hp_int_mask, (INT_CMD_COMPL | SCSI_INTERRUPT));
7134 WR_HARPOON(p_port+hp_page_ctrl, (RD_HARPOON(p_port+hp_page_ctrl) &
7135 ~SCATTER_EN));
7136} 6554}
7137 6555
7138
7139/*--------------------------------------------------------------------- 6556/*---------------------------------------------------------------------
7140 * 6557 *
7141 * Function: FPT_DiagEEPROM 6558 * Function: FPT_DiagEEPROM
@@ -7145,158 +6562,153 @@ static void FPT_BusMasterInit(ULONG p_port)
7145 * 6562 *
7146 *---------------------------------------------------------------------*/ 6563 *---------------------------------------------------------------------*/
7147 6564
7148static void FPT_DiagEEPROM(ULONG p_port) 6565static void FPT_DiagEEPROM(unsigned long p_port)
7149{ 6566{
7150 USHORT index,temp,max_wd_cnt; 6567 unsigned short index, temp, max_wd_cnt;
7151 6568
7152 if (RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD) 6569 if (RD_HARPOON(p_port + hp_page_ctrl) & NARROW_SCSI_CARD)
7153 max_wd_cnt = EEPROM_WD_CNT; 6570 max_wd_cnt = EEPROM_WD_CNT;
7154 else 6571 else
7155 max_wd_cnt = EEPROM_WD_CNT * 2; 6572 max_wd_cnt = EEPROM_WD_CNT * 2;
7156
7157 temp = FPT_utilEERead(p_port, FW_SIGNATURE/2);
7158 6573
7159 if (temp == 0x4641) { 6574 temp = FPT_utilEERead(p_port, FW_SIGNATURE / 2);
7160 6575
7161 for (index = 2; index < max_wd_cnt; index++) { 6576 if (temp == 0x4641) {
7162 6577
7163 temp += FPT_utilEERead(p_port, index); 6578 for (index = 2; index < max_wd_cnt; index++) {
7164 6579
7165 } 6580 temp += FPT_utilEERead(p_port, index);
7166 6581
7167 if (temp == FPT_utilEERead(p_port, EEPROM_CHECK_SUM/2)) { 6582 }
7168 6583
7169 return; /*EEPROM is Okay so return now! */ 6584 if (temp == FPT_utilEERead(p_port, EEPROM_CHECK_SUM / 2)) {
7170 }
7171 }
7172 6585
6586 return; /*EEPROM is Okay so return now! */
6587 }
6588 }
7173 6589
7174 FPT_utilEEWriteOnOff(p_port,(UCHAR)1); 6590 FPT_utilEEWriteOnOff(p_port, (unsigned char)1);
7175 6591
7176 for (index = 0; index < max_wd_cnt; index++) { 6592 for (index = 0; index < max_wd_cnt; index++) {
7177 6593
7178 FPT_utilEEWrite(p_port, 0x0000, index); 6594 FPT_utilEEWrite(p_port, 0x0000, index);
7179 } 6595 }
7180 6596
7181 temp = 0; 6597 temp = 0;
7182 6598
7183 FPT_utilEEWrite(p_port, 0x4641, FW_SIGNATURE/2); 6599 FPT_utilEEWrite(p_port, 0x4641, FW_SIGNATURE / 2);
7184 temp += 0x4641; 6600 temp += 0x4641;
7185 FPT_utilEEWrite(p_port, 0x3920, MODEL_NUMB_0/2); 6601 FPT_utilEEWrite(p_port, 0x3920, MODEL_NUMB_0 / 2);
7186 temp += 0x3920; 6602 temp += 0x3920;
7187 FPT_utilEEWrite(p_port, 0x3033, MODEL_NUMB_2/2); 6603 FPT_utilEEWrite(p_port, 0x3033, MODEL_NUMB_2 / 2);
7188 temp += 0x3033; 6604 temp += 0x3033;
7189 FPT_utilEEWrite(p_port, 0x2020, MODEL_NUMB_4/2); 6605 FPT_utilEEWrite(p_port, 0x2020, MODEL_NUMB_4 / 2);
7190 temp += 0x2020; 6606 temp += 0x2020;
7191 FPT_utilEEWrite(p_port, 0x70D3, SYSTEM_CONFIG/2); 6607 FPT_utilEEWrite(p_port, 0x70D3, SYSTEM_CONFIG / 2);
7192 temp += 0x70D3; 6608 temp += 0x70D3;
7193 FPT_utilEEWrite(p_port, 0x0010, BIOS_CONFIG/2); 6609 FPT_utilEEWrite(p_port, 0x0010, BIOS_CONFIG / 2);
7194 temp += 0x0010; 6610 temp += 0x0010;
7195 FPT_utilEEWrite(p_port, 0x0003, SCAM_CONFIG/2); 6611 FPT_utilEEWrite(p_port, 0x0003, SCAM_CONFIG / 2);
7196 temp += 0x0003; 6612 temp += 0x0003;
7197 FPT_utilEEWrite(p_port, 0x0007, ADAPTER_SCSI_ID/2); 6613 FPT_utilEEWrite(p_port, 0x0007, ADAPTER_SCSI_ID / 2);
7198 temp += 0x0007; 6614 temp += 0x0007;
7199 6615
7200 FPT_utilEEWrite(p_port, 0x0000, IGNORE_B_SCAN/2); 6616 FPT_utilEEWrite(p_port, 0x0000, IGNORE_B_SCAN / 2);
7201 temp += 0x0000; 6617 temp += 0x0000;
7202 FPT_utilEEWrite(p_port, 0x0000, SEND_START_ENA/2); 6618 FPT_utilEEWrite(p_port, 0x0000, SEND_START_ENA / 2);
7203 temp += 0x0000; 6619 temp += 0x0000;
7204 FPT_utilEEWrite(p_port, 0x0000, DEVICE_ENABLE/2); 6620 FPT_utilEEWrite(p_port, 0x0000, DEVICE_ENABLE / 2);
7205 temp += 0x0000; 6621 temp += 0x0000;
7206 6622
7207 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL01/2); 6623 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL01 / 2);
7208 temp += 0x4242; 6624 temp += 0x4242;
7209 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL23/2); 6625 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL23 / 2);
7210 temp += 0x4242; 6626 temp += 0x4242;
7211 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL45/2); 6627 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL45 / 2);
7212 temp += 0x4242; 6628 temp += 0x4242;
7213 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL67/2); 6629 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL67 / 2);
7214 temp += 0x4242; 6630 temp += 0x4242;
7215 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL89/2); 6631 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBL89 / 2);
7216 temp += 0x4242; 6632 temp += 0x4242;
7217 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLab/2); 6633 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLab / 2);
7218 temp += 0x4242; 6634 temp += 0x4242;
7219 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLcd/2); 6635 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLcd / 2);
7220 temp += 0x4242; 6636 temp += 0x4242;
7221 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLef/2); 6637 FPT_utilEEWrite(p_port, 0x4242, SYNC_RATE_TBLef / 2);
7222 temp += 0x4242; 6638 temp += 0x4242;
7223 6639
7224 6640 FPT_utilEEWrite(p_port, 0x6C46, 64 / 2); /*PRODUCT ID */
7225 FPT_utilEEWrite(p_port, 0x6C46, 64/2); /*PRODUCT ID */ 6641 temp += 0x6C46;
7226 temp += 0x6C46; 6642 FPT_utilEEWrite(p_port, 0x7361, 66 / 2); /* FlashPoint LT */
7227 FPT_utilEEWrite(p_port, 0x7361, 66/2); /* FlashPoint LT */ 6643 temp += 0x7361;
7228 temp += 0x7361; 6644 FPT_utilEEWrite(p_port, 0x5068, 68 / 2);
7229 FPT_utilEEWrite(p_port, 0x5068, 68/2); 6645 temp += 0x5068;
7230 temp += 0x5068; 6646 FPT_utilEEWrite(p_port, 0x696F, 70 / 2);
7231 FPT_utilEEWrite(p_port, 0x696F, 70/2); 6647 temp += 0x696F;
7232 temp += 0x696F; 6648 FPT_utilEEWrite(p_port, 0x746E, 72 / 2);
7233 FPT_utilEEWrite(p_port, 0x746E, 72/2); 6649 temp += 0x746E;
7234 temp += 0x746E; 6650 FPT_utilEEWrite(p_port, 0x4C20, 74 / 2);
7235 FPT_utilEEWrite(p_port, 0x4C20, 74/2); 6651 temp += 0x4C20;
7236 temp += 0x4C20; 6652 FPT_utilEEWrite(p_port, 0x2054, 76 / 2);
7237 FPT_utilEEWrite(p_port, 0x2054, 76/2); 6653 temp += 0x2054;
7238 temp += 0x2054; 6654 FPT_utilEEWrite(p_port, 0x2020, 78 / 2);
7239 FPT_utilEEWrite(p_port, 0x2020, 78/2); 6655 temp += 0x2020;
7240 temp += 0x2020; 6656
7241 6657 index = ((EE_SCAMBASE / 2) + (7 * 16));
7242 index = ((EE_SCAMBASE/2)+(7*16)); 6658 FPT_utilEEWrite(p_port, (0x0700 + TYPE_CODE0), index);
7243 FPT_utilEEWrite(p_port, (0x0700+TYPE_CODE0), index); 6659 temp += (0x0700 + TYPE_CODE0);
7244 temp += (0x0700+TYPE_CODE0); 6660 index++;
7245 index++; 6661 FPT_utilEEWrite(p_port, 0x5542, index); /*Vendor ID code */
7246 FPT_utilEEWrite(p_port, 0x5542, index); /*Vendor ID code */ 6662 temp += 0x5542; /* BUSLOGIC */
7247 temp += 0x5542; /* BUSLOGIC */ 6663 index++;
7248 index++; 6664 FPT_utilEEWrite(p_port, 0x4C53, index);
7249 FPT_utilEEWrite(p_port, 0x4C53, index); 6665 temp += 0x4C53;
7250 temp += 0x4C53; 6666 index++;
7251 index++; 6667 FPT_utilEEWrite(p_port, 0x474F, index);
7252 FPT_utilEEWrite(p_port, 0x474F, index); 6668 temp += 0x474F;
7253 temp += 0x474F; 6669 index++;
7254 index++; 6670 FPT_utilEEWrite(p_port, 0x4349, index);
7255 FPT_utilEEWrite(p_port, 0x4349, index); 6671 temp += 0x4349;
7256 temp += 0x4349; 6672 index++;
7257 index++; 6673 FPT_utilEEWrite(p_port, 0x5442, index); /*Vendor unique code */
7258 FPT_utilEEWrite(p_port, 0x5442, index); /*Vendor unique code */ 6674 temp += 0x5442; /* BT- 930 */
7259 temp += 0x5442; /* BT- 930 */ 6675 index++;
7260 index++; 6676 FPT_utilEEWrite(p_port, 0x202D, index);
7261 FPT_utilEEWrite(p_port, 0x202D, index); 6677 temp += 0x202D;
7262 temp += 0x202D; 6678 index++;
7263 index++; 6679 FPT_utilEEWrite(p_port, 0x3339, index);
7264 FPT_utilEEWrite(p_port, 0x3339, index); 6680 temp += 0x3339;
7265 temp += 0x3339; 6681 index++; /*Serial # */
7266 index++; /*Serial # */ 6682 FPT_utilEEWrite(p_port, 0x2030, index); /* 01234567 */
7267 FPT_utilEEWrite(p_port, 0x2030, index); /* 01234567 */ 6683 temp += 0x2030;
7268 temp += 0x2030; 6684 index++;
7269 index++; 6685 FPT_utilEEWrite(p_port, 0x5453, index);
7270 FPT_utilEEWrite(p_port, 0x5453, index); 6686 temp += 0x5453;
7271 temp += 0x5453; 6687 index++;
7272 index++; 6688 FPT_utilEEWrite(p_port, 0x5645, index);
7273 FPT_utilEEWrite(p_port, 0x5645, index); 6689 temp += 0x5645;
7274 temp += 0x5645; 6690 index++;
7275 index++; 6691 FPT_utilEEWrite(p_port, 0x2045, index);
7276 FPT_utilEEWrite(p_port, 0x2045, index); 6692 temp += 0x2045;
7277 temp += 0x2045; 6693 index++;
7278 index++; 6694 FPT_utilEEWrite(p_port, 0x202F, index);
7279 FPT_utilEEWrite(p_port, 0x202F, index); 6695 temp += 0x202F;
7280 temp += 0x202F; 6696 index++;
7281 index++; 6697 FPT_utilEEWrite(p_port, 0x4F4A, index);
7282 FPT_utilEEWrite(p_port, 0x4F4A, index); 6698 temp += 0x4F4A;
7283 temp += 0x4F4A; 6699 index++;
7284 index++; 6700 FPT_utilEEWrite(p_port, 0x204E, index);
7285 FPT_utilEEWrite(p_port, 0x204E, index); 6701 temp += 0x204E;
7286 temp += 0x204E; 6702 index++;
7287 index++; 6703 FPT_utilEEWrite(p_port, 0x3539, index);
7288 FPT_utilEEWrite(p_port, 0x3539, index); 6704 temp += 0x3539;
7289 temp += 0x3539; 6705
7290 6706 FPT_utilEEWrite(p_port, temp, EEPROM_CHECK_SUM / 2);
7291 6707
7292 6708 FPT_utilEEWriteOnOff(p_port, (unsigned char)0);
7293 FPT_utilEEWrite(p_port, temp, EEPROM_CHECK_SUM/2);
7294
7295 FPT_utilEEWriteOnOff(p_port,(UCHAR)0);
7296 6709
7297} 6710}
7298 6711
7299
7300/*--------------------------------------------------------------------- 6712/*---------------------------------------------------------------------
7301 * 6713 *
7302 * Function: Queue Search Select 6714 * Function: Queue Search Select
@@ -7305,103 +6717,127 @@ static void FPT_DiagEEPROM(ULONG p_port)
7305 * 6717 *
7306 *---------------------------------------------------------------------*/ 6718 *---------------------------------------------------------------------*/
7307 6719
7308static void FPT_queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card) 6720static void FPT_queueSearchSelect(struct sccb_card *pCurrCard,
6721 unsigned char p_card)
7309{ 6722{
7310 UCHAR scan_ptr, lun; 6723 unsigned char scan_ptr, lun;
7311 PSCCBMgr_tar_info currTar_Info; 6724 struct sccb_mgr_tar_info *currTar_Info;
7312 PSCCB pOldSccb; 6725 struct sccb *pOldSccb;
7313 6726
7314 scan_ptr = pCurrCard->scanIndex; 6727 scan_ptr = pCurrCard->scanIndex;
7315 do 6728 do {
7316 {
7317 currTar_Info = &FPT_sccbMgrTbl[p_card][scan_ptr]; 6729 currTar_Info = &FPT_sccbMgrTbl[p_card][scan_ptr];
7318 if((pCurrCard->globalFlags & F_CONLUN_IO) && 6730 if ((pCurrCard->globalFlags & F_CONLUN_IO) &&
7319 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING)) 6731 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) !=
7320 { 6732 TAG_Q_TRYING)) {
7321 if (currTar_Info->TarSelQ_Cnt != 0) 6733 if (currTar_Info->TarSelQ_Cnt != 0) {
7322 {
7323 6734
7324 scan_ptr++; 6735 scan_ptr++;
7325 if (scan_ptr == MAX_SCSI_TAR) 6736 if (scan_ptr == MAX_SCSI_TAR)
7326 scan_ptr = 0; 6737 scan_ptr = 0;
7327
7328 for(lun=0; lun < MAX_LUN; lun++)
7329 {
7330 if(currTar_Info->TarLUNBusy[lun] == 0)
7331 {
7332 6738
7333 pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head; 6739 for (lun = 0; lun < MAX_LUN; lun++) {
6740 if (currTar_Info->TarLUNBusy[lun] == 0) {
6741
6742 pCurrCard->currentSCCB =
6743 currTar_Info->TarSelQ_Head;
7334 pOldSccb = NULL; 6744 pOldSccb = NULL;
7335 6745
7336 while((pCurrCard->currentSCCB != NULL) && 6746 while ((pCurrCard->
7337 (lun != pCurrCard->currentSCCB->Lun)) 6747 currentSCCB != NULL)
7338 { 6748 && (lun !=
7339 pOldSccb = pCurrCard->currentSCCB; 6749 pCurrCard->
7340 pCurrCard->currentSCCB = (PSCCB)(pCurrCard->currentSCCB)-> 6750 currentSCCB->Lun)) {
7341 Sccb_forwardlink; 6751 pOldSccb =
6752 pCurrCard->
6753 currentSCCB;
6754 pCurrCard->currentSCCB =
6755 (struct sccb
6756 *)(pCurrCard->
6757 currentSCCB)->
6758 Sccb_forwardlink;
7342 } 6759 }
7343 if(pCurrCard->currentSCCB == NULL) 6760 if (pCurrCard->currentSCCB ==
6761 NULL)
7344 continue; 6762 continue;
7345 if(pOldSccb != NULL) 6763 if (pOldSccb != NULL) {
7346 { 6764 pOldSccb->
7347 pOldSccb->Sccb_forwardlink = (PSCCB)(pCurrCard->currentSCCB)-> 6765 Sccb_forwardlink =
7348 Sccb_forwardlink; 6766 (struct sccb
7349 pOldSccb->Sccb_backlink = (PSCCB)(pCurrCard->currentSCCB)-> 6767 *)(pCurrCard->
7350 Sccb_backlink; 6768 currentSCCB)->
7351 currTar_Info->TarSelQ_Cnt--; 6769 Sccb_forwardlink;
7352 } 6770 pOldSccb->
7353 else 6771 Sccb_backlink =
7354 { 6772 (struct sccb
7355 currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink; 6773 *)(pCurrCard->
7356 6774 currentSCCB)->
7357 if (currTar_Info->TarSelQ_Head == NULL) 6775 Sccb_backlink;
7358 { 6776 currTar_Info->
7359 currTar_Info->TarSelQ_Tail = NULL; 6777 TarSelQ_Cnt--;
7360 currTar_Info->TarSelQ_Cnt = 0; 6778 } else {
7361 } 6779 currTar_Info->
7362 else 6780 TarSelQ_Head =
7363 { 6781 (struct sccb
7364 currTar_Info->TarSelQ_Cnt--; 6782 *)(pCurrCard->
7365 currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL; 6783 currentSCCB)->
6784 Sccb_forwardlink;
6785
6786 if (currTar_Info->
6787 TarSelQ_Head ==
6788 NULL) {
6789 currTar_Info->
6790 TarSelQ_Tail
6791 = NULL;
6792 currTar_Info->
6793 TarSelQ_Cnt
6794 = 0;
6795 } else {
6796 currTar_Info->
6797 TarSelQ_Cnt--;
6798 currTar_Info->
6799 TarSelQ_Head->
6800 Sccb_backlink
6801 =
6802 (struct sccb
6803 *)NULL;
7366 } 6804 }
7367 } 6805 }
7368 pCurrCard->scanIndex = scan_ptr; 6806 pCurrCard->scanIndex = scan_ptr;
7369 6807
7370 pCurrCard->globalFlags |= F_NEW_SCCB_CMD; 6808 pCurrCard->globalFlags |=
6809 F_NEW_SCCB_CMD;
7371 6810
7372 break; 6811 break;
7373 } 6812 }
7374 } 6813 }
7375 } 6814 }
7376 6815
7377 else 6816 else {
7378 {
7379 scan_ptr++; 6817 scan_ptr++;
7380 if (scan_ptr == MAX_SCSI_TAR) { 6818 if (scan_ptr == MAX_SCSI_TAR) {
7381 scan_ptr = 0; 6819 scan_ptr = 0;
7382 } 6820 }
7383 } 6821 }
7384 6822
7385 } 6823 } else {
7386 else
7387 {
7388 if ((currTar_Info->TarSelQ_Cnt != 0) && 6824 if ((currTar_Info->TarSelQ_Cnt != 0) &&
7389 (currTar_Info->TarLUNBusy[0] == 0)) 6825 (currTar_Info->TarLUNBusy[0] == 0)) {
7390 {
7391 6826
7392 pCurrCard->currentSCCB = currTar_Info->TarSelQ_Head; 6827 pCurrCard->currentSCCB =
6828 currTar_Info->TarSelQ_Head;
7393 6829
7394 currTar_Info->TarSelQ_Head = (PSCCB)(pCurrCard->currentSCCB)->Sccb_forwardlink; 6830 currTar_Info->TarSelQ_Head =
6831 (struct sccb *)(pCurrCard->currentSCCB)->
6832 Sccb_forwardlink;
7395 6833
7396 if (currTar_Info->TarSelQ_Head == NULL) 6834 if (currTar_Info->TarSelQ_Head == NULL) {
7397 {
7398 currTar_Info->TarSelQ_Tail = NULL; 6835 currTar_Info->TarSelQ_Tail = NULL;
7399 currTar_Info->TarSelQ_Cnt = 0; 6836 currTar_Info->TarSelQ_Cnt = 0;
7400 } 6837 } else {
7401 else
7402 {
7403 currTar_Info->TarSelQ_Cnt--; 6838 currTar_Info->TarSelQ_Cnt--;
7404 currTar_Info->TarSelQ_Head->Sccb_backlink = (PSCCB)NULL; 6839 currTar_Info->TarSelQ_Head->
6840 Sccb_backlink = (struct sccb *)NULL;
7405 } 6841 }
7406 6842
7407 scan_ptr++; 6843 scan_ptr++;
@@ -7415,11 +6851,9 @@ static void FPT_queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card)
7415 break; 6851 break;
7416 } 6852 }
7417 6853
7418 else 6854 else {
7419 {
7420 scan_ptr++; 6855 scan_ptr++;
7421 if (scan_ptr == MAX_SCSI_TAR) 6856 if (scan_ptr == MAX_SCSI_TAR) {
7422 {
7423 scan_ptr = 0; 6857 scan_ptr = 0;
7424 } 6858 }
7425 } 6859 }
@@ -7427,7 +6861,6 @@ static void FPT_queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card)
7427 } while (scan_ptr != pCurrCard->scanIndex); 6861 } while (scan_ptr != pCurrCard->scanIndex);
7428} 6862}
7429 6863
7430
7431/*--------------------------------------------------------------------- 6864/*---------------------------------------------------------------------
7432 * 6865 *
7433 * Function: Queue Select Fail 6866 * Function: Queue Select Fail
@@ -7436,37 +6869,39 @@ static void FPT_queueSearchSelect(PSCCBcard pCurrCard, UCHAR p_card)
7436 * 6869 *
7437 *---------------------------------------------------------------------*/ 6870 *---------------------------------------------------------------------*/
7438 6871
7439static void FPT_queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card) 6872static void FPT_queueSelectFail(struct sccb_card *pCurrCard,
6873 unsigned char p_card)
7440{ 6874{
7441 UCHAR thisTarg; 6875 unsigned char thisTarg;
7442 PSCCBMgr_tar_info currTar_Info; 6876 struct sccb_mgr_tar_info *currTar_Info;
7443
7444 if (pCurrCard->currentSCCB != NULL)
7445 {
7446 thisTarg = (UCHAR)(((PSCCB)(pCurrCard->currentSCCB))->TargID);
7447 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg];
7448 6877
7449 pCurrCard->currentSCCB->Sccb_backlink = (PSCCB)NULL; 6878 if (pCurrCard->currentSCCB != NULL) {
6879 thisTarg =
6880 (unsigned char)(((struct sccb *)(pCurrCard->currentSCCB))->
6881 TargID);
6882 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg];
7450 6883
7451 pCurrCard->currentSCCB->Sccb_forwardlink = currTar_Info->TarSelQ_Head; 6884 pCurrCard->currentSCCB->Sccb_backlink = (struct sccb *)NULL;
7452 6885
7453 if (currTar_Info->TarSelQ_Cnt == 0) 6886 pCurrCard->currentSCCB->Sccb_forwardlink =
7454 { 6887 currTar_Info->TarSelQ_Head;
7455 currTar_Info->TarSelQ_Tail = pCurrCard->currentSCCB;
7456 }
7457 6888
7458 else 6889 if (currTar_Info->TarSelQ_Cnt == 0) {
7459 { 6890 currTar_Info->TarSelQ_Tail = pCurrCard->currentSCCB;
7460 currTar_Info->TarSelQ_Head->Sccb_backlink = pCurrCard->currentSCCB; 6891 }
7461 }
7462 6892
6893 else {
6894 currTar_Info->TarSelQ_Head->Sccb_backlink =
6895 pCurrCard->currentSCCB;
6896 }
7463 6897
7464 currTar_Info->TarSelQ_Head = pCurrCard->currentSCCB; 6898 currTar_Info->TarSelQ_Head = pCurrCard->currentSCCB;
7465 6899
7466 pCurrCard->currentSCCB = NULL; 6900 pCurrCard->currentSCCB = NULL;
7467 currTar_Info->TarSelQ_Cnt++; 6901 currTar_Info->TarSelQ_Cnt++;
7468 } 6902 }
7469} 6903}
6904
7470/*--------------------------------------------------------------------- 6905/*---------------------------------------------------------------------
7471 * 6906 *
7472 * Function: Queue Command Complete 6907 * Function: Queue Command Complete
@@ -7475,101 +6910,97 @@ static void FPT_queueSelectFail(PSCCBcard pCurrCard, UCHAR p_card)
7475 * 6910 *
7476 *---------------------------------------------------------------------*/ 6911 *---------------------------------------------------------------------*/
7477 6912
7478static void FPT_queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_sccb, 6913static void FPT_queueCmdComplete(struct sccb_card *pCurrCard,
7479 UCHAR p_card) 6914 struct sccb *p_sccb, unsigned char p_card)
7480{ 6915{
7481 6916
7482 UCHAR i, SCSIcmd; 6917 unsigned char i, SCSIcmd;
7483 CALL_BK_FN callback; 6918 CALL_BK_FN callback;
7484 PSCCBMgr_tar_info currTar_Info; 6919 struct sccb_mgr_tar_info *currTar_Info;
7485 6920
7486 SCSIcmd = p_sccb->Cdb[0]; 6921 SCSIcmd = p_sccb->Cdb[0];
7487 6922
7488 6923 if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED)) {
7489 if (!(p_sccb->Sccb_XferState & F_ALL_XFERRED)) { 6924
7490 6925 if ((p_sccb->
7491 if ((p_sccb->ControlByte & (SCCB_DATA_XFER_OUT | SCCB_DATA_XFER_IN)) && 6926 ControlByte & (SCCB_DATA_XFER_OUT | SCCB_DATA_XFER_IN))
7492 (p_sccb->HostStatus == SCCB_COMPLETE) && 6927 && (p_sccb->HostStatus == SCCB_COMPLETE)
7493 (p_sccb->TargetStatus != SSCHECK)) 6928 && (p_sccb->TargetStatus != SSCHECK))
7494 6929
7495 if ((SCSIcmd == SCSI_READ) || 6930 if ((SCSIcmd == SCSI_READ) ||
7496 (SCSIcmd == SCSI_WRITE) || 6931 (SCSIcmd == SCSI_WRITE) ||
7497 (SCSIcmd == SCSI_READ_EXTENDED) || 6932 (SCSIcmd == SCSI_READ_EXTENDED) ||
7498 (SCSIcmd == SCSI_WRITE_EXTENDED) || 6933 (SCSIcmd == SCSI_WRITE_EXTENDED) ||
7499 (SCSIcmd == SCSI_WRITE_AND_VERIFY) || 6934 (SCSIcmd == SCSI_WRITE_AND_VERIFY) ||
7500 (SCSIcmd == SCSI_START_STOP_UNIT) || 6935 (SCSIcmd == SCSI_START_STOP_UNIT) ||
7501 (pCurrCard->globalFlags & F_NO_FILTER) 6936 (pCurrCard->globalFlags & F_NO_FILTER)
7502 ) 6937 )
7503 p_sccb->HostStatus = SCCB_DATA_UNDER_RUN; 6938 p_sccb->HostStatus = SCCB_DATA_UNDER_RUN;
7504 } 6939 }
7505
7506 6940
7507 if(p_sccb->SccbStatus == SCCB_IN_PROCESS) 6941 if (p_sccb->SccbStatus == SCCB_IN_PROCESS) {
7508 { 6942 if (p_sccb->HostStatus || p_sccb->TargetStatus)
7509 if (p_sccb->HostStatus || p_sccb->TargetStatus) 6943 p_sccb->SccbStatus = SCCB_ERROR;
7510 p_sccb->SccbStatus = SCCB_ERROR; 6944 else
7511 else 6945 p_sccb->SccbStatus = SCCB_SUCCESS;
7512 p_sccb->SccbStatus = SCCB_SUCCESS;
7513 } 6946 }
7514 6947
7515 if (p_sccb->Sccb_XferState & F_AUTO_SENSE) { 6948 if (p_sccb->Sccb_XferState & F_AUTO_SENSE) {
7516 6949
7517 p_sccb->CdbLength = p_sccb->Save_CdbLen; 6950 p_sccb->CdbLength = p_sccb->Save_CdbLen;
7518 for (i=0; i < 6; i++) { 6951 for (i = 0; i < 6; i++) {
7519 p_sccb->Cdb[i] = p_sccb->Save_Cdb[i]; 6952 p_sccb->Cdb[i] = p_sccb->Save_Cdb[i];
7520 } 6953 }
7521 } 6954 }
7522 6955
7523 if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) || 6956 if ((p_sccb->OperationCode == RESIDUAL_SG_COMMAND) ||
7524 (p_sccb->OperationCode == RESIDUAL_COMMAND)) { 6957 (p_sccb->OperationCode == RESIDUAL_COMMAND)) {
7525 6958
7526 FPT_utilUpdateResidual(p_sccb); 6959 FPT_utilUpdateResidual(p_sccb);
7527 } 6960 }
7528 6961
7529 pCurrCard->cmdCounter--; 6962 pCurrCard->cmdCounter--;
7530 if (!pCurrCard->cmdCounter) { 6963 if (!pCurrCard->cmdCounter) {
7531 6964
7532 if (pCurrCard->globalFlags & F_GREEN_PC) { 6965 if (pCurrCard->globalFlags & F_GREEN_PC) {
7533 WR_HARPOON(pCurrCard->ioPort+hp_clkctrl_0,(PWR_DWN | CLKCTRL_DEFAULT)); 6966 WR_HARPOON(pCurrCard->ioPort + hp_clkctrl_0,
7534 WR_HARPOON(pCurrCard->ioPort+hp_sys_ctrl, STOP_CLK); 6967 (PWR_DWN | CLKCTRL_DEFAULT));
7535 } 6968 WR_HARPOON(pCurrCard->ioPort + hp_sys_ctrl, STOP_CLK);
6969 }
7536 6970
7537 WR_HARPOON(pCurrCard->ioPort+hp_semaphore, 6971 WR_HARPOON(pCurrCard->ioPort + hp_semaphore,
7538 (RD_HARPOON(pCurrCard->ioPort+hp_semaphore) & ~SCCB_MGR_ACTIVE)); 6972 (RD_HARPOON(pCurrCard->ioPort + hp_semaphore) &
6973 ~SCCB_MGR_ACTIVE));
7539 6974
7540 } 6975 }
7541 6976
7542 if(pCurrCard->discQCount != 0) 6977 if (pCurrCard->discQCount != 0) {
7543 { 6978 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID];
7544 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID]; 6979 if (((pCurrCard->globalFlags & F_CONLUN_IO) &&
7545 if(((pCurrCard->globalFlags & F_CONLUN_IO) && 6980 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) !=
7546 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 6981 TAG_Q_TRYING))) {
7547 {
7548 pCurrCard->discQCount--; 6982 pCurrCard->discQCount--;
7549 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = NULL; 6983 pCurrCard->discQ_Tbl[currTar_Info->
7550 } 6984 LunDiscQ_Idx[p_sccb->Lun]] = NULL;
7551 else 6985 } else {
7552 { 6986 if (p_sccb->Sccb_tag) {
7553 if(p_sccb->Sccb_tag)
7554 {
7555 pCurrCard->discQCount--; 6987 pCurrCard->discQCount--;
7556 pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL; 6988 pCurrCard->discQ_Tbl[p_sccb->Sccb_tag] = NULL;
7557 }else 6989 } else {
7558 {
7559 pCurrCard->discQCount--; 6990 pCurrCard->discQCount--;
7560 pCurrCard->discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = NULL; 6991 pCurrCard->discQ_Tbl[currTar_Info->
6992 LunDiscQ_Idx[0]] = NULL;
7561 } 6993 }
7562 } 6994 }
7563 6995
7564 } 6996 }
7565 6997
7566 callback = (CALL_BK_FN)p_sccb->SccbCallback; 6998 callback = (CALL_BK_FN) p_sccb->SccbCallback;
7567 callback(p_sccb); 6999 callback(p_sccb);
7568 pCurrCard->globalFlags |= F_NEW_SCCB_CMD; 7000 pCurrCard->globalFlags |= F_NEW_SCCB_CMD;
7569 pCurrCard->currentSCCB = NULL; 7001 pCurrCard->currentSCCB = NULL;
7570} 7002}
7571 7003
7572
7573/*--------------------------------------------------------------------- 7004/*---------------------------------------------------------------------
7574 * 7005 *
7575 * Function: Queue Disconnect 7006 * Function: Queue Disconnect
@@ -7577,33 +7008,32 @@ static void FPT_queueCmdComplete(PSCCBcard pCurrCard, PSCCB p_sccb,
7577 * Description: Add SCCB to our disconnect array. 7008 * Description: Add SCCB to our disconnect array.
7578 * 7009 *
7579 *---------------------------------------------------------------------*/ 7010 *---------------------------------------------------------------------*/
7580static void FPT_queueDisconnect(PSCCB p_sccb, UCHAR p_card) 7011static void FPT_queueDisconnect(struct sccb *p_sccb, unsigned char p_card)
7581{ 7012{
7582 PSCCBMgr_tar_info currTar_Info; 7013 struct sccb_mgr_tar_info *currTar_Info;
7583 7014
7584 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID]; 7015 currTar_Info = &FPT_sccbMgrTbl[p_card][p_sccb->TargID];
7585 7016
7586 if(((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) && 7017 if (((FPT_BL_Card[p_card].globalFlags & F_CONLUN_IO) &&
7587 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) 7018 ((currTar_Info->TarStatus & TAR_TAG_Q_MASK) != TAG_Q_TRYING))) {
7588 { 7019 FPT_BL_Card[p_card].discQ_Tbl[currTar_Info->
7589 FPT_BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[p_sccb->Lun]] = p_sccb; 7020 LunDiscQ_Idx[p_sccb->Lun]] =
7590 } 7021 p_sccb;
7591 else 7022 } else {
7592 { 7023 if (p_sccb->Sccb_tag) {
7593 if (p_sccb->Sccb_tag) 7024 FPT_BL_Card[p_card].discQ_Tbl[p_sccb->Sccb_tag] =
7594 { 7025 p_sccb;
7595 FPT_BL_Card[p_card].discQ_Tbl[p_sccb->Sccb_tag] = p_sccb; 7026 FPT_sccbMgrTbl[p_card][p_sccb->TargID].TarLUNBusy[0] =
7596 FPT_sccbMgrTbl[p_card][p_sccb->TargID].TarLUNBusy[0] = 0; 7027 0;
7597 FPT_sccbMgrTbl[p_card][p_sccb->TargID].TarTagQ_Cnt++; 7028 FPT_sccbMgrTbl[p_card][p_sccb->TargID].TarTagQ_Cnt++;
7598 }else 7029 } else {
7599 { 7030 FPT_BL_Card[p_card].discQ_Tbl[currTar_Info->
7600 FPT_BL_Card[p_card].discQ_Tbl[currTar_Info->LunDiscQ_Idx[0]] = p_sccb; 7031 LunDiscQ_Idx[0]] = p_sccb;
7601 } 7032 }
7602 } 7033 }
7603 FPT_BL_Card[p_card].currentSCCB = NULL; 7034 FPT_BL_Card[p_card].currentSCCB = NULL;
7604} 7035}
7605 7036
7606
7607/*--------------------------------------------------------------------- 7037/*---------------------------------------------------------------------
7608 * 7038 *
7609 * Function: Queue Flush SCCB 7039 * Function: Queue Flush SCCB
@@ -7612,33 +7042,35 @@ static void FPT_queueDisconnect(PSCCB p_sccb, UCHAR p_card)
7612 * 7042 *
7613 *---------------------------------------------------------------------*/ 7043 *---------------------------------------------------------------------*/
7614 7044
7615static void FPT_queueFlushSccb(UCHAR p_card, UCHAR error_code) 7045static void FPT_queueFlushSccb(unsigned char p_card, unsigned char error_code)
7616{ 7046{
7617 UCHAR qtag,thisTarg; 7047 unsigned char qtag, thisTarg;
7618 PSCCB currSCCB; 7048 struct sccb *currSCCB;
7619 PSCCBMgr_tar_info currTar_Info; 7049 struct sccb_mgr_tar_info *currTar_Info;
7620 7050
7621 currSCCB = FPT_BL_Card[p_card].currentSCCB; 7051 currSCCB = FPT_BL_Card[p_card].currentSCCB;
7622 if(currSCCB != NULL) 7052 if (currSCCB != NULL) {
7623 { 7053 thisTarg = (unsigned char)currSCCB->TargID;
7624 thisTarg = (UCHAR)currSCCB->TargID; 7054 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg];
7625 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg]; 7055
7056 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) {
7626 7057
7627 for (qtag=0; qtag<QUEUE_DEPTH; qtag++) { 7058 if (FPT_BL_Card[p_card].discQ_Tbl[qtag] &&
7059 (FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID ==
7060 thisTarg)) {
7628 7061
7629 if (FPT_BL_Card[p_card].discQ_Tbl[qtag] && 7062 FPT_BL_Card[p_card].discQ_Tbl[qtag]->
7630 (FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg)) 7063 HostStatus = (unsigned char)error_code;
7631 {
7632 7064
7633 FPT_BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code; 7065 FPT_queueCmdComplete(&FPT_BL_Card[p_card],
7634 7066 FPT_BL_Card[p_card].
7635 FPT_queueCmdComplete(&FPT_BL_Card[p_card],FPT_BL_Card[p_card].discQ_Tbl[qtag], p_card); 7067 discQ_Tbl[qtag], p_card);
7636 7068
7637 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL; 7069 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL;
7638 currTar_Info->TarTagQ_Cnt--; 7070 currTar_Info->TarTagQ_Cnt--;
7639 7071
7640 } 7072 }
7641 } 7073 }
7642 } 7074 }
7643 7075
7644} 7076}
@@ -7651,61 +7083,57 @@ static void FPT_queueFlushSccb(UCHAR p_card, UCHAR error_code)
7651 * 7083 *
7652 *---------------------------------------------------------------------*/ 7084 *---------------------------------------------------------------------*/
7653 7085
7654static void FPT_queueFlushTargSccb(UCHAR p_card, UCHAR thisTarg, 7086static void FPT_queueFlushTargSccb(unsigned char p_card, unsigned char thisTarg,
7655 UCHAR error_code) 7087 unsigned char error_code)
7656{ 7088{
7657 UCHAR qtag; 7089 unsigned char qtag;
7658 PSCCBMgr_tar_info currTar_Info; 7090 struct sccb_mgr_tar_info *currTar_Info;
7659 7091
7660 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg]; 7092 currTar_Info = &FPT_sccbMgrTbl[p_card][thisTarg];
7661 7093
7662 for (qtag=0; qtag<QUEUE_DEPTH; qtag++) { 7094 for (qtag = 0; qtag < QUEUE_DEPTH; qtag++) {
7663 7095
7664 if (FPT_BL_Card[p_card].discQ_Tbl[qtag] && 7096 if (FPT_BL_Card[p_card].discQ_Tbl[qtag] &&
7665 (FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg)) 7097 (FPT_BL_Card[p_card].discQ_Tbl[qtag]->TargID == thisTarg)) {
7666 {
7667 7098
7668 FPT_BL_Card[p_card].discQ_Tbl[qtag]->HostStatus = (UCHAR)error_code; 7099 FPT_BL_Card[p_card].discQ_Tbl[qtag]->HostStatus =
7100 (unsigned char)error_code;
7669 7101
7670 FPT_queueCmdComplete(&FPT_BL_Card[p_card],FPT_BL_Card[p_card].discQ_Tbl[qtag], p_card); 7102 FPT_queueCmdComplete(&FPT_BL_Card[p_card],
7103 FPT_BL_Card[p_card].
7104 discQ_Tbl[qtag], p_card);
7671 7105
7672 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL; 7106 FPT_BL_Card[p_card].discQ_Tbl[qtag] = NULL;
7673 currTar_Info->TarTagQ_Cnt--; 7107 currTar_Info->TarTagQ_Cnt--;
7674 7108
7675 } 7109 }
7676 } 7110 }
7677 7111
7678} 7112}
7679 7113
7680 7114static void FPT_queueAddSccb(struct sccb *p_SCCB, unsigned char p_card)
7681
7682
7683
7684static void FPT_queueAddSccb(PSCCB p_SCCB, UCHAR p_card)
7685{ 7115{
7686 PSCCBMgr_tar_info currTar_Info; 7116 struct sccb_mgr_tar_info *currTar_Info;
7687 currTar_Info = &FPT_sccbMgrTbl[p_card][p_SCCB->TargID]; 7117 currTar_Info = &FPT_sccbMgrTbl[p_card][p_SCCB->TargID];
7688 7118
7689 p_SCCB->Sccb_forwardlink = NULL; 7119 p_SCCB->Sccb_forwardlink = NULL;
7690 7120
7691 p_SCCB->Sccb_backlink = currTar_Info->TarSelQ_Tail; 7121 p_SCCB->Sccb_backlink = currTar_Info->TarSelQ_Tail;
7692 7122
7693 if (currTar_Info->TarSelQ_Cnt == 0) { 7123 if (currTar_Info->TarSelQ_Cnt == 0) {
7694 7124
7695 currTar_Info->TarSelQ_Head = p_SCCB; 7125 currTar_Info->TarSelQ_Head = p_SCCB;
7696 } 7126 }
7697
7698 else {
7699 7127
7700 currTar_Info->TarSelQ_Tail->Sccb_forwardlink = p_SCCB; 7128 else {
7701 }
7702 7129
7130 currTar_Info->TarSelQ_Tail->Sccb_forwardlink = p_SCCB;
7131 }
7703 7132
7704 currTar_Info->TarSelQ_Tail = p_SCCB; 7133 currTar_Info->TarSelQ_Tail = p_SCCB;
7705 currTar_Info->TarSelQ_Cnt++; 7134 currTar_Info->TarSelQ_Cnt++;
7706} 7135}
7707 7136
7708
7709/*--------------------------------------------------------------------- 7137/*---------------------------------------------------------------------
7710 * 7138 *
7711 * Function: Queue Find SCCB 7139 * Function: Queue Find SCCB
@@ -7715,54 +7143,56 @@ static void FPT_queueAddSccb(PSCCB p_SCCB, UCHAR p_card)
7715 * 7143 *
7716 *---------------------------------------------------------------------*/ 7144 *---------------------------------------------------------------------*/
7717 7145
7718static UCHAR FPT_queueFindSccb(PSCCB p_SCCB, UCHAR p_card) 7146static unsigned char FPT_queueFindSccb(struct sccb *p_SCCB,
7147 unsigned char p_card)
7719{ 7148{
7720 PSCCB q_ptr; 7149 struct sccb *q_ptr;
7721 PSCCBMgr_tar_info currTar_Info; 7150 struct sccb_mgr_tar_info *currTar_Info;
7722
7723 currTar_Info = &FPT_sccbMgrTbl[p_card][p_SCCB->TargID];
7724 7151
7725 q_ptr = currTar_Info->TarSelQ_Head; 7152 currTar_Info = &FPT_sccbMgrTbl[p_card][p_SCCB->TargID];
7726 7153
7727 while(q_ptr != NULL) { 7154 q_ptr = currTar_Info->TarSelQ_Head;
7728 7155
7729 if (q_ptr == p_SCCB) { 7156 while (q_ptr != NULL) {
7730 7157
7158 if (q_ptr == p_SCCB) {
7731 7159
7732 if (currTar_Info->TarSelQ_Head == q_ptr) { 7160 if (currTar_Info->TarSelQ_Head == q_ptr) {
7733 7161
7734 currTar_Info->TarSelQ_Head = q_ptr->Sccb_forwardlink; 7162 currTar_Info->TarSelQ_Head =
7163 q_ptr->Sccb_forwardlink;
7735 } 7164 }
7736 7165
7737 if (currTar_Info->TarSelQ_Tail == q_ptr) { 7166 if (currTar_Info->TarSelQ_Tail == q_ptr) {
7738 7167
7739 currTar_Info->TarSelQ_Tail = q_ptr->Sccb_backlink; 7168 currTar_Info->TarSelQ_Tail =
7169 q_ptr->Sccb_backlink;
7740 } 7170 }
7741 7171
7742 if (q_ptr->Sccb_forwardlink != NULL) { 7172 if (q_ptr->Sccb_forwardlink != NULL) {
7743 q_ptr->Sccb_forwardlink->Sccb_backlink = q_ptr->Sccb_backlink; 7173 q_ptr->Sccb_forwardlink->Sccb_backlink =
7174 q_ptr->Sccb_backlink;
7744 } 7175 }
7745 7176
7746 if (q_ptr->Sccb_backlink != NULL) { 7177 if (q_ptr->Sccb_backlink != NULL) {
7747 q_ptr->Sccb_backlink->Sccb_forwardlink = q_ptr->Sccb_forwardlink; 7178 q_ptr->Sccb_backlink->Sccb_forwardlink =
7179 q_ptr->Sccb_forwardlink;
7748 } 7180 }
7749 7181
7750 currTar_Info->TarSelQ_Cnt--; 7182 currTar_Info->TarSelQ_Cnt--;
7751
7752 return(1);
7753 }
7754 7183
7755 else { 7184 return 1;
7756 q_ptr = q_ptr->Sccb_forwardlink; 7185 }
7757 }
7758 }
7759 7186
7187 else {
7188 q_ptr = q_ptr->Sccb_forwardlink;
7189 }
7190 }
7760 7191
7761 return(0); 7192 return 0;
7762 7193
7763} 7194}
7764 7195
7765
7766/*--------------------------------------------------------------------- 7196/*---------------------------------------------------------------------
7767 * 7197 *
7768 * Function: Utility Update Residual Count 7198 * Function: Utility Update Residual Count
@@ -7776,48 +7206,47 @@ static UCHAR FPT_queueFindSccb(PSCCB p_SCCB, UCHAR p_card)
7776 * 7206 *
7777 *---------------------------------------------------------------------*/ 7207 *---------------------------------------------------------------------*/
7778 7208
7779static void FPT_utilUpdateResidual(PSCCB p_SCCB) 7209static void FPT_utilUpdateResidual(struct sccb *p_SCCB)
7780{ 7210{
7781 ULONG partial_cnt; 7211 unsigned long partial_cnt;
7782 UINT sg_index; 7212 unsigned int sg_index;
7783 ULONG *sg_ptr; 7213 unsigned long *sg_ptr;
7784 7214
7785 if (p_SCCB->Sccb_XferState & F_ALL_XFERRED) { 7215 if (p_SCCB->Sccb_XferState & F_ALL_XFERRED) {
7786 7216
7787 p_SCCB->DataLength = 0x0000; 7217 p_SCCB->DataLength = 0x0000;
7788 } 7218 }
7789 7219
7790 else if (p_SCCB->Sccb_XferState & F_SG_XFER) { 7220 else if (p_SCCB->Sccb_XferState & F_SG_XFER) {
7791 7221
7792 partial_cnt = 0x0000; 7222 partial_cnt = 0x0000;
7793 7223
7794 sg_index = p_SCCB->Sccb_sgseg; 7224 sg_index = p_SCCB->Sccb_sgseg;
7795 7225
7796 sg_ptr = (ULONG *)p_SCCB->DataPointer; 7226 sg_ptr = (unsigned long *)p_SCCB->DataPointer;
7797 7227
7798 if (p_SCCB->Sccb_SGoffset) { 7228 if (p_SCCB->Sccb_SGoffset) {
7799 7229
7800 partial_cnt = p_SCCB->Sccb_SGoffset; 7230 partial_cnt = p_SCCB->Sccb_SGoffset;
7801 sg_index++; 7231 sg_index++;
7802 } 7232 }
7803 7233
7804 while ( ((ULONG)sg_index * (ULONG)SG_ELEMENT_SIZE) < 7234 while (((unsigned long)sg_index *
7805 p_SCCB->DataLength ) { 7235 (unsigned long)SG_ELEMENT_SIZE) < p_SCCB->DataLength) {
7806 7236
7807 partial_cnt += *(sg_ptr+(sg_index * 2)); 7237 partial_cnt += *(sg_ptr + (sg_index * 2));
7808 sg_index++; 7238 sg_index++;
7809 } 7239 }
7810 7240
7811 p_SCCB->DataLength = partial_cnt; 7241 p_SCCB->DataLength = partial_cnt;
7812 } 7242 }
7813 7243
7814 else { 7244 else {
7815 7245
7816 p_SCCB->DataLength -= p_SCCB->Sccb_ATC; 7246 p_SCCB->DataLength -= p_SCCB->Sccb_ATC;
7817 } 7247 }
7818} 7248}
7819 7249
7820
7821/*--------------------------------------------------------------------- 7250/*---------------------------------------------------------------------
7822 * 7251 *
7823 * Function: Wait 1 Second 7252 * Function: Wait 1 Second
@@ -7826,23 +7255,22 @@ static void FPT_utilUpdateResidual(PSCCB p_SCCB)
7826 * 7255 *
7827 *---------------------------------------------------------------------*/ 7256 *---------------------------------------------------------------------*/
7828 7257
7829static void FPT_Wait1Second(ULONG p_port) 7258static void FPT_Wait1Second(unsigned long p_port)
7830{ 7259{
7831 UCHAR i; 7260 unsigned char i;
7832 7261
7833 for(i=0; i < 4; i++) { 7262 for (i = 0; i < 4; i++) {
7834 7263
7835 FPT_Wait(p_port, TO_250ms); 7264 FPT_Wait(p_port, TO_250ms);
7836 7265
7837 if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST)) 7266 if ((RD_HARPOON(p_port + hp_scsictrl_0) & SCSI_RST))
7838 break; 7267 break;
7839 7268
7840 if((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL)) 7269 if ((RDW_HARPOON((p_port + hp_intstat)) & SCAM_SEL))
7841 break; 7270 break;
7842 } 7271 }
7843} 7272}
7844 7273
7845
7846/*--------------------------------------------------------------------- 7274/*---------------------------------------------------------------------
7847 * 7275 *
7848 * Function: FPT_Wait 7276 * Function: FPT_Wait
@@ -7851,45 +7279,43 @@ static void FPT_Wait1Second(ULONG p_port)
7851 * 7279 *
7852 *---------------------------------------------------------------------*/ 7280 *---------------------------------------------------------------------*/
7853 7281
7854static void FPT_Wait(ULONG p_port, UCHAR p_delay) 7282static void FPT_Wait(unsigned long p_port, unsigned char p_delay)
7855{ 7283{
7856 UCHAR old_timer; 7284 unsigned char old_timer;
7857 UCHAR green_flag; 7285 unsigned char green_flag;
7858 7286
7859 old_timer = RD_HARPOON(p_port+hp_seltimeout); 7287 old_timer = RD_HARPOON(p_port + hp_seltimeout);
7860 7288
7861 green_flag=RD_HARPOON(p_port+hp_clkctrl_0); 7289 green_flag = RD_HARPOON(p_port + hp_clkctrl_0);
7862 WR_HARPOON(p_port+hp_clkctrl_0, CLKCTRL_DEFAULT); 7290 WR_HARPOON(p_port + hp_clkctrl_0, CLKCTRL_DEFAULT);
7863 7291
7864 WR_HARPOON(p_port+hp_seltimeout,p_delay); 7292 WR_HARPOON(p_port + hp_seltimeout, p_delay);
7865 WRW_HARPOON((p_port+hp_intstat), TIMEOUT); 7293 WRW_HARPOON((p_port + hp_intstat), TIMEOUT);
7866 WRW_HARPOON((p_port+hp_intena), (FPT_default_intena & ~TIMEOUT)); 7294 WRW_HARPOON((p_port + hp_intena), (FPT_default_intena & ~TIMEOUT));
7867 7295
7296 WR_HARPOON(p_port + hp_portctrl_0,
7297 (RD_HARPOON(p_port + hp_portctrl_0) | START_TO));
7868 7298
7869 WR_HARPOON(p_port+hp_portctrl_0, 7299 while (!(RDW_HARPOON((p_port + hp_intstat)) & TIMEOUT)) {
7870 (RD_HARPOON(p_port+hp_portctrl_0) | START_TO));
7871 7300
7872 while (!(RDW_HARPOON((p_port+hp_intstat)) & TIMEOUT)) { 7301 if ((RD_HARPOON(p_port + hp_scsictrl_0) & SCSI_RST))
7302 break;
7873 7303
7874 if ((RD_HARPOON(p_port+hp_scsictrl_0) & SCSI_RST)) 7304 if ((RDW_HARPOON((p_port + hp_intstat)) & SCAM_SEL))
7875 break; 7305 break;
7876 7306 }
7877 if ((RDW_HARPOON((p_port+hp_intstat)) & SCAM_SEL))
7878 break;
7879 }
7880 7307
7881 WR_HARPOON(p_port+hp_portctrl_0, 7308 WR_HARPOON(p_port + hp_portctrl_0,
7882 (RD_HARPOON(p_port+hp_portctrl_0) & ~START_TO)); 7309 (RD_HARPOON(p_port + hp_portctrl_0) & ~START_TO));
7883 7310
7884 WRW_HARPOON((p_port+hp_intstat), TIMEOUT); 7311 WRW_HARPOON((p_port + hp_intstat), TIMEOUT);
7885 WRW_HARPOON((p_port+hp_intena), FPT_default_intena); 7312 WRW_HARPOON((p_port + hp_intena), FPT_default_intena);
7886 7313
7887 WR_HARPOON(p_port+hp_clkctrl_0,green_flag); 7314 WR_HARPOON(p_port + hp_clkctrl_0, green_flag);
7888 7315
7889 WR_HARPOON(p_port+hp_seltimeout,old_timer); 7316 WR_HARPOON(p_port + hp_seltimeout, old_timer);
7890} 7317}
7891 7318
7892
7893/*--------------------------------------------------------------------- 7319/*---------------------------------------------------------------------
7894 * 7320 *
7895 * Function: Enable/Disable Write to EEPROM 7321 * Function: Enable/Disable Write to EEPROM
@@ -7899,26 +7325,26 @@ static void FPT_Wait(ULONG p_port, UCHAR p_delay)
7899 * 7325 *
7900 *---------------------------------------------------------------------*/ 7326 *---------------------------------------------------------------------*/
7901 7327
7902static void FPT_utilEEWriteOnOff(ULONG p_port,UCHAR p_mode) 7328static void FPT_utilEEWriteOnOff(unsigned long p_port, unsigned char p_mode)
7903{ 7329{
7904 UCHAR ee_value; 7330 unsigned char ee_value;
7905
7906 ee_value = (UCHAR)(RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H));
7907 7331
7908 if (p_mode) 7332 ee_value =
7333 (unsigned char)(RD_HARPOON(p_port + hp_ee_ctrl) &
7334 (EXT_ARB_ACK | SCSI_TERM_ENA_H));
7909 7335
7910 FPT_utilEESendCmdAddr(p_port, EWEN, EWEN_ADDR); 7336 if (p_mode)
7911 7337
7912 else 7338 FPT_utilEESendCmdAddr(p_port, EWEN, EWEN_ADDR);
7913 7339
7340 else
7914 7341
7915 FPT_utilEESendCmdAddr(p_port, EWDS, EWDS_ADDR); 7342 FPT_utilEESendCmdAddr(p_port, EWDS, EWDS_ADDR);
7916 7343
7917 WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */ 7344 WR_HARPOON(p_port + hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
7918 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */ 7345 WR_HARPOON(p_port + hp_ee_ctrl, ee_value); /*Turn off Master Select */
7919} 7346}
7920 7347
7921
7922/*--------------------------------------------------------------------- 7348/*---------------------------------------------------------------------
7923 * 7349 *
7924 * Function: Write EEPROM 7350 * Function: Write EEPROM
@@ -7928,46 +7354,46 @@ static void FPT_utilEEWriteOnOff(ULONG p_port,UCHAR p_mode)
7928 * 7354 *
7929 *---------------------------------------------------------------------*/ 7355 *---------------------------------------------------------------------*/
7930 7356
7931static void FPT_utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr) 7357static void FPT_utilEEWrite(unsigned long p_port, unsigned short ee_data,
7358 unsigned short ee_addr)
7932{ 7359{
7933 7360
7934 UCHAR ee_value; 7361 unsigned char ee_value;
7935 USHORT i; 7362 unsigned short i;
7936
7937 ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
7938 (SEE_MS | SEE_CS));
7939 7363
7364 ee_value =
7365 (unsigned
7366 char)((RD_HARPOON(p_port + hp_ee_ctrl) &
7367 (EXT_ARB_ACK | SCSI_TERM_ENA_H)) | (SEE_MS | SEE_CS));
7940 7368
7369 FPT_utilEESendCmdAddr(p_port, EE_WRITE, ee_addr);
7941 7370
7942 FPT_utilEESendCmdAddr(p_port, EE_WRITE, ee_addr); 7371 ee_value |= (SEE_MS + SEE_CS);
7943 7372
7373 for (i = 0x8000; i != 0; i >>= 1) {
7944 7374
7945 ee_value |= (SEE_MS + SEE_CS); 7375 if (i & ee_data)
7946 7376 ee_value |= SEE_DO;
7947 for(i = 0x8000; i != 0; i>>=1) { 7377 else
7948 7378 ee_value &= ~SEE_DO;
7949 if (i & ee_data) 7379
7950 ee_value |= SEE_DO; 7380 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7951 else 7381 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7952 ee_value &= ~SEE_DO; 7382 ee_value |= SEE_CLK; /* Clock data! */
7953 7383 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7954 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7384 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7955 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7385 ee_value &= ~SEE_CLK;
7956 ee_value |= SEE_CLK; /* Clock data! */ 7386 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7957 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7387 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7958 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7388 }
7959 ee_value &= ~SEE_CLK; 7389 ee_value &= (EXT_ARB_ACK | SCSI_TERM_ENA_H);
7960 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7390 WR_HARPOON(p_port + hp_ee_ctrl, (ee_value | SEE_MS));
7961 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
7962 }
7963 ee_value &= (EXT_ARB_ACK | SCSI_TERM_ENA_H);
7964 WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS));
7965 7391
7966 FPT_Wait(p_port, TO_10ms); 7392 FPT_Wait(p_port, TO_10ms);
7967 7393
7968 WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS | SEE_CS)); /* Set CS to EEPROM */ 7394 WR_HARPOON(p_port + hp_ee_ctrl, (ee_value | SEE_MS | SEE_CS)); /* Set CS to EEPROM */
7969 WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /* Turn off CS */ 7395 WR_HARPOON(p_port + hp_ee_ctrl, (ee_value | SEE_MS)); /* Turn off CS */
7970 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /* Turn off Master Select */ 7396 WR_HARPOON(p_port + hp_ee_ctrl, ee_value); /* Turn off Master Select */
7971} 7397}
7972 7398
7973/*--------------------------------------------------------------------- 7399/*---------------------------------------------------------------------
@@ -7979,25 +7405,25 @@ static void FPT_utilEEWrite(ULONG p_port, USHORT ee_data, USHORT ee_addr)
7979 * 7405 *
7980 *---------------------------------------------------------------------*/ 7406 *---------------------------------------------------------------------*/
7981 7407
7982static USHORT FPT_utilEERead(ULONG p_port, USHORT ee_addr) 7408static unsigned short FPT_utilEERead(unsigned long p_port,
7409 unsigned short ee_addr)
7983{ 7410{
7984 USHORT i, ee_data1, ee_data2; 7411 unsigned short i, ee_data1, ee_data2;
7985 7412
7986 i = 0; 7413 i = 0;
7987 ee_data1 = FPT_utilEEReadOrg(p_port, ee_addr); 7414 ee_data1 = FPT_utilEEReadOrg(p_port, ee_addr);
7988 do 7415 do {
7989 {
7990 ee_data2 = FPT_utilEEReadOrg(p_port, ee_addr); 7416 ee_data2 = FPT_utilEEReadOrg(p_port, ee_addr);
7991 7417
7992 if(ee_data1 == ee_data2) 7418 if (ee_data1 == ee_data2)
7993 return(ee_data1); 7419 return ee_data1;
7994 7420
7995 ee_data1 = ee_data2; 7421 ee_data1 = ee_data2;
7996 i++; 7422 i++;
7997 7423
7998 }while(i < 4); 7424 } while (i < 4);
7999 7425
8000 return(ee_data1); 7426 return ee_data1;
8001} 7427}
8002 7428
8003/*--------------------------------------------------------------------- 7429/*---------------------------------------------------------------------
@@ -8009,45 +7435,45 @@ static USHORT FPT_utilEERead(ULONG p_port, USHORT ee_addr)
8009 * 7435 *
8010 *---------------------------------------------------------------------*/ 7436 *---------------------------------------------------------------------*/
8011 7437
8012static USHORT FPT_utilEEReadOrg(ULONG p_port, USHORT ee_addr) 7438static unsigned short FPT_utilEEReadOrg(unsigned long p_port,
7439 unsigned short ee_addr)
8013{ 7440{
8014 7441
8015 UCHAR ee_value; 7442 unsigned char ee_value;
8016 USHORT i, ee_data; 7443 unsigned short i, ee_data;
8017
8018 ee_value = (UCHAR)((RD_HARPOON(p_port+hp_ee_ctrl) & (EXT_ARB_ACK | SCSI_TERM_ENA_H))|
8019 (SEE_MS | SEE_CS));
8020
8021 7444
8022 FPT_utilEESendCmdAddr(p_port, EE_READ, ee_addr); 7445 ee_value =
7446 (unsigned
7447 char)((RD_HARPOON(p_port + hp_ee_ctrl) &
7448 (EXT_ARB_ACK | SCSI_TERM_ENA_H)) | (SEE_MS | SEE_CS));
8023 7449
7450 FPT_utilEESendCmdAddr(p_port, EE_READ, ee_addr);
8024 7451
8025 ee_value |= (SEE_MS + SEE_CS); 7452 ee_value |= (SEE_MS + SEE_CS);
8026 ee_data = 0; 7453 ee_data = 0;
8027 7454
8028 for(i = 1; i <= 16; i++) { 7455 for (i = 1; i <= 16; i++) {
8029 7456
8030 ee_value |= SEE_CLK; /* Clock data! */ 7457 ee_value |= SEE_CLK; /* Clock data! */
8031 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7458 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8032 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7459 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8033 ee_value &= ~SEE_CLK; 7460 ee_value &= ~SEE_CLK;
8034 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7461 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8035 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7462 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8036 7463
8037 ee_data <<= 1; 7464 ee_data <<= 1;
8038 7465
8039 if (RD_HARPOON(p_port+hp_ee_ctrl) & SEE_DI) 7466 if (RD_HARPOON(p_port + hp_ee_ctrl) & SEE_DI)
8040 ee_data |= 1; 7467 ee_data |= 1;
8041 } 7468 }
8042 7469
8043 ee_value &= ~(SEE_MS + SEE_CS); 7470 ee_value &= ~(SEE_MS + SEE_CS);
8044 WR_HARPOON(p_port+hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */ 7471 WR_HARPOON(p_port + hp_ee_ctrl, (ee_value | SEE_MS)); /*Turn off CS */
8045 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); /*Turn off Master Select */ 7472 WR_HARPOON(p_port + hp_ee_ctrl, ee_value); /*Turn off Master Select */
8046 7473
8047 return(ee_data); 7474 return ee_data;
8048} 7475}
8049 7476
8050
8051/*--------------------------------------------------------------------- 7477/*---------------------------------------------------------------------
8052 * 7478 *
8053 * Function: Send EE command and Address to the EEPROM 7479 * Function: Send EE command and Address to the EEPROM
@@ -8057,101 +7483,95 @@ static USHORT FPT_utilEEReadOrg(ULONG p_port, USHORT ee_addr)
8057 * 7483 *
8058 *---------------------------------------------------------------------*/ 7484 *---------------------------------------------------------------------*/
8059 7485
8060static void FPT_utilEESendCmdAddr(ULONG p_port, UCHAR ee_cmd, USHORT ee_addr) 7486static void FPT_utilEESendCmdAddr(unsigned long p_port, unsigned char ee_cmd,
7487 unsigned short ee_addr)
8061{ 7488{
8062 UCHAR ee_value; 7489 unsigned char ee_value;
8063 UCHAR narrow_flg; 7490 unsigned char narrow_flg;
8064
8065 USHORT i;
8066
8067
8068 narrow_flg= (UCHAR)(RD_HARPOON(p_port+hp_page_ctrl) & NARROW_SCSI_CARD);
8069
8070
8071 ee_value = SEE_MS;
8072 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8073
8074 ee_value |= SEE_CS; /* Set CS to EEPROM */
8075 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8076 7491
7492 unsigned short i;
8077 7493
8078 for(i = 0x04; i != 0; i>>=1) { 7494 narrow_flg =
7495 (unsigned char)(RD_HARPOON(p_port + hp_page_ctrl) &
7496 NARROW_SCSI_CARD);
8079 7497
8080 if (i & ee_cmd) 7498 ee_value = SEE_MS;
8081 ee_value |= SEE_DO; 7499 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8082 else
8083 ee_value &= ~SEE_DO;
8084 7500
8085 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7501 ee_value |= SEE_CS; /* Set CS to EEPROM */
8086 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7502 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
8087 ee_value |= SEE_CLK; /* Clock data! */
8088 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8089 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8090 ee_value &= ~SEE_CLK;
8091 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8092 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8093 }
8094 7503
7504 for (i = 0x04; i != 0; i >>= 1) {
8095 7505
8096 if (narrow_flg) 7506 if (i & ee_cmd)
8097 i = 0x0080; 7507 ee_value |= SEE_DO;
8098 7508 else
8099 else 7509 ee_value &= ~SEE_DO;
8100 i = 0x0200; 7510
8101 7511 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7512 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7513 ee_value |= SEE_CLK; /* Clock data! */
7514 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7515 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7516 ee_value &= ~SEE_CLK;
7517 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7518 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7519 }
8102 7520
8103 while (i != 0) { 7521 if (narrow_flg)
7522 i = 0x0080;
8104 7523
8105 if (i & ee_addr) 7524 else
8106 ee_value |= SEE_DO; 7525 i = 0x0200;
8107 else
8108 ee_value &= ~SEE_DO;
8109 7526
8110 WR_HARPOON(p_port+hp_ee_ctrl, ee_value); 7527 while (i != 0) {
8111 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8112 ee_value |= SEE_CLK; /* Clock data! */
8113 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8114 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8115 ee_value &= ~SEE_CLK;
8116 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8117 WR_HARPOON(p_port+hp_ee_ctrl, ee_value);
8118 7528
8119 i >>= 1; 7529 if (i & ee_addr)
8120 } 7530 ee_value |= SEE_DO;
7531 else
7532 ee_value &= ~SEE_DO;
7533
7534 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7535 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7536 ee_value |= SEE_CLK; /* Clock data! */
7537 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7538 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7539 ee_value &= ~SEE_CLK;
7540 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7541 WR_HARPOON(p_port + hp_ee_ctrl, ee_value);
7542
7543 i >>= 1;
7544 }
8121} 7545}
8122 7546
8123static USHORT FPT_CalcCrc16(UCHAR buffer[]) 7547static unsigned short FPT_CalcCrc16(unsigned char buffer[])
8124{ 7548{
8125 USHORT crc=0; 7549 unsigned short crc = 0;
8126 int i,j; 7550 int i, j;
8127 USHORT ch; 7551 unsigned short ch;
8128 for (i=0; i < ID_STRING_LENGTH; i++) 7552 for (i = 0; i < ID_STRING_LENGTH; i++) {
8129 { 7553 ch = (unsigned short)buffer[i];
8130 ch = (USHORT) buffer[i]; 7554 for (j = 0; j < 8; j++) {
8131 for(j=0; j < 8; j++) 7555 if ((crc ^ ch) & 1)
8132 { 7556 crc = (crc >> 1) ^ CRCMASK;
8133 if ((crc ^ ch) & 1) 7557 else
8134 crc = (crc >> 1) ^ CRCMASK; 7558 crc >>= 1;
8135 else 7559 ch >>= 1;
8136 crc >>= 1; 7560 }
8137 ch >>= 1; 7561 }
8138 } 7562 return crc;
8139 }
8140 return(crc);
8141} 7563}
8142 7564
8143static UCHAR FPT_CalcLrc(UCHAR buffer[]) 7565static unsigned char FPT_CalcLrc(unsigned char buffer[])
8144{ 7566{
8145 int i; 7567 int i;
8146 UCHAR lrc; 7568 unsigned char lrc;
8147 lrc = 0; 7569 lrc = 0;
8148 for(i = 0; i < ID_STRING_LENGTH; i++) 7570 for (i = 0; i < ID_STRING_LENGTH; i++)
8149 lrc ^= buffer[i]; 7571 lrc ^= buffer[i];
8150 return(lrc); 7572 return lrc;
8151} 7573}
8152 7574
8153
8154
8155/* 7575/*
8156 The following inline definitions avoid type conflicts. 7576 The following inline definitions avoid type conflicts.
8157*/ 7577*/
@@ -8159,51 +7579,49 @@ static UCHAR FPT_CalcLrc(UCHAR buffer[])
8159static inline unsigned char 7579static inline unsigned char
8160FlashPoint__ProbeHostAdapter(struct FlashPoint_Info *FlashPointInfo) 7580FlashPoint__ProbeHostAdapter(struct FlashPoint_Info *FlashPointInfo)
8161{ 7581{
8162 return FlashPoint_ProbeHostAdapter((PSCCBMGR_INFO) FlashPointInfo); 7582 return FlashPoint_ProbeHostAdapter((struct sccb_mgr_info *)
7583 FlashPointInfo);
8163} 7584}
8164 7585
8165
8166static inline FlashPoint_CardHandle_T 7586static inline FlashPoint_CardHandle_T
8167FlashPoint__HardwareResetHostAdapter(struct FlashPoint_Info *FlashPointInfo) 7587FlashPoint__HardwareResetHostAdapter(struct FlashPoint_Info *FlashPointInfo)
8168{ 7588{
8169 return FlashPoint_HardwareResetHostAdapter((PSCCBMGR_INFO) FlashPointInfo); 7589 return FlashPoint_HardwareResetHostAdapter((struct sccb_mgr_info *)
7590 FlashPointInfo);
8170} 7591}
8171 7592
8172static inline void 7593static inline void
8173FlashPoint__ReleaseHostAdapter(FlashPoint_CardHandle_T CardHandle) 7594FlashPoint__ReleaseHostAdapter(FlashPoint_CardHandle_T CardHandle)
8174{ 7595{
8175 FlashPoint_ReleaseHostAdapter(CardHandle); 7596 FlashPoint_ReleaseHostAdapter(CardHandle);
8176} 7597}
8177 7598
8178
8179static inline void 7599static inline void
8180FlashPoint__StartCCB(FlashPoint_CardHandle_T CardHandle, struct BusLogic_CCB *CCB) 7600FlashPoint__StartCCB(FlashPoint_CardHandle_T CardHandle,
7601 struct BusLogic_CCB *CCB)
8181{ 7602{
8182 FlashPoint_StartCCB(CardHandle, (PSCCB) CCB); 7603 FlashPoint_StartCCB(CardHandle, (struct sccb *)CCB);
8183} 7604}
8184 7605
8185
8186static inline void 7606static inline void
8187FlashPoint__AbortCCB(FlashPoint_CardHandle_T CardHandle, struct BusLogic_CCB *CCB) 7607FlashPoint__AbortCCB(FlashPoint_CardHandle_T CardHandle,
7608 struct BusLogic_CCB *CCB)
8188{ 7609{
8189 FlashPoint_AbortCCB(CardHandle, (PSCCB) CCB); 7610 FlashPoint_AbortCCB(CardHandle, (struct sccb *)CCB);
8190} 7611}
8191 7612
8192
8193static inline boolean 7613static inline boolean
8194FlashPoint__InterruptPending(FlashPoint_CardHandle_T CardHandle) 7614FlashPoint__InterruptPending(FlashPoint_CardHandle_T CardHandle)
8195{ 7615{
8196 return FlashPoint_InterruptPending(CardHandle); 7616 return FlashPoint_InterruptPending(CardHandle);
8197} 7617}
8198 7618
8199
8200static inline int 7619static inline int
8201FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle) 7620FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle)
8202{ 7621{
8203 return FlashPoint_HandleInterrupt(CardHandle); 7622 return FlashPoint_HandleInterrupt(CardHandle);
8204} 7623}
8205 7624
8206
8207#define FlashPoint_ProbeHostAdapter FlashPoint__ProbeHostAdapter 7625#define FlashPoint_ProbeHostAdapter FlashPoint__ProbeHostAdapter
8208#define FlashPoint_HardwareResetHostAdapter FlashPoint__HardwareResetHostAdapter 7626#define FlashPoint_HardwareResetHostAdapter FlashPoint__HardwareResetHostAdapter
8209#define FlashPoint_ReleaseHostAdapter FlashPoint__ReleaseHostAdapter 7627#define FlashPoint_ReleaseHostAdapter FlashPoint__ReleaseHostAdapter
@@ -8212,9 +7630,7 @@ FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle)
8212#define FlashPoint_InterruptPending FlashPoint__InterruptPending 7630#define FlashPoint_InterruptPending FlashPoint__InterruptPending
8213#define FlashPoint_HandleInterrupt FlashPoint__HandleInterrupt 7631#define FlashPoint_HandleInterrupt FlashPoint__HandleInterrupt
8214 7632
8215 7633#else /* CONFIG_SCSI_OMIT_FLASHPOINT */
8216#else /* CONFIG_SCSI_OMIT_FLASHPOINT */
8217
8218 7634
8219/* 7635/*
8220 Define prototypes for the FlashPoint SCCB Manager Functions. 7636 Define prototypes for the FlashPoint SCCB Manager Functions.
@@ -8222,12 +7638,11 @@ FlashPoint__HandleInterrupt(FlashPoint_CardHandle_T CardHandle)
8222 7638
8223extern unsigned char FlashPoint_ProbeHostAdapter(struct FlashPoint_Info *); 7639extern unsigned char FlashPoint_ProbeHostAdapter(struct FlashPoint_Info *);
8224extern FlashPoint_CardHandle_T 7640extern FlashPoint_CardHandle_T
8225 FlashPoint_HardwareResetHostAdapter(struct FlashPoint_Info *); 7641FlashPoint_HardwareResetHostAdapter(struct FlashPoint_Info *);
8226extern void FlashPoint_StartCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *); 7642extern void FlashPoint_StartCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *);
8227extern int FlashPoint_AbortCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *); 7643extern int FlashPoint_AbortCCB(FlashPoint_CardHandle_T, struct BusLogic_CCB *);
8228extern boolean FlashPoint_InterruptPending(FlashPoint_CardHandle_T); 7644extern boolean FlashPoint_InterruptPending(FlashPoint_CardHandle_T);
8229extern int FlashPoint_HandleInterrupt(FlashPoint_CardHandle_T); 7645extern int FlashPoint_HandleInterrupt(FlashPoint_CardHandle_T);
8230extern void FlashPoint_ReleaseHostAdapter(FlashPoint_CardHandle_T); 7646extern void FlashPoint_ReleaseHostAdapter(FlashPoint_CardHandle_T);
8231 7647
8232 7648#endif /* CONFIG_SCSI_OMIT_FLASHPOINT */
8233#endif /* CONFIG_SCSI_OMIT_FLASHPOINT */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 02:34:29 -0500