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-rw-r--r--drivers/sbus/char/Kconfig7
-rw-r--r--drivers/sbus/char/Makefile1
-rw-r--r--drivers/sbus/char/aurora.c2364
-rw-r--r--drivers/sbus/char/aurora.h276
-rw-r--r--drivers/sbus/char/cd180.h240
5 files changed, 0 insertions, 2888 deletions
diff --git a/drivers/sbus/char/Kconfig b/drivers/sbus/char/Kconfig
index 3a8152906bf6..35a73168333f 100644
--- a/drivers/sbus/char/Kconfig
+++ b/drivers/sbus/char/Kconfig
@@ -46,13 +46,6 @@ config SUN_VIDEOPIX
46 based on the Phillips SAA9051, can handle NTSC and PAL/SECAM and 46 based on the Phillips SAA9051, can handle NTSC and PAL/SECAM and
47 SVIDEO signals. 47 SVIDEO signals.
48 48
49config SUN_AURORA
50 tristate "Aurora Multiboard 1600se (EXPERIMENTAL)"
51 depends on EXPERIMENTAL && BROKEN
52 help
53 The Aurora Multiboard is a multi-port high-speed serial controller.
54 If you have one of these, say Y.
55
56config TADPOLE_TS102_UCTRL 49config TADPOLE_TS102_UCTRL
57 tristate "Tadpole TS102 Microcontroller support (EXPERIMENTAL)" 50 tristate "Tadpole TS102 Microcontroller support (EXPERIMENTAL)"
58 depends on EXPERIMENTAL && SPARC32 51 depends on EXPERIMENTAL && SPARC32
diff --git a/drivers/sbus/char/Makefile b/drivers/sbus/char/Makefile
index 3a5ea1dc789a..7ab060e9a5fe 100644
--- a/drivers/sbus/char/Makefile
+++ b/drivers/sbus/char/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_SUN_OPENPROMIO) += openprom.o
19obj-$(CONFIG_SUN_MOSTEK_RTC) += rtc.o 19obj-$(CONFIG_SUN_MOSTEK_RTC) += rtc.o
20obj-$(CONFIG_SUN_BPP) += bpp.o 20obj-$(CONFIG_SUN_BPP) += bpp.o
21obj-$(CONFIG_SUN_VIDEOPIX) += vfc.o 21obj-$(CONFIG_SUN_VIDEOPIX) += vfc.o
22obj-$(CONFIG_SUN_AURORA) += aurora.o
23obj-$(CONFIG_TADPOLE_TS102_UCTRL) += uctrl.o 22obj-$(CONFIG_TADPOLE_TS102_UCTRL) += uctrl.o
24obj-$(CONFIG_SUN_JSFLASH) += jsflash.o 23obj-$(CONFIG_SUN_JSFLASH) += jsflash.o
25obj-$(CONFIG_BBC_I2C) += bbc.o 24obj-$(CONFIG_BBC_I2C) += bbc.o
diff --git a/drivers/sbus/char/aurora.c b/drivers/sbus/char/aurora.c
deleted file mode 100644
index a54b4ac67568..000000000000
--- a/drivers/sbus/char/aurora.c
+++ /dev/null
@@ -1,2364 +0,0 @@
1/* $Id: aurora.c,v 1.19 2002/01/08 16:00:16 davem Exp $
2 * linux/drivers/sbus/char/aurora.c -- Aurora multiport driver
3 *
4 * Copyright (c) 1999 by Oliver Aldulea (oli at bv dot ro)
5 *
6 * This code is based on the RISCom/8 multiport serial driver written
7 * by Dmitry Gorodchanin (pgmdsg@ibi.com), based on the Linux serial
8 * driver, written by Linus Torvalds, Theodore T'so and others.
9 * The Aurora multiport programming info was obtained mainly from the
10 * Cirrus Logic CD180 documentation (available on the web), and by
11 * doing heavy tests on the board. Many thanks to Eddie C. Dost for the
12 * help on the sbus interface.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 * Revision 1.0
29 *
30 * This is the first public release.
31 *
32 * Most of the information you need is in the aurora.h file. Please
33 * read that file before reading this one.
34 *
35 * Several parts of the code do not have comments yet.
36 *
37 * n.b. The board can support 115.2 bit rates, but only on a few
38 * ports. The total badwidth of one chip (ports 0-7 or 8-15) is equal
39 * to OSC_FREQ div 16. In case of my board, each chip can take 6
40 * channels of 115.2 kbaud. This information is not well-tested.
41 *
42 * Fixed to use tty_get_baud_rate().
43 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
44 */
45
46#include <linux/module.h>
47
48#include <linux/errno.h>
49#include <linux/sched.h>
50#ifdef AURORA_INT_DEBUG
51#include <linux/timer.h>
52#endif
53#include <linux/interrupt.h>
54#include <linux/tty.h>
55#include <linux/tty_flip.h>
56#include <linux/major.h>
57#include <linux/string.h>
58#include <linux/fcntl.h>
59#include <linux/mm.h>
60#include <linux/kernel.h>
61#include <linux/init.h>
62#include <linux/delay.h>
63#include <linux/bitops.h>
64
65#include <asm/io.h>
66#include <asm/irq.h>
67#include <asm/oplib.h>
68#include <asm/system.h>
69#include <asm/kdebug.h>
70#include <asm/sbus.h>
71#include <asm/uaccess.h>
72
73#include "aurora.h"
74#include "cd180.h"
75
76unsigned char irqs[4] = {
77 0, 0, 0, 0
78};
79
80#ifdef AURORA_INT_DEBUG
81int irqhit=0;
82#endif
83
84static struct tty_driver *aurora_driver;
85static struct Aurora_board aurora_board[AURORA_NBOARD] = {
86 {0,},
87};
88
89static struct Aurora_port aurora_port[AURORA_TNPORTS] = {
90 { 0, },
91};
92
93/* no longer used. static struct Aurora_board * IRQ_to_board[16] = { NULL, } ;*/
94static unsigned char * tmp_buf = NULL;
95
96DECLARE_TASK_QUEUE(tq_aurora);
97
98static inline int aurora_paranoia_check(struct Aurora_port const * port,
99 char *name, const char *routine)
100{
101#ifdef AURORA_PARANOIA_CHECK
102 static const char *badmagic =
103 KERN_DEBUG "aurora: Warning: bad aurora port magic number for device %s in %s\n";
104 static const char *badinfo =
105 KERN_DEBUG "aurora: Warning: null aurora port for device %s in %s\n";
106
107 if (!port) {
108 printk(badinfo, name, routine);
109 return 1;
110 }
111 if (port->magic != AURORA_MAGIC) {
112 printk(badmagic, name, routine);
113 return 1;
114 }
115#endif
116 return 0;
117}
118
119/*
120 *
121 * Service functions for aurora driver.
122 *
123 */
124
125/* Get board number from pointer */
126static inline int board_No (struct Aurora_board const * bp)
127{
128 return bp - aurora_board;
129}
130
131/* Get port number from pointer */
132static inline int port_No (struct Aurora_port const * port)
133{
134 return AURORA_PORT(port - aurora_port);
135}
136
137/* Get pointer to board from pointer to port */
138static inline struct Aurora_board * port_Board(struct Aurora_port const * port)
139{
140 return &aurora_board[AURORA_BOARD(port - aurora_port)];
141}
142
143/* Wait for Channel Command Register ready */
144static inline void aurora_wait_CCR(struct aurora_reg128 * r)
145{
146 unsigned long delay;
147
148#ifdef AURORA_DEBUG
149printk("aurora_wait_CCR\n");
150#endif
151 /* FIXME: need something more descriptive than 100000 :) */
152 for (delay = 100000; delay; delay--)
153 if (!sbus_readb(&r->r[CD180_CCR]))
154 return;
155 printk(KERN_DEBUG "aurora: Timeout waiting for CCR.\n");
156}
157
158/*
159 * aurora probe functions.
160 */
161
162/* Must be called with enabled interrupts */
163static inline void aurora_long_delay(unsigned long delay)
164{
165 unsigned long i;
166
167#ifdef AURORA_DEBUG
168 printk("aurora_long_delay: start\n");
169#endif
170 for (i = jiffies + delay; time_before(jiffies, i); ) ;
171#ifdef AURORA_DEBUG
172 printk("aurora_long_delay: end\n");
173#endif
174}
175
176/* Reset and setup CD180 chip */
177static int aurora_init_CD180(struct Aurora_board * bp, int chip)
178{
179 unsigned long flags;
180 int id;
181
182#ifdef AURORA_DEBUG
183 printk("aurora_init_CD180: start %d:%d\n",
184 board_No(bp), chip);
185#endif
186 save_flags(flags); cli();
187 sbus_writeb(0, &bp->r[chip]->r[CD180_CAR]);
188 sbus_writeb(0, &bp->r[chip]->r[CD180_GSVR]);
189
190 /* Wait for CCR ready */
191 aurora_wait_CCR(bp->r[chip]);
192
193 /* Reset CD180 chip */
194 sbus_writeb(CCR_HARDRESET, &bp->r[chip]->r[CD180_CCR]);
195 udelay(1);
196 sti();
197 id=1000;
198 while((--id) &&
199 (sbus_readb(&bp->r[chip]->r[CD180_GSVR])!=0xff))udelay(100);
200 if(!id) {
201 printk(KERN_ERR "aurora%d: Chip %d failed init.\n",
202 board_No(bp), chip);
203 restore_flags(flags);
204 return(-1);
205 }
206 cli();
207 sbus_writeb((board_No(bp)<<5)|((chip+1)<<3),
208 &bp->r[chip]->r[CD180_GSVR]); /* Set ID for this chip */
209 sbus_writeb(0x80|bp->ACK_MINT,
210 &bp->r[chip]->r[CD180_MSMR]); /* Prio for modem intr */
211 sbus_writeb(0x80|bp->ACK_TINT,
212 &bp->r[chip]->r[CD180_TSMR]); /* Prio for transmitter intr */
213 sbus_writeb(0x80|bp->ACK_RINT,
214 &bp->r[chip]->r[CD180_RSMR]); /* Prio for receiver intr */
215 /* Setting up prescaler. We need 4 tick per 1 ms */
216 sbus_writeb((bp->oscfreq/(1000000/AURORA_TPS)) >> 8,
217 &bp->r[chip]->r[CD180_PPRH]);
218 sbus_writeb((bp->oscfreq/(1000000/AURORA_TPS)) & 0xff,
219 &bp->r[chip]->r[CD180_PPRL]);
220
221 sbus_writeb(SRCR_AUTOPRI|SRCR_GLOBPRI,
222 &bp->r[chip]->r[CD180_SRCR]);
223
224 id = sbus_readb(&bp->r[chip]->r[CD180_GFRCR]);
225 printk(KERN_INFO "aurora%d: Chip %d id %02x: ",
226 board_No(bp), chip,id);
227 if(sbus_readb(&bp->r[chip]->r[CD180_SRCR]) & 128) {
228 switch (id) {
229 case 0x82:printk("CL-CD1864 rev A\n");break;
230 case 0x83:printk("CL-CD1865 rev A\n");break;
231 case 0x84:printk("CL-CD1865 rev B\n");break;
232 case 0x85:printk("CL-CD1865 rev C\n");break;
233 default:printk("Unknown.\n");
234 };
235 } else {
236 switch (id) {
237 case 0x81:printk("CL-CD180 rev B\n");break;
238 case 0x82:printk("CL-CD180 rev C\n");break;
239 default:printk("Unknown.\n");
240 };
241 }
242 restore_flags(flags);
243#ifdef AURORA_DEBUG
244 printk("aurora_init_CD180: end\n");
245#endif
246 return 0;
247}
248
249static int valid_irq(unsigned char irq)
250{
251int i;
252for(i=0;i<TYPE_1_IRQS;i++)
253 if (type_1_irq[i]==irq) return 1;
254return 0;
255}
256
257static irqreturn_t aurora_interrupt(int irq, void * dev_id);
258
259/* Main probing routine, also sets irq. */
260static int aurora_probe(void)
261{
262 struct sbus_bus *sbus;
263 struct sbus_dev *sdev;
264 int grrr;
265 char buf[30];
266 int bn = 0;
267 struct Aurora_board *bp;
268
269 for_each_sbus(sbus) {
270 for_each_sbusdev(sdev, sbus) {
271/* printk("Try: %x %s\n",sdev,sdev->prom_name);*/
272 if (!strcmp(sdev->prom_name, "sio16")) {
273#ifdef AURORA_DEBUG
274 printk(KERN_INFO "aurora: sio16 at %p\n",sdev);
275#endif
276 if((sdev->reg_addrs[0].reg_size!=1) &&
277 (sdev->reg_addrs[1].reg_size!=128) &&
278 (sdev->reg_addrs[2].reg_size!=128) &&
279 (sdev->reg_addrs[3].reg_size!=4)) {
280 printk(KERN_ERR "aurora%d: registers' sizes "
281 "do not match.\n", bn);
282 break;
283 }
284 bp = &aurora_board[bn];
285 bp->r0 = (struct aurora_reg1 *)
286 sbus_ioremap(&sdev->resource[0], 0,
287 sdev->reg_addrs[0].reg_size,
288 "sio16");
289 if (bp->r0 == NULL) {
290 printk(KERN_ERR "aurora%d: can't map "
291 "reg_addrs[0]\n", bn);
292 break;
293 }
294#ifdef AURORA_DEBUG
295 printk("Map reg 0: %p\n", bp->r0);
296#endif
297 bp->r[0] = (struct aurora_reg128 *)
298 sbus_ioremap(&sdev->resource[1], 0,
299 sdev->reg_addrs[1].reg_size,
300 "sio16");
301 if (bp->r[0] == NULL) {
302 printk(KERN_ERR "aurora%d: can't map "
303 "reg_addrs[1]\n", bn);
304 break;
305 }
306#ifdef AURORA_DEBUG
307 printk("Map reg 1: %p\n", bp->r[0]);
308#endif
309 bp->r[1] = (struct aurora_reg128 *)
310 sbus_ioremap(&sdev->resource[2], 0,
311 sdev->reg_addrs[2].reg_size,
312 "sio16");
313 if (bp->r[1] == NULL) {
314 printk(KERN_ERR "aurora%d: can't map "
315 "reg_addrs[2]\n", bn);
316 break;
317 }
318#ifdef AURORA_DEBUG
319 printk("Map reg 2: %p\n", bp->r[1]);
320#endif
321 bp->r3 = (struct aurora_reg4 *)
322 sbus_ioremap(&sdev->resource[3], 0,
323 sdev->reg_addrs[3].reg_size,
324 "sio16");
325 if (bp->r3 == NULL) {
326 printk(KERN_ERR "aurora%d: can't map "
327 "reg_addrs[3]\n", bn);
328 break;
329 }
330#ifdef AURORA_DEBUG
331 printk("Map reg 3: %p\n", bp->r3);
332#endif
333 /* Variables setup */
334 bp->flags = 0;
335#ifdef AURORA_DEBUG
336 grrr=prom_getint(sdev->prom_node,"intr");
337 printk("intr pri %d\n", grrr);
338#endif
339 if ((bp->irq=irqs[bn]) && valid_irq(bp->irq) &&
340 !request_irq(bp->irq|0x30, aurora_interrupt, IRQF_SHARED, "sio16", bp)) {
341 free_irq(bp->irq|0x30, bp);
342 } else
343 if ((bp->irq=prom_getint(sdev->prom_node, "bintr")) && valid_irq(bp->irq) &&
344 !request_irq(bp->irq|0x30, aurora_interrupt, IRQF_SHARED, "sio16", bp)) {
345 free_irq(bp->irq|0x30, bp);
346 } else
347 if ((bp->irq=prom_getint(sdev->prom_node, "intr")) && valid_irq(bp->irq) &&
348 !request_irq(bp->irq|0x30, aurora_interrupt, IRQF_SHARED, "sio16", bp)) {
349 free_irq(bp->irq|0x30, bp);
350 } else
351 for(grrr=0;grrr<TYPE_1_IRQS;grrr++) {
352 if ((bp->irq=type_1_irq[grrr])&&!request_irq(bp->irq|0x30, aurora_interrupt, IRQF_SHARED, "sio16", bp)) {
353 free_irq(bp->irq|0x30, bp);
354 break;
355 } else {
356 printk(KERN_ERR "aurora%d: Could not get an irq for this board !!!\n",bn);
357 bp->flags=0xff;
358 }
359 }
360 if(bp->flags==0xff)break;
361 printk(KERN_INFO "aurora%d: irq %d\n",bn,bp->irq&0x0f);
362 buf[0]=0;
363 grrr=prom_getproperty(sdev->prom_node,"dtr_rts",buf,sizeof(buf));
364 if(!strcmp(buf,"swapped")){
365 printk(KERN_INFO "aurora%d: Swapped DTR and RTS\n",bn);
366 bp->DTR=MSVR_RTS;
367 bp->RTS=MSVR_DTR;
368 bp->MSVDTR=CD180_MSVRTS;
369 bp->MSVRTS=CD180_MSVDTR;
370 bp->flags|=AURORA_BOARD_DTR_FLOW_OK;
371 }else{
372 #ifdef AURORA_FORCE_DTR_FLOW
373 printk(KERN_INFO "aurora%d: Forcing swapped DTR-RTS\n",bn);
374 bp->DTR=MSVR_RTS;
375 bp->RTS=MSVR_DTR;
376 bp->MSVDTR=CD180_MSVRTS;
377 bp->MSVRTS=CD180_MSVDTR;
378 bp->flags|=AURORA_BOARD_DTR_FLOW_OK;
379 #else
380 printk(KERN_INFO "aurora%d: Normal DTR and RTS\n",bn);
381 bp->DTR=MSVR_DTR;
382 bp->RTS=MSVR_RTS;
383 bp->MSVDTR=CD180_MSVDTR;
384 bp->MSVRTS=CD180_MSVRTS;
385 #endif
386 }
387 bp->oscfreq=prom_getint(sdev->prom_node,"clk")*100;
388 printk(KERN_INFO "aurora%d: Oscillator: %d Hz\n",bn,bp->oscfreq);
389 grrr=prom_getproperty(sdev->prom_node,"chip",buf,sizeof(buf));
390 printk(KERN_INFO "aurora%d: Chips: %s\n",bn,buf);
391 grrr=prom_getproperty(sdev->prom_node,"manu",buf,sizeof(buf));
392 printk(KERN_INFO "aurora%d: Manufacturer: %s\n",bn,buf);
393 grrr=prom_getproperty(sdev->prom_node,"model",buf,sizeof(buf));
394 printk(KERN_INFO "aurora%d: Model: %s\n",bn,buf);
395 grrr=prom_getproperty(sdev->prom_node,"rev",buf,sizeof(buf));
396 printk(KERN_INFO "aurora%d: Revision: %s\n",bn,buf);
397 grrr=prom_getproperty(sdev->prom_node,"mode",buf,sizeof(buf));
398 printk(KERN_INFO "aurora%d: Mode: %s\n",bn,buf);
399 #ifdef MODULE
400 bp->count=0;
401 #endif
402 bp->flags = AURORA_BOARD_PRESENT;
403 /* hardware ack */
404 bp->ACK_MINT=1;
405 bp->ACK_TINT=2;
406 bp->ACK_RINT=3;
407 bn++;
408 }
409 }
410 }
411 return bn;
412}
413
414static void aurora_release_io_range(struct Aurora_board *bp)
415{
416 sbus_iounmap((unsigned long)bp->r0, 1);
417 sbus_iounmap((unsigned long)bp->r[0], 128);
418 sbus_iounmap((unsigned long)bp->r[1], 128);
419 sbus_iounmap((unsigned long)bp->r3, 4);
420}
421
422static inline void aurora_mark_event(struct Aurora_port * port, int event)
423{
424#ifdef AURORA_DEBUG
425 printk("aurora_mark_event: start\n");
426#endif
427 set_bit(event, &port->event);
428 queue_task(&port->tqueue, &tq_aurora);
429 mark_bh(AURORA_BH);
430#ifdef AURORA_DEBUG
431 printk("aurora_mark_event: end\n");
432#endif
433}
434
435static __inline__ struct Aurora_port * aurora_get_port(struct Aurora_board const * bp,
436 int chip,
437 unsigned char const *what)
438{
439 unsigned char channel;
440 struct Aurora_port * port;
441
442 channel = ((chip << 3) |
443 ((sbus_readb(&bp->r[chip]->r[CD180_GSCR]) & GSCR_CHAN) >> GSCR_CHAN_OFF));
444 port = &aurora_port[board_No(bp) * AURORA_NPORT * AURORA_NCD180 + channel];
445 if (port->flags & ASYNC_INITIALIZED)
446 return port;
447
448 printk(KERN_DEBUG "aurora%d: %s interrupt from invalid port %d\n",
449 board_No(bp), what, channel);
450 return NULL;
451}
452
453static void aurora_receive_exc(struct Aurora_board const * bp, int chip)
454{
455 struct Aurora_port *port;
456 struct tty_struct *tty;
457 unsigned char status;
458 unsigned char ch;
459
460 if (!(port = aurora_get_port(bp, chip, "Receive_x")))
461 return;
462
463 tty = port->tty;
464 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
465#ifdef AURORA_INTNORM
466 printk("aurora%d: port %d: Working around flip buffer overflow.\n",
467 board_No(bp), port_No(port));
468#endif
469 return;
470 }
471
472#ifdef AURORA_REPORT_OVERRUN
473 status = sbus_readb(&bp->r[chip]->r[CD180_RCSR]);
474 if (status & RCSR_OE) {
475 port->overrun++;
476#if 1
477 printk("aurora%d: port %d: Overrun. Total %ld overruns.\n",
478 board_No(bp), port_No(port), port->overrun);
479#endif
480 }
481 status &= port->mark_mask;
482#else
483 status = sbus_readb(&bp->r[chip]->r[CD180_RCSR]) & port->mark_mask;
484#endif
485 ch = sbus_readb(&bp->r[chip]->r[CD180_RDR]);
486 if (!status)
487 return;
488
489 if (status & RCSR_TOUT) {
490/* printk("aurora%d: port %d: Receiver timeout. Hardware problems ?\n",
491 board_No(bp), port_No(port));*/
492 return;
493
494 } else if (status & RCSR_BREAK) {
495 printk(KERN_DEBUG "aurora%d: port %d: Handling break...\n",
496 board_No(bp), port_No(port));
497 *tty->flip.flag_buf_ptr++ = TTY_BREAK;
498 if (port->flags & ASYNC_SAK)
499 do_SAK(tty);
500
501 } else if (status & RCSR_PE)
502 *tty->flip.flag_buf_ptr++ = TTY_PARITY;
503
504 else if (status & RCSR_FE)
505 *tty->flip.flag_buf_ptr++ = TTY_FRAME;
506
507 else if (status & RCSR_OE)
508 *tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
509
510 else
511 *tty->flip.flag_buf_ptr++ = 0;
512
513 *tty->flip.char_buf_ptr++ = ch;
514 tty->flip.count++;
515 queue_task(&tty->flip.tqueue, &tq_timer);
516}
517
518static void aurora_receive(struct Aurora_board const * bp, int chip)
519{
520 struct Aurora_port *port;
521 struct tty_struct *tty;
522 unsigned char count,cnt;
523
524 if (!(port = aurora_get_port(bp, chip, "Receive")))
525 return;
526
527 tty = port->tty;
528
529 count = sbus_readb(&bp->r[chip]->r[CD180_RDCR]);
530
531#ifdef AURORA_REPORT_FIFO
532 port->hits[count > 8 ? 9 : count]++;
533#endif
534
535 while (count--) {
536 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
537#ifdef AURORA_INTNORM
538 printk("aurora%d: port %d: Working around flip buffer overflow.\n",
539 board_No(bp), port_No(port));
540#endif
541 break;
542 }
543 cnt = sbus_readb(&bp->r[chip]->r[CD180_RDR]);
544 *tty->flip.char_buf_ptr++ = cnt;
545 *tty->flip.flag_buf_ptr++ = 0;
546 tty->flip.count++;
547 }
548 queue_task(&tty->flip.tqueue, &tq_timer);
549}
550
551static void aurora_transmit(struct Aurora_board const * bp, int chip)
552{
553 struct Aurora_port *port;
554 struct tty_struct *tty;
555 unsigned char count;
556
557 if (!(port = aurora_get_port(bp, chip, "Transmit")))
558 return;
559
560 tty = port->tty;
561
562 if (port->SRER & SRER_TXEMPTY) {
563 /* FIFO drained */
564 sbus_writeb(port_No(port) & 7,
565 &bp->r[chip]->r[CD180_CAR]);
566 udelay(1);
567 port->SRER &= ~SRER_TXEMPTY;
568 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
569 return;
570 }
571
572 if ((port->xmit_cnt <= 0 && !port->break_length)
573 || tty->stopped || tty->hw_stopped) {
574 sbus_writeb(port_No(port) & 7,
575 &bp->r[chip]->r[CD180_CAR]);
576 udelay(1);
577 port->SRER &= ~SRER_TXRDY;
578 sbus_writeb(port->SRER,
579 &bp->r[chip]->r[CD180_SRER]);
580 return;
581 }
582
583 if (port->break_length) {
584 if (port->break_length > 0) {
585 if (port->COR2 & COR2_ETC) {
586 sbus_writeb(CD180_C_ESC,
587 &bp->r[chip]->r[CD180_TDR]);
588 sbus_writeb(CD180_C_SBRK,
589 &bp->r[chip]->r[CD180_TDR]);
590 port->COR2 &= ~COR2_ETC;
591 }
592 count = min(port->break_length, 0xff);
593 sbus_writeb(CD180_C_ESC,
594 &bp->r[chip]->r[CD180_TDR]);
595 sbus_writeb(CD180_C_DELAY,
596 &bp->r[chip]->r[CD180_TDR]);
597 sbus_writeb(count,
598 &bp->r[chip]->r[CD180_TDR]);
599 if (!(port->break_length -= count))
600 port->break_length--;
601 } else {
602 sbus_writeb(CD180_C_ESC,
603 &bp->r[chip]->r[CD180_TDR]);
604 sbus_writeb(CD180_C_EBRK,
605 &bp->r[chip]->r[CD180_TDR]);
606 sbus_writeb(port->COR2,
607 &bp->r[chip]->r[CD180_COR2]);
608 aurora_wait_CCR(bp->r[chip]);
609 sbus_writeb(CCR_CORCHG2,
610 &bp->r[chip]->r[CD180_CCR]);
611 port->break_length = 0;
612 }
613 return;
614 }
615
616 count = CD180_NFIFO;
617 do {
618 u8 byte = port->xmit_buf[port->xmit_tail++];
619
620 sbus_writeb(byte, &bp->r[chip]->r[CD180_TDR]);
621 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1);
622 if (--port->xmit_cnt <= 0)
623 break;
624 } while (--count > 0);
625
626 if (port->xmit_cnt <= 0) {
627 sbus_writeb(port_No(port) & 7,
628 &bp->r[chip]->r[CD180_CAR]);
629 udelay(1);
630 port->SRER &= ~SRER_TXRDY;
631 sbus_writeb(port->SRER,
632 &bp->r[chip]->r[CD180_SRER]);
633 }
634 if (port->xmit_cnt <= port->wakeup_chars)
635 aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
636}
637
638static void aurora_check_modem(struct Aurora_board const * bp, int chip)
639{
640 struct Aurora_port *port;
641 struct tty_struct *tty;
642 unsigned char mcr;
643
644 if (!(port = aurora_get_port(bp, chip, "Modem")))
645 return;
646
647 tty = port->tty;
648
649 mcr = sbus_readb(&bp->r[chip]->r[CD180_MCR]);
650 if (mcr & MCR_CDCHG) {
651 if (sbus_readb(&bp->r[chip]->r[CD180_MSVR]) & MSVR_CD)
652 wake_up_interruptible(&port->open_wait);
653 else
654 schedule_task(&port->tqueue_hangup);
655 }
656
657/* We don't have such things yet. My aurora board has DTR and RTS swapped, but that doesn't count in this driver. Let's hope
658 * Aurora didn't made any boards with CTS or DSR broken...
659 */
660/* #ifdef AURORA_BRAIN_DAMAGED_CTS
661 if (mcr & MCR_CTSCHG) {
662 if (aurora_in(bp, CD180_MSVR) & MSVR_CTS) {
663 tty->hw_stopped = 0;
664 port->SRER |= SRER_TXRDY;
665 if (port->xmit_cnt <= port->wakeup_chars)
666 aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
667 } else {
668 tty->hw_stopped = 1;
669 port->SRER &= ~SRER_TXRDY;
670 }
671 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
672 }
673 if (mcr & MCR_DSRCHG) {
674 if (aurora_in(bp, CD180_MSVR) & MSVR_DSR) {
675 tty->hw_stopped = 0;
676 port->SRER |= SRER_TXRDY;
677 if (port->xmit_cnt <= port->wakeup_chars)
678 aurora_mark_event(port, RS_EVENT_WRITE_WAKEUP);
679 } else {
680 tty->hw_stopped = 1;
681 port->SRER &= ~SRER_TXRDY;
682 }
683 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
684 }
685#endif AURORA_BRAIN_DAMAGED_CTS */
686
687 /* Clear change bits */
688 sbus_writeb(0, &bp->r[chip]->r[CD180_MCR]);
689}
690
691/* The main interrupt processing routine */
692static irqreturn_t aurora_interrupt(int irq, void * dev_id)
693{
694 unsigned char status;
695 unsigned char ack,chip/*,chip_id*/;
696 struct Aurora_board * bp = (struct Aurora_board *) dev_id;
697 unsigned long loop = 0;
698
699#ifdef AURORA_INT_DEBUG
700 printk("IRQ%d %d\n",irq,++irqhit);
701#ifdef AURORA_FLOODPRO
702 if (irqhit>=AURORA_FLOODPRO)
703 sbus_writeb(8, &bp->r0->r);
704#endif
705#endif
706
707/* old bp = IRQ_to_board[irq&0x0f];*/
708
709 if (!bp || !(bp->flags & AURORA_BOARD_ACTIVE))
710 return IRQ_NONE;
711
712/* The while() below takes care of this.
713 status = sbus_readb(&bp->r[0]->r[CD180_SRSR]);
714#ifdef AURORA_INT_DEBUG
715 printk("mumu: %02x\n", status);
716#endif
717 if (!(status&SRSR_ANYINT))
718 return IRQ_NONE; * Nobody has anything to say, so exit *
719*/
720 while ((loop++ < 48) &&
721 (status = sbus_readb(&bp->r[0]->r[CD180_SRSR]) & SRSR_ANYINT)){
722#ifdef AURORA_INT_DEBUG
723 printk("SRSR: %02x\n", status);
724#endif
725 if (status & SRSR_REXT) {
726 ack = sbus_readb(&bp->r3->r[bp->ACK_RINT]);
727#ifdef AURORA_INT_DEBUG
728 printk("R-ACK %02x\n", ack);
729#endif
730 if ((ack >> 5) == board_No(bp)) {
731 if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
732 if ((ack&GSVR_ITMASK)==GSVR_IT_RGD) {
733 aurora_receive(bp,chip);
734 sbus_writeb(0,
735 &bp->r[chip]->r[CD180_EOSRR]);
736 } else if ((ack & GSVR_ITMASK) == GSVR_IT_REXC) {
737 aurora_receive_exc(bp,chip);
738 sbus_writeb(0,
739 &bp->r[chip]->r[CD180_EOSRR]);
740 }
741 }
742 }
743 } else if (status & SRSR_TEXT) {
744 ack = sbus_readb(&bp->r3->r[bp->ACK_TINT]);
745#ifdef AURORA_INT_DEBUG
746 printk("T-ACK %02x\n", ack);
747#endif
748 if ((ack >> 5) == board_No(bp)) {
749 if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
750 if ((ack&GSVR_ITMASK)==GSVR_IT_TX) {
751 aurora_transmit(bp,chip);
752 sbus_writeb(0,
753 &bp->r[chip]->r[CD180_EOSRR]);
754 }
755 }
756 }
757 } else if (status & SRSR_MEXT) {
758 ack = sbus_readb(&bp->r3->r[bp->ACK_MINT]);
759#ifdef AURORA_INT_DEBUG
760 printk("M-ACK %02x\n", ack);
761#endif
762 if ((ack >> 5) == board_No(bp)) {
763 if ((chip = ((ack>>3)&3)-1) < AURORA_NCD180) {
764 if ((ack&GSVR_ITMASK)==GSVR_IT_MDM) {
765 aurora_check_modem(bp,chip);
766 sbus_writeb(0,
767 &bp->r[chip]->r[CD180_EOSRR]);
768 }
769 }
770 }
771 }
772 }
773/* I guess this faster code can be used with CD1865, using AUROPRI and GLOBPRI. */
774#if 0
775 while ((loop++ < 48)&&(status=bp->r[0]->r[CD180_SRSR]&SRSR_ANYINT)){
776#ifdef AURORA_INT_DEBUG
777 printk("SRSR: %02x\n",status);
778#endif
779 ack = sbus_readb(&bp->r3->r[0]);
780#ifdef AURORA_INT_DEBUG
781 printk("ACK: %02x\n",ack);
782#endif
783 if ((ack>>5)==board_No(bp)) {
784 if ((chip=((ack>>3)&3)-1) < AURORA_NCD180) {
785 ack&=GSVR_ITMASK;
786 if (ack==GSVR_IT_RGD) {
787 aurora_receive(bp,chip);
788 sbus_writeb(0,
789 &bp->r[chip]->r[CD180_EOSRR]);
790 } else if (ack==GSVR_IT_REXC) {
791 aurora_receive_exc(bp,chip);
792 sbus_writeb(0,
793 &bp->r[chip]->r[CD180_EOSRR]);
794 } else if (ack==GSVR_IT_TX) {
795 aurora_transmit(bp,chip);
796 sbus_writeb(0,
797 &bp->r[chip]->r[CD180_EOSRR]);
798 } else if (ack==GSVR_IT_MDM) {
799 aurora_check_modem(bp,chip);
800 sbus_writeb(0,
801 &bp->r[chip]->r[CD180_EOSRR]);
802 }
803 }
804 }
805 }
806#endif
807
808/* This is the old handling routine, used in riscom8 for only one CD180. I keep it here for reference. */
809#if 0
810 for(chip=0;chip<AURORA_NCD180;chip++){
811 chip_id=(board_No(bp)<<5)|((chip+1)<<3);
812 loop=0;
813 while ((loop++ < 1) &&
814 ((status = sbus_readb(&bp->r[chip]->r[CD180_SRSR])) &
815 (SRSR_TEXT | SRSR_MEXT | SRSR_REXT))) {
816
817 if (status & SRSR_REXT) {
818 ack = sbus_readb(&bp->r3->r[bp->ACK_RINT]);
819 if (ack == (chip_id | GSVR_IT_RGD)) {
820#ifdef AURORA_INTMSG
821 printk("RX ACK\n");
822#endif
823 aurora_receive(bp,chip);
824 } else if (ack == (chip_id | GSVR_IT_REXC)) {
825#ifdef AURORA_INTMSG
826 printk("RXC ACK\n");
827#endif
828 aurora_receive_exc(bp,chip);
829 } else {
830#ifdef AURORA_INTNORM
831 printk("aurora%d-%d: Bad receive ack 0x%02x.\n",
832 board_No(bp), chip, ack);
833#endif
834 }
835 } else if (status & SRSR_TEXT) {
836 ack = sbus_readb(&bp->r3->r[bp->ACK_TINT]);
837 if (ack == (chip_id | GSVR_IT_TX)){
838#ifdef AURORA_INTMSG
839 printk("TX ACK\n");
840#endif
841 aurora_transmit(bp,chip);
842 } else {
843#ifdef AURORA_INTNORM
844 printk("aurora%d-%d: Bad transmit ack 0x%02x.\n",
845 board_No(bp), chip, ack);
846#endif
847 }
848 } else if (status & SRSR_MEXT) {
849 ack = sbus_readb(&bp->r3->r[bp->ACK_MINT]);
850 if (ack == (chip_id | GSVR_IT_MDM)){
851#ifdef AURORA_INTMSG
852 printk("MDM ACK\n");
853#endif
854 aurora_check_modem(bp,chip);
855 } else {
856#ifdef AURORA_INTNORM
857 printk("aurora%d-%d: Bad modem ack 0x%02x.\n",
858 board_No(bp), chip, ack);
859#endif
860 }
861 }
862 sbus_writeb(0, &bp->r[chip]->r[CD180_EOSRR]);
863 }
864 }
865#endif
866
867 return IRQ_HANDLED;
868}
869
870#ifdef AURORA_INT_DEBUG
871static void aurora_timer (unsigned long ignored);
872
873static DEFINE_TIMER(aurora_poll_timer, aurora_timer, 0, 0);
874
875static void
876aurora_timer (unsigned long ignored)
877{
878 unsigned long flags;
879 int i;
880
881 save_flags(flags); cli();
882
883 printk("SRSR: %02x,%02x - ",
884 sbus_readb(&aurora_board[0].r[0]->r[CD180_SRSR]),
885 sbus_readb(&aurora_board[0].r[1]->r[CD180_SRSR]));
886 for (i = 0; i < 4; i++) {
887 udelay(1);
888 printk("%02x ",
889 sbus_readb(&aurora_board[0].r3->r[i]));
890 }
891 printk("\n");
892
893 aurora_poll_timer.expires = jiffies + 300;
894 add_timer (&aurora_poll_timer);
895
896 restore_flags(flags);
897}
898#endif
899
900/*
901 * Routines for open & close processing.
902 */
903
904/* Called with disabled interrupts */
905static int aurora_setup_board(struct Aurora_board * bp)
906{
907 int error;
908
909#ifdef AURORA_ALLIRQ
910 int i;
911 for (i = 0; i < AURORA_ALLIRQ; i++) {
912 error = request_irq(allirq[i]|0x30, aurora_interrupt, IRQF_SHARED,
913 "sio16", bp);
914 if (error)
915 printk(KERN_ERR "IRQ%d request error %d\n",
916 allirq[i], error);
917 }
918#else
919 error = request_irq(bp->irq|0x30, aurora_interrupt, IRQF_SHARED,
920 "sio16", bp);
921 if (error) {
922 printk(KERN_ERR "IRQ request error %d\n", error);
923 return error;
924 }
925#endif
926 /* Board reset */
927 sbus_writeb(0, &bp->r0->r);
928 udelay(1);
929 if (bp->flags & AURORA_BOARD_TYPE_2) {
930 /* unknown yet */
931 } else {
932 sbus_writeb((AURORA_CFG_ENABLE_IO | AURORA_CFG_ENABLE_IRQ |
933 (((bp->irq)&0x0f)>>2)),
934 &bp->r0->r);
935 }
936 udelay(10000);
937
938 if (aurora_init_CD180(bp,0))error=1;error=0;
939 if (aurora_init_CD180(bp,1))error++;
940 if (error == AURORA_NCD180) {
941 printk(KERN_ERR "Both chips failed initialisation.\n");
942 return -EIO;
943 }
944
945#ifdef AURORA_INT_DEBUG
946 aurora_poll_timer.expires= jiffies + 1;
947 add_timer(&aurora_poll_timer);
948#endif
949#ifdef AURORA_DEBUG
950 printk("aurora_setup_board: end\n");
951#endif
952 return 0;
953}
954
955/* Called with disabled interrupts */
956static void aurora_shutdown_board(struct Aurora_board *bp)
957{
958 int i;
959
960#ifdef AURORA_DEBUG
961 printk("aurora_shutdown_board: start\n");
962#endif
963
964#ifdef AURORA_INT_DEBUG
965 del_timer(&aurora_poll_timer);
966#endif
967
968#ifdef AURORA_ALLIRQ
969 for(i=0;i<AURORA_ALLIRQ;i++){
970 free_irq(allirq[i]|0x30, bp);
971/* IRQ_to_board[allirq[i]&0xf] = NULL;*/
972 }
973#else
974 free_irq(bp->irq|0x30, bp);
975/* IRQ_to_board[bp->irq&0xf] = NULL;*/
976#endif
977 /* Drop all DTR's */
978 for(i=0;i<16;i++){
979 sbus_writeb(i & 7, &bp->r[i>>3]->r[CD180_CAR]);
980 udelay(1);
981 sbus_writeb(0, &bp->r[i>>3]->r[CD180_MSVR]);
982 udelay(1);
983 }
984 /* Board shutdown */
985 sbus_writeb(0, &bp->r0->r);
986
987#ifdef AURORA_DEBUG
988 printk("aurora_shutdown_board: end\n");
989#endif
990}
991
992/* Setting up port characteristics.
993 * Must be called with disabled interrupts
994 */
995static void aurora_change_speed(struct Aurora_board *bp, struct Aurora_port *port)
996{
997 struct tty_struct *tty;
998 unsigned long baud;
999 long tmp;
1000 unsigned char cor1 = 0, cor3 = 0;
1001 unsigned char mcor1 = 0, mcor2 = 0,chip;
1002
1003#ifdef AURORA_DEBUG
1004 printk("aurora_change_speed: start\n");
1005#endif
1006 if (!(tty = port->tty) || !tty->termios)
1007 return;
1008
1009 chip = AURORA_CD180(port_No(port));
1010
1011 port->SRER = 0;
1012 port->COR2 = 0;
1013 port->MSVR = MSVR_RTS|MSVR_DTR;
1014
1015 baud = tty_get_baud_rate(tty);
1016
1017 /* Select port on the board */
1018 sbus_writeb(port_No(port) & 7,
1019 &bp->r[chip]->r[CD180_CAR]);
1020 udelay(1);
1021
1022 if (!baud) {
1023 /* Drop DTR & exit */
1024 port->MSVR &= ~(bp->DTR|bp->RTS);
1025 sbus_writeb(port->MSVR,
1026 &bp->r[chip]->r[CD180_MSVR]);
1027 return;
1028 } else {
1029 /* Set DTR on */
1030 port->MSVR |= bp->DTR;
1031 sbus_writeb(port->MSVR,
1032 &bp->r[chip]->r[CD180_MSVR]);
1033 }
1034
1035 /* Now we must calculate some speed dependent things. */
1036
1037 /* Set baud rate for port. */
1038 tmp = (((bp->oscfreq + baud/2) / baud +
1039 CD180_TPC/2) / CD180_TPC);
1040
1041/* tmp = (bp->oscfreq/7)/baud;
1042 if((tmp%10)>4)tmp=tmp/10+1;else tmp=tmp/10;*/
1043/* printk("Prescaler period: %d\n",tmp);*/
1044
1045 sbus_writeb((tmp >> 8) & 0xff,
1046 &bp->r[chip]->r[CD180_RBPRH]);
1047 sbus_writeb((tmp >> 8) & 0xff,
1048 &bp->r[chip]->r[CD180_TBPRH]);
1049 sbus_writeb(tmp & 0xff, &bp->r[chip]->r[CD180_RBPRL]);
1050 sbus_writeb(tmp & 0xff, &bp->r[chip]->r[CD180_TBPRL]);
1051
1052 baud = (baud + 5) / 10; /* Estimated CPS */
1053
1054 /* Two timer ticks seems enough to wakeup something like SLIP driver */
1055 tmp = ((baud + HZ/2) / HZ) * 2 - CD180_NFIFO;
1056 port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ?
1057 SERIAL_XMIT_SIZE - 1 : tmp);
1058
1059 /* Receiver timeout will be transmission time for 1.5 chars */
1060 tmp = (AURORA_TPS + AURORA_TPS/2 + baud/2) / baud;
1061 tmp = (tmp > 0xff) ? 0xff : tmp;
1062 sbus_writeb(tmp, &bp->r[chip]->r[CD180_RTPR]);
1063
1064 switch (C_CSIZE(tty)) {
1065 case CS5:
1066 cor1 |= COR1_5BITS;
1067 break;
1068 case CS6:
1069 cor1 |= COR1_6BITS;
1070 break;
1071 case CS7:
1072 cor1 |= COR1_7BITS;
1073 break;
1074 case CS8:
1075 cor1 |= COR1_8BITS;
1076 break;
1077 }
1078
1079 if (C_CSTOPB(tty))
1080 cor1 |= COR1_2SB;
1081
1082 cor1 |= COR1_IGNORE;
1083 if (C_PARENB(tty)) {
1084 cor1 |= COR1_NORMPAR;
1085 if (C_PARODD(tty))
1086 cor1 |= COR1_ODDP;
1087 if (I_INPCK(tty))
1088 cor1 &= ~COR1_IGNORE;
1089 }
1090 /* Set marking of some errors */
1091 port->mark_mask = RCSR_OE | RCSR_TOUT;
1092 if (I_INPCK(tty))
1093 port->mark_mask |= RCSR_FE | RCSR_PE;
1094 if (I_BRKINT(tty) || I_PARMRK(tty))
1095 port->mark_mask |= RCSR_BREAK;
1096 if (I_IGNPAR(tty))
1097 port->mark_mask &= ~(RCSR_FE | RCSR_PE);
1098 if (I_IGNBRK(tty)) {
1099 port->mark_mask &= ~RCSR_BREAK;
1100 if (I_IGNPAR(tty))
1101 /* Real raw mode. Ignore all */
1102 port->mark_mask &= ~RCSR_OE;
1103 }
1104 /* Enable Hardware Flow Control */
1105 if (C_CRTSCTS(tty)) {
1106/*#ifdef AURORA_BRAIN_DAMAGED_CTS
1107 port->SRER |= SRER_DSR | SRER_CTS;
1108 mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD;
1109 mcor2 |= MCOR2_DSROD | MCOR2_CTSOD;
1110 tty->hw_stopped = !(aurora_in(bp, CD180_MSVR) & (MSVR_CTS|MSVR_DSR));
1111#else*/
1112 port->COR2 |= COR2_CTSAE;
1113/*#endif*/
1114 if (bp->flags&AURORA_BOARD_DTR_FLOW_OK) {
1115 mcor1 |= AURORA_RXTH;
1116 }
1117 }
1118 /* Enable Software Flow Control. FIXME: I'm not sure about this */
1119 /* Some people reported that it works, but I still doubt */
1120 if (I_IXON(tty)) {
1121 port->COR2 |= COR2_TXIBE;
1122 cor3 |= (COR3_FCT | COR3_SCDE);
1123 if (I_IXANY(tty))
1124 port->COR2 |= COR2_IXM;
1125 sbus_writeb(START_CHAR(tty),
1126 &bp->r[chip]->r[CD180_SCHR1]);
1127 sbus_writeb(STOP_CHAR(tty),
1128 &bp->r[chip]->r[CD180_SCHR2]);
1129 sbus_writeb(START_CHAR(tty),
1130 &bp->r[chip]->r[CD180_SCHR3]);
1131 sbus_writeb(STOP_CHAR(tty),
1132 &bp->r[chip]->r[CD180_SCHR4]);
1133 }
1134 if (!C_CLOCAL(tty)) {
1135 /* Enable CD check */
1136 port->SRER |= SRER_CD;
1137 mcor1 |= MCOR1_CDZD;
1138 mcor2 |= MCOR2_CDOD;
1139 }
1140
1141 if (C_CREAD(tty))
1142 /* Enable receiver */
1143 port->SRER |= SRER_RXD;
1144
1145 /* Set input FIFO size (1-8 bytes) */
1146 cor3 |= AURORA_RXFIFO;
1147 /* Setting up CD180 channel registers */
1148 sbus_writeb(cor1, &bp->r[chip]->r[CD180_COR1]);
1149 sbus_writeb(port->COR2, &bp->r[chip]->r[CD180_COR2]);
1150 sbus_writeb(cor3, &bp->r[chip]->r[CD180_COR3]);
1151 /* Make CD180 know about registers change */
1152 aurora_wait_CCR(bp->r[chip]);
1153 sbus_writeb(CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3,
1154 &bp->r[chip]->r[CD180_CCR]);
1155 /* Setting up modem option registers */
1156 sbus_writeb(mcor1, &bp->r[chip]->r[CD180_MCOR1]);
1157 sbus_writeb(mcor2, &bp->r[chip]->r[CD180_MCOR2]);
1158 /* Enable CD180 transmitter & receiver */
1159 aurora_wait_CCR(bp->r[chip]);
1160 sbus_writeb(CCR_TXEN | CCR_RXEN, &bp->r[chip]->r[CD180_CCR]);
1161 /* Enable interrupts */
1162 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
1163 /* And finally set RTS on */
1164 sbus_writeb(port->MSVR, &bp->r[chip]->r[CD180_MSVR]);
1165#ifdef AURORA_DEBUG
1166 printk("aurora_change_speed: end\n");
1167#endif
1168}
1169
1170/* Must be called with interrupts enabled */
1171static int aurora_setup_port(struct Aurora_board *bp, struct Aurora_port *port)
1172{
1173 unsigned long flags;
1174
1175#ifdef AURORA_DEBUG
1176 printk("aurora_setup_port: start %d\n",port_No(port));
1177#endif
1178 if (port->flags & ASYNC_INITIALIZED)
1179 return 0;
1180
1181 if (!port->xmit_buf) {
1182 /* We may sleep in get_zeroed_page() */
1183 unsigned long tmp;
1184
1185 if (!(tmp = get_zeroed_page(GFP_KERNEL)))
1186 return -ENOMEM;
1187
1188 if (port->xmit_buf) {
1189 free_page(tmp);
1190 return -ERESTARTSYS;
1191 }
1192 port->xmit_buf = (unsigned char *) tmp;
1193 }
1194
1195 save_flags(flags); cli();
1196
1197 if (port->tty)
1198 clear_bit(TTY_IO_ERROR, &port->tty->flags);
1199
1200#ifdef MODULE
1201 if ((port->count == 1) && ((++bp->count) == 1))
1202 bp->flags |= AURORA_BOARD_ACTIVE;
1203#endif
1204
1205 port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
1206 aurora_change_speed(bp, port);
1207 port->flags |= ASYNC_INITIALIZED;
1208
1209 restore_flags(flags);
1210#ifdef AURORA_DEBUG
1211 printk("aurora_setup_port: end\n");
1212#endif
1213 return 0;
1214}
1215
1216/* Must be called with interrupts disabled */
1217static void aurora_shutdown_port(struct Aurora_board *bp, struct Aurora_port *port)
1218{
1219 struct tty_struct *tty;
1220 unsigned char chip;
1221
1222#ifdef AURORA_DEBUG
1223 printk("aurora_shutdown_port: start\n");
1224#endif
1225 if (!(port->flags & ASYNC_INITIALIZED))
1226 return;
1227
1228 chip = AURORA_CD180(port_No(port));
1229
1230#ifdef AURORA_REPORT_OVERRUN
1231 printk("aurora%d: port %d: Total %ld overruns were detected.\n",
1232 board_No(bp), port_No(port), port->overrun);
1233#endif
1234#ifdef AURORA_REPORT_FIFO
1235 {
1236 int i;
1237
1238 printk("aurora%d: port %d: FIFO hits [ ",
1239 board_No(bp), port_No(port));
1240 for (i = 0; i < 10; i++) {
1241 printk("%ld ", port->hits[i]);
1242 }
1243 printk("].\n");
1244 }
1245#endif
1246 if (port->xmit_buf) {
1247 free_page((unsigned long) port->xmit_buf);
1248 port->xmit_buf = NULL;
1249 }
1250
1251 if (!(tty = port->tty) || C_HUPCL(tty)) {
1252 /* Drop DTR */
1253 port->MSVR &= ~(bp->DTR|bp->RTS);
1254 sbus_writeb(port->MSVR,
1255 &bp->r[chip]->r[CD180_MSVR]);
1256 }
1257
1258 /* Select port */
1259 sbus_writeb(port_No(port) & 7,
1260 &bp->r[chip]->r[CD180_CAR]);
1261 udelay(1);
1262
1263 /* Reset port */
1264 aurora_wait_CCR(bp->r[chip]);
1265 sbus_writeb(CCR_SOFTRESET, &bp->r[chip]->r[CD180_CCR]);
1266
1267 /* Disable all interrupts from this port */
1268 port->SRER = 0;
1269 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
1270
1271 if (tty)
1272 set_bit(TTY_IO_ERROR, &tty->flags);
1273 port->flags &= ~ASYNC_INITIALIZED;
1274
1275#ifdef MODULE
1276 if (--bp->count < 0) {
1277 printk(KERN_DEBUG "aurora%d: aurora_shutdown_port: "
1278 "bad board count: %d\n",
1279 board_No(bp), bp->count);
1280 bp->count = 0;
1281 }
1282
1283 if (!bp->count)
1284 bp->flags &= ~AURORA_BOARD_ACTIVE;
1285#endif
1286
1287#ifdef AURORA_DEBUG
1288 printk("aurora_shutdown_port: end\n");
1289#endif
1290}
1291
1292
1293static int block_til_ready(struct tty_struct *tty, struct file * filp,
1294 struct Aurora_port *port)
1295{
1296 DECLARE_WAITQUEUE(wait, current);
1297 struct Aurora_board *bp = port_Board(port);
1298 int retval;
1299 int do_clocal = 0;
1300 int CD;
1301 unsigned char chip;
1302
1303#ifdef AURORA_DEBUG
1304 printk("block_til_ready: start\n");
1305#endif
1306 chip = AURORA_CD180(port_No(port));
1307
1308 /* If the device is in the middle of being closed, then block
1309 * until it's done, and then try again.
1310 */
1311 if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING) {
1312 interruptible_sleep_on(&port->close_wait);
1313 if (port->flags & ASYNC_HUP_NOTIFY)
1314 return -EAGAIN;
1315 else
1316 return -ERESTARTSYS;
1317 }
1318
1319 /* If non-blocking mode is set, or the port is not enabled,
1320 * then make the check up front and then exit.
1321 */
1322 if ((filp->f_flags & O_NONBLOCK) ||
1323 (tty->flags & (1 << TTY_IO_ERROR))) {
1324 port->flags |= ASYNC_NORMAL_ACTIVE;
1325 return 0;
1326 }
1327
1328 if (C_CLOCAL(tty))
1329 do_clocal = 1;
1330
1331 /* Block waiting for the carrier detect and the line to become
1332 * free (i.e., not in use by the callout). While we are in
1333 * this loop, info->count is dropped by one, so that
1334 * rs_close() knows when to free things. We restore it upon
1335 * exit, either normal or abnormal.
1336 */
1337 retval = 0;
1338 add_wait_queue(&port->open_wait, &wait);
1339 cli();
1340 if (!tty_hung_up_p(filp))
1341 port->count--;
1342 sti();
1343 port->blocked_open++;
1344 while (1) {
1345 cli();
1346 sbus_writeb(port_No(port) & 7,
1347 &bp->r[chip]->r[CD180_CAR]);
1348 udelay(1);
1349 CD = sbus_readb(&bp->r[chip]->r[CD180_MSVR]) & MSVR_CD;
1350 port->MSVR=bp->RTS;
1351
1352 /* auto drops DTR */
1353 sbus_writeb(port->MSVR, &bp->r[chip]->r[CD180_MSVR]);
1354 sti();
1355 set_current_state(TASK_INTERRUPTIBLE);
1356 if (tty_hung_up_p(filp) ||
1357 !(port->flags & ASYNC_INITIALIZED)) {
1358 if (port->flags & ASYNC_HUP_NOTIFY)
1359 retval = -EAGAIN;
1360 else
1361 retval = -ERESTARTSYS;
1362 break;
1363 }
1364 if (!(port->flags & ASYNC_CLOSING) &&
1365 (do_clocal || CD))
1366 break;
1367 if (signal_pending(current)) {
1368 retval = -ERESTARTSYS;
1369 break;
1370 }
1371 schedule();
1372 }
1373 current->state = TASK_RUNNING;
1374 remove_wait_queue(&port->open_wait, &wait);
1375 if (!tty_hung_up_p(filp))
1376 port->count++;
1377 port->blocked_open--;
1378 if (retval)
1379 return retval;
1380
1381 port->flags |= ASYNC_NORMAL_ACTIVE;
1382#ifdef AURORA_DEBUG
1383 printk("block_til_ready: end\n");
1384#endif
1385 return 0;
1386}
1387
1388static int aurora_open(struct tty_struct * tty, struct file * filp)
1389{
1390 int board;
1391 int error;
1392 struct Aurora_port * port;
1393 struct Aurora_board * bp;
1394 unsigned long flags;
1395
1396#ifdef AURORA_DEBUG
1397 printk("aurora_open: start\n");
1398#endif
1399
1400 board = AURORA_BOARD(tty->index);
1401 if (board > AURORA_NBOARD ||
1402 !(aurora_board[board].flags & AURORA_BOARD_PRESENT)) {
1403#ifdef AURORA_DEBUG
1404 printk("aurora_open: error board %d present %d\n",
1405 board, aurora_board[board].flags & AURORA_BOARD_PRESENT);
1406#endif
1407 return -ENODEV;
1408 }
1409
1410 bp = &aurora_board[board];
1411 port = aurora_port + board * AURORA_NPORT * AURORA_NCD180 + AURORA_PORT(tty->index);
1412 if ((aurora_paranoia_check(port, tty->name, "aurora_open")) {
1413#ifdef AURORA_DEBUG
1414 printk("aurora_open: error paranoia check\n");
1415#endif
1416 return -ENODEV;
1417 }
1418
1419 port->count++;
1420 tty->driver_data = port;
1421 port->tty = tty;
1422
1423 if ((error = aurora_setup_port(bp, port))) {
1424#ifdef AURORA_DEBUG
1425 printk("aurora_open: error aurora_setup_port ret %d\n",error);
1426#endif
1427 return error;
1428 }
1429
1430 if ((error = block_til_ready(tty, filp, port))) {
1431#ifdef AURORA_DEBUG
1432 printk("aurora_open: error block_til_ready ret %d\n",error);
1433#endif
1434 return error;
1435 }
1436
1437#ifdef AURORA_DEBUG
1438 printk("aurora_open: end\n");
1439#endif
1440 return 0;
1441}
1442
1443static void aurora_close(struct tty_struct * tty, struct file * filp)
1444{
1445 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1446 struct Aurora_board *bp;
1447 unsigned long flags;
1448 unsigned long timeout;
1449 unsigned char chip;
1450
1451#ifdef AURORA_DEBUG
1452 printk("aurora_close: start\n");
1453#endif
1454
1455 if (!port || (aurora_paranoia_check(port, tty->name, "close"))
1456 return;
1457
1458 chip = AURORA_CD180(port_No(port));
1459
1460 save_flags(flags); cli();
1461 if (tty_hung_up_p(filp)) {
1462 restore_flags(flags);
1463 return;
1464 }
1465
1466 bp = port_Board(port);
1467 if ((tty->count == 1) && (port->count != 1)) {
1468 printk(KERN_DEBUG "aurora%d: aurora_close: bad port count; "
1469 "tty->count is 1, port count is %d\n",
1470 board_No(bp), port->count);
1471 port->count = 1;
1472 }
1473 if (--port->count < 0) {
1474 printk(KERN_DEBUG "aurora%d: aurora_close: bad port "
1475 "count for tty%d: %d\n",
1476 board_No(bp), port_No(port), port->count);
1477 port->count = 0;
1478 }
1479 if (port->count) {
1480 restore_flags(flags);
1481 return;
1482 }
1483 port->flags |= ASYNC_CLOSING;
1484
1485 /* Now we wait for the transmit buffer to clear; and we notify
1486 * the line discipline to only process XON/XOFF characters.
1487 */
1488 tty->closing = 1;
1489 if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE){
1490#ifdef AURORA_DEBUG
1491 printk("aurora_close: waiting to flush...\n");
1492#endif
1493 tty_wait_until_sent(tty, port->closing_wait);
1494 }
1495
1496 /* At this point we stop accepting input. To do this, we
1497 * disable the receive line status interrupts, and tell the
1498 * interrupt driver to stop checking the data ready bit in the
1499 * line status register.
1500 */
1501 port->SRER &= ~SRER_RXD;
1502 if (port->flags & ASYNC_INITIALIZED) {
1503 port->SRER &= ~SRER_TXRDY;
1504 port->SRER |= SRER_TXEMPTY;
1505 sbus_writeb(port_No(port) & 7,
1506 &bp->r[chip]->r[CD180_CAR]);
1507 udelay(1);
1508 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
1509 /*
1510 * Before we drop DTR, make sure the UART transmitter
1511 * has completely drained; this is especially
1512 * important if there is a transmit FIFO!
1513 */
1514 timeout = jiffies+HZ;
1515 while(port->SRER & SRER_TXEMPTY) {
1516 msleep_interruptible(jiffies_to_msecs(port->timeout));
1517 if (time_after(jiffies, timeout))
1518 break;
1519 }
1520 }
1521#ifdef AURORA_DEBUG
1522 printk("aurora_close: shutdown_port\n");
1523#endif
1524 aurora_shutdown_port(bp, port);
1525 if (tty->driver->flush_buffer)
1526 tty->driver->flush_buffer(tty);
1527 tty_ldisc_flush(tty);
1528 tty->closing = 0;
1529 port->event = 0;
1530 port->tty = 0;
1531 if (port->blocked_open) {
1532 if (port->close_delay) {
1533 msleep_interruptible(jiffies_to_msecs(port->close_delay));
1534 }
1535 wake_up_interruptible(&port->open_wait);
1536 }
1537 port->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1538 wake_up_interruptible(&port->close_wait);
1539 restore_flags(flags);
1540#ifdef AURORA_DEBUG
1541 printk("aurora_close: end\n");
1542#endif
1543}
1544
1545static int aurora_write(struct tty_struct * tty,
1546 const unsigned char *buf, int count)
1547{
1548 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1549 struct Aurora_board *bp;
1550 int c, total = 0;
1551 unsigned long flags;
1552 unsigned char chip;
1553
1554#ifdef AURORA_DEBUG
1555 printk("aurora_write: start %d\n",count);
1556#endif
1557 if ((aurora_paranoia_check(port, tty->name, "aurora_write"))
1558 return 0;
1559
1560 chip = AURORA_CD180(port_No(port));
1561
1562 bp = port_Board(port);
1563
1564 if (!tty || !port->xmit_buf || !tmp_buf)
1565 return 0;
1566
1567 save_flags(flags);
1568 while (1) {
1569 cli();
1570 c = min(count, min(SERIAL_XMIT_SIZE - port->xmit_cnt - 1,
1571 SERIAL_XMIT_SIZE - port->xmit_head));
1572 if (c <= 0) {
1573 restore_flags(flags);
1574 break;
1575 }
1576 memcpy(port->xmit_buf + port->xmit_head, buf, c);
1577 port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
1578 port->xmit_cnt += c;
1579 restore_flags(flags);
1580
1581 buf += c;
1582 count -= c;
1583 total += c;
1584 }
1585
1586 cli();
1587 if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped &&
1588 !(port->SRER & SRER_TXRDY)) {
1589 port->SRER |= SRER_TXRDY;
1590 sbus_writeb(port_No(port) & 7,
1591 &bp->r[chip]->r[CD180_CAR]);
1592 udelay(1);
1593 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
1594 }
1595 restore_flags(flags);
1596#ifdef AURORA_DEBUG
1597 printk("aurora_write: end %d\n",total);
1598#endif
1599 return total;
1600}
1601
1602static void aurora_put_char(struct tty_struct * tty, unsigned char ch)
1603{
1604 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1605 unsigned long flags;
1606
1607#ifdef AURORA_DEBUG
1608 printk("aurora_put_char: start %c\n",ch);
1609#endif
1610 if ((aurora_paranoia_check(port, tty->name, "aurora_put_char"))
1611 return;
1612
1613 if (!tty || !port->xmit_buf)
1614 return;
1615
1616 save_flags(flags); cli();
1617
1618 if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1) {
1619 restore_flags(flags);
1620 return;
1621 }
1622
1623 port->xmit_buf[port->xmit_head++] = ch;
1624 port->xmit_head &= SERIAL_XMIT_SIZE - 1;
1625 port->xmit_cnt++;
1626 restore_flags(flags);
1627#ifdef AURORA_DEBUG
1628 printk("aurora_put_char: end\n");
1629#endif
1630}
1631
1632static void aurora_flush_chars(struct tty_struct * tty)
1633{
1634 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1635 unsigned long flags;
1636 unsigned char chip;
1637
1638/*#ifdef AURORA_DEBUG
1639 printk("aurora_flush_chars: start\n");
1640#endif*/
1641 if ((aurora_paranoia_check(port, tty->name, "aurora_flush_chars"))
1642 return;
1643
1644 chip = AURORA_CD180(port_No(port));
1645
1646 if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped ||
1647 !port->xmit_buf)
1648 return;
1649
1650 save_flags(flags); cli();
1651 port->SRER |= SRER_TXRDY;
1652 sbus_writeb(port_No(port) & 7,
1653 &port_Board(port)->r[chip]->r[CD180_CAR]);
1654 udelay(1);
1655 sbus_writeb(port->SRER,
1656 &port_Board(port)->r[chip]->r[CD180_SRER]);
1657 restore_flags(flags);
1658/*#ifdef AURORA_DEBUG
1659 printk("aurora_flush_chars: end\n");
1660#endif*/
1661}
1662
1663static int aurora_write_room(struct tty_struct * tty)
1664{
1665 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1666 int ret;
1667
1668#ifdef AURORA_DEBUG
1669 printk("aurora_write_room: start\n");
1670#endif
1671 if ((aurora_paranoia_check(port, tty->name, "aurora_write_room"))
1672 return 0;
1673
1674 ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1;
1675 if (ret < 0)
1676 ret = 0;
1677#ifdef AURORA_DEBUG
1678 printk("aurora_write_room: end\n");
1679#endif
1680 return ret;
1681}
1682
1683static int aurora_chars_in_buffer(struct tty_struct *tty)
1684{
1685 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1686
1687 if ((aurora_paranoia_check(port, tty->name, "aurora_chars_in_buffer"))
1688 return 0;
1689
1690 return port->xmit_cnt;
1691}
1692
1693static void aurora_flush_buffer(struct tty_struct *tty)
1694{
1695 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1696 unsigned long flags;
1697
1698#ifdef AURORA_DEBUG
1699 printk("aurora_flush_buffer: start\n");
1700#endif
1701 if ((aurora_paranoia_check(port, tty->name, "aurora_flush_buffer"))
1702 return;
1703
1704 save_flags(flags); cli();
1705 port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
1706 restore_flags(flags);
1707
1708 tty_wakeup(tty);
1709#ifdef AURORA_DEBUG
1710 printk("aurora_flush_buffer: end\n");
1711#endif
1712}
1713
1714static int aurora_tiocmget(struct tty_struct *tty, struct file *file)
1715{
1716 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1717 struct Aurora_board * bp;
1718 unsigned char status,chip;
1719 unsigned int result;
1720 unsigned long flags;
1721
1722#ifdef AURORA_DEBUG
1723 printk("aurora_get_modem_info: start\n");
1724#endif
1725 if ((aurora_paranoia_check(port, tty->name, __FUNCTION__))
1726 return -ENODEV;
1727
1728 chip = AURORA_CD180(port_No(port));
1729
1730 bp = port_Board(port);
1731
1732 save_flags(flags); cli();
1733
1734 sbus_writeb(port_No(port) & 7, &bp->r[chip]->r[CD180_CAR]);
1735 udelay(1);
1736
1737 status = sbus_readb(&bp->r[chip]->r[CD180_MSVR]);
1738 result = 0/*bp->r[chip]->r[AURORA_RI] & (1u << port_No(port)) ? 0 : TIOCM_RNG*/;
1739
1740 restore_flags(flags);
1741
1742 result |= ((status & bp->RTS) ? TIOCM_RTS : 0)
1743 | ((status & bp->DTR) ? TIOCM_DTR : 0)
1744 | ((status & MSVR_CD) ? TIOCM_CAR : 0)
1745 | ((status & MSVR_DSR) ? TIOCM_DSR : 0)
1746 | ((status & MSVR_CTS) ? TIOCM_CTS : 0);
1747
1748#ifdef AURORA_DEBUG
1749 printk("aurora_get_modem_info: end\n");
1750#endif
1751 return result;
1752}
1753
1754static int aurora_tiocmset(struct tty_struct *tty, struct file *file,
1755 unsigned int set, unsigned int clear)
1756{
1757 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1758 unsigned int arg;
1759 unsigned long flags;
1760 struct Aurora_board *bp = port_Board(port);
1761 unsigned char chip;
1762
1763#ifdef AURORA_DEBUG
1764 printk("aurora_set_modem_info: start\n");
1765#endif
1766 if ((aurora_paranoia_check(port, tty->name, __FUNCTION__))
1767 return -ENODEV;
1768
1769 chip = AURORA_CD180(port_No(port));
1770
1771 save_flags(flags); cli();
1772 if (set & TIOCM_RTS)
1773 port->MSVR |= bp->RTS;
1774 if (set & TIOCM_DTR)
1775 port->MSVR |= bp->DTR;
1776 if (clear & TIOCM_RTS)
1777 port->MSVR &= ~bp->RTS;
1778 if (clear & TIOCM_DTR)
1779 port->MSVR &= ~bp->DTR;
1780
1781 sbus_writeb(port_No(port) & 7, &bp->r[chip]->r[CD180_CAR]);
1782 udelay(1);
1783
1784 sbus_writeb(port->MSVR, &bp->r[chip]->r[CD180_MSVR]);
1785
1786 restore_flags(flags);
1787#ifdef AURORA_DEBUG
1788 printk("aurora_set_modem_info: end\n");
1789#endif
1790 return 0;
1791}
1792
1793static void aurora_send_break(struct Aurora_port * port, unsigned long length)
1794{
1795 struct Aurora_board *bp = port_Board(port);
1796 unsigned long flags;
1797 unsigned char chip;
1798
1799#ifdef AURORA_DEBUG
1800 printk("aurora_send_break: start\n");
1801#endif
1802 chip = AURORA_CD180(port_No(port));
1803
1804 save_flags(flags); cli();
1805
1806 port->break_length = AURORA_TPS / HZ * length;
1807 port->COR2 |= COR2_ETC;
1808 port->SRER |= SRER_TXRDY;
1809 sbus_writeb(port_No(port) & 7, &bp->r[chip]->r[CD180_CAR]);
1810 udelay(1);
1811
1812 sbus_writeb(port->COR2, &bp->r[chip]->r[CD180_COR2]);
1813 sbus_writeb(port->SRER, &bp->r[chip]->r[CD180_SRER]);
1814 aurora_wait_CCR(bp->r[chip]);
1815
1816 sbus_writeb(CCR_CORCHG2, &bp->r[chip]->r[CD180_CCR]);
1817 aurora_wait_CCR(bp->r[chip]);
1818
1819 restore_flags(flags);
1820#ifdef AURORA_DEBUG
1821 printk("aurora_send_break: end\n");
1822#endif
1823}
1824
1825static int aurora_set_serial_info(struct Aurora_port * port,
1826 struct serial_struct * newinfo)
1827{
1828 struct serial_struct tmp;
1829 struct Aurora_board *bp = port_Board(port);
1830 int change_speed;
1831 unsigned long flags;
1832
1833#ifdef AURORA_DEBUG
1834 printk("aurora_set_serial_info: start\n");
1835#endif
1836 if (copy_from_user(&tmp, newinfo, sizeof(tmp)))
1837 return -EFAULT;
1838#if 0
1839 if ((tmp.irq != bp->irq) ||
1840 (tmp.port != bp->base) ||
1841 (tmp.type != PORT_CIRRUS) ||
1842 (tmp.baud_base != (bp->oscfreq + CD180_TPC/2) / CD180_TPC) ||
1843 (tmp.custom_divisor != 0) ||
1844 (tmp.xmit_fifo_size != CD180_NFIFO) ||
1845 (tmp.flags & ~AURORA_LEGAL_FLAGS))
1846 return -EINVAL;
1847#endif
1848
1849 change_speed = ((port->flags & ASYNC_SPD_MASK) !=
1850 (tmp.flags & ASYNC_SPD_MASK));
1851
1852 if (!capable(CAP_SYS_ADMIN)) {
1853 if ((tmp.close_delay != port->close_delay) ||
1854 (tmp.closing_wait != port->closing_wait) ||
1855 ((tmp.flags & ~ASYNC_USR_MASK) !=
1856 (port->flags & ~ASYNC_USR_MASK)))
1857 return -EPERM;
1858 port->flags = ((port->flags & ~ASYNC_USR_MASK) |
1859 (tmp.flags & ASYNC_USR_MASK));
1860 } else {
1861 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1862 (tmp.flags & ASYNC_FLAGS));
1863 port->close_delay = tmp.close_delay;
1864 port->closing_wait = tmp.closing_wait;
1865 }
1866 if (change_speed) {
1867 save_flags(flags); cli();
1868 aurora_change_speed(bp, port);
1869 restore_flags(flags);
1870 }
1871#ifdef AURORA_DEBUG
1872 printk("aurora_set_serial_info: end\n");
1873#endif
1874 return 0;
1875}
1876
1877extern int aurora_get_serial_info(struct Aurora_port * port,
1878 struct serial_struct * retinfo)
1879{
1880 struct serial_struct tmp;
1881 struct Aurora_board *bp = port_Board(port);
1882
1883#ifdef AURORA_DEBUG
1884 printk("aurora_get_serial_info: start\n");
1885#endif
1886 if (!access_ok(VERIFY_WRITE, (void *) retinfo, sizeof(tmp)))
1887 return -EFAULT;
1888
1889 memset(&tmp, 0, sizeof(tmp));
1890 tmp.type = PORT_CIRRUS;
1891 tmp.line = port - aurora_port;
1892 tmp.port = 0;
1893 tmp.irq = bp->irq;
1894 tmp.flags = port->flags;
1895 tmp.baud_base = (bp->oscfreq + CD180_TPC/2) / CD180_TPC;
1896 tmp.close_delay = port->close_delay * HZ/100;
1897 tmp.closing_wait = port->closing_wait * HZ/100;
1898 tmp.xmit_fifo_size = CD180_NFIFO;
1899 copy_to_user(retinfo, &tmp, sizeof(tmp));
1900#ifdef AURORA_DEBUG
1901printk("aurora_get_serial_info: end\n");
1902#endif
1903 return 0;
1904}
1905
1906static int aurora_ioctl(struct tty_struct * tty, struct file * filp,
1907 unsigned int cmd, unsigned long arg)
1908
1909{
1910 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1911 int retval;
1912
1913#ifdef AURORA_DEBUG
1914 printk("aurora_ioctl: start\n");
1915#endif
1916 if ((aurora_paranoia_check(port, tty->name, "aurora_ioctl"))
1917 return -ENODEV;
1918
1919 switch (cmd) {
1920 case TCSBRK: /* SVID version: non-zero arg --> no break */
1921 retval = tty_check_change(tty);
1922 if (retval)
1923 return retval;
1924 tty_wait_until_sent(tty, 0);
1925 if (!arg)
1926 aurora_send_break(port, HZ/4); /* 1/4 second */
1927 return 0;
1928 case TCSBRKP: /* support for POSIX tcsendbreak() */
1929 retval = tty_check_change(tty);
1930 if (retval)
1931 return retval;
1932 tty_wait_until_sent(tty, 0);
1933 aurora_send_break(port, arg ? arg*(HZ/10) : HZ/4);
1934 return 0;
1935 case TIOCGSOFTCAR:
1936 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
1937 case TIOCSSOFTCAR:
1938 if (get_user(arg,(unsigned long *)arg))
1939 return -EFAULT;
1940 tty->termios->c_cflag =
1941 ((tty->termios->c_cflag & ~CLOCAL) |
1942 (arg ? CLOCAL : 0));
1943 return 0;
1944 case TIOCGSERIAL:
1945 return aurora_get_serial_info(port, (struct serial_struct *) arg);
1946 case TIOCSSERIAL:
1947 return aurora_set_serial_info(port, (struct serial_struct *) arg);
1948 default:
1949 return -ENOIOCTLCMD;
1950 };
1951#ifdef AURORA_DEBUG
1952 printk("aurora_ioctl: end\n");
1953#endif
1954 return 0;
1955}
1956
1957static void aurora_throttle(struct tty_struct * tty)
1958{
1959 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1960 struct Aurora_board *bp;
1961 unsigned long flags;
1962 unsigned char chip;
1963
1964#ifdef AURORA_DEBUG
1965 printk("aurora_throttle: start\n");
1966#endif
1967 if ((aurora_paranoia_check(port, tty->name, "aurora_throttle"))
1968 return;
1969
1970 bp = port_Board(port);
1971 chip = AURORA_CD180(port_No(port));
1972
1973 save_flags(flags); cli();
1974 port->MSVR &= ~bp->RTS;
1975 sbus_writeb(port_No(port) & 7, &bp->r[chip]->r[CD180_CAR]);
1976 udelay(1);
1977 if (I_IXOFF(tty)) {
1978 aurora_wait_CCR(bp->r[chip]);
1979 sbus_writeb(CCR_SSCH2, &bp->r[chip]->r[CD180_CCR]);
1980 aurora_wait_CCR(bp->r[chip]);
1981 }
1982 sbus_writeb(port->MSVR, &bp->r[chip]->r[CD180_MSVR]);
1983 restore_flags(flags);
1984#ifdef AURORA_DEBUG
1985 printk("aurora_throttle: end\n");
1986#endif
1987}
1988
1989static void aurora_unthrottle(struct tty_struct * tty)
1990{
1991 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
1992 struct Aurora_board *bp;
1993 unsigned long flags;
1994 unsigned char chip;
1995
1996#ifdef AURORA_DEBUG
1997 printk("aurora_unthrottle: start\n");
1998#endif
1999 if ((aurora_paranoia_check(port, tty->name, "aurora_unthrottle"))
2000 return;
2001
2002 bp = port_Board(port);
2003
2004 chip = AURORA_CD180(port_No(port));
2005
2006 save_flags(flags); cli();
2007 port->MSVR |= bp->RTS;
2008 sbus_writeb(port_No(port) & 7,
2009 &bp->r[chip]->r[CD180_CAR]);
2010 udelay(1);
2011 if (I_IXOFF(tty)) {
2012 aurora_wait_CCR(bp->r[chip]);
2013 sbus_writeb(CCR_SSCH1,
2014 &bp->r[chip]->r[CD180_CCR]);
2015 aurora_wait_CCR(bp->r[chip]);
2016 }
2017 sbus_writeb(port->MSVR, &bp->r[chip]->r[CD180_MSVR]);
2018 restore_flags(flags);
2019#ifdef AURORA_DEBUG
2020 printk("aurora_unthrottle: end\n");
2021#endif
2022}
2023
2024static void aurora_stop(struct tty_struct * tty)
2025{
2026 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
2027 struct Aurora_board *bp;
2028 unsigned long flags;
2029 unsigned char chip;
2030
2031#ifdef AURORA_DEBUG
2032 printk("aurora_stop: start\n");
2033#endif
2034 if ((aurora_paranoia_check(port, tty->name, "aurora_stop"))
2035 return;
2036
2037 bp = port_Board(port);
2038
2039 chip = AURORA_CD180(port_No(port));
2040
2041 save_flags(flags); cli();
2042 port->SRER &= ~SRER_TXRDY;
2043 sbus_writeb(port_No(port) & 7,
2044 &bp->r[chip]->r[CD180_CAR]);
2045 udelay(1);
2046 sbus_writeb(port->SRER,
2047 &bp->r[chip]->r[CD180_SRER]);
2048 restore_flags(flags);
2049#ifdef AURORA_DEBUG
2050 printk("aurora_stop: end\n");
2051#endif
2052}
2053
2054static void aurora_start(struct tty_struct * tty)
2055{
2056 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
2057 struct Aurora_board *bp;
2058 unsigned long flags;
2059 unsigned char chip;
2060
2061#ifdef AURORA_DEBUG
2062 printk("aurora_start: start\n");
2063#endif
2064 if ((aurora_paranoia_check(port, tty->name, "aurora_start"))
2065 return;
2066
2067 bp = port_Board(port);
2068
2069 chip = AURORA_CD180(port_No(port));
2070
2071 save_flags(flags); cli();
2072 if (port->xmit_cnt && port->xmit_buf && !(port->SRER & SRER_TXRDY)) {
2073 port->SRER |= SRER_TXRDY;
2074 sbus_writeb(port_No(port) & 7,
2075 &bp->r[chip]->r[CD180_CAR]);
2076 udelay(1);
2077 sbus_writeb(port->SRER,
2078 &bp->r[chip]->r[CD180_SRER]);
2079 }
2080 restore_flags(flags);
2081#ifdef AURORA_DEBUG
2082 printk("aurora_start: end\n");
2083#endif
2084}
2085
2086/*
2087 * This routine is called from the scheduler tqueue when the interrupt
2088 * routine has signalled that a hangup has occurred. The path of
2089 * hangup processing is:
2090 *
2091 * serial interrupt routine -> (scheduler tqueue) ->
2092 * do_aurora_hangup() -> tty->hangup() -> aurora_hangup()
2093 *
2094 */
2095static void do_aurora_hangup(void *private_)
2096{
2097 struct Aurora_port *port = (struct Aurora_port *) private_;
2098 struct tty_struct *tty;
2099
2100#ifdef AURORA_DEBUG
2101 printk("do_aurora_hangup: start\n");
2102#endif
2103 tty = port->tty;
2104 if (tty != NULL) {
2105 tty_hangup(tty); /* FIXME: module removal race - AKPM */
2106#ifdef AURORA_DEBUG
2107 printk("do_aurora_hangup: end\n");
2108#endif
2109 }
2110}
2111
2112static void aurora_hangup(struct tty_struct * tty)
2113{
2114 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
2115 struct Aurora_board *bp;
2116
2117#ifdef AURORA_DEBUG
2118 printk("aurora_hangup: start\n");
2119#endif
2120 if ((aurora_paranoia_check(port, tty->name, "aurora_hangup"))
2121 return;
2122
2123 bp = port_Board(port);
2124
2125 aurora_shutdown_port(bp, port);
2126 port->event = 0;
2127 port->count = 0;
2128 port->flags &= ~ASYNC_NORMAL_ACTIVE;
2129 port->tty = 0;
2130 wake_up_interruptible(&port->open_wait);
2131#ifdef AURORA_DEBUG
2132 printk("aurora_hangup: end\n");
2133#endif
2134}
2135
2136static void aurora_set_termios(struct tty_struct * tty, struct termios * old_termios)
2137{
2138 struct Aurora_port *port = (struct Aurora_port *) tty->driver_data;
2139 unsigned long flags;
2140
2141#ifdef AURORA_DEBUG
2142 printk("aurora_set_termios: start\n");
2143#endif
2144 if ((aurora_paranoia_check(port, tty->name, "aurora_set_termios"))
2145 return;
2146
2147 if (tty->termios->c_cflag == old_termios->c_cflag &&
2148 tty->termios->c_iflag == old_termios->c_iflag)
2149 return;
2150
2151 save_flags(flags); cli();
2152 aurora_change_speed(port_Board(port), port);
2153 restore_flags(flags);
2154
2155 if ((old_termios->c_cflag & CRTSCTS) &&
2156 !(tty->termios->c_cflag & CRTSCTS)) {
2157 tty->hw_stopped = 0;
2158 aurora_start(tty);
2159 }
2160#ifdef AURORA_DEBUG
2161 printk("aurora_set_termios: end\n");
2162#endif
2163}
2164
2165static void do_aurora_bh(void)
2166{
2167 run_task_queue(&tq_aurora);
2168}
2169
2170static void do_softint(void *private_)
2171{
2172 struct Aurora_port *port = (struct Aurora_port *) private_;
2173 struct tty_struct *tty;
2174
2175#ifdef AURORA_DEBUG
2176 printk("do_softint: start\n");
2177#endif
2178 tty = port->tty;
2179 if (tty == NULL)
2180 return;
2181
2182 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &port->event)) {
2183 tty_wakeup(tty);
2184 }
2185#ifdef AURORA_DEBUG
2186 printk("do_softint: end\n");
2187#endif
2188}
2189
2190static const struct tty_operations aurora_ops = {
2191 .open = aurora_open,
2192 .close = aurora_close,
2193 .write = aurora_write,
2194 .put_char = aurora_put_char,
2195 .flush_chars = aurora_flush_chars,
2196 .write_room = aurora_write_room,
2197 .chars_in_buffer = aurora_chars_in_buffer,
2198 .flush_buffer = aurora_flush_buffer,
2199 .ioctl = aurora_ioctl,
2200 .throttle = aurora_throttle,
2201 .unthrottle = aurora_unthrottle,
2202 .set_termios = aurora_set_termios,
2203 .stop = aurora_stop,
2204 .start = aurora_start,
2205 .hangup = aurora_hangup,
2206 .tiocmget = aurora_tiocmget,
2207 .tiocmset = aurora_tiocmset,
2208};
2209
2210static int aurora_init_drivers(void)
2211{
2212 int error;
2213 int i;
2214
2215#ifdef AURORA_DEBUG
2216 printk("aurora_init_drivers: start\n");
2217#endif
2218 tmp_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
2219 if (tmp_buf == NULL) {
2220 printk(KERN_ERR "aurora: Couldn't get free page.\n");
2221 return 1;
2222 }
2223 init_bh(AURORA_BH, do_aurora_bh);
2224 aurora_driver = alloc_tty_driver(AURORA_INPORTS);
2225 if (!aurora_driver) {
2226 printk(KERN_ERR "aurora: Couldn't allocate tty driver.\n");
2227 free_page((unsigned long) tmp_buf);
2228 return 1;
2229 }
2230 aurora_driver->owner = THIS_MODULE;
2231 aurora_driver->name = "ttyA";
2232 aurora_driver->major = AURORA_MAJOR;
2233 aurora_driver->type = TTY_DRIVER_TYPE_SERIAL;
2234 aurora_driver->subtype = SERIAL_TYPE_NORMAL;
2235 aurora_driver->init_termios = tty_std_termios;
2236 aurora_driver->init_termios.c_cflag =
2237 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2238 aurora_driver->flags = TTY_DRIVER_REAL_RAW;
2239 tty_set_operations(aurora_driver, &aurora_ops);
2240 error = tty_register_driver(aurora_driver);
2241 if (error) {
2242 put_tty_driver(aurora_driver);
2243 free_page((unsigned long) tmp_buf);
2244 printk(KERN_ERR "aurora: Couldn't register aurora driver, error = %d\n",
2245 error);
2246 return 1;
2247 }
2248
2249 memset(aurora_port, 0, sizeof(aurora_port));
2250 for (i = 0; i < AURORA_TNPORTS; i++) {
2251 aurora_port[i].magic = AURORA_MAGIC;
2252 aurora_port[i].tqueue.routine = do_softint;
2253 aurora_port[i].tqueue.data = &aurora_port[i];
2254 aurora_port[i].tqueue_hangup.routine = do_aurora_hangup;
2255 aurora_port[i].tqueue_hangup.data = &aurora_port[i];
2256 aurora_port[i].close_delay = 50 * HZ/100;
2257 aurora_port[i].closing_wait = 3000 * HZ/100;
2258 init_waitqueue_head(&aurora_port[i].open_wait);
2259 init_waitqueue_head(&aurora_port[i].close_wait);
2260 }
2261#ifdef AURORA_DEBUG
2262 printk("aurora_init_drivers: end\n");
2263#endif
2264 return 0;
2265}
2266
2267static void aurora_release_drivers(void)
2268{
2269#ifdef AURORA_DEBUG
2270 printk("aurora_release_drivers: start\n");
2271#endif
2272 free_page((unsigned long)tmp_buf);
2273 tty_unregister_driver(aurora_driver);
2274 put_tty_driver(aurora_driver);
2275#ifdef AURORA_DEBUG
2276 printk("aurora_release_drivers: end\n");
2277#endif
2278}
2279
2280/*
2281 * Called at boot time.
2282 *
2283 * You can specify IO base for up to RC_NBOARD cards,
2284 * using line "riscom8=0xiobase1,0xiobase2,.." at LILO prompt.
2285 * Note that there will be no probing at default
2286 * addresses in this case.
2287 *
2288 */
2289void __init aurora_setup(char *str, int *ints)
2290{
2291 int i;
2292
2293 for(i=0;(i<ints[0])&&(i<4);i++) {
2294 if (ints[i+1]) irqs[i]=ints[i+1];
2295 }
2296}
2297
2298static int __init aurora_real_init(void)
2299{
2300 int found;
2301 int i;
2302
2303 printk(KERN_INFO "aurora: Driver starting.\n");
2304 if(aurora_init_drivers())
2305 return -EIO;
2306 found = aurora_probe();
2307 if(!found) {
2308 aurora_release_drivers();
2309 printk(KERN_INFO "aurora: No Aurora Multiport boards detected.\n");
2310 return -EIO;
2311 } else {
2312 printk(KERN_INFO "aurora: %d boards found.\n", found);
2313 }
2314 for (i = 0; i < found; i++) {
2315 int ret = aurora_setup_board(&aurora_board[i]);
2316
2317 if (ret) {
2318#ifdef AURORA_DEBUG
2319 printk(KERN_ERR "aurora_init: error aurora_setup_board ret %d\n",
2320 ret);
2321#endif
2322 return ret;
2323 }
2324 }
2325 return 0;
2326}
2327
2328int irq = 0;
2329int irq1 = 0;
2330int irq2 = 0;
2331int irq3 = 0;
2332module_param(irq , int, 0);
2333module_param(irq1, int, 0);
2334module_param(irq2, int, 0);
2335module_param(irq3, int, 0);
2336
2337static int __init aurora_init(void)
2338{
2339 if (irq ) irqs[0]=irq ;
2340 if (irq1) irqs[1]=irq1;
2341 if (irq2) irqs[2]=irq2;
2342 if (irq3) irqs[3]=irq3;
2343 return aurora_real_init();
2344}
2345
2346static void __exit aurora_cleanup(void)
2347{
2348 int i;
2349
2350#ifdef AURORA_DEBUG
2351printk("cleanup_module: aurora_release_drivers\n");
2352#endif
2353
2354 aurora_release_drivers();
2355 for (i = 0; i < AURORA_NBOARD; i++)
2356 if (aurora_board[i].flags & AURORA_BOARD_PRESENT) {
2357 aurora_shutdown_board(&aurora_board[i]);
2358 aurora_release_io_range(&aurora_board[i]);
2359 }
2360}
2361
2362module_init(aurora_init);
2363module_exit(aurora_cleanup);
2364MODULE_LICENSE("GPL");
diff --git a/drivers/sbus/char/aurora.h b/drivers/sbus/char/aurora.h
deleted file mode 100644
index b8b5476d9860..000000000000
--- a/drivers/sbus/char/aurora.h
+++ /dev/null
@@ -1,276 +0,0 @@
1/* $Id: aurora.h,v 1.6 2001/06/05 12:23:38 davem Exp $
2 * linux/drivers/sbus/char/aurora.h -- Aurora multiport driver
3 *
4 * Copyright (c) 1999 by Oliver Aldulea (oli@bv.ro)
5 *
6 * This code is based on the RISCom/8 multiport serial driver written
7 * by Dmitry Gorodchanin (pgmdsg@ibi.com), based on the Linux serial
8 * driver, written by Linus Torvalds, Theodore T'so and others.
9 * The Aurora multiport programming info was obtained mainly from the
10 * Cirrus Logic CD180 documentation (available on the web), and by
11 * doing heavy tests on the board. Many thanks to Eddie C. Dost for the
12 * help on the sbus interface.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 * Revision 1.0
29 *
30 * This is the first public release.
31 *
32 * This version needs a lot of feedback. This is the version that works
33 * with _my_ board. My board is model 1600se, revision '@(#)1600se.fth
34 * 1.2 3/28/95 1'. The driver might work with your board, but I do not
35 * guarantee it. If you have _any_ type of board, I need to know if the
36 * driver works or not, I need to know exactly your board parameters
37 * (get them with 'cd /proc/openprom/iommu/sbus/sio16/; ls *; cat *')
38 * Also, I need your board revision code, which is written on the board.
39 * Send me the output of my driver too (it outputs through klogd).
40 *
41 * If the driver does not work, you can try enabling the debug options
42 * to see what's wrong or what should be done.
43 *
44 * I'm sorry about the alignment of the code. It was written in a
45 * 128x48 environment.
46 *
47 * I must say that I do not like Aurora Technologies' policy. I asked
48 * them to help me do this driver faster, but they ended by something
49 * like "don't call us, we'll call you", and I never heard anything
50 * from them. They told me "knowing the way the board works, I don't
51 * doubt you and others on the net will make the driver."
52 * The truth about this board is that it has nothing intelligent on it.
53 * If you want to say to somebody what kind of board you have, say that
54 * it uses Cirrus Logic processors (CD180). The power of the board is
55 * in those two chips. The rest of the board is the interface to the
56 * sbus and to the peripherals. Still, they did something smart: they
57 * reversed DTR and RTS to make on-board automatic hardware flow
58 * control usable.
59 * Thanks to Aurora Technologies for wasting my time, nerves and money.
60 */
61
62#ifndef __LINUX_AURORA_H
63#define __LINUX_AURORA_H
64
65#include <linux/serial.h>
66#include <linux/serialP.h>
67
68#ifdef __KERNEL__
69
70/* This is the number of boards to support. I've only tested this driver with
71 * one board, so it might not work.
72 */
73#define AURORA_NBOARD 1
74
75/* Useful ? Yes. But you can safely comment the warnings if they annoy you
76 * (let me say that again: the warnings in the code, not this define).
77 */
78#define AURORA_PARANOIA_CHECK
79
80/* Well, after many lost nights, I found that the IRQ for this board is
81 * selected from four built-in values by writing some bits in the
82 * configuration register. This causes a little problem to occur: which
83 * IRQ to select ? Which one is the best for the user ? Well, I finally
84 * decided for the following algorithm: if the "bintr" value is not acceptable
85 * (not within type_1_irq[], then test the "intr" value, if that fails too,
86 * try each value from type_1_irq until succeded. Hope it's ok.
87 * You can safely reorder the irq's.
88 */
89#define TYPE_1_IRQS 4
90unsigned char type_1_irq[TYPE_1_IRQS] = {
91 3, 5, 9, 13
92};
93/* I know something about another method of interrupt setting, but not enough.
94 * Also, this is for another type of board, so I first have to learn how to
95 * detect it.
96#define TYPE_2_IRQS 3
97unsigned char type_2_irq[TYPE_2_IRQS] = {
98 0, 0, 0 ** could anyone find these for me ? (see AURORA_ALLIRQ below) **
99 };
100unsigned char type_2_mask[TYPE_2_IRQS] = {
101 32, 64, 128
102 };
103*/
104
105/* The following section should only be modified by those who know what
106 * they're doing (or don't, but want to help with some feedback). Modifying
107 * anything raises a _big_ probability for your system to hang, but the
108 * sacrifice worths. (I sacrificed my ext2fs many, many times...)
109 */
110
111/* This one tries to dump to console the name of almost every function called,
112 * and many other debugging info.
113 */
114#undef AURORA_DEBUG
115
116/* These are the most dangerous and useful defines. They do printk() during
117 * the interrupt processing routine(s), so if you manage to get "flooded" by
118 * irq's, start thinking about the "Power off/on" button...
119 */
120#undef AURORA_INTNORM /* This one enables the "normal" messages, but some
121 * of them cause flood, so I preffered putting
122 * them under a define */
123#undef AURORA_INT_DEBUG /* This one is really bad. */
124
125/* Here's something helpful: after n irq's, the board will be disabled. This
126 * prevents irq flooding during debug (no need to think about power
127 * off/on anymore...)
128 */
129#define AURORA_FLOODPRO 10
130
131/* This one helps finding which irq the board calls, in case of a strange/
132 * unsupported board. AURORA_INT_DEBUG should be enabled, because I don't
133 * think /proc/interrupts or any command will be available in case of an irq
134 * flood... "allirq" is the list of all free irq's.
135 */
136/*
137#define AURORA_ALLIRQ 6
138int allirq[AURORA_ALLIRQ]={
139 2,3,5,7,9,13
140 };
141*/
142
143/* These must not be modified. These values are assumed during the code for
144 * performance optimisations.
145 */
146#define AURORA_NCD180 2 /* two chips per board */
147#define AURORA_NPORT 8 /* 8 ports per chip */
148
149/* several utilities */
150#define AURORA_BOARD(line) (((line) >> 4) & 0x01)
151#define AURORA_CD180(line) (((line) >> 3) & 0x01)
152#define AURORA_PORT(line) ((line) & 15)
153
154#define AURORA_TNPORTS (AURORA_NBOARD*AURORA_NCD180*AURORA_NPORT)
155
156/* Ticks per sec. Used for setting receiver timeout and break length */
157#define AURORA_TPS 4000
158
159#define AURORA_MAGIC 0x0A18
160
161/* Yeah, after heavy testing I decided it must be 6.
162 * Sure, You can change it if needed.
163 */
164#define AURORA_RXFIFO 6 /* Max. receiver FIFO size (1-8) */
165
166#define AURORA_RXTH 7
167
168struct aurora_reg1 {
169 __volatile__ unsigned char r;
170};
171
172struct aurora_reg128 {
173 __volatile__ unsigned char r[128];
174};
175
176struct aurora_reg4 {
177 __volatile__ unsigned char r[4];
178};
179
180struct Aurora_board {
181 unsigned long flags;
182 struct aurora_reg1 * r0; /* This is the board configuration
183 * register (write-only). */
184 struct aurora_reg128 * r[2]; /* These are the registers for the
185 * two chips. */
186 struct aurora_reg4 * r3; /* These are used for hardware-based
187 * acknowledge. Software-based ack is
188 * not supported by CD180. */
189 unsigned int oscfreq; /* The on-board oscillator
190 * frequency, in Hz. */
191 unsigned char irq;
192#ifdef MODULE
193 signed char count; /* counts the use of the board */
194#endif
195 /* Values for the dtr_rts swapped mode. */
196 unsigned char DTR;
197 unsigned char RTS;
198 unsigned char MSVDTR;
199 unsigned char MSVRTS;
200 /* Values for hardware acknowledge. */
201 unsigned char ACK_MINT, ACK_TINT, ACK_RINT;
202};
203
204/* Board configuration register */
205#define AURORA_CFG_ENABLE_IO 8
206#define AURORA_CFG_ENABLE_IRQ 4
207
208/* Board flags */
209#define AURORA_BOARD_PRESENT 0x00000001
210#define AURORA_BOARD_ACTIVE 0x00000002
211#define AURORA_BOARD_TYPE_2 0x00000004 /* don't know how to
212 * detect this yet */
213#define AURORA_BOARD_DTR_FLOW_OK 0x00000008
214
215/* The story goes like this: Cirrus programmed the CD-180 chip to do automatic
216 * hardware flow control, and do it using CTS and DTR. CTS is ok, but, if you
217 * have a modem and the chip drops DTR, then the modem will drop the carrier
218 * (ain't that cute...). Luckily, the guys at Aurora decided to swap DTR and
219 * RTS, which makes the flow control usable. I hope that all the boards made
220 * by Aurora have these two signals swapped. If your's doesn't but you have a
221 * breakout box, you can try to reverse them yourself, then set the following
222 * flag.
223 */
224#undef AURORA_FORCE_DTR_FLOW
225
226/* In fact, a few more words have to be said about hardware flow control.
227 * This driver handles "output" flow control through the on-board facility
228 * CTS Auto Enable. For the "input" flow control there are two cases when
229 * the flow should be controlled. The first case is when the kernel is so
230 * busy that it cannot process IRQ's in time; this flow control can only be
231 * activated by the on-board chip, and if the board has RTS and DTR swapped,
232 * this facility is usable. The second case is when the application is so
233 * busy that it cannot receive bytes from the kernel, and this flow must be
234 * activated by software. This second case is not yet implemented in this
235 * driver. Unfortunately, I estimate that the second case is the one that
236 * occurs the most.
237 */
238
239
240struct Aurora_port {
241 int magic;
242 int baud_base;
243 int flags;
244 struct tty_struct * tty;
245 int count;
246 int blocked_open;
247 long event;
248 int timeout;
249 int close_delay;
250 unsigned char * xmit_buf;
251 int custom_divisor;
252 int xmit_head;
253 int xmit_tail;
254 int xmit_cnt;
255 wait_queue_head_t open_wait;
256 wait_queue_head_t close_wait;
257 struct tq_struct tqueue;
258 struct tq_struct tqueue_hangup;
259 short wakeup_chars;
260 short break_length;
261 unsigned short closing_wait;
262 unsigned char mark_mask;
263 unsigned char SRER;
264 unsigned char MSVR;
265 unsigned char COR2;
266#ifdef AURORA_REPORT_OVERRUN
267 unsigned long overrun;
268#endif
269#ifdef AURORA_REPORT_FIFO
270 unsigned long hits[10];
271#endif
272};
273
274#endif
275#endif /*__LINUX_AURORA_H*/
276
diff --git a/drivers/sbus/char/cd180.h b/drivers/sbus/char/cd180.h
deleted file mode 100644
index 445b86cc65e7..000000000000
--- a/drivers/sbus/char/cd180.h
+++ /dev/null
@@ -1,240 +0,0 @@
1
2/* Definitions for Cirrus Logic CL-CD180 8-port async mux chip */
3#define CD180_NCH 8 /* Total number of channels */
4#define CD180_TPC 16 /* Ticks per character */
5#define CD180_NFIFO 8 /* TX FIFO size */
6
7/* Global registers */
8#define CD180_GFRCR 0x6b /* Global Firmware Revision Code Register */
9#define CD180_SRCR 0x66 /* Service Request Configuration Register */
10#define CD180_PPRH 0x70 /* Prescaler Period Register High */
11#define CD180_PPRL 0x71 /* Prescaler Period Register Low */
12#define CD180_MSMR 0x61 /* Modem Service Match Register */
13#define CD180_TSMR 0x62 /* Transmit Service Match Register */
14#define CD180_RSMR 0x63 /* Receive Service Match Register */
15#define CD180_GSVR 0x40 /* Global Service Vector Register */
16#define CD180_SRSR 0x65 /* Service Request Status Register */
17#define CD180_GSCR 0x41 /* Global Service Channel Register */
18#define CD180_CAR 0x64 /* Channel Access Register */
19
20/* Indexed registers */
21#define CD180_RDCR 0x07 /* Receive Data Count Register */
22#define CD180_RDR 0x78 /* Receiver Data Register */
23#define CD180_RCSR 0x7a /* Receiver Character Status Register */
24#define CD180_TDR 0x7b /* Transmit Data Register */
25#define CD180_EOSRR 0x7f /* End of Service Request Register */
26
27/* Channel Registers */
28#define CD180_SRER 0x02 /* Service Request Enable Register */
29#define CD180_CCR 0x01 /* Channel Command Register */
30#define CD180_COR1 0x03 /* Channel Option Register 1 */
31#define CD180_COR2 0x04 /* Channel Option Register 2 */
32#define CD180_COR3 0x05 /* Channel Option Register 3 */
33#define CD180_CCSR 0x06 /* Channel Control Status Register */
34#define CD180_RTPR 0x18 /* Receive Timeout Period Register */
35#define CD180_RBPRH 0x31 /* Receive Bit Rate Period Register High */
36#define CD180_RBPRL 0x32 /* Receive Bit Rate Period Register Low */
37#define CD180_TBPRH 0x39 /* Transmit Bit Rate Period Register High */
38#define CD180_TBPRL 0x3a /* Transmit Bit Rate Period Register Low */
39#define CD180_SCHR1 0x09 /* Special Character Register 1 */
40#define CD180_SCHR2 0x0a /* Special Character Register 2 */
41#define CD180_SCHR3 0x0b /* Special Character Register 3 */
42#define CD180_SCHR4 0x0c /* Special Character Register 4 */
43#define CD180_MCR 0x12 /* Modem Change Register */
44#define CD180_MCOR1 0x10 /* Modem Change Option 1 Register */
45#define CD180_MCOR2 0x11 /* Modem Change Option 2 Register */
46#define CD180_MSVR 0x28 /* Modem Signal Value Register */
47#define CD180_MSVRTS 0x29 /* Modem Signal Value RTS */
48#define CD180_MSVDTR 0x2a /* Modem Signal Value DTR */
49
50/* Global Interrupt Vector Register (R/W) */
51
52#define GSVR_ITMASK 0x07 /* Interrupt type mask */
53#define GSVR_IT_MDM 0x01 /* Modem Signal Change Interrupt */
54#define GSVR_IT_TX 0x02 /* Transmit Data Interrupt */
55#define GSVR_IT_RGD 0x03 /* Receive Good Data Interrupt */
56#define GSVR_IT_REXC 0x07 /* Receive Exception Interrupt */
57
58
59/* Global Interrupt Channel Register (R/W) */
60
61#define GSCR_CHAN 0x1c /* Channel Number Mask */
62#define GSCR_CHAN_OFF 2 /* Channel Number Offset */
63
64
65/* Channel Address Register (R/W) */
66
67#define CAR_CHAN 0x07 /* Channel Number Mask */
68
69
70/* Receive Character Status Register (R/O) */
71
72#define RCSR_TOUT 0x80 /* Rx Timeout */
73#define RCSR_SCDET 0x70 /* Special Character Detected Mask */
74#define RCSR_NO_SC 0x00 /* No Special Characters Detected */
75#define RCSR_SC_1 0x10 /* Special Char 1 (or 1 & 3) Detected */
76#define RCSR_SC_2 0x20 /* Special Char 2 (or 2 & 4) Detected */
77#define RCSR_SC_3 0x30 /* Special Char 3 Detected */
78#define RCSR_SC_4 0x40 /* Special Char 4 Detected */
79#define RCSR_BREAK 0x08 /* Break has been detected */
80#define RCSR_PE 0x04 /* Parity Error */
81#define RCSR_FE 0x02 /* Frame Error */
82#define RCSR_OE 0x01 /* Overrun Error */
83
84
85/* Channel Command Register (R/W) (commands in groups can be OR-ed) */
86
87#define CCR_HARDRESET 0x81 /* Reset the chip */
88
89#define CCR_SOFTRESET 0x80 /* Soft Channel Reset */
90
91#define CCR_CORCHG1 0x42 /* Channel Option Register 1 Changed */
92#define CCR_CORCHG2 0x44 /* Channel Option Register 2 Changed */
93#define CCR_CORCHG3 0x48 /* Channel Option Register 3 Changed */
94
95#define CCR_SSCH1 0x21 /* Send Special Character 1 */
96
97#define CCR_SSCH2 0x22 /* Send Special Character 2 */
98
99#define CCR_SSCH3 0x23 /* Send Special Character 3 */
100
101#define CCR_SSCH4 0x24 /* Send Special Character 4 */
102
103#define CCR_TXEN 0x18 /* Enable Transmitter */
104#define CCR_RXEN 0x12 /* Enable Receiver */
105
106#define CCR_TXDIS 0x14 /* Disable Transmitter */
107#define CCR_RXDIS 0x11 /* Disable Receiver */
108
109
110/* Service Request Enable Register (R/W) */
111
112#define SRER_DSR 0x80 /* Enable interrupt on DSR change */
113#define SRER_CD 0x40 /* Enable interrupt on CD change */
114#define SRER_CTS 0x20 /* Enable interrupt on CTS change */
115#define SRER_RXD 0x10 /* Enable interrupt on Receive Data */
116#define SRER_RXSC 0x08 /* Enable interrupt on Receive Spec. Char */
117#define SRER_TXRDY 0x04 /* Enable interrupt on TX FIFO empty */
118#define SRER_TXEMPTY 0x02 /* Enable interrupt on TX completely empty */
119#define SRER_RET 0x01 /* Enable interrupt on RX Exc. Timeout */
120
121
122/* Channel Option Register 1 (R/W) */
123
124#define COR1_ODDP 0x80 /* Odd Parity */
125#define COR1_PARMODE 0x60 /* Parity Mode mask */
126#define COR1_NOPAR 0x00 /* No Parity */
127#define COR1_FORCEPAR 0x20 /* Force Parity */
128#define COR1_NORMPAR 0x40 /* Normal Parity */
129#define COR1_IGNORE 0x10 /* Ignore Parity on RX */
130#define COR1_STOPBITS 0x0c /* Number of Stop Bits */
131#define COR1_1SB 0x00 /* 1 Stop Bit */
132#define COR1_15SB 0x04 /* 1.5 Stop Bits */
133#define COR1_2SB 0x08 /* 2 Stop Bits */
134#define COR1_CHARLEN 0x03 /* Character Length */
135#define COR1_5BITS 0x00 /* 5 bits */
136#define COR1_6BITS 0x01 /* 6 bits */
137#define COR1_7BITS 0x02 /* 7 bits */
138#define COR1_8BITS 0x03 /* 8 bits */
139
140
141/* Channel Option Register 2 (R/W) */
142
143#define COR2_IXM 0x80 /* Implied XON mode */
144#define COR2_TXIBE 0x40 /* Enable In-Band (XON/XOFF) Flow Control */
145#define COR2_ETC 0x20 /* Embedded Tx Commands Enable */
146#define COR2_LLM 0x10 /* Local Loopback Mode */
147#define COR2_RLM 0x08 /* Remote Loopback Mode */
148#define COR2_RTSAO 0x04 /* RTS Automatic Output Enable */
149#define COR2_CTSAE 0x02 /* CTS Automatic Enable */
150#define COR2_DSRAE 0x01 /* DSR Automatic Enable */
151
152
153/* Channel Option Register 3 (R/W) */
154
155#define COR3_XONCH 0x80 /* XON is a pair of characters (1 & 3) */
156#define COR3_XOFFCH 0x40 /* XOFF is a pair of characters (2 & 4) */
157#define COR3_FCT 0x20 /* Flow-Control Transparency Mode */
158#define COR3_SCDE 0x10 /* Special Character Detection Enable */
159#define COR3_RXTH 0x0f /* RX FIFO Threshold value (1-8) */
160
161
162/* Channel Control Status Register (R/O) */
163
164#define CCSR_RXEN 0x80 /* Receiver Enabled */
165#define CCSR_RXFLOFF 0x40 /* Receive Flow Off (XOFF was sent) */
166#define CCSR_RXFLON 0x20 /* Receive Flow On (XON was sent) */
167#define CCSR_TXEN 0x08 /* Transmitter Enabled */
168#define CCSR_TXFLOFF 0x04 /* Transmit Flow Off (got XOFF) */
169#define CCSR_TXFLON 0x02 /* Transmit Flow On (got XON) */
170
171
172/* Modem Change Option Register 1 (R/W) */
173
174#define MCOR1_DSRZD 0x80 /* Detect 0->1 transition of DSR */
175#define MCOR1_CDZD 0x40 /* Detect 0->1 transition of CD */
176#define MCOR1_CTSZD 0x20 /* Detect 0->1 transition of CTS */
177#define MCOR1_DTRTH 0x0f /* Auto DTR flow control Threshold (1-8) */
178#define MCOR1_NODTRFC 0x0 /* Automatic DTR flow control disabled */
179
180
181/* Modem Change Option Register 2 (R/W) */
182
183#define MCOR2_DSROD 0x80 /* Detect 1->0 transition of DSR */
184#define MCOR2_CDOD 0x40 /* Detect 1->0 transition of CD */
185#define MCOR2_CTSOD 0x20 /* Detect 1->0 transition of CTS */
186
187
188/* Modem Change Register (R/W) */
189
190#define MCR_DSRCHG 0x80 /* DSR Changed */
191#define MCR_CDCHG 0x40 /* CD Changed */
192#define MCR_CTSCHG 0x20 /* CTS Changed */
193
194
195/* Modem Signal Value Register (R/W) */
196
197#define MSVR_DSR 0x80 /* Current state of DSR input */
198#define MSVR_CD 0x40 /* Current state of CD input */
199#define MSVR_CTS 0x20 /* Current state of CTS input */
200#define MSVR_DTR 0x02 /* Current state of DTR output */
201#define MSVR_RTS 0x01 /* Current state of RTS output */
202
203
204/* Service Request Status Register */
205
206#define SRSR_CMASK 0xC0 /* Current Service Context Mask */
207#define SRSR_CNONE 0x00 /* Not in a service context */
208#define SRSR_CRX 0x40 /* Rx Context */
209#define SRSR_CTX 0x80 /* Tx Context */
210#define SRSR_CMDM 0xC0 /* Modem Context */
211#define SRSR_ANYINT 0x6F /* Any interrupt flag */
212#define SRSR_RINT 0x10 /* Receive Interrupt */
213#define SRSR_TINT 0x04 /* Transmit Interrupt */
214#define SRSR_MINT 0x01 /* Modem Interrupt */
215#define SRSR_REXT 0x20 /* Receive External Interrupt */
216#define SRSR_TEXT 0x08 /* Transmit External Interrupt */
217#define SRSR_MEXT 0x02 /* Modem External Interrupt */
218
219
220/* Service Request Configuration Register */
221
222#define SRCR_PKGTYPE 0x80
223#define SRCR_REGACKEN 0x40
224#define SRCR_DAISYEN 0x20
225#define SRCR_GLOBPRI 0x10
226#define SRCR_UNFAIR 0x08
227#define SRCR_AUTOPRI 0x02
228#define SRCR_PRISEL 0x01
229
230/* Values for register-based Interrupt ACKs */
231#define CD180_ACK_MINT 0x75 /* goes to MSMR */
232#define CD180_ACK_TINT 0x76 /* goes to TSMR */
233#define CD180_ACK_RINT 0x77 /* goes to RSMR */
234
235/* Escape characters */
236
237#define CD180_C_ESC 0x00 /* Escape character */
238#define CD180_C_SBRK 0x81 /* Start sending BREAK */
239#define CD180_C_DELAY 0x82 /* Delay output */
240#define CD180_C_EBRK 0x83 /* Stop sending BREAK */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 01:38:37 -0400