diff options
Diffstat (limited to 'drivers/s390')
-rw-r--r-- | drivers/s390/block/dasd_diag.c | 34 | ||||
-rw-r--r-- | drivers/s390/block/xpram.c | 54 | ||||
-rw-r--r-- | drivers/s390/char/sclp.c | 31 | ||||
-rw-r--r-- | drivers/s390/char/vmwatchdog.c | 52 | ||||
-rw-r--r-- | drivers/s390/cio/device_id.c | 38 | ||||
-rw-r--r-- | drivers/s390/cio/ioasm.h | 220 | ||||
-rw-r--r-- | drivers/s390/cio/qdio.h | 192 | ||||
-rw-r--r-- | drivers/s390/net/iucv.c | 39 | ||||
-rw-r--r-- | drivers/s390/s390mach.c | 93 |
9 files changed, 255 insertions, 498 deletions
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c index 23fa0b289173..9d051e5687ea 100644 --- a/drivers/s390/block/dasd_diag.c +++ b/drivers/s390/block/dasd_diag.c | |||
@@ -63,44 +63,26 @@ static const u8 DASD_DIAG_CMS1[] = { 0xc3, 0xd4, 0xe2, 0xf1 };/* EBCDIC CMS1 */ | |||
63 | * and function code cmd. | 63 | * and function code cmd. |
64 | * In case of an exception return 3. Otherwise return result of bitwise OR of | 64 | * In case of an exception return 3. Otherwise return result of bitwise OR of |
65 | * resulting condition code and DIAG return code. */ | 65 | * resulting condition code and DIAG return code. */ |
66 | static __inline__ int | 66 | static inline int dia250(void *iob, int cmd) |
67 | dia250(void *iob, int cmd) | ||
68 | { | 67 | { |
68 | register unsigned long reg0 asm ("0") = (unsigned long) iob; | ||
69 | typedef union { | 69 | typedef union { |
70 | struct dasd_diag_init_io init_io; | 70 | struct dasd_diag_init_io init_io; |
71 | struct dasd_diag_rw_io rw_io; | 71 | struct dasd_diag_rw_io rw_io; |
72 | } addr_type; | 72 | } addr_type; |
73 | int rc; | 73 | int rc; |
74 | 74 | ||
75 | __asm__ __volatile__( | 75 | rc = 3; |
76 | #ifdef CONFIG_64BIT | 76 | asm volatile( |
77 | " lghi %0,3\n" | ||
78 | " lgr 0,%3\n" | ||
79 | " diag 0,%2,0x250\n" | ||
80 | "0: ipm %0\n" | ||
81 | " srl %0,28\n" | ||
82 | " or %0,1\n" | ||
83 | "1:\n" | ||
84 | ".section __ex_table,\"a\"\n" | ||
85 | " .align 8\n" | ||
86 | " .quad 0b,1b\n" | ||
87 | ".previous\n" | ||
88 | #else | ||
89 | " lhi %0,3\n" | ||
90 | " lr 0,%3\n" | ||
91 | " diag 0,%2,0x250\n" | 77 | " diag 0,%2,0x250\n" |
92 | "0: ipm %0\n" | 78 | "0: ipm %0\n" |
93 | " srl %0,28\n" | 79 | " srl %0,28\n" |
94 | " or %0,1\n" | 80 | " or %0,1\n" |
95 | "1:\n" | 81 | "1:\n" |
96 | ".section __ex_table,\"a\"\n" | 82 | EX_TABLE(0b,1b) |
97 | " .align 4\n" | 83 | : "+d" (rc), "=m" (*(addr_type *) iob) |
98 | " .long 0b,1b\n" | 84 | : "d" (cmd), "d" (reg0), "m" (*(addr_type *) iob) |
99 | ".previous\n" | 85 | : "1", "cc"); |
100 | #endif | ||
101 | : "=&d" (rc), "=m" (*(addr_type *) iob) | ||
102 | : "d" (cmd), "d" (iob), "m" (*(addr_type *) iob) | ||
103 | : "0", "1", "cc"); | ||
104 | return rc; | 86 | return rc; |
105 | } | 87 | } |
106 | 88 | ||
diff --git a/drivers/s390/block/xpram.c b/drivers/s390/block/xpram.c index cab2c736683a..a04d9120cef0 100644 --- a/drivers/s390/block/xpram.c +++ b/drivers/s390/block/xpram.c | |||
@@ -89,28 +89,15 @@ MODULE_LICENSE("GPL"); | |||
89 | */ | 89 | */ |
90 | static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) | 90 | static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) |
91 | { | 91 | { |
92 | int cc; | 92 | int cc = 2; /* return unused cc 2 if pgin traps */ |
93 | 93 | ||
94 | __asm__ __volatile__ ( | 94 | asm volatile( |
95 | " lhi %0,2\n" /* return unused cc 2 if pgin traps */ | 95 | " .insn rre,0xb22e0000,%1,%2\n" /* pgin %1,%2 */ |
96 | " .insn rre,0xb22e0000,%1,%2\n" /* pgin %1,%2 */ | 96 | "0: ipm %0\n" |
97 | "0: ipm %0\n" | 97 | " srl %0,28\n" |
98 | " srl %0,28\n" | ||
99 | "1:\n" | 98 | "1:\n" |
100 | #ifndef CONFIG_64BIT | 99 | EX_TABLE(0b,1b) |
101 | ".section __ex_table,\"a\"\n" | 100 | : "+d" (cc) : "a" (__pa(page_addr)), "d" (xpage_index) : "cc"); |
102 | " .align 4\n" | ||
103 | " .long 0b,1b\n" | ||
104 | ".previous" | ||
105 | #else | ||
106 | ".section __ex_table,\"a\"\n" | ||
107 | " .align 8\n" | ||
108 | " .quad 0b,1b\n" | ||
109 | ".previous" | ||
110 | #endif | ||
111 | : "=&d" (cc) | ||
112 | : "a" (__pa(page_addr)), "a" (xpage_index) | ||
113 | : "cc" ); | ||
114 | if (cc == 3) | 101 | if (cc == 3) |
115 | return -ENXIO; | 102 | return -ENXIO; |
116 | if (cc == 2) { | 103 | if (cc == 2) { |
@@ -137,28 +124,15 @@ static int xpram_page_in (unsigned long page_addr, unsigned int xpage_index) | |||
137 | */ | 124 | */ |
138 | static long xpram_page_out (unsigned long page_addr, unsigned int xpage_index) | 125 | static long xpram_page_out (unsigned long page_addr, unsigned int xpage_index) |
139 | { | 126 | { |
140 | int cc; | 127 | int cc = 2; /* return unused cc 2 if pgin traps */ |
141 | 128 | ||
142 | __asm__ __volatile__ ( | 129 | asm volatile( |
143 | " lhi %0,2\n" /* return unused cc 2 if pgout traps */ | 130 | " .insn rre,0xb22f0000,%1,%2\n" /* pgout %1,%2 */ |
144 | " .insn rre,0xb22f0000,%1,%2\n" /* pgout %1,%2 */ | 131 | "0: ipm %0\n" |
145 | "0: ipm %0\n" | 132 | " srl %0,28\n" |
146 | " srl %0,28\n" | ||
147 | "1:\n" | 133 | "1:\n" |
148 | #ifndef CONFIG_64BIT | 134 | EX_TABLE(0b,1b) |
149 | ".section __ex_table,\"a\"\n" | 135 | : "+d" (cc) : "a" (__pa(page_addr)), "d" (xpage_index) : "cc"); |
150 | " .align 4\n" | ||
151 | " .long 0b,1b\n" | ||
152 | ".previous" | ||
153 | #else | ||
154 | ".section __ex_table,\"a\"\n" | ||
155 | " .align 8\n" | ||
156 | " .quad 0b,1b\n" | ||
157 | ".previous" | ||
158 | #endif | ||
159 | : "=&d" (cc) | ||
160 | : "a" (__pa(page_addr)), "a" (xpage_index) | ||
161 | : "cc" ); | ||
162 | if (cc == 3) | 136 | if (cc == 3) |
163 | return -ENXIO; | 137 | return -ENXIO; |
164 | if (cc == 2) { | 138 | if (cc == 2) { |
diff --git a/drivers/s390/char/sclp.c b/drivers/s390/char/sclp.c index 985d1613baaa..31e335751d6d 100644 --- a/drivers/s390/char/sclp.c +++ b/drivers/s390/char/sclp.c | |||
@@ -100,13 +100,12 @@ service_call(sclp_cmdw_t command, void *sccb) | |||
100 | { | 100 | { |
101 | int cc; | 101 | int cc; |
102 | 102 | ||
103 | __asm__ __volatile__( | 103 | asm volatile( |
104 | " .insn rre,0xb2200000,%1,%2\n" /* servc %1,%2 */ | 104 | " .insn rre,0xb2200000,%1,%2\n" /* servc %1,%2 */ |
105 | " ipm %0\n" | 105 | " ipm %0\n" |
106 | " srl %0,28" | 106 | " srl %0,28" |
107 | : "=&d" (cc) | 107 | : "=&d" (cc) : "d" (command), "a" (__pa(sccb)) |
108 | : "d" (command), "a" (__pa(sccb)) | 108 | : "cc", "memory"); |
109 | : "cc", "memory" ); | ||
110 | if (cc == 3) | 109 | if (cc == 3) |
111 | return -EIO; | 110 | return -EIO; |
112 | if (cc == 2) | 111 | if (cc == 2) |
@@ -360,16 +359,6 @@ sclp_interrupt_handler(struct pt_regs *regs, __u16 code) | |||
360 | sclp_process_queue(); | 359 | sclp_process_queue(); |
361 | } | 360 | } |
362 | 361 | ||
363 | /* Return current Time-Of-Day clock. */ | ||
364 | static inline u64 | ||
365 | sclp_get_clock(void) | ||
366 | { | ||
367 | u64 result; | ||
368 | |||
369 | asm volatile ("STCK 0(%1)" : "=m" (result) : "a" (&(result)) : "cc"); | ||
370 | return result; | ||
371 | } | ||
372 | |||
373 | /* Convert interval in jiffies to TOD ticks. */ | 362 | /* Convert interval in jiffies to TOD ticks. */ |
374 | static inline u64 | 363 | static inline u64 |
375 | sclp_tod_from_jiffies(unsigned long jiffies) | 364 | sclp_tod_from_jiffies(unsigned long jiffies) |
@@ -382,7 +371,6 @@ sclp_tod_from_jiffies(unsigned long jiffies) | |||
382 | void | 371 | void |
383 | sclp_sync_wait(void) | 372 | sclp_sync_wait(void) |
384 | { | 373 | { |
385 | unsigned long psw_mask; | ||
386 | unsigned long flags; | 374 | unsigned long flags; |
387 | unsigned long cr0, cr0_sync; | 375 | unsigned long cr0, cr0_sync; |
388 | u64 timeout; | 376 | u64 timeout; |
@@ -392,7 +380,7 @@ sclp_sync_wait(void) | |||
392 | timeout = 0; | 380 | timeout = 0; |
393 | if (timer_pending(&sclp_request_timer)) { | 381 | if (timer_pending(&sclp_request_timer)) { |
394 | /* Get timeout TOD value */ | 382 | /* Get timeout TOD value */ |
395 | timeout = sclp_get_clock() + | 383 | timeout = get_clock() + |
396 | sclp_tod_from_jiffies(sclp_request_timer.expires - | 384 | sclp_tod_from_jiffies(sclp_request_timer.expires - |
397 | jiffies); | 385 | jiffies); |
398 | } | 386 | } |
@@ -406,13 +394,12 @@ sclp_sync_wait(void) | |||
406 | cr0_sync |= 0x00000200; | 394 | cr0_sync |= 0x00000200; |
407 | cr0_sync &= 0xFFFFF3AC; | 395 | cr0_sync &= 0xFFFFF3AC; |
408 | __ctl_load(cr0_sync, 0, 0); | 396 | __ctl_load(cr0_sync, 0, 0); |
409 | asm volatile ("STOSM 0(%1),0x01" | 397 | __raw_local_irq_stosm(0x01); |
410 | : "=m" (psw_mask) : "a" (&psw_mask) : "memory"); | ||
411 | /* Loop until driver state indicates finished request */ | 398 | /* Loop until driver state indicates finished request */ |
412 | while (sclp_running_state != sclp_running_state_idle) { | 399 | while (sclp_running_state != sclp_running_state_idle) { |
413 | /* Check for expired request timer */ | 400 | /* Check for expired request timer */ |
414 | if (timer_pending(&sclp_request_timer) && | 401 | if (timer_pending(&sclp_request_timer) && |
415 | sclp_get_clock() > timeout && | 402 | get_clock() > timeout && |
416 | del_timer(&sclp_request_timer)) | 403 | del_timer(&sclp_request_timer)) |
417 | sclp_request_timer.function(sclp_request_timer.data); | 404 | sclp_request_timer.function(sclp_request_timer.data); |
418 | barrier(); | 405 | barrier(); |
diff --git a/drivers/s390/char/vmwatchdog.c b/drivers/s390/char/vmwatchdog.c index 807320a41fa4..4b868f72fe89 100644 --- a/drivers/s390/char/vmwatchdog.c +++ b/drivers/s390/char/vmwatchdog.c | |||
@@ -54,48 +54,20 @@ enum vmwdt_func { | |||
54 | static int __diag288(enum vmwdt_func func, unsigned int timeout, | 54 | static int __diag288(enum vmwdt_func func, unsigned int timeout, |
55 | char *cmd, size_t len) | 55 | char *cmd, size_t len) |
56 | { | 56 | { |
57 | register unsigned long __func asm("2"); | 57 | register unsigned long __func asm("2") = func; |
58 | register unsigned long __timeout asm("3"); | 58 | register unsigned long __timeout asm("3") = timeout; |
59 | register unsigned long __cmdp asm("4"); | 59 | register unsigned long __cmdp asm("4") = virt_to_phys(cmd); |
60 | register unsigned long __cmdl asm("5"); | 60 | register unsigned long __cmdl asm("5") = len; |
61 | int err; | 61 | int err; |
62 | 62 | ||
63 | __func = func; | 63 | err = -EINVAL; |
64 | __timeout = timeout; | 64 | asm volatile( |
65 | __cmdp = virt_to_phys(cmd); | 65 | " diag %1,%3,0x288\n" |
66 | __cmdl = len; | 66 | "0: la %0,0\n" |
67 | err = 0; | 67 | "1:\n" |
68 | asm volatile ( | 68 | EX_TABLE(0b,1b) |
69 | #ifdef CONFIG_64BIT | 69 | : "=d" (err) : "d"(__func), "d"(__timeout), |
70 | "diag %2,%4,0x288\n" | 70 | "d"(__cmdp), "d"(__cmdl), "0" (-EINVAL) : "1", "cc"); |
71 | "1: \n" | ||
72 | ".section .fixup,\"ax\"\n" | ||
73 | "2: lghi %0,%1\n" | ||
74 | " jg 1b\n" | ||
75 | ".previous\n" | ||
76 | ".section __ex_table,\"a\"\n" | ||
77 | " .align 8\n" | ||
78 | " .quad 1b,2b\n" | ||
79 | ".previous\n" | ||
80 | #else | ||
81 | "diag %2,%4,0x288\n" | ||
82 | "1: \n" | ||
83 | ".section .fixup,\"ax\"\n" | ||
84 | "2: lhi %0,%1\n" | ||
85 | " bras 1,3f\n" | ||
86 | " .long 1b\n" | ||
87 | "3: l 1,0(1)\n" | ||
88 | " br 1\n" | ||
89 | ".previous\n" | ||
90 | ".section __ex_table,\"a\"\n" | ||
91 | " .align 4\n" | ||
92 | " .long 1b,2b\n" | ||
93 | ".previous\n" | ||
94 | #endif | ||
95 | : "+&d"(err) | ||
96 | : "i"(-EINVAL), "d"(__func), "d"(__timeout), | ||
97 | "d"(__cmdp), "d"(__cmdl) | ||
98 | : "1", "cc"); | ||
99 | return err; | 71 | return err; |
100 | } | 72 | } |
101 | 73 | ||
diff --git a/drivers/s390/cio/device_id.c b/drivers/s390/cio/device_id.c index 438db483035d..1398367b5f68 100644 --- a/drivers/s390/cio/device_id.c +++ b/drivers/s390/cio/device_id.c | |||
@@ -42,18 +42,15 @@ diag210(struct diag210 * addr) | |||
42 | spin_lock_irqsave(&diag210_lock, flags); | 42 | spin_lock_irqsave(&diag210_lock, flags); |
43 | diag210_tmp = *addr; | 43 | diag210_tmp = *addr; |
44 | 44 | ||
45 | asm volatile ( | 45 | asm volatile( |
46 | " lhi %0,-1\n" | 46 | " lhi %0,-1\n" |
47 | " sam31\n" | 47 | " sam31\n" |
48 | " diag %1,0,0x210\n" | 48 | " diag %1,0,0x210\n" |
49 | "0: ipm %0\n" | 49 | "0: ipm %0\n" |
50 | " srl %0,28\n" | 50 | " srl %0,28\n" |
51 | "1: sam64\n" | 51 | "1: sam64\n" |
52 | ".section __ex_table,\"a\"\n" | 52 | EX_TABLE(0b,1b) |
53 | " .align 8\n" | 53 | : "=&d" (ccode) : "a" (__pa(&diag210_tmp)) : "cc", "memory"); |
54 | " .quad 0b,1b\n" | ||
55 | ".previous" | ||
56 | : "=&d" (ccode) : "a" (__pa(&diag210_tmp)) : "cc", "memory" ); | ||
57 | 54 | ||
58 | *addr = diag210_tmp; | 55 | *addr = diag210_tmp; |
59 | spin_unlock_irqrestore(&diag210_lock, flags); | 56 | spin_unlock_irqrestore(&diag210_lock, flags); |
@@ -66,17 +63,14 @@ diag210(struct diag210 * addr) | |||
66 | { | 63 | { |
67 | int ccode; | 64 | int ccode; |
68 | 65 | ||
69 | asm volatile ( | 66 | asm volatile( |
70 | " lhi %0,-1\n" | 67 | " lhi %0,-1\n" |
71 | " diag %1,0,0x210\n" | 68 | " diag %1,0,0x210\n" |
72 | "0: ipm %0\n" | 69 | "0: ipm %0\n" |
73 | " srl %0,28\n" | 70 | " srl %0,28\n" |
74 | "1:\n" | 71 | "1:\n" |
75 | ".section __ex_table,\"a\"\n" | 72 | EX_TABLE(0b,1b) |
76 | " .align 4\n" | 73 | : "=&d" (ccode) : "a" (__pa(addr)) : "cc", "memory"); |
77 | " .long 0b,1b\n" | ||
78 | ".previous" | ||
79 | : "=&d" (ccode) : "a" (__pa(addr)) : "cc", "memory" ); | ||
80 | 74 | ||
81 | return ccode; | 75 | return ccode; |
82 | } | 76 | } |
diff --git a/drivers/s390/cio/ioasm.h b/drivers/s390/cio/ioasm.h index 95a9462f9a91..ad6d82940069 100644 --- a/drivers/s390/cio/ioasm.h +++ b/drivers/s390/cio/ioasm.h | |||
@@ -25,106 +25,74 @@ struct tpi_info { | |||
25 | static inline int stsch(struct subchannel_id schid, | 25 | static inline int stsch(struct subchannel_id schid, |
26 | volatile struct schib *addr) | 26 | volatile struct schib *addr) |
27 | { | 27 | { |
28 | register struct subchannel_id reg1 asm ("1") = schid; | ||
28 | int ccode; | 29 | int ccode; |
29 | 30 | ||
30 | __asm__ __volatile__( | 31 | asm volatile( |
31 | " lr 1,%1\n" | 32 | " stsch 0(%2)\n" |
32 | " stsch 0(%2)\n" | 33 | " ipm %0\n" |
33 | " ipm %0\n" | 34 | " srl %0,28" |
34 | " srl %0,28" | 35 | : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
35 | : "=d" (ccode) | ||
36 | : "d" (schid), "a" (addr), "m" (*addr) | ||
37 | : "cc", "1" ); | ||
38 | return ccode; | 36 | return ccode; |
39 | } | 37 | } |
40 | 38 | ||
41 | static inline int stsch_err(struct subchannel_id schid, | 39 | static inline int stsch_err(struct subchannel_id schid, |
42 | volatile struct schib *addr) | 40 | volatile struct schib *addr) |
43 | { | 41 | { |
44 | int ccode; | 42 | register struct subchannel_id reg1 asm ("1") = schid; |
43 | int ccode = -EIO; | ||
45 | 44 | ||
46 | __asm__ __volatile__( | 45 | asm volatile( |
47 | " lhi %0,%3\n" | 46 | " stsch 0(%2)\n" |
48 | " lr 1,%1\n" | 47 | "0: ipm %0\n" |
49 | " stsch 0(%2)\n" | 48 | " srl %0,28\n" |
50 | "0: ipm %0\n" | ||
51 | " srl %0,28\n" | ||
52 | "1:\n" | 49 | "1:\n" |
53 | #ifdef CONFIG_64BIT | 50 | EX_TABLE(0b,1b) |
54 | ".section __ex_table,\"a\"\n" | 51 | : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
55 | " .align 8\n" | ||
56 | " .quad 0b,1b\n" | ||
57 | ".previous" | ||
58 | #else | ||
59 | ".section __ex_table,\"a\"\n" | ||
60 | " .align 4\n" | ||
61 | " .long 0b,1b\n" | ||
62 | ".previous" | ||
63 | #endif | ||
64 | : "=&d" (ccode) | ||
65 | : "d" (schid), "a" (addr), "K" (-EIO), "m" (*addr) | ||
66 | : "cc", "1" ); | ||
67 | return ccode; | 52 | return ccode; |
68 | } | 53 | } |
69 | 54 | ||
70 | static inline int msch(struct subchannel_id schid, | 55 | static inline int msch(struct subchannel_id schid, |
71 | volatile struct schib *addr) | 56 | volatile struct schib *addr) |
72 | { | 57 | { |
58 | register struct subchannel_id reg1 asm ("1") = schid; | ||
73 | int ccode; | 59 | int ccode; |
74 | 60 | ||
75 | __asm__ __volatile__( | 61 | asm volatile( |
76 | " lr 1,%1\n" | 62 | " msch 0(%2)\n" |
77 | " msch 0(%2)\n" | 63 | " ipm %0\n" |
78 | " ipm %0\n" | 64 | " srl %0,28" |
79 | " srl %0,28" | 65 | : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
80 | : "=d" (ccode) | ||
81 | : "d" (schid), "a" (addr), "m" (*addr) | ||
82 | : "cc", "1" ); | ||
83 | return ccode; | 66 | return ccode; |
84 | } | 67 | } |
85 | 68 | ||
86 | static inline int msch_err(struct subchannel_id schid, | 69 | static inline int msch_err(struct subchannel_id schid, |
87 | volatile struct schib *addr) | 70 | volatile struct schib *addr) |
88 | { | 71 | { |
89 | int ccode; | 72 | register struct subchannel_id reg1 asm ("1") = schid; |
73 | int ccode = -EIO; | ||
90 | 74 | ||
91 | __asm__ __volatile__( | 75 | asm volatile( |
92 | " lhi %0,%3\n" | 76 | " msch 0(%2)\n" |
93 | " lr 1,%1\n" | 77 | "0: ipm %0\n" |
94 | " msch 0(%2)\n" | 78 | " srl %0,28\n" |
95 | "0: ipm %0\n" | ||
96 | " srl %0,28\n" | ||
97 | "1:\n" | 79 | "1:\n" |
98 | #ifdef CONFIG_64BIT | 80 | EX_TABLE(0b,1b) |
99 | ".section __ex_table,\"a\"\n" | 81 | : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
100 | " .align 8\n" | ||
101 | " .quad 0b,1b\n" | ||
102 | ".previous" | ||
103 | #else | ||
104 | ".section __ex_table,\"a\"\n" | ||
105 | " .align 4\n" | ||
106 | " .long 0b,1b\n" | ||
107 | ".previous" | ||
108 | #endif | ||
109 | : "=&d" (ccode) | ||
110 | : "d" (schid), "a" (addr), "K" (-EIO), "m" (*addr) | ||
111 | : "cc", "1" ); | ||
112 | return ccode; | 82 | return ccode; |
113 | } | 83 | } |
114 | 84 | ||
115 | static inline int tsch(struct subchannel_id schid, | 85 | static inline int tsch(struct subchannel_id schid, |
116 | volatile struct irb *addr) | 86 | volatile struct irb *addr) |
117 | { | 87 | { |
88 | register struct subchannel_id reg1 asm ("1") = schid; | ||
118 | int ccode; | 89 | int ccode; |
119 | 90 | ||
120 | __asm__ __volatile__( | 91 | asm volatile( |
121 | " lr 1,%1\n" | 92 | " tsch 0(%2)\n" |
122 | " tsch 0(%2)\n" | 93 | " ipm %0\n" |
123 | " ipm %0\n" | 94 | " srl %0,28" |
124 | " srl %0,28" | 95 | : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
125 | : "=d" (ccode) | ||
126 | : "d" (schid), "a" (addr), "m" (*addr) | ||
127 | : "cc", "1" ); | ||
128 | return ccode; | 96 | return ccode; |
129 | } | 97 | } |
130 | 98 | ||
@@ -132,89 +100,77 @@ static inline int tpi( volatile struct tpi_info *addr) | |||
132 | { | 100 | { |
133 | int ccode; | 101 | int ccode; |
134 | 102 | ||
135 | __asm__ __volatile__( | 103 | asm volatile( |
136 | " tpi 0(%1)\n" | 104 | " tpi 0(%1)\n" |
137 | " ipm %0\n" | 105 | " ipm %0\n" |
138 | " srl %0,28" | 106 | " srl %0,28" |
139 | : "=d" (ccode) | 107 | : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc"); |
140 | : "a" (addr), "m" (*addr) | ||
141 | : "cc", "1" ); | ||
142 | return ccode; | 108 | return ccode; |
143 | } | 109 | } |
144 | 110 | ||
145 | static inline int ssch(struct subchannel_id schid, | 111 | static inline int ssch(struct subchannel_id schid, |
146 | volatile struct orb *addr) | 112 | volatile struct orb *addr) |
147 | { | 113 | { |
114 | register struct subchannel_id reg1 asm ("1") = schid; | ||
148 | int ccode; | 115 | int ccode; |
149 | 116 | ||
150 | __asm__ __volatile__( | 117 | asm volatile( |
151 | " lr 1,%1\n" | 118 | " ssch 0(%2)\n" |
152 | " ssch 0(%2)\n" | 119 | " ipm %0\n" |
153 | " ipm %0\n" | 120 | " srl %0,28" |
154 | " srl %0,28" | 121 | : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); |
155 | : "=d" (ccode) | ||
156 | : "d" (schid), "a" (addr), "m" (*addr) | ||
157 | : "cc", "1" ); | ||
158 | return ccode; | 122 | return ccode; |
159 | } | 123 | } |
160 | 124 | ||
161 | static inline int rsch(struct subchannel_id schid) | 125 | static inline int rsch(struct subchannel_id schid) |
162 | { | 126 | { |
127 | register struct subchannel_id reg1 asm ("1") = schid; | ||
163 | int ccode; | 128 | int ccode; |
164 | 129 | ||
165 | __asm__ __volatile__( | 130 | asm volatile( |
166 | " lr 1,%1\n" | 131 | " rsch\n" |
167 | " rsch\n" | 132 | " ipm %0\n" |
168 | " ipm %0\n" | 133 | " srl %0,28" |
169 | " srl %0,28" | 134 | : "=d" (ccode) : "d" (reg1) : "cc"); |
170 | : "=d" (ccode) | ||
171 | : "d" (schid) | ||
172 | : "cc", "1" ); | ||
173 | return ccode; | 135 | return ccode; |
174 | } | 136 | } |
175 | 137 | ||
176 | static inline int csch(struct subchannel_id schid) | 138 | static inline int csch(struct subchannel_id schid) |
177 | { | 139 | { |
140 | register struct subchannel_id reg1 asm ("1") = schid; | ||
178 | int ccode; | 141 | int ccode; |
179 | 142 | ||
180 | __asm__ __volatile__( | 143 | asm volatile( |
181 | " lr 1,%1\n" | 144 | " csch\n" |
182 | " csch\n" | 145 | " ipm %0\n" |
183 | " ipm %0\n" | 146 | " srl %0,28" |
184 | " srl %0,28" | 147 | : "=d" (ccode) : "d" (reg1) : "cc"); |
185 | : "=d" (ccode) | ||
186 | : "d" (schid) | ||
187 | : "cc", "1" ); | ||
188 | return ccode; | 148 | return ccode; |
189 | } | 149 | } |
190 | 150 | ||
191 | static inline int hsch(struct subchannel_id schid) | 151 | static inline int hsch(struct subchannel_id schid) |
192 | { | 152 | { |
153 | register struct subchannel_id reg1 asm ("1") = schid; | ||
193 | int ccode; | 154 | int ccode; |
194 | 155 | ||
195 | __asm__ __volatile__( | 156 | asm volatile( |
196 | " lr 1,%1\n" | 157 | " hsch\n" |
197 | " hsch\n" | 158 | " ipm %0\n" |
198 | " ipm %0\n" | 159 | " srl %0,28" |
199 | " srl %0,28" | 160 | : "=d" (ccode) : "d" (reg1) : "cc"); |
200 | : "=d" (ccode) | ||
201 | : "d" (schid) | ||
202 | : "cc", "1" ); | ||
203 | return ccode; | 161 | return ccode; |
204 | } | 162 | } |
205 | 163 | ||
206 | static inline int xsch(struct subchannel_id schid) | 164 | static inline int xsch(struct subchannel_id schid) |
207 | { | 165 | { |
166 | register struct subchannel_id reg1 asm ("1") = schid; | ||
208 | int ccode; | 167 | int ccode; |
209 | 168 | ||
210 | __asm__ __volatile__( | 169 | asm volatile( |
211 | " lr 1,%1\n" | 170 | " .insn rre,0xb2760000,%1,0\n" |
212 | " .insn rre,0xb2760000,%1,0\n" | 171 | " ipm %0\n" |
213 | " ipm %0\n" | 172 | " srl %0,28" |
214 | " srl %0,28" | 173 | : "=d" (ccode) : "d" (reg1) : "cc"); |
215 | : "=d" (ccode) | ||
216 | : "d" (schid) | ||
217 | : "cc", "1" ); | ||
218 | return ccode; | 174 | return ccode; |
219 | } | 175 | } |
220 | 176 | ||
@@ -223,41 +179,27 @@ static inline int chsc(void *chsc_area) | |||
223 | typedef struct { char _[4096]; } addr_type; | 179 | typedef struct { char _[4096]; } addr_type; |
224 | int cc; | 180 | int cc; |
225 | 181 | ||
226 | __asm__ __volatile__ ( | 182 | asm volatile( |
227 | ".insn rre,0xb25f0000,%2,0 \n\t" | 183 | " .insn rre,0xb25f0000,%2,0\n" |
228 | "ipm %0 \n\t" | 184 | " ipm %0\n" |
229 | "srl %0,28 \n\t" | 185 | " srl %0,28\n" |
230 | : "=d" (cc), "=m" (*(addr_type *) chsc_area) | 186 | : "=d" (cc), "=m" (*(addr_type *) chsc_area) |
231 | : "d" (chsc_area), "m" (*(addr_type *) chsc_area) | 187 | : "d" (chsc_area), "m" (*(addr_type *) chsc_area) |
232 | : "cc" ); | 188 | : "cc"); |
233 | |||
234 | return cc; | 189 | return cc; |
235 | } | 190 | } |
236 | 191 | ||
237 | static inline int iac( void) | ||
238 | { | ||
239 | int ccode; | ||
240 | |||
241 | __asm__ __volatile__( | ||
242 | " iac 1\n" | ||
243 | " ipm %0\n" | ||
244 | " srl %0,28" | ||
245 | : "=d" (ccode) : : "cc", "1" ); | ||
246 | return ccode; | ||
247 | } | ||
248 | |||
249 | static inline int rchp(int chpid) | 192 | static inline int rchp(int chpid) |
250 | { | 193 | { |
194 | register unsigned int reg1 asm ("1") = chpid; | ||
251 | int ccode; | 195 | int ccode; |
252 | 196 | ||
253 | __asm__ __volatile__( | 197 | asm volatile( |
254 | " lr 1,%1\n" | 198 | " lr 1,%1\n" |
255 | " rchp\n" | 199 | " rchp\n" |
256 | " ipm %0\n" | 200 | " ipm %0\n" |
257 | " srl %0,28" | 201 | " srl %0,28" |
258 | : "=d" (ccode) | 202 | : "=d" (ccode) : "d" (reg1) : "cc"); |
259 | : "d" (chpid) | ||
260 | : "cc", "1" ); | ||
261 | return ccode; | 203 | return ccode; |
262 | } | 204 | } |
263 | 205 | ||
diff --git a/drivers/s390/cio/qdio.h b/drivers/s390/cio/qdio.h index 124569362f02..49bb9e371c32 100644 --- a/drivers/s390/cio/qdio.h +++ b/drivers/s390/cio/qdio.h | |||
@@ -274,12 +274,11 @@ do_sqbs(unsigned long sch, unsigned char state, int queue, | |||
274 | register unsigned long _sch asm ("1") = sch; | 274 | register unsigned long _sch asm ("1") = sch; |
275 | unsigned long _queuestart = ((unsigned long)queue << 32) | *start; | 275 | unsigned long _queuestart = ((unsigned long)queue << 32) | *start; |
276 | 276 | ||
277 | asm volatile ( | 277 | asm volatile( |
278 | " .insn rsy,0xeb000000008A,%1,0,0(%2)\n\t" | 278 | " .insn rsy,0xeb000000008A,%1,0,0(%2)" |
279 | : "+d" (_ccq), "+d" (_queuestart) | 279 | : "+d" (_ccq), "+d" (_queuestart) |
280 | : "d" ((unsigned long)state), "d" (_sch) | 280 | : "d" ((unsigned long)state), "d" (_sch) |
281 | : "memory", "cc" | 281 | : "memory", "cc"); |
282 | ); | ||
283 | *count = _ccq & 0xff; | 282 | *count = _ccq & 0xff; |
284 | *start = _queuestart & 0xff; | 283 | *start = _queuestart & 0xff; |
285 | 284 | ||
@@ -299,12 +298,11 @@ do_eqbs(unsigned long sch, unsigned char *state, int queue, | |||
299 | unsigned long _queuestart = ((unsigned long)queue << 32) | *start; | 298 | unsigned long _queuestart = ((unsigned long)queue << 32) | *start; |
300 | unsigned long _state = 0; | 299 | unsigned long _state = 0; |
301 | 300 | ||
302 | asm volatile ( | 301 | asm volatile( |
303 | " .insn rrf,0xB99c0000,%1,%2,0,0 \n\t" | 302 | " .insn rrf,0xB99c0000,%1,%2,0,0" |
304 | : "+d" (_ccq), "+d" (_queuestart), "+d" (_state) | 303 | : "+d" (_ccq), "+d" (_queuestart), "+d" (_state) |
305 | : "d" (_sch) | 304 | : "d" (_sch) |
306 | : "memory", "cc" | 305 | : "memory", "cc" ); |
307 | ); | ||
308 | *count = _ccq & 0xff; | 306 | *count = _ccq & 0xff; |
309 | *start = _queuestart & 0xff; | 307 | *start = _queuestart & 0xff; |
310 | *state = _state & 0xff; | 308 | *state = _state & 0xff; |
@@ -319,69 +317,35 @@ do_eqbs(unsigned long sch, unsigned char *state, int queue, | |||
319 | static inline int | 317 | static inline int |
320 | do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2) | 318 | do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2) |
321 | { | 319 | { |
320 | register unsigned long reg0 asm ("0") = 2; | ||
321 | register struct subchannel_id reg1 asm ("1") = schid; | ||
322 | register unsigned long reg2 asm ("2") = mask1; | ||
323 | register unsigned long reg3 asm ("3") = mask2; | ||
322 | int cc; | 324 | int cc; |
323 | 325 | ||
324 | #ifndef CONFIG_64BIT | 326 | asm volatile( |
325 | asm volatile ( | 327 | " siga 0\n" |
326 | "lhi 0,2 \n\t" | 328 | " ipm %0\n" |
327 | "lr 1,%1 \n\t" | 329 | " srl %0,28\n" |
328 | "lr 2,%2 \n\t" | ||
329 | "lr 3,%3 \n\t" | ||
330 | "siga 0 \n\t" | ||
331 | "ipm %0 \n\t" | ||
332 | "srl %0,28 \n\t" | ||
333 | : "=d" (cc) | 330 | : "=d" (cc) |
334 | : "d" (schid), "d" (mask1), "d" (mask2) | 331 | : "d" (reg0), "d" (reg1), "d" (reg2), "d" (reg3) : "cc"); |
335 | : "cc", "0", "1", "2", "3" | ||
336 | ); | ||
337 | #else /* CONFIG_64BIT */ | ||
338 | asm volatile ( | ||
339 | "lghi 0,2 \n\t" | ||
340 | "llgfr 1,%1 \n\t" | ||
341 | "llgfr 2,%2 \n\t" | ||
342 | "llgfr 3,%3 \n\t" | ||
343 | "siga 0 \n\t" | ||
344 | "ipm %0 \n\t" | ||
345 | "srl %0,28 \n\t" | ||
346 | : "=d" (cc) | ||
347 | : "d" (schid), "d" (mask1), "d" (mask2) | ||
348 | : "cc", "0", "1", "2", "3" | ||
349 | ); | ||
350 | #endif /* CONFIG_64BIT */ | ||
351 | return cc; | 332 | return cc; |
352 | } | 333 | } |
353 | 334 | ||
354 | static inline int | 335 | static inline int |
355 | do_siga_input(struct subchannel_id schid, unsigned int mask) | 336 | do_siga_input(struct subchannel_id schid, unsigned int mask) |
356 | { | 337 | { |
338 | register unsigned long reg0 asm ("0") = 1; | ||
339 | register struct subchannel_id reg1 asm ("1") = schid; | ||
340 | register unsigned long reg2 asm ("2") = mask; | ||
357 | int cc; | 341 | int cc; |
358 | 342 | ||
359 | #ifndef CONFIG_64BIT | 343 | asm volatile( |
360 | asm volatile ( | 344 | " siga 0\n" |
361 | "lhi 0,1 \n\t" | 345 | " ipm %0\n" |
362 | "lr 1,%1 \n\t" | 346 | " srl %0,28\n" |
363 | "lr 2,%2 \n\t" | ||
364 | "siga 0 \n\t" | ||
365 | "ipm %0 \n\t" | ||
366 | "srl %0,28 \n\t" | ||
367 | : "=d" (cc) | ||
368 | : "d" (schid), "d" (mask) | ||
369 | : "cc", "0", "1", "2", "memory" | ||
370 | ); | ||
371 | #else /* CONFIG_64BIT */ | ||
372 | asm volatile ( | ||
373 | "lghi 0,1 \n\t" | ||
374 | "llgfr 1,%1 \n\t" | ||
375 | "llgfr 2,%2 \n\t" | ||
376 | "siga 0 \n\t" | ||
377 | "ipm %0 \n\t" | ||
378 | "srl %0,28 \n\t" | ||
379 | : "=d" (cc) | 347 | : "=d" (cc) |
380 | : "d" (schid), "d" (mask) | 348 | : "d" (reg0), "d" (reg1), "d" (reg2) : "cc", "memory"); |
381 | : "cc", "0", "1", "2", "memory" | ||
382 | ); | ||
383 | #endif /* CONFIG_64BIT */ | ||
384 | |||
385 | return cc; | 349 | return cc; |
386 | } | 350 | } |
387 | 351 | ||
@@ -389,93 +353,35 @@ static inline int | |||
389 | do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb, | 353 | do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb, |
390 | unsigned int fc) | 354 | unsigned int fc) |
391 | { | 355 | { |
356 | register unsigned long __fc asm("0") = fc; | ||
357 | register unsigned long __schid asm("1") = schid; | ||
358 | register unsigned long __mask asm("2") = mask; | ||
392 | int cc; | 359 | int cc; |
393 | __u32 busy_bit; | 360 | |
394 | 361 | asm volatile( | |
395 | #ifndef CONFIG_64BIT | 362 | " siga 0\n" |
396 | asm volatile ( | 363 | "0: ipm %0\n" |
397 | "lhi 0,0 \n\t" | 364 | " srl %0,28\n" |
398 | "lr 1,%2 \n\t" | 365 | "1:\n" |
399 | "lr 2,%3 \n\t" | 366 | EX_TABLE(0b,1b) |
400 | "siga 0 \n\t" | 367 | : "=d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask) |
401 | "0:" | 368 | : "0" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION) |
402 | "ipm %0 \n\t" | 369 | : "cc", "memory"); |
403 | "srl %0,28 \n\t" | 370 | (*bb) = ((unsigned int) __fc) >> 31; |
404 | "srl 0,31 \n\t" | ||
405 | "lr %1,0 \n\t" | ||
406 | "1: \n\t" | ||
407 | ".section .fixup,\"ax\"\n\t" | ||
408 | "2: \n\t" | ||
409 | "lhi %0,%4 \n\t" | ||
410 | "bras 1,3f \n\t" | ||
411 | ".long 1b \n\t" | ||
412 | "3: \n\t" | ||
413 | "l 1,0(1) \n\t" | ||
414 | "br 1 \n\t" | ||
415 | ".previous \n\t" | ||
416 | ".section __ex_table,\"a\"\n\t" | ||
417 | ".align 4 \n\t" | ||
418 | ".long 0b,2b \n\t" | ||
419 | ".previous \n\t" | ||
420 | : "=d" (cc), "=d" (busy_bit) | ||
421 | : "d" (schid), "d" (mask), | ||
422 | "i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION) | ||
423 | : "cc", "0", "1", "2", "memory" | ||
424 | ); | ||
425 | #else /* CONFIG_64BIT */ | ||
426 | asm volatile ( | ||
427 | "llgfr 0,%5 \n\t" | ||
428 | "lgr 1,%2 \n\t" | ||
429 | "llgfr 2,%3 \n\t" | ||
430 | "siga 0 \n\t" | ||
431 | "0:" | ||
432 | "ipm %0 \n\t" | ||
433 | "srl %0,28 \n\t" | ||
434 | "srl 0,31 \n\t" | ||
435 | "llgfr %1,0 \n\t" | ||
436 | "1: \n\t" | ||
437 | ".section .fixup,\"ax\"\n\t" | ||
438 | "lghi %0,%4 \n\t" | ||
439 | "jg 1b \n\t" | ||
440 | ".previous\n\t" | ||
441 | ".section __ex_table,\"a\"\n\t" | ||
442 | ".align 8 \n\t" | ||
443 | ".quad 0b,1b \n\t" | ||
444 | ".previous \n\t" | ||
445 | : "=d" (cc), "=d" (busy_bit) | ||
446 | : "d" (schid), "d" (mask), | ||
447 | "i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION), "d" (fc) | ||
448 | : "cc", "0", "1", "2", "memory" | ||
449 | ); | ||
450 | #endif /* CONFIG_64BIT */ | ||
451 | |||
452 | (*bb) = busy_bit; | ||
453 | return cc; | 371 | return cc; |
454 | } | 372 | } |
455 | 373 | ||
456 | static inline unsigned long | 374 | static inline unsigned long |
457 | do_clear_global_summary(void) | 375 | do_clear_global_summary(void) |
458 | { | 376 | { |
459 | 377 | register unsigned long __fn asm("1") = 3; | |
460 | unsigned long time; | 378 | register unsigned long __tmp asm("2"); |
461 | 379 | register unsigned long __time asm("3"); | |
462 | #ifndef CONFIG_64BIT | 380 | |
463 | asm volatile ( | 381 | asm volatile( |
464 | "lhi 1,3 \n\t" | 382 | " .insn rre,0xb2650000,2,0" |
465 | ".insn rre,0xb2650000,2,0 \n\t" | 383 | : "+d" (__fn), "=d" (__tmp), "=d" (__time)); |
466 | "lr %0,3 \n\t" | 384 | return __time; |
467 | : "=d" (time) : : "cc", "1", "2", "3" | ||
468 | ); | ||
469 | #else /* CONFIG_64BIT */ | ||
470 | asm volatile ( | ||
471 | "lghi 1,3 \n\t" | ||
472 | ".insn rre,0xb2650000,2,0 \n\t" | ||
473 | "lgr %0,3 \n\t" | ||
474 | : "=d" (time) : : "cc", "1", "2", "3" | ||
475 | ); | ||
476 | #endif /* CONFIG_64BIT */ | ||
477 | |||
478 | return time; | ||
479 | } | 385 | } |
480 | 386 | ||
481 | /* | 387 | /* |
diff --git a/drivers/s390/net/iucv.c b/drivers/s390/net/iucv.c index 821dde86e240..809dd8d7f47a 100644 --- a/drivers/s390/net/iucv.c +++ b/drivers/s390/net/iucv.c | |||
@@ -534,19 +534,15 @@ iucv_add_handler (handler *new) | |||
534 | * | 534 | * |
535 | * Returns: return code from CP's IUCV call | 535 | * Returns: return code from CP's IUCV call |
536 | */ | 536 | */ |
537 | static __inline__ ulong | 537 | static inline ulong b2f0(__u32 code, void *parm) |
538 | b2f0(__u32 code, void *parm) | ||
539 | { | 538 | { |
539 | register unsigned long reg0 asm ("0"); | ||
540 | register unsigned long reg1 asm ("1"); | ||
540 | iucv_dumpit("iparml before b2f0 call:", parm, sizeof(iucv_param)); | 541 | iucv_dumpit("iparml before b2f0 call:", parm, sizeof(iucv_param)); |
541 | 542 | ||
542 | asm volatile ( | 543 | reg0 = code; |
543 | "LRA 1,0(%1)\n\t" | 544 | reg1 = virt_to_phys(parm); |
544 | "LR 0,%0\n\t" | 545 | asm volatile(".long 0xb2f01000" : : "d" (reg0), "a" (reg1)); |
545 | ".long 0xb2f01000" | ||
546 | : | ||
547 | : "d" (code), "a" (parm) | ||
548 | : "0", "1" | ||
549 | ); | ||
550 | 546 | ||
551 | iucv_dumpit("iparml after b2f0 call:", parm, sizeof(iucv_param)); | 547 | iucv_dumpit("iparml after b2f0 call:", parm, sizeof(iucv_param)); |
552 | 548 | ||
@@ -1248,6 +1244,8 @@ iucv_purge (__u16 pathid, __u32 msgid, __u32 srccls, __u32 *audit) | |||
1248 | static int | 1244 | static int |
1249 | iucv_query_generic(int want_maxconn) | 1245 | iucv_query_generic(int want_maxconn) |
1250 | { | 1246 | { |
1247 | register unsigned long reg0 asm ("0"); | ||
1248 | register unsigned long reg1 asm ("1"); | ||
1251 | iparml_purge *parm = (iparml_purge *)grab_param(); | 1249 | iparml_purge *parm = (iparml_purge *)grab_param(); |
1252 | int bufsize, maxconn; | 1250 | int bufsize, maxconn; |
1253 | int ccode; | 1251 | int ccode; |
@@ -1256,18 +1254,15 @@ iucv_query_generic(int want_maxconn) | |||
1256 | * Call b2f0 and store R0 (max buffer size), | 1254 | * Call b2f0 and store R0 (max buffer size), |
1257 | * R1 (max connections) and CC. | 1255 | * R1 (max connections) and CC. |
1258 | */ | 1256 | */ |
1259 | asm volatile ( | 1257 | reg0 = QUERY; |
1260 | "LRA 1,0(%4)\n\t" | 1258 | reg1 = virt_to_phys(parm); |
1261 | "LR 0,%3\n\t" | 1259 | asm volatile( |
1262 | ".long 0xb2f01000\n\t" | 1260 | " .long 0xb2f01000\n" |
1263 | "IPM %0\n\t" | 1261 | " ipm %0\n" |
1264 | "SRL %0,28\n\t" | 1262 | " srl %0,28\n" |
1265 | "ST 0,%1\n\t" | 1263 | : "=d" (ccode), "+d" (reg0), "+d" (reg1) : : "cc"); |
1266 | "ST 1,%2\n\t" | 1264 | bufsize = reg0; |
1267 | : "=d" (ccode), "=m" (bufsize), "=m" (maxconn) | 1265 | maxconn = reg1; |
1268 | : "d" (QUERY), "a" (parm) | ||
1269 | : "0", "1", "cc" | ||
1270 | ); | ||
1271 | release_param(parm); | 1266 | release_param(parm); |
1272 | 1267 | ||
1273 | if (ccode) | 1268 | if (ccode) |
diff --git a/drivers/s390/s390mach.c b/drivers/s390/s390mach.c index a914129a4da9..479364d0332a 100644 --- a/drivers/s390/s390mach.c +++ b/drivers/s390/s390mach.c | |||
@@ -253,11 +253,12 @@ s390_revalidate_registers(struct mci *mci) | |||
253 | kill_task = 1; | 253 | kill_task = 1; |
254 | 254 | ||
255 | #ifndef CONFIG_64BIT | 255 | #ifndef CONFIG_64BIT |
256 | asm volatile("ld 0,0(%0)\n" | 256 | asm volatile( |
257 | "ld 2,8(%0)\n" | 257 | " ld 0,0(%0)\n" |
258 | "ld 4,16(%0)\n" | 258 | " ld 2,8(%0)\n" |
259 | "ld 6,24(%0)" | 259 | " ld 4,16(%0)\n" |
260 | : : "a" (&S390_lowcore.floating_pt_save_area)); | 260 | " ld 6,24(%0)" |
261 | : : "a" (&S390_lowcore.floating_pt_save_area)); | ||
261 | #endif | 262 | #endif |
262 | 263 | ||
263 | if (MACHINE_HAS_IEEE) { | 264 | if (MACHINE_HAS_IEEE) { |
@@ -274,37 +275,36 @@ s390_revalidate_registers(struct mci *mci) | |||
274 | * Floating point control register can't be restored. | 275 | * Floating point control register can't be restored. |
275 | * Task will be terminated. | 276 | * Task will be terminated. |
276 | */ | 277 | */ |
277 | asm volatile ("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); | 278 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
278 | kill_task = 1; | 279 | kill_task = 1; |
279 | 280 | ||
280 | } | 281 | } else |
281 | else | 282 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); |
282 | asm volatile ( | 283 | |
283 | "lfpc 0(%0)" | 284 | asm volatile( |
284 | : : "a" (fpt_creg_save_area)); | 285 | " ld 0,0(%0)\n" |
285 | 286 | " ld 1,8(%0)\n" | |
286 | asm volatile("ld 0,0(%0)\n" | 287 | " ld 2,16(%0)\n" |
287 | "ld 1,8(%0)\n" | 288 | " ld 3,24(%0)\n" |
288 | "ld 2,16(%0)\n" | 289 | " ld 4,32(%0)\n" |
289 | "ld 3,24(%0)\n" | 290 | " ld 5,40(%0)\n" |
290 | "ld 4,32(%0)\n" | 291 | " ld 6,48(%0)\n" |
291 | "ld 5,40(%0)\n" | 292 | " ld 7,56(%0)\n" |
292 | "ld 6,48(%0)\n" | 293 | " ld 8,64(%0)\n" |
293 | "ld 7,56(%0)\n" | 294 | " ld 9,72(%0)\n" |
294 | "ld 8,64(%0)\n" | 295 | " ld 10,80(%0)\n" |
295 | "ld 9,72(%0)\n" | 296 | " ld 11,88(%0)\n" |
296 | "ld 10,80(%0)\n" | 297 | " ld 12,96(%0)\n" |
297 | "ld 11,88(%0)\n" | 298 | " ld 13,104(%0)\n" |
298 | "ld 12,96(%0)\n" | 299 | " ld 14,112(%0)\n" |
299 | "ld 13,104(%0)\n" | 300 | " ld 15,120(%0)\n" |
300 | "ld 14,112(%0)\n" | 301 | : : "a" (fpt_save_area)); |
301 | "ld 15,120(%0)\n" | ||
302 | : : "a" (fpt_save_area)); | ||
303 | } | 302 | } |
304 | 303 | ||
305 | /* Revalidate access registers */ | 304 | /* Revalidate access registers */ |
306 | asm volatile("lam 0,15,0(%0)" | 305 | asm volatile( |
307 | : : "a" (&S390_lowcore.access_regs_save_area)); | 306 | " lam 0,15,0(%0)" |
307 | : : "a" (&S390_lowcore.access_regs_save_area)); | ||
308 | if (!mci->ar) | 308 | if (!mci->ar) |
309 | /* | 309 | /* |
310 | * Access registers have unknown contents. | 310 | * Access registers have unknown contents. |
@@ -321,11 +321,13 @@ s390_revalidate_registers(struct mci *mci) | |||
321 | s390_handle_damage("invalid control registers."); | 321 | s390_handle_damage("invalid control registers."); |
322 | else | 322 | else |
323 | #ifdef CONFIG_64BIT | 323 | #ifdef CONFIG_64BIT |
324 | asm volatile("lctlg 0,15,0(%0)" | 324 | asm volatile( |
325 | : : "a" (&S390_lowcore.cregs_save_area)); | 325 | " lctlg 0,15,0(%0)" |
326 | : : "a" (&S390_lowcore.cregs_save_area)); | ||
326 | #else | 327 | #else |
327 | asm volatile("lctl 0,15,0(%0)" | 328 | asm volatile( |
328 | : : "a" (&S390_lowcore.cregs_save_area)); | 329 | " lctl 0,15,0(%0)" |
330 | : : "a" (&S390_lowcore.cregs_save_area)); | ||
329 | #endif | 331 | #endif |
330 | 332 | ||
331 | /* | 333 | /* |
@@ -339,20 +341,23 @@ s390_revalidate_registers(struct mci *mci) | |||
339 | * old contents (should be zero) otherwise set it to zero. | 341 | * old contents (should be zero) otherwise set it to zero. |
340 | */ | 342 | */ |
341 | if (!mci->pr) | 343 | if (!mci->pr) |
342 | asm volatile("sr 0,0\n" | 344 | asm volatile( |
343 | "sckpf" | 345 | " sr 0,0\n" |
344 | : : : "0", "cc"); | 346 | " sckpf" |
347 | : : : "0", "cc"); | ||
345 | else | 348 | else |
346 | asm volatile( | 349 | asm volatile( |
347 | "l 0,0(%0)\n" | 350 | " l 0,0(%0)\n" |
348 | "sckpf" | 351 | " sckpf" |
349 | : : "a" (&S390_lowcore.tod_progreg_save_area) : "0", "cc"); | 352 | : : "a" (&S390_lowcore.tod_progreg_save_area) |
353 | : "0", "cc"); | ||
350 | #endif | 354 | #endif |
351 | 355 | ||
352 | /* Revalidate clock comparator register */ | 356 | /* Revalidate clock comparator register */ |
353 | asm volatile ("stck 0(%1)\n" | 357 | asm volatile( |
354 | "sckc 0(%1)" | 358 | " stck 0(%1)\n" |
355 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | 359 | " sckc 0(%1)" |
360 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | ||
356 | 361 | ||
357 | /* Check if old PSW is valid */ | 362 | /* Check if old PSW is valid */ |
358 | if (!mci->wp) | 363 | if (!mci->wp) |