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path: root/drivers/s390/net/ctcm_mpc.c
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Diffstat (limited to 'drivers/s390/net/ctcm_mpc.c')
-rw-r--r--drivers/s390/net/ctcm_mpc.c64
1 files changed, 34 insertions, 30 deletions
diff --git a/drivers/s390/net/ctcm_mpc.c b/drivers/s390/net/ctcm_mpc.c
index 87c24d2936d6..2861e78773cb 100644
--- a/drivers/s390/net/ctcm_mpc.c
+++ b/drivers/s390/net/ctcm_mpc.c
@@ -419,8 +419,8 @@ void ctc_mpc_establish_connectivity(int port_num,
419 return; 419 return;
420 priv = dev->ml_priv; 420 priv = dev->ml_priv;
421 grp = priv->mpcg; 421 grp = priv->mpcg;
422 rch = priv->channel[READ]; 422 rch = priv->channel[CTCM_READ];
423 wch = priv->channel[WRITE]; 423 wch = priv->channel[CTCM_WRITE];
424 424
425 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_INFO, 425 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_INFO,
426 "%s(%s): state=%s", 426 "%s(%s): state=%s",
@@ -578,7 +578,7 @@ void ctc_mpc_flow_control(int port_num, int flowc)
578 "%s: %s: flowc = %d", 578 "%s: %s: flowc = %d",
579 CTCM_FUNTAIL, dev->name, flowc); 579 CTCM_FUNTAIL, dev->name, flowc);
580 580
581 rch = priv->channel[READ]; 581 rch = priv->channel[CTCM_READ];
582 582
583 mpcg_state = fsm_getstate(grp->fsm); 583 mpcg_state = fsm_getstate(grp->fsm);
584 switch (flowc) { 584 switch (flowc) {
@@ -622,7 +622,7 @@ static void mpc_rcvd_sweep_resp(struct mpcg_info *mpcginfo)
622 struct net_device *dev = rch->netdev; 622 struct net_device *dev = rch->netdev;
623 struct ctcm_priv *priv = dev->ml_priv; 623 struct ctcm_priv *priv = dev->ml_priv;
624 struct mpc_group *grp = priv->mpcg; 624 struct mpc_group *grp = priv->mpcg;
625 struct channel *ch = priv->channel[WRITE]; 625 struct channel *ch = priv->channel[CTCM_WRITE];
626 626
627 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id); 627 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id);
628 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH); 628 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
@@ -656,7 +656,7 @@ static void ctcmpc_send_sweep_resp(struct channel *rch)
656 int rc = 0; 656 int rc = 0;
657 struct th_sweep *header; 657 struct th_sweep *header;
658 struct sk_buff *sweep_skb; 658 struct sk_buff *sweep_skb;
659 struct channel *ch = priv->channel[WRITE]; 659 struct channel *ch = priv->channel[CTCM_WRITE];
660 660
661 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id); 661 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id);
662 662
@@ -712,7 +712,7 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
712 struct net_device *dev = rch->netdev; 712 struct net_device *dev = rch->netdev;
713 struct ctcm_priv *priv = dev->ml_priv; 713 struct ctcm_priv *priv = dev->ml_priv;
714 struct mpc_group *grp = priv->mpcg; 714 struct mpc_group *grp = priv->mpcg;
715 struct channel *ch = priv->channel[WRITE]; 715 struct channel *ch = priv->channel[CTCM_WRITE];
716 716
717 if (do_debug) 717 if (do_debug)
718 CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG, 718 CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
@@ -721,8 +721,8 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
721 if (grp->in_sweep == 0) { 721 if (grp->in_sweep == 0) {
722 grp->in_sweep = 1; 722 grp->in_sweep = 1;
723 ctcm_test_and_set_busy(dev); 723 ctcm_test_and_set_busy(dev);
724 grp->sweep_req_pend_num = grp->active_channels[READ]; 724 grp->sweep_req_pend_num = grp->active_channels[CTCM_READ];
725 grp->sweep_rsp_pend_num = grp->active_channels[READ]; 725 grp->sweep_rsp_pend_num = grp->active_channels[CTCM_READ];
726 } 726 }
727 727
728 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH); 728 CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
@@ -906,14 +906,14 @@ void mpc_group_ready(unsigned long adev)
906 fsm_newstate(grp->fsm, MPCG_STATE_READY); 906 fsm_newstate(grp->fsm, MPCG_STATE_READY);
907 907
908 /* Put up a read on the channel */ 908 /* Put up a read on the channel */
909 ch = priv->channel[READ]; 909 ch = priv->channel[CTCM_READ];
910 ch->pdu_seq = 0; 910 ch->pdu_seq = 0;
911 CTCM_PR_DBGDATA("ctcmpc: %s() ToDCM_pdu_seq= %08x\n" , 911 CTCM_PR_DBGDATA("ctcmpc: %s() ToDCM_pdu_seq= %08x\n" ,
912 __func__, ch->pdu_seq); 912 __func__, ch->pdu_seq);
913 913
914 ctcmpc_chx_rxidle(ch->fsm, CTC_EVENT_START, ch); 914 ctcmpc_chx_rxidle(ch->fsm, CTC_EVENT_START, ch);
915 /* Put the write channel in idle state */ 915 /* Put the write channel in idle state */
916 ch = priv->channel[WRITE]; 916 ch = priv->channel[CTCM_WRITE];
917 if (ch->collect_len > 0) { 917 if (ch->collect_len > 0) {
918 spin_lock(&ch->collect_lock); 918 spin_lock(&ch->collect_lock);
919 ctcm_purge_skb_queue(&ch->collect_queue); 919 ctcm_purge_skb_queue(&ch->collect_queue);
@@ -960,7 +960,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
960 "%s: %i / Grp:%s total_channels=%i, active_channels: " 960 "%s: %i / Grp:%s total_channels=%i, active_channels: "
961 "read=%i, write=%i\n", __func__, action, 961 "read=%i, write=%i\n", __func__, action,
962 fsm_getstate_str(grp->fsm), grp->num_channel_paths, 962 fsm_getstate_str(grp->fsm), grp->num_channel_paths,
963 grp->active_channels[READ], grp->active_channels[WRITE]); 963 grp->active_channels[CTCM_READ],
964 grp->active_channels[CTCM_WRITE]);
964 965
965 if ((action == MPC_CHANNEL_ADD) && (ch->in_mpcgroup == 0)) { 966 if ((action == MPC_CHANNEL_ADD) && (ch->in_mpcgroup == 0)) {
966 grp->num_channel_paths++; 967 grp->num_channel_paths++;
@@ -994,10 +995,11 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
994 grp->xid_skb->data, 995 grp->xid_skb->data,
995 grp->xid_skb->len); 996 grp->xid_skb->len);
996 997
997 ch->xid->xid2_dlc_type = ((CHANNEL_DIRECTION(ch->flags) == READ) 998 ch->xid->xid2_dlc_type =
999 ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
998 ? XID2_READ_SIDE : XID2_WRITE_SIDE); 1000 ? XID2_READ_SIDE : XID2_WRITE_SIDE);
999 1001
1000 if (CHANNEL_DIRECTION(ch->flags) == WRITE) 1002 if (CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE)
1001 ch->xid->xid2_buf_len = 0x00; 1003 ch->xid->xid2_buf_len = 0x00;
1002 1004
1003 ch->xid_skb->data = ch->xid_skb_data; 1005 ch->xid_skb->data = ch->xid_skb_data;
@@ -1006,8 +1008,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
1006 1008
1007 fsm_newstate(ch->fsm, CH_XID0_PENDING); 1009 fsm_newstate(ch->fsm, CH_XID0_PENDING);
1008 1010
1009 if ((grp->active_channels[READ] > 0) && 1011 if ((grp->active_channels[CTCM_READ] > 0) &&
1010 (grp->active_channels[WRITE] > 0) && 1012 (grp->active_channels[CTCM_WRITE] > 0) &&
1011 (fsm_getstate(grp->fsm) < MPCG_STATE_XID2INITW)) { 1013 (fsm_getstate(grp->fsm) < MPCG_STATE_XID2INITW)) {
1012 fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW); 1014 fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
1013 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_NOTICE, 1015 CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_NOTICE,
@@ -1027,10 +1029,10 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
1027 if (grp->channels_terminating) 1029 if (grp->channels_terminating)
1028 goto done; 1030 goto done;
1029 1031
1030 if (((grp->active_channels[READ] == 0) && 1032 if (((grp->active_channels[CTCM_READ] == 0) &&
1031 (grp->active_channels[WRITE] > 0)) 1033 (grp->active_channels[CTCM_WRITE] > 0))
1032 || ((grp->active_channels[WRITE] == 0) && 1034 || ((grp->active_channels[CTCM_WRITE] == 0) &&
1033 (grp->active_channels[READ] > 0))) 1035 (grp->active_channels[CTCM_READ] > 0)))
1034 fsm_event(grp->fsm, MPCG_EVENT_INOP, dev); 1036 fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
1035 } 1037 }
1036done: 1038done:
@@ -1038,7 +1040,8 @@ done:
1038 "exit %s: %i / Grp:%s total_channels=%i, active_channels: " 1040 "exit %s: %i / Grp:%s total_channels=%i, active_channels: "
1039 "read=%i, write=%i\n", __func__, action, 1041 "read=%i, write=%i\n", __func__, action,
1040 fsm_getstate_str(grp->fsm), grp->num_channel_paths, 1042 fsm_getstate_str(grp->fsm), grp->num_channel_paths,
1041 grp->active_channels[READ], grp->active_channels[WRITE]); 1043 grp->active_channels[CTCM_READ],
1044 grp->active_channels[CTCM_WRITE]);
1042 1045
1043 CTCM_PR_DEBUG("exit %s: ch=0x%p id=%s\n", __func__, ch, ch->id); 1046 CTCM_PR_DEBUG("exit %s: ch=0x%p id=%s\n", __func__, ch, ch->id);
1044} 1047}
@@ -1392,8 +1395,8 @@ static void mpc_action_go_inop(fsm_instance *fi, int event, void *arg)
1392 (grp->port_persist == 0)) 1395 (grp->port_persist == 0))
1393 fsm_deltimer(&priv->restart_timer); 1396 fsm_deltimer(&priv->restart_timer);
1394 1397
1395 wch = priv->channel[WRITE]; 1398 wch = priv->channel[CTCM_WRITE];
1396 rch = priv->channel[READ]; 1399 rch = priv->channel[CTCM_READ];
1397 1400
1398 switch (grp->saved_state) { 1401 switch (grp->saved_state) {
1399 case MPCG_STATE_RESET: 1402 case MPCG_STATE_RESET:
@@ -1480,8 +1483,8 @@ static void mpc_action_timeout(fsm_instance *fi, int event, void *arg)
1480 1483
1481 priv = dev->ml_priv; 1484 priv = dev->ml_priv;
1482 grp = priv->mpcg; 1485 grp = priv->mpcg;
1483 wch = priv->channel[WRITE]; 1486 wch = priv->channel[CTCM_WRITE];
1484 rch = priv->channel[READ]; 1487 rch = priv->channel[CTCM_READ];
1485 1488
1486 switch (fsm_getstate(grp->fsm)) { 1489 switch (fsm_getstate(grp->fsm)) {
1487 case MPCG_STATE_XID2INITW: 1490 case MPCG_STATE_XID2INITW:
@@ -1586,7 +1589,7 @@ static int mpc_validate_xid(struct mpcg_info *mpcginfo)
1586 CTCM_D3_DUMP((char *)xid, XID2_LENGTH); 1589 CTCM_D3_DUMP((char *)xid, XID2_LENGTH);
1587 1590
1588 /*the received direction should be the opposite of ours */ 1591 /*the received direction should be the opposite of ours */
1589 if (((CHANNEL_DIRECTION(ch->flags) == READ) ? XID2_WRITE_SIDE : 1592 if (((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? XID2_WRITE_SIDE :
1590 XID2_READ_SIDE) != xid->xid2_dlc_type) { 1593 XID2_READ_SIDE) != xid->xid2_dlc_type) {
1591 rc = 2; 1594 rc = 2;
1592 /* XID REJECTED: r/w channel pairing mismatch */ 1595 /* XID REJECTED: r/w channel pairing mismatch */
@@ -1912,7 +1915,7 @@ static void mpc_action_doxid7(fsm_instance *fsm, int event, void *arg)
1912 if (grp == NULL) 1915 if (grp == NULL)
1913 return; 1916 return;
1914 1917
1915 for (direction = READ; direction <= WRITE; direction++) { 1918 for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
1916 struct channel *ch = priv->channel[direction]; 1919 struct channel *ch = priv->channel[direction];
1917 struct xid2 *thisxid = ch->xid; 1920 struct xid2 *thisxid = ch->xid;
1918 ch->xid_skb->data = ch->xid_skb_data; 1921 ch->xid_skb->data = ch->xid_skb_data;
@@ -2152,14 +2155,15 @@ static int mpc_send_qllc_discontact(struct net_device *dev)
2152 return -ENOMEM; 2155 return -ENOMEM;
2153 } 2156 }
2154 2157
2155 *((__u32 *)skb_push(skb, 4)) = priv->channel[READ]->pdu_seq; 2158 *((__u32 *)skb_push(skb, 4)) =
2156 priv->channel[READ]->pdu_seq++; 2159 priv->channel[CTCM_READ]->pdu_seq;
2160 priv->channel[CTCM_READ]->pdu_seq++;
2157 CTCM_PR_DBGDATA("ctcmpc: %s ToDCM_pdu_seq= %08x\n", 2161 CTCM_PR_DBGDATA("ctcmpc: %s ToDCM_pdu_seq= %08x\n",
2158 __func__, priv->channel[READ]->pdu_seq); 2162 __func__, priv->channel[CTCM_READ]->pdu_seq);
2159 2163
2160 /* receipt of CC03 resets anticipated sequence number on 2164 /* receipt of CC03 resets anticipated sequence number on
2161 receiving side */ 2165 receiving side */
2162 priv->channel[READ]->pdu_seq = 0x00; 2166 priv->channel[CTCM_READ]->pdu_seq = 0x00;
2163 skb_reset_mac_header(skb); 2167 skb_reset_mac_header(skb);
2164 skb->dev = dev; 2168 skb->dev = dev;
2165 skb->protocol = htons(ETH_P_SNAP); 2169 skb->protocol = htons(ETH_P_SNAP);