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-rw-r--r--drivers/rtc/rtc-au1xxx.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/rtc/rtc-au1xxx.c b/drivers/rtc/rtc-au1xxx.c
index ed526a192ce0..fd25e2374d4e 100644
--- a/drivers/rtc/rtc-au1xxx.c
+++ b/drivers/rtc/rtc-au1xxx.c
@@ -32,7 +32,7 @@ static int au1xtoy_rtc_read_time(struct device *dev, struct rtc_time *tm)
32{ 32{
33 unsigned long t; 33 unsigned long t;
34 34
35 t = au_readl(SYS_TOYREAD); 35 t = alchemy_rdsys(AU1000_SYS_TOYREAD);
36 36
37 rtc_time_to_tm(t, tm); 37 rtc_time_to_tm(t, tm);
38 38
@@ -45,13 +45,12 @@ static int au1xtoy_rtc_set_time(struct device *dev, struct rtc_time *tm)
45 45
46 rtc_tm_to_time(tm, &t); 46 rtc_tm_to_time(tm, &t);
47 47
48 au_writel(t, SYS_TOYWRITE); 48 alchemy_wrsys(t, AU1000_SYS_TOYWRITE);
49 au_sync();
50 49
51 /* wait for the pending register write to succeed. This can 50 /* wait for the pending register write to succeed. This can
52 * take up to 6 seconds... 51 * take up to 6 seconds...
53 */ 52 */
54 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S) 53 while (alchemy_rdsys(AU1000_SYS_CNTRCTRL) & SYS_CNTRL_C0S)
55 msleep(1); 54 msleep(1);
56 55
57 return 0; 56 return 0;
@@ -68,7 +67,7 @@ static int au1xtoy_rtc_probe(struct platform_device *pdev)
68 unsigned long t; 67 unsigned long t;
69 int ret; 68 int ret;
70 69
71 t = au_readl(SYS_COUNTER_CNTRL); 70 t = alchemy_rdsys(AU1000_SYS_CNTRCTRL);
72 if (!(t & CNTR_OK)) { 71 if (!(t & CNTR_OK)) {
73 dev_err(&pdev->dev, "counters not working; aborting.\n"); 72 dev_err(&pdev->dev, "counters not working; aborting.\n");
74 ret = -ENODEV; 73 ret = -ENODEV;
@@ -78,10 +77,10 @@ static int au1xtoy_rtc_probe(struct platform_device *pdev)
78 ret = -ETIMEDOUT; 77 ret = -ETIMEDOUT;
79 78
80 /* set counter0 tickrate to 1Hz if necessary */ 79 /* set counter0 tickrate to 1Hz if necessary */
81 if (au_readl(SYS_TOYTRIM) != 32767) { 80 if (alchemy_rdsys(AU1000_SYS_TOYTRIM) != 32767) {
82 /* wait until hardware gives access to TRIM register */ 81 /* wait until hardware gives access to TRIM register */
83 t = 0x00100000; 82 t = 0x00100000;
84 while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S) && --t) 83 while ((alchemy_rdsys(AU1000_SYS_CNTRCTRL) & SYS_CNTRL_T0S) && --t)
85 msleep(1); 84 msleep(1);
86 85
87 if (!t) { 86 if (!t) {
@@ -93,12 +92,11 @@ static int au1xtoy_rtc_probe(struct platform_device *pdev)
93 } 92 }
94 93
95 /* set 1Hz TOY tick rate */ 94 /* set 1Hz TOY tick rate */
96 au_writel(32767, SYS_TOYTRIM); 95 alchemy_wrsys(32767, AU1000_SYS_TOYTRIM);
97 au_sync();
98 } 96 }
99 97
100 /* wait until the hardware allows writes to the counter reg */ 98 /* wait until the hardware allows writes to the counter reg */
101 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S) 99 while (alchemy_rdsys(AU1000_SYS_CNTRCTRL) & SYS_CNTRL_C0S)
102 msleep(1); 100 msleep(1);
103 101
104 rtcdev = devm_rtc_device_register(&pdev->dev, "rtc-au1xxx", 102 rtcdev = devm_rtc_device_register(&pdev->dev, "rtc-au1xxx",