diff options
Diffstat (limited to 'drivers/rtc')
-rw-r--r-- | drivers/rtc/rtc-s5m.c | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index b7fd02bc0a14..1dfa488e67ff 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c | |||
@@ -31,7 +31,7 @@ | |||
31 | struct s5m_rtc_info { | 31 | struct s5m_rtc_info { |
32 | struct device *dev; | 32 | struct device *dev; |
33 | struct sec_pmic_dev *s5m87xx; | 33 | struct sec_pmic_dev *s5m87xx; |
34 | struct regmap *rtc; | 34 | struct regmap *regmap; |
35 | struct rtc_device *rtc_dev; | 35 | struct rtc_device *rtc_dev; |
36 | int irq; | 36 | int irq; |
37 | int device_type; | 37 | int device_type; |
@@ -89,7 +89,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) | |||
89 | int ret; | 89 | int ret; |
90 | unsigned int data; | 90 | unsigned int data; |
91 | 91 | ||
92 | ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); | 92 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); |
93 | if (ret < 0) { | 93 | if (ret < 0) { |
94 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); | 94 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); |
95 | return ret; | 95 | return ret; |
@@ -98,14 +98,14 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) | |||
98 | data |= RTC_TIME_EN_MASK; | 98 | data |= RTC_TIME_EN_MASK; |
99 | data |= RTC_UDR_MASK; | 99 | data |= RTC_UDR_MASK; |
100 | 100 | ||
101 | ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data); | 101 | ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data); |
102 | if (ret < 0) { | 102 | if (ret < 0) { |
103 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); | 103 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); |
104 | return ret; | 104 | return ret; |
105 | } | 105 | } |
106 | 106 | ||
107 | do { | 107 | do { |
108 | ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); | 108 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); |
109 | } while ((data & RTC_UDR_MASK) && !ret); | 109 | } while ((data & RTC_UDR_MASK) && !ret); |
110 | 110 | ||
111 | return ret; | 111 | return ret; |
@@ -116,7 +116,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |||
116 | int ret; | 116 | int ret; |
117 | unsigned int data; | 117 | unsigned int data; |
118 | 118 | ||
119 | ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); | 119 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); |
120 | if (ret < 0) { | 120 | if (ret < 0) { |
121 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", | 121 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", |
122 | __func__, ret); | 122 | __func__, ret); |
@@ -126,7 +126,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |||
126 | data &= ~RTC_TIME_EN_MASK; | 126 | data &= ~RTC_TIME_EN_MASK; |
127 | data |= RTC_UDR_MASK; | 127 | data |= RTC_UDR_MASK; |
128 | 128 | ||
129 | ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data); | 129 | ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data); |
130 | if (ret < 0) { | 130 | if (ret < 0) { |
131 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", | 131 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", |
132 | __func__, ret); | 132 | __func__, ret); |
@@ -134,7 +134,7 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |||
134 | } | 134 | } |
135 | 135 | ||
136 | do { | 136 | do { |
137 | ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); | 137 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); |
138 | } while ((data & RTC_UDR_MASK) && !ret); | 138 | } while ((data & RTC_UDR_MASK) && !ret); |
139 | 139 | ||
140 | return ret; | 140 | return ret; |
@@ -178,7 +178,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
178 | u8 data[8]; | 178 | u8 data[8]; |
179 | int ret; | 179 | int ret; |
180 | 180 | ||
181 | ret = regmap_bulk_read(info->rtc, SEC_RTC_SEC, data, 8); | 181 | ret = regmap_bulk_read(info->regmap, SEC_RTC_SEC, data, 8); |
182 | if (ret < 0) | 182 | if (ret < 0) |
183 | return ret; | 183 | return ret; |
184 | 184 | ||
@@ -226,7 +226,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
226 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | 226 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, |
227 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | 227 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); |
228 | 228 | ||
229 | ret = regmap_raw_write(info->rtc, SEC_RTC_SEC, data, 8); | 229 | ret = regmap_raw_write(info->regmap, SEC_RTC_SEC, data, 8); |
230 | if (ret < 0) | 230 | if (ret < 0) |
231 | return ret; | 231 | return ret; |
232 | 232 | ||
@@ -242,20 +242,20 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
242 | unsigned int val; | 242 | unsigned int val; |
243 | int ret, i; | 243 | int ret, i; |
244 | 244 | ||
245 | ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); | 245 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); |
246 | if (ret < 0) | 246 | if (ret < 0) |
247 | return ret; | 247 | return ret; |
248 | 248 | ||
249 | switch (info->device_type) { | 249 | switch (info->device_type) { |
250 | case S5M8763X: | 250 | case S5M8763X: |
251 | s5m8763_data_to_tm(data, &alrm->time); | 251 | s5m8763_data_to_tm(data, &alrm->time); |
252 | ret = regmap_read(info->rtc, SEC_ALARM0_CONF, &val); | 252 | ret = regmap_read(info->regmap, SEC_ALARM0_CONF, &val); |
253 | if (ret < 0) | 253 | if (ret < 0) |
254 | return ret; | 254 | return ret; |
255 | 255 | ||
256 | alrm->enabled = !!val; | 256 | alrm->enabled = !!val; |
257 | 257 | ||
258 | ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val); | 258 | ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val); |
259 | if (ret < 0) | 259 | if (ret < 0) |
260 | return ret; | 260 | return ret; |
261 | 261 | ||
@@ -278,7 +278,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
278 | } | 278 | } |
279 | 279 | ||
280 | alrm->pending = 0; | 280 | alrm->pending = 0; |
281 | ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val); | 281 | ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val); |
282 | if (ret < 0) | 282 | if (ret < 0) |
283 | return ret; | 283 | return ret; |
284 | break; | 284 | break; |
@@ -301,7 +301,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |||
301 | int ret, i; | 301 | int ret, i; |
302 | struct rtc_time tm; | 302 | struct rtc_time tm; |
303 | 303 | ||
304 | ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); | 304 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); |
305 | if (ret < 0) | 305 | if (ret < 0) |
306 | return ret; | 306 | return ret; |
307 | 307 | ||
@@ -312,14 +312,14 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |||
312 | 312 | ||
313 | switch (info->device_type) { | 313 | switch (info->device_type) { |
314 | case S5M8763X: | 314 | case S5M8763X: |
315 | ret = regmap_write(info->rtc, SEC_ALARM0_CONF, 0); | 315 | ret = regmap_write(info->regmap, SEC_ALARM0_CONF, 0); |
316 | break; | 316 | break; |
317 | 317 | ||
318 | case S5M8767X: | 318 | case S5M8767X: |
319 | for (i = 0; i < 7; i++) | 319 | for (i = 0; i < 7; i++) |
320 | data[i] &= ~ALARM_ENABLE_MASK; | 320 | data[i] &= ~ALARM_ENABLE_MASK; |
321 | 321 | ||
322 | ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); | 322 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); |
323 | if (ret < 0) | 323 | if (ret < 0) |
324 | return ret; | 324 | return ret; |
325 | 325 | ||
@@ -341,7 +341,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
341 | u8 alarm0_conf; | 341 | u8 alarm0_conf; |
342 | struct rtc_time tm; | 342 | struct rtc_time tm; |
343 | 343 | ||
344 | ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); | 344 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); |
345 | if (ret < 0) | 345 | if (ret < 0) |
346 | return ret; | 346 | return ret; |
347 | 347 | ||
@@ -353,7 +353,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
353 | switch (info->device_type) { | 353 | switch (info->device_type) { |
354 | case S5M8763X: | 354 | case S5M8763X: |
355 | alarm0_conf = 0x77; | 355 | alarm0_conf = 0x77; |
356 | ret = regmap_write(info->rtc, SEC_ALARM0_CONF, alarm0_conf); | 356 | ret = regmap_write(info->regmap, SEC_ALARM0_CONF, alarm0_conf); |
357 | break; | 357 | break; |
358 | 358 | ||
359 | case S5M8767X: | 359 | case S5M8767X: |
@@ -368,7 +368,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
368 | if (data[RTC_YEAR1] & 0x7f) | 368 | if (data[RTC_YEAR1] & 0x7f) |
369 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; | 369 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; |
370 | 370 | ||
371 | ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); | 371 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); |
372 | if (ret < 0) | 372 | if (ret < 0) |
373 | return ret; | 373 | return ret; |
374 | ret = s5m8767_rtc_set_alarm_reg(info); | 374 | ret = s5m8767_rtc_set_alarm_reg(info); |
@@ -410,7 +410,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
410 | if (ret < 0) | 410 | if (ret < 0) |
411 | return ret; | 411 | return ret; |
412 | 412 | ||
413 | ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); | 413 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); |
414 | if (ret < 0) | 414 | if (ret < 0) |
415 | return ret; | 415 | return ret; |
416 | 416 | ||
@@ -455,7 +455,7 @@ static const struct rtc_class_ops s5m_rtc_ops = { | |||
455 | static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) | 455 | static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) |
456 | { | 456 | { |
457 | int ret; | 457 | int ret; |
458 | ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL, | 458 | ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL, |
459 | WTSR_ENABLE_MASK, | 459 | WTSR_ENABLE_MASK, |
460 | enable ? WTSR_ENABLE_MASK : 0); | 460 | enable ? WTSR_ENABLE_MASK : 0); |
461 | if (ret < 0) | 461 | if (ret < 0) |
@@ -466,7 +466,7 @@ static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) | |||
466 | static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) | 466 | static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) |
467 | { | 467 | { |
468 | int ret; | 468 | int ret; |
469 | ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL, | 469 | ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL, |
470 | SMPL_ENABLE_MASK, | 470 | SMPL_ENABLE_MASK, |
471 | enable ? SMPL_ENABLE_MASK : 0); | 471 | enable ? SMPL_ENABLE_MASK : 0); |
472 | if (ret < 0) | 472 | if (ret < 0) |
@@ -481,7 +481,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
481 | int ret; | 481 | int ret; |
482 | struct rtc_time tm; | 482 | struct rtc_time tm; |
483 | 483 | ||
484 | ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &tp_read); | 484 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &tp_read); |
485 | if (ret < 0) { | 485 | if (ret < 0) { |
486 | dev_err(info->dev, "%s: fail to read control reg(%d)\n", | 486 | dev_err(info->dev, "%s: fail to read control reg(%d)\n", |
487 | __func__, ret); | 487 | __func__, ret); |
@@ -493,7 +493,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
493 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | 493 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); |
494 | 494 | ||
495 | info->rtc_24hr_mode = 1; | 495 | info->rtc_24hr_mode = 1; |
496 | ret = regmap_raw_write(info->rtc, SEC_ALARM0_CONF, data, 2); | 496 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_CONF, data, 2); |
497 | if (ret < 0) { | 497 | if (ret < 0) { |
498 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | 498 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", |
499 | __func__, ret); | 499 | __func__, ret); |
@@ -515,7 +515,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
515 | ret = s5m_rtc_set_time(info->dev, &tm); | 515 | ret = s5m_rtc_set_time(info->dev, &tm); |
516 | } | 516 | } |
517 | 517 | ||
518 | ret = regmap_update_bits(info->rtc, SEC_RTC_UDR_CON, | 518 | ret = regmap_update_bits(info->regmap, SEC_RTC_UDR_CON, |
519 | RTC_TCON_MASK, tp_read | RTC_TCON_MASK); | 519 | RTC_TCON_MASK, tp_read | RTC_TCON_MASK); |
520 | if (ret < 0) | 520 | if (ret < 0) |
521 | dev_err(info->dev, "%s: fail to update TCON reg(%d)\n", | 521 | dev_err(info->dev, "%s: fail to update TCON reg(%d)\n", |
@@ -542,7 +542,7 @@ static int s5m_rtc_probe(struct platform_device *pdev) | |||
542 | 542 | ||
543 | info->dev = &pdev->dev; | 543 | info->dev = &pdev->dev; |
544 | info->s5m87xx = s5m87xx; | 544 | info->s5m87xx = s5m87xx; |
545 | info->rtc = s5m87xx->rtc; | 545 | info->regmap = s5m87xx->regmap; |
546 | info->device_type = s5m87xx->device_type; | 546 | info->device_type = s5m87xx->device_type; |
547 | info->wtsr_smpl = s5m87xx->wtsr_smpl; | 547 | info->wtsr_smpl = s5m87xx->wtsr_smpl; |
548 | 548 | ||
@@ -596,7 +596,7 @@ static void s5m_rtc_shutdown(struct platform_device *pdev) | |||
596 | if (info->wtsr_smpl) { | 596 | if (info->wtsr_smpl) { |
597 | for (i = 0; i < 3; i++) { | 597 | for (i = 0; i < 3; i++) { |
598 | s5m_rtc_enable_wtsr(info, false); | 598 | s5m_rtc_enable_wtsr(info, false); |
599 | regmap_read(info->rtc, SEC_WTSR_SMPL_CNTL, &val); | 599 | regmap_read(info->regmap, SEC_WTSR_SMPL_CNTL, &val); |
600 | pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); | 600 | pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); |
601 | if (val & WTSR_ENABLE_MASK) | 601 | if (val & WTSR_ENABLE_MASK) |
602 | pr_emerg("%s: fail to disable WTSR\n", | 602 | pr_emerg("%s: fail to disable WTSR\n", |