diff options
Diffstat (limited to 'drivers/rtc')
| -rw-r--r-- | drivers/rtc/Kconfig | 27 | ||||
| -rw-r--r-- | drivers/rtc/Makefile | 4 | ||||
| -rw-r--r-- | drivers/rtc/rtc-ds1302.c | 2 | ||||
| -rw-r--r-- | drivers/rtc/rtc-ds1511.c | 4 | ||||
| -rw-r--r-- | drivers/rtc/rtc-msm6242.c | 269 | ||||
| -rw-r--r-- | drivers/rtc/rtc-pcf50633.c | 5 | ||||
| -rw-r--r-- | drivers/rtc/rtc-rp5c01.c | 222 | ||||
| -rw-r--r-- | drivers/rtc/rtc-stk17ta8.c | 2 | ||||
| -rw-r--r-- | drivers/rtc/rtc-twl.c (renamed from drivers/rtc/rtc-twl4030.c) | 284 | ||||
| -rw-r--r-- | drivers/rtc/rtc-v3020.c | 2 | ||||
| -rw-r--r-- | drivers/rtc/rtc-wm8350.c | 25 |
11 files changed, 713 insertions, 133 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 3c20dae43ce2..71fbd6e8edf7 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
| @@ -258,14 +258,14 @@ config RTC_DRV_TWL92330 | |||
| 258 | the Menelaus driver; it's not separate module. | 258 | the Menelaus driver; it's not separate module. |
| 259 | 259 | ||
| 260 | config RTC_DRV_TWL4030 | 260 | config RTC_DRV_TWL4030 |
| 261 | tristate "TI TWL4030/TWL5030/TPS659x0" | 261 | tristate "TI TWL4030/TWL5030/TWL6030/TPS659x0" |
| 262 | depends on RTC_CLASS && TWL4030_CORE | 262 | depends on RTC_CLASS && TWL4030_CORE |
| 263 | help | 263 | help |
| 264 | If you say yes here you get support for the RTC on the | 264 | If you say yes here you get support for the RTC on the |
| 265 | TWL4030 family chips, used mostly with OMAP3 platforms. | 265 | TWL4030/TWL5030/TWL6030 family chips, used mostly with OMAP3 platforms. |
| 266 | 266 | ||
| 267 | This driver can also be built as a module. If so, the module | 267 | This driver can also be built as a module. If so, the module |
| 268 | will be called rtc-twl4030. | 268 | will be called rtc-twl. |
| 269 | 269 | ||
| 270 | config RTC_DRV_S35390A | 270 | config RTC_DRV_S35390A |
| 271 | tristate "Seiko Instruments S-35390A" | 271 | tristate "Seiko Instruments S-35390A" |
| @@ -509,6 +509,15 @@ config RTC_DRV_M48T59 | |||
| 509 | This driver can also be built as a module, if so, the module | 509 | This driver can also be built as a module, if so, the module |
| 510 | will be called "rtc-m48t59". | 510 | will be called "rtc-m48t59". |
| 511 | 511 | ||
| 512 | config RTC_DRV_MSM6242 | ||
| 513 | tristate "Oki MSM6242" | ||
| 514 | help | ||
| 515 | If you say yes here you get support for the Oki MSM6242 | ||
| 516 | timekeeping chip. It is used in some Amiga models (e.g. A2000). | ||
| 517 | |||
| 518 | This driver can also be built as a module. If so, the module | ||
| 519 | will be called rtc-msm6242. | ||
| 520 | |||
| 512 | config RTC_MXC | 521 | config RTC_MXC |
| 513 | tristate "Freescale MXC Real Time Clock" | 522 | tristate "Freescale MXC Real Time Clock" |
| 514 | depends on ARCH_MXC | 523 | depends on ARCH_MXC |
| @@ -529,6 +538,16 @@ config RTC_DRV_BQ4802 | |||
| 529 | This driver can also be built as a module. If so, the module | 538 | This driver can also be built as a module. If so, the module |
| 530 | will be called rtc-bq4802. | 539 | will be called rtc-bq4802. |
| 531 | 540 | ||
| 541 | config RTC_DRV_RP5C01 | ||
| 542 | tristate "Ricoh RP5C01" | ||
| 543 | help | ||
| 544 | If you say yes here you get support for the Ricoh RP5C01 | ||
| 545 | timekeeping chip. It is used in some Amiga models (e.g. A3000 | ||
| 546 | and A4000). | ||
| 547 | |||
| 548 | This driver can also be built as a module. If so, the module | ||
| 549 | will be called rtc-rp5c01. | ||
| 550 | |||
| 532 | config RTC_DRV_V3020 | 551 | config RTC_DRV_V3020 |
| 533 | tristate "EM Microelectronic V3020" | 552 | tristate "EM Microelectronic V3020" |
| 534 | help | 553 | help |
| @@ -780,7 +799,7 @@ config RTC_DRV_TX4939 | |||
| 780 | 799 | ||
| 781 | config RTC_DRV_MV | 800 | config RTC_DRV_MV |
| 782 | tristate "Marvell SoC RTC" | 801 | tristate "Marvell SoC RTC" |
| 783 | depends on ARCH_KIRKWOOD | 802 | depends on ARCH_KIRKWOOD || ARCH_DOVE |
| 784 | help | 803 | help |
| 785 | If you say yes here you will get support for the in-chip RTC | 804 | If you say yes here you will get support for the in-chip RTC |
| 786 | that can be found in some of Marvell's SoC devices, such as | 805 | that can be found in some of Marvell's SoC devices, such as |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index aa3fbd5517a1..7da6efb3e953 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
| @@ -52,6 +52,7 @@ obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o | |||
| 52 | obj-$(CONFIG_RTC_MXC) += rtc-mxc.o | 52 | obj-$(CONFIG_RTC_MXC) += rtc-mxc.o |
| 53 | obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o | 53 | obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o |
| 54 | obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o | 54 | obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o |
| 55 | obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o | ||
| 55 | obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o | 56 | obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o |
| 56 | obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o | 57 | obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o |
| 57 | obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o | 58 | obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o |
| @@ -64,6 +65,7 @@ obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o | |||
| 64 | obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o | 65 | obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o |
| 65 | obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o | 66 | obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o |
| 66 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o | 67 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o |
| 68 | obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o | ||
| 67 | obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o | 69 | obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o |
| 68 | obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o | 70 | obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o |
| 69 | obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o | 71 | obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o |
| @@ -78,7 +80,7 @@ obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o | |||
| 78 | obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o | 80 | obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o |
| 79 | obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o | 81 | obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o |
| 80 | obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o | 82 | obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o |
| 81 | obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o | 83 | obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o |
| 82 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o | 84 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o |
| 83 | obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o | 85 | obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o |
| 84 | obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o | 86 | obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o |
diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c index d490628b64da..1e73c8f42e38 100644 --- a/drivers/rtc/rtc-ds1302.c +++ b/drivers/rtc/rtc-ds1302.c | |||
| @@ -201,7 +201,7 @@ static struct platform_driver ds1302_platform_driver = { | |||
| 201 | .name = DRV_NAME, | 201 | .name = DRV_NAME, |
| 202 | .owner = THIS_MODULE, | 202 | .owner = THIS_MODULE, |
| 203 | }, | 203 | }, |
| 204 | .remove = __exit_p(ds1302_rtc_remove), | 204 | .remove = __devexit_p(ds1302_rtc_remove), |
| 205 | }; | 205 | }; |
| 206 | 206 | ||
| 207 | static int __init ds1302_rtc_init(void) | 207 | static int __init ds1302_rtc_init(void) |
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c index 0b6b7730c716..539676e25fd8 100644 --- a/drivers/rtc/rtc-ds1511.c +++ b/drivers/rtc/rtc-ds1511.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * An rtc driver for the Dallas DS1511 | 2 | * An rtc driver for the Dallas DS1511 |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 4 | * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| 5 | * Copyright (C) 2007 Andrew Sharp <andy.sharp@onstor.com> | 5 | * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com> |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| @@ -636,7 +636,7 @@ ds1511_rtc_exit(void) | |||
| 636 | module_init(ds1511_rtc_init); | 636 | module_init(ds1511_rtc_init); |
| 637 | module_exit(ds1511_rtc_exit); | 637 | module_exit(ds1511_rtc_exit); |
| 638 | 638 | ||
| 639 | MODULE_AUTHOR("Andrew Sharp <andy.sharp@onstor.com>"); | 639 | MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>"); |
| 640 | MODULE_DESCRIPTION("Dallas DS1511 RTC driver"); | 640 | MODULE_DESCRIPTION("Dallas DS1511 RTC driver"); |
| 641 | MODULE_LICENSE("GPL"); | 641 | MODULE_LICENSE("GPL"); |
| 642 | MODULE_VERSION(DRV_VERSION); | 642 | MODULE_VERSION(DRV_VERSION); |
diff --git a/drivers/rtc/rtc-msm6242.c b/drivers/rtc/rtc-msm6242.c new file mode 100644 index 000000000000..5f5968a48925 --- /dev/null +++ b/drivers/rtc/rtc-msm6242.c | |||
| @@ -0,0 +1,269 @@ | |||
| 1 | /* | ||
| 2 | * Oki MSM6242 RTC Driver | ||
| 3 | * | ||
| 4 | * Copyright 2009 Geert Uytterhoeven | ||
| 5 | * | ||
| 6 | * Based on the A2000 TOD code in arch/m68k/amiga/config.c | ||
| 7 | * Copyright (C) 1993 Hamish Macdonald | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/delay.h> | ||
| 11 | #include <linux/io.h> | ||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | #include <linux/rtc.h> | ||
| 16 | |||
| 17 | |||
| 18 | enum { | ||
| 19 | MSM6242_SECOND1 = 0x0, /* 1-second digit register */ | ||
| 20 | MSM6242_SECOND10 = 0x1, /* 10-second digit register */ | ||
| 21 | MSM6242_MINUTE1 = 0x2, /* 1-minute digit register */ | ||
| 22 | MSM6242_MINUTE10 = 0x3, /* 10-minute digit register */ | ||
| 23 | MSM6242_HOUR1 = 0x4, /* 1-hour digit register */ | ||
| 24 | MSM6242_HOUR10 = 0x5, /* PM/AM, 10-hour digit register */ | ||
| 25 | MSM6242_DAY1 = 0x6, /* 1-day digit register */ | ||
| 26 | MSM6242_DAY10 = 0x7, /* 10-day digit register */ | ||
| 27 | MSM6242_MONTH1 = 0x8, /* 1-month digit register */ | ||
| 28 | MSM6242_MONTH10 = 0x9, /* 10-month digit register */ | ||
| 29 | MSM6242_YEAR1 = 0xa, /* 1-year digit register */ | ||
| 30 | MSM6242_YEAR10 = 0xb, /* 10-year digit register */ | ||
| 31 | MSM6242_WEEK = 0xc, /* Week register */ | ||
| 32 | MSM6242_CD = 0xd, /* Control Register D */ | ||
| 33 | MSM6242_CE = 0xe, /* Control Register E */ | ||
| 34 | MSM6242_CF = 0xf, /* Control Register F */ | ||
| 35 | }; | ||
| 36 | |||
| 37 | #define MSM6242_HOUR10_AM (0 << 2) | ||
| 38 | #define MSM6242_HOUR10_PM (1 << 2) | ||
| 39 | #define MSM6242_HOUR10_HR_MASK (3 << 0) | ||
| 40 | |||
| 41 | #define MSM6242_WEEK_SUNDAY 0 | ||
| 42 | #define MSM6242_WEEK_MONDAY 1 | ||
| 43 | #define MSM6242_WEEK_TUESDAY 2 | ||
| 44 | #define MSM6242_WEEK_WEDNESDAY 3 | ||
| 45 | #define MSM6242_WEEK_THURSDAY 4 | ||
| 46 | #define MSM6242_WEEK_FRIDAY 5 | ||
| 47 | #define MSM6242_WEEK_SATURDAY 6 | ||
| 48 | |||
| 49 | #define MSM6242_CD_30_S_ADJ (1 << 3) /* 30-second adjustment */ | ||
| 50 | #define MSM6242_CD_IRQ_FLAG (1 << 2) | ||
| 51 | #define MSM6242_CD_BUSY (1 << 1) | ||
| 52 | #define MSM6242_CD_HOLD (1 << 0) | ||
| 53 | |||
| 54 | #define MSM6242_CE_T_MASK (3 << 2) | ||
| 55 | #define MSM6242_CE_T_64HZ (0 << 2) /* period 1/64 second */ | ||
| 56 | #define MSM6242_CE_T_1HZ (1 << 2) /* period 1 second */ | ||
| 57 | #define MSM6242_CE_T_1MINUTE (2 << 2) /* period 1 minute */ | ||
| 58 | #define MSM6242_CE_T_1HOUR (3 << 2) /* period 1 hour */ | ||
| 59 | |||
| 60 | #define MSM6242_CE_ITRPT_STND (1 << 1) | ||
| 61 | #define MSM6242_CE_MASK (1 << 0) /* STD.P output control */ | ||
| 62 | |||
| 63 | #define MSM6242_CF_TEST (1 << 3) | ||
| 64 | #define MSM6242_CF_12H (0 << 2) | ||
| 65 | #define MSM6242_CF_24H (1 << 2) | ||
| 66 | #define MSM6242_CF_STOP (1 << 1) | ||
| 67 | #define MSM6242_CF_REST (1 << 0) /* reset */ | ||
| 68 | |||
| 69 | |||
| 70 | struct msm6242_priv { | ||
| 71 | u32 __iomem *regs; | ||
| 72 | struct rtc_device *rtc; | ||
| 73 | }; | ||
| 74 | |||
| 75 | static inline unsigned int msm6242_read(struct msm6242_priv *priv, | ||
| 76 | unsigned int reg) | ||
| 77 | { | ||
| 78 | return __raw_readl(&priv->regs[reg]) & 0xf; | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val, | ||
| 82 | unsigned int reg) | ||
| 83 | { | ||
| 84 | return __raw_writel(val, &priv->regs[reg]); | ||
| 85 | } | ||
| 86 | |||
| 87 | static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val, | ||
| 88 | unsigned int reg) | ||
| 89 | { | ||
| 90 | msm6242_write(priv, msm6242_read(priv, reg) | val, reg); | ||
| 91 | } | ||
| 92 | |||
| 93 | static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val, | ||
| 94 | unsigned int reg) | ||
| 95 | { | ||
| 96 | msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg); | ||
| 97 | } | ||
| 98 | |||
| 99 | static void msm6242_lock(struct msm6242_priv *priv) | ||
| 100 | { | ||
| 101 | int cnt = 5; | ||
| 102 | |||
| 103 | msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); | ||
| 104 | |||
| 105 | while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) { | ||
| 106 | msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); | ||
| 107 | udelay(70); | ||
| 108 | msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); | ||
| 109 | cnt--; | ||
| 110 | } | ||
| 111 | |||
| 112 | if (!cnt) | ||
| 113 | pr_warning("msm6242: timed out waiting for RTC (0x%x)\n", | ||
| 114 | msm6242_read(priv, MSM6242_CD)); | ||
| 115 | } | ||
| 116 | |||
| 117 | static void msm6242_unlock(struct msm6242_priv *priv) | ||
| 118 | { | ||
| 119 | msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); | ||
| 120 | } | ||
| 121 | |||
| 122 | static int msm6242_read_time(struct device *dev, struct rtc_time *tm) | ||
| 123 | { | ||
| 124 | struct msm6242_priv *priv = dev_get_drvdata(dev); | ||
| 125 | |||
| 126 | msm6242_lock(priv); | ||
| 127 | |||
| 128 | tm->tm_sec = msm6242_read(priv, MSM6242_SECOND10) * 10 + | ||
| 129 | msm6242_read(priv, MSM6242_SECOND1); | ||
| 130 | tm->tm_min = msm6242_read(priv, MSM6242_MINUTE10) * 10 + | ||
| 131 | msm6242_read(priv, MSM6242_MINUTE1); | ||
| 132 | tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10 & 3)) * 10 + | ||
| 133 | msm6242_read(priv, MSM6242_HOUR1); | ||
| 134 | tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 + | ||
| 135 | msm6242_read(priv, MSM6242_DAY1); | ||
| 136 | tm->tm_wday = msm6242_read(priv, MSM6242_WEEK); | ||
| 137 | tm->tm_mon = msm6242_read(priv, MSM6242_MONTH10) * 10 + | ||
| 138 | msm6242_read(priv, MSM6242_MONTH1) - 1; | ||
| 139 | tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 + | ||
| 140 | msm6242_read(priv, MSM6242_YEAR1); | ||
| 141 | if (tm->tm_year <= 69) | ||
| 142 | tm->tm_year += 100; | ||
| 143 | |||
| 144 | if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) { | ||
| 145 | unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) & | ||
| 146 | MSM6242_HOUR10_PM; | ||
| 147 | if (!pm && tm->tm_hour == 12) | ||
| 148 | tm->tm_hour = 0; | ||
| 149 | else if (pm && tm->tm_hour != 12) | ||
| 150 | tm->tm_hour += 12; | ||
| 151 | } | ||
| 152 | |||
| 153 | msm6242_unlock(priv); | ||
| 154 | |||
| 155 | return rtc_valid_tm(tm); | ||
| 156 | } | ||
| 157 | |||
| 158 | static int msm6242_set_time(struct device *dev, struct rtc_time *tm) | ||
| 159 | { | ||
| 160 | struct msm6242_priv *priv = dev_get_drvdata(dev); | ||
| 161 | |||
| 162 | msm6242_lock(priv); | ||
| 163 | |||
| 164 | msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10); | ||
| 165 | msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1); | ||
| 166 | msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10); | ||
| 167 | msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1); | ||
| 168 | if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H) | ||
| 169 | msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10); | ||
| 170 | else if (tm->tm_hour >= 12) | ||
| 171 | msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10, | ||
| 172 | MSM6242_HOUR10); | ||
| 173 | else | ||
| 174 | msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10); | ||
| 175 | msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1); | ||
| 176 | msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10); | ||
| 177 | msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1); | ||
| 178 | if (tm->tm_wday != -1) | ||
| 179 | msm6242_write(priv, tm->tm_wday, MSM6242_WEEK); | ||
| 180 | msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10); | ||
| 181 | msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1); | ||
| 182 | if (tm->tm_year >= 100) | ||
| 183 | tm->tm_year -= 100; | ||
| 184 | msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10); | ||
| 185 | msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1); | ||
| 186 | |||
| 187 | msm6242_unlock(priv); | ||
| 188 | return 0; | ||
| 189 | } | ||
| 190 | |||
| 191 | static const struct rtc_class_ops msm6242_rtc_ops = { | ||
| 192 | .read_time = msm6242_read_time, | ||
| 193 | .set_time = msm6242_set_time, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static int __init msm6242_rtc_probe(struct platform_device *dev) | ||
| 197 | { | ||
| 198 | struct resource *res; | ||
| 199 | struct msm6242_priv *priv; | ||
| 200 | struct rtc_device *rtc; | ||
| 201 | int error; | ||
| 202 | |||
| 203 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
| 204 | if (!res) | ||
| 205 | return -ENODEV; | ||
| 206 | |||
| 207 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | ||
| 208 | if (!priv) | ||
| 209 | return -ENOMEM; | ||
| 210 | |||
| 211 | priv->regs = ioremap(res->start, resource_size(res)); | ||
| 212 | if (!priv->regs) { | ||
| 213 | error = -ENOMEM; | ||
| 214 | goto out_free_priv; | ||
| 215 | } | ||
| 216 | |||
| 217 | rtc = rtc_device_register("rtc-msm6242", &dev->dev, &msm6242_rtc_ops, | ||
| 218 | THIS_MODULE); | ||
| 219 | if (IS_ERR(rtc)) { | ||
| 220 | error = PTR_ERR(rtc); | ||
| 221 | goto out_unmap; | ||
| 222 | } | ||
| 223 | |||
| 224 | priv->rtc = rtc; | ||
| 225 | platform_set_drvdata(dev, priv); | ||
| 226 | return 0; | ||
| 227 | |||
| 228 | out_unmap: | ||
| 229 | iounmap(priv->regs); | ||
| 230 | out_free_priv: | ||
| 231 | kfree(priv); | ||
| 232 | return error; | ||
| 233 | } | ||
| 234 | |||
| 235 | static int __exit msm6242_rtc_remove(struct platform_device *dev) | ||
| 236 | { | ||
| 237 | struct msm6242_priv *priv = platform_get_drvdata(dev); | ||
| 238 | |||
| 239 | rtc_device_unregister(priv->rtc); | ||
| 240 | iounmap(priv->regs); | ||
| 241 | kfree(priv); | ||
| 242 | return 0; | ||
| 243 | } | ||
| 244 | |||
| 245 | static struct platform_driver msm6242_rtc_driver = { | ||
| 246 | .driver = { | ||
| 247 | .name = "rtc-msm6242", | ||
| 248 | .owner = THIS_MODULE, | ||
| 249 | }, | ||
| 250 | .remove = __exit_p(msm6242_rtc_remove), | ||
| 251 | }; | ||
| 252 | |||
| 253 | static int __init msm6242_rtc_init(void) | ||
| 254 | { | ||
| 255 | return platform_driver_probe(&msm6242_rtc_driver, msm6242_rtc_probe); | ||
| 256 | } | ||
| 257 | |||
| 258 | static void __exit msm6242_rtc_fini(void) | ||
| 259 | { | ||
| 260 | platform_driver_unregister(&msm6242_rtc_driver); | ||
| 261 | } | ||
| 262 | |||
| 263 | module_init(msm6242_rtc_init); | ||
| 264 | module_exit(msm6242_rtc_fini); | ||
| 265 | |||
| 266 | MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); | ||
| 267 | MODULE_LICENSE("GPL"); | ||
| 268 | MODULE_DESCRIPTION("Oki MSM6242 RTC driver"); | ||
| 269 | MODULE_ALIAS("platform:rtc-msm6242"); | ||
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c index 4c5d5d0c4cfc..9b74e9c9151c 100644 --- a/drivers/rtc/rtc-pcf50633.c +++ b/drivers/rtc/rtc-pcf50633.c | |||
| @@ -277,16 +277,13 @@ static void pcf50633_rtc_irq(int irq, void *data) | |||
| 277 | 277 | ||
| 278 | static int __devinit pcf50633_rtc_probe(struct platform_device *pdev) | 278 | static int __devinit pcf50633_rtc_probe(struct platform_device *pdev) |
| 279 | { | 279 | { |
| 280 | struct pcf50633_subdev_pdata *pdata; | ||
| 281 | struct pcf50633_rtc *rtc; | 280 | struct pcf50633_rtc *rtc; |
| 282 | 281 | ||
| 283 | |||
| 284 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); | 282 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); |
| 285 | if (!rtc) | 283 | if (!rtc) |
| 286 | return -ENOMEM; | 284 | return -ENOMEM; |
| 287 | 285 | ||
| 288 | pdata = pdev->dev.platform_data; | 286 | rtc->pcf = dev_to_pcf50633(pdev->dev.parent); |
| 289 | rtc->pcf = pdata->pcf; | ||
| 290 | platform_set_drvdata(pdev, rtc); | 287 | platform_set_drvdata(pdev, rtc); |
| 291 | rtc->rtc_dev = rtc_device_register("pcf50633-rtc", &pdev->dev, | 288 | rtc->rtc_dev = rtc_device_register("pcf50633-rtc", &pdev->dev, |
| 292 | &pcf50633_rtc_ops, THIS_MODULE); | 289 | &pcf50633_rtc_ops, THIS_MODULE); |
diff --git a/drivers/rtc/rtc-rp5c01.c b/drivers/rtc/rtc-rp5c01.c new file mode 100644 index 000000000000..e1313feb060f --- /dev/null +++ b/drivers/rtc/rtc-rp5c01.c | |||
| @@ -0,0 +1,222 @@ | |||
| 1 | /* | ||
| 2 | * Ricoh RP5C01 RTC Driver | ||
| 3 | * | ||
| 4 | * Copyright 2009 Geert Uytterhoeven | ||
| 5 | * | ||
| 6 | * Based on the A3000 TOD code in arch/m68k/amiga/config.c | ||
| 7 | * Copyright (C) 1993 Hamish Macdonald | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/io.h> | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/module.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/rtc.h> | ||
| 15 | |||
| 16 | |||
| 17 | enum { | ||
| 18 | RP5C01_1_SECOND = 0x0, /* MODE 00 */ | ||
| 19 | RP5C01_10_SECOND = 0x1, /* MODE 00 */ | ||
| 20 | RP5C01_1_MINUTE = 0x2, /* MODE 00 and MODE 01 */ | ||
| 21 | RP5C01_10_MINUTE = 0x3, /* MODE 00 and MODE 01 */ | ||
| 22 | RP5C01_1_HOUR = 0x4, /* MODE 00 and MODE 01 */ | ||
| 23 | RP5C01_10_HOUR = 0x5, /* MODE 00 and MODE 01 */ | ||
| 24 | RP5C01_DAY_OF_WEEK = 0x6, /* MODE 00 and MODE 01 */ | ||
| 25 | RP5C01_1_DAY = 0x7, /* MODE 00 and MODE 01 */ | ||
| 26 | RP5C01_10_DAY = 0x8, /* MODE 00 and MODE 01 */ | ||
| 27 | RP5C01_1_MONTH = 0x9, /* MODE 00 */ | ||
| 28 | RP5C01_10_MONTH = 0xa, /* MODE 00 */ | ||
| 29 | RP5C01_1_YEAR = 0xb, /* MODE 00 */ | ||
| 30 | RP5C01_10_YEAR = 0xc, /* MODE 00 */ | ||
| 31 | |||
| 32 | RP5C01_12_24_SELECT = 0xa, /* MODE 01 */ | ||
| 33 | RP5C01_LEAP_YEAR = 0xb, /* MODE 01 */ | ||
| 34 | |||
| 35 | RP5C01_MODE = 0xd, /* all modes */ | ||
| 36 | RP5C01_TEST = 0xe, /* all modes */ | ||
| 37 | RP5C01_RESET = 0xf, /* all modes */ | ||
| 38 | }; | ||
| 39 | |||
| 40 | #define RP5C01_12_24_SELECT_12 (0 << 0) | ||
| 41 | #define RP5C01_12_24_SELECT_24 (1 << 0) | ||
| 42 | |||
| 43 | #define RP5C01_10_HOUR_AM (0 << 1) | ||
| 44 | #define RP5C01_10_HOUR_PM (1 << 1) | ||
| 45 | |||
| 46 | #define RP5C01_MODE_TIMER_EN (1 << 3) /* timer enable */ | ||
| 47 | #define RP5C01_MODE_ALARM_EN (1 << 2) /* alarm enable */ | ||
| 48 | |||
| 49 | #define RP5C01_MODE_MODE_MASK (3 << 0) | ||
| 50 | #define RP5C01_MODE_MODE00 (0 << 0) /* time */ | ||
| 51 | #define RP5C01_MODE_MODE01 (1 << 0) /* alarm, 12h/24h, leap year */ | ||
| 52 | #define RP5C01_MODE_RAM_BLOCK10 (2 << 0) /* RAM 4 bits x 13 */ | ||
| 53 | #define RP5C01_MODE_RAM_BLOCK11 (3 << 0) /* RAM 4 bits x 13 */ | ||
| 54 | |||
| 55 | #define RP5C01_RESET_1HZ_PULSE (1 << 3) | ||
| 56 | #define RP5C01_RESET_16HZ_PULSE (1 << 2) | ||
| 57 | #define RP5C01_RESET_SECOND (1 << 1) /* reset divider stages for */ | ||
| 58 | /* seconds or smaller units */ | ||
| 59 | #define RP5C01_RESET_ALARM (1 << 0) /* reset all alarm registers */ | ||
| 60 | |||
| 61 | |||
| 62 | struct rp5c01_priv { | ||
| 63 | u32 __iomem *regs; | ||
| 64 | struct rtc_device *rtc; | ||
| 65 | }; | ||
| 66 | |||
| 67 | static inline unsigned int rp5c01_read(struct rp5c01_priv *priv, | ||
| 68 | unsigned int reg) | ||
| 69 | { | ||
| 70 | return __raw_readl(&priv->regs[reg]) & 0xf; | ||
| 71 | } | ||
| 72 | |||
| 73 | static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val, | ||
| 74 | unsigned int reg) | ||
| 75 | { | ||
| 76 | return __raw_writel(val, &priv->regs[reg]); | ||
| 77 | } | ||
| 78 | |||
| 79 | static void rp5c01_lock(struct rp5c01_priv *priv) | ||
| 80 | { | ||
| 81 | rp5c01_write(priv, RP5C01_MODE_MODE00, RP5C01_MODE); | ||
| 82 | } | ||
| 83 | |||
| 84 | static void rp5c01_unlock(struct rp5c01_priv *priv) | ||
| 85 | { | ||
| 86 | rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01, | ||
| 87 | RP5C01_MODE); | ||
| 88 | } | ||
| 89 | |||
| 90 | static int rp5c01_read_time(struct device *dev, struct rtc_time *tm) | ||
| 91 | { | ||
| 92 | struct rp5c01_priv *priv = dev_get_drvdata(dev); | ||
| 93 | |||
| 94 | rp5c01_lock(priv); | ||
| 95 | |||
| 96 | tm->tm_sec = rp5c01_read(priv, RP5C01_10_SECOND) * 10 + | ||
| 97 | rp5c01_read(priv, RP5C01_1_SECOND); | ||
| 98 | tm->tm_min = rp5c01_read(priv, RP5C01_10_MINUTE) * 10 + | ||
| 99 | rp5c01_read(priv, RP5C01_1_MINUTE); | ||
| 100 | tm->tm_hour = rp5c01_read(priv, RP5C01_10_HOUR) * 10 + | ||
| 101 | rp5c01_read(priv, RP5C01_1_HOUR); | ||
| 102 | tm->tm_mday = rp5c01_read(priv, RP5C01_10_DAY) * 10 + | ||
| 103 | rp5c01_read(priv, RP5C01_1_DAY); | ||
| 104 | tm->tm_wday = rp5c01_read(priv, RP5C01_DAY_OF_WEEK); | ||
| 105 | tm->tm_mon = rp5c01_read(priv, RP5C01_10_MONTH) * 10 + | ||
| 106 | rp5c01_read(priv, RP5C01_1_MONTH) - 1; | ||
| 107 | tm->tm_year = rp5c01_read(priv, RP5C01_10_YEAR) * 10 + | ||
| 108 | rp5c01_read(priv, RP5C01_1_YEAR); | ||
| 109 | if (tm->tm_year <= 69) | ||
| 110 | tm->tm_year += 100; | ||
| 111 | |||
| 112 | rp5c01_unlock(priv); | ||
| 113 | |||
| 114 | return rtc_valid_tm(tm); | ||
| 115 | } | ||
| 116 | |||
| 117 | static int rp5c01_set_time(struct device *dev, struct rtc_time *tm) | ||
| 118 | { | ||
| 119 | struct rp5c01_priv *priv = dev_get_drvdata(dev); | ||
| 120 | |||
| 121 | rp5c01_lock(priv); | ||
| 122 | |||
| 123 | rp5c01_write(priv, tm->tm_sec / 10, RP5C01_10_SECOND); | ||
| 124 | rp5c01_write(priv, tm->tm_sec % 10, RP5C01_1_SECOND); | ||
| 125 | rp5c01_write(priv, tm->tm_min / 10, RP5C01_10_MINUTE); | ||
| 126 | rp5c01_write(priv, tm->tm_min % 10, RP5C01_1_MINUTE); | ||
| 127 | rp5c01_write(priv, tm->tm_hour / 10, RP5C01_10_HOUR); | ||
| 128 | rp5c01_write(priv, tm->tm_hour % 10, RP5C01_1_HOUR); | ||
| 129 | rp5c01_write(priv, tm->tm_mday / 10, RP5C01_10_DAY); | ||
| 130 | rp5c01_write(priv, tm->tm_mday % 10, RP5C01_1_DAY); | ||
| 131 | if (tm->tm_wday != -1) | ||
| 132 | rp5c01_write(priv, tm->tm_wday, RP5C01_DAY_OF_WEEK); | ||
| 133 | rp5c01_write(priv, (tm->tm_mon + 1) / 10, RP5C01_10_MONTH); | ||
| 134 | rp5c01_write(priv, (tm->tm_mon + 1) % 10, RP5C01_1_MONTH); | ||
| 135 | if (tm->tm_year >= 100) | ||
| 136 | tm->tm_year -= 100; | ||
| 137 | rp5c01_write(priv, tm->tm_year / 10, RP5C01_10_YEAR); | ||
| 138 | rp5c01_write(priv, tm->tm_year % 10, RP5C01_1_YEAR); | ||
| 139 | |||
| 140 | rp5c01_unlock(priv); | ||
| 141 | return 0; | ||
| 142 | } | ||
| 143 | |||
| 144 | static const struct rtc_class_ops rp5c01_rtc_ops = { | ||
| 145 | .read_time = rp5c01_read_time, | ||
| 146 | .set_time = rp5c01_set_time, | ||
| 147 | }; | ||
| 148 | |||
| 149 | static int __init rp5c01_rtc_probe(struct platform_device *dev) | ||
| 150 | { | ||
| 151 | struct resource *res; | ||
| 152 | struct rp5c01_priv *priv; | ||
| 153 | struct rtc_device *rtc; | ||
| 154 | int error; | ||
| 155 | |||
| 156 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
| 157 | if (!res) | ||
| 158 | return -ENODEV; | ||
| 159 | |||
| 160 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | ||
| 161 | if (!priv) | ||
| 162 | return -ENOMEM; | ||
| 163 | |||
| 164 | priv->regs = ioremap(res->start, resource_size(res)); | ||
| 165 | if (!priv->regs) { | ||
| 166 | error = -ENOMEM; | ||
| 167 | goto out_free_priv; | ||
| 168 | } | ||
| 169 | |||
| 170 | rtc = rtc_device_register("rtc-rp5c01", &dev->dev, &rp5c01_rtc_ops, | ||
| 171 | THIS_MODULE); | ||
| 172 | if (IS_ERR(rtc)) { | ||
| 173 | error = PTR_ERR(rtc); | ||
| 174 | goto out_unmap; | ||
| 175 | } | ||
| 176 | |||
| 177 | priv->rtc = rtc; | ||
| 178 | platform_set_drvdata(dev, priv); | ||
| 179 | return 0; | ||
| 180 | |||
| 181 | out_unmap: | ||
| 182 | iounmap(priv->regs); | ||
| 183 | out_free_priv: | ||
| 184 | kfree(priv); | ||
| 185 | return error; | ||
| 186 | } | ||
| 187 | |||
| 188 | static int __exit rp5c01_rtc_remove(struct platform_device *dev) | ||
| 189 | { | ||
| 190 | struct rp5c01_priv *priv = platform_get_drvdata(dev); | ||
| 191 | |||
| 192 | rtc_device_unregister(priv->rtc); | ||
| 193 | iounmap(priv->regs); | ||
| 194 | kfree(priv); | ||
| 195 | return 0; | ||
| 196 | } | ||
| 197 | |||
| 198 | static struct platform_driver rp5c01_rtc_driver = { | ||
| 199 | .driver = { | ||
| 200 | .name = "rtc-rp5c01", | ||
| 201 | .owner = THIS_MODULE, | ||
| 202 | }, | ||
| 203 | .remove = __exit_p(rp5c01_rtc_remove), | ||
| 204 | }; | ||
| 205 | |||
| 206 | static int __init rp5c01_rtc_init(void) | ||
| 207 | { | ||
| 208 | return platform_driver_probe(&rp5c01_rtc_driver, rp5c01_rtc_probe); | ||
| 209 | } | ||
| 210 | |||
| 211 | static void __exit rp5c01_rtc_fini(void) | ||
| 212 | { | ||
| 213 | platform_driver_unregister(&rp5c01_rtc_driver); | ||
| 214 | } | ||
| 215 | |||
| 216 | module_init(rp5c01_rtc_init); | ||
| 217 | module_exit(rp5c01_rtc_fini); | ||
| 218 | |||
| 219 | MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); | ||
| 220 | MODULE_LICENSE("GPL"); | ||
| 221 | MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver"); | ||
| 222 | MODULE_ALIAS("platform:rtc-rp5c01"); | ||
diff --git a/drivers/rtc/rtc-stk17ta8.c b/drivers/rtc/rtc-stk17ta8.c index 7d1547b0070e..d491eb265c38 100644 --- a/drivers/rtc/rtc-stk17ta8.c +++ b/drivers/rtc/rtc-stk17ta8.c | |||
| @@ -286,7 +286,7 @@ static struct bin_attribute stk17ta8_nvram_attr = { | |||
| 286 | .write = stk17ta8_nvram_write, | 286 | .write = stk17ta8_nvram_write, |
| 287 | }; | 287 | }; |
| 288 | 288 | ||
| 289 | static int __init stk17ta8_rtc_probe(struct platform_device *pdev) | 289 | static int __devinit stk17ta8_rtc_probe(struct platform_device *pdev) |
| 290 | { | 290 | { |
| 291 | struct rtc_device *rtc; | 291 | struct rtc_device *rtc; |
| 292 | struct resource *res; | 292 | struct resource *res; |
diff --git a/drivers/rtc/rtc-twl4030.c b/drivers/rtc/rtc-twl.c index 9c8c70c497dc..c6a83a2a722c 100644 --- a/drivers/rtc/rtc-twl4030.c +++ b/drivers/rtc/rtc-twl.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * rtc-twl4030.c -- TWL4030 Real Time Clock interface | 2 | * rtc-twl.c -- TWL Real Time Clock interface |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2007 MontaVista Software, Inc | 4 | * Copyright (C) 2007 MontaVista Software, Inc |
| 5 | * Author: Alexandre Rusev <source@mvista.com> | 5 | * Author: Alexandre Rusev <source@mvista.com> |
| @@ -28,33 +28,81 @@ | |||
| 28 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
| 30 | 30 | ||
| 31 | #include <linux/i2c/twl4030.h> | 31 | #include <linux/i2c/twl.h> |
| 32 | 32 | ||
| 33 | 33 | ||
| 34 | /* | 34 | /* |
| 35 | * RTC block register offsets (use TWL_MODULE_RTC) | 35 | * RTC block register offsets (use TWL_MODULE_RTC) |
| 36 | */ | 36 | */ |
| 37 | #define REG_SECONDS_REG 0x00 | 37 | enum { |
| 38 | #define REG_MINUTES_REG 0x01 | 38 | REG_SECONDS_REG = 0, |
| 39 | #define REG_HOURS_REG 0x02 | 39 | REG_MINUTES_REG, |
| 40 | #define REG_DAYS_REG 0x03 | 40 | REG_HOURS_REG, |
| 41 | #define REG_MONTHS_REG 0x04 | 41 | REG_DAYS_REG, |
| 42 | #define REG_YEARS_REG 0x05 | 42 | REG_MONTHS_REG, |
| 43 | #define REG_WEEKS_REG 0x06 | 43 | REG_YEARS_REG, |
| 44 | 44 | REG_WEEKS_REG, | |
| 45 | #define REG_ALARM_SECONDS_REG 0x07 | 45 | |
| 46 | #define REG_ALARM_MINUTES_REG 0x08 | 46 | REG_ALARM_SECONDS_REG, |
| 47 | #define REG_ALARM_HOURS_REG 0x09 | 47 | REG_ALARM_MINUTES_REG, |
| 48 | #define REG_ALARM_DAYS_REG 0x0A | 48 | REG_ALARM_HOURS_REG, |
| 49 | #define REG_ALARM_MONTHS_REG 0x0B | 49 | REG_ALARM_DAYS_REG, |
| 50 | #define REG_ALARM_YEARS_REG 0x0C | 50 | REG_ALARM_MONTHS_REG, |
| 51 | 51 | REG_ALARM_YEARS_REG, | |
| 52 | #define REG_RTC_CTRL_REG 0x0D | 52 | |
| 53 | #define REG_RTC_STATUS_REG 0x0E | 53 | REG_RTC_CTRL_REG, |
| 54 | #define REG_RTC_INTERRUPTS_REG 0x0F | 54 | REG_RTC_STATUS_REG, |
| 55 | 55 | REG_RTC_INTERRUPTS_REG, | |
| 56 | #define REG_RTC_COMP_LSB_REG 0x10 | 56 | |
| 57 | #define REG_RTC_COMP_MSB_REG 0x11 | 57 | REG_RTC_COMP_LSB_REG, |
| 58 | REG_RTC_COMP_MSB_REG, | ||
| 59 | }; | ||
| 60 | const static u8 twl4030_rtc_reg_map[] = { | ||
| 61 | [REG_SECONDS_REG] = 0x00, | ||
| 62 | [REG_MINUTES_REG] = 0x01, | ||
| 63 | [REG_HOURS_REG] = 0x02, | ||
| 64 | [REG_DAYS_REG] = 0x03, | ||
| 65 | [REG_MONTHS_REG] = 0x04, | ||
| 66 | [REG_YEARS_REG] = 0x05, | ||
| 67 | [REG_WEEKS_REG] = 0x06, | ||
| 68 | |||
| 69 | [REG_ALARM_SECONDS_REG] = 0x07, | ||
| 70 | [REG_ALARM_MINUTES_REG] = 0x08, | ||
| 71 | [REG_ALARM_HOURS_REG] = 0x09, | ||
| 72 | [REG_ALARM_DAYS_REG] = 0x0A, | ||
| 73 | [REG_ALARM_MONTHS_REG] = 0x0B, | ||
| 74 | [REG_ALARM_YEARS_REG] = 0x0C, | ||
| 75 | |||
| 76 | [REG_RTC_CTRL_REG] = 0x0D, | ||
| 77 | [REG_RTC_STATUS_REG] = 0x0E, | ||
| 78 | [REG_RTC_INTERRUPTS_REG] = 0x0F, | ||
| 79 | |||
| 80 | [REG_RTC_COMP_LSB_REG] = 0x10, | ||
| 81 | [REG_RTC_COMP_MSB_REG] = 0x11, | ||
| 82 | }; | ||
| 83 | const static u8 twl6030_rtc_reg_map[] = { | ||
| 84 | [REG_SECONDS_REG] = 0x00, | ||
| 85 | [REG_MINUTES_REG] = 0x01, | ||
| 86 | [REG_HOURS_REG] = 0x02, | ||
| 87 | [REG_DAYS_REG] = 0x03, | ||
| 88 | [REG_MONTHS_REG] = 0x04, | ||
| 89 | [REG_YEARS_REG] = 0x05, | ||
| 90 | [REG_WEEKS_REG] = 0x06, | ||
| 91 | |||
| 92 | [REG_ALARM_SECONDS_REG] = 0x08, | ||
| 93 | [REG_ALARM_MINUTES_REG] = 0x09, | ||
| 94 | [REG_ALARM_HOURS_REG] = 0x0A, | ||
| 95 | [REG_ALARM_DAYS_REG] = 0x0B, | ||
| 96 | [REG_ALARM_MONTHS_REG] = 0x0C, | ||
| 97 | [REG_ALARM_YEARS_REG] = 0x0D, | ||
| 98 | |||
| 99 | [REG_RTC_CTRL_REG] = 0x10, | ||
| 100 | [REG_RTC_STATUS_REG] = 0x11, | ||
| 101 | [REG_RTC_INTERRUPTS_REG] = 0x12, | ||
| 102 | |||
| 103 | [REG_RTC_COMP_LSB_REG] = 0x13, | ||
| 104 | [REG_RTC_COMP_MSB_REG] = 0x14, | ||
| 105 | }; | ||
| 58 | 106 | ||
| 59 | /* RTC_CTRL_REG bitfields */ | 107 | /* RTC_CTRL_REG bitfields */ |
| 60 | #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 | 108 | #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 |
| @@ -84,31 +132,32 @@ | |||
| 84 | #define ALL_TIME_REGS 6 | 132 | #define ALL_TIME_REGS 6 |
| 85 | 133 | ||
| 86 | /*----------------------------------------------------------------------*/ | 134 | /*----------------------------------------------------------------------*/ |
| 135 | static u8 *rtc_reg_map; | ||
| 87 | 136 | ||
| 88 | /* | 137 | /* |
| 89 | * Supports 1 byte read from TWL4030 RTC register. | 138 | * Supports 1 byte read from TWL RTC register. |
| 90 | */ | 139 | */ |
| 91 | static int twl4030_rtc_read_u8(u8 *data, u8 reg) | 140 | static int twl_rtc_read_u8(u8 *data, u8 reg) |
| 92 | { | 141 | { |
| 93 | int ret; | 142 | int ret; |
| 94 | 143 | ||
| 95 | ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg); | 144 | ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
| 96 | if (ret < 0) | 145 | if (ret < 0) |
| 97 | pr_err("twl4030_rtc: Could not read TWL4030" | 146 | pr_err("twl_rtc: Could not read TWL" |
| 98 | "register %X - error %d\n", reg, ret); | 147 | "register %X - error %d\n", reg, ret); |
| 99 | return ret; | 148 | return ret; |
| 100 | } | 149 | } |
| 101 | 150 | ||
| 102 | /* | 151 | /* |
| 103 | * Supports 1 byte write to TWL4030 RTC registers. | 152 | * Supports 1 byte write to TWL RTC registers. |
| 104 | */ | 153 | */ |
| 105 | static int twl4030_rtc_write_u8(u8 data, u8 reg) | 154 | static int twl_rtc_write_u8(u8 data, u8 reg) |
| 106 | { | 155 | { |
| 107 | int ret; | 156 | int ret; |
| 108 | 157 | ||
| 109 | ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg); | 158 | ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
| 110 | if (ret < 0) | 159 | if (ret < 0) |
| 111 | pr_err("twl4030_rtc: Could not write TWL4030" | 160 | pr_err("twl_rtc: Could not write TWL" |
| 112 | "register %X - error %d\n", reg, ret); | 161 | "register %X - error %d\n", reg, ret); |
| 113 | return ret; | 162 | return ret; |
| 114 | } | 163 | } |
| @@ -129,7 +178,7 @@ static int set_rtc_irq_bit(unsigned char bit) | |||
| 129 | 178 | ||
| 130 | val = rtc_irq_bits | bit; | 179 | val = rtc_irq_bits | bit; |
| 131 | val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; | 180 | val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; |
| 132 | ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); | 181 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
| 133 | if (ret == 0) | 182 | if (ret == 0) |
| 134 | rtc_irq_bits = val; | 183 | rtc_irq_bits = val; |
| 135 | 184 | ||
| @@ -145,14 +194,14 @@ static int mask_rtc_irq_bit(unsigned char bit) | |||
| 145 | int ret; | 194 | int ret; |
| 146 | 195 | ||
| 147 | val = rtc_irq_bits & ~bit; | 196 | val = rtc_irq_bits & ~bit; |
| 148 | ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); | 197 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
| 149 | if (ret == 0) | 198 | if (ret == 0) |
| 150 | rtc_irq_bits = val; | 199 | rtc_irq_bits = val; |
| 151 | 200 | ||
| 152 | return ret; | 201 | return ret; |
| 153 | } | 202 | } |
| 154 | 203 | ||
| 155 | static int twl4030_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) | 204 | static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) |
| 156 | { | 205 | { |
| 157 | int ret; | 206 | int ret; |
| 158 | 207 | ||
| @@ -164,7 +213,7 @@ static int twl4030_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) | |||
| 164 | return ret; | 213 | return ret; |
| 165 | } | 214 | } |
| 166 | 215 | ||
| 167 | static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled) | 216 | static int twl_rtc_update_irq_enable(struct device *dev, unsigned enabled) |
| 168 | { | 217 | { |
| 169 | int ret; | 218 | int ret; |
| 170 | 219 | ||
| @@ -177,7 +226,7 @@ static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled) | |||
| 177 | } | 226 | } |
| 178 | 227 | ||
| 179 | /* | 228 | /* |
| 180 | * Gets current TWL4030 RTC time and date parameters. | 229 | * Gets current TWL RTC time and date parameters. |
| 181 | * | 230 | * |
| 182 | * The RTC's time/alarm representation is not what gmtime(3) requires | 231 | * The RTC's time/alarm representation is not what gmtime(3) requires |
| 183 | * Linux to use: | 232 | * Linux to use: |
| @@ -185,24 +234,24 @@ static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled) | |||
| 185 | * - Months are 1..12 vs Linux 0-11 | 234 | * - Months are 1..12 vs Linux 0-11 |
| 186 | * - Years are 0..99 vs Linux 1900..N (we assume 21st century) | 235 | * - Years are 0..99 vs Linux 1900..N (we assume 21st century) |
| 187 | */ | 236 | */ |
| 188 | static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm) | 237 | static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 189 | { | 238 | { |
| 190 | unsigned char rtc_data[ALL_TIME_REGS + 1]; | 239 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| 191 | int ret; | 240 | int ret; |
| 192 | u8 save_control; | 241 | u8 save_control; |
| 193 | 242 | ||
| 194 | ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); | 243 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
| 195 | if (ret < 0) | 244 | if (ret < 0) |
| 196 | return ret; | 245 | return ret; |
| 197 | 246 | ||
| 198 | save_control |= BIT_RTC_CTRL_REG_GET_TIME_M; | 247 | save_control |= BIT_RTC_CTRL_REG_GET_TIME_M; |
| 199 | 248 | ||
| 200 | ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); | 249 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
| 201 | if (ret < 0) | 250 | if (ret < 0) |
| 202 | return ret; | 251 | return ret; |
| 203 | 252 | ||
| 204 | ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data, | 253 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
| 205 | REG_SECONDS_REG, ALL_TIME_REGS); | 254 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
| 206 | 255 | ||
| 207 | if (ret < 0) { | 256 | if (ret < 0) { |
| 208 | dev_err(dev, "rtc_read_time error %d\n", ret); | 257 | dev_err(dev, "rtc_read_time error %d\n", ret); |
| @@ -219,7 +268,7 @@ static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
| 219 | return ret; | 268 | return ret; |
| 220 | } | 269 | } |
| 221 | 270 | ||
| 222 | static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm) | 271 | static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 223 | { | 272 | { |
| 224 | unsigned char save_control; | 273 | unsigned char save_control; |
| 225 | unsigned char rtc_data[ALL_TIME_REGS + 1]; | 274 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| @@ -233,18 +282,18 @@ static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
| 233 | rtc_data[6] = bin2bcd(tm->tm_year - 100); | 282 | rtc_data[6] = bin2bcd(tm->tm_year - 100); |
| 234 | 283 | ||
| 235 | /* Stop RTC while updating the TC registers */ | 284 | /* Stop RTC while updating the TC registers */ |
| 236 | ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); | 285 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
| 237 | if (ret < 0) | 286 | if (ret < 0) |
| 238 | goto out; | 287 | goto out; |
| 239 | 288 | ||
| 240 | save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; | 289 | save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; |
| 241 | twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); | 290 | twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
| 242 | if (ret < 0) | 291 | if (ret < 0) |
| 243 | goto out; | 292 | goto out; |
| 244 | 293 | ||
| 245 | /* update all the time registers in one shot */ | 294 | /* update all the time registers in one shot */ |
| 246 | ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data, | 295 | ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data, |
| 247 | REG_SECONDS_REG, ALL_TIME_REGS); | 296 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
| 248 | if (ret < 0) { | 297 | if (ret < 0) { |
| 249 | dev_err(dev, "rtc_set_time error %d\n", ret); | 298 | dev_err(dev, "rtc_set_time error %d\n", ret); |
| 250 | goto out; | 299 | goto out; |
| @@ -252,22 +301,22 @@ static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
| 252 | 301 | ||
| 253 | /* Start back RTC */ | 302 | /* Start back RTC */ |
| 254 | save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; | 303 | save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; |
| 255 | ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); | 304 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
| 256 | 305 | ||
| 257 | out: | 306 | out: |
| 258 | return ret; | 307 | return ret; |
| 259 | } | 308 | } |
| 260 | 309 | ||
| 261 | /* | 310 | /* |
| 262 | * Gets current TWL4030 RTC alarm time. | 311 | * Gets current TWL RTC alarm time. |
| 263 | */ | 312 | */ |
| 264 | static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) | 313 | static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) |
| 265 | { | 314 | { |
| 266 | unsigned char rtc_data[ALL_TIME_REGS + 1]; | 315 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| 267 | int ret; | 316 | int ret; |
| 268 | 317 | ||
| 269 | ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data, | 318 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
| 270 | REG_ALARM_SECONDS_REG, ALL_TIME_REGS); | 319 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
| 271 | if (ret < 0) { | 320 | if (ret < 0) { |
| 272 | dev_err(dev, "rtc_read_alarm error %d\n", ret); | 321 | dev_err(dev, "rtc_read_alarm error %d\n", ret); |
| 273 | return ret; | 322 | return ret; |
| @@ -288,12 +337,12 @@ static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) | |||
| 288 | return ret; | 337 | return ret; |
| 289 | } | 338 | } |
| 290 | 339 | ||
| 291 | static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | 340 | static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) |
| 292 | { | 341 | { |
| 293 | unsigned char alarm_data[ALL_TIME_REGS + 1]; | 342 | unsigned char alarm_data[ALL_TIME_REGS + 1]; |
| 294 | int ret; | 343 | int ret; |
| 295 | 344 | ||
| 296 | ret = twl4030_rtc_alarm_irq_enable(dev, 0); | 345 | ret = twl_rtc_alarm_irq_enable(dev, 0); |
| 297 | if (ret) | 346 | if (ret) |
| 298 | goto out; | 347 | goto out; |
| 299 | 348 | ||
| @@ -305,20 +354,20 @@ static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |||
| 305 | alarm_data[6] = bin2bcd(alm->time.tm_year - 100); | 354 | alarm_data[6] = bin2bcd(alm->time.tm_year - 100); |
| 306 | 355 | ||
| 307 | /* update all the alarm registers in one shot */ | 356 | /* update all the alarm registers in one shot */ |
| 308 | ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data, | 357 | ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data, |
| 309 | REG_ALARM_SECONDS_REG, ALL_TIME_REGS); | 358 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
| 310 | if (ret) { | 359 | if (ret) { |
| 311 | dev_err(dev, "rtc_set_alarm error %d\n", ret); | 360 | dev_err(dev, "rtc_set_alarm error %d\n", ret); |
| 312 | goto out; | 361 | goto out; |
| 313 | } | 362 | } |
| 314 | 363 | ||
| 315 | if (alm->enabled) | 364 | if (alm->enabled) |
| 316 | ret = twl4030_rtc_alarm_irq_enable(dev, 1); | 365 | ret = twl_rtc_alarm_irq_enable(dev, 1); |
| 317 | out: | 366 | out: |
| 318 | return ret; | 367 | return ret; |
| 319 | } | 368 | } |
| 320 | 369 | ||
| 321 | static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc) | 370 | static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) |
| 322 | { | 371 | { |
| 323 | unsigned long events = 0; | 372 | unsigned long events = 0; |
| 324 | int ret = IRQ_NONE; | 373 | int ret = IRQ_NONE; |
| @@ -333,7 +382,7 @@ static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc) | |||
| 333 | local_irq_enable(); | 382 | local_irq_enable(); |
| 334 | #endif | 383 | #endif |
| 335 | 384 | ||
| 336 | res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 385 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
| 337 | if (res) | 386 | if (res) |
| 338 | goto out; | 387 | goto out; |
| 339 | /* | 388 | /* |
| @@ -347,26 +396,28 @@ static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc) | |||
| 347 | else | 396 | else |
| 348 | events |= RTC_IRQF | RTC_UF; | 397 | events |= RTC_IRQF | RTC_UF; |
| 349 | 398 | ||
| 350 | res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M, | 399 | res = twl_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M, |
| 351 | REG_RTC_STATUS_REG); | 400 | REG_RTC_STATUS_REG); |
| 352 | if (res) | 401 | if (res) |
| 353 | goto out; | 402 | goto out; |
| 354 | 403 | ||
| 355 | /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 | 404 | if (twl_class_is_4030()) { |
| 356 | * needs 2 reads to clear the interrupt. One read is done in | 405 | /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 |
| 357 | * do_twl4030_pwrirq(). Doing the second read, to clear | 406 | * needs 2 reads to clear the interrupt. One read is done in |
| 358 | * the bit. | 407 | * do_twl_pwrirq(). Doing the second read, to clear |
| 359 | * | 408 | * the bit. |
| 360 | * FIXME the reason PWR_ISR1 needs an extra read is that | 409 | * |
| 361 | * RTC_IF retriggered until we cleared REG_ALARM_M above. | 410 | * FIXME the reason PWR_ISR1 needs an extra read is that |
| 362 | * But re-reading like this is a bad hack; by doing so we | 411 | * RTC_IF retriggered until we cleared REG_ALARM_M above. |
| 363 | * risk wrongly clearing status for some other IRQ (losing | 412 | * But re-reading like this is a bad hack; by doing so we |
| 364 | * the interrupt). Be smarter about handling RTC_UF ... | 413 | * risk wrongly clearing status for some other IRQ (losing |
| 365 | */ | 414 | * the interrupt). Be smarter about handling RTC_UF ... |
| 366 | res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, | 415 | */ |
| 416 | res = twl_i2c_read_u8(TWL4030_MODULE_INT, | ||
| 367 | &rd_reg, TWL4030_INT_PWR_ISR1); | 417 | &rd_reg, TWL4030_INT_PWR_ISR1); |
| 368 | if (res) | 418 | if (res) |
| 369 | goto out; | 419 | goto out; |
| 420 | } | ||
| 370 | 421 | ||
| 371 | /* Notify RTC core on event */ | 422 | /* Notify RTC core on event */ |
| 372 | rtc_update_irq(rtc, 1, events); | 423 | rtc_update_irq(rtc, 1, events); |
| @@ -376,18 +427,18 @@ out: | |||
| 376 | return ret; | 427 | return ret; |
| 377 | } | 428 | } |
| 378 | 429 | ||
| 379 | static struct rtc_class_ops twl4030_rtc_ops = { | 430 | static struct rtc_class_ops twl_rtc_ops = { |
| 380 | .read_time = twl4030_rtc_read_time, | 431 | .read_time = twl_rtc_read_time, |
| 381 | .set_time = twl4030_rtc_set_time, | 432 | .set_time = twl_rtc_set_time, |
| 382 | .read_alarm = twl4030_rtc_read_alarm, | 433 | .read_alarm = twl_rtc_read_alarm, |
| 383 | .set_alarm = twl4030_rtc_set_alarm, | 434 | .set_alarm = twl_rtc_set_alarm, |
| 384 | .alarm_irq_enable = twl4030_rtc_alarm_irq_enable, | 435 | .alarm_irq_enable = twl_rtc_alarm_irq_enable, |
| 385 | .update_irq_enable = twl4030_rtc_update_irq_enable, | 436 | .update_irq_enable = twl_rtc_update_irq_enable, |
| 386 | }; | 437 | }; |
| 387 | 438 | ||
| 388 | /*----------------------------------------------------------------------*/ | 439 | /*----------------------------------------------------------------------*/ |
| 389 | 440 | ||
| 390 | static int __devinit twl4030_rtc_probe(struct platform_device *pdev) | 441 | static int __devinit twl_rtc_probe(struct platform_device *pdev) |
| 391 | { | 442 | { |
| 392 | struct rtc_device *rtc; | 443 | struct rtc_device *rtc; |
| 393 | int ret = 0; | 444 | int ret = 0; |
| @@ -398,7 +449,7 @@ static int __devinit twl4030_rtc_probe(struct platform_device *pdev) | |||
| 398 | return -EINVAL; | 449 | return -EINVAL; |
| 399 | 450 | ||
| 400 | rtc = rtc_device_register(pdev->name, | 451 | rtc = rtc_device_register(pdev->name, |
| 401 | &pdev->dev, &twl4030_rtc_ops, THIS_MODULE); | 452 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); |
| 402 | if (IS_ERR(rtc)) { | 453 | if (IS_ERR(rtc)) { |
| 403 | ret = PTR_ERR(rtc); | 454 | ret = PTR_ERR(rtc); |
| 404 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | 455 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", |
| @@ -409,7 +460,7 @@ static int __devinit twl4030_rtc_probe(struct platform_device *pdev) | |||
| 409 | 460 | ||
| 410 | platform_set_drvdata(pdev, rtc); | 461 | platform_set_drvdata(pdev, rtc); |
| 411 | 462 | ||
| 412 | ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 463 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
| 413 | if (ret < 0) | 464 | if (ret < 0) |
| 414 | goto out1; | 465 | goto out1; |
| 415 | 466 | ||
| @@ -420,11 +471,11 @@ static int __devinit twl4030_rtc_probe(struct platform_device *pdev) | |||
| 420 | dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); | 471 | dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); |
| 421 | 472 | ||
| 422 | /* Clear RTC Power up reset and pending alarm interrupts */ | 473 | /* Clear RTC Power up reset and pending alarm interrupts */ |
| 423 | ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); | 474 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); |
| 424 | if (ret < 0) | 475 | if (ret < 0) |
| 425 | goto out1; | 476 | goto out1; |
| 426 | 477 | ||
| 427 | ret = request_irq(irq, twl4030_rtc_interrupt, | 478 | ret = request_irq(irq, twl_rtc_interrupt, |
| 428 | IRQF_TRIGGER_RISING, | 479 | IRQF_TRIGGER_RISING, |
| 429 | dev_name(&rtc->dev), rtc); | 480 | dev_name(&rtc->dev), rtc); |
| 430 | if (ret < 0) { | 481 | if (ret < 0) { |
| @@ -432,21 +483,28 @@ static int __devinit twl4030_rtc_probe(struct platform_device *pdev) | |||
| 432 | goto out1; | 483 | goto out1; |
| 433 | } | 484 | } |
| 434 | 485 | ||
| 486 | if (twl_class_is_6030()) { | ||
| 487 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, | ||
| 488 | REG_INT_MSK_LINE_A); | ||
| 489 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, | ||
| 490 | REG_INT_MSK_STS_A); | ||
| 491 | } | ||
| 492 | |||
| 435 | /* Check RTC module status, Enable if it is off */ | 493 | /* Check RTC module status, Enable if it is off */ |
| 436 | ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); | 494 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); |
| 437 | if (ret < 0) | 495 | if (ret < 0) |
| 438 | goto out2; | 496 | goto out2; |
| 439 | 497 | ||
| 440 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { | 498 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { |
| 441 | dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n"); | 499 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); |
| 442 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; | 500 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; |
| 443 | ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); | 501 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); |
| 444 | if (ret < 0) | 502 | if (ret < 0) |
| 445 | goto out2; | 503 | goto out2; |
| 446 | } | 504 | } |
| 447 | 505 | ||
| 448 | /* init cached IRQ enable bits */ | 506 | /* init cached IRQ enable bits */ |
| 449 | ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); | 507 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); |
| 450 | if (ret < 0) | 508 | if (ret < 0) |
| 451 | goto out2; | 509 | goto out2; |
| 452 | 510 | ||
| @@ -461,10 +519,10 @@ out0: | |||
| 461 | } | 519 | } |
| 462 | 520 | ||
| 463 | /* | 521 | /* |
| 464 | * Disable all TWL4030 RTC module interrupts. | 522 | * Disable all TWL RTC module interrupts. |
| 465 | * Sets status flag to free. | 523 | * Sets status flag to free. |
| 466 | */ | 524 | */ |
| 467 | static int __devexit twl4030_rtc_remove(struct platform_device *pdev) | 525 | static int __devexit twl_rtc_remove(struct platform_device *pdev) |
| 468 | { | 526 | { |
| 469 | /* leave rtc running, but disable irqs */ | 527 | /* leave rtc running, but disable irqs */ |
| 470 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 528 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| @@ -472,6 +530,13 @@ static int __devexit twl4030_rtc_remove(struct platform_device *pdev) | |||
| 472 | 530 | ||
| 473 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); | 531 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
| 474 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); | 532 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
| 533 | if (twl_class_is_6030()) { | ||
| 534 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, | ||
| 535 | REG_INT_MSK_LINE_A); | ||
| 536 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, | ||
| 537 | REG_INT_MSK_STS_A); | ||
| 538 | } | ||
| 539 | |||
| 475 | 540 | ||
| 476 | free_irq(irq, rtc); | 541 | free_irq(irq, rtc); |
| 477 | 542 | ||
| @@ -480,7 +545,7 @@ static int __devexit twl4030_rtc_remove(struct platform_device *pdev) | |||
| 480 | return 0; | 545 | return 0; |
| 481 | } | 546 | } |
| 482 | 547 | ||
| 483 | static void twl4030_rtc_shutdown(struct platform_device *pdev) | 548 | static void twl_rtc_shutdown(struct platform_device *pdev) |
| 484 | { | 549 | { |
| 485 | /* mask timer interrupts, but leave alarm interrupts on to enable | 550 | /* mask timer interrupts, but leave alarm interrupts on to enable |
| 486 | power-on when alarm is triggered */ | 551 | power-on when alarm is triggered */ |
| @@ -491,7 +556,7 @@ static void twl4030_rtc_shutdown(struct platform_device *pdev) | |||
| 491 | 556 | ||
| 492 | static unsigned char irqstat; | 557 | static unsigned char irqstat; |
| 493 | 558 | ||
| 494 | static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state) | 559 | static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state) |
| 495 | { | 560 | { |
| 496 | irqstat = rtc_irq_bits; | 561 | irqstat = rtc_irq_bits; |
| 497 | 562 | ||
| @@ -499,42 +564,47 @@ static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |||
| 499 | return 0; | 564 | return 0; |
| 500 | } | 565 | } |
| 501 | 566 | ||
| 502 | static int twl4030_rtc_resume(struct platform_device *pdev) | 567 | static int twl_rtc_resume(struct platform_device *pdev) |
| 503 | { | 568 | { |
| 504 | set_rtc_irq_bit(irqstat); | 569 | set_rtc_irq_bit(irqstat); |
| 505 | return 0; | 570 | return 0; |
| 506 | } | 571 | } |
| 507 | 572 | ||
| 508 | #else | 573 | #else |
| 509 | #define twl4030_rtc_suspend NULL | 574 | #define twl_rtc_suspend NULL |
| 510 | #define twl4030_rtc_resume NULL | 575 | #define twl_rtc_resume NULL |
| 511 | #endif | 576 | #endif |
| 512 | 577 | ||
| 513 | MODULE_ALIAS("platform:twl4030_rtc"); | 578 | MODULE_ALIAS("platform:twl_rtc"); |
| 514 | 579 | ||
| 515 | static struct platform_driver twl4030rtc_driver = { | 580 | static struct platform_driver twl4030rtc_driver = { |
| 516 | .probe = twl4030_rtc_probe, | 581 | .probe = twl_rtc_probe, |
| 517 | .remove = __devexit_p(twl4030_rtc_remove), | 582 | .remove = __devexit_p(twl_rtc_remove), |
| 518 | .shutdown = twl4030_rtc_shutdown, | 583 | .shutdown = twl_rtc_shutdown, |
| 519 | .suspend = twl4030_rtc_suspend, | 584 | .suspend = twl_rtc_suspend, |
| 520 | .resume = twl4030_rtc_resume, | 585 | .resume = twl_rtc_resume, |
| 521 | .driver = { | 586 | .driver = { |
| 522 | .owner = THIS_MODULE, | 587 | .owner = THIS_MODULE, |
| 523 | .name = "twl4030_rtc", | 588 | .name = "twl_rtc", |
| 524 | }, | 589 | }, |
| 525 | }; | 590 | }; |
| 526 | 591 | ||
| 527 | static int __init twl4030_rtc_init(void) | 592 | static int __init twl_rtc_init(void) |
| 528 | { | 593 | { |
| 594 | if (twl_class_is_4030()) | ||
| 595 | rtc_reg_map = (u8 *) twl4030_rtc_reg_map; | ||
| 596 | else | ||
| 597 | rtc_reg_map = (u8 *) twl6030_rtc_reg_map; | ||
| 598 | |||
| 529 | return platform_driver_register(&twl4030rtc_driver); | 599 | return platform_driver_register(&twl4030rtc_driver); |
| 530 | } | 600 | } |
| 531 | module_init(twl4030_rtc_init); | 601 | module_init(twl_rtc_init); |
| 532 | 602 | ||
| 533 | static void __exit twl4030_rtc_exit(void) | 603 | static void __exit twl_rtc_exit(void) |
| 534 | { | 604 | { |
| 535 | platform_driver_unregister(&twl4030rtc_driver); | 605 | platform_driver_unregister(&twl4030rtc_driver); |
| 536 | } | 606 | } |
| 537 | module_exit(twl4030_rtc_exit); | 607 | module_exit(twl_rtc_exit); |
| 538 | 608 | ||
| 539 | MODULE_AUTHOR("Texas Instruments, MontaVista Software"); | 609 | MODULE_AUTHOR("Texas Instruments, MontaVista Software"); |
| 540 | MODULE_LICENSE("GPL"); | 610 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c index 423cd5a30b10..ad741afd47d8 100644 --- a/drivers/rtc/rtc-v3020.c +++ b/drivers/rtc/rtc-v3020.c | |||
| @@ -335,7 +335,7 @@ static int rtc_probe(struct platform_device *pdev) | |||
| 335 | goto err_io; | 335 | goto err_io; |
| 336 | } | 336 | } |
| 337 | 337 | ||
| 338 | /* Make sure frequency measurment mode, test modes, and lock | 338 | /* Make sure frequency measurement mode, test modes, and lock |
| 339 | * are all disabled */ | 339 | * are all disabled */ |
| 340 | v3020_set_reg(chip, V3020_STATUS_0, 0x0); | 340 | v3020_set_reg(chip, V3020_STATUS_0, 0x0); |
| 341 | 341 | ||
diff --git a/drivers/rtc/rtc-wm8350.c b/drivers/rtc/rtc-wm8350.c index c91edc572eb6..f16486635a8e 100644 --- a/drivers/rtc/rtc-wm8350.c +++ b/drivers/rtc/rtc-wm8350.c | |||
| @@ -315,9 +315,9 @@ static int wm8350_rtc_update_irq_enable(struct device *dev, | |||
| 315 | return 0; | 315 | return 0; |
| 316 | } | 316 | } |
| 317 | 317 | ||
| 318 | static void wm8350_rtc_alarm_handler(struct wm8350 *wm8350, int irq, | 318 | static irqreturn_t wm8350_rtc_alarm_handler(int irq, void *data) |
| 319 | void *data) | ||
| 320 | { | 319 | { |
| 320 | struct wm8350 *wm8350 = data; | ||
| 321 | struct rtc_device *rtc = wm8350->rtc.rtc; | 321 | struct rtc_device *rtc = wm8350->rtc.rtc; |
| 322 | int ret; | 322 | int ret; |
| 323 | 323 | ||
| @@ -330,14 +330,18 @@ static void wm8350_rtc_alarm_handler(struct wm8350 *wm8350, int irq, | |||
| 330 | dev_err(&(wm8350->rtc.pdev->dev), | 330 | dev_err(&(wm8350->rtc.pdev->dev), |
| 331 | "Failed to disable alarm: %d\n", ret); | 331 | "Failed to disable alarm: %d\n", ret); |
| 332 | } | 332 | } |
| 333 | |||
| 334 | return IRQ_HANDLED; | ||
| 333 | } | 335 | } |
| 334 | 336 | ||
| 335 | static void wm8350_rtc_update_handler(struct wm8350 *wm8350, int irq, | 337 | static irqreturn_t wm8350_rtc_update_handler(int irq, void *data) |
| 336 | void *data) | ||
| 337 | { | 338 | { |
| 339 | struct wm8350 *wm8350 = data; | ||
| 338 | struct rtc_device *rtc = wm8350->rtc.rtc; | 340 | struct rtc_device *rtc = wm8350->rtc.rtc; |
| 339 | 341 | ||
| 340 | rtc_update_irq(rtc, 1, RTC_IRQF | RTC_UF); | 342 | rtc_update_irq(rtc, 1, RTC_IRQF | RTC_UF); |
| 343 | |||
| 344 | return IRQ_HANDLED; | ||
| 341 | } | 345 | } |
| 342 | 346 | ||
| 343 | static const struct rtc_class_ops wm8350_rtc_ops = { | 347 | static const struct rtc_class_ops wm8350_rtc_ops = { |
| @@ -455,15 +459,14 @@ static int wm8350_rtc_probe(struct platform_device *pdev) | |||
| 455 | return ret; | 459 | return ret; |
| 456 | } | 460 | } |
| 457 | 461 | ||
| 458 | wm8350_mask_irq(wm8350, WM8350_IRQ_RTC_SEC); | ||
| 459 | wm8350_mask_irq(wm8350, WM8350_IRQ_RTC_PER); | ||
| 460 | |||
| 461 | wm8350_register_irq(wm8350, WM8350_IRQ_RTC_SEC, | 462 | wm8350_register_irq(wm8350, WM8350_IRQ_RTC_SEC, |
| 462 | wm8350_rtc_update_handler, NULL); | 463 | wm8350_rtc_update_handler, 0, |
| 464 | "RTC Seconds", wm8350); | ||
| 465 | wm8350_mask_irq(wm8350, WM8350_IRQ_RTC_SEC); | ||
| 463 | 466 | ||
| 464 | wm8350_register_irq(wm8350, WM8350_IRQ_RTC_ALM, | 467 | wm8350_register_irq(wm8350, WM8350_IRQ_RTC_ALM, |
| 465 | wm8350_rtc_alarm_handler, NULL); | 468 | wm8350_rtc_alarm_handler, 0, |
| 466 | wm8350_unmask_irq(wm8350, WM8350_IRQ_RTC_ALM); | 469 | "RTC Alarm", wm8350); |
| 467 | 470 | ||
| 468 | return 0; | 471 | return 0; |
| 469 | } | 472 | } |
| @@ -473,8 +476,6 @@ static int __devexit wm8350_rtc_remove(struct platform_device *pdev) | |||
| 473 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); | 476 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); |
| 474 | struct wm8350_rtc *wm_rtc = &wm8350->rtc; | 477 | struct wm8350_rtc *wm_rtc = &wm8350->rtc; |
| 475 | 478 | ||
| 476 | wm8350_mask_irq(wm8350, WM8350_IRQ_RTC_SEC); | ||
| 477 | |||
| 478 | wm8350_free_irq(wm8350, WM8350_IRQ_RTC_SEC); | 479 | wm8350_free_irq(wm8350, WM8350_IRQ_RTC_SEC); |
| 479 | wm8350_free_irq(wm8350, WM8350_IRQ_RTC_ALM); | 480 | wm8350_free_irq(wm8350, WM8350_IRQ_RTC_ALM); |
| 480 | 481 | ||
