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-rw-r--r--drivers/rtc/Kconfig19
-rw-r--r--drivers/rtc/Makefile2
-rw-r--r--drivers/rtc/rtc-ab8500.c363
-rw-r--r--drivers/rtc/rtc-cmos.c94
-rw-r--r--drivers/rtc/rtc-davinci.c673
-rw-r--r--drivers/rtc/rtc-ds1302.c85
-rw-r--r--drivers/rtc/rtc-ds1305.c6
-rw-r--r--drivers/rtc/rtc-ds1307.c6
-rw-r--r--drivers/rtc/rtc-ds1511.c10
-rw-r--r--drivers/rtc/rtc-ds1553.c4
-rw-r--r--drivers/rtc/rtc-ds1742.c4
-rw-r--r--drivers/rtc/rtc-isl1208.c45
-rw-r--r--drivers/rtc/rtc-m41t80.c22
-rw-r--r--drivers/rtc/rtc-m48t59.c4
-rw-r--r--drivers/rtc/rtc-mxc.c25
-rw-r--r--drivers/rtc/rtc-rx8581.c6
-rw-r--r--drivers/rtc/rtc-s3c.c107
-rw-r--r--drivers/rtc/rtc-stk17ta8.c8
-rw-r--r--drivers/rtc/rtc-tx4939.c4
-rw-r--r--drivers/rtc/rtc-wm831x.c16
20 files changed, 1328 insertions, 175 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 6a1303759432..10ba12c8c5e0 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -611,6 +611,13 @@ config RTC_DRV_AB3100
611 Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC 611 Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC
612 support. This chip contains a battery- and capacitor-backed RTC. 612 support. This chip contains a battery- and capacitor-backed RTC.
613 613
614config RTC_DRV_AB8500
615 tristate "ST-Ericsson AB8500 RTC"
616 depends on AB8500_CORE
617 help
618 Select this to enable the ST-Ericsson AB8500 power management IC RTC
619 support. This chip contains a battery- and capacitor-backed RTC.
620
614config RTC_DRV_NUC900 621config RTC_DRV_NUC900
615 tristate "NUC910/NUC920 RTC driver" 622 tristate "NUC910/NUC920 RTC driver"
616 depends on RTC_CLASS && ARCH_W90X900 623 depends on RTC_CLASS && ARCH_W90X900
@@ -620,6 +627,16 @@ config RTC_DRV_NUC900
620 627
621comment "on-CPU RTC drivers" 628comment "on-CPU RTC drivers"
622 629
630config RTC_DRV_DAVINCI
631 tristate "TI DaVinci RTC"
632 depends on ARCH_DAVINCI_DM365
633 help
634 If you say yes here you get support for the RTC on the
635 DaVinci platforms (DM365).
636
637 This driver can also be built as a module. If so, the module
638 will be called rtc-davinci.
639
623config RTC_DRV_OMAP 640config RTC_DRV_OMAP
624 tristate "TI OMAP1" 641 tristate "TI OMAP1"
625 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX 642 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX
@@ -630,7 +647,7 @@ config RTC_DRV_OMAP
630 647
631config RTC_DRV_S3C 648config RTC_DRV_S3C
632 tristate "Samsung S3C series SoC RTC" 649 tristate "Samsung S3C series SoC RTC"
633 depends on ARCH_S3C2410 650 depends on ARCH_S3C2410 || ARCH_S3C64XX
634 help 651 help
635 RTC (Realtime Clock) driver for the clock inbuilt into the 652 RTC (Realtime Clock) driver for the clock inbuilt into the
636 Samsung S3C24XX series of SoCs. This can provide periodic 653 Samsung S3C24XX series of SoCs. This can provide periodic
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 44ef194a9573..5adbba7cf89c 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -18,6 +18,7 @@ rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o
18# Keep the list ordered. 18# Keep the list ordered.
19 19
20obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o 20obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o
21obj-$(CONFIG_RTC_DRV_AB8500) += rtc-ab8500.o
21obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o 22obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o
22obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o 23obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
23obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o 24obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o
@@ -27,6 +28,7 @@ obj-$(CONFIG_RTC_DRV_BQ32K) += rtc-bq32k.o
27obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o 28obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o
28obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o 29obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o
29obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o 30obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o
31obj-$(CONFIG_RTC_DRV_DAVINCI) += rtc-davinci.o
30obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o 32obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o
31obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o 33obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o
32obj-$(CONFIG_RTC_DRV_DS1286) += rtc-ds1286.o 34obj-$(CONFIG_RTC_DRV_DS1286) += rtc-ds1286.o
diff --git a/drivers/rtc/rtc-ab8500.c b/drivers/rtc/rtc-ab8500.c
new file mode 100644
index 000000000000..2fda03125e55
--- /dev/null
+++ b/drivers/rtc/rtc-ab8500.c
@@ -0,0 +1,363 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 * Author: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
6 *
7 * RTC clock driver for the RTC part of the AB8500 Power management chip.
8 * Based on RTC clock driver for the AB3100 Analog Baseband Chip by
9 * Linus Walleij <linus.walleij@stericsson.com>
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/rtc.h>
17#include <linux/mfd/ab8500.h>
18#include <linux/delay.h>
19
20#define AB8500_RTC_SOFF_STAT_REG 0x0F00
21#define AB8500_RTC_CC_CONF_REG 0x0F01
22#define AB8500_RTC_READ_REQ_REG 0x0F02
23#define AB8500_RTC_WATCH_TSECMID_REG 0x0F03
24#define AB8500_RTC_WATCH_TSECHI_REG 0x0F04
25#define AB8500_RTC_WATCH_TMIN_LOW_REG 0x0F05
26#define AB8500_RTC_WATCH_TMIN_MID_REG 0x0F06
27#define AB8500_RTC_WATCH_TMIN_HI_REG 0x0F07
28#define AB8500_RTC_ALRM_MIN_LOW_REG 0x0F08
29#define AB8500_RTC_ALRM_MIN_MID_REG 0x0F09
30#define AB8500_RTC_ALRM_MIN_HI_REG 0x0F0A
31#define AB8500_RTC_STAT_REG 0x0F0B
32#define AB8500_RTC_BKUP_CHG_REG 0x0F0C
33#define AB8500_RTC_FORCE_BKUP_REG 0x0F0D
34#define AB8500_RTC_CALIB_REG 0x0F0E
35#define AB8500_RTC_SWITCH_STAT_REG 0x0F0F
36#define AB8500_REV_REG 0x1080
37
38/* RtcReadRequest bits */
39#define RTC_READ_REQUEST 0x01
40#define RTC_WRITE_REQUEST 0x02
41
42/* RtcCtrl bits */
43#define RTC_ALARM_ENA 0x04
44#define RTC_STATUS_DATA 0x01
45
46#define COUNTS_PER_SEC (0xF000 / 60)
47#define AB8500_RTC_EPOCH 2000
48
49static const unsigned long ab8500_rtc_time_regs[] = {
50 AB8500_RTC_WATCH_TMIN_HI_REG, AB8500_RTC_WATCH_TMIN_MID_REG,
51 AB8500_RTC_WATCH_TMIN_LOW_REG, AB8500_RTC_WATCH_TSECHI_REG,
52 AB8500_RTC_WATCH_TSECMID_REG
53};
54
55static const unsigned long ab8500_rtc_alarm_regs[] = {
56 AB8500_RTC_ALRM_MIN_HI_REG, AB8500_RTC_ALRM_MIN_MID_REG,
57 AB8500_RTC_ALRM_MIN_LOW_REG
58};
59
60/* Calculate the seconds from 1970 to 01-01-2000 00:00:00 */
61static unsigned long get_elapsed_seconds(int year)
62{
63 unsigned long secs;
64 struct rtc_time tm = {
65 .tm_year = year - 1900,
66 .tm_mday = 1,
67 };
68
69 /*
70 * This function calculates secs from 1970 and not from
71 * 1900, even if we supply the offset from year 1900.
72 */
73 rtc_tm_to_time(&tm, &secs);
74 return secs;
75}
76
77static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm)
78{
79 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
80 unsigned long timeout = jiffies + HZ;
81 int retval, i;
82 unsigned long mins, secs;
83 unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)];
84
85 /* Request a data read */
86 retval = ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG,
87 RTC_READ_REQUEST);
88 if (retval < 0)
89 return retval;
90
91 /* Early AB8500 chips will not clear the rtc read request bit */
92 if (ab8500->revision == 0) {
93 msleep(1);
94 } else {
95 /* Wait for some cycles after enabling the rtc read in ab8500 */
96 while (time_before(jiffies, timeout)) {
97 retval = ab8500_read(ab8500, AB8500_RTC_READ_REQ_REG);
98 if (retval < 0)
99 return retval;
100
101 if (!(retval & RTC_READ_REQUEST))
102 break;
103
104 msleep(1);
105 }
106 }
107
108 /* Read the Watchtime registers */
109 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) {
110 retval = ab8500_read(ab8500, ab8500_rtc_time_regs[i]);
111 if (retval < 0)
112 return retval;
113 buf[i] = retval;
114 }
115
116 mins = (buf[0] << 16) | (buf[1] << 8) | buf[2];
117
118 secs = (buf[3] << 8) | buf[4];
119 secs = secs / COUNTS_PER_SEC;
120 secs = secs + (mins * 60);
121
122 /* Add back the initially subtracted number of seconds */
123 secs += get_elapsed_seconds(AB8500_RTC_EPOCH);
124
125 rtc_time_to_tm(secs, tm);
126 return rtc_valid_tm(tm);
127}
128
129static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm)
130{
131 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
132 int retval, i;
133 unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)];
134 unsigned long no_secs, no_mins, secs = 0;
135
136 if (tm->tm_year < (AB8500_RTC_EPOCH - 1900)) {
137 dev_dbg(dev, "year should be equal to or greater than %d\n",
138 AB8500_RTC_EPOCH);
139 return -EINVAL;
140 }
141
142 /* Get the number of seconds since 1970 */
143 rtc_tm_to_time(tm, &secs);
144
145 /*
146 * Convert it to the number of seconds since 01-01-2000 00:00:00, since
147 * we only have a small counter in the RTC.
148 */
149 secs -= get_elapsed_seconds(AB8500_RTC_EPOCH);
150
151 no_mins = secs / 60;
152
153 no_secs = secs % 60;
154 /* Make the seconds count as per the RTC resolution */
155 no_secs = no_secs * COUNTS_PER_SEC;
156
157 buf[4] = no_secs & 0xFF;
158 buf[3] = (no_secs >> 8) & 0xFF;
159
160 buf[2] = no_mins & 0xFF;
161 buf[1] = (no_mins >> 8) & 0xFF;
162 buf[0] = (no_mins >> 16) & 0xFF;
163
164 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) {
165 retval = ab8500_write(ab8500, ab8500_rtc_time_regs[i], buf[i]);
166 if (retval < 0)
167 return retval;
168 }
169
170 /* Request a data write */
171 return ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST);
172}
173
174static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
175{
176 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
177 int retval, i;
178 int rtc_ctrl;
179 unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)];
180 unsigned long secs, mins;
181
182 /* Check if the alarm is enabled or not */
183 rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG);
184 if (rtc_ctrl < 0)
185 return rtc_ctrl;
186
187 if (rtc_ctrl & RTC_ALARM_ENA)
188 alarm->enabled = 1;
189 else
190 alarm->enabled = 0;
191
192 alarm->pending = 0;
193
194 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) {
195 retval = ab8500_read(ab8500, ab8500_rtc_alarm_regs[i]);
196 if (retval < 0)
197 return retval;
198 buf[i] = retval;
199 }
200
201 mins = (buf[0] << 16) | (buf[1] << 8) | (buf[2]);
202 secs = mins * 60;
203
204 /* Add back the initially subtracted number of seconds */
205 secs += get_elapsed_seconds(AB8500_RTC_EPOCH);
206
207 rtc_time_to_tm(secs, &alarm->time);
208
209 return rtc_valid_tm(&alarm->time);
210}
211
212static int ab8500_rtc_irq_enable(struct device *dev, unsigned int enabled)
213{
214 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
215
216 return ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_ALARM_ENA,
217 enabled ? RTC_ALARM_ENA : 0);
218}
219
220static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
221{
222 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
223 int retval, i;
224 unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)];
225 unsigned long mins, secs = 0;
226
227 if (alarm->time.tm_year < (AB8500_RTC_EPOCH - 1900)) {
228 dev_dbg(dev, "year should be equal to or greater than %d\n",
229 AB8500_RTC_EPOCH);
230 return -EINVAL;
231 }
232
233 /* Get the number of seconds since 1970 */
234 rtc_tm_to_time(&alarm->time, &secs);
235
236 /*
237 * Convert it to the number of seconds since 01-01-2000 00:00:00, since
238 * we only have a small counter in the RTC.
239 */
240 secs -= get_elapsed_seconds(AB8500_RTC_EPOCH);
241
242 mins = secs / 60;
243
244 buf[2] = mins & 0xFF;
245 buf[1] = (mins >> 8) & 0xFF;
246 buf[0] = (mins >> 16) & 0xFF;
247
248 /* Set the alarm time */
249 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) {
250 retval = ab8500_write(ab8500, ab8500_rtc_alarm_regs[i], buf[i]);
251 if (retval < 0)
252 return retval;
253 }
254
255 return ab8500_rtc_irq_enable(dev, alarm->enabled);
256}
257
258static irqreturn_t rtc_alarm_handler(int irq, void *data)
259{
260 struct rtc_device *rtc = data;
261 unsigned long events = RTC_IRQF | RTC_AF;
262
263 dev_dbg(&rtc->dev, "%s\n", __func__);
264 rtc_update_irq(rtc, 1, events);
265
266 return IRQ_HANDLED;
267}
268
269static const struct rtc_class_ops ab8500_rtc_ops = {
270 .read_time = ab8500_rtc_read_time,
271 .set_time = ab8500_rtc_set_time,
272 .read_alarm = ab8500_rtc_read_alarm,
273 .set_alarm = ab8500_rtc_set_alarm,
274 .alarm_irq_enable = ab8500_rtc_irq_enable,
275};
276
277static int __devinit ab8500_rtc_probe(struct platform_device *pdev)
278{
279 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
280 int err;
281 struct rtc_device *rtc;
282 int rtc_ctrl;
283 int irq;
284
285 irq = platform_get_irq_byname(pdev, "ALARM");
286 if (irq < 0)
287 return irq;
288
289 /* For RTC supply test */
290 err = ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_STATUS_DATA,
291 RTC_STATUS_DATA);
292 if (err < 0)
293 return err;
294
295 /* Wait for reset by the PorRtc */
296 msleep(1);
297
298 rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG);
299 if (rtc_ctrl < 0)
300 return rtc_ctrl;
301
302 /* Check if the RTC Supply fails */
303 if (!(rtc_ctrl & RTC_STATUS_DATA)) {
304 dev_err(&pdev->dev, "RTC supply failure\n");
305 return -ENODEV;
306 }
307
308 rtc = rtc_device_register("ab8500-rtc", &pdev->dev, &ab8500_rtc_ops,
309 THIS_MODULE);
310 if (IS_ERR(rtc)) {
311 dev_err(&pdev->dev, "Registration failed\n");
312 err = PTR_ERR(rtc);
313 return err;
314 }
315
316 err = request_threaded_irq(irq, NULL, rtc_alarm_handler, 0,
317 "ab8500-rtc", rtc);
318 if (err < 0) {
319 rtc_device_unregister(rtc);
320 return err;
321 }
322
323 platform_set_drvdata(pdev, rtc);
324
325 return 0;
326}
327
328static int __devexit ab8500_rtc_remove(struct platform_device *pdev)
329{
330 struct rtc_device *rtc = platform_get_drvdata(pdev);
331 int irq = platform_get_irq_byname(pdev, "ALARM");
332
333 free_irq(irq, rtc);
334 rtc_device_unregister(rtc);
335 platform_set_drvdata(pdev, NULL);
336
337 return 0;
338}
339
340static struct platform_driver ab8500_rtc_driver = {
341 .driver = {
342 .name = "ab8500-rtc",
343 .owner = THIS_MODULE,
344 },
345 .probe = ab8500_rtc_probe,
346 .remove = __devexit_p(ab8500_rtc_remove),
347};
348
349static int __init ab8500_rtc_init(void)
350{
351 return platform_driver_register(&ab8500_rtc_driver);
352}
353
354static void __exit ab8500_rtc_exit(void)
355{
356 platform_driver_unregister(&ab8500_rtc_driver);
357}
358
359module_init(ab8500_rtc_init);
360module_exit(ab8500_rtc_exit);
361MODULE_AUTHOR("Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>");
362MODULE_DESCRIPTION("AB8500 RTC Driver");
363MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index e9aa814ddd23..11b8ea29d2b7 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -238,31 +238,32 @@ static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
238 rtc_control = CMOS_READ(RTC_CONTROL); 238 rtc_control = CMOS_READ(RTC_CONTROL);
239 spin_unlock_irq(&rtc_lock); 239 spin_unlock_irq(&rtc_lock);
240 240
241 /* REVISIT this assumes PC style usage: always BCD */ 241 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
242 242 if (((unsigned)t->time.tm_sec) < 0x60)
243 if (((unsigned)t->time.tm_sec) < 0x60) 243 t->time.tm_sec = bcd2bin(t->time.tm_sec);
244 t->time.tm_sec = bcd2bin(t->time.tm_sec);
245 else
246 t->time.tm_sec = -1;
247 if (((unsigned)t->time.tm_min) < 0x60)
248 t->time.tm_min = bcd2bin(t->time.tm_min);
249 else
250 t->time.tm_min = -1;
251 if (((unsigned)t->time.tm_hour) < 0x24)
252 t->time.tm_hour = bcd2bin(t->time.tm_hour);
253 else
254 t->time.tm_hour = -1;
255
256 if (cmos->day_alrm) {
257 if (((unsigned)t->time.tm_mday) <= 0x31)
258 t->time.tm_mday = bcd2bin(t->time.tm_mday);
259 else 244 else
260 t->time.tm_mday = -1; 245 t->time.tm_sec = -1;
261 if (cmos->mon_alrm) { 246 if (((unsigned)t->time.tm_min) < 0x60)
262 if (((unsigned)t->time.tm_mon) <= 0x12) 247 t->time.tm_min = bcd2bin(t->time.tm_min);
263 t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1; 248 else
249 t->time.tm_min = -1;
250 if (((unsigned)t->time.tm_hour) < 0x24)
251 t->time.tm_hour = bcd2bin(t->time.tm_hour);
252 else
253 t->time.tm_hour = -1;
254
255 if (cmos->day_alrm) {
256 if (((unsigned)t->time.tm_mday) <= 0x31)
257 t->time.tm_mday = bcd2bin(t->time.tm_mday);
264 else 258 else
265 t->time.tm_mon = -1; 259 t->time.tm_mday = -1;
260
261 if (cmos->mon_alrm) {
262 if (((unsigned)t->time.tm_mon) <= 0x12)
263 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
264 else
265 t->time.tm_mon = -1;
266 }
266 } 267 }
267 } 268 }
268 t->time.tm_year = -1; 269 t->time.tm_year = -1;
@@ -322,29 +323,26 @@ static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
322static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 323static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
323{ 324{
324 struct cmos_rtc *cmos = dev_get_drvdata(dev); 325 struct cmos_rtc *cmos = dev_get_drvdata(dev);
325 unsigned char mon, mday, hrs, min, sec; 326 unsigned char mon, mday, hrs, min, sec, rtc_control;
326 327
327 if (!is_valid_irq(cmos->irq)) 328 if (!is_valid_irq(cmos->irq))
328 return -EIO; 329 return -EIO;
329 330
330 /* REVISIT this assumes PC style usage: always BCD */
331
332 /* Writing 0xff means "don't care" or "match all". */
333
334 mon = t->time.tm_mon + 1; 331 mon = t->time.tm_mon + 1;
335 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
336
337 mday = t->time.tm_mday; 332 mday = t->time.tm_mday;
338 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
339
340 hrs = t->time.tm_hour; 333 hrs = t->time.tm_hour;
341 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
342
343 min = t->time.tm_min; 334 min = t->time.tm_min;
344 min = (min < 60) ? bin2bcd(min) : 0xff;
345
346 sec = t->time.tm_sec; 335 sec = t->time.tm_sec;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 336
337 rtc_control = CMOS_READ(RTC_CONTROL);
338 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
339 /* Writing 0xff means "don't care" or "match all". */
340 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
341 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
342 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
343 min = (min < 60) ? bin2bcd(min) : 0xff;
344 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
345 }
348 346
349 spin_lock_irq(&rtc_lock); 347 spin_lock_irq(&rtc_lock);
350 348
@@ -478,7 +476,7 @@ static int cmos_procfs(struct device *dev, struct seq_file *seq)
478 "update_IRQ\t: %s\n" 476 "update_IRQ\t: %s\n"
479 "HPET_emulated\t: %s\n" 477 "HPET_emulated\t: %s\n"
480 // "square_wave\t: %s\n" 478 // "square_wave\t: %s\n"
481 // "BCD\t\t: %s\n" 479 "BCD\t\t: %s\n"
482 "DST_enable\t: %s\n" 480 "DST_enable\t: %s\n"
483 "periodic_freq\t: %d\n" 481 "periodic_freq\t: %d\n"
484 "batt_status\t: %s\n", 482 "batt_status\t: %s\n",
@@ -486,7 +484,7 @@ static int cmos_procfs(struct device *dev, struct seq_file *seq)
486 (rtc_control & RTC_UIE) ? "yes" : "no", 484 (rtc_control & RTC_UIE) ? "yes" : "no",
487 is_hpet_enabled() ? "yes" : "no", 485 is_hpet_enabled() ? "yes" : "no",
488 // (rtc_control & RTC_SQWE) ? "yes" : "no", 486 // (rtc_control & RTC_SQWE) ? "yes" : "no",
489 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 487 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
490 (rtc_control & RTC_DST_EN) ? "yes" : "no", 488 (rtc_control & RTC_DST_EN) ? "yes" : "no",
491 cmos->rtc->irq_freq, 489 cmos->rtc->irq_freq,
492 (valid & RTC_VRT) ? "okay" : "dead"); 490 (valid & RTC_VRT) ? "okay" : "dead");
@@ -519,7 +517,8 @@ static const struct rtc_class_ops cmos_rtc_ops = {
519#define NVRAM_OFFSET (RTC_REG_D + 1) 517#define NVRAM_OFFSET (RTC_REG_D + 1)
520 518
521static ssize_t 519static ssize_t
522cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr, 520cmos_nvram_read(struct file *filp, struct kobject *kobj,
521 struct bin_attribute *attr,
523 char *buf, loff_t off, size_t count) 522 char *buf, loff_t off, size_t count)
524{ 523{
525 int retval; 524 int retval;
@@ -547,7 +546,8 @@ cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
547} 546}
548 547
549static ssize_t 548static ssize_t
550cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr, 549cmos_nvram_write(struct file *filp, struct kobject *kobj,
550 struct bin_attribute *attr,
551 char *buf, loff_t off, size_t count) 551 char *buf, loff_t off, size_t count)
552{ 552{
553 struct cmos_rtc *cmos; 553 struct cmos_rtc *cmos;
@@ -719,6 +719,9 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
719 } 719 }
720 } 720 }
721 721
722 cmos_rtc.dev = dev;
723 dev_set_drvdata(dev, &cmos_rtc);
724
722 cmos_rtc.rtc = rtc_device_register(driver_name, dev, 725 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
723 &cmos_rtc_ops, THIS_MODULE); 726 &cmos_rtc_ops, THIS_MODULE);
724 if (IS_ERR(cmos_rtc.rtc)) { 727 if (IS_ERR(cmos_rtc.rtc)) {
@@ -726,8 +729,6 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
726 goto cleanup0; 729 goto cleanup0;
727 } 730 }
728 731
729 cmos_rtc.dev = dev;
730 dev_set_drvdata(dev, &cmos_rtc);
731 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 732 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
732 733
733 spin_lock_irq(&rtc_lock); 734 spin_lock_irq(&rtc_lock);
@@ -749,12 +750,11 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
749 750
750 spin_unlock_irq(&rtc_lock); 751 spin_unlock_irq(&rtc_lock);
751 752
752 /* FIXME teach the alarm code how to handle binary mode; 753 /* FIXME:
753 * <asm-generic/rtc.h> doesn't know 12-hour mode either. 754 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
754 */ 755 */
755 if (is_valid_irq(rtc_irq) && 756 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
756 (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) { 757 dev_warn(dev, "only 24-hr supported\n");
757 dev_dbg(dev, "only 24-hr BCD mode supported\n");
758 retval = -ENXIO; 758 retval = -ENXIO;
759 goto cleanup1; 759 goto cleanup1;
760 } 760 }
diff --git a/drivers/rtc/rtc-davinci.c b/drivers/rtc/rtc-davinci.c
new file mode 100644
index 000000000000..92a8f6cacda9
--- /dev/null
+++ b/drivers/rtc/rtc-davinci.c
@@ -0,0 +1,673 @@
1/*
2 * DaVinci Power Management and Real Time Clock Driver for TI platforms
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc
5 *
6 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/spinlock.h>
28#include <linux/rtc.h>
29#include <linux/bcd.h>
30#include <linux/platform_device.h>
31#include <linux/io.h>
32
33/*
34 * The DaVinci RTC is a simple RTC with the following
35 * Sec: 0 - 59 : BCD count
36 * Min: 0 - 59 : BCD count
37 * Hour: 0 - 23 : BCD count
38 * Day: 0 - 0x7FFF(32767) : Binary count ( Over 89 years )
39 */
40
41/* PRTC interface registers */
42#define DAVINCI_PRTCIF_PID 0x00
43#define PRTCIF_CTLR 0x04
44#define PRTCIF_LDATA 0x08
45#define PRTCIF_UDATA 0x0C
46#define PRTCIF_INTEN 0x10
47#define PRTCIF_INTFLG 0x14
48
49/* PRTCIF_CTLR bit fields */
50#define PRTCIF_CTLR_BUSY BIT(31)
51#define PRTCIF_CTLR_SIZE BIT(25)
52#define PRTCIF_CTLR_DIR BIT(24)
53#define PRTCIF_CTLR_BENU_MSB BIT(23)
54#define PRTCIF_CTLR_BENU_3RD_BYTE BIT(22)
55#define PRTCIF_CTLR_BENU_2ND_BYTE BIT(21)
56#define PRTCIF_CTLR_BENU_LSB BIT(20)
57#define PRTCIF_CTLR_BENU_MASK (0x00F00000)
58#define PRTCIF_CTLR_BENL_MSB BIT(19)
59#define PRTCIF_CTLR_BENL_3RD_BYTE BIT(18)
60#define PRTCIF_CTLR_BENL_2ND_BYTE BIT(17)
61#define PRTCIF_CTLR_BENL_LSB BIT(16)
62#define PRTCIF_CTLR_BENL_MASK (0x000F0000)
63
64/* PRTCIF_INTEN bit fields */
65#define PRTCIF_INTEN_RTCSS BIT(1)
66#define PRTCIF_INTEN_RTCIF BIT(0)
67#define PRTCIF_INTEN_MASK (PRTCIF_INTEN_RTCSS \
68 | PRTCIF_INTEN_RTCIF)
69
70/* PRTCIF_INTFLG bit fields */
71#define PRTCIF_INTFLG_RTCSS BIT(1)
72#define PRTCIF_INTFLG_RTCIF BIT(0)
73#define PRTCIF_INTFLG_MASK (PRTCIF_INTFLG_RTCSS \
74 | PRTCIF_INTFLG_RTCIF)
75
76/* PRTC subsystem registers */
77#define PRTCSS_RTC_INTC_EXTENA1 (0x0C)
78#define PRTCSS_RTC_CTRL (0x10)
79#define PRTCSS_RTC_WDT (0x11)
80#define PRTCSS_RTC_TMR0 (0x12)
81#define PRTCSS_RTC_TMR1 (0x13)
82#define PRTCSS_RTC_CCTRL (0x14)
83#define PRTCSS_RTC_SEC (0x15)
84#define PRTCSS_RTC_MIN (0x16)
85#define PRTCSS_RTC_HOUR (0x17)
86#define PRTCSS_RTC_DAY0 (0x18)
87#define PRTCSS_RTC_DAY1 (0x19)
88#define PRTCSS_RTC_AMIN (0x1A)
89#define PRTCSS_RTC_AHOUR (0x1B)
90#define PRTCSS_RTC_ADAY0 (0x1C)
91#define PRTCSS_RTC_ADAY1 (0x1D)
92#define PRTCSS_RTC_CLKC_CNT (0x20)
93
94/* PRTCSS_RTC_INTC_EXTENA1 */
95#define PRTCSS_RTC_INTC_EXTENA1_MASK (0x07)
96
97/* PRTCSS_RTC_CTRL bit fields */
98#define PRTCSS_RTC_CTRL_WDTBUS BIT(7)
99#define PRTCSS_RTC_CTRL_WEN BIT(6)
100#define PRTCSS_RTC_CTRL_WDRT BIT(5)
101#define PRTCSS_RTC_CTRL_WDTFLG BIT(4)
102#define PRTCSS_RTC_CTRL_TE BIT(3)
103#define PRTCSS_RTC_CTRL_TIEN BIT(2)
104#define PRTCSS_RTC_CTRL_TMRFLG BIT(1)
105#define PRTCSS_RTC_CTRL_TMMD BIT(0)
106
107/* PRTCSS_RTC_CCTRL bit fields */
108#define PRTCSS_RTC_CCTRL_CALBUSY BIT(7)
109#define PRTCSS_RTC_CCTRL_DAEN BIT(5)
110#define PRTCSS_RTC_CCTRL_HAEN BIT(4)
111#define PRTCSS_RTC_CCTRL_MAEN BIT(3)
112#define PRTCSS_RTC_CCTRL_ALMFLG BIT(2)
113#define PRTCSS_RTC_CCTRL_AIEN BIT(1)
114#define PRTCSS_RTC_CCTRL_CAEN BIT(0)
115
116static DEFINE_SPINLOCK(davinci_rtc_lock);
117
118struct davinci_rtc {
119 struct rtc_device *rtc;
120 void __iomem *base;
121 resource_size_t pbase;
122 size_t base_size;
123 int irq;
124};
125
126static inline void rtcif_write(struct davinci_rtc *davinci_rtc,
127 u32 val, u32 addr)
128{
129 writel(val, davinci_rtc->base + addr);
130}
131
132static inline u32 rtcif_read(struct davinci_rtc *davinci_rtc, u32 addr)
133{
134 return readl(davinci_rtc->base + addr);
135}
136
137static inline void rtcif_wait(struct davinci_rtc *davinci_rtc)
138{
139 while (rtcif_read(davinci_rtc, PRTCIF_CTLR) & PRTCIF_CTLR_BUSY)
140 cpu_relax();
141}
142
143static inline void rtcss_write(struct davinci_rtc *davinci_rtc,
144 unsigned long val, u8 addr)
145{
146 rtcif_wait(davinci_rtc);
147
148 rtcif_write(davinci_rtc, PRTCIF_CTLR_BENL_LSB | addr, PRTCIF_CTLR);
149 rtcif_write(davinci_rtc, val, PRTCIF_LDATA);
150
151 rtcif_wait(davinci_rtc);
152}
153
154static inline u8 rtcss_read(struct davinci_rtc *davinci_rtc, u8 addr)
155{
156 rtcif_wait(davinci_rtc);
157
158 rtcif_write(davinci_rtc, PRTCIF_CTLR_DIR | PRTCIF_CTLR_BENL_LSB | addr,
159 PRTCIF_CTLR);
160
161 rtcif_wait(davinci_rtc);
162
163 return rtcif_read(davinci_rtc, PRTCIF_LDATA);
164}
165
166static inline void davinci_rtcss_calendar_wait(struct davinci_rtc *davinci_rtc)
167{
168 while (rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) &
169 PRTCSS_RTC_CCTRL_CALBUSY)
170 cpu_relax();
171}
172
173static irqreturn_t davinci_rtc_interrupt(int irq, void *class_dev)
174{
175 struct davinci_rtc *davinci_rtc = class_dev;
176 unsigned long events = 0;
177 u32 irq_flg;
178 u8 alm_irq, tmr_irq;
179 u8 rtc_ctrl, rtc_cctrl;
180 int ret = IRQ_NONE;
181
182 irq_flg = rtcif_read(davinci_rtc, PRTCIF_INTFLG) &
183 PRTCIF_INTFLG_RTCSS;
184
185 alm_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) &
186 PRTCSS_RTC_CCTRL_ALMFLG;
187
188 tmr_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL) &
189 PRTCSS_RTC_CTRL_TMRFLG;
190
191 if (irq_flg) {
192 if (alm_irq) {
193 events |= RTC_IRQF | RTC_AF;
194 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
195 rtc_cctrl |= PRTCSS_RTC_CCTRL_ALMFLG;
196 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
197 } else if (tmr_irq) {
198 events |= RTC_IRQF | RTC_PF;
199 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
200 rtc_ctrl |= PRTCSS_RTC_CTRL_TMRFLG;
201 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
202 }
203
204 rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS,
205 PRTCIF_INTFLG);
206 rtc_update_irq(davinci_rtc->rtc, 1, events);
207
208 ret = IRQ_HANDLED;
209 }
210
211 return ret;
212}
213
214static int
215davinci_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
216{
217 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
218 u8 rtc_ctrl;
219 unsigned long flags;
220 int ret = 0;
221
222 spin_lock_irqsave(&davinci_rtc_lock, flags);
223
224 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
225
226 switch (cmd) {
227 case RTC_WIE_ON:
228 rtc_ctrl |= PRTCSS_RTC_CTRL_WEN | PRTCSS_RTC_CTRL_WDTFLG;
229 break;
230 case RTC_WIE_OFF:
231 rtc_ctrl &= ~PRTCSS_RTC_CTRL_WEN;
232 break;
233 case RTC_UIE_OFF:
234 case RTC_UIE_ON:
235 ret = -ENOTTY;
236 break;
237 default:
238 ret = -ENOIOCTLCMD;
239 }
240
241 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
242
243 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
244
245 return ret;
246}
247
248static int convertfromdays(u16 days, struct rtc_time *tm)
249{
250 int tmp_days, year, mon;
251
252 for (year = 2000;; year++) {
253 tmp_days = rtc_year_days(1, 12, year);
254 if (days >= tmp_days)
255 days -= tmp_days;
256 else {
257 for (mon = 0;; mon++) {
258 tmp_days = rtc_month_days(mon, year);
259 if (days >= tmp_days) {
260 days -= tmp_days;
261 } else {
262 tm->tm_year = year - 1900;
263 tm->tm_mon = mon;
264 tm->tm_mday = days + 1;
265 break;
266 }
267 }
268 break;
269 }
270 }
271 return 0;
272}
273
274static int convert2days(u16 *days, struct rtc_time *tm)
275{
276 int i;
277 *days = 0;
278
279 /* epoch == 1900 */
280 if (tm->tm_year < 100 || tm->tm_year > 199)
281 return -EINVAL;
282
283 for (i = 2000; i < 1900 + tm->tm_year; i++)
284 *days += rtc_year_days(1, 12, i);
285
286 *days += rtc_year_days(tm->tm_mday, tm->tm_mon, 1900 + tm->tm_year);
287
288 return 0;
289}
290
291static int davinci_rtc_read_time(struct device *dev, struct rtc_time *tm)
292{
293 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
294 u16 days = 0;
295 u8 day0, day1;
296 unsigned long flags;
297
298 spin_lock_irqsave(&davinci_rtc_lock, flags);
299
300 davinci_rtcss_calendar_wait(davinci_rtc);
301 tm->tm_sec = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_SEC));
302
303 davinci_rtcss_calendar_wait(davinci_rtc);
304 tm->tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_MIN));
305
306 davinci_rtcss_calendar_wait(davinci_rtc);
307 tm->tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_HOUR));
308
309 davinci_rtcss_calendar_wait(davinci_rtc);
310 day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY0);
311
312 davinci_rtcss_calendar_wait(davinci_rtc);
313 day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY1);
314
315 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
316
317 days |= day1;
318 days <<= 8;
319 days |= day0;
320
321 if (convertfromdays(days, tm) < 0)
322 return -EINVAL;
323
324 return 0;
325}
326
327static int davinci_rtc_set_time(struct device *dev, struct rtc_time *tm)
328{
329 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
330 u16 days;
331 u8 rtc_cctrl;
332 unsigned long flags;
333
334 if (convert2days(&days, tm) < 0)
335 return -EINVAL;
336
337 spin_lock_irqsave(&davinci_rtc_lock, flags);
338
339 davinci_rtcss_calendar_wait(davinci_rtc);
340 rtcss_write(davinci_rtc, bin2bcd(tm->tm_sec), PRTCSS_RTC_SEC);
341
342 davinci_rtcss_calendar_wait(davinci_rtc);
343 rtcss_write(davinci_rtc, bin2bcd(tm->tm_min), PRTCSS_RTC_MIN);
344
345 davinci_rtcss_calendar_wait(davinci_rtc);
346 rtcss_write(davinci_rtc, bin2bcd(tm->tm_hour), PRTCSS_RTC_HOUR);
347
348 davinci_rtcss_calendar_wait(davinci_rtc);
349 rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_DAY0);
350
351 davinci_rtcss_calendar_wait(davinci_rtc);
352 rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_DAY1);
353
354 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
355 rtc_cctrl |= PRTCSS_RTC_CCTRL_CAEN;
356 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
357
358 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
359
360 return 0;
361}
362
363static int davinci_rtc_alarm_irq_enable(struct device *dev,
364 unsigned int enabled)
365{
366 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
367 unsigned long flags;
368 u8 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL);
369
370 spin_lock_irqsave(&davinci_rtc_lock, flags);
371
372 if (enabled)
373 rtc_cctrl |= PRTCSS_RTC_CCTRL_DAEN |
374 PRTCSS_RTC_CCTRL_HAEN |
375 PRTCSS_RTC_CCTRL_MAEN |
376 PRTCSS_RTC_CCTRL_ALMFLG |
377 PRTCSS_RTC_CCTRL_AIEN;
378 else
379 rtc_cctrl &= ~PRTCSS_RTC_CCTRL_AIEN;
380
381 davinci_rtcss_calendar_wait(davinci_rtc);
382 rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL);
383
384 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
385
386 return 0;
387}
388
389static int davinci_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
390{
391 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
392 u16 days = 0;
393 u8 day0, day1;
394 unsigned long flags;
395
396 spin_lock_irqsave(&davinci_rtc_lock, flags);
397
398 davinci_rtcss_calendar_wait(davinci_rtc);
399 alm->time.tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AMIN));
400
401 davinci_rtcss_calendar_wait(davinci_rtc);
402 alm->time.tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AHOUR));
403
404 davinci_rtcss_calendar_wait(davinci_rtc);
405 day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY0);
406
407 davinci_rtcss_calendar_wait(davinci_rtc);
408 day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY1);
409
410 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
411 days |= day1;
412 days <<= 8;
413 days |= day0;
414
415 if (convertfromdays(days, &alm->time) < 0)
416 return -EINVAL;
417
418 alm->pending = !!(rtcss_read(davinci_rtc,
419 PRTCSS_RTC_CCTRL) &
420 PRTCSS_RTC_CCTRL_AIEN);
421 alm->enabled = alm->pending && device_may_wakeup(dev);
422
423 return 0;
424}
425
426static int davinci_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
427{
428 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
429 unsigned long flags;
430 u16 days;
431
432 if (alm->time.tm_mday <= 0 && alm->time.tm_mon < 0
433 && alm->time.tm_year < 0) {
434 struct rtc_time tm;
435 unsigned long now, then;
436
437 davinci_rtc_read_time(dev, &tm);
438 rtc_tm_to_time(&tm, &now);
439
440 alm->time.tm_mday = tm.tm_mday;
441 alm->time.tm_mon = tm.tm_mon;
442 alm->time.tm_year = tm.tm_year;
443 rtc_tm_to_time(&alm->time, &then);
444
445 if (then < now) {
446 rtc_time_to_tm(now + 24 * 60 * 60, &tm);
447 alm->time.tm_mday = tm.tm_mday;
448 alm->time.tm_mon = tm.tm_mon;
449 alm->time.tm_year = tm.tm_year;
450 }
451 }
452
453 if (convert2days(&days, &alm->time) < 0)
454 return -EINVAL;
455
456 spin_lock_irqsave(&davinci_rtc_lock, flags);
457
458 davinci_rtcss_calendar_wait(davinci_rtc);
459 rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_min), PRTCSS_RTC_AMIN);
460
461 davinci_rtcss_calendar_wait(davinci_rtc);
462 rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_hour), PRTCSS_RTC_AHOUR);
463
464 davinci_rtcss_calendar_wait(davinci_rtc);
465 rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_ADAY0);
466
467 davinci_rtcss_calendar_wait(davinci_rtc);
468 rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_ADAY1);
469
470 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
471
472 return 0;
473}
474
475static int davinci_rtc_irq_set_state(struct device *dev, int enabled)
476{
477 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
478 unsigned long flags;
479 u8 rtc_ctrl;
480
481 spin_lock_irqsave(&davinci_rtc_lock, flags);
482
483 rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
484
485 if (enabled) {
486 while (rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL)
487 & PRTCSS_RTC_CTRL_WDTBUS)
488 cpu_relax();
489
490 rtc_ctrl |= PRTCSS_RTC_CTRL_TE;
491 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
492
493 rtcss_write(davinci_rtc, 0x0, PRTCSS_RTC_CLKC_CNT);
494
495 rtc_ctrl |= PRTCSS_RTC_CTRL_TIEN |
496 PRTCSS_RTC_CTRL_TMMD |
497 PRTCSS_RTC_CTRL_TMRFLG;
498 } else
499 rtc_ctrl &= ~PRTCSS_RTC_CTRL_TIEN;
500
501 rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
502
503 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
504
505 return 0;
506}
507
508static int davinci_rtc_irq_set_freq(struct device *dev, int freq)
509{
510 struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
511 unsigned long flags;
512 u16 tmr_counter = (0x8000 >> (ffs(freq) - 1));
513
514 spin_lock_irqsave(&davinci_rtc_lock, flags);
515
516 rtcss_write(davinci_rtc, tmr_counter & 0xFF, PRTCSS_RTC_TMR0);
517 rtcss_write(davinci_rtc, (tmr_counter & 0xFF00) >> 8, PRTCSS_RTC_TMR1);
518
519 spin_unlock_irqrestore(&davinci_rtc_lock, flags);
520
521 return 0;
522}
523
524static struct rtc_class_ops davinci_rtc_ops = {
525 .ioctl = davinci_rtc_ioctl,
526 .read_time = davinci_rtc_read_time,
527 .set_time = davinci_rtc_set_time,
528 .alarm_irq_enable = davinci_rtc_alarm_irq_enable,
529 .read_alarm = davinci_rtc_read_alarm,
530 .set_alarm = davinci_rtc_set_alarm,
531 .irq_set_state = davinci_rtc_irq_set_state,
532 .irq_set_freq = davinci_rtc_irq_set_freq,
533};
534
535static int __init davinci_rtc_probe(struct platform_device *pdev)
536{
537 struct device *dev = &pdev->dev;
538 struct davinci_rtc *davinci_rtc;
539 struct resource *res, *mem;
540 int ret = 0;
541
542 davinci_rtc = kzalloc(sizeof(struct davinci_rtc), GFP_KERNEL);
543 if (!davinci_rtc) {
544 dev_dbg(dev, "could not allocate memory for private data\n");
545 return -ENOMEM;
546 }
547
548 davinci_rtc->irq = platform_get_irq(pdev, 0);
549 if (davinci_rtc->irq < 0) {
550 dev_err(dev, "no RTC irq\n");
551 ret = davinci_rtc->irq;
552 goto fail1;
553 }
554
555 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
556 if (!res) {
557 dev_err(dev, "no mem resource\n");
558 ret = -EINVAL;
559 goto fail1;
560 }
561
562 davinci_rtc->pbase = res->start;
563 davinci_rtc->base_size = resource_size(res);
564
565 mem = request_mem_region(davinci_rtc->pbase, davinci_rtc->base_size,
566 pdev->name);
567 if (!mem) {
568 dev_err(dev, "RTC registers at %08x are not free\n",
569 davinci_rtc->pbase);
570 ret = -EBUSY;
571 goto fail1;
572 }
573
574 davinci_rtc->base = ioremap(davinci_rtc->pbase, davinci_rtc->base_size);
575 if (!davinci_rtc->base) {
576 dev_err(dev, "unable to ioremap MEM resource\n");
577 ret = -ENOMEM;
578 goto fail2;
579 }
580
581 davinci_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
582 &davinci_rtc_ops, THIS_MODULE);
583 if (IS_ERR(davinci_rtc->rtc)) {
584 dev_err(dev, "unable to register RTC device, err %ld\n",
585 PTR_ERR(davinci_rtc->rtc));
586 goto fail3;
587 }
588
589 rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS, PRTCIF_INTFLG);
590 rtcif_write(davinci_rtc, 0, PRTCIF_INTEN);
591 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_INTC_EXTENA1);
592
593 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CTRL);
594 rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CCTRL);
595
596 ret = request_irq(davinci_rtc->irq, davinci_rtc_interrupt,
597 IRQF_DISABLED, "davinci_rtc", davinci_rtc);
598 if (ret < 0) {
599 dev_err(dev, "unable to register davinci RTC interrupt\n");
600 goto fail4;
601 }
602
603 /* Enable interrupts */
604 rtcif_write(davinci_rtc, PRTCIF_INTEN_RTCSS, PRTCIF_INTEN);
605 rtcss_write(davinci_rtc, PRTCSS_RTC_INTC_EXTENA1_MASK,
606 PRTCSS_RTC_INTC_EXTENA1);
607
608 rtcss_write(davinci_rtc, PRTCSS_RTC_CCTRL_CAEN, PRTCSS_RTC_CCTRL);
609
610 platform_set_drvdata(pdev, davinci_rtc);
611
612 device_init_wakeup(&pdev->dev, 0);
613
614 return 0;
615
616fail4:
617 rtc_device_unregister(davinci_rtc->rtc);
618fail3:
619 iounmap(davinci_rtc->base);
620fail2:
621 release_mem_region(davinci_rtc->pbase, davinci_rtc->base_size);
622fail1:
623 kfree(davinci_rtc);
624
625 return ret;
626}
627
628static int __devexit davinci_rtc_remove(struct platform_device *pdev)
629{
630 struct davinci_rtc *davinci_rtc = platform_get_drvdata(pdev);
631
632 device_init_wakeup(&pdev->dev, 0);
633
634 rtcif_write(davinci_rtc, 0, PRTCIF_INTEN);
635
636 free_irq(davinci_rtc->irq, davinci_rtc);
637
638 rtc_device_unregister(davinci_rtc->rtc);
639
640 iounmap(davinci_rtc->base);
641 release_mem_region(davinci_rtc->pbase, davinci_rtc->base_size);
642
643 platform_set_drvdata(pdev, NULL);
644
645 kfree(davinci_rtc);
646
647 return 0;
648}
649
650static struct platform_driver davinci_rtc_driver = {
651 .probe = davinci_rtc_probe,
652 .remove = __devexit_p(davinci_rtc_remove),
653 .driver = {
654 .name = "rtc_davinci",
655 .owner = THIS_MODULE,
656 },
657};
658
659static int __init rtc_init(void)
660{
661 return platform_driver_probe(&davinci_rtc_driver, davinci_rtc_probe);
662}
663module_init(rtc_init);
664
665static void __exit rtc_exit(void)
666{
667 platform_driver_unregister(&davinci_rtc_driver);
668}
669module_exit(rtc_exit);
670
671MODULE_AUTHOR("Miguel Aguilar <miguel.aguilar@ridgerun.com>");
672MODULE_DESCRIPTION("Texas Instruments DaVinci PRTC Driver");
673MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c
index 532acf9b05d8..359d1e04626c 100644
--- a/drivers/rtc/rtc-ds1302.c
+++ b/drivers/rtc/rtc-ds1302.c
@@ -16,7 +16,6 @@
16#include <linux/rtc.h> 16#include <linux/rtc.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/bcd.h> 18#include <linux/bcd.h>
19#include <asm/rtc.h>
20 19
21#define DRV_NAME "rtc-ds1302" 20#define DRV_NAME "rtc-ds1302"
22#define DRV_VERSION "0.1.1" 21#define DRV_VERSION "0.1.1"
@@ -34,14 +33,55 @@
34#define RTC_ADDR_MIN 0x01 /* Address of minute register */ 33#define RTC_ADDR_MIN 0x01 /* Address of minute register */
35#define RTC_ADDR_SEC 0x00 /* Address of second register */ 34#define RTC_ADDR_SEC 0x00 /* Address of second register */
36 35
36#ifdef CONFIG_SH_SECUREEDGE5410
37#include <asm/rtc.h>
38#include <mach/snapgear.h>
39
37#define RTC_RESET 0x1000 40#define RTC_RESET 0x1000
38#define RTC_IODATA 0x0800 41#define RTC_IODATA 0x0800
39#define RTC_SCLK 0x0400 42#define RTC_SCLK 0x0400
40 43
41#ifdef CONFIG_SH_SECUREEDGE5410
42#include <mach/snapgear.h>
43#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00) 44#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
44#define get_dp() SECUREEDGE_READ_IOPORT() 45#define get_dp() SECUREEDGE_READ_IOPORT()
46#define ds1302_set_tx()
47#define ds1302_set_rx()
48
49static inline int ds1302_hw_init(void)
50{
51 return 0;
52}
53
54static inline void ds1302_reset(void)
55{
56 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
57}
58
59static inline void ds1302_clock(void)
60{
61 set_dp(get_dp() | RTC_SCLK); /* clock high */
62 set_dp(get_dp() & ~RTC_SCLK); /* clock low */
63}
64
65static inline void ds1302_start(void)
66{
67 set_dp(get_dp() | RTC_RESET);
68}
69
70static inline void ds1302_stop(void)
71{
72 set_dp(get_dp() & ~RTC_RESET);
73}
74
75static inline void ds1302_txbit(int bit)
76{
77 set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
78}
79
80static inline int ds1302_rxbit(void)
81{
82 return !!(get_dp() & RTC_IODATA);
83}
84
45#else 85#else
46#error "Add support for your platform" 86#error "Add support for your platform"
47#endif 87#endif
@@ -50,11 +90,11 @@ static void ds1302_sendbits(unsigned int val)
50{ 90{
51 int i; 91 int i;
52 92
93 ds1302_set_tx();
94
53 for (i = 8; (i); i--, val >>= 1) { 95 for (i = 8; (i); i--, val >>= 1) {
54 set_dp((get_dp() & ~RTC_IODATA) | ((val & 0x1) ? 96 ds1302_txbit(val & 0x1);
55 RTC_IODATA : 0)); 97 ds1302_clock();
56 set_dp(get_dp() | RTC_SCLK); /* clock high */
57 set_dp(get_dp() & ~RTC_SCLK); /* clock low */
58 } 98 }
59} 99}
60 100
@@ -63,10 +103,11 @@ static unsigned int ds1302_recvbits(void)
63 unsigned int val; 103 unsigned int val;
64 int i; 104 int i;
65 105
106 ds1302_set_rx();
107
66 for (i = 0, val = 0; (i < 8); i++) { 108 for (i = 0, val = 0; (i < 8); i++) {
67 val |= (((get_dp() & RTC_IODATA) ? 1 : 0) << i); 109 val |= (ds1302_rxbit() << i);
68 set_dp(get_dp() | RTC_SCLK); /* clock high */ 110 ds1302_clock();
69 set_dp(get_dp() & ~RTC_SCLK); /* clock low */
70 } 111 }
71 112
72 return val; 113 return val;
@@ -76,23 +117,24 @@ static unsigned int ds1302_readbyte(unsigned int addr)
76{ 117{
77 unsigned int val; 118 unsigned int val;
78 119
79 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 120 ds1302_reset();
80 121
81 set_dp(get_dp() | RTC_RESET); 122 ds1302_start();
82 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ); 123 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
83 val = ds1302_recvbits(); 124 val = ds1302_recvbits();
84 set_dp(get_dp() & ~RTC_RESET); 125 ds1302_stop();
85 126
86 return val; 127 return val;
87} 128}
88 129
89static void ds1302_writebyte(unsigned int addr, unsigned int val) 130static void ds1302_writebyte(unsigned int addr, unsigned int val)
90{ 131{
91 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 132 ds1302_reset();
92 set_dp(get_dp() | RTC_RESET); 133
134 ds1302_start();
93 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE); 135 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
94 ds1302_sendbits(val); 136 ds1302_sendbits(val);
95 set_dp(get_dp() & ~RTC_RESET); 137 ds1302_stop();
96} 138}
97 139
98static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) 140static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
@@ -167,13 +209,20 @@ static int __init ds1302_rtc_probe(struct platform_device *pdev)
167{ 209{
168 struct rtc_device *rtc; 210 struct rtc_device *rtc;
169 211
212 if (ds1302_hw_init()) {
213 dev_err(&pdev->dev, "Failed to init communication channel");
214 return -EINVAL;
215 }
216
170 /* Reset */ 217 /* Reset */
171 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 218 ds1302_reset();
172 219
173 /* Write a magic value to the DS1302 RAM, and see if it sticks. */ 220 /* Write a magic value to the DS1302 RAM, and see if it sticks. */
174 ds1302_writebyte(RTC_ADDR_RAM0, 0x42); 221 ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
175 if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) 222 if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
223 dev_err(&pdev->dev, "Failed to probe");
176 return -ENODEV; 224 return -ENODEV;
225 }
177 226
178 rtc = rtc_device_register("ds1302", &pdev->dev, 227 rtc = rtc_device_register("ds1302", &pdev->dev,
179 &ds1302_rtc_ops, THIS_MODULE); 228 &ds1302_rtc_ops, THIS_MODULE);
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index 7836c9cec557..48da85e97ca4 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -542,7 +542,8 @@ static void msg_init(struct spi_message *m, struct spi_transfer *x,
542} 542}
543 543
544static ssize_t 544static ssize_t
545ds1305_nvram_read(struct kobject *kobj, struct bin_attribute *attr, 545ds1305_nvram_read(struct file *filp, struct kobject *kobj,
546 struct bin_attribute *attr,
546 char *buf, loff_t off, size_t count) 547 char *buf, loff_t off, size_t count)
547{ 548{
548 struct spi_device *spi; 549 struct spi_device *spi;
@@ -572,7 +573,8 @@ ds1305_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
572} 573}
573 574
574static ssize_t 575static ssize_t
575ds1305_nvram_write(struct kobject *kobj, struct bin_attribute *attr, 576ds1305_nvram_write(struct file *filp, struct kobject *kobj,
577 struct bin_attribute *attr,
576 char *buf, loff_t off, size_t count) 578 char *buf, loff_t off, size_t count)
577{ 579{
578 struct spi_device *spi; 580 struct spi_device *spi;
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index c4ec5c158aa1..de033b7ac21f 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -556,7 +556,8 @@ static const struct rtc_class_ops ds13xx_rtc_ops = {
556#define NVRAM_SIZE 56 556#define NVRAM_SIZE 56
557 557
558static ssize_t 558static ssize_t
559ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr, 559ds1307_nvram_read(struct file *filp, struct kobject *kobj,
560 struct bin_attribute *attr,
560 char *buf, loff_t off, size_t count) 561 char *buf, loff_t off, size_t count)
561{ 562{
562 struct i2c_client *client; 563 struct i2c_client *client;
@@ -580,7 +581,8 @@ ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
580} 581}
581 582
582static ssize_t 583static ssize_t
583ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr, 584ds1307_nvram_write(struct file *filp, struct kobject *kobj,
585 struct bin_attribute *attr,
584 char *buf, loff_t off, size_t count) 586 char *buf, loff_t off, size_t count)
585{ 587{
586 struct i2c_client *client; 588 struct i2c_client *client;
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c
index 06b8566c4532..37268e97de49 100644
--- a/drivers/rtc/rtc-ds1511.c
+++ b/drivers/rtc/rtc-ds1511.c
@@ -423,8 +423,9 @@ static const struct rtc_class_ops ds1511_rtc_ops = {
423}; 423};
424 424
425 static ssize_t 425 static ssize_t
426ds1511_nvram_read(struct kobject *kobj, struct bin_attribute *ba, 426ds1511_nvram_read(struct file *filp, struct kobject *kobj,
427 char *buf, loff_t pos, size_t size) 427 struct bin_attribute *ba,
428 char *buf, loff_t pos, size_t size)
428{ 429{
429 ssize_t count; 430 ssize_t count;
430 431
@@ -452,8 +453,9 @@ ds1511_nvram_read(struct kobject *kobj, struct bin_attribute *ba,
452} 453}
453 454
454 static ssize_t 455 static ssize_t
455ds1511_nvram_write(struct kobject *kobj, struct bin_attribute *bin_attr, 456ds1511_nvram_write(struct file *filp, struct kobject *kobj,
456 char *buf, loff_t pos, size_t size) 457 struct bin_attribute *bin_attr,
458 char *buf, loff_t pos, size_t size)
457{ 459{
458 ssize_t count; 460 ssize_t count;
459 461
diff --git a/drivers/rtc/rtc-ds1553.c b/drivers/rtc/rtc-ds1553.c
index 244f9994bcbb..ff432e2ca275 100644
--- a/drivers/rtc/rtc-ds1553.c
+++ b/drivers/rtc/rtc-ds1553.c
@@ -252,7 +252,7 @@ static const struct rtc_class_ops ds1553_rtc_ops = {
252 .update_irq_enable = ds1553_rtc_update_irq_enable, 252 .update_irq_enable = ds1553_rtc_update_irq_enable,
253}; 253};
254 254
255static ssize_t ds1553_nvram_read(struct kobject *kobj, 255static ssize_t ds1553_nvram_read(struct file *filp, struct kobject *kobj,
256 struct bin_attribute *bin_attr, 256 struct bin_attribute *bin_attr,
257 char *buf, loff_t pos, size_t size) 257 char *buf, loff_t pos, size_t size)
258{ 258{
@@ -267,7 +267,7 @@ static ssize_t ds1553_nvram_read(struct kobject *kobj,
267 return count; 267 return count;
268} 268}
269 269
270static ssize_t ds1553_nvram_write(struct kobject *kobj, 270static ssize_t ds1553_nvram_write(struct file *filp, struct kobject *kobj,
271 struct bin_attribute *bin_attr, 271 struct bin_attribute *bin_attr,
272 char *buf, loff_t pos, size_t size) 272 char *buf, loff_t pos, size_t size)
273{ 273{
diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c
index 2b4b0bc42d6f..042630c90dd3 100644
--- a/drivers/rtc/rtc-ds1742.c
+++ b/drivers/rtc/rtc-ds1742.c
@@ -128,7 +128,7 @@ static const struct rtc_class_ops ds1742_rtc_ops = {
128 .set_time = ds1742_rtc_set_time, 128 .set_time = ds1742_rtc_set_time,
129}; 129};
130 130
131static ssize_t ds1742_nvram_read(struct kobject *kobj, 131static ssize_t ds1742_nvram_read(struct file *filp, struct kobject *kobj,
132 struct bin_attribute *bin_attr, 132 struct bin_attribute *bin_attr,
133 char *buf, loff_t pos, size_t size) 133 char *buf, loff_t pos, size_t size)
134{ 134{
@@ -143,7 +143,7 @@ static ssize_t ds1742_nvram_read(struct kobject *kobj,
143 return count; 143 return count;
144} 144}
145 145
146static ssize_t ds1742_nvram_write(struct kobject *kobj, 146static ssize_t ds1742_nvram_write(struct file *filp, struct kobject *kobj,
147 struct bin_attribute *bin_attr, 147 struct bin_attribute *bin_attr,
148 char *buf, loff_t pos, size_t size) 148 char *buf, loff_t pos, size_t size)
149{ 149{
diff --git a/drivers/rtc/rtc-isl1208.c b/drivers/rtc/rtc-isl1208.c
index 054e05294af8..468200c38ecb 100644
--- a/drivers/rtc/rtc-isl1208.c
+++ b/drivers/rtc/rtc-isl1208.c
@@ -462,39 +462,16 @@ isl1208_sysfs_store_usr(struct device *dev,
462static DEVICE_ATTR(usr, S_IRUGO | S_IWUSR, isl1208_sysfs_show_usr, 462static DEVICE_ATTR(usr, S_IRUGO | S_IWUSR, isl1208_sysfs_show_usr,
463 isl1208_sysfs_store_usr); 463 isl1208_sysfs_store_usr);
464 464
465static int 465static struct attribute *isl1208_rtc_attrs[] = {
466isl1208_sysfs_register(struct device *dev) 466 &dev_attr_atrim.attr,
467{ 467 &dev_attr_dtrim.attr,
468 int err; 468 &dev_attr_usr.attr,
469 469 NULL
470 err = device_create_file(dev, &dev_attr_atrim); 470};
471 if (err)
472 return err;
473
474 err = device_create_file(dev, &dev_attr_dtrim);
475 if (err) {
476 device_remove_file(dev, &dev_attr_atrim);
477 return err;
478 }
479
480 err = device_create_file(dev, &dev_attr_usr);
481 if (err) {
482 device_remove_file(dev, &dev_attr_atrim);
483 device_remove_file(dev, &dev_attr_dtrim);
484 }
485
486 return 0;
487}
488
489static int
490isl1208_sysfs_unregister(struct device *dev)
491{
492 device_remove_file(dev, &dev_attr_dtrim);
493 device_remove_file(dev, &dev_attr_atrim);
494 device_remove_file(dev, &dev_attr_usr);
495 471
496 return 0; 472static const struct attribute_group isl1208_rtc_sysfs_files = {
497} 473 .attrs = isl1208_rtc_attrs,
474};
498 475
499static int 476static int
500isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) 477isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
@@ -529,7 +506,7 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id)
529 dev_warn(&client->dev, "rtc power failure detected, " 506 dev_warn(&client->dev, "rtc power failure detected, "
530 "please set clock.\n"); 507 "please set clock.\n");
531 508
532 rc = isl1208_sysfs_register(&client->dev); 509 rc = sysfs_create_group(&client->dev.kobj, &isl1208_rtc_sysfs_files);
533 if (rc) 510 if (rc)
534 goto exit_unregister; 511 goto exit_unregister;
535 512
@@ -546,7 +523,7 @@ isl1208_remove(struct i2c_client *client)
546{ 523{
547 struct rtc_device *rtc = i2c_get_clientdata(client); 524 struct rtc_device *rtc = i2c_get_clientdata(client);
548 525
549 isl1208_sysfs_unregister(&client->dev); 526 sysfs_remove_group(&client->dev.kobj, &isl1208_rtc_sysfs_files);
550 rtc_device_unregister(rtc); 527 rtc_device_unregister(rtc);
551 528
552 return 0; 529 return 0;
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c
index 60fe266f0f49..6dc4e6241418 100644
--- a/drivers/rtc/rtc-m41t80.c
+++ b/drivers/rtc/rtc-m41t80.c
@@ -595,10 +595,6 @@ static void wdt_disable(void)
595static ssize_t wdt_write(struct file *file, const char __user *buf, 595static ssize_t wdt_write(struct file *file, const char __user *buf,
596 size_t count, loff_t *ppos) 596 size_t count, loff_t *ppos)
597{ 597{
598 /* Can't seek (pwrite) on this device
599 if (ppos != &file->f_pos)
600 return -ESPIPE;
601 */
602 if (count) { 598 if (count) {
603 wdt_ping(); 599 wdt_ping();
604 return 1; 600 return 1;
@@ -623,7 +619,7 @@ static ssize_t wdt_read(struct file *file, char __user *buf,
623 * according to their available features. We only actually usefully support 619 * according to their available features. We only actually usefully support
624 * querying capabilities and current status. 620 * querying capabilities and current status.
625 */ 621 */
626static int wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, 622static int wdt_ioctl(struct file *file, unsigned int cmd,
627 unsigned long arg) 623 unsigned long arg)
628{ 624{
629 int new_margin, rv; 625 int new_margin, rv;
@@ -676,6 +672,18 @@ static int wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
676 return -ENOTTY; 672 return -ENOTTY;
677} 673}
678 674
675static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
676 unsigned long arg)
677{
678 int ret;
679
680 lock_kernel();
681 ret = wdt_ioctl(file, cmd, arg);
682 unlock_kernel();
683
684 return ret;
685}
686
679/** 687/**
680 * wdt_open: 688 * wdt_open:
681 * @inode: inode of device 689 * @inode: inode of device
@@ -695,7 +703,7 @@ static int wdt_open(struct inode *inode, struct file *file)
695 */ 703 */
696 wdt_is_open = 1; 704 wdt_is_open = 1;
697 unlock_kernel(); 705 unlock_kernel();
698 return 0; 706 return nonseekable_open(inode, file);
699 } 707 }
700 return -ENODEV; 708 return -ENODEV;
701} 709}
@@ -736,7 +744,7 @@ static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
736static const struct file_operations wdt_fops = { 744static const struct file_operations wdt_fops = {
737 .owner = THIS_MODULE, 745 .owner = THIS_MODULE,
738 .read = wdt_read, 746 .read = wdt_read,
739 .ioctl = wdt_ioctl, 747 .unlocked_ioctl = wdt_unlocked_ioctl,
740 .write = wdt_write, 748 .write = wdt_write,
741 .open = wdt_open, 749 .open = wdt_open,
742 .release = wdt_release, 750 .release = wdt_release,
diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c
index 365ff3ac2348..be8359fdb65a 100644
--- a/drivers/rtc/rtc-m48t59.c
+++ b/drivers/rtc/rtc-m48t59.c
@@ -343,7 +343,7 @@ static const struct rtc_class_ops m48t02_rtc_ops = {
343 .set_time = m48t59_rtc_set_time, 343 .set_time = m48t59_rtc_set_time,
344}; 344};
345 345
346static ssize_t m48t59_nvram_read(struct kobject *kobj, 346static ssize_t m48t59_nvram_read(struct file *filp, struct kobject *kobj,
347 struct bin_attribute *bin_attr, 347 struct bin_attribute *bin_attr,
348 char *buf, loff_t pos, size_t size) 348 char *buf, loff_t pos, size_t size)
349{ 349{
@@ -363,7 +363,7 @@ static ssize_t m48t59_nvram_read(struct kobject *kobj,
363 return cnt; 363 return cnt;
364} 364}
365 365
366static ssize_t m48t59_nvram_write(struct kobject *kobj, 366static ssize_t m48t59_nvram_write(struct file *filp, struct kobject *kobj,
367 struct bin_attribute *bin_attr, 367 struct bin_attribute *bin_attr,
368 char *buf, loff_t pos, size_t size) 368 char *buf, loff_t pos, size_t size)
369{ 369{
diff --git a/drivers/rtc/rtc-mxc.c b/drivers/rtc/rtc-mxc.c
index d71fe61db1d6..25ec921db07c 100644
--- a/drivers/rtc/rtc-mxc.c
+++ b/drivers/rtc/rtc-mxc.c
@@ -379,7 +379,6 @@ static struct rtc_class_ops mxc_rtc_ops = {
379 379
380static int __init mxc_rtc_probe(struct platform_device *pdev) 380static int __init mxc_rtc_probe(struct platform_device *pdev)
381{ 381{
382 struct clk *clk;
383 struct resource *res; 382 struct resource *res;
384 struct rtc_device *rtc; 383 struct rtc_device *rtc;
385 struct rtc_plat_data *pdata = NULL; 384 struct rtc_plat_data *pdata = NULL;
@@ -402,14 +401,15 @@ static int __init mxc_rtc_probe(struct platform_device *pdev)
402 pdata->ioaddr = devm_ioremap(&pdev->dev, res->start, 401 pdata->ioaddr = devm_ioremap(&pdev->dev, res->start,
403 resource_size(res)); 402 resource_size(res));
404 403
405 clk = clk_get(&pdev->dev, "ckil"); 404 pdata->clk = clk_get(&pdev->dev, "rtc");
406 if (IS_ERR(clk)) { 405 if (IS_ERR(pdata->clk)) {
407 ret = PTR_ERR(clk); 406 dev_err(&pdev->dev, "unable to get clock!\n");
407 ret = PTR_ERR(pdata->clk);
408 goto exit_free_pdata; 408 goto exit_free_pdata;
409 } 409 }
410 410
411 rate = clk_get_rate(clk); 411 clk_enable(pdata->clk);
412 clk_put(clk); 412 rate = clk_get_rate(pdata->clk);
413 413
414 if (rate == 32768) 414 if (rate == 32768)
415 reg = RTC_INPUT_CLK_32768HZ; 415 reg = RTC_INPUT_CLK_32768HZ;
@@ -420,7 +420,7 @@ static int __init mxc_rtc_probe(struct platform_device *pdev)
420 else { 420 else {
421 dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate); 421 dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate);
422 ret = -EINVAL; 422 ret = -EINVAL;
423 goto exit_free_pdata; 423 goto exit_put_clk;
424 } 424 }
425 425
426 reg |= RTC_ENABLE_BIT; 426 reg |= RTC_ENABLE_BIT;
@@ -428,18 +428,9 @@ static int __init mxc_rtc_probe(struct platform_device *pdev)
428 if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) { 428 if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) {
429 dev_err(&pdev->dev, "hardware module can't be enabled!\n"); 429 dev_err(&pdev->dev, "hardware module can't be enabled!\n");
430 ret = -EIO; 430 ret = -EIO;
431 goto exit_free_pdata; 431 goto exit_put_clk;
432 }
433
434 pdata->clk = clk_get(&pdev->dev, "rtc");
435 if (IS_ERR(pdata->clk)) {
436 dev_err(&pdev->dev, "unable to get clock!\n");
437 ret = PTR_ERR(pdata->clk);
438 goto exit_free_pdata;
439 } 432 }
440 433
441 clk_enable(pdata->clk);
442
443 rtc = rtc_device_register(pdev->name, &pdev->dev, &mxc_rtc_ops, 434 rtc = rtc_device_register(pdev->name, &pdev->dev, &mxc_rtc_ops,
444 THIS_MODULE); 435 THIS_MODULE);
445 if (IS_ERR(rtc)) { 436 if (IS_ERR(rtc)) {
diff --git a/drivers/rtc/rtc-rx8581.c b/drivers/rtc/rtc-rx8581.c
index c9522f3bc21c..9718aaaa8215 100644
--- a/drivers/rtc/rtc-rx8581.c
+++ b/drivers/rtc/rtc-rx8581.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * An I2C driver for the Epson RX8581 RTC 2 * An I2C driver for the Epson RX8581 RTC
3 * 3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com> 4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. 5 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -272,7 +272,7 @@ static void __exit rx8581_exit(void)
272 i2c_del_driver(&rx8581_driver); 272 i2c_del_driver(&rx8581_driver);
273} 273}
274 274
275MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com>"); 275MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com>");
276MODULE_DESCRIPTION("Epson RX-8581 RTC driver"); 276MODULE_DESCRIPTION("Epson RX-8581 RTC driver");
277MODULE_LICENSE("GPL"); 277MODULE_LICENSE("GPL");
278MODULE_VERSION(DRV_VERSION); 278MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 4969b6059c89..e5972b2c17b7 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -29,6 +29,11 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <plat/regs-rtc.h> 30#include <plat/regs-rtc.h>
31 31
32enum s3c_cpu_type {
33 TYPE_S3C2410,
34 TYPE_S3C64XX,
35};
36
32/* I have yet to find an S3C implementation with more than one 37/* I have yet to find an S3C implementation with more than one
33 * of these rtc blocks in */ 38 * of these rtc blocks in */
34 39
@@ -37,6 +42,7 @@ static struct resource *s3c_rtc_mem;
37static void __iomem *s3c_rtc_base; 42static void __iomem *s3c_rtc_base;
38static int s3c_rtc_alarmno = NO_IRQ; 43static int s3c_rtc_alarmno = NO_IRQ;
39static int s3c_rtc_tickno = NO_IRQ; 44static int s3c_rtc_tickno = NO_IRQ;
45static enum s3c_cpu_type s3c_rtc_cpu_type;
40 46
41static DEFINE_SPINLOCK(s3c_rtc_pie_lock); 47static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
42 48
@@ -80,12 +86,25 @@ static int s3c_rtc_setpie(struct device *dev, int enabled)
80 pr_debug("%s: pie=%d\n", __func__, enabled); 86 pr_debug("%s: pie=%d\n", __func__, enabled);
81 87
82 spin_lock_irq(&s3c_rtc_pie_lock); 88 spin_lock_irq(&s3c_rtc_pie_lock);
83 tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE;
84 89
85 if (enabled) 90 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
86 tmp |= S3C2410_TICNT_ENABLE; 91 tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
92 tmp &= ~S3C64XX_RTCCON_TICEN;
93
94 if (enabled)
95 tmp |= S3C64XX_RTCCON_TICEN;
96
97 writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
98 } else {
99 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
100 tmp &= ~S3C2410_TICNT_ENABLE;
101
102 if (enabled)
103 tmp |= S3C2410_TICNT_ENABLE;
104
105 writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
106 }
87 107
88 writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
89 spin_unlock_irq(&s3c_rtc_pie_lock); 108 spin_unlock_irq(&s3c_rtc_pie_lock);
90 109
91 return 0; 110 return 0;
@@ -93,15 +112,21 @@ static int s3c_rtc_setpie(struct device *dev, int enabled)
93 112
94static int s3c_rtc_setfreq(struct device *dev, int freq) 113static int s3c_rtc_setfreq(struct device *dev, int freq)
95{ 114{
96 unsigned int tmp; 115 struct platform_device *pdev = to_platform_device(dev);
116 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
117 unsigned int tmp = 0;
97 118
98 if (!is_power_of_2(freq)) 119 if (!is_power_of_2(freq))
99 return -EINVAL; 120 return -EINVAL;
100 121
101 spin_lock_irq(&s3c_rtc_pie_lock); 122 spin_lock_irq(&s3c_rtc_pie_lock);
102 123
103 tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; 124 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
104 tmp |= (128 / freq)-1; 125 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
126 tmp &= S3C2410_TICNT_ENABLE;
127 }
128
129 tmp |= (rtc_dev->max_user_freq / freq)-1;
105 130
106 writeb(tmp, s3c_rtc_base + S3C2410_TICNT); 131 writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
107 spin_unlock_irq(&s3c_rtc_pie_lock); 132 spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -283,10 +308,17 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
283 308
284static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 309static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
285{ 310{
286 unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); 311 unsigned int ticnt;
287 312
288 seq_printf(seq, "periodic_IRQ\t: %s\n", 313 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
289 (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); 314 ticnt = readb(s3c_rtc_base + S3C2410_RTCCON);
315 ticnt &= S3C64XX_RTCCON_TICEN;
316 } else {
317 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
318 ticnt &= S3C2410_TICNT_ENABLE;
319 }
320
321 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
290 return 0; 322 return 0;
291} 323}
292 324
@@ -353,10 +385,16 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
353 385
354 if (!en) { 386 if (!en) {
355 tmp = readb(base + S3C2410_RTCCON); 387 tmp = readb(base + S3C2410_RTCCON);
356 writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); 388 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
357 389 tmp &= ~S3C64XX_RTCCON_TICEN;
358 tmp = readb(base + S3C2410_TICNT); 390 tmp &= ~S3C2410_RTCCON_RTCEN;
359 writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); 391 writeb(tmp, base + S3C2410_RTCCON);
392
393 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
394 tmp = readb(base + S3C2410_TICNT);
395 tmp &= ~S3C2410_TICNT_ENABLE;
396 writeb(tmp, base + S3C2410_TICNT);
397 }
360 } else { 398 } else {
361 /* re-enable the device, and check it is ok */ 399 /* re-enable the device, and check it is ok */
362 400
@@ -472,7 +510,12 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
472 goto err_nortc; 510 goto err_nortc;
473 } 511 }
474 512
475 rtc->max_user_freq = 128; 513 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
514 rtc->max_user_freq = 32768;
515 else
516 rtc->max_user_freq = 128;
517
518 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
476 519
477 platform_set_drvdata(pdev, rtc); 520 platform_set_drvdata(pdev, rtc);
478 return 0; 521 return 0;
@@ -492,20 +535,30 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
492 535
493/* RTC Power management control */ 536/* RTC Power management control */
494 537
495static int ticnt_save; 538static int ticnt_save, ticnt_en_save;
496 539
497static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) 540static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
498{ 541{
499 /* save TICNT for anyone using periodic interrupts */ 542 /* save TICNT for anyone using periodic interrupts */
500 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); 543 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
544 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
545 ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON);
546 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
547 }
501 s3c_rtc_enable(pdev, 0); 548 s3c_rtc_enable(pdev, 0);
502 return 0; 549 return 0;
503} 550}
504 551
505static int s3c_rtc_resume(struct platform_device *pdev) 552static int s3c_rtc_resume(struct platform_device *pdev)
506{ 553{
554 unsigned int tmp;
555
507 s3c_rtc_enable(pdev, 1); 556 s3c_rtc_enable(pdev, 1);
508 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); 557 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
558 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
559 tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
560 writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
561 }
509 return 0; 562 return 0;
510} 563}
511#else 564#else
@@ -513,13 +566,27 @@ static int s3c_rtc_resume(struct platform_device *pdev)
513#define s3c_rtc_resume NULL 566#define s3c_rtc_resume NULL
514#endif 567#endif
515 568
516static struct platform_driver s3c2410_rtc_driver = { 569static struct platform_device_id s3c_rtc_driver_ids[] = {
570 {
571 .name = "s3c2410-rtc",
572 .driver_data = TYPE_S3C2410,
573 }, {
574 .name = "s3c64xx-rtc",
575 .driver_data = TYPE_S3C64XX,
576 },
577 { }
578};
579
580MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
581
582static struct platform_driver s3c_rtc_driver = {
517 .probe = s3c_rtc_probe, 583 .probe = s3c_rtc_probe,
518 .remove = __devexit_p(s3c_rtc_remove), 584 .remove = __devexit_p(s3c_rtc_remove),
519 .suspend = s3c_rtc_suspend, 585 .suspend = s3c_rtc_suspend,
520 .resume = s3c_rtc_resume, 586 .resume = s3c_rtc_resume,
587 .id_table = s3c_rtc_driver_ids,
521 .driver = { 588 .driver = {
522 .name = "s3c2410-rtc", 589 .name = "s3c-rtc",
523 .owner = THIS_MODULE, 590 .owner = THIS_MODULE,
524 }, 591 },
525}; 592};
@@ -529,12 +596,12 @@ static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics
529static int __init s3c_rtc_init(void) 596static int __init s3c_rtc_init(void)
530{ 597{
531 printk(banner); 598 printk(banner);
532 return platform_driver_register(&s3c2410_rtc_driver); 599 return platform_driver_register(&s3c_rtc_driver);
533} 600}
534 601
535static void __exit s3c_rtc_exit(void) 602static void __exit s3c_rtc_exit(void)
536{ 603{
537 platform_driver_unregister(&s3c2410_rtc_driver); 604 platform_driver_unregister(&s3c_rtc_driver);
538} 605}
539 606
540module_init(s3c_rtc_init); 607module_init(s3c_rtc_init);
diff --git a/drivers/rtc/rtc-stk17ta8.c b/drivers/rtc/rtc-stk17ta8.c
index 875ba099e7a5..3b943673cd3e 100644
--- a/drivers/rtc/rtc-stk17ta8.c
+++ b/drivers/rtc/rtc-stk17ta8.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * A RTC driver for the Simtek STK17TA8 2 * A RTC driver for the Simtek STK17TA8
3 * 3 *
4 * By Thomas Hommel <thomas.hommel@gefanuc.com> 4 * By Thomas Hommel <thomas.hommel@ge.com>
5 * 5 *
6 * Based on the DS1553 driver from 6 * Based on the DS1553 driver from
7 * Atsushi Nemoto <anemo@mba.ocn.ne.jp> 7 * Atsushi Nemoto <anemo@mba.ocn.ne.jp>
@@ -244,7 +244,7 @@ static const struct rtc_class_ops stk17ta8_rtc_ops = {
244 .alarm_irq_enable = stk17ta8_rtc_alarm_irq_enable, 244 .alarm_irq_enable = stk17ta8_rtc_alarm_irq_enable,
245}; 245};
246 246
247static ssize_t stk17ta8_nvram_read(struct kobject *kobj, 247static ssize_t stk17ta8_nvram_read(struct file *filp, struct kobject *kobj,
248 struct bin_attribute *attr, char *buf, 248 struct bin_attribute *attr, char *buf,
249 loff_t pos, size_t size) 249 loff_t pos, size_t size)
250{ 250{
@@ -259,7 +259,7 @@ static ssize_t stk17ta8_nvram_read(struct kobject *kobj,
259 return count; 259 return count;
260} 260}
261 261
262static ssize_t stk17ta8_nvram_write(struct kobject *kobj, 262static ssize_t stk17ta8_nvram_write(struct file *filp, struct kobject *kobj,
263 struct bin_attribute *attr, char *buf, 263 struct bin_attribute *attr, char *buf,
264 loff_t pos, size_t size) 264 loff_t pos, size_t size)
265{ 265{
@@ -382,7 +382,7 @@ static __exit void stk17ta8_exit(void)
382module_init(stk17ta8_init); 382module_init(stk17ta8_init);
383module_exit(stk17ta8_exit); 383module_exit(stk17ta8_exit);
384 384
385MODULE_AUTHOR("Thomas Hommel <thomas.hommel@gefanuc.com>"); 385MODULE_AUTHOR("Thomas Hommel <thomas.hommel@ge.com>");
386MODULE_DESCRIPTION("Simtek STK17TA8 RTC driver"); 386MODULE_DESCRIPTION("Simtek STK17TA8 RTC driver");
387MODULE_LICENSE("GPL"); 387MODULE_LICENSE("GPL");
388MODULE_VERSION(DRV_VERSION); 388MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/rtc/rtc-tx4939.c b/drivers/rtc/rtc-tx4939.c
index 20bfc64a15c8..ec6313d15359 100644
--- a/drivers/rtc/rtc-tx4939.c
+++ b/drivers/rtc/rtc-tx4939.c
@@ -188,7 +188,7 @@ static const struct rtc_class_ops tx4939_rtc_ops = {
188 .alarm_irq_enable = tx4939_rtc_alarm_irq_enable, 188 .alarm_irq_enable = tx4939_rtc_alarm_irq_enable,
189}; 189};
190 190
191static ssize_t tx4939_rtc_nvram_read(struct kobject *kobj, 191static ssize_t tx4939_rtc_nvram_read(struct file *filp, struct kobject *kobj,
192 struct bin_attribute *bin_attr, 192 struct bin_attribute *bin_attr,
193 char *buf, loff_t pos, size_t size) 193 char *buf, loff_t pos, size_t size)
194{ 194{
@@ -207,7 +207,7 @@ static ssize_t tx4939_rtc_nvram_read(struct kobject *kobj,
207 return count; 207 return count;
208} 208}
209 209
210static ssize_t tx4939_rtc_nvram_write(struct kobject *kobj, 210static ssize_t tx4939_rtc_nvram_write(struct file *filp, struct kobject *kobj,
211 struct bin_attribute *bin_attr, 211 struct bin_attribute *bin_attr,
212 char *buf, loff_t pos, size_t size) 212 char *buf, loff_t pos, size_t size)
213{ 213{
diff --git a/drivers/rtc/rtc-wm831x.c b/drivers/rtc/rtc-wm831x.c
index b16cfe57a484..82931dc65c0b 100644
--- a/drivers/rtc/rtc-wm831x.c
+++ b/drivers/rtc/rtc-wm831x.c
@@ -449,17 +449,17 @@ static int wm831x_rtc_probe(struct platform_device *pdev)
449 goto err; 449 goto err;
450 } 450 }
451 451
452 ret = wm831x_request_irq(wm831x, per_irq, wm831x_per_irq, 452 ret = request_threaded_irq(per_irq, NULL, wm831x_per_irq,
453 IRQF_TRIGGER_RISING, "wm831x_rtc_per", 453 IRQF_TRIGGER_RISING, "RTC period",
454 wm831x_rtc); 454 wm831x_rtc);
455 if (ret != 0) { 455 if (ret != 0) {
456 dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n", 456 dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n",
457 per_irq, ret); 457 per_irq, ret);
458 } 458 }
459 459
460 ret = wm831x_request_irq(wm831x, alm_irq, wm831x_alm_irq, 460 ret = request_threaded_irq(alm_irq, NULL, wm831x_alm_irq,
461 IRQF_TRIGGER_RISING, "wm831x_rtc_alm", 461 IRQF_TRIGGER_RISING, "RTC alarm",
462 wm831x_rtc); 462 wm831x_rtc);
463 if (ret != 0) { 463 if (ret != 0) {
464 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", 464 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
465 alm_irq, ret); 465 alm_irq, ret);
@@ -478,8 +478,8 @@ static int __devexit wm831x_rtc_remove(struct platform_device *pdev)
478 int per_irq = platform_get_irq_byname(pdev, "PER"); 478 int per_irq = platform_get_irq_byname(pdev, "PER");
479 int alm_irq = platform_get_irq_byname(pdev, "ALM"); 479 int alm_irq = platform_get_irq_byname(pdev, "ALM");
480 480
481 wm831x_free_irq(wm831x_rtc->wm831x, alm_irq, wm831x_rtc); 481 free_irq(alm_irq, wm831x_rtc);
482 wm831x_free_irq(wm831x_rtc->wm831x, per_irq, wm831x_rtc); 482 free_irq(per_irq, wm831x_rtc);
483 rtc_device_unregister(wm831x_rtc->rtc); 483 rtc_device_unregister(wm831x_rtc->rtc);
484 kfree(wm831x_rtc); 484 kfree(wm831x_rtc);
485 485
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-16 04:38:13 -0500