diff options
Diffstat (limited to 'drivers/rtc')
-rw-r--r-- | drivers/rtc/Kconfig | 10 | ||||
-rw-r--r-- | drivers/rtc/Makefile | 1 | ||||
-rw-r--r-- | drivers/rtc/rtc-ds1374.c | 19 | ||||
-rw-r--r-- | drivers/rtc/rtc-ds1511.c | 2 | ||||
-rw-r--r-- | drivers/rtc/rtc-isl1208.c | 176 | ||||
-rw-r--r-- | drivers/rtc/rtc-tegra.c | 488 |
6 files changed, 684 insertions, 12 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 4941cade319f..e1878877399c 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -985,4 +985,14 @@ config RTC_DRV_LPC32XX | |||
985 | This driver can also be buillt as a module. If so, the module | 985 | This driver can also be buillt as a module. If so, the module |
986 | will be called rtc-lpc32xx. | 986 | will be called rtc-lpc32xx. |
987 | 987 | ||
988 | config RTC_DRV_TEGRA | ||
989 | tristate "NVIDIA Tegra Internal RTC driver" | ||
990 | depends on RTC_CLASS && ARCH_TEGRA | ||
991 | help | ||
992 | If you say yes here you get support for the | ||
993 | Tegra 200 series internal RTC module. | ||
994 | |||
995 | This drive can also be built as a module. If so, the module | ||
996 | will be called rtc-tegra. | ||
997 | |||
988 | endif # RTC_CLASS | 998 | endif # RTC_CLASS |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 5f6c3838dcf6..ca91c3c42e98 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
@@ -91,6 +91,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o | |||
91 | obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o | 91 | obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o |
92 | obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o | 92 | obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o |
93 | obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o | 93 | obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o |
94 | obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o | ||
94 | obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o | 95 | obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o |
95 | obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o | 96 | obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o |
96 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o | 97 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o |
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index d834a63ec4b0..e6e71deb188f 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/bcd.h> | 25 | #include <linux/bcd.h> |
26 | #include <linux/workqueue.h> | 26 | #include <linux/workqueue.h> |
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | #include <linux/pm.h> | ||
28 | 29 | ||
29 | #define DS1374_REG_TOD0 0x00 /* Time of Day */ | 30 | #define DS1374_REG_TOD0 0x00 /* Time of Day */ |
30 | #define DS1374_REG_TOD1 0x01 | 31 | #define DS1374_REG_TOD1 0x01 |
@@ -409,32 +410,38 @@ static int __devexit ds1374_remove(struct i2c_client *client) | |||
409 | } | 410 | } |
410 | 411 | ||
411 | #ifdef CONFIG_PM | 412 | #ifdef CONFIG_PM |
412 | static int ds1374_suspend(struct i2c_client *client, pm_message_t state) | 413 | static int ds1374_suspend(struct device *dev) |
413 | { | 414 | { |
415 | struct i2c_client *client = to_i2c_client(dev); | ||
416 | |||
414 | if (client->irq >= 0 && device_may_wakeup(&client->dev)) | 417 | if (client->irq >= 0 && device_may_wakeup(&client->dev)) |
415 | enable_irq_wake(client->irq); | 418 | enable_irq_wake(client->irq); |
416 | return 0; | 419 | return 0; |
417 | } | 420 | } |
418 | 421 | ||
419 | static int ds1374_resume(struct i2c_client *client) | 422 | static int ds1374_resume(struct device *dev) |
420 | { | 423 | { |
424 | struct i2c_client *client = to_i2c_client(dev); | ||
425 | |||
421 | if (client->irq >= 0 && device_may_wakeup(&client->dev)) | 426 | if (client->irq >= 0 && device_may_wakeup(&client->dev)) |
422 | disable_irq_wake(client->irq); | 427 | disable_irq_wake(client->irq); |
423 | return 0; | 428 | return 0; |
424 | } | 429 | } |
430 | |||
431 | static SIMPLE_DEV_PM_OPS(ds1374_pm, ds1374_suspend, ds1374_resume); | ||
432 | |||
433 | #define DS1374_PM (&ds1374_pm) | ||
425 | #else | 434 | #else |
426 | #define ds1374_suspend NULL | 435 | #define DS1374_PM NULL |
427 | #define ds1374_resume NULL | ||
428 | #endif | 436 | #endif |
429 | 437 | ||
430 | static struct i2c_driver ds1374_driver = { | 438 | static struct i2c_driver ds1374_driver = { |
431 | .driver = { | 439 | .driver = { |
432 | .name = "rtc-ds1374", | 440 | .name = "rtc-ds1374", |
433 | .owner = THIS_MODULE, | 441 | .owner = THIS_MODULE, |
442 | .pm = DS1374_PM, | ||
434 | }, | 443 | }, |
435 | .probe = ds1374_probe, | 444 | .probe = ds1374_probe, |
436 | .suspend = ds1374_suspend, | ||
437 | .resume = ds1374_resume, | ||
438 | .remove = __devexit_p(ds1374_remove), | 445 | .remove = __devexit_p(ds1374_remove), |
439 | .id_table = ds1374_id, | 446 | .id_table = ds1374_id, |
440 | }; | 447 | }; |
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c index 3fffd708711f..fbabc773dded 100644 --- a/drivers/rtc/rtc-ds1511.c +++ b/drivers/rtc/rtc-ds1511.c | |||
@@ -468,7 +468,7 @@ ds1511_nvram_write(struct file *filp, struct kobject *kobj, | |||
468 | static struct bin_attribute ds1511_nvram_attr = { | 468 | static struct bin_attribute ds1511_nvram_attr = { |
469 | .attr = { | 469 | .attr = { |
470 | .name = "nvram", | 470 | .name = "nvram", |
471 | .mode = S_IRUGO | S_IWUGO, | 471 | .mode = S_IRUGO | S_IWUSR, |
472 | }, | 472 | }, |
473 | .size = DS1511_RAM_MAX, | 473 | .size = DS1511_RAM_MAX, |
474 | .read = ds1511_nvram_read, | 474 | .read = ds1511_nvram_read, |
diff --git a/drivers/rtc/rtc-isl1208.c b/drivers/rtc/rtc-isl1208.c index 468200c38ecb..da8beb8cae51 100644 --- a/drivers/rtc/rtc-isl1208.c +++ b/drivers/rtc/rtc-isl1208.c | |||
@@ -39,6 +39,8 @@ | |||
39 | #define ISL1208_REG_SR_BAT (1<<1) /* battery */ | 39 | #define ISL1208_REG_SR_BAT (1<<1) /* battery */ |
40 | #define ISL1208_REG_SR_RTCF (1<<0) /* rtc fail */ | 40 | #define ISL1208_REG_SR_RTCF (1<<0) /* rtc fail */ |
41 | #define ISL1208_REG_INT 0x08 | 41 | #define ISL1208_REG_INT 0x08 |
42 | #define ISL1208_REG_INT_ALME (1<<6) /* alarm enable */ | ||
43 | #define ISL1208_REG_INT_IM (1<<7) /* interrupt/alarm mode */ | ||
42 | #define ISL1208_REG_09 0x09 /* reserved */ | 44 | #define ISL1208_REG_09 0x09 /* reserved */ |
43 | #define ISL1208_REG_ATR 0x0a | 45 | #define ISL1208_REG_ATR 0x0a |
44 | #define ISL1208_REG_DTR 0x0b | 46 | #define ISL1208_REG_DTR 0x0b |
@@ -202,6 +204,30 @@ isl1208_i2c_set_usr(struct i2c_client *client, u16 usr) | |||
202 | } | 204 | } |
203 | 205 | ||
204 | static int | 206 | static int |
207 | isl1208_rtc_toggle_alarm(struct i2c_client *client, int enable) | ||
208 | { | ||
209 | int icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); | ||
210 | |||
211 | if (icr < 0) { | ||
212 | dev_err(&client->dev, "%s: reading INT failed\n", __func__); | ||
213 | return icr; | ||
214 | } | ||
215 | |||
216 | if (enable) | ||
217 | icr |= ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM; | ||
218 | else | ||
219 | icr &= ~(ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM); | ||
220 | |||
221 | icr = i2c_smbus_write_byte_data(client, ISL1208_REG_INT, icr); | ||
222 | if (icr < 0) { | ||
223 | dev_err(&client->dev, "%s: writing INT failed\n", __func__); | ||
224 | return icr; | ||
225 | } | ||
226 | |||
227 | return 0; | ||
228 | } | ||
229 | |||
230 | static int | ||
205 | isl1208_rtc_proc(struct device *dev, struct seq_file *seq) | 231 | isl1208_rtc_proc(struct device *dev, struct seq_file *seq) |
206 | { | 232 | { |
207 | struct i2c_client *const client = to_i2c_client(dev); | 233 | struct i2c_client *const client = to_i2c_client(dev); |
@@ -288,9 +314,8 @@ isl1208_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) | |||
288 | { | 314 | { |
289 | struct rtc_time *const tm = &alarm->time; | 315 | struct rtc_time *const tm = &alarm->time; |
290 | u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, }; | 316 | u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, }; |
291 | int sr; | 317 | int icr, yr, sr = isl1208_i2c_get_sr(client); |
292 | 318 | ||
293 | sr = isl1208_i2c_get_sr(client); | ||
294 | if (sr < 0) { | 319 | if (sr < 0) { |
295 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | 320 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); |
296 | return sr; | 321 | return sr; |
@@ -313,6 +338,73 @@ isl1208_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) | |||
313 | bcd2bin(regs[ISL1208_REG_MOA - ISL1208_REG_SCA] & 0x1f) - 1; | 338 | bcd2bin(regs[ISL1208_REG_MOA - ISL1208_REG_SCA] & 0x1f) - 1; |
314 | tm->tm_wday = bcd2bin(regs[ISL1208_REG_DWA - ISL1208_REG_SCA] & 0x03); | 339 | tm->tm_wday = bcd2bin(regs[ISL1208_REG_DWA - ISL1208_REG_SCA] & 0x03); |
315 | 340 | ||
341 | /* The alarm doesn't store the year so get it from the rtc section */ | ||
342 | yr = i2c_smbus_read_byte_data(client, ISL1208_REG_YR); | ||
343 | if (yr < 0) { | ||
344 | dev_err(&client->dev, "%s: reading RTC YR failed\n", __func__); | ||
345 | return yr; | ||
346 | } | ||
347 | tm->tm_year = bcd2bin(yr) + 100; | ||
348 | |||
349 | icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); | ||
350 | if (icr < 0) { | ||
351 | dev_err(&client->dev, "%s: reading INT failed\n", __func__); | ||
352 | return icr; | ||
353 | } | ||
354 | alarm->enabled = !!(icr & ISL1208_REG_INT_ALME); | ||
355 | |||
356 | return 0; | ||
357 | } | ||
358 | |||
359 | static int | ||
360 | isl1208_i2c_set_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) | ||
361 | { | ||
362 | struct rtc_time *alarm_tm = &alarm->time; | ||
363 | u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, }; | ||
364 | const int offs = ISL1208_REG_SCA; | ||
365 | unsigned long rtc_secs, alarm_secs; | ||
366 | struct rtc_time rtc_tm; | ||
367 | int err, enable; | ||
368 | |||
369 | err = isl1208_i2c_read_time(client, &rtc_tm); | ||
370 | if (err) | ||
371 | return err; | ||
372 | err = rtc_tm_to_time(&rtc_tm, &rtc_secs); | ||
373 | if (err) | ||
374 | return err; | ||
375 | err = rtc_tm_to_time(alarm_tm, &alarm_secs); | ||
376 | if (err) | ||
377 | return err; | ||
378 | |||
379 | /* If the alarm time is before the current time disable the alarm */ | ||
380 | if (!alarm->enabled || alarm_secs <= rtc_secs) | ||
381 | enable = 0x00; | ||
382 | else | ||
383 | enable = 0x80; | ||
384 | |||
385 | /* Program the alarm and enable it for each setting */ | ||
386 | regs[ISL1208_REG_SCA - offs] = bin2bcd(alarm_tm->tm_sec) | enable; | ||
387 | regs[ISL1208_REG_MNA - offs] = bin2bcd(alarm_tm->tm_min) | enable; | ||
388 | regs[ISL1208_REG_HRA - offs] = bin2bcd(alarm_tm->tm_hour) | | ||
389 | ISL1208_REG_HR_MIL | enable; | ||
390 | |||
391 | regs[ISL1208_REG_DTA - offs] = bin2bcd(alarm_tm->tm_mday) | enable; | ||
392 | regs[ISL1208_REG_MOA - offs] = bin2bcd(alarm_tm->tm_mon + 1) | enable; | ||
393 | regs[ISL1208_REG_DWA - offs] = bin2bcd(alarm_tm->tm_wday & 7) | enable; | ||
394 | |||
395 | /* write ALARM registers */ | ||
396 | err = isl1208_i2c_set_regs(client, offs, regs, | ||
397 | ISL1208_ALARM_SECTION_LEN); | ||
398 | if (err < 0) { | ||
399 | dev_err(&client->dev, "%s: writing ALARM section failed\n", | ||
400 | __func__); | ||
401 | return err; | ||
402 | } | ||
403 | |||
404 | err = isl1208_rtc_toggle_alarm(client, enable); | ||
405 | if (err) | ||
406 | return err; | ||
407 | |||
316 | return 0; | 408 | return 0; |
317 | } | 409 | } |
318 | 410 | ||
@@ -391,12 +483,63 @@ isl1208_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |||
391 | return isl1208_i2c_read_alarm(to_i2c_client(dev), alarm); | 483 | return isl1208_i2c_read_alarm(to_i2c_client(dev), alarm); |
392 | } | 484 | } |
393 | 485 | ||
486 | static int | ||
487 | isl1208_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | ||
488 | { | ||
489 | return isl1208_i2c_set_alarm(to_i2c_client(dev), alarm); | ||
490 | } | ||
491 | |||
492 | static irqreturn_t | ||
493 | isl1208_rtc_interrupt(int irq, void *data) | ||
494 | { | ||
495 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | ||
496 | struct i2c_client *client = data; | ||
497 | int handled = 0, sr, err; | ||
498 | |||
499 | /* | ||
500 | * I2C reads get NAK'ed if we read straight away after an interrupt? | ||
501 | * Using a mdelay/msleep didn't seem to help either, so we work around | ||
502 | * this by continually trying to read the register for a short time. | ||
503 | */ | ||
504 | while (1) { | ||
505 | sr = isl1208_i2c_get_sr(client); | ||
506 | if (sr >= 0) | ||
507 | break; | ||
508 | |||
509 | if (time_after(jiffies, timeout)) { | ||
510 | dev_err(&client->dev, "%s: reading SR failed\n", | ||
511 | __func__); | ||
512 | return sr; | ||
513 | } | ||
514 | } | ||
515 | |||
516 | if (sr & ISL1208_REG_SR_ALM) { | ||
517 | dev_dbg(&client->dev, "alarm!\n"); | ||
518 | |||
519 | /* Clear the alarm */ | ||
520 | sr &= ~ISL1208_REG_SR_ALM; | ||
521 | sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR, sr); | ||
522 | if (sr < 0) | ||
523 | dev_err(&client->dev, "%s: writing SR failed\n", | ||
524 | __func__); | ||
525 | else | ||
526 | handled = 1; | ||
527 | |||
528 | /* Disable the alarm */ | ||
529 | err = isl1208_rtc_toggle_alarm(client, 0); | ||
530 | if (err) | ||
531 | return err; | ||
532 | } | ||
533 | |||
534 | return handled ? IRQ_HANDLED : IRQ_NONE; | ||
535 | } | ||
536 | |||
394 | static const struct rtc_class_ops isl1208_rtc_ops = { | 537 | static const struct rtc_class_ops isl1208_rtc_ops = { |
395 | .proc = isl1208_rtc_proc, | 538 | .proc = isl1208_rtc_proc, |
396 | .read_time = isl1208_rtc_read_time, | 539 | .read_time = isl1208_rtc_read_time, |
397 | .set_time = isl1208_rtc_set_time, | 540 | .set_time = isl1208_rtc_set_time, |
398 | .read_alarm = isl1208_rtc_read_alarm, | 541 | .read_alarm = isl1208_rtc_read_alarm, |
399 | /*.set_alarm = isl1208_rtc_set_alarm, */ | 542 | .set_alarm = isl1208_rtc_set_alarm, |
400 | }; | 543 | }; |
401 | 544 | ||
402 | /* sysfs interface */ | 545 | /* sysfs interface */ |
@@ -488,11 +631,29 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
488 | dev_info(&client->dev, | 631 | dev_info(&client->dev, |
489 | "chip found, driver version " DRV_VERSION "\n"); | 632 | "chip found, driver version " DRV_VERSION "\n"); |
490 | 633 | ||
634 | if (client->irq > 0) { | ||
635 | rc = request_threaded_irq(client->irq, NULL, | ||
636 | isl1208_rtc_interrupt, | ||
637 | IRQF_SHARED, | ||
638 | isl1208_driver.driver.name, client); | ||
639 | if (!rc) { | ||
640 | device_init_wakeup(&client->dev, 1); | ||
641 | enable_irq_wake(client->irq); | ||
642 | } else { | ||
643 | dev_err(&client->dev, | ||
644 | "Unable to request irq %d, no alarm support\n", | ||
645 | client->irq); | ||
646 | client->irq = 0; | ||
647 | } | ||
648 | } | ||
649 | |||
491 | rtc = rtc_device_register(isl1208_driver.driver.name, | 650 | rtc = rtc_device_register(isl1208_driver.driver.name, |
492 | &client->dev, &isl1208_rtc_ops, | 651 | &client->dev, &isl1208_rtc_ops, |
493 | THIS_MODULE); | 652 | THIS_MODULE); |
494 | if (IS_ERR(rtc)) | 653 | if (IS_ERR(rtc)) { |
495 | return PTR_ERR(rtc); | 654 | rc = PTR_ERR(rtc); |
655 | goto exit_free_irq; | ||
656 | } | ||
496 | 657 | ||
497 | i2c_set_clientdata(client, rtc); | 658 | i2c_set_clientdata(client, rtc); |
498 | 659 | ||
@@ -514,6 +675,9 @@ isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
514 | 675 | ||
515 | exit_unregister: | 676 | exit_unregister: |
516 | rtc_device_unregister(rtc); | 677 | rtc_device_unregister(rtc); |
678 | exit_free_irq: | ||
679 | if (client->irq) | ||
680 | free_irq(client->irq, client); | ||
517 | 681 | ||
518 | return rc; | 682 | return rc; |
519 | } | 683 | } |
@@ -525,6 +689,8 @@ isl1208_remove(struct i2c_client *client) | |||
525 | 689 | ||
526 | sysfs_remove_group(&client->dev.kobj, &isl1208_rtc_sysfs_files); | 690 | sysfs_remove_group(&client->dev.kobj, &isl1208_rtc_sysfs_files); |
527 | rtc_device_unregister(rtc); | 691 | rtc_device_unregister(rtc); |
692 | if (client->irq) | ||
693 | free_irq(client->irq, client); | ||
528 | 694 | ||
529 | return 0; | 695 | return 0; |
530 | } | 696 | } |
diff --git a/drivers/rtc/rtc-tegra.c b/drivers/rtc/rtc-tegra.c new file mode 100644 index 000000000000..2fc31aac3f4e --- /dev/null +++ b/drivers/rtc/rtc-tegra.c | |||
@@ -0,0 +1,488 @@ | |||
1 | /* | ||
2 | * An RTC driver for the NVIDIA Tegra 200 series internal RTC. | ||
3 | * | ||
4 | * Copyright (c) 2010, NVIDIA Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <linux/irq.h> | ||
25 | #include <linux/io.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <linux/rtc.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | |||
30 | /* set to 1 = busy every eight 32kHz clocks during copy of sec+msec to AHB */ | ||
31 | #define TEGRA_RTC_REG_BUSY 0x004 | ||
32 | #define TEGRA_RTC_REG_SECONDS 0x008 | ||
33 | /* when msec is read, the seconds are buffered into shadow seconds. */ | ||
34 | #define TEGRA_RTC_REG_SHADOW_SECONDS 0x00c | ||
35 | #define TEGRA_RTC_REG_MILLI_SECONDS 0x010 | ||
36 | #define TEGRA_RTC_REG_SECONDS_ALARM0 0x014 | ||
37 | #define TEGRA_RTC_REG_SECONDS_ALARM1 0x018 | ||
38 | #define TEGRA_RTC_REG_MILLI_SECONDS_ALARM0 0x01c | ||
39 | #define TEGRA_RTC_REG_INTR_MASK 0x028 | ||
40 | /* write 1 bits to clear status bits */ | ||
41 | #define TEGRA_RTC_REG_INTR_STATUS 0x02c | ||
42 | |||
43 | /* bits in INTR_MASK */ | ||
44 | #define TEGRA_RTC_INTR_MASK_MSEC_CDN_ALARM (1<<4) | ||
45 | #define TEGRA_RTC_INTR_MASK_SEC_CDN_ALARM (1<<3) | ||
46 | #define TEGRA_RTC_INTR_MASK_MSEC_ALARM (1<<2) | ||
47 | #define TEGRA_RTC_INTR_MASK_SEC_ALARM1 (1<<1) | ||
48 | #define TEGRA_RTC_INTR_MASK_SEC_ALARM0 (1<<0) | ||
49 | |||
50 | /* bits in INTR_STATUS */ | ||
51 | #define TEGRA_RTC_INTR_STATUS_MSEC_CDN_ALARM (1<<4) | ||
52 | #define TEGRA_RTC_INTR_STATUS_SEC_CDN_ALARM (1<<3) | ||
53 | #define TEGRA_RTC_INTR_STATUS_MSEC_ALARM (1<<2) | ||
54 | #define TEGRA_RTC_INTR_STATUS_SEC_ALARM1 (1<<1) | ||
55 | #define TEGRA_RTC_INTR_STATUS_SEC_ALARM0 (1<<0) | ||
56 | |||
57 | struct tegra_rtc_info { | ||
58 | struct platform_device *pdev; | ||
59 | struct rtc_device *rtc_dev; | ||
60 | void __iomem *rtc_base; /* NULL if not initialized. */ | ||
61 | int tegra_rtc_irq; /* alarm and periodic irq */ | ||
62 | spinlock_t tegra_rtc_lock; | ||
63 | }; | ||
64 | |||
65 | /* RTC hardware is busy when it is updating its values over AHB once | ||
66 | * every eight 32kHz clocks (~250uS). | ||
67 | * outside of these updates the CPU is free to write. | ||
68 | * CPU is always free to read. | ||
69 | */ | ||
70 | static inline u32 tegra_rtc_check_busy(struct tegra_rtc_info *info) | ||
71 | { | ||
72 | return readl(info->rtc_base + TEGRA_RTC_REG_BUSY) & 1; | ||
73 | } | ||
74 | |||
75 | /* Wait for hardware to be ready for writing. | ||
76 | * This function tries to maximize the amount of time before the next update. | ||
77 | * It does this by waiting for the RTC to become busy with its periodic update, | ||
78 | * then returning once the RTC first becomes not busy. | ||
79 | * This periodic update (where the seconds and milliseconds are copied to the | ||
80 | * AHB side) occurs every eight 32kHz clocks (~250uS). | ||
81 | * The behavior of this function allows us to make some assumptions without | ||
82 | * introducing a race, because 250uS is plenty of time to read/write a value. | ||
83 | */ | ||
84 | static int tegra_rtc_wait_while_busy(struct device *dev) | ||
85 | { | ||
86 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
87 | |||
88 | int retries = 500; /* ~490 us is the worst case, ~250 us is best. */ | ||
89 | |||
90 | /* first wait for the RTC to become busy. this is when it | ||
91 | * posts its updated seconds+msec registers to AHB side. */ | ||
92 | while (tegra_rtc_check_busy(info)) { | ||
93 | if (!retries--) | ||
94 | goto retry_failed; | ||
95 | udelay(1); | ||
96 | } | ||
97 | |||
98 | /* now we have about 250 us to manipulate registers */ | ||
99 | return 0; | ||
100 | |||
101 | retry_failed: | ||
102 | dev_err(dev, "write failed:retry count exceeded.\n"); | ||
103 | return -ETIMEDOUT; | ||
104 | } | ||
105 | |||
106 | static int tegra_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
107 | { | ||
108 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
109 | unsigned long sec, msec; | ||
110 | unsigned long sl_irq_flags; | ||
111 | |||
112 | /* RTC hardware copies seconds to shadow seconds when a read | ||
113 | * of milliseconds occurs. use a lock to keep other threads out. */ | ||
114 | spin_lock_irqsave(&info->tegra_rtc_lock, sl_irq_flags); | ||
115 | |||
116 | msec = readl(info->rtc_base + TEGRA_RTC_REG_MILLI_SECONDS); | ||
117 | sec = readl(info->rtc_base + TEGRA_RTC_REG_SHADOW_SECONDS); | ||
118 | |||
119 | spin_unlock_irqrestore(&info->tegra_rtc_lock, sl_irq_flags); | ||
120 | |||
121 | rtc_time_to_tm(sec, tm); | ||
122 | |||
123 | dev_vdbg(dev, "time read as %lu. %d/%d/%d %d:%02u:%02u\n", | ||
124 | sec, | ||
125 | tm->tm_mon + 1, | ||
126 | tm->tm_mday, | ||
127 | tm->tm_year + 1900, | ||
128 | tm->tm_hour, | ||
129 | tm->tm_min, | ||
130 | tm->tm_sec | ||
131 | ); | ||
132 | |||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | static int tegra_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
137 | { | ||
138 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
139 | unsigned long sec; | ||
140 | int ret; | ||
141 | |||
142 | /* convert tm to seconds. */ | ||
143 | ret = rtc_valid_tm(tm); | ||
144 | if (ret) | ||
145 | return ret; | ||
146 | |||
147 | rtc_tm_to_time(tm, &sec); | ||
148 | |||
149 | dev_vdbg(dev, "time set to %lu. %d/%d/%d %d:%02u:%02u\n", | ||
150 | sec, | ||
151 | tm->tm_mon+1, | ||
152 | tm->tm_mday, | ||
153 | tm->tm_year+1900, | ||
154 | tm->tm_hour, | ||
155 | tm->tm_min, | ||
156 | tm->tm_sec | ||
157 | ); | ||
158 | |||
159 | /* seconds only written if wait succeeded. */ | ||
160 | ret = tegra_rtc_wait_while_busy(dev); | ||
161 | if (!ret) | ||
162 | writel(sec, info->rtc_base + TEGRA_RTC_REG_SECONDS); | ||
163 | |||
164 | dev_vdbg(dev, "time read back as %d\n", | ||
165 | readl(info->rtc_base + TEGRA_RTC_REG_SECONDS)); | ||
166 | |||
167 | return ret; | ||
168 | } | ||
169 | |||
170 | static int tegra_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | ||
171 | { | ||
172 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
173 | unsigned long sec; | ||
174 | unsigned tmp; | ||
175 | |||
176 | sec = readl(info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0); | ||
177 | |||
178 | if (sec == 0) { | ||
179 | /* alarm is disabled. */ | ||
180 | alarm->enabled = 0; | ||
181 | alarm->time.tm_mon = -1; | ||
182 | alarm->time.tm_mday = -1; | ||
183 | alarm->time.tm_year = -1; | ||
184 | alarm->time.tm_hour = -1; | ||
185 | alarm->time.tm_min = -1; | ||
186 | alarm->time.tm_sec = -1; | ||
187 | } else { | ||
188 | /* alarm is enabled. */ | ||
189 | alarm->enabled = 1; | ||
190 | rtc_time_to_tm(sec, &alarm->time); | ||
191 | } | ||
192 | |||
193 | tmp = readl(info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); | ||
194 | alarm->pending = (tmp & TEGRA_RTC_INTR_STATUS_SEC_ALARM0) != 0; | ||
195 | |||
196 | return 0; | ||
197 | } | ||
198 | |||
199 | static int tegra_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
200 | { | ||
201 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
202 | unsigned status; | ||
203 | unsigned long sl_irq_flags; | ||
204 | |||
205 | tegra_rtc_wait_while_busy(dev); | ||
206 | spin_lock_irqsave(&info->tegra_rtc_lock, sl_irq_flags); | ||
207 | |||
208 | /* read the original value, and OR in the flag. */ | ||
209 | status = readl(info->rtc_base + TEGRA_RTC_REG_INTR_MASK); | ||
210 | if (enabled) | ||
211 | status |= TEGRA_RTC_INTR_MASK_SEC_ALARM0; /* set it */ | ||
212 | else | ||
213 | status &= ~TEGRA_RTC_INTR_MASK_SEC_ALARM0; /* clear it */ | ||
214 | |||
215 | writel(status, info->rtc_base + TEGRA_RTC_REG_INTR_MASK); | ||
216 | |||
217 | spin_unlock_irqrestore(&info->tegra_rtc_lock, sl_irq_flags); | ||
218 | |||
219 | return 0; | ||
220 | } | ||
221 | |||
222 | static int tegra_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | ||
223 | { | ||
224 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
225 | unsigned long sec; | ||
226 | |||
227 | if (alarm->enabled) | ||
228 | rtc_tm_to_time(&alarm->time, &sec); | ||
229 | else | ||
230 | sec = 0; | ||
231 | |||
232 | tegra_rtc_wait_while_busy(dev); | ||
233 | writel(sec, info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0); | ||
234 | dev_vdbg(dev, "alarm read back as %d\n", | ||
235 | readl(info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0)); | ||
236 | |||
237 | /* if successfully written and alarm is enabled ... */ | ||
238 | if (sec) { | ||
239 | tegra_rtc_alarm_irq_enable(dev, 1); | ||
240 | |||
241 | dev_vdbg(dev, "alarm set as %lu. %d/%d/%d %d:%02u:%02u\n", | ||
242 | sec, | ||
243 | alarm->time.tm_mon+1, | ||
244 | alarm->time.tm_mday, | ||
245 | alarm->time.tm_year+1900, | ||
246 | alarm->time.tm_hour, | ||
247 | alarm->time.tm_min, | ||
248 | alarm->time.tm_sec); | ||
249 | } else { | ||
250 | /* disable alarm if 0 or write error. */ | ||
251 | dev_vdbg(dev, "alarm disabled\n"); | ||
252 | tegra_rtc_alarm_irq_enable(dev, 0); | ||
253 | } | ||
254 | |||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | static int tegra_rtc_proc(struct device *dev, struct seq_file *seq) | ||
259 | { | ||
260 | if (!dev || !dev->driver) | ||
261 | return 0; | ||
262 | |||
263 | return seq_printf(seq, "name\t\t: %s\n", dev_name(dev)); | ||
264 | } | ||
265 | |||
266 | static irqreturn_t tegra_rtc_irq_handler(int irq, void *data) | ||
267 | { | ||
268 | struct device *dev = data; | ||
269 | struct tegra_rtc_info *info = dev_get_drvdata(dev); | ||
270 | unsigned long events = 0; | ||
271 | unsigned status; | ||
272 | unsigned long sl_irq_flags; | ||
273 | |||
274 | status = readl(info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); | ||
275 | if (status) { | ||
276 | /* clear the interrupt masks and status on any irq. */ | ||
277 | tegra_rtc_wait_while_busy(dev); | ||
278 | spin_lock_irqsave(&info->tegra_rtc_lock, sl_irq_flags); | ||
279 | writel(0, info->rtc_base + TEGRA_RTC_REG_INTR_MASK); | ||
280 | writel(status, info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); | ||
281 | spin_unlock_irqrestore(&info->tegra_rtc_lock, sl_irq_flags); | ||
282 | } | ||
283 | |||
284 | /* check if Alarm */ | ||
285 | if ((status & TEGRA_RTC_INTR_STATUS_SEC_ALARM0)) | ||
286 | events |= RTC_IRQF | RTC_AF; | ||
287 | |||
288 | /* check if Periodic */ | ||
289 | if ((status & TEGRA_RTC_INTR_STATUS_SEC_CDN_ALARM)) | ||
290 | events |= RTC_IRQF | RTC_PF; | ||
291 | |||
292 | rtc_update_irq(info->rtc_dev, 1, events); | ||
293 | |||
294 | return IRQ_HANDLED; | ||
295 | } | ||
296 | |||
297 | static struct rtc_class_ops tegra_rtc_ops = { | ||
298 | .read_time = tegra_rtc_read_time, | ||
299 | .set_time = tegra_rtc_set_time, | ||
300 | .read_alarm = tegra_rtc_read_alarm, | ||
301 | .set_alarm = tegra_rtc_set_alarm, | ||
302 | .proc = tegra_rtc_proc, | ||
303 | .alarm_irq_enable = tegra_rtc_alarm_irq_enable, | ||
304 | }; | ||
305 | |||
306 | static int __devinit tegra_rtc_probe(struct platform_device *pdev) | ||
307 | { | ||
308 | struct tegra_rtc_info *info; | ||
309 | struct resource *res; | ||
310 | int ret; | ||
311 | |||
312 | info = kzalloc(sizeof(struct tegra_rtc_info), GFP_KERNEL); | ||
313 | if (!info) | ||
314 | return -ENOMEM; | ||
315 | |||
316 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
317 | if (!res) { | ||
318 | dev_err(&pdev->dev, | ||
319 | "Unable to allocate resources for device.\n"); | ||
320 | ret = -EBUSY; | ||
321 | goto err_free_info; | ||
322 | } | ||
323 | |||
324 | if (!request_mem_region(res->start, resource_size(res), pdev->name)) { | ||
325 | dev_err(&pdev->dev, | ||
326 | "Unable to request mem region for device.\n"); | ||
327 | ret = -EBUSY; | ||
328 | goto err_free_info; | ||
329 | } | ||
330 | |||
331 | info->tegra_rtc_irq = platform_get_irq(pdev, 0); | ||
332 | if (info->tegra_rtc_irq <= 0) { | ||
333 | ret = -EBUSY; | ||
334 | goto err_release_mem_region; | ||
335 | } | ||
336 | |||
337 | info->rtc_base = ioremap_nocache(res->start, resource_size(res)); | ||
338 | if (!info->rtc_base) { | ||
339 | dev_err(&pdev->dev, "Unable to grab IOs for device.\n"); | ||
340 | ret = -EBUSY; | ||
341 | goto err_release_mem_region; | ||
342 | } | ||
343 | |||
344 | /* set context info. */ | ||
345 | info->pdev = pdev; | ||
346 | info->tegra_rtc_lock = __SPIN_LOCK_UNLOCKED(info->tegra_rtc_lock); | ||
347 | |||
348 | platform_set_drvdata(pdev, info); | ||
349 | |||
350 | /* clear out the hardware. */ | ||
351 | writel(0, info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0); | ||
352 | writel(0xffffffff, info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); | ||
353 | writel(0, info->rtc_base + TEGRA_RTC_REG_INTR_MASK); | ||
354 | |||
355 | device_init_wakeup(&pdev->dev, 1); | ||
356 | |||
357 | info->rtc_dev = rtc_device_register( | ||
358 | pdev->name, &pdev->dev, &tegra_rtc_ops, THIS_MODULE); | ||
359 | if (IS_ERR(info->rtc_dev)) { | ||
360 | ret = PTR_ERR(info->rtc_dev); | ||
361 | info->rtc_dev = NULL; | ||
362 | dev_err(&pdev->dev, | ||
363 | "Unable to register device (err=%d).\n", | ||
364 | ret); | ||
365 | goto err_iounmap; | ||
366 | } | ||
367 | |||
368 | ret = request_irq(info->tegra_rtc_irq, tegra_rtc_irq_handler, | ||
369 | IRQF_TRIGGER_HIGH, "rtc alarm", &pdev->dev); | ||
370 | if (ret) { | ||
371 | dev_err(&pdev->dev, | ||
372 | "Unable to request interrupt for device (err=%d).\n", | ||
373 | ret); | ||
374 | goto err_dev_unreg; | ||
375 | } | ||
376 | |||
377 | dev_notice(&pdev->dev, "Tegra internal Real Time Clock\n"); | ||
378 | |||
379 | return 0; | ||
380 | |||
381 | err_dev_unreg: | ||
382 | rtc_device_unregister(info->rtc_dev); | ||
383 | err_iounmap: | ||
384 | iounmap(info->rtc_base); | ||
385 | err_release_mem_region: | ||
386 | release_mem_region(res->start, resource_size(res)); | ||
387 | err_free_info: | ||
388 | kfree(info); | ||
389 | |||
390 | return ret; | ||
391 | } | ||
392 | |||
393 | static int __devexit tegra_rtc_remove(struct platform_device *pdev) | ||
394 | { | ||
395 | struct tegra_rtc_info *info = platform_get_drvdata(pdev); | ||
396 | struct resource *res; | ||
397 | |||
398 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
399 | if (!res) | ||
400 | return -EBUSY; | ||
401 | |||
402 | free_irq(info->tegra_rtc_irq, &pdev->dev); | ||
403 | rtc_device_unregister(info->rtc_dev); | ||
404 | iounmap(info->rtc_base); | ||
405 | release_mem_region(res->start, resource_size(res)); | ||
406 | kfree(info); | ||
407 | |||
408 | platform_set_drvdata(pdev, NULL); | ||
409 | |||
410 | return 0; | ||
411 | } | ||
412 | |||
413 | #ifdef CONFIG_PM | ||
414 | static int tegra_rtc_suspend(struct platform_device *pdev, pm_message_t state) | ||
415 | { | ||
416 | struct device *dev = &pdev->dev; | ||
417 | struct tegra_rtc_info *info = platform_get_drvdata(pdev); | ||
418 | |||
419 | tegra_rtc_wait_while_busy(dev); | ||
420 | |||
421 | /* only use ALARM0 as a wake source. */ | ||
422 | writel(0xffffffff, info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); | ||
423 | writel(TEGRA_RTC_INTR_STATUS_SEC_ALARM0, | ||
424 | info->rtc_base + TEGRA_RTC_REG_INTR_MASK); | ||
425 | |||
426 | dev_vdbg(dev, "alarm sec = %d\n", | ||
427 | readl(info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0)); | ||
428 | |||
429 | dev_vdbg(dev, "Suspend (device_may_wakeup=%d) irq:%d\n", | ||
430 | device_may_wakeup(dev), info->tegra_rtc_irq); | ||
431 | |||
432 | /* leave the alarms on as a wake source. */ | ||
433 | if (device_may_wakeup(dev)) | ||
434 | enable_irq_wake(info->tegra_rtc_irq); | ||
435 | |||
436 | return 0; | ||
437 | } | ||
438 | |||
439 | static int tegra_rtc_resume(struct platform_device *pdev) | ||
440 | { | ||
441 | struct device *dev = &pdev->dev; | ||
442 | struct tegra_rtc_info *info = platform_get_drvdata(pdev); | ||
443 | |||
444 | dev_vdbg(dev, "Resume (device_may_wakeup=%d)\n", | ||
445 | device_may_wakeup(dev)); | ||
446 | /* alarms were left on as a wake source, turn them off. */ | ||
447 | if (device_may_wakeup(dev)) | ||
448 | disable_irq_wake(info->tegra_rtc_irq); | ||
449 | |||
450 | return 0; | ||
451 | } | ||
452 | #endif | ||
453 | |||
454 | static void tegra_rtc_shutdown(struct platform_device *pdev) | ||
455 | { | ||
456 | dev_vdbg(&pdev->dev, "disabling interrupts.\n"); | ||
457 | tegra_rtc_alarm_irq_enable(&pdev->dev, 0); | ||
458 | } | ||
459 | |||
460 | MODULE_ALIAS("platform:tegra_rtc"); | ||
461 | static struct platform_driver tegra_rtc_driver = { | ||
462 | .remove = __devexit_p(tegra_rtc_remove), | ||
463 | .shutdown = tegra_rtc_shutdown, | ||
464 | .driver = { | ||
465 | .name = "tegra_rtc", | ||
466 | .owner = THIS_MODULE, | ||
467 | }, | ||
468 | #ifdef CONFIG_PM | ||
469 | .suspend = tegra_rtc_suspend, | ||
470 | .resume = tegra_rtc_resume, | ||
471 | #endif | ||
472 | }; | ||
473 | |||
474 | static int __init tegra_rtc_init(void) | ||
475 | { | ||
476 | return platform_driver_probe(&tegra_rtc_driver, tegra_rtc_probe); | ||
477 | } | ||
478 | module_init(tegra_rtc_init); | ||
479 | |||
480 | static void __exit tegra_rtc_exit(void) | ||
481 | { | ||
482 | platform_driver_unregister(&tegra_rtc_driver); | ||
483 | } | ||
484 | module_exit(tegra_rtc_exit); | ||
485 | |||
486 | MODULE_AUTHOR("Jon Mayo <jmayo@nvidia.com>"); | ||
487 | MODULE_DESCRIPTION("driver for Tegra internal RTC"); | ||
488 | MODULE_LICENSE("GPL"); | ||