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path: root/drivers/rtc/rtc-pl031.c
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-rw-r--r--drivers/rtc/rtc-pl031.c375
1 files changed, 333 insertions, 42 deletions
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index f41873f98f66..3587d9922f28 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -7,6 +7,9 @@
7 * 7 *
8 * Copyright 2006 (c) MontaVista Software, Inc. 8 * Copyright 2006 (c) MontaVista Software, Inc.
9 * 9 *
10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
11 * Copyright 2010 (c) ST-Ericsson AB
12 *
10 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 14 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 15 * as published by the Free Software Foundation; either version
@@ -18,6 +21,10 @@
18#include <linux/interrupt.h> 21#include <linux/interrupt.h>
19#include <linux/amba/bus.h> 22#include <linux/amba/bus.h>
20#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/bcd.h>
25#include <linux/delay.h>
26#include <linux/version.h>
27#include <linux/slab.h>
21 28
22/* 29/*
23 * Register definitions 30 * Register definitions
@@ -30,42 +37,214 @@
30#define RTC_RIS 0x14 /* Raw interrupt status register */ 37#define RTC_RIS 0x14 /* Raw interrupt status register */
31#define RTC_MIS 0x18 /* Masked interrupt status register */ 38#define RTC_MIS 0x18 /* Masked interrupt status register */
32#define RTC_ICR 0x1c /* Interrupt clear register */ 39#define RTC_ICR 0x1c /* Interrupt clear register */
40/* ST variants have additional timer functionality */
41#define RTC_TDR 0x20 /* Timer data read register */
42#define RTC_TLR 0x24 /* Timer data load register */
43#define RTC_TCR 0x28 /* Timer control register */
44#define RTC_YDR 0x30 /* Year data read register */
45#define RTC_YMR 0x34 /* Year match register */
46#define RTC_YLR 0x38 /* Year data load register */
47
48#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
49
50#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
51
52/* Common bit definitions for Interrupt status and control registers */
53#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
54#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
55
56/* Common bit definations for ST v2 for reading/writing time */
57#define RTC_SEC_SHIFT 0
58#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
59#define RTC_MIN_SHIFT 6
60#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
61#define RTC_HOUR_SHIFT 12
62#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
63#define RTC_WDAY_SHIFT 17
64#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
65#define RTC_MDAY_SHIFT 20
66#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
67#define RTC_MON_SHIFT 25
68#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
69
70#define RTC_TIMER_FREQ 32768
33 71
34struct pl031_local { 72struct pl031_local {
35 struct rtc_device *rtc; 73 struct rtc_device *rtc;
36 void __iomem *base; 74 void __iomem *base;
75 u8 hw_designer;
76 u8 hw_revision:4;
37}; 77};
38 78
39static irqreturn_t pl031_interrupt(int irq, void *dev_id) 79static int pl031_alarm_irq_enable(struct device *dev,
80 unsigned int enabled)
40{ 81{
41 struct rtc_device *rtc = dev_id; 82 struct pl031_local *ldata = dev_get_drvdata(dev);
83 unsigned long imsc;
84
85 /* Clear any pending alarm interrupts. */
86 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
87
88 imsc = readl(ldata->base + RTC_IMSC);
42 89
43 rtc_update_irq(rtc, 1, RTC_AF); 90 if (enabled == 1)
91 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
92 else
93 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
44 94
45 return IRQ_HANDLED; 95 return 0;
46} 96}
47 97
48static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 98/*
99 * Convert Gregorian date to ST v2 RTC format.
100 */
101static int pl031_stv2_tm_to_time(struct device *dev,
102 struct rtc_time *tm, unsigned long *st_time,
103 unsigned long *bcd_year)
49{ 104{
105 int year = tm->tm_year + 1900;
106 int wday = tm->tm_wday;
107
108 /* wday masking is not working in hardware so wday must be valid */
109 if (wday < -1 || wday > 6) {
110 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
111 return -EINVAL;
112 } else if (wday == -1) {
113 /* wday is not provided, calculate it here */
114 unsigned long time;
115 struct rtc_time calc_tm;
116
117 rtc_tm_to_time(tm, &time);
118 rtc_time_to_tm(time, &calc_tm);
119 wday = calc_tm.tm_wday;
120 }
121
122 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
123
124 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
125 | (tm->tm_mday << RTC_MDAY_SHIFT)
126 | ((wday + 1) << RTC_WDAY_SHIFT)
127 | (tm->tm_hour << RTC_HOUR_SHIFT)
128 | (tm->tm_min << RTC_MIN_SHIFT)
129 | (tm->tm_sec << RTC_SEC_SHIFT);
130
131 return 0;
132}
133
134/*
135 * Convert ST v2 RTC format to Gregorian date.
136 */
137static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
138 struct rtc_time *tm)
139{
140 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
141 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
142 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
143 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
144 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
145 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
146 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
147
148 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
149 tm->tm_year -= 1900;
150
151 return 0;
152}
153
154static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
155{
156 struct pl031_local *ldata = dev_get_drvdata(dev);
157
158 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
159 readl(ldata->base + RTC_YDR), tm);
160
161 return 0;
162}
163
164static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
165{
166 unsigned long time;
167 unsigned long bcd_year;
50 struct pl031_local *ldata = dev_get_drvdata(dev); 168 struct pl031_local *ldata = dev_get_drvdata(dev);
169 int ret;
51 170
52 switch (cmd) { 171 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
53 case RTC_AIE_OFF: 172 if (ret == 0) {
54 __raw_writel(1, ldata->base + RTC_MIS); 173 writel(bcd_year, ldata->base + RTC_YLR);
55 return 0; 174 writel(time, ldata->base + RTC_LR);
56 case RTC_AIE_ON:
57 __raw_writel(0, ldata->base + RTC_MIS);
58 return 0;
59 } 175 }
60 176
61 return -ENOIOCTLCMD; 177 return ret;
178}
179
180static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
181{
182 struct pl031_local *ldata = dev_get_drvdata(dev);
183 int ret;
184
185 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
186 readl(ldata->base + RTC_YMR), &alarm->time);
187
188 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
189 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
190
191 return ret;
192}
193
194static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
195{
196 struct pl031_local *ldata = dev_get_drvdata(dev);
197 unsigned long time;
198 unsigned long bcd_year;
199 int ret;
200
201 /* At the moment, we can only deal with non-wildcarded alarm times. */
202 ret = rtc_valid_tm(&alarm->time);
203 if (ret == 0) {
204 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
205 &time, &bcd_year);
206 if (ret == 0) {
207 writel(bcd_year, ldata->base + RTC_YMR);
208 writel(time, ldata->base + RTC_MR);
209
210 pl031_alarm_irq_enable(dev, alarm->enabled);
211 }
212 }
213
214 return ret;
215}
216
217static irqreturn_t pl031_interrupt(int irq, void *dev_id)
218{
219 struct pl031_local *ldata = dev_id;
220 unsigned long rtcmis;
221 unsigned long events = 0;
222
223 rtcmis = readl(ldata->base + RTC_MIS);
224 if (rtcmis) {
225 writel(rtcmis, ldata->base + RTC_ICR);
226
227 if (rtcmis & RTC_BIT_AI)
228 events |= (RTC_AF | RTC_IRQF);
229
230 /* Timer interrupt is only available in ST variants */
231 if ((rtcmis & RTC_BIT_PI) &&
232 (ldata->hw_designer == AMBA_VENDOR_ST))
233 events |= (RTC_PF | RTC_IRQF);
234
235 rtc_update_irq(ldata->rtc, 1, events);
236
237 return IRQ_HANDLED;
238 }
239
240 return IRQ_NONE;
62} 241}
63 242
64static int pl031_read_time(struct device *dev, struct rtc_time *tm) 243static int pl031_read_time(struct device *dev, struct rtc_time *tm)
65{ 244{
66 struct pl031_local *ldata = dev_get_drvdata(dev); 245 struct pl031_local *ldata = dev_get_drvdata(dev);
67 246
68 rtc_time_to_tm(__raw_readl(ldata->base + RTC_DR), tm); 247 rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
69 248
70 return 0; 249 return 0;
71} 250}
@@ -74,20 +253,24 @@ static int pl031_set_time(struct device *dev, struct rtc_time *tm)
74{ 253{
75 unsigned long time; 254 unsigned long time;
76 struct pl031_local *ldata = dev_get_drvdata(dev); 255 struct pl031_local *ldata = dev_get_drvdata(dev);
256 int ret;
77 257
78 rtc_tm_to_time(tm, &time); 258 ret = rtc_tm_to_time(tm, &time);
79 __raw_writel(time, ldata->base + RTC_LR);
80 259
81 return 0; 260 if (ret == 0)
261 writel(time, ldata->base + RTC_LR);
262
263 return ret;
82} 264}
83 265
84static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 266static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
85{ 267{
86 struct pl031_local *ldata = dev_get_drvdata(dev); 268 struct pl031_local *ldata = dev_get_drvdata(dev);
87 269
88 rtc_time_to_tm(__raw_readl(ldata->base + RTC_MR), &alarm->time); 270 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
89 alarm->pending = __raw_readl(ldata->base + RTC_RIS); 271
90 alarm->enabled = __raw_readl(ldata->base + RTC_IMSC); 272 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
273 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
91 274
92 return 0; 275 return 0;
93} 276}
@@ -96,22 +279,71 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
96{ 279{
97 struct pl031_local *ldata = dev_get_drvdata(dev); 280 struct pl031_local *ldata = dev_get_drvdata(dev);
98 unsigned long time; 281 unsigned long time;
282 int ret;
283
284 /* At the moment, we can only deal with non-wildcarded alarm times. */
285 ret = rtc_valid_tm(&alarm->time);
286 if (ret == 0) {
287 ret = rtc_tm_to_time(&alarm->time, &time);
288 if (ret == 0) {
289 writel(time, ldata->base + RTC_MR);
290 pl031_alarm_irq_enable(dev, alarm->enabled);
291 }
292 }
293
294 return ret;
295}
296
297/* Periodic interrupt is only available in ST variants. */
298static int pl031_irq_set_state(struct device *dev, int enabled)
299{
300 struct pl031_local *ldata = dev_get_drvdata(dev);
301
302 if (enabled == 1) {
303 /* Clear any pending timer interrupt. */
304 writel(RTC_BIT_PI, ldata->base + RTC_ICR);
305
306 writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
307 ldata->base + RTC_IMSC);
308
309 /* Now start the timer */
310 writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
311 ldata->base + RTC_TCR);
99 312
100 rtc_tm_to_time(&alarm->time, &time); 313 } else {
314 writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
315 ldata->base + RTC_IMSC);
101 316
102 __raw_writel(time, ldata->base + RTC_MR); 317 /* Also stop the timer */
103 __raw_writel(!alarm->enabled, ldata->base + RTC_MIS); 318 writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
319 ldata->base + RTC_TCR);
320 }
321 /* Wait at least 1 RTC32 clock cycle to ensure next access
322 * to RTC_TCR will succeed.
323 */
324 udelay(40);
104 325
105 return 0; 326 return 0;
106} 327}
107 328
108static const struct rtc_class_ops pl031_ops = { 329static int pl031_irq_set_freq(struct device *dev, int freq)
109 .ioctl = pl031_ioctl, 330{
110 .read_time = pl031_read_time, 331 struct pl031_local *ldata = dev_get_drvdata(dev);
111 .set_time = pl031_set_time, 332
112 .read_alarm = pl031_read_alarm, 333 /* Cant set timer if it is already enabled */
113 .set_alarm = pl031_set_alarm, 334 if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
114}; 335 dev_err(dev, "can't change frequency while timer enabled\n");
336 return -EINVAL;
337 }
338
339 /* If self start bit in RTC_TCR is set timer will start here,
340 * but we never set that bit. Instead we start the timer when
341 * set_state is called with enabled == 1.
342 */
343 writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);
344
345 return 0;
346}
115 347
116static int pl031_remove(struct amba_device *adev) 348static int pl031_remove(struct amba_device *adev)
117{ 349{
@@ -131,18 +363,20 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
131{ 363{
132 int ret; 364 int ret;
133 struct pl031_local *ldata; 365 struct pl031_local *ldata;
366 struct rtc_class_ops *ops = id->data;
134 367
135 ret = amba_request_regions(adev, NULL); 368 ret = amba_request_regions(adev, NULL);
136 if (ret) 369 if (ret)
137 goto err_req; 370 goto err_req;
138 371
139 ldata = kmalloc(sizeof(struct pl031_local), GFP_KERNEL); 372 ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
140 if (!ldata) { 373 if (!ldata) {
141 ret = -ENOMEM; 374 ret = -ENOMEM;
142 goto out; 375 goto out;
143 } 376 }
144 377
145 ldata->base = ioremap(adev->res.start, resource_size(&adev->res)); 378 ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
379
146 if (!ldata->base) { 380 if (!ldata->base) {
147 ret = -ENOMEM; 381 ret = -ENOMEM;
148 goto out_no_remap; 382 goto out_no_remap;
@@ -150,24 +384,36 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
150 384
151 amba_set_drvdata(adev, ldata); 385 amba_set_drvdata(adev, ldata);
152 386
153 if (request_irq(adev->irq[0], pl031_interrupt, IRQF_DISABLED, 387 ldata->hw_designer = amba_manf(adev);
154 "rtc-pl031", ldata->rtc)) { 388 ldata->hw_revision = amba_rev(adev);
155 ret = -EIO; 389
156 goto out_no_irq; 390 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
157 } 391 dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
392
393 /* Enable the clockwatch on ST Variants */
394 if ((ldata->hw_designer == AMBA_VENDOR_ST) &&
395 (ldata->hw_revision > 1))
396 writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
397 ldata->base + RTC_CR);
158 398
159 ldata->rtc = rtc_device_register("pl031", &adev->dev, &pl031_ops, 399 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
160 THIS_MODULE); 400 THIS_MODULE);
161 if (IS_ERR(ldata->rtc)) { 401 if (IS_ERR(ldata->rtc)) {
162 ret = PTR_ERR(ldata->rtc); 402 ret = PTR_ERR(ldata->rtc);
163 goto out_no_rtc; 403 goto out_no_rtc;
164 } 404 }
165 405
406 if (request_irq(adev->irq[0], pl031_interrupt,
407 IRQF_DISABLED | IRQF_SHARED, "rtc-pl031", ldata)) {
408 ret = -EIO;
409 goto out_no_irq;
410 }
411
166 return 0; 412 return 0;
167 413
168out_no_rtc:
169 free_irq(adev->irq[0], ldata->rtc);
170out_no_irq: 414out_no_irq:
415 rtc_device_unregister(ldata->rtc);
416out_no_rtc:
171 iounmap(ldata->base); 417 iounmap(ldata->base);
172 amba_set_drvdata(adev, NULL); 418 amba_set_drvdata(adev, NULL);
173out_no_remap: 419out_no_remap:
@@ -175,13 +421,58 @@ out_no_remap:
175out: 421out:
176 amba_release_regions(adev); 422 amba_release_regions(adev);
177err_req: 423err_req:
424
178 return ret; 425 return ret;
179} 426}
180 427
428/* Operations for the original ARM version */
429static struct rtc_class_ops arm_pl031_ops = {
430 .read_time = pl031_read_time,
431 .set_time = pl031_set_time,
432 .read_alarm = pl031_read_alarm,
433 .set_alarm = pl031_set_alarm,
434 .alarm_irq_enable = pl031_alarm_irq_enable,
435};
436
437/* The First ST derivative */
438static struct rtc_class_ops stv1_pl031_ops = {
439 .read_time = pl031_read_time,
440 .set_time = pl031_set_time,
441 .read_alarm = pl031_read_alarm,
442 .set_alarm = pl031_set_alarm,
443 .alarm_irq_enable = pl031_alarm_irq_enable,
444 .irq_set_state = pl031_irq_set_state,
445 .irq_set_freq = pl031_irq_set_freq,
446};
447
448/* And the second ST derivative */
449static struct rtc_class_ops stv2_pl031_ops = {
450 .read_time = pl031_stv2_read_time,
451 .set_time = pl031_stv2_set_time,
452 .read_alarm = pl031_stv2_read_alarm,
453 .set_alarm = pl031_stv2_set_alarm,
454 .alarm_irq_enable = pl031_alarm_irq_enable,
455 .irq_set_state = pl031_irq_set_state,
456 .irq_set_freq = pl031_irq_set_freq,
457};
458
181static struct amba_id pl031_ids[] __initdata = { 459static struct amba_id pl031_ids[] __initdata = {
182 { 460 {
183 .id = 0x00041031, 461 .id = 0x00041031,
184 .mask = 0x000fffff, }, 462 .mask = 0x000fffff,
463 .data = &arm_pl031_ops,
464 },
465 /* ST Micro variants */
466 {
467 .id = 0x00180031,
468 .mask = 0x00ffffff,
469 .data = &stv1_pl031_ops,
470 },
471 {
472 .id = 0x00280031,
473 .mask = 0x00ffffff,
474 .data = &stv2_pl031_ops,
475 },
185 {0, 0}, 476 {0, 0},
186}; 477};
187 478