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-rw-r--r--drivers/reset/Kconfig2
-rw-r--r--drivers/reset/Makefile1
-rw-r--r--drivers/reset/sti/Kconfig15
-rw-r--r--drivers/reset/sti/Makefile4
-rw-r--r--drivers/reset/sti/reset-stih415.c112
-rw-r--r--drivers/reset/sti/reset-stih416.c143
-rw-r--r--drivers/reset/sti/reset-syscfg.c186
-rw-r--r--drivers/reset/sti/reset-syscfg.h69
8 files changed, 532 insertions, 0 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c9d04f797862..0615f50a14cd 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -11,3 +11,5 @@ menuconfig RESET_CONTROLLER
11 via GPIOs or SoC-internal reset controller modules. 11 via GPIOs or SoC-internal reset controller modules.
12 12
13 If unsure, say no. 13 If unsure, say no.
14
15source "drivers/reset/sti/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index cc29832c9638..4f60caf750ce 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1,2 +1,3 @@
1obj-$(CONFIG_RESET_CONTROLLER) += core.o 1obj-$(CONFIG_RESET_CONTROLLER) += core.o
2obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o 2obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
3obj-$(CONFIG_ARCH_STI) += sti/
diff --git a/drivers/reset/sti/Kconfig b/drivers/reset/sti/Kconfig
new file mode 100644
index 000000000000..88d2d0316613
--- /dev/null
+++ b/drivers/reset/sti/Kconfig
@@ -0,0 +1,15 @@
1if ARCH_STI
2
3config STI_RESET_SYSCFG
4 bool
5 select RESET_CONTROLLER
6
7config STIH415_RESET
8 bool
9 select STI_RESET_SYSCFG
10
11config STIH416_RESET
12 bool
13 select STI_RESET_SYSCFG
14
15endif
diff --git a/drivers/reset/sti/Makefile b/drivers/reset/sti/Makefile
new file mode 100644
index 000000000000..be1c97647871
--- /dev/null
+++ b/drivers/reset/sti/Makefile
@@ -0,0 +1,4 @@
1obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o
2
3obj-$(CONFIG_STIH415_RESET) += reset-stih415.o
4obj-$(CONFIG_STIH416_RESET) += reset-stih416.o
diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c
new file mode 100644
index 000000000000..e6f6c41abe12
--- /dev/null
+++ b/drivers/reset/sti/reset-stih415.c
@@ -0,0 +1,112 @@
1/*
2 * Copyright (C) 2013 STMicroelectronics (R&D) Limited
3 * Author: Stephen Gallimore <stephen.gallimore@st.com>
4 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_platform.h>
14#include <linux/platform_device.h>
15
16#include <dt-bindings/reset-controller/stih415-resets.h>
17
18#include "reset-syscfg.h"
19
20/*
21 * STiH415 Peripheral powerdown definitions.
22 */
23static const char stih415_front[] = "st,stih415-front-syscfg";
24static const char stih415_rear[] = "st,stih415-rear-syscfg";
25static const char stih415_sbc[] = "st,stih415-sbc-syscfg";
26static const char stih415_lpm[] = "st,stih415-lpm-syscfg";
27
28#define STIH415_PDN_FRONT(_bit) \
29 _SYSCFG_RST_CH(stih415_front, SYSCFG_114, _bit, SYSSTAT_187, _bit)
30
31#define STIH415_PDN_REAR(_cntl, _stat) \
32 _SYSCFG_RST_CH(stih415_rear, SYSCFG_336, _cntl, SYSSTAT_384, _stat)
33
34#define STIH415_SRST_REAR(_reg, _bit) \
35 _SYSCFG_RST_CH_NO_ACK(stih415_rear, _reg, _bit)
36
37#define STIH415_SRST_SBC(_reg, _bit) \
38 _SYSCFG_RST_CH_NO_ACK(stih415_sbc, _reg, _bit)
39
40#define STIH415_SRST_FRONT(_reg, _bit) \
41 _SYSCFG_RST_CH_NO_ACK(stih415_front, _reg, _bit)
42
43#define STIH415_SRST_LPM(_reg, _bit) \
44 _SYSCFG_RST_CH_NO_ACK(stih415_lpm, _reg, _bit)
45
46#define SYSCFG_114 0x38 /* Powerdown request EMI/NAND/Keyscan */
47#define SYSSTAT_187 0x15c /* Powerdown status EMI/NAND/Keyscan */
48
49#define SYSCFG_336 0x90 /* Powerdown request USB/SATA/PCIe */
50#define SYSSTAT_384 0x150 /* Powerdown status USB/SATA/PCIe */
51
52#define SYSCFG_376 0x130 /* Reset generator 0 control 0 */
53#define SYSCFG_166 0x108 /* Softreset Ethernet 0 */
54#define SYSCFG_31 0x7c /* Softreset Ethernet 1 */
55#define LPM_SYSCFG_1 0x4 /* Softreset IRB */
56
57static const struct syscfg_reset_channel_data stih415_powerdowns[] = {
58 [STIH415_EMISS_POWERDOWN] = STIH415_PDN_FRONT(0),
59 [STIH415_NAND_POWERDOWN] = STIH415_PDN_FRONT(1),
60 [STIH415_KEYSCAN_POWERDOWN] = STIH415_PDN_FRONT(2),
61 [STIH415_USB0_POWERDOWN] = STIH415_PDN_REAR(0, 0),
62 [STIH415_USB1_POWERDOWN] = STIH415_PDN_REAR(1, 1),
63 [STIH415_USB2_POWERDOWN] = STIH415_PDN_REAR(2, 2),
64 [STIH415_SATA0_POWERDOWN] = STIH415_PDN_REAR(3, 3),
65 [STIH415_SATA1_POWERDOWN] = STIH415_PDN_REAR(4, 4),
66 [STIH415_PCIE_POWERDOWN] = STIH415_PDN_REAR(5, 8),
67};
68
69static const struct syscfg_reset_channel_data stih415_softresets[] = {
70 [STIH415_ETH0_SOFTRESET] = STIH415_SRST_FRONT(SYSCFG_166, 0),
71 [STIH415_ETH1_SOFTRESET] = STIH415_SRST_SBC(SYSCFG_31, 0),
72 [STIH415_IRB_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 6),
73 [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9),
74 [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10),
75 [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11),
76};
77
78static struct syscfg_reset_controller_data stih415_powerdown_controller = {
79 .wait_for_ack = true,
80 .nr_channels = ARRAY_SIZE(stih415_powerdowns),
81 .channels = stih415_powerdowns,
82};
83
84static struct syscfg_reset_controller_data stih415_softreset_controller = {
85 .wait_for_ack = false,
86 .active_low = true,
87 .nr_channels = ARRAY_SIZE(stih415_softresets),
88 .channels = stih415_softresets,
89};
90
91static struct of_device_id stih415_reset_match[] = {
92 { .compatible = "st,stih415-powerdown",
93 .data = &stih415_powerdown_controller, },
94 { .compatible = "st,stih415-softreset",
95 .data = &stih415_softreset_controller, },
96 {},
97};
98
99static struct platform_driver stih415_reset_driver = {
100 .probe = syscfg_reset_probe,
101 .driver = {
102 .name = "reset-stih415",
103 .owner = THIS_MODULE,
104 .of_match_table = stih415_reset_match,
105 },
106};
107
108static int __init stih415_reset_init(void)
109{
110 return platform_driver_register(&stih415_reset_driver);
111}
112arch_initcall(stih415_reset_init);
diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c
new file mode 100644
index 000000000000..fe3bf02bdc8c
--- /dev/null
+++ b/drivers/reset/sti/reset-stih416.c
@@ -0,0 +1,143 @@
1/*
2 * Copyright (C) 2013 STMicroelectronics (R&D) Limited
3 * Author: Stephen Gallimore <stephen.gallimore@st.com>
4 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_platform.h>
14#include <linux/platform_device.h>
15
16#include <dt-bindings/reset-controller/stih416-resets.h>
17
18#include "reset-syscfg.h"
19
20/*
21 * STiH416 Peripheral powerdown definitions.
22 */
23static const char stih416_front[] = "st,stih416-front-syscfg";
24static const char stih416_rear[] = "st,stih416-rear-syscfg";
25static const char stih416_sbc[] = "st,stih416-sbc-syscfg";
26static const char stih416_lpm[] = "st,stih416-lpm-syscfg";
27static const char stih416_cpu[] = "st,stih416-cpu-syscfg";
28
29#define STIH416_PDN_FRONT(_bit) \
30 _SYSCFG_RST_CH(stih416_front, SYSCFG_1500, _bit, SYSSTAT_1578, _bit)
31
32#define STIH416_PDN_REAR(_cntl, _stat) \
33 _SYSCFG_RST_CH(stih416_rear, SYSCFG_2525, _cntl, SYSSTAT_2583, _stat)
34
35#define SYSCFG_1500 0x7d0 /* Powerdown request EMI/NAND/Keyscan */
36#define SYSSTAT_1578 0x908 /* Powerdown status EMI/NAND/Keyscan */
37
38#define SYSCFG_2525 0x834 /* Powerdown request USB/SATA/PCIe */
39#define SYSSTAT_2583 0x91c /* Powerdown status USB/SATA/PCIe */
40
41#define SYSCFG_2552 0x8A0 /* Reset Generator control 0 */
42#define SYSCFG_1539 0x86c /* Softreset Ethernet 0 */
43#define SYSCFG_510 0x7f8 /* Softreset Ethernet 1 */
44#define LPM_SYSCFG_1 0x4 /* Softreset IRB */
45#define SYSCFG_2553 0x8a4 /* Softreset SATA0/1, PCIE0/1 */
46#define SYSCFG_7563 0x8cc /* MPE softresets 0 */
47#define SYSCFG_7564 0x8d0 /* MPE softresets 1 */
48
49#define STIH416_SRST_CPU(_reg, _bit) \
50 _SYSCFG_RST_CH_NO_ACK(stih416_cpu, _reg, _bit)
51
52#define STIH416_SRST_FRONT(_reg, _bit) \
53 _SYSCFG_RST_CH_NO_ACK(stih416_front, _reg, _bit)
54
55#define STIH416_SRST_REAR(_reg, _bit) \
56 _SYSCFG_RST_CH_NO_ACK(stih416_rear, _reg, _bit)
57
58#define STIH416_SRST_LPM(_reg, _bit) \
59 _SYSCFG_RST_CH_NO_ACK(stih416_lpm, _reg, _bit)
60
61#define STIH416_SRST_SBC(_reg, _bit) \
62 _SYSCFG_RST_CH_NO_ACK(stih416_sbc, _reg, _bit)
63
64static const struct syscfg_reset_channel_data stih416_powerdowns[] = {
65 [STIH416_EMISS_POWERDOWN] = STIH416_PDN_FRONT(0),
66 [STIH416_NAND_POWERDOWN] = STIH416_PDN_FRONT(1),
67 [STIH416_KEYSCAN_POWERDOWN] = STIH416_PDN_FRONT(2),
68 [STIH416_USB0_POWERDOWN] = STIH416_PDN_REAR(0, 0),
69 [STIH416_USB1_POWERDOWN] = STIH416_PDN_REAR(1, 1),
70 [STIH416_USB2_POWERDOWN] = STIH416_PDN_REAR(2, 2),
71 [STIH416_USB3_POWERDOWN] = STIH416_PDN_REAR(6, 5),
72 [STIH416_SATA0_POWERDOWN] = STIH416_PDN_REAR(3, 3),
73 [STIH416_SATA1_POWERDOWN] = STIH416_PDN_REAR(4, 4),
74 [STIH416_PCIE0_POWERDOWN] = STIH416_PDN_REAR(7, 9),
75 [STIH416_PCIE1_POWERDOWN] = STIH416_PDN_REAR(5, 8),
76};
77
78static const struct syscfg_reset_channel_data stih416_softresets[] = {
79 [STIH416_ETH0_SOFTRESET] = STIH416_SRST_FRONT(SYSCFG_1539, 0),
80 [STIH416_ETH1_SOFTRESET] = STIH416_SRST_SBC(SYSCFG_510, 0),
81 [STIH416_IRB_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 6),
82 [STIH416_USB0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 9),
83 [STIH416_USB1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 10),
84 [STIH416_USB2_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 11),
85 [STIH416_USB3_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 28),
86 [STIH416_SATA0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 7),
87 [STIH416_SATA1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 3),
88 [STIH416_PCIE0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 15),
89 [STIH416_PCIE1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 2),
90 [STIH416_AUD_DAC_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 14),
91 [STIH416_HDTVOUT_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 5),
92 [STIH416_VTAC_M_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 25),
93 [STIH416_VTAC_A_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 26),
94 [STIH416_SYNC_HD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 5),
95 [STIH416_SYNC_SD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 6),
96 [STIH416_BLITTER_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 10),
97 [STIH416_GPU_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 11),
98 [STIH416_VTAC_M_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 18),
99 [STIH416_VTAC_A_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 19),
100 [STIH416_VTG_AUX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 21),
101 [STIH416_JPEG_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 23),
102 [STIH416_HVA_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 2),
103 [STIH416_COMPO_M_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 3),
104 [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4),
105 [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10),
106 [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16),
107};
108
109static struct syscfg_reset_controller_data stih416_powerdown_controller = {
110 .wait_for_ack = true,
111 .nr_channels = ARRAY_SIZE(stih416_powerdowns),
112 .channels = stih416_powerdowns,
113};
114
115static struct syscfg_reset_controller_data stih416_softreset_controller = {
116 .wait_for_ack = false,
117 .active_low = true,
118 .nr_channels = ARRAY_SIZE(stih416_softresets),
119 .channels = stih416_softresets,
120};
121
122static struct of_device_id stih416_reset_match[] = {
123 { .compatible = "st,stih416-powerdown",
124 .data = &stih416_powerdown_controller, },
125 { .compatible = "st,stih416-softreset",
126 .data = &stih416_softreset_controller, },
127 {},
128};
129
130static struct platform_driver stih416_reset_driver = {
131 .probe = syscfg_reset_probe,
132 .driver = {
133 .name = "reset-stih416",
134 .owner = THIS_MODULE,
135 .of_match_table = stih416_reset_match,
136 },
137};
138
139static int __init stih416_reset_init(void)
140{
141 return platform_driver_register(&stih416_reset_driver);
142}
143arch_initcall(stih416_reset_init);
diff --git a/drivers/reset/sti/reset-syscfg.c b/drivers/reset/sti/reset-syscfg.c
new file mode 100644
index 000000000000..a145cc066d4a
--- /dev/null
+++ b/drivers/reset/sti/reset-syscfg.c
@@ -0,0 +1,186 @@
1/*
2 * Copyright (C) 2013 STMicroelectronics Limited
3 * Author: Stephen Gallimore <stephen.gallimore@st.com>
4 *
5 * Inspired by mach-imx/src.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/module.h>
15#include <linux/err.h>
16#include <linux/types.h>
17#include <linux/of_device.h>
18#include <linux/regmap.h>
19#include <linux/mfd/syscon.h>
20
21#include "reset-syscfg.h"
22
23/**
24 * Reset channel regmap configuration
25 *
26 * @reset: regmap field for the channel's reset bit.
27 * @ack: regmap field for the channel's ack bit (optional).
28 */
29struct syscfg_reset_channel {
30 struct regmap_field *reset;
31 struct regmap_field *ack;
32};
33
34/**
35 * A reset controller which groups together a set of related reset bits, which
36 * may be located in different system configuration registers.
37 *
38 * @rst: base reset controller structure.
39 * @active_low: are the resets in this controller active low, i.e. clearing
40 * the reset bit puts the hardware into reset.
41 * @channels: An array of reset channels for this controller.
42 */
43struct syscfg_reset_controller {
44 struct reset_controller_dev rst;
45 bool active_low;
46 struct syscfg_reset_channel *channels;
47};
48
49#define to_syscfg_reset_controller(_rst) \
50 container_of(_rst, struct syscfg_reset_controller, rst)
51
52static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
53 unsigned long idx, int assert)
54{
55 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
56 const struct syscfg_reset_channel *ch;
57 u32 ctrl_val = rst->active_low ? !assert : !!assert;
58 int err;
59
60 if (idx >= rcdev->nr_resets)
61 return -EINVAL;
62
63 ch = &rst->channels[idx];
64
65 err = regmap_field_write(ch->reset, ctrl_val);
66 if (err)
67 return err;
68
69 if (ch->ack) {
70 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
71 u32 ack_val;
72
73 while (true) {
74 err = regmap_field_read(ch->ack, &ack_val);
75 if (err)
76 return err;
77
78 if (ack_val == ctrl_val)
79 break;
80
81 if (time_after(jiffies, timeout))
82 return -ETIME;
83
84 cpu_relax();
85 }
86 }
87
88 return 0;
89}
90
91static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
92 unsigned long idx)
93{
94 return syscfg_reset_program_hw(rcdev, idx, true);
95}
96
97static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
98 unsigned long idx)
99{
100 return syscfg_reset_program_hw(rcdev, idx, false);
101}
102
103static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
104 unsigned long idx)
105{
106 int err = syscfg_reset_assert(rcdev, idx);
107 if (err)
108 return err;
109
110 return syscfg_reset_deassert(rcdev, idx);
111}
112
113static struct reset_control_ops syscfg_reset_ops = {
114 .reset = syscfg_reset_dev,
115 .assert = syscfg_reset_assert,
116 .deassert = syscfg_reset_deassert,
117};
118
119static int syscfg_reset_controller_register(struct device *dev,
120 const struct syscfg_reset_controller_data *data)
121{
122 struct syscfg_reset_controller *rc;
123 size_t size;
124 int i, err;
125
126 rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
127 if (!rc)
128 return -ENOMEM;
129
130 size = sizeof(struct syscfg_reset_channel) * data->nr_channels;
131
132 rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
133 if (!rc->channels)
134 return -ENOMEM;
135
136 rc->rst.ops = &syscfg_reset_ops,
137 rc->rst.of_node = dev->of_node;
138 rc->rst.nr_resets = data->nr_channels;
139 rc->active_low = data->active_low;
140
141 for (i = 0; i < data->nr_channels; i++) {
142 struct regmap *map;
143 struct regmap_field *f;
144 const char *compatible = data->channels[i].compatible;
145
146 map = syscon_regmap_lookup_by_compatible(compatible);
147 if (IS_ERR(map))
148 return PTR_ERR(map);
149
150 f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
151 if (IS_ERR(f))
152 return PTR_ERR(f);
153
154 rc->channels[i].reset = f;
155
156 if (!data->wait_for_ack)
157 continue;
158
159 f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
160 if (IS_ERR(f))
161 return PTR_ERR(f);
162
163 rc->channels[i].ack = f;
164 }
165
166 err = reset_controller_register(&rc->rst);
167 if (!err)
168 dev_info(dev, "registered\n");
169
170 return err;
171}
172
173int syscfg_reset_probe(struct platform_device *pdev)
174{
175 struct device *dev = pdev ? &pdev->dev : NULL;
176 const struct of_device_id *match;
177
178 if (!dev || !dev->driver)
179 return -ENODEV;
180
181 match = of_match_device(dev->driver->of_match_table, dev);
182 if (!match || !match->data)
183 return -EINVAL;
184
185 return syscfg_reset_controller_register(dev, match->data);
186}
diff --git a/drivers/reset/sti/reset-syscfg.h b/drivers/reset/sti/reset-syscfg.h
new file mode 100644
index 000000000000..2cc2283bac40
--- /dev/null
+++ b/drivers/reset/sti/reset-syscfg.h
@@ -0,0 +1,69 @@
1/*
2 * Copyright (C) 2013 STMicroelectronics (R&D) Limited
3 * Author: Stephen Gallimore <stephen.gallimore@st.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10#ifndef __STI_RESET_SYSCFG_H
11#define __STI_RESET_SYSCFG_H
12
13#include <linux/device.h>
14#include <linux/regmap.h>
15#include <linux/reset-controller.h>
16
17/**
18 * Reset channel description for a system configuration register based
19 * reset controller.
20 *
21 * @compatible: Compatible string of the syscon regmap containing this
22 * channel's control and ack (status) bits.
23 * @reset: Regmap field description of the channel's reset bit.
24 * @ack: Regmap field description of the channel's acknowledge bit.
25 */
26struct syscfg_reset_channel_data {
27 const char *compatible;
28 struct reg_field reset;
29 struct reg_field ack;
30};
31
32#define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab) \
33 { .compatible = _c, \
34 .reset = REG_FIELD(_rr, _rb, _rb), \
35 .ack = REG_FIELD(_ar, _ab, _ab), }
36
37#define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb) \
38 { .compatible = _c, \
39 .reset = REG_FIELD(_rr, _rb, _rb), }
40
41/**
42 * Description of a system configuration register based reset controller.
43 *
44 * @wait_for_ack: The controller will wait for reset assert and de-assert to
45 * be "ack'd" in a channel's ack field.
46 * @active_low: Are the resets in this controller active low, i.e. clearing
47 * the reset bit puts the hardware into reset.
48 * @nr_channels: The number of reset channels in this controller.
49 * @channels: An array of reset channel descriptions.
50 */
51struct syscfg_reset_controller_data {
52 bool wait_for_ack;
53 bool active_low;
54 int nr_channels;
55 const struct syscfg_reset_channel_data *channels;
56};
57
58/**
59 * syscfg_reset_probe(): platform device probe function used by syscfg
60 * reset controller drivers. This registers a reset
61 * controller configured by the OF match data for
62 * the compatible device which should be of type
63 * "struct syscfg_reset_controller_data".
64 *
65 * @pdev: platform device
66 */
67int syscfg_reset_probe(struct platform_device *pdev);
68
69#endif /* __STI_RESET_SYSCFG_H */
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