diff options
Diffstat (limited to 'drivers/regulator')
| -rw-r--r-- | drivers/regulator/tps6507x-regulator.c | 60 |
1 files changed, 1 insertions, 59 deletions
diff --git a/drivers/regulator/tps6507x-regulator.c b/drivers/regulator/tps6507x-regulator.c index 74841abcc9cc..23c0597ab1f5 100644 --- a/drivers/regulator/tps6507x-regulator.c +++ b/drivers/regulator/tps6507x-regulator.c | |||
| @@ -25,65 +25,7 @@ | |||
| 25 | #include <linux/i2c.h> | 25 | #include <linux/i2c.h> |
| 26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
| 27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
| 28 | 28 | #include <linux/mfd/tps6507x.h> | |
| 29 | /* Register definitions */ | ||
| 30 | #define TPS6507X_REG_PPATH1 0X01 | ||
| 31 | #define TPS6507X_REG_INT 0X02 | ||
| 32 | #define TPS6507X_REG_CHGCONFIG0 0X03 | ||
| 33 | #define TPS6507X_REG_CHGCONFIG1 0X04 | ||
| 34 | #define TPS6507X_REG_CHGCONFIG2 0X05 | ||
| 35 | #define TPS6507X_REG_CHGCONFIG3 0X06 | ||
| 36 | #define TPS6507X_REG_REG_ADCONFIG 0X07 | ||
| 37 | #define TPS6507X_REG_TSCMODE 0X08 | ||
| 38 | #define TPS6507X_REG_ADRESULT_1 0X09 | ||
| 39 | #define TPS6507X_REG_ADRESULT_2 0X0A | ||
| 40 | #define TPS6507X_REG_PGOOD 0X0B | ||
| 41 | #define TPS6507X_REG_PGOODMASK 0X0C | ||
| 42 | #define TPS6507X_REG_CON_CTRL1 0X0D | ||
| 43 | #define TPS6507X_REG_CON_CTRL2 0X0E | ||
| 44 | #define TPS6507X_REG_CON_CTRL3 0X0F | ||
| 45 | #define TPS6507X_REG_DEFDCDC1 0X10 | ||
| 46 | #define TPS6507X_REG_DEFDCDC2_LOW 0X11 | ||
| 47 | #define TPS6507X_REG_DEFDCDC2_HIGH 0X12 | ||
| 48 | #define TPS6507X_REG_DEFDCDC3_LOW 0X13 | ||
| 49 | #define TPS6507X_REG_DEFDCDC3_HIGH 0X14 | ||
| 50 | #define TPS6507X_REG_DEFSLEW 0X15 | ||
| 51 | #define TPS6507X_REG_LDO_CTRL1 0X16 | ||
| 52 | #define TPS6507X_REG_DEFLDO2 0X17 | ||
| 53 | #define TPS6507X_REG_WLED_CTRL1 0X18 | ||
| 54 | #define TPS6507X_REG_WLED_CTRL2 0X19 | ||
| 55 | |||
| 56 | /* CON_CTRL1 bitfields */ | ||
| 57 | #define TPS6507X_CON_CTRL1_DCDC1_ENABLE BIT(4) | ||
| 58 | #define TPS6507X_CON_CTRL1_DCDC2_ENABLE BIT(3) | ||
| 59 | #define TPS6507X_CON_CTRL1_DCDC3_ENABLE BIT(2) | ||
| 60 | #define TPS6507X_CON_CTRL1_LDO1_ENABLE BIT(1) | ||
| 61 | #define TPS6507X_CON_CTRL1_LDO2_ENABLE BIT(0) | ||
| 62 | |||
| 63 | /* DEFDCDC1 bitfields */ | ||
| 64 | #define TPS6507X_DEFDCDC1_DCDC1_EXT_ADJ_EN BIT(7) | ||
| 65 | #define TPS6507X_DEFDCDC1_DCDC1_MASK 0X3F | ||
| 66 | |||
| 67 | /* DEFDCDC2_LOW bitfields */ | ||
| 68 | #define TPS6507X_DEFDCDC2_LOW_DCDC2_MASK 0X3F | ||
| 69 | |||
| 70 | /* DEFDCDC2_HIGH bitfields */ | ||
| 71 | #define TPS6507X_DEFDCDC2_HIGH_DCDC2_MASK 0X3F | ||
| 72 | |||
| 73 | /* DEFDCDC3_LOW bitfields */ | ||
| 74 | #define TPS6507X_DEFDCDC3_LOW_DCDC3_MASK 0X3F | ||
| 75 | |||
| 76 | /* DEFDCDC3_HIGH bitfields */ | ||
| 77 | #define TPS6507X_DEFDCDC3_HIGH_DCDC3_MASK 0X3F | ||
| 78 | |||
| 79 | /* TPS6507X_REG_LDO_CTRL1 bitfields */ | ||
| 80 | #define TPS6507X_REG_LDO_CTRL1_LDO1_MASK 0X0F | ||
| 81 | |||
| 82 | /* TPS6507X_REG_DEFLDO2 bitfields */ | ||
| 83 | #define TPS6507X_REG_DEFLDO2_LDO2_MASK 0X3F | ||
| 84 | |||
| 85 | /* VDCDC MASK */ | ||
| 86 | #define TPS6507X_DEFDCDCX_DCDC_MASK 0X3F | ||
| 87 | 29 | ||
| 88 | /* DCDC's */ | 30 | /* DCDC's */ |
| 89 | #define TPS6507X_DCDC_1 0 | 31 | #define TPS6507X_DCDC_1 0 |