diff options
Diffstat (limited to 'drivers/regulator/mc13783-regulator.c')
| -rw-r--r-- | drivers/regulator/mc13783-regulator.c | 465 |
1 files changed, 435 insertions, 30 deletions
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c index 39c495300045..f7b81845a196 100644 --- a/drivers/regulator/mc13783-regulator.c +++ b/drivers/regulator/mc13783-regulator.c | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | * Regulator Driver for Freescale MC13783 PMIC | 2 | * Regulator Driver for Freescale MC13783 PMIC |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | 4 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> |
| 5 | * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | ||
| 5 | * | 6 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,11 +17,44 @@ | |||
| 16 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 17 | #include <linux/err.h> | 18 | #include <linux/err.h> |
| 18 | 19 | ||
| 19 | #define MC13783_REG_SWITCHERS4 28 | ||
| 20 | #define MC13783_REG_SWITCHERS4_PLLEN (1 << 18) | ||
| 21 | |||
| 22 | #define MC13783_REG_SWITCHERS5 29 | 20 | #define MC13783_REG_SWITCHERS5 29 |
| 23 | #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20) | 21 | #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20) |
| 22 | #define MC13783_REG_SWITCHERS5_SW3VSEL 18 | ||
| 23 | #define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18) | ||
| 24 | |||
| 25 | #define MC13783_REG_REGULATORSETTING0 30 | ||
| 26 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2 | ||
| 27 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4 | ||
| 28 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL 6 | ||
| 29 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9 | ||
| 30 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11 | ||
| 31 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13 | ||
| 32 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14 | ||
| 33 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15 | ||
| 34 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16 | ||
| 35 | |||
| 36 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2) | ||
| 37 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4) | ||
| 38 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6) | ||
| 39 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9) | ||
| 40 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11) | ||
| 41 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13) | ||
| 42 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14) | ||
| 43 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15) | ||
| 44 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16) | ||
| 45 | |||
| 46 | #define MC13783_REG_REGULATORSETTING1 31 | ||
| 47 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0 | ||
| 48 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2 | ||
| 49 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4 | ||
| 50 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6 | ||
| 51 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9 | ||
| 52 | |||
| 53 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0) | ||
| 54 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2) | ||
| 55 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4) | ||
| 56 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6) | ||
| 57 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9) | ||
| 24 | 58 | ||
| 25 | #define MC13783_REG_REGULATORMODE0 32 | 59 | #define MC13783_REG_REGULATORMODE0 32 |
| 26 | #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0) | 60 | #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0) |
| @@ -48,19 +82,107 @@ | |||
| 48 | #define MC13783_REG_POWERMISC_GPO2EN (1 << 8) | 82 | #define MC13783_REG_POWERMISC_GPO2EN (1 << 8) |
| 49 | #define MC13783_REG_POWERMISC_GPO3EN (1 << 10) | 83 | #define MC13783_REG_POWERMISC_GPO3EN (1 << 10) |
| 50 | #define MC13783_REG_POWERMISC_GPO4EN (1 << 12) | 84 | #define MC13783_REG_POWERMISC_GPO4EN (1 << 12) |
| 85 | #define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15) | ||
| 86 | #define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16) | ||
| 87 | |||
| 88 | #define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15) | ||
| 89 | |||
| 51 | 90 | ||
| 52 | struct mc13783_regulator { | 91 | struct mc13783_regulator { |
| 53 | struct regulator_desc desc; | 92 | struct regulator_desc desc; |
| 54 | int reg; | 93 | int reg; |
| 55 | int enable_bit; | 94 | int enable_bit; |
| 95 | int vsel_reg; | ||
| 96 | int vsel_shift; | ||
| 97 | int vsel_mask; | ||
| 98 | int const *voltages; | ||
| 99 | }; | ||
| 100 | |||
| 101 | /* Voltage Values */ | ||
| 102 | static const int const mc13783_sw3_val[] = { | ||
| 103 | 5000000, 5000000, 5000000, 5500000, | ||
| 104 | }; | ||
| 105 | |||
| 106 | static const int const mc13783_vaudio_val[] = { | ||
| 107 | 2775000, | ||
| 108 | }; | ||
| 109 | |||
| 110 | static const int const mc13783_viohi_val[] = { | ||
| 111 | 2775000, | ||
| 112 | }; | ||
| 113 | |||
| 114 | static const int const mc13783_violo_val[] = { | ||
| 115 | 1200000, 1300000, 1500000, 1800000, | ||
| 116 | }; | ||
| 117 | |||
| 118 | static const int const mc13783_vdig_val[] = { | ||
| 119 | 1200000, 1300000, 1500000, 1800000, | ||
| 120 | }; | ||
| 121 | |||
| 122 | static const int const mc13783_vgen_val[] = { | ||
| 123 | 1200000, 1300000, 1500000, 1800000, | ||
| 124 | 1100000, 2000000, 2775000, 2400000, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static const int const mc13783_vrfdig_val[] = { | ||
| 128 | 1200000, 1500000, 1800000, 1875000, | ||
| 129 | }; | ||
| 130 | |||
| 131 | static const int const mc13783_vrfref_val[] = { | ||
| 132 | 2475000, 2600000, 2700000, 2775000, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static const int const mc13783_vrfcp_val[] = { | ||
| 136 | 2700000, 2775000, | ||
| 137 | }; | ||
| 138 | |||
| 139 | static const int const mc13783_vsim_val[] = { | ||
| 140 | 1800000, 2900000, 3000000, | ||
| 141 | }; | ||
| 142 | |||
| 143 | static const int const mc13783_vesim_val[] = { | ||
| 144 | 1800000, 2900000, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static const int const mc13783_vcam_val[] = { | ||
| 148 | 1500000, 1800000, 2500000, 2550000, | ||
| 149 | 2600000, 2750000, 2800000, 3000000, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static const int const mc13783_vrfbg_val[] = { | ||
| 153 | 1250000, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static const int const mc13783_vvib_val[] = { | ||
| 157 | 1300000, 1800000, 2000000, 3000000, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static const int const mc13783_vmmc_val[] = { | ||
| 161 | 1600000, 1800000, 2000000, 2600000, | ||
| 162 | 2700000, 2800000, 2900000, 3000000, | ||
| 163 | }; | ||
| 164 | |||
| 165 | static const int const mc13783_vrf_val[] = { | ||
| 166 | 1500000, 1875000, 2700000, 2775000, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static const int const mc13783_gpo_val[] = { | ||
| 170 | 3100000, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static const int const mc13783_pwgtdrv_val[] = { | ||
| 174 | 5500000, | ||
| 56 | }; | 175 | }; |
| 57 | 176 | ||
| 58 | static struct regulator_ops mc13783_regulator_ops; | 177 | static struct regulator_ops mc13783_regulator_ops; |
| 178 | static struct regulator_ops mc13783_fixed_regulator_ops; | ||
| 179 | static struct regulator_ops mc13783_gpo_regulator_ops; | ||
| 59 | 180 | ||
| 60 | #define MC13783_DEFINE(prefix, _name, _reg) \ | 181 | #define MC13783_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages) \ |
| 61 | [MC13783_ ## prefix ## _ ## _name] = { \ | 182 | [MC13783_ ## prefix ## _ ## _name] = { \ |
| 62 | .desc = { \ | 183 | .desc = { \ |
| 63 | .name = #prefix "_" #_name, \ | 184 | .name = #prefix "_" #_name, \ |
| 185 | .n_voltages = ARRAY_SIZE(_voltages), \ | ||
| 64 | .ops = &mc13783_regulator_ops, \ | 186 | .ops = &mc13783_regulator_ops, \ |
| 65 | .type = REGULATOR_VOLTAGE, \ | 187 | .type = REGULATOR_VOLTAGE, \ |
| 66 | .id = MC13783_ ## prefix ## _ ## _name, \ | 188 | .id = MC13783_ ## prefix ## _ ## _name, \ |
| @@ -68,40 +190,92 @@ static struct regulator_ops mc13783_regulator_ops; | |||
| 68 | }, \ | 190 | }, \ |
| 69 | .reg = MC13783_REG_ ## _reg, \ | 191 | .reg = MC13783_REG_ ## _reg, \ |
| 70 | .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \ | 192 | .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \ |
| 193 | .vsel_reg = MC13783_REG_ ## _vsel_reg, \ | ||
| 194 | .vsel_shift = MC13783_REG_ ## _vsel_reg ## _ ## _name ## VSEL,\ | ||
| 195 | .vsel_mask = MC13783_REG_ ## _vsel_reg ## _ ## _name ## VSEL_M,\ | ||
| 196 | .voltages = _voltages, \ | ||
| 197 | } | ||
| 198 | |||
| 199 | #define MC13783_FIXED_DEFINE(prefix, _name, _reg, _voltages) \ | ||
| 200 | [MC13783_ ## prefix ## _ ## _name] = { \ | ||
| 201 | .desc = { \ | ||
| 202 | .name = #prefix "_" #_name, \ | ||
| 203 | .n_voltages = ARRAY_SIZE(_voltages), \ | ||
| 204 | .ops = &mc13783_fixed_regulator_ops, \ | ||
| 205 | .type = REGULATOR_VOLTAGE, \ | ||
| 206 | .id = MC13783_ ## prefix ## _ ## _name, \ | ||
| 207 | .owner = THIS_MODULE, \ | ||
| 208 | }, \ | ||
| 209 | .reg = MC13783_REG_ ## _reg, \ | ||
| 210 | .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \ | ||
| 211 | .voltages = _voltages, \ | ||
| 71 | } | 212 | } |
| 72 | 213 | ||
| 73 | #define MC13783_DEFINE_SW(_name, _reg) MC13783_DEFINE(SW, _name, _reg) | 214 | #define MC13783_GPO_DEFINE(prefix, _name, _reg, _voltages) \ |
| 74 | #define MC13783_DEFINE_REGU(_name, _reg) MC13783_DEFINE(REGU, _name, _reg) | 215 | [MC13783_ ## prefix ## _ ## _name] = { \ |
| 216 | .desc = { \ | ||
| 217 | .name = #prefix "_" #_name, \ | ||
| 218 | .n_voltages = ARRAY_SIZE(_voltages), \ | ||
| 219 | .ops = &mc13783_gpo_regulator_ops, \ | ||
| 220 | .type = REGULATOR_VOLTAGE, \ | ||
| 221 | .id = MC13783_ ## prefix ## _ ## _name, \ | ||
| 222 | .owner = THIS_MODULE, \ | ||
| 223 | }, \ | ||
| 224 | .reg = MC13783_REG_ ## _reg, \ | ||
| 225 | .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \ | ||
| 226 | .voltages = _voltages, \ | ||
| 227 | } | ||
| 228 | |||
| 229 | #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \ | ||
| 230 | MC13783_DEFINE(SW, _name, _reg, _vsel_reg, _voltages) | ||
| 231 | #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \ | ||
| 232 | MC13783_DEFINE(REGU, _name, _reg, _vsel_reg, _voltages) | ||
| 75 | 233 | ||
| 76 | static struct mc13783_regulator mc13783_regulators[] = { | 234 | static struct mc13783_regulator mc13783_regulators[] = { |
| 77 | MC13783_DEFINE_SW(SW3, SWITCHERS5), | 235 | MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), |
| 78 | MC13783_DEFINE_SW(PLL, SWITCHERS4), | 236 | |
| 79 | 237 | MC13783_FIXED_DEFINE(REGU, VAUDIO, REGULATORMODE0, mc13783_vaudio_val), | |
| 80 | MC13783_DEFINE_REGU(VAUDIO, REGULATORMODE0), | 238 | MC13783_FIXED_DEFINE(REGU, VIOHI, REGULATORMODE0, mc13783_viohi_val), |
| 81 | MC13783_DEFINE_REGU(VIOHI, REGULATORMODE0), | 239 | MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \ |
| 82 | MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0), | 240 | mc13783_violo_val), |
| 83 | MC13783_DEFINE_REGU(VDIG, REGULATORMODE0), | 241 | MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \ |
| 84 | MC13783_DEFINE_REGU(VGEN, REGULATORMODE0), | 242 | mc13783_vdig_val), |
| 85 | MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0), | 243 | MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \ |
| 86 | MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0), | 244 | mc13783_vgen_val), |
| 87 | MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0), | 245 | MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \ |
| 88 | MC13783_DEFINE_REGU(VSIM, REGULATORMODE1), | 246 | mc13783_vrfdig_val), |
| 89 | MC13783_DEFINE_REGU(VESIM, REGULATORMODE1), | 247 | MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \ |
| 90 | MC13783_DEFINE_REGU(VCAM, REGULATORMODE1), | 248 | mc13783_vrfref_val), |
| 91 | MC13783_DEFINE_REGU(VRFBG, REGULATORMODE1), | 249 | MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \ |
| 92 | MC13783_DEFINE_REGU(VVIB, REGULATORMODE1), | 250 | mc13783_vrfcp_val), |
| 93 | MC13783_DEFINE_REGU(VRF1, REGULATORMODE1), | 251 | MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \ |
| 94 | MC13783_DEFINE_REGU(VRF2, REGULATORMODE1), | 252 | mc13783_vsim_val), |
| 95 | MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1), | 253 | MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \ |
| 96 | MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1), | 254 | mc13783_vesim_val), |
| 97 | MC13783_DEFINE_REGU(GPO1, POWERMISC), | 255 | MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \ |
| 98 | MC13783_DEFINE_REGU(GPO2, POWERMISC), | 256 | mc13783_vcam_val), |
| 99 | MC13783_DEFINE_REGU(GPO3, POWERMISC), | 257 | MC13783_FIXED_DEFINE(REGU, VRFBG, REGULATORMODE1, mc13783_vrfbg_val), |
| 100 | MC13783_DEFINE_REGU(GPO4, POWERMISC), | 258 | MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \ |
| 259 | mc13783_vvib_val), | ||
| 260 | MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \ | ||
| 261 | mc13783_vrf_val), | ||
| 262 | MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \ | ||
| 263 | mc13783_vrf_val), | ||
| 264 | MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \ | ||
| 265 | mc13783_vmmc_val), | ||
| 266 | MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \ | ||
| 267 | mc13783_vmmc_val), | ||
| 268 | MC13783_GPO_DEFINE(REGU, GPO1, POWERMISC, mc13783_gpo_val), | ||
| 269 | MC13783_GPO_DEFINE(REGU, GPO2, POWERMISC, mc13783_gpo_val), | ||
| 270 | MC13783_GPO_DEFINE(REGU, GPO3, POWERMISC, mc13783_gpo_val), | ||
| 271 | MC13783_GPO_DEFINE(REGU, GPO4, POWERMISC, mc13783_gpo_val), | ||
| 272 | MC13783_GPO_DEFINE(REGU, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val), | ||
| 273 | MC13783_GPO_DEFINE(REGU, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val), | ||
| 101 | }; | 274 | }; |
| 102 | 275 | ||
| 103 | struct mc13783_regulator_priv { | 276 | struct mc13783_regulator_priv { |
| 104 | struct mc13783 *mc13783; | 277 | struct mc13783 *mc13783; |
| 278 | u32 powermisc_pwgt_state; | ||
| 105 | struct regulator_dev *regulators[]; | 279 | struct regulator_dev *regulators[]; |
| 106 | }; | 280 | }; |
| 107 | 281 | ||
| @@ -154,10 +328,241 @@ static int mc13783_regulator_is_enabled(struct regulator_dev *rdev) | |||
| 154 | return (val & mc13783_regulators[id].enable_bit) != 0; | 328 | return (val & mc13783_regulators[id].enable_bit) != 0; |
| 155 | } | 329 | } |
| 156 | 330 | ||
| 331 | static int mc13783_regulator_list_voltage(struct regulator_dev *rdev, | ||
| 332 | unsigned selector) | ||
| 333 | { | ||
| 334 | int id = rdev_get_id(rdev); | ||
| 335 | |||
| 336 | if (selector >= mc13783_regulators[id].desc.n_voltages) | ||
| 337 | return -EINVAL; | ||
| 338 | |||
| 339 | return mc13783_regulators[id].voltages[selector]; | ||
| 340 | } | ||
| 341 | |||
| 342 | static int mc13783_get_best_voltage_index(struct regulator_dev *rdev, | ||
| 343 | int min_uV, int max_uV) | ||
| 344 | { | ||
| 345 | int reg_id = rdev_get_id(rdev); | ||
| 346 | int i; | ||
| 347 | int bestmatch; | ||
| 348 | int bestindex; | ||
| 349 | |||
| 350 | /* | ||
| 351 | * Locate the minimum voltage fitting the criteria on | ||
| 352 | * this regulator. The switchable voltages are not | ||
| 353 | * in strict falling order so we need to check them | ||
| 354 | * all for the best match. | ||
| 355 | */ | ||
| 356 | bestmatch = INT_MAX; | ||
| 357 | bestindex = -1; | ||
| 358 | for (i = 0; i < mc13783_regulators[reg_id].desc.n_voltages; i++) { | ||
| 359 | if (mc13783_regulators[reg_id].voltages[i] >= min_uV && | ||
| 360 | mc13783_regulators[reg_id].voltages[i] < bestmatch) { | ||
| 361 | bestmatch = mc13783_regulators[reg_id].voltages[i]; | ||
| 362 | bestindex = i; | ||
| 363 | } | ||
| 364 | } | ||
| 365 | |||
| 366 | if (bestindex < 0 || bestmatch > max_uV) { | ||
| 367 | dev_warn(&rdev->dev, "no possible value for %d<=x<=%d uV\n", | ||
| 368 | min_uV, max_uV); | ||
| 369 | return -EINVAL; | ||
| 370 | } | ||
| 371 | return bestindex; | ||
| 372 | } | ||
| 373 | |||
| 374 | static int mc13783_regulator_set_voltage(struct regulator_dev *rdev, | ||
| 375 | int min_uV, int max_uV) | ||
| 376 | { | ||
| 377 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
| 378 | int value, id = rdev_get_id(rdev); | ||
| 379 | int ret; | ||
| 380 | |||
| 381 | dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n", | ||
| 382 | __func__, id, min_uV, max_uV); | ||
| 383 | |||
| 384 | /* Find the best index */ | ||
| 385 | value = mc13783_get_best_voltage_index(rdev, min_uV, max_uV); | ||
| 386 | dev_dbg(rdev_get_dev(rdev), "%s best value: %d \n", __func__, value); | ||
| 387 | if (value < 0) | ||
| 388 | return value; | ||
| 389 | |||
| 390 | mc13783_lock(priv->mc13783); | ||
| 391 | ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].vsel_reg, | ||
| 392 | mc13783_regulators[id].vsel_mask, | ||
| 393 | value << mc13783_regulators[id].vsel_shift); | ||
| 394 | mc13783_unlock(priv->mc13783); | ||
| 395 | |||
| 396 | return ret; | ||
| 397 | } | ||
| 398 | |||
| 399 | static int mc13783_regulator_get_voltage(struct regulator_dev *rdev) | ||
| 400 | { | ||
| 401 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
| 402 | int ret, id = rdev_get_id(rdev); | ||
| 403 | unsigned int val; | ||
| 404 | |||
| 405 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 406 | |||
| 407 | mc13783_lock(priv->mc13783); | ||
| 408 | ret = mc13783_reg_read(priv->mc13783, | ||
| 409 | mc13783_regulators[id].vsel_reg, &val); | ||
| 410 | mc13783_unlock(priv->mc13783); | ||
| 411 | |||
| 412 | if (ret) | ||
| 413 | return ret; | ||
| 414 | |||
| 415 | val = (val & mc13783_regulators[id].vsel_mask) | ||
| 416 | >> mc13783_regulators[id].vsel_shift; | ||
| 417 | |||
| 418 | dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val); | ||
| 419 | |||
| 420 | BUG_ON(val < 0 || val > mc13783_regulators[id].desc.n_voltages); | ||
| 421 | |||
| 422 | return mc13783_regulators[id].voltages[val]; | ||
| 423 | } | ||
| 424 | |||
| 157 | static struct regulator_ops mc13783_regulator_ops = { | 425 | static struct regulator_ops mc13783_regulator_ops = { |
| 158 | .enable = mc13783_regulator_enable, | 426 | .enable = mc13783_regulator_enable, |
| 159 | .disable = mc13783_regulator_disable, | 427 | .disable = mc13783_regulator_disable, |
| 160 | .is_enabled = mc13783_regulator_is_enabled, | 428 | .is_enabled = mc13783_regulator_is_enabled, |
| 429 | .list_voltage = mc13783_regulator_list_voltage, | ||
| 430 | .set_voltage = mc13783_regulator_set_voltage, | ||
| 431 | .get_voltage = mc13783_regulator_get_voltage, | ||
| 432 | }; | ||
| 433 | |||
| 434 | static int mc13783_fixed_regulator_set_voltage(struct regulator_dev *rdev, | ||
| 435 | int min_uV, int max_uV) | ||
| 436 | { | ||
| 437 | int id = rdev_get_id(rdev); | ||
| 438 | |||
| 439 | dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n", | ||
| 440 | __func__, id, min_uV, max_uV); | ||
| 441 | |||
| 442 | if (min_uV > mc13783_regulators[id].voltages[0] && | ||
| 443 | max_uV < mc13783_regulators[id].voltages[0]) | ||
| 444 | return 0; | ||
| 445 | else | ||
| 446 | return -EINVAL; | ||
| 447 | } | ||
| 448 | |||
| 449 | static int mc13783_fixed_regulator_get_voltage(struct regulator_dev *rdev) | ||
| 450 | { | ||
| 451 | int id = rdev_get_id(rdev); | ||
| 452 | |||
| 453 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 454 | |||
| 455 | return mc13783_regulators[id].voltages[0]; | ||
| 456 | } | ||
| 457 | |||
| 458 | static struct regulator_ops mc13783_fixed_regulator_ops = { | ||
| 459 | .enable = mc13783_regulator_enable, | ||
| 460 | .disable = mc13783_regulator_disable, | ||
| 461 | .is_enabled = mc13783_regulator_is_enabled, | ||
| 462 | .list_voltage = mc13783_regulator_list_voltage, | ||
| 463 | .set_voltage = mc13783_fixed_regulator_set_voltage, | ||
| 464 | .get_voltage = mc13783_fixed_regulator_get_voltage, | ||
| 465 | }; | ||
| 466 | |||
| 467 | int mc13783_powermisc_rmw(struct mc13783_regulator_priv *priv, u32 mask, | ||
| 468 | u32 val) | ||
| 469 | { | ||
| 470 | struct mc13783 *mc13783 = priv->mc13783; | ||
| 471 | int ret; | ||
| 472 | u32 valread; | ||
| 473 | |||
| 474 | BUG_ON(val & ~mask); | ||
| 475 | |||
| 476 | ret = mc13783_reg_read(mc13783, MC13783_REG_POWERMISC, &valread); | ||
| 477 | if (ret) | ||
| 478 | return ret; | ||
| 479 | |||
| 480 | /* Update the stored state for Power Gates. */ | ||
| 481 | priv->powermisc_pwgt_state = | ||
| 482 | (priv->powermisc_pwgt_state & ~mask) | val; | ||
| 483 | priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M; | ||
| 484 | |||
| 485 | /* Construct the new register value */ | ||
| 486 | valread = (valread & ~mask) | val; | ||
| 487 | /* Overwrite the PWGTxEN with the stored version */ | ||
| 488 | valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) | | ||
| 489 | priv->powermisc_pwgt_state; | ||
| 490 | |||
| 491 | return mc13783_reg_write(mc13783, MC13783_REG_POWERMISC, valread); | ||
| 492 | } | ||
| 493 | |||
| 494 | static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev) | ||
| 495 | { | ||
| 496 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
| 497 | int id = rdev_get_id(rdev); | ||
| 498 | int ret; | ||
| 499 | u32 en_val = mc13783_regulators[id].enable_bit; | ||
| 500 | |||
| 501 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 502 | |||
| 503 | /* Power Gate enable value is 0 */ | ||
| 504 | if (id == MC13783_REGU_PWGT1SPI || | ||
| 505 | id == MC13783_REGU_PWGT2SPI) | ||
| 506 | en_val = 0; | ||
| 507 | |||
| 508 | mc13783_lock(priv->mc13783); | ||
| 509 | ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit, | ||
| 510 | en_val); | ||
| 511 | mc13783_unlock(priv->mc13783); | ||
| 512 | |||
| 513 | return ret; | ||
| 514 | } | ||
| 515 | |||
| 516 | static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev) | ||
| 517 | { | ||
| 518 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
| 519 | int id = rdev_get_id(rdev); | ||
| 520 | int ret; | ||
| 521 | u32 dis_val = 0; | ||
| 522 | |||
| 523 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 524 | |||
| 525 | /* Power Gate disable value is 1 */ | ||
| 526 | if (id == MC13783_REGU_PWGT1SPI || | ||
| 527 | id == MC13783_REGU_PWGT2SPI) | ||
| 528 | dis_val = mc13783_regulators[id].enable_bit; | ||
| 529 | |||
| 530 | mc13783_lock(priv->mc13783); | ||
| 531 | ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit, | ||
| 532 | dis_val); | ||
| 533 | mc13783_unlock(priv->mc13783); | ||
| 534 | |||
| 535 | return ret; | ||
| 536 | } | ||
| 537 | |||
| 538 | static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev) | ||
| 539 | { | ||
| 540 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
| 541 | int ret, id = rdev_get_id(rdev); | ||
| 542 | unsigned int val; | ||
| 543 | |||
| 544 | mc13783_lock(priv->mc13783); | ||
| 545 | ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val); | ||
| 546 | mc13783_unlock(priv->mc13783); | ||
| 547 | |||
| 548 | if (ret) | ||
| 549 | return ret; | ||
| 550 | |||
| 551 | /* Power Gates state is stored in powermisc_pwgt_state | ||
| 552 | * where the meaning of bits is negated */ | ||
| 553 | val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) | | ||
| 554 | (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M); | ||
| 555 | |||
| 556 | return (val & mc13783_regulators[id].enable_bit) != 0; | ||
| 557 | } | ||
| 558 | |||
| 559 | static struct regulator_ops mc13783_gpo_regulator_ops = { | ||
| 560 | .enable = mc13783_gpo_regulator_enable, | ||
| 561 | .disable = mc13783_gpo_regulator_disable, | ||
| 562 | .is_enabled = mc13783_gpo_regulator_is_enabled, | ||
| 563 | .list_voltage = mc13783_regulator_list_voltage, | ||
| 564 | .set_voltage = mc13783_fixed_regulator_set_voltage, | ||
| 565 | .get_voltage = mc13783_fixed_regulator_get_voltage, | ||
| 161 | }; | 566 | }; |
| 162 | 567 | ||
| 163 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) | 568 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) |
