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path: root/drivers/ps3/ps3-lpm.c
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Diffstat (limited to 'drivers/ps3/ps3-lpm.c')
-rw-r--r--drivers/ps3/ps3-lpm.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/ps3/ps3-lpm.c b/drivers/ps3/ps3-lpm.c
index 8a0b16bad8e9..6c9592ce4996 100644
--- a/drivers/ps3/ps3-lpm.c
+++ b/drivers/ps3/ps3-lpm.c
@@ -76,7 +76,6 @@
76 * 76 *
77 * @pm_control: Shadow of the processor's pm_control register. 77 * @pm_control: Shadow of the processor's pm_control register.
78 * @pm_start_stop: Shadow of the processor's pm_start_stop register. 78 * @pm_start_stop: Shadow of the processor's pm_start_stop register.
79 * @pm_interval: Shadow of the processor's pm_interval register.
80 * @group_control: Shadow of the processor's group_control register. 79 * @group_control: Shadow of the processor's group_control register.
81 * @debug_bus_control: Shadow of the processor's debug_bus_control register. 80 * @debug_bus_control: Shadow of the processor's debug_bus_control register.
82 * 81 *
@@ -91,7 +90,6 @@
91struct ps3_lpm_shadow_regs { 90struct ps3_lpm_shadow_regs {
92 u64 pm_control; 91 u64 pm_control;
93 u64 pm_start_stop; 92 u64 pm_start_stop;
94 u64 pm_interval;
95 u64 group_control; 93 u64 group_control;
96 u64 debug_bus_control; 94 u64 debug_bus_control;
97}; 95};
@@ -408,7 +406,14 @@ u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg)
408 case pm_start_stop: 406 case pm_start_stop:
409 return lpm_priv->shadow.pm_start_stop; 407 return lpm_priv->shadow.pm_start_stop;
410 case pm_interval: 408 case pm_interval:
411 return lpm_priv->shadow.pm_interval; 409 result = lv1_set_lpm_interval(lpm_priv->lpm_id, 0, 0, &val);
410 if (result) {
411 val = 0;
412 dev_dbg(sbd_core(), "%s:%u: lv1 set_inteval failed: "
413 "reg %u, %s\n", __func__, __LINE__, reg,
414 ps3_result(result));
415 }
416 return (u32)val;
412 case group_control: 417 case group_control:
413 return lpm_priv->shadow.group_control; 418 return lpm_priv->shadow.group_control;
414 case debug_bus_control: 419 case debug_bus_control:
@@ -475,10 +480,8 @@ void ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val)
475 lpm_priv->shadow.pm_control = val; 480 lpm_priv->shadow.pm_control = val;
476 break; 481 break;
477 case pm_interval: 482 case pm_interval:
478 if (val != lpm_priv->shadow.pm_interval) 483 result = lv1_set_lpm_interval(lpm_priv->lpm_id, val,
479 result = lv1_set_lpm_interval(lpm_priv->lpm_id, val, 484 PS3_WRITE_PM_MASK, &dummy);
480 PS3_WRITE_PM_MASK, &dummy);
481 lpm_priv->shadow.pm_interval = val;
482 break; 485 break;
483 case pm_start_stop: 486 case pm_start_stop:
484 if (val != lpm_priv->shadow.pm_start_stop) 487 if (val != lpm_priv->shadow.pm_start_stop)
@@ -1140,7 +1143,6 @@ int ps3_lpm_open(enum ps3_lpm_tb_type tb_type, void *tb_cache,
1140 1143
1141 lpm_priv->shadow.pm_control = PS3_LPM_SHADOW_REG_INIT; 1144 lpm_priv->shadow.pm_control = PS3_LPM_SHADOW_REG_INIT;
1142 lpm_priv->shadow.pm_start_stop = PS3_LPM_SHADOW_REG_INIT; 1145 lpm_priv->shadow.pm_start_stop = PS3_LPM_SHADOW_REG_INIT;
1143 lpm_priv->shadow.pm_interval = PS3_LPM_SHADOW_REG_INIT;
1144 lpm_priv->shadow.group_control = PS3_LPM_SHADOW_REG_INIT; 1146 lpm_priv->shadow.group_control = PS3_LPM_SHADOW_REG_INIT;
1145 lpm_priv->shadow.debug_bus_control = PS3_LPM_SHADOW_REG_INIT; 1147 lpm_priv->shadow.debug_bus_control = PS3_LPM_SHADOW_REG_INIT;
1146 1148