8 files changed, 84 insertions, 22 deletions

diff --git a/drivers/pinctrl/nomadik/pinctrl-abx500.c b/drivers/pinctrl/nomadik/pinctrl-abx500.c
index a53a689a2bfa..8c6fd8d4dd3c 100644
--- a/drivers/pinctrl/nomadik/pinctrl-abx500.c
+++ b/drivers/pinctrl/nomadik/pinctrl-abx500.c
@@ -620,8 +620,7 @@ static void abx500_gpio_dbg_show_one(struct seq_file *s,
         } else
                 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 
-        if (pctldev)
-                mode = abx500_get_mode(pctldev, chip, offset);
+        mode = abx500_get_mode(pctldev, chip, offset);
 
         seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index af1ba4fc150d..60464a2648aa 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -497,10 +497,10 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
 static void at91_pin_dbg(const struct device *dev, const struct at91_pmx_pin *pin)
 {
         if (pin->mux) {
-                dev_dbg(dev, "pio%c%d configured as periph%c with conf = 0x%lu\n",
+                dev_dbg(dev, "pio%c%d configured as periph%c with conf = 0x%lx\n",
                         pin->bank + 'A', pin->pin, pin->mux - 1 + 'A', pin->conf);
         } else {
-                dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lu\n",
+                dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lx\n",
                         pin->bank + 'A', pin->pin, pin->conf);
         }
 }
diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
index 9ca59a018743..e12e5b07f6d7 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -461,6 +461,7 @@ static struct irq_chip byt_irqchip = {
         .irq_mask = byt_irq_mask,
         .irq_unmask = byt_irq_unmask,
         .irq_set_type = byt_irq_type,
+        .flags = IRQCHIP_SKIP_SET_WAKE,
 };
 
 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 5e8b2e04cd7a..0c372a300cb8 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -438,7 +438,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
         int reg, ret, mask;
         unsigned long flags;
         u8 bit;
-        u32 data;
+        u32 data, rmask;
 
         if (iomux_num > 3)
                 return -EINVAL;
@@ -478,8 +478,9 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
         spin_lock_irqsave(&bank->slock, flags);
 
         data = (mask << (bit + 16));
+        rmask = data | (data >> 16);
         data |= (mux & mask) << bit;
-        ret = regmap_write(regmap, reg, data);
+        ret = regmap_update_bits(regmap, reg, rmask, data);
 
         spin_unlock_irqrestore(&bank->slock, flags);
 
@@ -634,7 +635,7 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank, int pin_num,
         struct regmap *regmap;
         unsigned long flags;
         int reg, ret, i;
-        u32 data;
+        u32 data, rmask;
         u8 bit;
 
         rk3288_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
@@ -657,9 +658,10 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank, int pin_num,
 
         /* enable the write to the equivalent lower bits */
         data = ((1 << RK3288_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+        rmask = data | (data >> 16);
         data |= (ret << bit);
 
-        ret = regmap_write(regmap, reg, data);
+        ret = regmap_update_bits(regmap, reg, rmask, data);
         spin_unlock_irqrestore(&bank->slock, flags);
 
         return ret;
@@ -722,7 +724,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
         int reg, ret;
         unsigned long flags;
         u8 bit;
-        u32 data;
+        u32 data, rmask;
 
         dev_dbg(info->dev, "setting pull of GPIO%d-%d to %d\n",
                  bank->bank_num, pin_num, pull);
@@ -750,6 +752,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 
                 /* enable the write to the equivalent lower bits */
                 data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+                rmask = data | (data >> 16);
 
                 switch (pull) {
                 case PIN_CONFIG_BIAS_DISABLE:
@@ -770,7 +773,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
                         return -EINVAL;
                 }
 
-                ret = regmap_write(regmap, reg, data);
+                ret = regmap_update_bits(regmap, reg, rmask, data);
 
                 spin_unlock_irqrestore(&bank->slock, flags);
                 break;
diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c b/drivers/pinctrl/pinctrl-tegra-xusb.c
index a06620474845..e641b4226c42 100644
--- a/drivers/pinctrl/pinctrl-tegra-xusb.c
+++ b/drivers/pinctrl/pinctrl-tegra-xusb.c
@@ -680,7 +680,7 @@ static struct phy *tegra_xusb_padctl_xlate(struct device *dev,
         if (args->args_count <= 0)
                 return ERR_PTR(-EINVAL);
 
-        if (index > ARRAY_SIZE(padctl->phys))
+        if (index >= ARRAY_SIZE(padctl->phys))
                 return ERR_PTR(-EINVAL);
 
         return padctl->phys[index];
@@ -930,7 +930,8 @@ static int tegra_xusb_padctl_probe(struct platform_device *pdev)
 
         padctl->provider = devm_of_phy_provider_register(&pdev->dev,
                                                          tegra_xusb_padctl_xlate);
-        if (err < 0) {
+        if (IS_ERR(padctl->provider)) {
+                err = PTR_ERR(padctl->provider);
                 dev_err(&pdev->dev, "failed to register PHYs: %d\n", err);
                 goto unregister;
         }
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 003bfd874a61..d7154ed0b0eb 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -127,14 +127,10 @@ static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
         struct irq_chip *chip = irq_data_get_irq_chip(irqd);
         struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
         struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
-        struct samsung_pin_bank_type *bank_type = bank->type;
         struct samsung_pinctrl_drv_data *d = bank->drvdata;
-        unsigned int pin = irqd->hwirq;
-        unsigned int shift = EXYNOS_EINT_CON_LEN * pin;
+        unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
         unsigned int con, trig_type;
         unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
-        unsigned long flags;
-        unsigned int mask;
 
         switch (type) {
         case IRQ_TYPE_EDGE_RISING:
@@ -167,8 +163,32 @@ static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
         con |= trig_type << shift;
         writel(con, d->virt_base + reg_con);
 
+        return 0;
+}
+
+static int exynos_irq_request_resources(struct irq_data *irqd)
+{
+        struct irq_chip *chip = irq_data_get_irq_chip(irqd);
+        struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
+        struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
+        struct samsung_pin_bank_type *bank_type = bank->type;
+        struct samsung_pinctrl_drv_data *d = bank->drvdata;
+        unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
+        unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
+        unsigned long flags;
+        unsigned int mask;
+        unsigned int con;
+        int ret;
+
+        ret = gpio_lock_as_irq(&bank->gpio_chip, irqd->hwirq);
+        if (ret) {
+                dev_err(bank->gpio_chip.dev, "unable to lock pin %s-%lu IRQ\n",
+                        bank->name, irqd->hwirq);
+                return ret;
+        }
+
         reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC];
-        shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC];
+        shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];
         mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 
         spin_lock_irqsave(&bank->slock, flags);
@@ -180,9 +200,42 @@ static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type)
 
         spin_unlock_irqrestore(&bank->slock, flags);
 
+        exynos_irq_unmask(irqd);
+
         return 0;
 }
 
+static void exynos_irq_release_resources(struct irq_data *irqd)
+{
+        struct irq_chip *chip = irq_data_get_irq_chip(irqd);
+        struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
+        struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
+        struct samsung_pin_bank_type *bank_type = bank->type;
+        struct samsung_pinctrl_drv_data *d = bank->drvdata;
+        unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
+        unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
+        unsigned long flags;
+        unsigned int mask;
+        unsigned int con;
+
+        reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC];
+        shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];
+        mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1;
+
+        exynos_irq_mask(irqd);
+
+        spin_lock_irqsave(&bank->slock, flags);
+
+        con = readl(d->virt_base + reg_con);
+        con &= ~(mask << shift);
+        con |= FUNC_INPUT << shift;
+        writel(con, d->virt_base + reg_con);
+
+        spin_unlock_irqrestore(&bank->slock, flags);
+
+        gpio_unlock_as_irq(&bank->gpio_chip, irqd->hwirq);
+}
+
 /*
  * irq_chip for gpio interrupts.
  */
@@ -193,6 +246,8 @@ static struct exynos_irq_chip exynos_gpio_irq_chip = {
                 .irq_mask = exynos_irq_mask,
                 .irq_ack = exynos_irq_ack,
                 .irq_set_type = exynos_irq_set_type,
+                .irq_request_resources = exynos_irq_request_resources,
+                .irq_release_resources = exynos_irq_release_resources,
         },
         .eint_con = EXYNOS_GPIO_ECON_OFFSET,
         .eint_mask = EXYNOS_GPIO_EMASK_OFFSET,
@@ -336,6 +391,8 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
                 .irq_ack = exynos_irq_ack,
                 .irq_set_type = exynos_irq_set_type,
                 .irq_set_wake = exynos_wkup_irq_set_wake,
+                .irq_request_resources = exynos_irq_request_resources,
+                .irq_release_resources = exynos_irq_release_resources,
         },
         .eint_con = EXYNOS_WKUP_ECON_OFFSET,
         .eint_mask = EXYNOS_WKUP_EMASK_OFFSET,
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 2b882320e8e9..5cedc9d26390 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -26,6 +26,7 @@
 #include <linux/gpio.h>
 
 /* pinmux function number for pin as gpio output line */
+#define FUNC_INPUT      0x0
 #define FUNC_OUTPUT     0x1
 
 /**
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 576d41b459e9..c6e5deba238e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -4509,24 +4509,24 @@ static const char * const audio_clk_groups[] = {
 };
 
 static const char * const can0_groups[] = {
-        "can0_data_a",
+        "can0_data",
         "can0_data_b",
         "can0_data_c",
         "can0_data_d",
         "can0_data_e",
         "can0_data_f",
-        "can_clk_a",
+        "can_clk",
         "can_clk_b",
         "can_clk_c",
         "can_clk_d",
 };
 
 static const char * const can1_groups[] = {
-        "can1_data_a",
+        "can1_data",
         "can1_data_b",
         "can1_data_c",
         "can1_data_d",
-        "can_clk_a",
+        "can_clk",
         "can_clk_b",
         "can_clk_c",
         "can_clk_d",