diff options
Diffstat (limited to 'drivers/pinctrl/mvebu')
-rw-r--r-- | drivers/pinctrl/mvebu/pinctrl-mvebu.c | 49 |
1 files changed, 2 insertions, 47 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index 45e99e80502f..9908374f8f92 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c | |||
@@ -50,7 +50,6 @@ struct mvebu_pinctrl { | |||
50 | struct device *dev; | 50 | struct device *dev; |
51 | struct pinctrl_dev *pctldev; | 51 | struct pinctrl_dev *pctldev; |
52 | struct pinctrl_desc desc; | 52 | struct pinctrl_desc desc; |
53 | void __iomem *base; | ||
54 | struct mvebu_pinctrl_group *groups; | 53 | struct mvebu_pinctrl_group *groups; |
55 | unsigned num_groups; | 54 | unsigned num_groups; |
56 | struct mvebu_pinctrl_function *functions; | 55 | struct mvebu_pinctrl_function *functions; |
@@ -138,43 +137,6 @@ static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name( | |||
138 | return NULL; | 137 | return NULL; |
139 | } | 138 | } |
140 | 139 | ||
141 | /* | ||
142 | * Common mpp pin configuration registers on MVEBU are | ||
143 | * registers of eight 4-bit values for each mpp setting. | ||
144 | * Register offset and bit mask are calculated accordingly below. | ||
145 | */ | ||
146 | static int mvebu_common_mpp_get(struct mvebu_pinctrl *pctl, | ||
147 | struct mvebu_pinctrl_group *grp, | ||
148 | unsigned long *config) | ||
149 | { | ||
150 | unsigned pin = grp->gid; | ||
151 | unsigned off = (pin / MPPS_PER_REG) * MPP_BITS; | ||
152 | unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS; | ||
153 | |||
154 | *config = readl(pctl->base + off); | ||
155 | *config >>= shift; | ||
156 | *config &= MPP_MASK; | ||
157 | |||
158 | return 0; | ||
159 | } | ||
160 | |||
161 | static int mvebu_common_mpp_set(struct mvebu_pinctrl *pctl, | ||
162 | struct mvebu_pinctrl_group *grp, | ||
163 | unsigned long config) | ||
164 | { | ||
165 | unsigned pin = grp->gid; | ||
166 | unsigned off = (pin / MPPS_PER_REG) * MPP_BITS; | ||
167 | unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS; | ||
168 | unsigned long reg; | ||
169 | |||
170 | reg = readl(pctl->base + off); | ||
171 | reg &= ~(MPP_MASK << shift); | ||
172 | reg |= (config << shift); | ||
173 | writel(reg, pctl->base + off); | ||
174 | |||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, | 140 | static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, |
179 | unsigned gid, unsigned long *config) | 141 | unsigned gid, unsigned long *config) |
180 | { | 142 | { |
@@ -184,10 +146,7 @@ static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, | |||
184 | if (!grp->ctrl) | 146 | if (!grp->ctrl) |
185 | return -EINVAL; | 147 | return -EINVAL; |
186 | 148 | ||
187 | if (grp->ctrl->mpp_get) | 149 | return grp->ctrl->mpp_get(grp->pins[0], config); |
188 | return grp->ctrl->mpp_get(grp->pins[0], config); | ||
189 | |||
190 | return mvebu_common_mpp_get(pctl, grp, config); | ||
191 | } | 150 | } |
192 | 151 | ||
193 | static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, | 152 | static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, |
@@ -202,11 +161,7 @@ static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, | |||
202 | return -EINVAL; | 161 | return -EINVAL; |
203 | 162 | ||
204 | for (i = 0; i < num_configs; i++) { | 163 | for (i = 0; i < num_configs; i++) { |
205 | if (grp->ctrl->mpp_set) | 164 | ret = grp->ctrl->mpp_set(grp->pins[0], configs[i]); |
206 | ret = grp->ctrl->mpp_set(grp->pins[0], configs[i]); | ||
207 | else | ||
208 | ret = mvebu_common_mpp_set(pctl, grp, configs[i]); | ||
209 | |||
210 | if (ret) | 165 | if (ret) |
211 | return ret; | 166 | return ret; |
212 | } /* for each config */ | 167 | } /* for each config */ |