4 files changed, 13 insertions, 10 deletions

diff --git a/drivers/phy/phy-miphy28lp.c b/drivers/phy/phy-miphy28lp.c
index e34da13885e8..27fa62ce6136 100644
--- a/drivers/phy/phy-miphy28lp.c
+++ b/drivers/phy/phy-miphy28lp.c
@@ -1050,7 +1050,8 @@ static int miphy28lp_init(struct phy *phy)
                 ret = miphy28lp_init_usb3(miphy_phy);
                 break;
         default:
-                return -EINVAL;
+                ret = -EINVAL;
+                break;
         }
 
         mutex_unlock(&miphy_dev->miphy_mutex);
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
index c96e8183a8ff..efe724f97e02 100644
--- a/drivers/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -29,10 +29,9 @@
 /**
  * omap_control_pcie_pcs - set the PCS delay count
  * @dev: the control module device
- * @id: index of the pcie PHY (should be 1 or 2)
  * @delay: 8 bit delay value
  */
-void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay)
+void omap_control_pcie_pcs(struct device *dev, u8 delay)
 {
         u32 val;
         struct omap_control_phy *control_phy;
@@ -55,8 +54,8 @@ void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay)
 
         val = readl(control_phy->pcie_pcs);
         val &= ~(OMAP_CTRL_PCIE_PCS_MASK <<
-                (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT));
-        val |= delay << (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT);
+                OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT);
+        val |= (delay << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT);
         writel(val, control_phy->pcie_pcs);
 }
 EXPORT_SYMBOL_GPL(omap_control_pcie_pcs);
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index fb02a67c9181..a2b08f3ccb03 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -244,7 +244,8 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
         else
                 data->num_phys = 3;
 
-        if (of_device_is_compatible(np, "allwinner,sun4i-a10-usb-phy"))
+        if (of_device_is_compatible(np, "allwinner,sun4i-a10-usb-phy") ||
+            of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
                 data->disc_thresh = 3;
         else
                 data->disc_thresh = 2;
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 1387b4d4afe3..465de2c800f2 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -82,7 +82,6 @@ struct ti_pipe3 {
         struct clk              *refclk;
         struct clk              *div_clk;
         struct pipe3_dpll_map   *dpll_map;
-        u8                      id;
 };
 
 static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -217,8 +216,13 @@ static int ti_pipe3_init(struct phy *x)
         u32 val;
         int ret = 0;
 
+        /*
+         * Set pcie_pcs register to 0x96 for proper functioning of phy
+         * as recommended in AM572x TRM SPRUHZ6, section 18.5.2.2, table
+         * 18-1804.
+         */
         if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {
-                omap_control_pcie_pcs(phy->control_dev, phy->id, 0xF1);
+                omap_control_pcie_pcs(phy->control_dev, 0x96);
                 return 0;
         }
 
@@ -347,8 +351,6 @@ static int ti_pipe3_probe(struct platform_device *pdev)
         }
 
         if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
-                if (of_property_read_u8(node, "id", &phy->id) < 0)
-                        phy->id = 1;
 
                 clk = devm_clk_get(phy->dev, "dpll_ref");
                 if (IS_ERR(clk)) {