diff options
Diffstat (limited to 'drivers/phy/phy-omap-control.c')
| -rw-r--r-- | drivers/phy/phy-omap-control.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c index c96e8183a8ff..efe724f97e02 100644 --- a/drivers/phy/phy-omap-control.c +++ b/drivers/phy/phy-omap-control.c | |||
| @@ -29,10 +29,9 @@ | |||
| 29 | /** | 29 | /** |
| 30 | * omap_control_pcie_pcs - set the PCS delay count | 30 | * omap_control_pcie_pcs - set the PCS delay count |
| 31 | * @dev: the control module device | 31 | * @dev: the control module device |
| 32 | * @id: index of the pcie PHY (should be 1 or 2) | ||
| 33 | * @delay: 8 bit delay value | 32 | * @delay: 8 bit delay value |
| 34 | */ | 33 | */ |
| 35 | void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay) | 34 | void omap_control_pcie_pcs(struct device *dev, u8 delay) |
| 36 | { | 35 | { |
| 37 | u32 val; | 36 | u32 val; |
| 38 | struct omap_control_phy *control_phy; | 37 | struct omap_control_phy *control_phy; |
| @@ -55,8 +54,8 @@ void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay) | |||
| 55 | 54 | ||
| 56 | val = readl(control_phy->pcie_pcs); | 55 | val = readl(control_phy->pcie_pcs); |
| 57 | val &= ~(OMAP_CTRL_PCIE_PCS_MASK << | 56 | val &= ~(OMAP_CTRL_PCIE_PCS_MASK << |
| 58 | (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT)); | 57 | OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); |
| 59 | val |= delay << (id * OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); | 58 | val |= (delay << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT); |
| 60 | writel(val, control_phy->pcie_pcs); | 59 | writel(val, control_phy->pcie_pcs); |
| 61 | } | 60 | } |
| 62 | EXPORT_SYMBOL_GPL(omap_control_pcie_pcs); | 61 | EXPORT_SYMBOL_GPL(omap_control_pcie_pcs); |
