diff options
Diffstat (limited to 'drivers/pcmcia')
-rw-r--r-- | drivers/pcmcia/m8xx_pcmcia.c | 81 |
1 files changed, 0 insertions, 81 deletions
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c index 9a12eadcf74c..18c0d8d1ddf7 100644 --- a/drivers/pcmcia/m8xx_pcmcia.c +++ b/drivers/pcmcia/m8xx_pcmcia.c | |||
@@ -68,12 +68,6 @@ MODULE_LICENSE("Dual MPL/GPL"); | |||
68 | 68 | ||
69 | #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) | 69 | #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) |
70 | 70 | ||
71 | /* The RPX series use SLOT_B */ | ||
72 | #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE) | ||
73 | #define CONFIG_PCMCIA_SLOT_B | ||
74 | #define CONFIG_BD_IS_MHZ | ||
75 | #endif | ||
76 | |||
77 | /* The ADS board use SLOT_A */ | 71 | /* The ADS board use SLOT_A */ |
78 | #ifdef CONFIG_ADS | 72 | #ifdef CONFIG_ADS |
79 | #define CONFIG_PCMCIA_SLOT_A | 73 | #define CONFIG_PCMCIA_SLOT_A |
@@ -253,81 +247,6 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev); | |||
253 | 247 | ||
254 | #define PCMCIA_BMT_LIMIT (15*4) /* Bus Monitor Timeout value */ | 248 | #define PCMCIA_BMT_LIMIT (15*4) /* Bus Monitor Timeout value */ |
255 | 249 | ||
256 | /* ------------------------------------------------------------------------- */ | ||
257 | /* board specific stuff: */ | ||
258 | /* voltage_set(), hardware_enable() and hardware_disable() */ | ||
259 | /* ------------------------------------------------------------------------- */ | ||
260 | /* RPX Boards from Embedded Planet */ | ||
261 | |||
262 | #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE) | ||
263 | |||
264 | /* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks. | ||
265 | * SYPCR is write once only, therefore must the slowest memory be faster | ||
266 | * than the bus monitor or we will get a machine check due to the bus timeout. | ||
267 | */ | ||
268 | |||
269 | #define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE" | ||
270 | |||
271 | #undef PCMCIA_BMT_LIMIT | ||
272 | #define PCMCIA_BMT_LIMIT (6*8) | ||
273 | |||
274 | static int voltage_set(int slot, int vcc, int vpp) | ||
275 | { | ||
276 | u32 reg = 0; | ||
277 | |||
278 | switch (vcc) { | ||
279 | case 0: | ||
280 | break; | ||
281 | case 33: | ||
282 | reg |= BCSR1_PCVCTL4; | ||
283 | break; | ||
284 | case 50: | ||
285 | reg |= BCSR1_PCVCTL5; | ||
286 | break; | ||
287 | default: | ||
288 | return 1; | ||
289 | } | ||
290 | |||
291 | switch (vpp) { | ||
292 | case 0: | ||
293 | break; | ||
294 | case 33: | ||
295 | case 50: | ||
296 | if (vcc == vpp) | ||
297 | reg |= BCSR1_PCVCTL6; | ||
298 | else | ||
299 | return 1; | ||
300 | break; | ||
301 | case 120: | ||
302 | reg |= BCSR1_PCVCTL7; | ||
303 | default: | ||
304 | return 1; | ||
305 | } | ||
306 | |||
307 | if (!((vcc == 50) || (vcc == 0))) | ||
308 | return 1; | ||
309 | |||
310 | /* first, turn off all power */ | ||
311 | |||
312 | out_be32(((u32 *) RPX_CSR_ADDR), | ||
313 | in_be32(((u32 *) RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 | | ||
314 | BCSR1_PCVCTL5 | | ||
315 | BCSR1_PCVCTL6 | | ||
316 | BCSR1_PCVCTL7)); | ||
317 | |||
318 | /* enable new powersettings */ | ||
319 | |||
320 | out_be32(((u32 *) RPX_CSR_ADDR), in_be32(((u32 *) RPX_CSR_ADDR)) | reg); | ||
321 | |||
322 | return 0; | ||
323 | } | ||
324 | |||
325 | #define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V | ||
326 | #define hardware_enable(_slot_) /* No hardware to enable */ | ||
327 | #define hardware_disable(_slot_) /* No hardware to disable */ | ||
328 | |||
329 | #endif /* CONFIG_RPXCLASSIC */ | ||
330 | |||
331 | /* FADS Boards from Motorola */ | 250 | /* FADS Boards from Motorola */ |
332 | 251 | ||
333 | #if defined(CONFIG_FADS) | 252 | #if defined(CONFIG_FADS) |