diff options
Diffstat (limited to 'drivers/pcmcia/sa11xx_base.c')
-rw-r--r-- | drivers/pcmcia/sa11xx_base.c | 200 |
1 files changed, 200 insertions, 0 deletions
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c new file mode 100644 index 000000000000..db04ffb6f68c --- /dev/null +++ b/drivers/pcmcia/sa11xx_base.c | |||
@@ -0,0 +1,200 @@ | |||
1 | /*====================================================================== | ||
2 | |||
3 | Device driver for the PCMCIA control functionality of StrongARM | ||
4 | SA-1100 microprocessors. | ||
5 | |||
6 | The contents of this file are subject to the Mozilla Public | ||
7 | License Version 1.1 (the "License"); you may not use this file | ||
8 | except in compliance with the License. You may obtain a copy of | ||
9 | the License at http://www.mozilla.org/MPL/ | ||
10 | |||
11 | Software distributed under the License is distributed on an "AS | ||
12 | IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or | ||
13 | implied. See the License for the specific language governing | ||
14 | rights and limitations under the License. | ||
15 | |||
16 | The initial developer of the original code is John G. Dorsey | ||
17 | <john+@cs.cmu.edu>. Portions created by John G. Dorsey are | ||
18 | Copyright (C) 1999 John G. Dorsey. All Rights Reserved. | ||
19 | |||
20 | Alternatively, the contents of this file may be used under the | ||
21 | terms of the GNU Public License version 2 (the "GPL"), in which | ||
22 | case the provisions of the GPL are applicable instead of the | ||
23 | above. If you wish to allow the use of your version of this file | ||
24 | only under the terms of the GPL and not to allow others to use | ||
25 | your version of this file under the MPL, indicate your decision | ||
26 | by deleting the provisions above and replace them with the notice | ||
27 | and other provisions required by the GPL. If you do not delete | ||
28 | the provisions above, a recipient may use your version of this | ||
29 | file under either the MPL or the GPL. | ||
30 | |||
31 | ======================================================================*/ | ||
32 | |||
33 | #include <linux/module.h> | ||
34 | #include <linux/init.h> | ||
35 | #include <linux/config.h> | ||
36 | #include <linux/cpufreq.h> | ||
37 | #include <linux/ioport.h> | ||
38 | #include <linux/kernel.h> | ||
39 | #include <linux/spinlock.h> | ||
40 | |||
41 | #include <asm/hardware.h> | ||
42 | #include <asm/io.h> | ||
43 | #include <asm/irq.h> | ||
44 | #include <asm/system.h> | ||
45 | |||
46 | #include "soc_common.h" | ||
47 | #include "sa11xx_base.h" | ||
48 | |||
49 | |||
50 | /* | ||
51 | * sa1100_pcmcia_default_mecr_timing | ||
52 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
53 | * | ||
54 | * Calculate MECR clock wait states for given CPU clock | ||
55 | * speed and command wait state. This function can be over- | ||
56 | * written by a board specific version. | ||
57 | * | ||
58 | * The default is to simply calculate the BS values as specified in | ||
59 | * the INTEL SA1100 development manual | ||
60 | * "Expansion Memory (PCMCIA) Configuration Register (MECR)" | ||
61 | * that's section 10.2.5 in _my_ version of the manual ;) | ||
62 | */ | ||
63 | static unsigned int | ||
64 | sa1100_pcmcia_default_mecr_timing(struct soc_pcmcia_socket *skt, | ||
65 | unsigned int cpu_speed, | ||
66 | unsigned int cmd_time) | ||
67 | { | ||
68 | return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed); | ||
69 | } | ||
70 | |||
71 | /* sa1100_pcmcia_set_mecr() | ||
72 | * ^^^^^^^^^^^^^^^^^^^^^^^^ | ||
73 | * | ||
74 | * set MECR value for socket <sock> based on this sockets | ||
75 | * io, mem and attribute space access speed. | ||
76 | * Call board specific BS value calculation to allow boards | ||
77 | * to tweak the BS values. | ||
78 | */ | ||
79 | static int | ||
80 | sa1100_pcmcia_set_mecr(struct soc_pcmcia_socket *skt, unsigned int cpu_clock) | ||
81 | { | ||
82 | struct soc_pcmcia_timing timing; | ||
83 | u32 mecr, old_mecr; | ||
84 | unsigned long flags; | ||
85 | unsigned int bs_io, bs_mem, bs_attr; | ||
86 | |||
87 | soc_common_pcmcia_get_timing(skt, &timing); | ||
88 | |||
89 | bs_io = skt->ops->get_timing(skt, cpu_clock, timing.io); | ||
90 | bs_mem = skt->ops->get_timing(skt, cpu_clock, timing.mem); | ||
91 | bs_attr = skt->ops->get_timing(skt, cpu_clock, timing.attr); | ||
92 | |||
93 | local_irq_save(flags); | ||
94 | |||
95 | old_mecr = mecr = MECR; | ||
96 | MECR_FAST_SET(mecr, skt->nr, 0); | ||
97 | MECR_BSIO_SET(mecr, skt->nr, bs_io); | ||
98 | MECR_BSA_SET(mecr, skt->nr, bs_attr); | ||
99 | MECR_BSM_SET(mecr, skt->nr, bs_mem); | ||
100 | if (old_mecr != mecr) | ||
101 | MECR = mecr; | ||
102 | |||
103 | local_irq_restore(flags); | ||
104 | |||
105 | debug(skt, 2, "FAST %X BSM %X BSA %X BSIO %X\n", | ||
106 | MECR_FAST_GET(mecr, skt->nr), | ||
107 | MECR_BSM_GET(mecr, skt->nr), MECR_BSA_GET(mecr, skt->nr), | ||
108 | MECR_BSIO_GET(mecr, skt->nr)); | ||
109 | |||
110 | return 0; | ||
111 | } | ||
112 | |||
113 | #ifdef CONFIG_CPU_FREQ | ||
114 | static int | ||
115 | sa1100_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | ||
116 | unsigned long val, | ||
117 | struct cpufreq_freqs *freqs) | ||
118 | { | ||
119 | switch (val) { | ||
120 | case CPUFREQ_PRECHANGE: | ||
121 | if (freqs->new > freqs->old) | ||
122 | sa1100_pcmcia_set_mecr(skt, freqs->new); | ||
123 | break; | ||
124 | |||
125 | case CPUFREQ_POSTCHANGE: | ||
126 | if (freqs->new < freqs->old) | ||
127 | sa1100_pcmcia_set_mecr(skt, freqs->new); | ||
128 | break; | ||
129 | case CPUFREQ_RESUMECHANGE: | ||
130 | sa1100_pcmcia_set_mecr(skt, freqs->new); | ||
131 | break; | ||
132 | } | ||
133 | |||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | #endif | ||
138 | |||
139 | static int | ||
140 | sa1100_pcmcia_set_timing(struct soc_pcmcia_socket *skt) | ||
141 | { | ||
142 | return sa1100_pcmcia_set_mecr(skt, cpufreq_get(0)); | ||
143 | } | ||
144 | |||
145 | static int | ||
146 | sa1100_pcmcia_show_timing(struct soc_pcmcia_socket *skt, char *buf) | ||
147 | { | ||
148 | struct soc_pcmcia_timing timing; | ||
149 | unsigned int clock = cpufreq_get(0); | ||
150 | unsigned long mecr = MECR; | ||
151 | char *p = buf; | ||
152 | |||
153 | soc_common_pcmcia_get_timing(skt, &timing); | ||
154 | |||
155 | p+=sprintf(p, "I/O : %u (%u)\n", timing.io, | ||
156 | sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr))); | ||
157 | |||
158 | p+=sprintf(p, "attribute: %u (%u)\n", timing.attr, | ||
159 | sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr))); | ||
160 | |||
161 | p+=sprintf(p, "common : %u (%u)\n", timing.mem, | ||
162 | sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr))); | ||
163 | |||
164 | return p - buf; | ||
165 | } | ||
166 | |||
167 | int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, | ||
168 | int first, int nr) | ||
169 | { | ||
170 | /* | ||
171 | * set default MECR calculation if the board specific | ||
172 | * code did not specify one... | ||
173 | */ | ||
174 | if (!ops->get_timing) | ||
175 | ops->get_timing = sa1100_pcmcia_default_mecr_timing; | ||
176 | |||
177 | /* Provide our SA11x0 specific timing routines. */ | ||
178 | ops->set_timing = sa1100_pcmcia_set_timing; | ||
179 | ops->show_timing = sa1100_pcmcia_show_timing; | ||
180 | #ifdef CONFIG_CPU_FREQ | ||
181 | ops->frequency_change = sa1100_pcmcia_frequency_change; | ||
182 | #endif | ||
183 | |||
184 | return soc_common_drv_pcmcia_probe(dev, ops, first, nr); | ||
185 | } | ||
186 | EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe); | ||
187 | |||
188 | static int __init sa11xx_pcmcia_init(void) | ||
189 | { | ||
190 | return 0; | ||
191 | } | ||
192 | module_init(sa11xx_pcmcia_init); | ||
193 | |||
194 | static void __exit sa11xx_pcmcia_exit(void) {} | ||
195 | |||
196 | module_exit(sa11xx_pcmcia_exit); | ||
197 | |||
198 | MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>"); | ||
199 | MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11xx core socket driver"); | ||
200 | MODULE_LICENSE("Dual MPL/GPL"); | ||