aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pcmcia/omap_cf.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pcmcia/omap_cf.c')
-rw-r--r--drivers/pcmcia/omap_cf.c25
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c
index 46314b420765..569b746b5731 100644
--- a/drivers/pcmcia/omap_cf.c
+++ b/drivers/pcmcia/omap_cf.c
@@ -38,19 +38,19 @@
38#define CF_BASE 0xfffe2800 38#define CF_BASE 0xfffe2800
39 39
40/* status; read after IRQ */ 40/* status; read after IRQ */
41#define CF_STATUS_REG __REG16(CF_BASE + 0x00) 41#define CF_STATUS (CF_BASE + 0x00)
42# define CF_STATUS_BAD_READ (1 << 2) 42# define CF_STATUS_BAD_READ (1 << 2)
43# define CF_STATUS_BAD_WRITE (1 << 1) 43# define CF_STATUS_BAD_WRITE (1 << 1)
44# define CF_STATUS_CARD_DETECT (1 << 0) 44# define CF_STATUS_CARD_DETECT (1 << 0)
45 45
46/* which chipselect (CS0..CS3) is used for CF (active low) */ 46/* which chipselect (CS0..CS3) is used for CF (active low) */
47#define CF_CFG_REG __REG16(CF_BASE + 0x02) 47#define CF_CFG (CF_BASE + 0x02)
48 48
49/* card reset */ 49/* card reset */
50#define CF_CONTROL_REG __REG16(CF_BASE + 0x04) 50#define CF_CONTROL (CF_BASE + 0x04)
51# define CF_CONTROL_RESET (1 << 0) 51# define CF_CONTROL_RESET (1 << 0)
52 52
53#define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT)) 53#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
54 54
55/*--------------------------------------------------------------------------*/ 55/*--------------------------------------------------------------------------*/
56 56
@@ -139,11 +139,11 @@ omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
139 return -EINVAL; 139 return -EINVAL;
140 } 140 }
141 141
142 control = CF_CONTROL_REG; 142 control = omap_readw(CF_CONTROL);
143 if (s->flags & SS_RESET) 143 if (s->flags & SS_RESET)
144 CF_CONTROL_REG = CF_CONTROL_RESET; 144 omap_writew(CF_CONTROL_RESET, CF_CONTROL);
145 else 145 else
146 CF_CONTROL_REG = 0; 146 omap_writew(0, CF_CONTROL);
147 147
148 pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", 148 pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
149 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); 149 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
@@ -270,7 +270,7 @@ static int __init omap_cf_probe(struct platform_device *pdev)
270 omap_cfg_reg(V10_1610_CF_IREQ); 270 omap_cfg_reg(V10_1610_CF_IREQ);
271 omap_cfg_reg(W10_1610_CF_RESET); 271 omap_cfg_reg(W10_1610_CF_RESET);
272 272
273 CF_CFG_REG = ~(1 << seg); 273 omap_writew(~(1 << seg), CF_CFG);
274 274
275 pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); 275 pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
276 276
@@ -279,14 +279,15 @@ static int __init omap_cf_probe(struct platform_device *pdev)
279 * CF/PCMCIA variants... 279 * CF/PCMCIA variants...
280 */ 280 */
281 pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, 281 pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
282 seg, EMIFS_CCS(seg), EMIFS_ACS(seg)); 282 seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
283 EMIFS_CCS(seg) = 0x0004a1b3; /* synch mode 4 etc */ 283 omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
284 EMIFS_ACS(seg) = 0x00000000; /* OE hold/setup */ 284 omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
285 285
286 /* CF uses armxor_ck, which is "always" available */ 286 /* CF uses armxor_ck, which is "always" available */
287 287
288 pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, 288 pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
289 CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG, 289 omap_readw(CF_STATUS), omap_readw(CF_CFG),
290 omap_readw(CF_CONTROL),
290 omap_cf_present() ? "present" : "(not present)"); 291 omap_cf_present() ? "present" : "(not present)");
291 292
292 cf->socket.owner = THIS_MODULE; 293 cf->socket.owner = THIS_MODULE;