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Diffstat (limited to 'drivers/pcmcia/m8xx_pcmcia.c')
-rw-r--r--drivers/pcmcia/m8xx_pcmcia.c548
1 files changed, 278 insertions, 270 deletions
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c
index 3b40f9623cc9..3c45142c40b2 100644
--- a/drivers/pcmcia/m8xx_pcmcia.c
+++ b/drivers/pcmcia/m8xx_pcmcia.c
@@ -113,7 +113,7 @@ MODULE_LICENSE("Dual MPL/GPL");
113#define CONFIG_PCMCIA_SLOT_B 113#define CONFIG_PCMCIA_SLOT_B
114#endif 114#endif
115 115
116#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 116#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
117 117
118#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 118#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
119 119
@@ -146,9 +146,9 @@ MODULE_LICENSE("Dual MPL/GPL");
146 146
147/* ------------------------------------------------------------------------- */ 147/* ------------------------------------------------------------------------- */
148 148
149#define PCMCIA_MEM_WIN_BASE 0xe0000000 /* base address for memory window 0 */ 149#define PCMCIA_MEM_WIN_BASE 0xe0000000 /* base address for memory window 0 */
150#define PCMCIA_MEM_WIN_SIZE 0x04000000 /* each memory window is 64 MByte */ 150#define PCMCIA_MEM_WIN_SIZE 0x04000000 /* each memory window is 64 MByte */
151#define PCMCIA_IO_WIN_BASE _IO_BASE /* base address for io window 0 */ 151#define PCMCIA_IO_WIN_BASE _IO_BASE /* base address for io window 0 */
152/* ------------------------------------------------------------------------- */ 152/* ------------------------------------------------------------------------- */
153 153
154static int pcmcia_schlvl; 154static int pcmcia_schlvl;
@@ -169,8 +169,8 @@ static u32 *m8xx_pgcrx[2];
169 */ 169 */
170 170
171struct pcmcia_win { 171struct pcmcia_win {
172 u32 br; 172 u32 br;
173 u32 or; 173 u32 or;
174}; 174};
175 175
176/* 176/*
@@ -214,7 +214,7 @@ struct pcmcia_win {
214 214
215/* we keep one lookup table per socket to check flags */ 215/* we keep one lookup table per socket to check flags */
216 216
217#define PCMCIA_EVENTS_MAX 5 /* 4 max at a time + termination */ 217#define PCMCIA_EVENTS_MAX 5 /* 4 max at a time + termination */
218 218
219struct event_table { 219struct event_table {
220 u32 regbit; 220 u32 regbit;
@@ -224,8 +224,8 @@ struct event_table {
224static const char driver_name[] = "m8xx-pcmcia"; 224static const char driver_name[] = "m8xx-pcmcia";
225 225
226struct socket_info { 226struct socket_info {
227 void (*handler)(void *info, u32 events); 227 void (*handler) (void *info, u32 events);
228 void *info; 228 void *info;
229 229
230 u32 slot; 230 u32 slot;
231 pcmconf8xx_t *pcmcia; 231 pcmconf8xx_t *pcmcia;
@@ -234,7 +234,7 @@ struct socket_info {
234 234
235 socket_state_t state; 235 socket_state_t state;
236 struct pccard_mem_map mem_win[PCMCIA_MEM_WIN_NO]; 236 struct pccard_mem_map mem_win[PCMCIA_MEM_WIN_NO];
237 struct pccard_io_map io_win[PCMCIA_IO_WIN_NO]; 237 struct pccard_io_map io_win[PCMCIA_IO_WIN_NO];
238 struct event_table events[PCMCIA_EVENTS_MAX]; 238 struct event_table events[PCMCIA_EVENTS_MAX];
239 struct pcmcia_socket socket; 239 struct pcmcia_socket socket;
240}; 240};
@@ -248,8 +248,7 @@ static struct socket_info socket[PCMCIA_SOCKETS_NO];
248 248
249#define M8XX_SIZES_NO 32 249#define M8XX_SIZES_NO 32
250 250
251static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] = 251static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] = {
252{
253 0x00000001, 0x00000002, 0x00000008, 0x00000004, 252 0x00000001, 0x00000002, 0x00000008, 0x00000004,
254 0x00000080, 0x00000040, 0x00000010, 0x00000020, 253 0x00000080, 0x00000040, 0x00000010, 0x00000020,
255 0x00008000, 0x00004000, 0x00001000, 0x00002000, 254 0x00008000, 0x00004000, 0x00001000, 0x00002000,
@@ -265,7 +264,7 @@ static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] =
265 264
266static irqreturn_t m8xx_interrupt(int irq, void *dev); 265static irqreturn_t m8xx_interrupt(int irq, void *dev);
267 266
268#define PCMCIA_BMT_LIMIT (15*4) /* Bus Monitor Timeout value */ 267#define PCMCIA_BMT_LIMIT (15*4) /* Bus Monitor Timeout value */
269 268
270/* ------------------------------------------------------------------------- */ 269/* ------------------------------------------------------------------------- */
271/* board specific stuff: */ 270/* board specific stuff: */
@@ -289,8 +288,9 @@ static int voltage_set(int slot, int vcc, int vpp)
289{ 288{
290 u32 reg = 0; 289 u32 reg = 0;
291 290
292 switch(vcc) { 291 switch (vcc) {
293 case 0: break; 292 case 0:
293 break;
294 case 33: 294 case 33:
295 reg |= BCSR1_PCVCTL4; 295 reg |= BCSR1_PCVCTL4;
296 break; 296 break;
@@ -301,11 +301,12 @@ static int voltage_set(int slot, int vcc, int vpp)
301 return 1; 301 return 1;
302 } 302 }
303 303
304 switch(vpp) { 304 switch (vpp) {
305 case 0: break; 305 case 0:
306 break;
306 case 33: 307 case 33:
307 case 50: 308 case 50:
308 if(vcc == vpp) 309 if (vcc == vpp)
309 reg |= BCSR1_PCVCTL6; 310 reg |= BCSR1_PCVCTL6;
310 else 311 else
311 return 1; 312 return 1;
@@ -316,25 +317,29 @@ static int voltage_set(int slot, int vcc, int vpp)
316 return 1; 317 return 1;
317 } 318 }
318 319
319 if(!((vcc == 50) || (vcc == 0))) 320 if (!((vcc == 50) || (vcc == 0)))
320 return 1; 321 return 1;
321 322
322 /* first, turn off all power */ 323 /* first, turn off all power */
323 324
324 out_be32(((u32 *)RPX_CSR_ADDR), in_be32(((u32 *)RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5 | BCSR1_PCVCTL6 | BCSR1_PCVCTL7)); 325 out_be32(((u32 *) RPX_CSR_ADDR),
326 in_be32(((u32 *) RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 |
327 BCSR1_PCVCTL5 |
328 BCSR1_PCVCTL6 |
329 BCSR1_PCVCTL7));
325 330
326 /* enable new powersettings */ 331 /* enable new powersettings */
327 332
328 out_be32(((u32 *)RPX_CSR_ADDR), in_be32(((u32 *)RPX_CSR_ADDR)) | reg); 333 out_be32(((u32 *) RPX_CSR_ADDR), in_be32(((u32 *) RPX_CSR_ADDR)) | reg);
329 334
330 return 0; 335 return 0;
331} 336}
332 337
333#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V 338#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
334#define hardware_enable(_slot_) /* No hardware to enable */ 339#define hardware_enable(_slot_) /* No hardware to enable */
335#define hardware_disable(_slot_) /* No hardware to disable */ 340#define hardware_disable(_slot_) /* No hardware to disable */
336 341
337#endif /* CONFIG_RPXCLASSIC */ 342#endif /* CONFIG_RPXCLASSIC */
338 343
339/* FADS Boards from Motorola */ 344/* FADS Boards from Motorola */
340 345
@@ -346,43 +351,45 @@ static int voltage_set(int slot, int vcc, int vpp)
346{ 351{
347 u32 reg = 0; 352 u32 reg = 0;
348 353
349 switch(vcc) { 354 switch (vcc) {
350 case 0: 355 case 0:
351 break; 356 break;
352 case 33: 357 case 33:
353 reg |= BCSR1_PCCVCC0; 358 reg |= BCSR1_PCCVCC0;
354 break; 359 break;
355 case 50: 360 case 50:
356 reg |= BCSR1_PCCVCC1; 361 reg |= BCSR1_PCCVCC1;
357 break; 362 break;
358 default: 363 default:
359 return 1; 364 return 1;
360 } 365 }
361 366
362 switch(vpp) { 367 switch (vpp) {
363 case 0: 368 case 0:
364 break; 369 break;
365 case 33: 370 case 33:
366 case 50: 371 case 50:
367 if(vcc == vpp) 372 if (vcc == vpp)
368 reg |= BCSR1_PCCVPP1; 373 reg |= BCSR1_PCCVPP1;
369 else 374 else
370 return 1;
371 break;
372 case 120:
373 if ((vcc == 33) || (vcc == 50))
374 reg |= BCSR1_PCCVPP0;
375 else
376 return 1;
377 default:
378 return 1; 375 return 1;
376 break;
377 case 120:
378 if ((vcc == 33) || (vcc == 50))
379 reg |= BCSR1_PCCVPP0;
380 else
381 return 1;
382 default:
383 return 1;
379 } 384 }
380 385
381 /* first, turn off all power */ 386 /* first, turn off all power */
382 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK)); 387 out_be32((u32 *) BCSR1,
388 in_be32((u32 *) BCSR1) & ~(BCSR1_PCCVCC_MASK |
389 BCSR1_PCCVPP_MASK));
383 390
384 /* enable new powersettings */ 391 /* enable new powersettings */
385 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | reg); 392 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | reg);
386 393
387 return 0; 394 return 0;
388} 395}
@@ -391,12 +398,12 @@ static int voltage_set(int slot, int vcc, int vpp)
391 398
392static void hardware_enable(int slot) 399static void hardware_enable(int slot)
393{ 400{
394 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~BCSR1_PCCEN); 401 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) & ~BCSR1_PCCEN);
395} 402}
396 403
397static void hardware_disable(int slot) 404static void hardware_disable(int slot)
398{ 405{
399 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | BCSR1_PCCEN); 406 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | BCSR1_PCCEN);
400} 407}
401 408
402#endif 409#endif
@@ -410,7 +417,7 @@ static void hardware_disable(int slot)
410 417
411static inline void hardware_enable(int slot) 418static inline void hardware_enable(int slot)
412{ 419{
413 m8xx_pcmcia_ops.hw_ctrl(slot, 1); 420 m8xx_pcmcia_ops.hw_ctrl(slot, 1);
414} 421}
415 422
416static inline void hardware_disable(int slot) 423static inline void hardware_disable(int slot)
@@ -436,52 +443,53 @@ static int voltage_set(int slot, int vcc, int vpp)
436{ 443{
437 u8 reg = 0; 444 u8 reg = 0;
438 445
439 switch(vcc) { 446 switch (vcc) {
440 case 0: 447 case 0:
441 break; 448 break;
442 case 33: 449 case 33:
443 reg |= CSR2_VCC_33; 450 reg |= CSR2_VCC_33;
444 break; 451 break;
445 case 50: 452 case 50:
446 reg |= CSR2_VCC_50; 453 reg |= CSR2_VCC_50;
447 break; 454 break;
448 default: 455 default:
449 return 1; 456 return 1;
450 } 457 }
451 458
452 switch(vpp) { 459 switch (vpp) {
453 case 0: 460 case 0:
454 break; 461 break;
455 case 33: 462 case 33:
456 case 50: 463 case 50:
457 if(vcc == vpp) 464 if (vcc == vpp)
458 reg |= CSR2_VPP_VCC; 465 reg |= CSR2_VPP_VCC;
459 else 466 else
460 return 1; 467 return 1;
461 break; 468 break;
462 case 120: 469 case 120:
463 if ((vcc == 33) || (vcc == 50)) 470 if ((vcc == 33) || (vcc == 50))
464 reg |= CSR2_VPP_12; 471 reg |= CSR2_VPP_12;
465 else 472 else
466 return 1;
467 default:
468 return 1; 473 return 1;
474 default:
475 return 1;
469 } 476 }
470 477
471 /* first, turn off all power */ 478 /* first, turn off all power */
472 out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK)); 479 out_8((u8 *) MBX_CSR2_ADDR,
480 in_8((u8 *) MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
473 481
474 /* enable new powersettings */ 482 /* enable new powersettings */
475 out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) | reg); 483 out_8((u8 *) MBX_CSR2_ADDR, in_8((u8 *) MBX_CSR2_ADDR) | reg);
476 484
477 return 0; 485 return 0;
478} 486}
479 487
480#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V 488#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
481#define hardware_enable(_slot_) /* No hardware to enable */ 489#define hardware_enable(_slot_) /* No hardware to enable */
482#define hardware_disable(_slot_) /* No hardware to disable */ 490#define hardware_disable(_slot_) /* No hardware to disable */
483 491
484#endif /* CONFIG_MBX */ 492#endif /* CONFIG_MBX */
485 493
486#if defined(CONFIG_PRxK) 494#if defined(CONFIG_PRxK)
487#include <asm/cpld.h> 495#include <asm/cpld.h>
@@ -495,43 +503,46 @@ static int voltage_set(int slot, int vcc, int vpp)
495 u8 regread; 503 u8 regread;
496 cpld_regs *ccpld = get_cpld(); 504 cpld_regs *ccpld = get_cpld();
497 505
498 switch(vcc) { 506 switch (vcc) {
499 case 0: 507 case 0:
500 break; 508 break;
501 case 33: 509 case 33:
502 reg |= PCMCIA_VCC_33; 510 reg |= PCMCIA_VCC_33;
503 break; 511 break;
504 case 50: 512 case 50:
505 reg |= PCMCIA_VCC_50; 513 reg |= PCMCIA_VCC_50;
506 break; 514 break;
507 default: 515 default:
508 return 1; 516 return 1;
509 } 517 }
510 518
511 switch(vpp) { 519 switch (vpp) {
512 case 0: 520 case 0:
513 break; 521 break;
514 case 33: 522 case 33:
515 case 50: 523 case 50:
516 if(vcc == vpp) 524 if (vcc == vpp)
517 reg |= PCMCIA_VPP_VCC; 525 reg |= PCMCIA_VPP_VCC;
518 else 526 else
519 return 1;
520 break;
521 case 120:
522 if ((vcc == 33) || (vcc == 50))
523 reg |= PCMCIA_VPP_12;
524 else
525 return 1;
526 default:
527 return 1; 527 return 1;
528 break;
529 case 120:
530 if ((vcc == 33) || (vcc == 50))
531 reg |= PCMCIA_VPP_12;
532 else
533 return 1;
534 default:
535 return 1;
528 } 536 }
529 537
530 reg = reg >> (slot << 2); 538 reg = reg >> (slot << 2);
531 regread = in_8(&ccpld->fpga_pc_ctl); 539 regread = in_8(&ccpld->fpga_pc_ctl);
532 if (reg != (regread & ((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)))) { 540 if (reg !=
541 (regread & ((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)))) {
533 /* enable new powersettings */ 542 /* enable new powersettings */
534 regread = regread & ~((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)); 543 regread =
544 regread & ~((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >>
545 (slot << 2));
535 out_8(&ccpld->fpga_pc_ctl, reg | regread); 546 out_8(&ccpld->fpga_pc_ctl, reg | regread);
536 msleep(100); 547 msleep(100);
537 } 548 }
@@ -540,10 +551,10 @@ static int voltage_set(int slot, int vcc, int vpp)
540} 551}
541 552
542#define socket_get(_slot_) PCMCIA_SOCKET_KEY_LV 553#define socket_get(_slot_) PCMCIA_SOCKET_KEY_LV
543#define hardware_enable(_slot_) /* No hardware to enable */ 554#define hardware_enable(_slot_) /* No hardware to enable */
544#define hardware_disable(_slot_) /* No hardware to disable */ 555#define hardware_disable(_slot_) /* No hardware to disable */
545 556
546#endif /* CONFIG_PRxK */ 557#endif /* CONFIG_PRxK */
547 558
548static u32 pending_events[PCMCIA_SOCKETS_NO]; 559static u32 pending_events[PCMCIA_SOCKETS_NO];
549static DEFINE_SPINLOCK(pending_event_lock); 560static DEFINE_SPINLOCK(pending_event_lock);
@@ -553,7 +564,7 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
553 struct socket_info *s; 564 struct socket_info *s;
554 struct event_table *e; 565 struct event_table *e;
555 unsigned int i, events, pscr, pipr, per; 566 unsigned int i, events, pscr, pipr, per;
556 pcmconf8xx_t *pcmcia = socket[0].pcmcia; 567 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
557 568
558 dprintk("Interrupt!\n"); 569 dprintk("Interrupt!\n");
559 /* get interrupt sources */ 570 /* get interrupt sources */
@@ -562,16 +573,16 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
562 pipr = in_be32(&pcmcia->pcmc_pipr); 573 pipr = in_be32(&pcmcia->pcmc_pipr);
563 per = in_be32(&pcmcia->pcmc_per); 574 per = in_be32(&pcmcia->pcmc_per);
564 575
565 for(i = 0; i < PCMCIA_SOCKETS_NO; i++) { 576 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
566 s = &socket[i]; 577 s = &socket[i];
567 e = &s->events[0]; 578 e = &s->events[0];
568 events = 0; 579 events = 0;
569 580
570 while(e->regbit) { 581 while (e->regbit) {
571 if(pscr & e->regbit) 582 if (pscr & e->regbit)
572 events |= e->eventbit; 583 events |= e->eventbit;
573 584
574 e++; 585 e++;
575 } 586 }
576 587
577 /* 588 /*
@@ -579,13 +590,11 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
579 * not too nice done, 590 * not too nice done,
580 * we depend on that CD2 is the bit to the left of CD1... 591 * we depend on that CD2 is the bit to the left of CD1...
581 */ 592 */
582 if(events & SS_DETECT) 593 if (events & SS_DETECT)
583 if(((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^ 594 if (((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^
584 (pipr & M8XX_PCMCIA_CD1(i))) 595 (pipr & M8XX_PCMCIA_CD1(i))) {
585 {
586 events &= ~SS_DETECT; 596 events &= ~SS_DETECT;
587 } 597 }
588
589#ifdef PCMCIA_GLITCHY_CD 598#ifdef PCMCIA_GLITCHY_CD
590 /* 599 /*
591 * I've experienced CD problems with my ADS board. 600 * I've experienced CD problems with my ADS board.
@@ -593,24 +602,23 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
593 * real change of Card detection. 602 * real change of Card detection.
594 */ 603 */
595 604
596 if((events & SS_DETECT) && 605 if ((events & SS_DETECT) &&
597 ((pipr & 606 ((pipr &
598 (M8XX_PCMCIA_CD2(i) | M8XX_PCMCIA_CD1(i))) == 0) && 607 (M8XX_PCMCIA_CD2(i) | M8XX_PCMCIA_CD1(i))) == 0) &&
599 (s->state.Vcc | s->state.Vpp)) { 608 (s->state.Vcc | s->state.Vpp)) {
600 events &= ~SS_DETECT; 609 events &= ~SS_DETECT;
601 /*printk( "CD glitch workaround - CD = 0x%08x!\n", 610 /*printk( "CD glitch workaround - CD = 0x%08x!\n",
602 (pipr & (M8XX_PCMCIA_CD2(i) 611 (pipr & (M8XX_PCMCIA_CD2(i)
603 | M8XX_PCMCIA_CD1(i))));*/ 612 | M8XX_PCMCIA_CD1(i)))); */
604 } 613 }
605#endif 614#endif
606 615
607 /* call the handler */ 616 /* call the handler */
608 617
609 dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, " 618 dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, "
610 "pipr = 0x%08x\n", 619 "pipr = 0x%08x\n", i, events, pscr, pipr);
611 i, events, pscr, pipr);
612 620
613 if(events) { 621 if (events) {
614 spin_lock(&pending_event_lock); 622 spin_lock(&pending_event_lock);
615 pending_events[i] |= events; 623 pending_events[i] |= events;
616 spin_unlock(&pending_event_lock); 624 spin_unlock(&pending_event_lock);
@@ -643,11 +651,11 @@ static u32 m8xx_get_graycode(u32 size)
643{ 651{
644 u32 k; 652 u32 k;
645 653
646 for(k = 0; k < M8XX_SIZES_NO; k++) 654 for (k = 0; k < M8XX_SIZES_NO; k++)
647 if(m8xx_size_to_gray[k] == size) 655 if (m8xx_size_to_gray[k] == size)
648 break; 656 break;
649 657
650 if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1)) 658 if ((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
651 k = -1; 659 k = -1;
652 660
653 return k; 661 return k;
@@ -657,7 +665,7 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
657{ 665{
658 u32 reg, clocks, psst, psl, psht; 666 u32 reg, clocks, psst, psl, psht;
659 667
660 if(!ns) { 668 if (!ns) {
661 669
662 /* 670 /*
663 * We get called with IO maps setup to 0ns 671 * We get called with IO maps setup to 0ns
@@ -665,10 +673,10 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
665 * They should be 255ns. 673 * They should be 255ns.
666 */ 674 */
667 675
668 if(is_io) 676 if (is_io)
669 ns = 255; 677 ns = 255;
670 else 678 else
671 ns = 100; /* fast memory if 0 */ 679 ns = 100; /* fast memory if 0 */
672 } 680 }
673 681
674 /* 682 /*
@@ -679,23 +687,23 @@ static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
679 687
680/* how we want to adjust the timing - in percent */ 688/* how we want to adjust the timing - in percent */
681 689
682#define ADJ 180 /* 80 % longer accesstime - to be sure */ 690#define ADJ 180 /* 80 % longer accesstime - to be sure */
683 691
684 clocks = ((bus_freq / 1000) * ns) / 1000; 692 clocks = ((bus_freq / 1000) * ns) / 1000;
685 clocks = (clocks * ADJ) / (100*1000); 693 clocks = (clocks * ADJ) / (100 * 1000);
686 if(clocks >= PCMCIA_BMT_LIMIT) { 694 if (clocks >= PCMCIA_BMT_LIMIT) {
687 printk( "Max access time limit reached\n"); 695 printk("Max access time limit reached\n");
688 clocks = PCMCIA_BMT_LIMIT-1; 696 clocks = PCMCIA_BMT_LIMIT - 1;
689 } 697 }
690 698
691 psst = clocks / 7; /* setup time */ 699 psst = clocks / 7; /* setup time */
692 psht = clocks / 7; /* hold time */ 700 psht = clocks / 7; /* hold time */
693 psl = (clocks * 5) / 7; /* strobe length */ 701 psl = (clocks * 5) / 7; /* strobe length */
694 702
695 psst += clocks - (psst + psht + psl); 703 psst += clocks - (psst + psht + psl);
696 704
697 reg = psst << 12; 705 reg = psst << 12;
698 reg |= psl << 7; 706 reg |= psl << 7;
699 reg |= psht << 16; 707 reg |= psht << 16;
700 708
701 return reg; 709 return reg;
@@ -710,8 +718,8 @@ static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
710 718
711 pipr = in_be32(&pcmcia->pcmc_pipr); 719 pipr = in_be32(&pcmcia->pcmc_pipr);
712 720
713 *value = ((pipr & (M8XX_PCMCIA_CD1(lsock) 721 *value = ((pipr & (M8XX_PCMCIA_CD1(lsock)
714 | M8XX_PCMCIA_CD2(lsock))) == 0) ? SS_DETECT : 0; 722 | M8XX_PCMCIA_CD2(lsock))) == 0) ? SS_DETECT : 0;
715 *value |= (pipr & M8XX_PCMCIA_WP(lsock)) ? SS_WRPROT : 0; 723 *value |= (pipr & M8XX_PCMCIA_WP(lsock)) ? SS_WRPROT : 0;
716 724
717 if (s->state.flags & SS_IOCARD) 725 if (s->state.flags & SS_IOCARD)
@@ -795,16 +803,16 @@ static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
795 /* read out VS1 and VS2 */ 803 /* read out VS1 and VS2 */
796 804
797 reg = (pipr & M8XX_PCMCIA_VS_MASK(lsock)) 805 reg = (pipr & M8XX_PCMCIA_VS_MASK(lsock))
798 >> M8XX_PCMCIA_VS_SHIFT(lsock); 806 >> M8XX_PCMCIA_VS_SHIFT(lsock);
799 807
800 if(socket_get(lsock) == PCMCIA_SOCKET_KEY_LV) { 808 if (socket_get(lsock) == PCMCIA_SOCKET_KEY_LV) {
801 switch(reg) { 809 switch (reg) {
802 case 1: 810 case 1:
803 *value |= SS_3VCARD; 811 *value |= SS_3VCARD;
804 break; /* GND, NC - 3.3V only */ 812 break; /* GND, NC - 3.3V only */
805 case 2: 813 case 2:
806 *value |= SS_XVCARD; 814 *value |= SS_XVCARD;
807 break; /* NC. GND - x.xV only */ 815 break; /* NC. GND - x.xV only */
808 }; 816 };
809 } 817 }
810 818
@@ -812,7 +820,7 @@ static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
812 return 0; 820 return 0;
813} 821}
814 822
815static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state) 823static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t * state)
816{ 824{
817 int lsock = container_of(sock, struct socket_info, socket)->slot; 825 int lsock = container_of(sock, struct socket_info, socket)->slot;
818 struct socket_info *s = &socket[lsock]; 826 struct socket_info *s = &socket[lsock];
@@ -821,20 +829,20 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
821 unsigned long flags; 829 unsigned long flags;
822 pcmconf8xx_t *pcmcia = socket[0].pcmcia; 830 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
823 831
824 dprintk( "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " 832 dprintk("SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
825 "io_irq %d, csc_mask %#2.2x)\n", lsock, state->flags, 833 "io_irq %d, csc_mask %#2.2x)\n", lsock, state->flags,
826 state->Vcc, state->Vpp, state->io_irq, state->csc_mask); 834 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
827 835
828 /* First, set voltage - bail out if invalid */ 836 /* First, set voltage - bail out if invalid */
829 if(voltage_set(lsock, state->Vcc, state->Vpp)) 837 if (voltage_set(lsock, state->Vcc, state->Vpp))
830 return -EINVAL; 838 return -EINVAL;
831 839
832
833 /* Take care of reset... */ 840 /* Take care of reset... */
834 if(state->flags & SS_RESET) 841 if (state->flags & SS_RESET)
835 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXRESET); /* active high */ 842 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXRESET); /* active high */
836 else 843 else
837 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET); 844 out_be32(M8XX_PGCRX(lsock),
845 in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);
838 846
839 /* ... and output enable. */ 847 /* ... and output enable. */
840 848
@@ -846,10 +854,11 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
846 no pullups are present -> the cards act wierd. 854 no pullups are present -> the cards act wierd.
847 So right now the buffers are enabled if the power is on. */ 855 So right now the buffers are enabled if the power is on. */
848 856
849 if(state->Vcc || state->Vpp) 857 if (state->Vcc || state->Vpp)
850 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */ 858 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */
851 else 859 else
852 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXOE); 860 out_be32(M8XX_PGCRX(lsock),
861 in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXOE);
853 862
854 /* 863 /*
855 * We'd better turn off interrupts before 864 * We'd better turn off interrupts before
@@ -866,17 +875,17 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
866 e = &s->events[0]; 875 e = &s->events[0];
867 reg = 0; 876 reg = 0;
868 877
869 if(state->csc_mask & SS_DETECT) { 878 if (state->csc_mask & SS_DETECT) {
870 e->eventbit = SS_DETECT; 879 e->eventbit = SS_DETECT;
871 reg |= e->regbit = (M8XX_PCMCIA_CD2(lsock) 880 reg |= e->regbit = (M8XX_PCMCIA_CD2(lsock)
872 | M8XX_PCMCIA_CD1(lsock)); 881 | M8XX_PCMCIA_CD1(lsock));
873 e++; 882 e++;
874 } 883 }
875 if(state->flags & SS_IOCARD) { 884 if (state->flags & SS_IOCARD) {
876 /* 885 /*
877 * I/O card 886 * I/O card
878 */ 887 */
879 if(state->csc_mask & SS_STSCHG) { 888 if (state->csc_mask & SS_STSCHG) {
880 e->eventbit = SS_STSCHG; 889 e->eventbit = SS_STSCHG;
881 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock); 890 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
882 e++; 891 e++;
@@ -884,9 +893,10 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
884 /* 893 /*
885 * If io_irq is non-zero we should enable irq. 894 * If io_irq is non-zero we should enable irq.
886 */ 895 */
887 if(state->io_irq) { 896 if (state->io_irq) {
888 out_be32(M8XX_PGCRX(lsock), 897 out_be32(M8XX_PGCRX(lsock),
889 in_be32(M8XX_PGCRX(lsock)) | mk_int_int_mask(s->hwirq) << 24); 898 in_be32(M8XX_PGCRX(lsock)) |
899 mk_int_int_mask(s->hwirq) << 24);
890 /* 900 /*
891 * Strange thing here: 901 * Strange thing here:
892 * The manual does not tell us which interrupt 902 * The manual does not tell us which interrupt
@@ -897,33 +907,32 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
897 * have to be cleared in PSCR in the interrupt handler. 907 * have to be cleared in PSCR in the interrupt handler.
898 */ 908 */
899 reg |= M8XX_PCMCIA_RDY_L(lsock); 909 reg |= M8XX_PCMCIA_RDY_L(lsock);
900 } 910 } else
901 else 911 out_be32(M8XX_PGCRX(lsock),
902 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff); 912 in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);
903 } 913 } else {
904 else {
905 /* 914 /*
906 * Memory card 915 * Memory card
907 */ 916 */
908 if(state->csc_mask & SS_BATDEAD) { 917 if (state->csc_mask & SS_BATDEAD) {
909 e->eventbit = SS_BATDEAD; 918 e->eventbit = SS_BATDEAD;
910 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock); 919 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
911 e++; 920 e++;
912 } 921 }
913 if(state->csc_mask & SS_BATWARN) { 922 if (state->csc_mask & SS_BATWARN) {
914 e->eventbit = SS_BATWARN; 923 e->eventbit = SS_BATWARN;
915 reg |= e->regbit = M8XX_PCMCIA_BVD2(lsock); 924 reg |= e->regbit = M8XX_PCMCIA_BVD2(lsock);
916 e++; 925 e++;
917 } 926 }
918 /* What should I trigger on - low/high,raise,fall? */ 927 /* What should I trigger on - low/high,raise,fall? */
919 if(state->csc_mask & SS_READY) { 928 if (state->csc_mask & SS_READY) {
920 e->eventbit = SS_READY; 929 e->eventbit = SS_READY;
921 reg |= e->regbit = 0; //?? 930 reg |= e->regbit = 0; //??
922 e++; 931 e++;
923 } 932 }
924 } 933 }
925 934
926 e->regbit = 0; /* terminate list */ 935 e->regbit = 0; /* terminate list */
927 936
928 /* 937 /*
929 * Clear the status changed . 938 * Clear the status changed .
@@ -940,7 +949,9 @@ static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
940 * Ones will enable the interrupt. 949 * Ones will enable the interrupt.
941 */ 950 */
942 951
943 reg |= in_be32(&pcmcia->pcmc_per) & (M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1)); 952 reg |=
953 in_be32(&pcmcia->
954 pcmc_per) & (M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
944 out_be32(&pcmcia->pcmc_per, reg); 955 out_be32(&pcmcia->pcmc_per, reg);
945 956
946 spin_unlock_irqrestore(&events_lock, flags); 957 spin_unlock_irqrestore(&events_lock, flags);
@@ -961,67 +972,66 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
961 unsigned int reg, winnr; 972 unsigned int reg, winnr;
962 pcmconf8xx_t *pcmcia = s->pcmcia; 973 pcmconf8xx_t *pcmcia = s->pcmcia;
963 974
964
965#define M8XX_SIZE (io->stop - io->start + 1) 975#define M8XX_SIZE (io->stop - io->start + 1)
966#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start) 976#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)
967 977
968 dprintk( "SetIOMap(%d, %d, %#2.2x, %d ns, " 978 dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, "
969 "%#4.4x-%#4.4x)\n", lsock, io->map, io->flags, 979 "%#4.4x-%#4.4x)\n", lsock, io->map, io->flags,
970 io->speed, io->start, io->stop); 980 io->speed, io->start, io->stop);
971 981
972 if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff) 982 if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff)
973 || (io->stop > 0xffff) || (io->stop < io->start)) 983 || (io->stop > 0xffff) || (io->stop < io->start))
974 return -EINVAL; 984 return -EINVAL;
975 985
976 if((reg = m8xx_get_graycode(M8XX_SIZE)) == -1) 986 if ((reg = m8xx_get_graycode(M8XX_SIZE)) == -1)
977 return -EINVAL; 987 return -EINVAL;
978 988
979 if(io->flags & MAP_ACTIVE) { 989 if (io->flags & MAP_ACTIVE) {
980 990
981 dprintk( "io->flags & MAP_ACTIVE\n"); 991 dprintk("io->flags & MAP_ACTIVE\n");
982 992
983 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO) 993 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO)
984 + (lsock * PCMCIA_IO_WIN_NO) + io->map; 994 + (lsock * PCMCIA_IO_WIN_NO) + io->map;
985 995
986 /* setup registers */ 996 /* setup registers */
987 997
988 w = (void *) &pcmcia->pcmc_pbr0; 998 w = (void *)&pcmcia->pcmc_pbr0;
989 w += winnr; 999 w += winnr;
990 1000
991 out_be32(&w->or, 0); /* turn off window first */ 1001 out_be32(&w->or, 0); /* turn off window first */
992 out_be32(&w->br, M8XX_BASE); 1002 out_be32(&w->br, M8XX_BASE);
993 1003
994 reg <<= 27; 1004 reg <<= 27;
995 reg |= M8XX_PCMCIA_POR_IO |(lsock << 2); 1005 reg |= M8XX_PCMCIA_POR_IO | (lsock << 2);
996 1006
997 reg |= m8xx_get_speed(io->speed, 1, s->bus_freq); 1007 reg |= m8xx_get_speed(io->speed, 1, s->bus_freq);
998 1008
999 if(io->flags & MAP_WRPROT) 1009 if (io->flags & MAP_WRPROT)
1000 reg |= M8XX_PCMCIA_POR_WRPROT; 1010 reg |= M8XX_PCMCIA_POR_WRPROT;
1001 1011
1002 /*if(io->flags & (MAP_16BIT | MAP_AUTOSZ))*/ 1012 /*if(io->flags & (MAP_16BIT | MAP_AUTOSZ)) */
1003 if(io->flags & MAP_16BIT) 1013 if (io->flags & MAP_16BIT)
1004 reg |= M8XX_PCMCIA_POR_16BIT; 1014 reg |= M8XX_PCMCIA_POR_16BIT;
1005 1015
1006 if(io->flags & MAP_ACTIVE) 1016 if (io->flags & MAP_ACTIVE)
1007 reg |= M8XX_PCMCIA_POR_VALID; 1017 reg |= M8XX_PCMCIA_POR_VALID;
1008 1018
1009 out_be32(&w->or, reg); 1019 out_be32(&w->or, reg);
1010 1020
1011 dprintk("Socket %u: Mapped io window %u at %#8.8x, " 1021 dprintk("Socket %u: Mapped io window %u at %#8.8x, "
1012 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or); 1022 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or);
1013 } else { 1023 } else {
1014 /* shutdown IO window */ 1024 /* shutdown IO window */
1015 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO) 1025 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO)
1016 + (lsock * PCMCIA_IO_WIN_NO) + io->map; 1026 + (lsock * PCMCIA_IO_WIN_NO) + io->map;
1017 1027
1018 /* setup registers */ 1028 /* setup registers */
1019 1029
1020 w = (void *) &pcmcia->pcmc_pbr0; 1030 w = (void *)&pcmcia->pcmc_pbr0;
1021 w += winnr; 1031 w += winnr;
1022 1032
1023 out_be32(&w->or, 0); /* turn off window */ 1033 out_be32(&w->or, 0); /* turn off window */
1024 out_be32(&w->br, 0); /* turn off base address */ 1034 out_be32(&w->br, 0); /* turn off base address */
1025 1035
1026 dprintk("Socket %u: Unmapped io window %u at %#8.8x, " 1036 dprintk("Socket %u: Unmapped io window %u at %#8.8x, "
1027 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or); 1037 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or);
@@ -1029,15 +1039,14 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
1029 1039
1030 /* copy the struct and modify the copy */ 1040 /* copy the struct and modify the copy */
1031 s->io_win[io->map] = *io; 1041 s->io_win[io->map] = *io;
1032 s->io_win[io->map].flags &= (MAP_WRPROT 1042 s->io_win[io->map].flags &= (MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
1033 | MAP_16BIT
1034 | MAP_ACTIVE);
1035 dprintk("SetIOMap exit\n"); 1043 dprintk("SetIOMap exit\n");
1036 1044
1037 return 0; 1045 return 0;
1038} 1046}
1039 1047
1040static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) 1048static int m8xx_set_mem_map(struct pcmcia_socket *sock,
1049 struct pccard_mem_map *mem)
1041{ 1050{
1042 int lsock = container_of(sock, struct socket_info, socket)->slot; 1051 int lsock = container_of(sock, struct socket_info, socket)->slot;
1043 struct socket_info *s = &socket[lsock]; 1052 struct socket_info *s = &socket[lsock];
@@ -1046,19 +1055,19 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
1046 unsigned int reg, winnr; 1055 unsigned int reg, winnr;
1047 pcmconf8xx_t *pcmcia = s->pcmcia; 1056 pcmconf8xx_t *pcmcia = s->pcmcia;
1048 1057
1049 dprintk( "SetMemMap(%d, %d, %#2.2x, %d ns, " 1058 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
1050 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, 1059 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags,
1051 mem->speed, mem->static_start, mem->card_start); 1060 mem->speed, mem->static_start, mem->card_start);
1052 1061
1053 if ((mem->map >= PCMCIA_MEM_WIN_NO) 1062 if ((mem->map >= PCMCIA_MEM_WIN_NO)
1054// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE) 1063// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE)
1055 || (mem->card_start >= 0x04000000) 1064 || (mem->card_start >= 0x04000000)
1056 || (mem->static_start & 0xfff) /* 4KByte resolution */ 1065 || (mem->static_start & 0xfff) /* 4KByte resolution */
1057 || (mem->card_start & 0xfff)) 1066 ||(mem->card_start & 0xfff))
1058 return -EINVAL; 1067 return -EINVAL;
1059 1068
1060 if((reg = m8xx_get_graycode(PCMCIA_MEM_WIN_SIZE)) == -1) { 1069 if ((reg = m8xx_get_graycode(PCMCIA_MEM_WIN_SIZE)) == -1) {
1061 printk( "Cannot set size to 0x%08x.\n", PCMCIA_MEM_WIN_SIZE); 1070 printk("Cannot set size to 0x%08x.\n", PCMCIA_MEM_WIN_SIZE);
1062 return -EINVAL; 1071 return -EINVAL;
1063 } 1072 }
1064 reg <<= 27; 1073 reg <<= 27;
@@ -1067,50 +1076,47 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *m
1067 1076
1068 /* Setup the window in the pcmcia controller */ 1077 /* Setup the window in the pcmcia controller */
1069 1078
1070 w = (void *) &pcmcia->pcmc_pbr0; 1079 w = (void *)&pcmcia->pcmc_pbr0;
1071 w += winnr; 1080 w += winnr;
1072 1081
1073 reg |= lsock << 2; 1082 reg |= lsock << 2;
1074 1083
1075 reg |= m8xx_get_speed(mem->speed, 0, s->bus_freq); 1084 reg |= m8xx_get_speed(mem->speed, 0, s->bus_freq);
1076 1085
1077 if(mem->flags & MAP_ATTRIB) 1086 if (mem->flags & MAP_ATTRIB)
1078 reg |= M8XX_PCMCIA_POR_ATTRMEM; 1087 reg |= M8XX_PCMCIA_POR_ATTRMEM;
1079 1088
1080 if(mem->flags & MAP_WRPROT) 1089 if (mem->flags & MAP_WRPROT)
1081 reg |= M8XX_PCMCIA_POR_WRPROT; 1090 reg |= M8XX_PCMCIA_POR_WRPROT;
1082 1091
1083 if(mem->flags & MAP_16BIT) 1092 if (mem->flags & MAP_16BIT)
1084 reg |= M8XX_PCMCIA_POR_16BIT; 1093 reg |= M8XX_PCMCIA_POR_16BIT;
1085 1094
1086 if(mem->flags & MAP_ACTIVE) 1095 if (mem->flags & MAP_ACTIVE)
1087 reg |= M8XX_PCMCIA_POR_VALID; 1096 reg |= M8XX_PCMCIA_POR_VALID;
1088 1097
1089 out_be32(&w->or, reg); 1098 out_be32(&w->or, reg);
1090 1099
1091 dprintk("Socket %u: Mapped memory window %u at %#8.8x, " 1100 dprintk("Socket %u: Mapped memory window %u at %#8.8x, "
1092 "OR = %#8.8x.\n", lsock, mem->map, w->br, w->or); 1101 "OR = %#8.8x.\n", lsock, mem->map, w->br, w->or);
1093 1102
1094 if(mem->flags & MAP_ACTIVE) { 1103 if (mem->flags & MAP_ACTIVE) {
1095 /* get the new base address */ 1104 /* get the new base address */
1096 mem->static_start = PCMCIA_MEM_WIN_BASE + 1105 mem->static_start = PCMCIA_MEM_WIN_BASE +
1097 (PCMCIA_MEM_WIN_SIZE * winnr) 1106 (PCMCIA_MEM_WIN_SIZE * winnr)
1098 + mem->card_start; 1107 + mem->card_start;
1099 } 1108 }
1100 1109
1101 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " 1110 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
1102 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, 1111 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags,
1103 mem->speed, mem->static_start, mem->card_start); 1112 mem->speed, mem->static_start, mem->card_start);
1104 1113
1105 /* copy the struct and modify the copy */ 1114 /* copy the struct and modify the copy */
1106 1115
1107 old = &s->mem_win[mem->map]; 1116 old = &s->mem_win[mem->map];
1108 1117
1109 *old = *mem; 1118 *old = *mem;
1110 old->flags &= (MAP_ATTRIB 1119 old->flags &= (MAP_ATTRIB | MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
1111 | MAP_WRPROT
1112 | MAP_16BIT
1113 | MAP_ACTIVE);
1114 1120
1115 return 0; 1121 return 0;
1116} 1122}
@@ -1121,7 +1127,7 @@ static int m8xx_sock_init(struct pcmcia_socket *sock)
1121 pccard_io_map io = { 0, 0, 0, 0, 1 }; 1127 pccard_io_map io = { 0, 0, 0, 0, 1 };
1122 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 }; 1128 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
1123 1129
1124 dprintk( "sock_init(%d)\n", s); 1130 dprintk("sock_init(%d)\n", s);
1125 1131
1126 m8xx_set_socket(sock, &dead_socket); 1132 m8xx_set_socket(sock, &dead_socket);
1127 for (i = 0; i < PCMCIA_IO_WIN_NO; i++) { 1133 for (i = 0; i < PCMCIA_IO_WIN_NO; i++) {
@@ -1143,7 +1149,7 @@ static int m8xx_sock_suspend(struct pcmcia_socket *sock)
1143} 1149}
1144 1150
1145static struct pccard_operations m8xx_services = { 1151static struct pccard_operations m8xx_services = {
1146 .init = m8xx_sock_init, 1152 .init = m8xx_sock_init,
1147 .suspend = m8xx_sock_suspend, 1153 .suspend = m8xx_sock_suspend,
1148 .get_status = m8xx_get_status, 1154 .get_status = m8xx_get_status,
1149 .set_socket = m8xx_set_socket, 1155 .set_socket = m8xx_set_socket,
@@ -1151,7 +1157,8 @@ static struct pccard_operations m8xx_services = {
1151 .set_mem_map = m8xx_set_mem_map, 1157 .set_mem_map = m8xx_set_mem_map,
1152}; 1158};
1153 1159
1154static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id *match) 1160static int __init m8xx_probe(struct of_device *ofdev,
1161 const struct of_device_id *match)
1155{ 1162{
1156 struct pcmcia_win *w; 1163 struct pcmcia_win *w;
1157 unsigned int i, m, hwirq; 1164 unsigned int i, m, hwirq;
@@ -1162,49 +1169,50 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
1162 pcmcia_info("%s\n", version); 1169 pcmcia_info("%s\n", version);
1163 1170
1164 pcmcia = of_iomap(np, 0); 1171 pcmcia = of_iomap(np, 0);
1165 if(pcmcia == NULL) 1172 if (pcmcia == NULL)
1166 return -EINVAL; 1173 return -EINVAL;
1167 1174
1168 pcmcia_schlvl = irq_of_parse_and_map(np, 0); 1175 pcmcia_schlvl = irq_of_parse_and_map(np, 0);
1169 hwirq = irq_map[pcmcia_schlvl].hwirq; 1176 hwirq = irq_map[pcmcia_schlvl].hwirq;
1170 if (pcmcia_schlvl < 0) 1177 if (pcmcia_schlvl < 0)
1171 return -EINVAL; 1178 return -EINVAL;
1172 1179
1173 m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra; 1180 m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;
1174 m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb; 1181 m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;
1175 1182
1176
1177 pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG 1183 pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG
1178 " with IRQ %u (%d). \n", pcmcia_schlvl, hwirq); 1184 " with IRQ %u (%d). \n", pcmcia_schlvl, hwirq);
1179 1185
1180 /* Configure Status change interrupt */ 1186 /* Configure Status change interrupt */
1181 1187
1182 if(request_irq(pcmcia_schlvl, m8xx_interrupt, IRQF_SHARED, 1188 if (request_irq(pcmcia_schlvl, m8xx_interrupt, IRQF_SHARED,
1183 driver_name, socket)) { 1189 driver_name, socket)) {
1184 pcmcia_error("Cannot allocate IRQ %u for SCHLVL!\n", 1190 pcmcia_error("Cannot allocate IRQ %u for SCHLVL!\n",
1185 pcmcia_schlvl); 1191 pcmcia_schlvl);
1186 return -1; 1192 return -1;
1187 } 1193 }
1188 1194
1189 w = (void *) &pcmcia->pcmc_pbr0; 1195 w = (void *)&pcmcia->pcmc_pbr0;
1190 1196
1191 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(0)| M8XX_PCMCIA_MASK(1)); 1197 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
1192 clrbits32(&pcmcia->pcmc_per, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1)); 1198 clrbits32(&pcmcia->pcmc_per, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
1193 1199
1194 /* connect interrupt and disable CxOE */ 1200 /* connect interrupt and disable CxOE */
1195 1201
1196 out_be32(M8XX_PGCRX(0), M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16)); 1202 out_be32(M8XX_PGCRX(0),
1197 out_be32(M8XX_PGCRX(1), M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16)); 1203 M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
1204 out_be32(M8XX_PGCRX(1),
1205 M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
1198 1206
1199 /* intialize the fixed memory windows */ 1207 /* intialize the fixed memory windows */
1200 1208
1201 for(i = 0; i < PCMCIA_SOCKETS_NO; i++){ 1209 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
1202 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) { 1210 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) {
1203 out_be32(&w->br, PCMCIA_MEM_WIN_BASE + 1211 out_be32(&w->br, PCMCIA_MEM_WIN_BASE +
1204 (PCMCIA_MEM_WIN_SIZE 1212 (PCMCIA_MEM_WIN_SIZE
1205 * (m + i * PCMCIA_MEM_WIN_NO))); 1213 * (m + i * PCMCIA_MEM_WIN_NO)));
1206 1214
1207 out_be32(&w->or, 0); /* set to not valid */ 1215 out_be32(&w->or, 0); /* set to not valid */
1208 1216
1209 w++; 1217 w++;
1210 } 1218 }
@@ -1218,10 +1226,11 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
1218 hardware_enable(0); 1226 hardware_enable(0);
1219 hardware_enable(1); 1227 hardware_enable(1);
1220 1228
1221 for (i = 0 ; i < PCMCIA_SOCKETS_NO; i++) { 1229 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
1222 socket[i].slot = i; 1230 socket[i].slot = i;
1223 socket[i].socket.owner = THIS_MODULE; 1231 socket[i].socket.owner = THIS_MODULE;
1224 socket[i].socket.features = SS_CAP_PCCARD | SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP; 1232 socket[i].socket.features =
1233 SS_CAP_PCCARD | SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP;
1225 socket[i].socket.irq_mask = 0x000; 1234 socket[i].socket.irq_mask = 0x000;
1226 socket[i].socket.map_size = 0x1000; 1235 socket[i].socket.map_size = 0x1000;
1227 socket[i].socket.io_offset = 0; 1236 socket[i].socket.io_offset = 0;
@@ -1234,7 +1243,6 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
1234 socket[i].bus_freq = ppc_proc_freq; 1243 socket[i].bus_freq = ppc_proc_freq;
1235 socket[i].hwirq = hwirq; 1244 socket[i].hwirq = hwirq;
1236 1245
1237
1238 } 1246 }
1239 1247
1240 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) { 1248 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
@@ -1246,25 +1254,25 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
1246 return 0; 1254 return 0;
1247} 1255}
1248 1256
1249static int m8xx_remove(struct of_device* ofdev) 1257static int m8xx_remove(struct of_device *ofdev)
1250{ 1258{
1251 u32 m, i; 1259 u32 m, i;
1252 struct pcmcia_win *w; 1260 struct pcmcia_win *w;
1253 pcmconf8xx_t *pcmcia = socket[0].pcmcia; 1261 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
1254 1262
1255 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) { 1263 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
1256 w = (void *) &pcmcia->pcmc_pbr0; 1264 w = (void *)&pcmcia->pcmc_pbr0;
1257 1265
1258 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(i)); 1266 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(i));
1259 out_be32(&pcmcia->pcmc_per, 1267 out_be32(&pcmcia->pcmc_per,
1260 in_be32(&pcmcia->pcmc_per) & ~M8XX_PCMCIA_MASK(i)); 1268 in_be32(&pcmcia->pcmc_per) & ~M8XX_PCMCIA_MASK(i));
1261 1269
1262 /* turn off interrupt and disable CxOE */ 1270 /* turn off interrupt and disable CxOE */
1263 out_be32(M8XX_PGCRX(i), M8XX_PGCRX_CXOE); 1271 out_be32(M8XX_PGCRX(i), M8XX_PGCRX_CXOE);
1264 1272
1265 /* turn off memory windows */ 1273 /* turn off memory windows */
1266 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) { 1274 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) {
1267 out_be32(&w->or, 0); /* set to not valid */ 1275 out_be32(&w->or, 0); /* set to not valid */
1268 w++; 1276 w++;
1269 } 1277 }
1270 1278
@@ -1299,21 +1307,21 @@ static int m8xx_resume(struct platform_device *pdev)
1299 1307
1300static struct of_device_id m8xx_pcmcia_match[] = { 1308static struct of_device_id m8xx_pcmcia_match[] = {
1301 { 1309 {
1302 .type = "pcmcia", 1310 .type = "pcmcia",
1303 .compatible = "fsl,pq-pcmcia", 1311 .compatible = "fsl,pq-pcmcia",
1304 }, 1312 },
1305 {}, 1313 {},
1306}; 1314};
1307 1315
1308MODULE_DEVICE_TABLE(of, m8xx_pcmcia_match); 1316MODULE_DEVICE_TABLE(of, m8xx_pcmcia_match);
1309 1317
1310static struct of_platform_driver m8xx_pcmcia_driver = { 1318static struct of_platform_driver m8xx_pcmcia_driver = {
1311 .name = (char *) driver_name, 1319 .name = (char *)driver_name,
1312 .match_table = m8xx_pcmcia_match, 1320 .match_table = m8xx_pcmcia_match,
1313 .probe = m8xx_probe, 1321 .probe = m8xx_probe,
1314 .remove = m8xx_remove, 1322 .remove = m8xx_remove,
1315 .suspend = m8xx_suspend, 1323 .suspend = m8xx_suspend,
1316 .resume = m8xx_resume, 1324 .resume = m8xx_resume,
1317}; 1325};
1318 1326
1319static int __init m8xx_init(void) 1327static int __init m8xx_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-24 22:42:59 -0400