diff options
Diffstat (limited to 'drivers/pcmcia/m32r_pcc.c')
-rw-r--r-- | drivers/pcmcia/m32r_pcc.c | 51 |
1 files changed, 20 insertions, 31 deletions
diff --git a/drivers/pcmcia/m32r_pcc.c b/drivers/pcmcia/m32r_pcc.c index c6524f99ccc3..72844c5a6d05 100644 --- a/drivers/pcmcia/m32r_pcc.c +++ b/drivers/pcmcia/m32r_pcc.c | |||
@@ -45,16 +45,6 @@ | |||
45 | 45 | ||
46 | #define PCC_DEBUG_DBEX | 46 | #define PCC_DEBUG_DBEX |
47 | 47 | ||
48 | #ifdef CONFIG_PCMCIA_DEBUG | ||
49 | static int m32r_pcc_debug; | ||
50 | module_param(m32r_pcc_debug, int, 0644); | ||
51 | #define debug(lvl, fmt, arg...) do { \ | ||
52 | if (m32r_pcc_debug > (lvl)) \ | ||
53 | printk(KERN_DEBUG "m32r_pcc: " fmt , ## arg); \ | ||
54 | } while (0) | ||
55 | #else | ||
56 | #define debug(n, args...) do { } while (0) | ||
57 | #endif | ||
58 | 48 | ||
59 | /* Poll status interval -- 0 means default to interrupt */ | 49 | /* Poll status interval -- 0 means default to interrupt */ |
60 | static int poll_interval = 0; | 50 | static int poll_interval = 0; |
@@ -358,7 +348,7 @@ static irqreturn_t pcc_interrupt(int irq, void *dev) | |||
358 | u_int events, active; | 348 | u_int events, active; |
359 | int handled = 0; | 349 | int handled = 0; |
360 | 350 | ||
361 | debug(4, "m32r: pcc_interrupt(%d)\n", irq); | 351 | pr_debug("m32r_pcc: pcc_interrupt(%d)\n", irq); |
362 | 352 | ||
363 | for (j = 0; j < 20; j++) { | 353 | for (j = 0; j < 20; j++) { |
364 | active = 0; | 354 | active = 0; |
@@ -369,13 +359,14 @@ static irqreturn_t pcc_interrupt(int irq, void *dev) | |||
369 | handled = 1; | 359 | handled = 1; |
370 | irc = pcc_get(i, PCIRC); | 360 | irc = pcc_get(i, PCIRC); |
371 | irc >>=16; | 361 | irc >>=16; |
372 | debug(2, "m32r-pcc:interrupt: socket %d pcirc 0x%02x ", i, irc); | 362 | pr_debug("m32r_pcc: interrupt: socket %d pcirc 0x%02x ", |
363 | i, irc); | ||
373 | if (!irc) | 364 | if (!irc) |
374 | continue; | 365 | continue; |
375 | 366 | ||
376 | events = (irc) ? SS_DETECT : 0; | 367 | events = (irc) ? SS_DETECT : 0; |
377 | events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0; | 368 | events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0; |
378 | debug(2, " event 0x%02x\n", events); | 369 | pr_debug("m32r_pcc: event 0x%02x\n", events); |
379 | 370 | ||
380 | if (events) | 371 | if (events) |
381 | pcmcia_parse_events(&socket[i].socket, events); | 372 | pcmcia_parse_events(&socket[i].socket, events); |
@@ -388,7 +379,7 @@ static irqreturn_t pcc_interrupt(int irq, void *dev) | |||
388 | if (j == 20) | 379 | if (j == 20) |
389 | printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n"); | 380 | printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n"); |
390 | 381 | ||
391 | debug(4, "m32r-pcc: interrupt done\n"); | 382 | pr_debug("m32r_pcc: interrupt done\n"); |
392 | 383 | ||
393 | return IRQ_RETVAL(handled); | 384 | return IRQ_RETVAL(handled); |
394 | } /* pcc_interrupt */ | 385 | } /* pcc_interrupt */ |
@@ -422,7 +413,7 @@ static int _pcc_get_status(u_short sock, u_int *value) | |||
422 | status = pcc_get(sock,PCCSIGCR); | 413 | status = pcc_get(sock,PCCSIGCR); |
423 | *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0; | 414 | *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0; |
424 | 415 | ||
425 | debug(3, "m32r-pcc: GetStatus(%d) = %#4.4x\n", sock, *value); | 416 | pr_debug("m32r_pcc: GetStatus(%d) = %#4.4x\n", sock, *value); |
426 | return 0; | 417 | return 0; |
427 | } /* _get_status */ | 418 | } /* _get_status */ |
428 | 419 | ||
@@ -432,7 +423,7 @@ static int _pcc_set_socket(u_short sock, socket_state_t *state) | |||
432 | { | 423 | { |
433 | u_long reg = 0; | 424 | u_long reg = 0; |
434 | 425 | ||
435 | debug(3, "m32r-pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " | 426 | pr_debug("m32r_pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " |
436 | "io_irq %d, csc_mask %#2.2x)", sock, state->flags, | 427 | "io_irq %d, csc_mask %#2.2x)", sock, state->flags, |
437 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); | 428 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); |
438 | 429 | ||
@@ -448,11 +439,11 @@ static int _pcc_set_socket(u_short sock, socket_state_t *state) | |||
448 | } | 439 | } |
449 | 440 | ||
450 | if (state->flags & SS_RESET) { | 441 | if (state->flags & SS_RESET) { |
451 | debug(3, ":RESET\n"); | 442 | pr_debug("m32r_pcc: :RESET\n"); |
452 | reg |= PCCSIGCR_CRST; | 443 | reg |= PCCSIGCR_CRST; |
453 | } | 444 | } |
454 | if (state->flags & SS_OUTPUT_ENA){ | 445 | if (state->flags & SS_OUTPUT_ENA){ |
455 | debug(3, ":OUTPUT_ENA\n"); | 446 | pr_debug("m32r_pcc: :OUTPUT_ENA\n"); |
456 | /* bit clear */ | 447 | /* bit clear */ |
457 | } else { | 448 | } else { |
458 | reg |= PCCSIGCR_SEN; | 449 | reg |= PCCSIGCR_SEN; |
@@ -460,28 +451,26 @@ static int _pcc_set_socket(u_short sock, socket_state_t *state) | |||
460 | 451 | ||
461 | pcc_set(sock,PCCSIGCR,reg); | 452 | pcc_set(sock,PCCSIGCR,reg); |
462 | 453 | ||
463 | #ifdef CONFIG_PCMCIA_DEBUG | ||
464 | if(state->flags & SS_IOCARD){ | 454 | if(state->flags & SS_IOCARD){ |
465 | debug(3, ":IOCARD"); | 455 | pr_debug("m32r_pcc: :IOCARD"); |
466 | } | 456 | } |
467 | if (state->flags & SS_PWR_AUTO) { | 457 | if (state->flags & SS_PWR_AUTO) { |
468 | debug(3, ":PWR_AUTO"); | 458 | pr_debug("m32r_pcc: :PWR_AUTO"); |
469 | } | 459 | } |
470 | if (state->csc_mask & SS_DETECT) | 460 | if (state->csc_mask & SS_DETECT) |
471 | debug(3, ":csc-SS_DETECT"); | 461 | pr_debug("m32r_pcc: :csc-SS_DETECT"); |
472 | if (state->flags & SS_IOCARD) { | 462 | if (state->flags & SS_IOCARD) { |
473 | if (state->csc_mask & SS_STSCHG) | 463 | if (state->csc_mask & SS_STSCHG) |
474 | debug(3, ":STSCHG"); | 464 | pr_debug("m32r_pcc: :STSCHG"); |
475 | } else { | 465 | } else { |
476 | if (state->csc_mask & SS_BATDEAD) | 466 | if (state->csc_mask & SS_BATDEAD) |
477 | debug(3, ":BATDEAD"); | 467 | pr_debug("m32r_pcc: :BATDEAD"); |
478 | if (state->csc_mask & SS_BATWARN) | 468 | if (state->csc_mask & SS_BATWARN) |
479 | debug(3, ":BATWARN"); | 469 | pr_debug("m32r_pcc: :BATWARN"); |
480 | if (state->csc_mask & SS_READY) | 470 | if (state->csc_mask & SS_READY) |
481 | debug(3, ":READY"); | 471 | pr_debug("m32r_pcc: :READY"); |
482 | } | 472 | } |
483 | debug(3, "\n"); | 473 | pr_debug("m32r_pcc: \n"); |
484 | #endif | ||
485 | return 0; | 474 | return 0; |
486 | } /* _set_socket */ | 475 | } /* _set_socket */ |
487 | 476 | ||
@@ -491,7 +480,7 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io) | |||
491 | { | 480 | { |
492 | u_char map; | 481 | u_char map; |
493 | 482 | ||
494 | debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, " | 483 | pr_debug("m32r_pcc: SetIOMap(%d, %d, %#2.2x, %d ns, " |
495 | "%#llx-%#llx)\n", sock, io->map, io->flags, | 484 | "%#llx-%#llx)\n", sock, io->map, io->flags, |
496 | io->speed, (unsigned long long)io->start, | 485 | io->speed, (unsigned long long)io->start, |
497 | (unsigned long long)io->stop); | 486 | (unsigned long long)io->stop); |
@@ -515,7 +504,7 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem) | |||
515 | #endif | 504 | #endif |
516 | #endif | 505 | #endif |
517 | 506 | ||
518 | debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, " | 507 | pr_debug("m32r_pcc: SetMemMap(%d, %d, %#2.2x, %d ns, " |
519 | "%#llx, %#x)\n", sock, map, mem->flags, | 508 | "%#llx, %#x)\n", sock, map, mem->flags, |
520 | mem->speed, (unsigned long long)mem->static_start, | 509 | mem->speed, (unsigned long long)mem->static_start, |
521 | mem->card_start); | 510 | mem->card_start); |
@@ -662,7 +651,7 @@ static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) | |||
662 | 651 | ||
663 | static int pcc_init(struct pcmcia_socket *s) | 652 | static int pcc_init(struct pcmcia_socket *s) |
664 | { | 653 | { |
665 | debug(4, "m32r-pcc: init call\n"); | 654 | pr_debug("m32r_pcc: init call\n"); |
666 | return 0; | 655 | return 0; |
667 | } | 656 | } |
668 | 657 | ||