diff options
Diffstat (limited to 'drivers/pcmcia/m32r_cfc.c')
| -rw-r--r-- | drivers/pcmcia/m32r_cfc.c | 57 |
1 files changed, 23 insertions, 34 deletions
diff --git a/drivers/pcmcia/m32r_cfc.c b/drivers/pcmcia/m32r_cfc.c index 581bfa95429e..b1111c6bf062 100644 --- a/drivers/pcmcia/m32r_cfc.c +++ b/drivers/pcmcia/m32r_cfc.c | |||
| @@ -24,9 +24,9 @@ | |||
| 24 | #include <linux/workqueue.h> | 24 | #include <linux/workqueue.h> |
| 25 | #include <linux/interrupt.h> | 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
| 27 | #include <linux/bitops.h> | ||
| 27 | #include <asm/irq.h> | 28 | #include <asm/irq.h> |
| 28 | #include <asm/io.h> | 29 | #include <asm/io.h> |
| 29 | #include <asm/bitops.h> | ||
| 30 | #include <asm/system.h> | 30 | #include <asm/system.h> |
| 31 | 31 | ||
| 32 | #include <pcmcia/version.h> | 32 | #include <pcmcia/version.h> |
| @@ -444,7 +444,7 @@ static int _pcc_get_status(u_short sock, u_int *value) | |||
| 444 | debug(3, "m32r_cfc: _pcc_get_status: " | 444 | debug(3, "m32r_cfc: _pcc_get_status: " |
| 445 | "power off (CPCR=0x%08x)\n", status); | 445 | "power off (CPCR=0x%08x)\n", status); |
| 446 | } | 446 | } |
| 447 | #elif defined(CONFIG_PLAT_MAPPI2) | 447 | #elif defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) |
| 448 | if ( status ) { | 448 | if ( status ) { |
| 449 | status = pcc_get(sock, (unsigned int)PLD_CPCR); | 449 | status = pcc_get(sock, (unsigned int)PLD_CPCR); |
| 450 | if (status == 0) { /* power off */ | 450 | if (status == 0) { /* power off */ |
| @@ -452,18 +452,23 @@ static int _pcc_get_status(u_short sock, u_int *value) | |||
| 452 | pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); /* force buffer off for ZA-36 */ | 452 | pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); /* force buffer off for ZA-36 */ |
| 453 | udelay(50); | 453 | udelay(50); |
| 454 | } | 454 | } |
| 455 | status = pcc_get(sock, (unsigned int)PLD_CFBUFCR); | 455 | *value |= SS_POWERON; |
| 456 | if (status != 0) { /* buffer off */ | 456 | |
| 457 | pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); | 457 | pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); |
| 458 | udelay(50); | 458 | udelay(50); |
| 459 | pcc_set(sock, (unsigned int)PLD_CFRSTCR, 0x0101); | 459 | pcc_set(sock, (unsigned int)PLD_CFRSTCR, 0x0101); |
| 460 | udelay(25); /* for IDE reset */ | 460 | udelay(25); /* for IDE reset */ |
| 461 | pcc_set(sock, (unsigned int)PLD_CFRSTCR, 0x0100); | 461 | pcc_set(sock, (unsigned int)PLD_CFRSTCR, 0x0100); |
| 462 | mdelay(2); /* for IDE reset */ | 462 | mdelay(2); /* for IDE reset */ |
| 463 | } else { | 463 | |
| 464 | *value |= SS_POWERON; | 464 | *value |= SS_READY; |
| 465 | *value |= SS_READY; | 465 | *value |= SS_3VCARD; |
| 466 | } | 466 | } else { |
| 467 | /* disable CF power */ | ||
| 468 | pcc_set(sock, (unsigned int)PLD_CPCR, 0); | ||
| 469 | udelay(100); | ||
| 470 | debug(3, "m32r_cfc: _pcc_get_status: " | ||
| 471 | "power off (CPCR=0x%08x)\n", status); | ||
| 467 | } | 472 | } |
| 468 | #else | 473 | #else |
| 469 | #error no platform configuration | 474 | #error no platform configuration |
| @@ -479,14 +484,13 @@ static int _pcc_get_socket(u_short sock, socket_state_t *state) | |||
| 479 | { | 484 | { |
| 480 | // pcc_socket_t *t = &socket[sock]; | 485 | // pcc_socket_t *t = &socket[sock]; |
| 481 | 486 | ||
| 482 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT) | ||
| 483 | state->flags = 0; | 487 | state->flags = 0; |
| 484 | state->csc_mask = SS_DETECT; | 488 | state->csc_mask = SS_DETECT; |
| 485 | state->csc_mask |= SS_READY; | 489 | state->csc_mask |= SS_READY; |
| 486 | state->io_irq = 0; | 490 | state->io_irq = 0; |
| 487 | state->Vcc = 33; /* 3.3V fixed */ | 491 | state->Vcc = 33; /* 3.3V fixed */ |
| 488 | state->Vpp = 33; | 492 | state->Vpp = 33; |
| 489 | #endif | 493 | |
| 490 | debug(3, "m32r_cfc: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, " | 494 | debug(3, "m32r_cfc: GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, " |
| 491 | "io_irq %d, csc_mask %#2.2x\n", sock, state->flags, | 495 | "io_irq %d, csc_mask %#2.2x\n", sock, state->flags, |
| 492 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); | 496 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); |
| @@ -497,32 +501,17 @@ static int _pcc_get_socket(u_short sock, socket_state_t *state) | |||
| 497 | 501 | ||
| 498 | static int _pcc_set_socket(u_short sock, socket_state_t *state) | 502 | static int _pcc_set_socket(u_short sock, socket_state_t *state) |
| 499 | { | 503 | { |
| 500 | #if defined(CONFIG_PLAT_MAPPI2) | ||
| 501 | u_long reg = 0; | ||
| 502 | #endif | ||
| 503 | debug(3, "m32r_cfc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " | 504 | debug(3, "m32r_cfc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " |
| 504 | "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, | 505 | "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, |
| 505 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); | 506 | state->Vcc, state->Vpp, state->io_irq, state->csc_mask); |
| 506 | 507 | ||
| 507 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT) | 508 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) |
| 508 | if (state->Vcc) { | 509 | if (state->Vcc) { |
| 509 | if ((state->Vcc != 50) && (state->Vcc != 33)) | 510 | if ((state->Vcc != 50) && (state->Vcc != 33)) |
| 510 | return -EINVAL; | 511 | return -EINVAL; |
| 511 | /* accept 5V and 3.3V */ | 512 | /* accept 5V and 3.3V */ |
| 512 | } | 513 | } |
| 513 | #elif defined(CONFIG_PLAT_MAPPI2) | ||
| 514 | if (state->Vcc) { | ||
| 515 | /* | ||
| 516 | * 5V only | ||
| 517 | */ | ||
| 518 | if (state->Vcc == 50) { | ||
| 519 | reg |= PCCSIGCR_VEN; | ||
| 520 | } else { | ||
| 521 | return -EINVAL; | ||
| 522 | } | ||
| 523 | } | ||
| 524 | #endif | 514 | #endif |
| 525 | |||
| 526 | if (state->flags & SS_RESET) { | 515 | if (state->flags & SS_RESET) { |
| 527 | debug(3, ":RESET\n"); | 516 | debug(3, ":RESET\n"); |
| 528 | pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x101); | 517 | pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x101); |
| @@ -788,7 +777,7 @@ static int __init init_m32r_pcc(void) | |||
| 788 | return ret; | 777 | return ret; |
| 789 | } | 778 | } |
| 790 | 779 | ||
| 791 | #if defined(CONFIG_PLAT_MAPPI2) | 780 | #if defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) |
| 792 | pcc_set(0, (unsigned int)PLD_CFCR0, 0x0f0f); | 781 | pcc_set(0, (unsigned int)PLD_CFCR0, 0x0f0f); |
| 793 | pcc_set(0, (unsigned int)PLD_CFCR1, 0x0200); | 782 | pcc_set(0, (unsigned int)PLD_CFCR1, 0x0200); |
| 794 | #endif | 783 | #endif |
| @@ -825,7 +814,7 @@ static int __init init_m32r_pcc(void) | |||
| 825 | for (i = 0 ; i < pcc_sockets ; i++) { | 814 | for (i = 0 ; i < pcc_sockets ; i++) { |
| 826 | socket[i].socket.dev.dev = &pcc_device.dev; | 815 | socket[i].socket.dev.dev = &pcc_device.dev; |
| 827 | socket[i].socket.ops = &pcc_operations; | 816 | socket[i].socket.ops = &pcc_operations; |
| 828 | socket[i].socket.resource_ops = &pccard_static_ops; | 817 | socket[i].socket.resource_ops = &pccard_nonstatic_ops; |
| 829 | socket[i].socket.owner = THIS_MODULE; | 818 | socket[i].socket.owner = THIS_MODULE; |
| 830 | socket[i].number = i; | 819 | socket[i].number = i; |
| 831 | ret = pcmcia_register_socket(&socket[i].socket); | 820 | ret = pcmcia_register_socket(&socket[i].socket); |
