6 files changed, 56 insertions, 78 deletions

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index f01e344cf4bd..98e6fdf34d30 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
 obj-$(CONFIG_X86_VISWS) += setup-irq.o
 obj-$(CONFIG_MN10300) += setup-bus.o
 obj-$(CONFIG_MICROBLAZE) += setup-bus.o
+obj-$(CONFIG_TILE) += setup-bus.o setup-irq.o
 
 #
 # ACPI Related PCI FW Functions
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 003170ea2e39..69546e9213dd 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -64,77 +64,6 @@ void pci_bus_remove_resources(struct pci_bus *bus)
         }
 }
 
-static bool pci_bus_resource_better(struct resource *res1, bool pos1,
-                                    struct resource *res2, bool pos2)
-{
-        /* If exactly one is positive decode, always prefer that one */
-        if (pos1 != pos2)
-                return pos1 ? true : false;
-
-        /* Prefer the one that contains the highest address */
-        if (res1->end != res2->end)
-                return (res1->end > res2->end) ? true : false;
-
-        /* Otherwise, prefer the one with highest "center of gravity" */
-        if (res1->start != res2->start)
-                return (res1->start > res2->start) ? true : false;
-
-        /* Otherwise, choose one arbitrarily (but consistently) */
-        return (res1 > res2) ? true : false;
-}
-
-static bool pci_bus_resource_positive(struct pci_bus *bus, struct resource *res)
-{
-        struct pci_bus_resource *bus_res;
-
-        /*
-         * This relies on the fact that pci_bus.resource[] refers to P2P or
-         * CardBus bridge base/limit registers, which are always positively
-         * decoded.  The pci_bus.resources list contains host bridge or
-         * subtractively decoded resources.
-         */
-        list_for_each_entry(bus_res, &bus->resources, list) {
-                if (bus_res->res == res)
-                        return (bus_res->flags & PCI_SUBTRACTIVE_DECODE) ?
-                                false : true;
-        }
-        return true;
-}
-
-/*
- * Find the next-best bus resource after the cursor "res".  If the cursor is
- * NULL, return the best resource.  "Best" means that we prefer positive
- * decode regions over subtractive decode, then those at higher addresses.
- */
-static struct resource *pci_bus_find_resource_prev(struct pci_bus *bus,
-                                                   unsigned int type,
-                                                   struct resource *res)
-{
-        bool res_pos, r_pos, prev_pos = false;
-        struct resource *r, *prev = NULL;
-        int i;
-
-        res_pos = pci_bus_resource_positive(bus, res);
-        pci_bus_for_each_resource(bus, r, i) {
-                if (!r)
-                        continue;
-
-                if ((r->flags & IORESOURCE_TYPE_BITS) != type)
-                        continue;
-
-                r_pos = pci_bus_resource_positive(bus, r);
-                if (!res || pci_bus_resource_better(res, res_pos, r, r_pos)) {
-                        if (!prev || pci_bus_resource_better(r, r_pos,
-                                                             prev, prev_pos)) {
-                                prev = r;
-                                prev_pos = r_pos;
-                        }
-                }
-        }
-
-        return prev;
-}
-
 /**
  * pci_bus_alloc_resource - allocate a resource from a parent bus
  * @bus: PCI bus
@@ -160,10 +89,9 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
                                           resource_size_t),
                 void *alignf_data)
 {
-        int ret = -ENOMEM;
+        int i, ret = -ENOMEM;
         struct resource *r;
         resource_size_t max = -1;
-        unsigned int type = res->flags & IORESOURCE_TYPE_BITS;
 
         type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
 
@@ -171,9 +99,10 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
         if (!(res->flags & IORESOURCE_MEM_64))
                 max = PCIBIOS_MAX_MEM_32;
 
-        /* Look for space at highest addresses first */
-        r = pci_bus_find_resource_prev(bus, type, NULL);
-        for ( ; r; r = pci_bus_find_resource_prev(bus, type, r)) {
+        pci_bus_for_each_resource(bus, r, i) {
+                if (!r)
+                        continue;
+
                 /* type_mask must match */
                 if ((res->flags ^ r->flags) & type_mask)
                         continue;
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 0157708d474d..09933eb9126b 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -1417,6 +1417,11 @@ int __init enable_drhd_fault_handling(void)
                                (unsigned long long)drhd->reg_base_addr, ret);
                         return -1;
                 }
+
+                /*
+                 * Clear any previous faults.
+                 */
+                dmar_fault(iommu->irq, iommu);
         }
 
         return 0;
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 95712a375cd5..63d5042f2079 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -715,7 +715,7 @@ int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
         nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
         start = vma->vm_pgoff;
         size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
-        pci_start = (mmap_api == PCI_MMAP_SYSFS) ?
+        pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
                         pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
         if (start >= pci_start && start < pci_start + size &&
                         start + nr <= pci_start + size)
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index ea00647f4732..27911b55c2a5 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -10,7 +10,6 @@
 #include <linux/module.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/smp_lock.h>
 #include <linux/capability.h>
 #include <asm/uaccess.h>
 #include <asm/byteorder.h>
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f5c63fe9db5c..53a786fd0d40 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2136,6 +2136,24 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB,
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB,
                         quirk_unhide_mch_dev6);
 
+#ifdef CONFIG_TILE
+/*
+ * The Tilera TILEmpower platform needs to set the link speed
+ * to 2.5GT(Giga-Transfers)/s (Gen 1). The default link speed
+ * setting is 5GT/s (Gen 2). 0x98 is the Link Control2 PCIe
+ * capability register of the PEX8624 PCIe switch. The switch
+ * supports link speed auto negotiation, but falsely sets
+ * the link speed to 5GT/s.
+ */
+static void __devinit quirk_tile_plx_gen1(struct pci_dev *dev)
+{
+        if (tile_plx_gen1) {
+                pci_write_config_dword(dev, 0x98, 0x1);
+                mdelay(50);
+        }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1);
+#endif /* CONFIG_TILE */
 
 #ifdef CONFIG_PCI_MSI
 /* Some chipsets do not support MSI. We cannot easily rely on setting
@@ -2311,6 +2329,9 @@ static void __devinit nvbridge_check_legacy_irq_routing(struct pci_dev *dev)
 {
         u32 cfg;
 
+        if (!pci_find_capability(dev, PCI_CAP_ID_HT))
+                return;
+
         pci_read_config_dword(dev, 0x74, &cfg);
 
         if (cfg & ((1 << 2) | (1 << 15))) {
@@ -2746,6 +2767,29 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_m
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
 #endif /*CONFIG_MMC_RICOH_MMC*/
 
+#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
+#define VTUNCERRMSK_REG 0x1ac
+#define VTD_MSK_SPEC_ERRORS     (1 << 31)
+/*
+ * This is a quirk for masking vt-d spec defined errors to platform error
+ * handling logic. With out this, platforms using Intel 7500, 5500 chipsets
+ * (and the derivative chipsets like X58 etc) seem to generate NMI/SMI (based
+ * on the RAS config settings of the platform) when a vt-d fault happens.
+ * The resulting SMI caused the system to hang.
+ *
+ * VT-d spec related errors are already handled by the VT-d OS code, so no
+ * need to report the same error through other channels.
+ */
+static void vtd_mask_spec_errors(struct pci_dev *dev)
+{
+        u32 word;
+
+        pci_read_config_dword(dev, VTUNCERRMSK_REG, &word);
+        pci_write_config_dword(dev, VTUNCERRMSK_REG, word | VTD_MSK_SPEC_ERRORS);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
+#endif
 
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
                           struct pci_fixup *end)