14 files changed, 180 insertions, 201 deletions

diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c
index 44fe6aa6a43f..3d2076f59911 100644
--- a/drivers/pci/host/pci-host-generic.c
+++ b/drivers/pci/host/pci-host-generic.c
@@ -385,4 +385,4 @@ module_platform_driver(gen_pci_driver);
 
 MODULE_DESCRIPTION("Generic PCI host driver");
 MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
-MODULE_LICENSE("GPLv2");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index ce23e0f076b6..a8c6f1a92e0f 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -1094,4 +1094,4 @@ module_platform_driver(mvebu_pcie_driver);
 
 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
 MODULE_DESCRIPTION("Marvell EBU PCIe driver");
-MODULE_LICENSE("GPLv2");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 083cf37ca047..c284e841e3ea 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -1716,4 +1716,4 @@ module_platform_driver(tegra_pcie_driver);
 
 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
 MODULE_DESCRIPTION("NVIDIA Tegra PCIe driver");
-MODULE_LICENSE("GPLv2");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pci/hotplug/cpqphp_sysfs.c b/drivers/pci/hotplug/cpqphp_sysfs.c
index 4a392c44e3d3..d81648f71425 100644
--- a/drivers/pci/hotplug/cpqphp_sysfs.c
+++ b/drivers/pci/hotplug/cpqphp_sysfs.c
@@ -216,8 +216,7 @@ void cpqhp_create_debugfs_files(struct controller *ctrl)
 
 void cpqhp_remove_debugfs_files(struct controller *ctrl)
 {
-        if (ctrl->dentry)
-                debugfs_remove(ctrl->dentry);
+        debugfs_remove(ctrl->dentry);
         ctrl->dentry = NULL;
 }
 
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 8e9012dca450..9e5a9fbb93d7 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -92,9 +92,10 @@ struct controller {
         struct slot *slot;
         wait_queue_head_t queue;        /* sleep & wake process */
         u32 slot_cap;
+        u32 slot_ctrl;
         struct timer_list poll_timer;
+        unsigned long cmd_started;      /* jiffies */
         unsigned int cmd_busy:1;
-        unsigned int no_cmd_complete:1;
         unsigned int link_active_reporting:1;
         unsigned int notification_enabled:1;
         unsigned int power_fault_detected;
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index a2297db80813..07aa722bb12c 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -255,6 +255,13 @@ static int pciehp_probe(struct pcie_device *dev)
         else if (pciehp_acpi_slot_detection_check(dev->port))
                 goto err_out_none;
 
+        if (!dev->port->subordinate) {
+                /* Can happen if we run out of bus numbers during probe */
+                dev_err(&dev->device,
+                        "Hotplug bridge without secondary bus, ignoring\n");
+                goto err_out_none;
+        }
+
         ctrl = pcie_init(dev);
         if (!ctrl) {
                 dev_err(&dev->device, "Controller initialization failed\n");
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 42914e04d110..9da84b8b27d8 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -104,11 +104,10 @@ static inline void pciehp_free_irq(struct controller *ctrl)
                 free_irq(ctrl->pcie->irq, ctrl);
 }
 
-static int pcie_poll_cmd(struct controller *ctrl)
+static int pcie_poll_cmd(struct controller *ctrl, int timeout)
 {
         struct pci_dev *pdev = ctrl_dev(ctrl);
         u16 slot_status;
-        int timeout = 1000;
 
         pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
         if (slot_status & PCI_EXP_SLTSTA_CC) {
@@ -129,18 +128,52 @@ static int pcie_poll_cmd(struct controller *ctrl)
         return 0;       /* timeout */
 }
 
-static void pcie_wait_cmd(struct controller *ctrl, int poll)
+static void pcie_wait_cmd(struct controller *ctrl)
 {
         unsigned int msecs = pciehp_poll_mode ? 2500 : 1000;
-        unsigned long timeout = msecs_to_jiffies(msecs);
+        unsigned long duration = msecs_to_jiffies(msecs);
+        unsigned long cmd_timeout = ctrl->cmd_started + duration;
+        unsigned long now, timeout;
         int rc;
 
-        if (poll)
-                rc = pcie_poll_cmd(ctrl);
+        /*
+         * If the controller does not generate notifications for command
+         * completions, we never need to wait between writes.
+         */
+        if (NO_CMD_CMPL(ctrl))
+                return;
+
+        if (!ctrl->cmd_busy)
+                return;
+
+        /*
+         * Even if the command has already timed out, we want to call
+         * pcie_poll_cmd() so it can clear PCI_EXP_SLTSTA_CC.
+         */
+        now = jiffies;
+        if (time_before_eq(cmd_timeout, now))
+                timeout = 1;
         else
+                timeout = cmd_timeout - now;
+
+        if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&
+            ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)
                 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
+        else
+                rc = pcie_poll_cmd(ctrl, timeout);
+
+        /*
+         * Controllers with errata like Intel CF118 don't generate
+         * completion notifications unless the power/indicator/interlock
+         * control bits are changed.  On such controllers, we'll emit this
+         * timeout message when we wait for completion of commands that
+         * don't change those bits, e.g., commands that merely enable
+         * interrupts.
+         */
         if (!rc)
-                ctrl_dbg(ctrl, "Command not completed in 1000 msec\n");
+                ctrl_info(ctrl, "Timeout on hotplug command %#010x (issued %u msec ago)\n",
+                          ctrl->slot_ctrl,
+                          jiffies_to_msecs(now - ctrl->cmd_started));
 }
 
 /**
@@ -152,34 +185,12 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll)
 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
 {
         struct pci_dev *pdev = ctrl_dev(ctrl);
-        u16 slot_status;
         u16 slot_ctrl;
 
         mutex_lock(&ctrl->ctrl_lock);
 
-        pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
-        if (slot_status & PCI_EXP_SLTSTA_CC) {
-                pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
-                                           PCI_EXP_SLTSTA_CC);
-                if (!ctrl->no_cmd_complete) {
-                        /*
-                         * After 1 sec and CMD_COMPLETED still not set, just
-                         * proceed forward to issue the next command according
-                         * to spec. Just print out the error message.
-                         */
-                        ctrl_dbg(ctrl, "CMD_COMPLETED not clear after 1 sec\n");
-                } else if (!NO_CMD_CMPL(ctrl)) {
-                        /*
-                         * This controller seems to notify of command completed
-                         * event even though it supports none of power
-                         * controller, attention led, power led and EMI.
-                         */
-                        ctrl_dbg(ctrl, "Unexpected CMD_COMPLETED. Need to wait for command completed event\n");
-                        ctrl->no_cmd_complete = 0;
-                } else {
-                        ctrl_dbg(ctrl, "Unexpected CMD_COMPLETED. Maybe the controller is broken\n");
-                }
-        }
+        /* Wait for any previous command that might still be in progress */
+        pcie_wait_cmd(ctrl);
 
         pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
         slot_ctrl &= ~mask;
@@ -187,22 +198,9 @@ static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
         ctrl->cmd_busy = 1;
         smp_mb();
         pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
+        ctrl->cmd_started = jiffies;
+        ctrl->slot_ctrl = slot_ctrl;
 
-        /*
-         * Wait for command completion.
-         */
-        if (!ctrl->no_cmd_complete) {
-                int poll = 0;
-                /*
-                 * if hotplug interrupt is not enabled or command
-                 * completed interrupt is not enabled, we need to poll
-                 * command completed event.
-                 */
-                if (!(slot_ctrl & PCI_EXP_SLTCTL_HPIE) ||
-                    !(slot_ctrl & PCI_EXP_SLTCTL_CCIE))
-                        poll = 1;
-                pcie_wait_cmd(ctrl, poll);
-        }
         mutex_unlock(&ctrl->ctrl_lock);
 }
 
@@ -773,15 +771,6 @@ struct controller *pcie_init(struct pcie_device *dev)
         mutex_init(&ctrl->ctrl_lock);
         init_waitqueue_head(&ctrl->queue);
         dbg_ctrl(ctrl);
-        /*
-         * Controller doesn't notify of command completion if the "No
-         * Command Completed Support" bit is set in Slot Capability
-         * register or the controller supports none of power
-         * controller, attention led, power led and EMI.
-         */
-        if (NO_CMD_CMPL(ctrl) ||
-            !(POWER_CTRL(ctrl) | ATTN_LED(ctrl) | PWR_LED(ctrl) | EMI(ctrl)))
-                ctrl->no_cmd_complete = 1;
 
         /* Check if Data Link Layer Link Active Reporting is implemented */
         pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
@@ -794,7 +783,7 @@ struct controller *pcie_init(struct pcie_device *dev)
         pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
                 PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
                 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
-                PCI_EXP_SLTSTA_CC);
+                PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC);
 
         /* Disable software notification */
         pcie_disable_notification(ctrl);
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 13f3d3037272..5a40516444f3 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -149,15 +149,14 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
         pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
 }
 
-static void msix_set_enable(struct pci_dev *dev, int enable)
+static void msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
 {
-        u16 control;
+        u16 ctrl;
 
-        pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
-        control &= ~PCI_MSIX_FLAGS_ENABLE;
-        if (enable)
-                control |= PCI_MSIX_FLAGS_ENABLE;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
+        ctrl &= ~clear;
+        ctrl |= set;
+        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
 }
 
 static inline __attribute_const__ u32 msi_mask(unsigned x)
@@ -168,16 +167,6 @@ static inline __attribute_const__ u32 msi_mask(unsigned x)
         return (1 << (1 << x)) - 1;
 }
 
-static inline __attribute_const__ u32 msi_capable_mask(u16 control)
-{
-        return msi_mask((control >> 1) & 7);
-}
-
-static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
-{
-        return msi_mask((control >> 4) & 7);
-}
-
 /*
  * PCI 2.3 does not specify mask bits for each MSI interrupt.  Attempting to
  * mask all MSI interrupts by clearing the MSI enable bit does not work
@@ -246,7 +235,7 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag)
                 msix_mask_irq(desc, flag);
                 readl(desc->mask_base);         /* Flush write to device */
         } else {
-                unsigned offset = data->irq - desc->dev->irq;
+                unsigned offset = data->irq - desc->irq;
                 msi_mask_irq(desc, 1 << offset, flag << offset);
         }
 }
@@ -460,7 +449,8 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
         arch_restore_msi_irqs(dev);
 
         pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
-        msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
+        msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
+                     entry->masked);
         control &= ~PCI_MSI_FLAGS_QSIZE;
         control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
         pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
@@ -469,26 +459,22 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
 static void __pci_restore_msix_state(struct pci_dev *dev)
 {
         struct msi_desc *entry;
-        u16 control;
 
         if (!dev->msix_enabled)
                 return;
         BUG_ON(list_empty(&dev->msi_list));
-        entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
-        pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
 
         /* route the table */
         pci_intx_for_msi(dev, 0);
-        control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        msix_clear_and_set_ctrl(dev, 0,
+                                PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
 
         arch_restore_msi_irqs(dev);
         list_for_each_entry(entry, &dev->msi_list, list) {
                 msix_mask_irq(entry, entry->masked);
         }
 
-        control &= ~PCI_MSIX_FLAGS_MASKALL;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
 }
 
 void pci_restore_msi_state(struct pci_dev *dev)
@@ -501,7 +487,6 @@ EXPORT_SYMBOL_GPL(pci_restore_msi_state);
 static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
                              char *buf)
 {
-        struct pci_dev *pdev = to_pci_dev(dev);
         struct msi_desc *entry;
         unsigned long irq;
         int retval;
@@ -510,12 +495,11 @@ static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
         if (retval)
                 return retval;
 
-        list_for_each_entry(entry, &pdev->msi_list, list) {
-                if (entry->irq == irq) {
-                        return sprintf(buf, "%s\n",
-                                       entry->msi_attrib.is_msix ? "msix" : "msi");
-                }
-        }
+        entry = irq_get_msi_desc(irq);
+        if (entry)
+                return sprintf(buf, "%s\n",
+                                entry->msi_attrib.is_msix ? "msix" : "msi");
+
         return -ENODEV;
 }
 
@@ -594,6 +578,38 @@ error_attrs:
         return ret;
 }
 
+static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
+{
+        u16 control;
+        struct msi_desc *entry;
+
+        /* MSI Entry Initialization */
+        entry = alloc_msi_entry(dev);
+        if (!entry)
+                return NULL;
+
+        pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
+
+        entry->msi_attrib.is_msix       = 0;
+        entry->msi_attrib.is_64         = !!(control & PCI_MSI_FLAGS_64BIT);
+        entry->msi_attrib.entry_nr      = 0;
+        entry->msi_attrib.maskbit       = !!(control & PCI_MSI_FLAGS_MASKBIT);
+        entry->msi_attrib.default_irq   = dev->irq;     /* Save IOAPIC IRQ */
+        entry->msi_attrib.pos           = dev->msi_cap;
+        entry->msi_attrib.multi_cap     = (control & PCI_MSI_FLAGS_QMASK) >> 1;
+
+        if (control & PCI_MSI_FLAGS_64BIT)
+                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
+        else
+                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
+
+        /* Save the initial mask status */
+        if (entry->msi_attrib.maskbit)
+                pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
+
+        return entry;
+}
+
 /**
  * msi_capability_init - configure device's MSI capability structure
  * @dev: pointer to the pci_dev data structure of MSI device function
@@ -609,32 +625,16 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
 {
         struct msi_desc *entry;
         int ret;
-        u16 control;
         unsigned mask;
 
         msi_set_enable(dev, 0); /* Disable MSI during set up */
 
-        pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
-        /* MSI Entry Initialization */
-        entry = alloc_msi_entry(dev);
+        entry = msi_setup_entry(dev);
         if (!entry)
                 return -ENOMEM;
 
-        entry->msi_attrib.is_msix       = 0;
-        entry->msi_attrib.is_64         = !!(control & PCI_MSI_FLAGS_64BIT);
-        entry->msi_attrib.entry_nr      = 0;
-        entry->msi_attrib.maskbit       = !!(control & PCI_MSI_FLAGS_MASKBIT);
-        entry->msi_attrib.default_irq   = dev->irq;     /* Save IOAPIC IRQ */
-        entry->msi_attrib.pos           = dev->msi_cap;
-
-        if (control & PCI_MSI_FLAGS_64BIT)
-                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
-        else
-                entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
         /* All MSIs are unmasked by default, Mask them all */
-        if (entry->msi_attrib.maskbit)
-                pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
-        mask = msi_capable_mask(control);
+        mask = msi_mask(entry->msi_attrib.multi_cap);
         msi_mask_irq(entry, mask, mask);
 
         list_add_tail(&entry->list, &dev->msi_list);
@@ -743,12 +743,10 @@ static int msix_capability_init(struct pci_dev *dev,
         u16 control;
         void __iomem *base;
 
-        pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
-
         /* Ensure MSI-X is disabled while it is set up */
-        control &= ~PCI_MSIX_FLAGS_ENABLE;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
 
+        pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
         /* Request & Map MSI-X table region */
         base = msix_map_region(dev, msix_table_size(control));
         if (!base)
@@ -767,8 +765,8 @@ static int msix_capability_init(struct pci_dev *dev,
          * MSI-X registers.  We need to mask all the vectors to prevent
          * interrupts coming in before they're fully set up.
          */
-        control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        msix_clear_and_set_ctrl(dev, 0,
+                                PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
 
         msix_program_entries(dev, entries);
 
@@ -780,8 +778,7 @@ static int msix_capability_init(struct pci_dev *dev,
         pci_intx_for_msi(dev, 0);
         dev->msix_enabled = 1;
 
-        control &= ~PCI_MSIX_FLAGS_MASKALL;
-        pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
+        msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
 
         return 0;
 
@@ -882,7 +879,6 @@ void pci_msi_shutdown(struct pci_dev *dev)
 {
         struct msi_desc *desc;
         u32 mask;
-        u16 ctrl;
 
         if (!pci_msi_enable || !dev || !dev->msi_enabled)
                 return;
@@ -895,8 +891,7 @@ void pci_msi_shutdown(struct pci_dev *dev)
         dev->msi_enabled = 0;
 
         /* Return the device with MSI unmasked as initial states */
-        pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);
-        mask = msi_capable_mask(ctrl);
+        mask = msi_mask(desc->msi_attrib.multi_cap);
         /* Keep cached state to be restored */
         arch_msi_mask_irq(desc, mask, ~mask);
 
@@ -1001,7 +996,7 @@ void pci_msix_shutdown(struct pci_dev *dev)
                 arch_msix_mask_irq(entry, 1);
         }
 
-        msix_set_enable(dev, 0);
+        msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
         pci_intx_for_msi(dev, 1);
         dev->msix_enabled = 0;
 }
@@ -1016,24 +1011,6 @@ void pci_disable_msix(struct pci_dev *dev)
 }
 EXPORT_SYMBOL(pci_disable_msix);
 
-/**
- * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
- * @dev: pointer to the pci_dev data structure of MSI(X) device function
- *
- * Being called during hotplug remove, from which the device function
- * is hot-removed. All previous assigned MSI/MSI-X irqs, if
- * allocated for this device function, are reclaimed to unused state,
- * which may be used later on.
- **/
-void msi_remove_pci_irq_vectors(struct pci_dev *dev)
-{
-        if (!pci_msi_enable || !dev)
-                return;
-
-        if (dev->msi_enabled || dev->msix_enabled)
-                free_msi_irqs(dev);
-}
-
 void pci_no_msi(void)
 {
         pci_msi_enable = 0;
@@ -1065,7 +1042,7 @@ void pci_msi_init_pci_dev(struct pci_dev *dev)
 
         dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);
         if (dev->msix_cap)
-                msix_set_enable(dev, 0);
+                msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
 }
 
 /**
diff --git a/drivers/pci/pci-label.c b/drivers/pci/pci-label.c
index a3fbe2012ea3..2ab1b47c7651 100644
--- a/drivers/pci/pci-label.c
+++ b/drivers/pci/pci-label.c
@@ -161,8 +161,8 @@ enum acpi_attr_enum {
 static void dsm_label_utf16s_to_utf8s(union acpi_object *obj, char *buf)
 {
         int len;
-        len = utf16s_to_utf8s((const wchar_t *)obj->string.pointer,
-                              obj->string.length,
+        len = utf16s_to_utf8s((const wchar_t *)obj->buffer.pointer,
+                              obj->buffer.length,
                               UTF16_LITTLE_ENDIAN,
                               buf, PAGE_SIZE);
         buf[len] = '\n';
@@ -187,16 +187,22 @@ static int dsm_get_label(struct device *dev, char *buf,
         tmp = obj->package.elements;
         if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 2 &&
             tmp[0].type == ACPI_TYPE_INTEGER &&
-            tmp[1].type == ACPI_TYPE_STRING) {
+            (tmp[1].type == ACPI_TYPE_STRING ||
+             tmp[1].type == ACPI_TYPE_BUFFER)) {
                 /*
                  * The second string element is optional even when
                  * this _DSM is implemented; when not implemented,
                  * this entry must return a null string.
                  */
-                if (attr == ACPI_ATTR_INDEX_SHOW)
+                if (attr == ACPI_ATTR_INDEX_SHOW) {
                         scnprintf(buf, PAGE_SIZE, "%llu\n", tmp->integer.value);
-                else if (attr == ACPI_ATTR_LABEL_SHOW)
-                        dsm_label_utf16s_to_utf8s(tmp + 1, buf);
+                } else if (attr == ACPI_ATTR_LABEL_SHOW) {
+                        if (tmp[1].type == ACPI_TYPE_STRING)
+                                scnprintf(buf, PAGE_SIZE, "%s\n",
+                                          tmp[1].string.pointer);
+                        else if (tmp[1].type == ACPI_TYPE_BUFFER)
+                                dsm_label_utf16s_to_utf8s(tmp + 1, buf);
+                }
                 len = strlen(buf) > 0 ? strlen(buf) : -1;
         }
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 63a54a340863..74043a2a2da8 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -839,12 +839,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 
         if (!__pci_complete_power_transition(dev, state))
                 error = 0;
-        /*
-         * When aspm_policy is "powersave" this call ensures
-         * that ASPM is configured.
-         */
-        if (!error && dev->bus->self)
-                pcie_aspm_powersave_config_link(dev->bus->self);
 
         return error;
 }
@@ -1195,12 +1189,18 @@ int __weak pcibios_enable_device(struct pci_dev *dev, int bars)
 static int do_pci_enable_device(struct pci_dev *dev, int bars)
 {
         int err;
+        struct pci_dev *bridge;
         u16 cmd;
         u8 pin;
 
         err = pci_set_power_state(dev, PCI_D0);
         if (err < 0 && err != -EIO)
                 return err;
+
+        bridge = pci_upstream_bridge(dev);
+        if (bridge)
+                pcie_aspm_powersave_config_link(bridge);
+
         err = pcibios_enable_device(dev, bars);
         if (err < 0)
                 return err;
@@ -3193,7 +3193,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
         return 0;
 }
 
-void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
+void pci_reset_secondary_bus(struct pci_dev *dev)
 {
         u16 ctrl;
 
@@ -3219,6 +3219,11 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
         ssleep(1);
 }
 
+void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
+{
+        pci_reset_secondary_bus(dev);
+}
+
 /**
  * pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge.
  * @dev: Bridge device
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 80887eaa0668..2ccc9b926ea7 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -203,10 +203,6 @@ static int pcie_portdrv_probe(struct pci_dev *dev,
              (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
                 return -ENODEV;
 
-        if (!dev->irq && dev->pin) {
-                dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; check vendor BIOS\n",
-                         dev->vendor, dev->device);
-        }
         status = pcie_port_device_register(dev);
         if (status)
                 return status;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index d0f69269eb6c..ad566827b547 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3405,6 +3405,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ASMEDIA, 0x1080,
 DECLARE_PCI_FIXUP_HEADER(0x10e3, 0x8113, quirk_use_pcie_bridge_dma_alias);
 /* ITE 8892, https://bugzilla.kernel.org/show_bug.cgi?id=73551 */
 DECLARE_PCI_FIXUP_HEADER(0x1283, 0x8892, quirk_use_pcie_bridge_dma_alias);
+/* Intel 82801, https://bugzilla.kernel.org/show_bug.cgi?id=44881#c49 */
+DECLARE_PCI_FIXUP_HEADER(0x8086, 0x244e, quirk_use_pcie_bridge_dma_alias);
 
 static struct pci_dev *pci_func_0_dma_source(struct pci_dev *dev)
 {
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index a5a63ecfb628..6373985ad3f7 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 {
         struct pci_dev *dev;
         resource_size_t min_align, align, size, size0, size1;
-        resource_size_t aligns[14];     /* Alignments from 1Mb to 8Gb */
+        resource_size_t aligns[18];     /* Alignments from 1Mb to 128Gb */
         int order, max_order;
         struct resource *b_res = find_free_bus_resource(bus,
                                         mask | IORESOURCE_PREFETCH, type);
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index caed1ce6facd..b7c3a5ea1fca 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -166,11 +166,10 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
 {
         struct resource *root, *conflict;
         resource_size_t fw_addr, start, end;
-        int ret = 0;
 
         fw_addr = pcibios_retrieve_fw_addr(dev, resno);
         if (!fw_addr)
-                return 1;
+                return -ENOMEM;
 
         start = res->start;
         end = res->end;
@@ -189,14 +188,13 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
                  resno, res);
         conflict = request_resource_conflict(root, res);
         if (conflict) {
-                dev_info(&dev->dev,
-                         "BAR %d: %pR conflicts with %s %pR\n", resno,
-                         res, conflict->name, conflict);
+                dev_info(&dev->dev, "BAR %d: %pR conflicts with %s %pR\n",
+                         resno, res, conflict->name, conflict);
                 res->start = start;
                 res->end = end;
-                ret = 1;
+                return -EBUSY;
         }
-        return ret;
+        return 0;
 }
 
 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
@@ -250,10 +248,8 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 static int _pci_assign_resource(struct pci_dev *dev, int resno,
                                 resource_size_t size, resource_size_t min_align)
 {
-        struct resource *res = dev->resource + resno;
         struct pci_bus *bus;
         int ret;
-        char *type;
 
         bus = dev->bus;
         while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
@@ -262,21 +258,6 @@ static int _pci_assign_resource(struct pci_dev *dev, int resno,
                 bus = bus->parent;
         }
 
-        if (ret) {
-                if (res->flags & IORESOURCE_MEM)
-                        if (res->flags & IORESOURCE_PREFETCH)
-                                type = "mem pref";
-                        else
-                                type = "mem";
-                else if (res->flags & IORESOURCE_IO)
-                        type = "io";
-                else
-                        type = "unknown";
-                dev_info(&dev->dev,
-                         "BAR %d: can't assign %s (size %#llx)\n",
-                         resno, type, (unsigned long long) resource_size(res));
-        }
-
         return ret;
 }
 
@@ -302,17 +283,24 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
          * where firmware left it.  That at least has a chance of
          * working, which is better than just leaving it disabled.
          */
-        if (ret < 0)
+        if (ret < 0) {
+                dev_info(&dev->dev, "BAR %d: no space for %pR\n", resno, res);
                 ret = pci_revert_fw_address(res, dev, resno, size);
+        }
 
-        if (!ret) {
-                res->flags &= ~IORESOURCE_UNSET;
-                res->flags &= ~IORESOURCE_STARTALIGN;
-                dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
-                if (resno < PCI_BRIDGE_RESOURCES)
-                        pci_update_resource(dev, resno);
+        if (ret < 0) {
+                dev_info(&dev->dev, "BAR %d: failed to assign %pR\n", resno,
+                         res);
+                return ret;
         }
-        return ret;
+
+        res->flags &= ~IORESOURCE_UNSET;
+        res->flags &= ~IORESOURCE_STARTALIGN;
+        dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
+        if (resno < PCI_BRIDGE_RESOURCES)
+                pci_update_resource(dev, resno);
+
+        return 0;
 }
 EXPORT_SYMBOL(pci_assign_resource);
 
@@ -320,9 +308,11 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
                         resource_size_t min_align)
 {
         struct resource *res = dev->resource + resno;
+        unsigned long flags;
         resource_size_t new_size;
         int ret;
 
+        flags = res->flags;
         res->flags |= IORESOURCE_UNSET;
         if (!res->parent) {
                 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n",
@@ -333,14 +323,21 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz
         /* already aligned with min_align */
         new_size = resource_size(res) + addsize;
         ret = _pci_assign_resource(dev, resno, new_size, min_align);
-        if (!ret) {
-                res->flags &= ~IORESOURCE_UNSET;
-                res->flags &= ~IORESOURCE_STARTALIGN;
-                dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
-                if (resno < PCI_BRIDGE_RESOURCES)
-                        pci_update_resource(dev, resno);
+        if (ret) {
+                res->flags = flags;
+                dev_info(&dev->dev, "BAR %d: %pR (failed to expand by %#llx)\n",
+                         resno, res, (unsigned long long) addsize);
+                return ret;
         }
-        return ret;
+
+        res->flags &= ~IORESOURCE_UNSET;
+        res->flags &= ~IORESOURCE_STARTALIGN;
+        dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n",
+                 resno, res, (unsigned long long) addsize);
+        if (resno < PCI_BRIDGE_RESOURCES)
+                pci_update_resource(dev, resno);
+
+        return 0;
 }
 
 int pci_enable_resources(struct pci_dev *dev, int mask)